diff --git a/apps/riscv-tests/isa/rv64uv/vfadd.c b/apps/riscv-tests/isa/rv64uv/vfadd.c
index 5c4a3f47c..560f31717 100644
--- a/apps/riscv-tests/isa/rv64uv/vfadd.c
+++ b/apps/riscv-tests/isa/rv64uv/vfadd.c
@@ -14,6 +14,15 @@
 
 // Simple random test with similar values + 1 subnormal
 void TEST_CASE1(void) {
+/*
+  VSET(16, e8, m1);
+  // Enable this test only with 8-bit floating-point support on
+  VLOAD_8(v2, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011);
+  VLOAD_8(v3, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100, 0b01011011, 0b11001100);
+  asm volatile("vfadd.vv v1, v2, v3");
+  VCMP_U8(0, v1, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010, 0b01011010);
+*/
+
   VSET(16, e16, m1);
   //             -0.8896, -0.3406,  0.7324, -0.6846, -0.2969, -0.7739,  0.5737,
   //             0.4331,  0.8940, -0.4900,  0.4219,  0.4639,  0.6694,  0.4382,