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RFE: check Front IO PG signal during sequencing #1863

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Aaron-Hartwig opened this issue Sep 4, 2024 · 0 comments
Open

RFE: check Front IO PG signal during sequencing #1863

Aaron-Hartwig opened this issue Sep 4, 2024 · 0 comments
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@Aaron-Hartwig
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The Sidecar mainboard sequencer enables the HSC that provides power to the Front IO board. During sequencing, that enable is set and then we wait to see if the HSC comes up successfully, moving on if that is the case. We have not made use of the fact that we have a feedback signal (QSFP_2_SP_A2_PG) which comes back to the SP to pin F12. Checking that signal should provide more granular information since it would tell us that the power cable was installed correctly as well as the signaling cable.

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