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    12 repositories

    • vhdlcodes.github.io

      Public
      0•0•0•0•Updated Jun 14, 2023Jun 14, 2023

    • klipper_config

      Public
      This is the config of my Voron 2.4 350mm3 Serial:V2.660
      Shell
      •
      GNU General Public License v3.0
      •103•0•0•0•Updated Jun 30, 2022Jun 30, 2022

    • Cura

      Public
      3D printer / slicing GUI built on top of the Uranium framework
      Python
      •
      GNU Lesser General Public License v3.0
      •2.1k•0•0•0•Updated Aug 20, 2021Aug 20, 2021

    • Printrun

      Public
      Pronterface, Pronsole, and Printcore - Pure Python 3d printing host software
      Python
      •
      GNU General Public License v3.0
      •1k•0•0•0•Updated Aug 12, 2021Aug 12, 2021

    • neorv32

      Public
      A size-optimized, customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.
      VHDL
      •
      BSD 3-Clause "New" or "Revised" License
      •233•0•0•0•Updated Jun 24, 2021Jun 24, 2021

    • cv

      Public
      HTML
      •0•0•0•0•Updated Aug 5, 2020Aug 5, 2020

    • OpenROAD

      Public
      OpenROAD's unified application implementing an RTL-to-GDS Flow
      Verilog
      •
      Other
      •580•0•0•0•Updated Jul 29, 2020Jul 29, 2020

    • seg7_decoder_vhdl

      Public
      VHDL
      •
      MIT License
      •0•1•0•0•Updated Sep 17, 2018Sep 17, 2018

    • clock_div_1Hz_vhdl

      Public
      Makefile
      •
      MIT License
      •0•0•0•0•Updated Sep 17, 2018Sep 17, 2018

    • vhdlcodes_projects

      Public
      Project repo for vhdlcodes.com
      VHDL
      •0•0•0•0•Updated Apr 18, 2016Apr 18, 2016

    • vhdlcodes.backup

      Public
      Website
      CSS
      •
      MIT License
      •0•0•0•0•Updated Apr 14, 2016Apr 14, 2016

    • Verilog_Projects

      Public
      Set of Verilog Examples on FPGAs
      CSS
      •
      GNU General Public License v3.0
      •0•0•0•0•Updated Aug 15, 2015Aug 15, 2015