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Allow hard-wiring of PMP regions #1769
Allow hard-wiring of PMP regions #1769
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lgtm, I think we miss the configuration in some testbench :-) Maybe @cathales can help? 🥹 |
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I tried a few things as far as I could parse the error messages from the logs but now it appears that the CI issues are unrelated to my changes. Does anyone have some feedback/suggestions as to how I could resolve these issues? |
Hi! We encountered similar issues while reviewing #1760.
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This commit adds three new fields to the cva6_cfg_t configuration struct, which allow to specify reset values for the PMP configuration and address CSRs as well as optionally making invidiual PMP entries read-only. The purpose is to allow hard-wiring of certain regions' privileges, which is explicitely allowed by the RISC-V Privileged Architecture specification Machine-Level ISA, v1.12 (see Sect. 3.7).
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Thanks @cathales for the suggestions! Added the missing modifications, so let's see whether it works now 🙂 |
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Awesome! Thanks
…up#1769) This commit adds three new fields to the `cva6_cfg_t` configuration struct, which allows to specify reset values for the PMP configuration and address CSRs as well as optionally making individual PMP entries read-only. The purpose is to allow hard-wiring of certain regions' privileges, which is explicitly allowed by the RISC-V Privileged Architecture specification Machine-Level ISA, v1.12 (see Sect. 3.7).
This PR adds three new fields to the
cva6_cfg_t
configuration struct, which allow to specify reset values for the PMP configuration and address CSRs as well as optionally making individual PMP entries read-only. The purpose is to allow hard-wiring of certain regions' privileges, which is explicitly allowed by the RISC-V Privileged Architecture specification Machine-Level ISA, v1.12 (see Sect. 3.7).Hard-wiring of PMP regions is useful whenever a SoC has memory regions with fixed properties and protection rules. Instead of relying on SW to setup the PMP regions correctly on every boot, with this PR regions may be initialized using the new parameters and optionally made read-only.