From 89d2d74fdcb68fe50f783953d26eef34c35f1601 Mon Sep 17 00:00:00 2001
From: JeanRochCoulon <jean-roch.coulon@thalesgroup.com>
Date: Tue, 2 Jan 2024 23:25:50 +0100
Subject: [PATCH] Fix inhibit impact on MCYCLE csr

---
 core/csr_regfile.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/core/csr_regfile.sv b/core/csr_regfile.sv
index fa7248c5db..87b7da0b35 100644
--- a/core/csr_regfile.sv
+++ b/core/csr_regfile.sv
@@ -569,7 +569,7 @@ module csr_regfile
       instret_d = instret;
       // increment the cycle count
       if (!mcountinhibit_q[0]) cycle_d = cycle_q + 1'b1;
-      else cycle_d = instret;
+      else cycle_d = cycle_q;
     end
 
     eret_o                  = 1'b0;