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[TASK] Fix riscv-tests with virtual memory on tandem #2605

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1 task done
valentinThomazic opened this issue Nov 15, 2024 · 0 comments
Open
1 task done

[TASK] Fix riscv-tests with virtual memory on tandem #2605

valentinThomazic opened this issue Nov 15, 2024 · 0 comments
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CV64A6 Part: 64bits configuration notCV32A65X It is not an CV32A65X issue

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@valentinThomazic
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Is there an existing CVA6 task for this?

  • I have searched the existing task issues

Task Description

Fix the riscv-tests with virtual memory enabled on cv64a6_imafdc_sv39 with tandem enabled.

Required Changes

Make these tests pass :

  • rv64uf-v-fcmp
  • rv64uf-v-fdiv
  • rv64uf-v-fmin
  • rv64ud-v-move

Current Status

The tests are failing because they are more than 5 mismatches, mostly CSR-related on csrrw instructions

Risks

No response

Prerequisites

No response

KPI (KEY Performance Indicators)

Number of tests passing on riscv-tests-v testlist on cv64a6_imafdc_sv39 configuration and testharness testbench

Description of Done

All tests passing

Associated PRs

No response
@valentinThomazic valentinThomazic added the CV64A6 Part: 64bits configuration label Nov 15, 2024
@JeanRochCoulon JeanRochCoulon added the notCV32A65X It is not an CV32A65X issue label Nov 18, 2024
@valentinThomazic valentinThomazic mentioned this issue Nov 18, 2024
Merged
JeanRochCoulon pushed a commit that referenced this issue Nov 18, 2024
@valentinThomazic
Disable tandem on riscv-tests-v tests (#2609)
e7f27c1 
* Disable tandem on riscv-tests-v testlist
* More relevant error message on report tandem script
Related issue: #2605
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CV64A6 Part: 64bits configuration notCV32A65X It is not an CV32A65X issue
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@JeanRochCoulon @valentinThomazic