diff --git a/core/cva6_rvfi.sv b/core/cva6_rvfi.sv
index 504841f831..d5c8a48a40 100644
--- a/core/cva6_rvfi.sv
+++ b/core/cva6_rvfi.sv
@@ -274,7 +274,7 @@ module cva6_rvfi
   always_ff @(posedge clk_i) begin
     for (int i = 0; i < CVA6Cfg.NrCommitPorts; i++) begin
       logic exception;
-      exception = commit_instr_valid[i] && ex_commit_valid && !commit_drop[i];
+      exception = (i == 0) && commit_instr_valid[i] && ex_commit_valid && !commit_drop[i];
       rvfi_instr_o[i].valid    <= (commit_ack[i] && !ex_commit_valid && !commit_drop[i]) ||
         (exception && (ex_commit_cause == riscv::ENV_CALL_MMODE ||
                   ex_commit_cause == riscv::ENV_CALL_SMODE ||
diff --git a/verif/regress/smoke-tests.sh b/verif/regress/smoke-tests.sh
index 7f3a2ebdf8..5851716024 100644
--- a/verif/regress/smoke-tests.sh
+++ b/verif/regress/smoke-tests.sh
@@ -33,7 +33,7 @@ if ! [ -n "$DV_SIMULATORS" ]; then
 fi
 
 if ! [ -n "$UVM_VERBOSITY" ]; then
-    export UVM_VERBOSITY=UVM_NONE
+    export UVM_VERBOSITY=UVM_LOW
 fi
 
 export DV_OPTS="$DV_OPTS --issrun_opts=+debug_disable=1+UVM_VERBOSITY=$UVM_VERBOSITY"
diff --git a/verif/sim/Makefile b/verif/sim/Makefile
index 03fc9fb00e..4479a1b586 100644
--- a/verif/sim/Makefile
+++ b/verif/sim/Makefile
@@ -66,7 +66,8 @@ spike_yaml ?= $(CVA6_REPO_DIR)/config/gen_from_riscv_config/$(target)/spike/spik
 spike_params_final = $(spike_params)
 ifneq ($(wildcard $(spike_yaml)),)
   spike_params_final := $(spike_params_final) --param-file $(spike_yaml)
-  spike-yaml-plusarg = +config_file=$(CVA6_REPO_DIR)/config/gen_from_riscv_config/$(target)/spike/spike.yaml
+  # TODO Renable yaml plusarg
+  #spike-yaml-plusarg = +config_file=$(CVA6_REPO_DIR)/config/gen_from_riscv_config/$(target)/spike/spike.yaml
 endif
 
 ##############################################
@@ -225,8 +226,8 @@ ALL_XRUN_UVM_FLAGS      = -elaborate -messages -sv +incdir+$(XCELIUM_HOME)/tools
 	  -xmerror CUNOTB -nowarn CUDEFB -nowarn CUSRCH -warn_multiple_driver -relax_svbtis -timescale 1ns/1ps -status -access +rwc -log   $(XRUN_WORK_DIR)/tb_compile.log
 
 ALL_XRUN_SIMV_UVM_FLAGS      =  +sv_lib=$(CVA6_REPO_DIR)/tools/spike/lib/libdisasm +signature=I-ADD-01.signature_output
-		          
-XRUN_RUN_FLAGS := -R -messages -status -64bit -licqueue -noupdate -log xrun.log -uvmhome CDNS-1.2  +UVM_VERBOSITY=UVM_LOW -svseed 1 		
+
+XRUN_RUN_FLAGS := -R -messages -status -64bit -licqueue -noupdate -log xrun.log -uvmhome CDNS-1.2  +UVM_VERBOSITY=UVM_LOW -svseed 1
 
 XRUN_DISABLED_WARNINGS := BIGWIX 	\
                         ZROMCW 		\
@@ -239,7 +240,7 @@ XRUN_DISABLED_WARNINGS 	:= $(patsubst %, -nowarn %, $(XRUN_DISABLED_WARNINGS))
 
 XRUN_RUN = $(XRUN_RUN_FLAGS) 		\
 	   $(ALL_XRUN_SIMV_UVM_FLAGS)	\
-	   $(XRUN_DISABLED_WARNINGS)	
+	   $(XRUN_DISABLED_WARNINGS)
 
 ifneq ($(DEBUG),)               # If RTL DEBUG support requested
   ifneq ($(VERDI),)             #   If VERDI interactive mode requested, use GUI and do not run simulation
@@ -298,7 +299,7 @@ vcs-uvm: vcs_uvm_comp vcs_uvm_run
 
 
 ### XRUN UVM rules
-xrun_uvm_comp: 
+xrun_uvm_comp:
 	@echo "[XRUN] Building Model"
 	mkdir -p $(XRUN_WORK_DIR)
 	cd $(XRUN_WORK_DIR) && \
@@ -325,7 +326,7 @@ xrun_uvm_run:
 	  +UVM_TESTNAME=uvmt_cva6_firmware_test_c	\
 	  +tohost_addr=$(shell ${RISCV}/bin/${CV_SW_PREFIX}nm -B $(elf) | grep -w tohost | cut -d' ' -f1)          \
 	  $(cov-comp-opt) $(issrun_opts)
-	  			
+
 
 xrun-uvm: xrun_uvm_comp xrun_uvm_run
 	$(tool_path)/spike-dasm --isa=$(variant) < ./xrun_results/trace_rvfi_hart_00.dasm > $(log)
diff --git a/verif/sim/cva6.py b/verif/sim/cva6.py
index f7a513ddd6..6522fab620 100644
--- a/verif/sim/cva6.py
+++ b/verif/sim/cva6.py
@@ -519,9 +519,10 @@ def analize_result_yaml(yaml_path):
         mismatches = data["mismatches"]
         mismatches_count =  (data["mismatches_count"])
         instr_count = (data["instr_count"])
+        exit_code = (data["exit_code"])
         matches_count =  instr_count - mismatches_count
-        logging.info("TANDEM Result : %s with %s mismatches and %s matches"
-            % (data["exit_cause"], mismatches_count, matches_count))
+        logging.info("TANDEM Result : %s (exit code %s) with %s mismatches and %s matches"
+            % (data["exit_cause"], exit_code, mismatches_count, matches_count))
     else:
         logging.info("TANDEM YAML not found")
 
diff --git a/verif/tb/core/uvma_cva6pkg_utils.sv b/verif/tb/core/uvma_cva6pkg_utils.sv
index f2732098e3..ac2b4d044a 100644
--- a/verif/tb/core/uvma_cva6pkg_utils.sv
+++ b/verif/tb/core/uvma_cva6pkg_utils.sv
@@ -42,8 +42,8 @@ function st_core_cntrl_cfg cva6pkg_to_core_cntrl_cfg(st_core_cntrl_cfg cfg);
 
     // FIXME TODO: Temporary solution. We need explicit info on memory map.
     // FORNOW The solution below relies on specific region ordering.
-    cfg.dram_base = CVA6Cfg.ExecuteRegionAddrBase[2];
-    cfg.dram_size = CVA6Cfg.ExecuteRegionLength[2];
+    cfg.dram_base = 'h40000000;
+    cfg.dram_size = 'h80000000;
     cfg.dram_valid = 1;
 
     cfg.disable_all_csr_checks = 0;