From 37d93a375898cef13d6162021b84963bab742482 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?C=C3=B4me?= <124148386+cathales@users.noreply.github.com>
Date: Fri, 5 Jul 2024 23:49:44 +0200
Subject: [PATCH] superscalar: do not issue CSR with another instruction
 (#2329)

---
 core/issue_read_operands.sv | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/core/issue_read_operands.sv b/core/issue_read_operands.sv
index 06b1c64c38..f119c7a2b4 100644
--- a/core/issue_read_operands.sv
+++ b/core/issue_read_operands.sv
@@ -219,6 +219,9 @@ module issue_read_operands
     if (CVA6Cfg.SuperscalarEn) begin
       fus_busy[1] = fus_busy[0];
 
+      // Never issue CSR instruction on second issue port.
+      fus_busy[1].csr = 1'b1;
+
       unique case (issue_instr_i[0].fu)
         NONE:  fus_busy[1].none = 1'b1;
         CTRL_FLOW: begin
@@ -257,9 +260,8 @@ module issue_read_operands
           end
         end
         CSR: begin
-          fus_busy[1].alu = 1'b1;
-          fus_busy[1].ctrl_flow = 1'b1;
-          fus_busy[1].csr = 1'b1;
+          // Control hazard
+          fus_busy[1] = '1;
         end
         MULT:  fus_busy[1].mult = 1'b1;
         FPU, FPU_VEC: begin