You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
When designing a HDL core through SNAP it might be useful to insert this protocol checker on the action AXI interface (probably during simulation only).
Obviously a designer can do this inside an action design but I thought it would be a nice feature to have this integrated in the SNAP platform itself.
The text was updated successfully, but these errors were encountered:
There is Xilinx IP that checks for violations of the AXI protocol on a bus: https://www.xilinx.com/products/intellectual-property/axi_protocol_checker.html
When designing a HDL core through SNAP it might be useful to insert this protocol checker on the action AXI interface (probably during simulation only).
Obviously a designer can do this inside an action design but I thought it would be a nice feature to have this integrated in the SNAP platform itself.
The text was updated successfully, but these errors were encountered: