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Add nrf54l09pdk board with nrf54l09 EngA SoC.

Signed-off-by: Krzysztof Chruściński <[email protected]>
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nordic-krch authored and e-rk committed Dec 13, 2024
1 parent b70d721 commit 3958d38
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18 changes: 18 additions & 0 deletions boards/nordic/nrf54l09pdk/Kconfig.defconfig
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# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

if BOARD_NRF54L09PDK_NRF54L09_CPUAPP

config BT_CTLR
default BT

config ROM_START_OFFSET
default 0x800 if BOOTLOADER_MCUBOOT

config SOC_NRF54LX_SKIP_CLOCK_CONFIG
default y

config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE
default y

endif # BOARD_NRF54L09PDK_NRF54L09_CPUAPP
5 changes: 5 additions & 0 deletions boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk
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# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

config BOARD_NRF54L09PDK
select SOC_NRF54L09_ENGA_CPUAPP if BOARD_NRF54L09PDK_NRF54L09_CPUAPP
7 changes: 7 additions & 0 deletions boards/nordic/nrf54l09pdk/board.cmake
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# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

board_runner_args(jlink "--device=cortex-m33" "--speed=4000")

include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
6 changes: 6 additions & 0 deletions boards/nordic/nrf54l09pdk/board.yml
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board:
name: nrf54l09pdk
full_name: nRF54L09 PDK
vendor: nordic
socs:
- name: nrf54l09
90 changes: 90 additions & 0 deletions boards/nordic/nrf54l09pdk/doc/index.rst
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.. _nrf54l09pdk_nrf54l09:

nRF54L09 PDK
############

Overview
********

.. note::

All software for the nRF54L09 SoC is experimental and hardware availability
is restricted to the participants in the limited sampling program.

The nRF54L09 Preview Development Kit hardware provides
support for the Nordic Semiconductor nRF54L09 Arm Cortex-M33 CPU and
the following devices:

* CLOCK
* RRAM
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`GRTC (Global real-time counter)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`UARTE (Universal asynchronous receiver-transmitter)`

Hardware
********

nRF54L09 PDK has two crystal oscillators:

* High-frequency 32 MHz crystal oscillator (HFXO)
* Low-frequency 32.768 kHz crystal oscillator (LFXO)

The crystal oscillators can be configured to use either
internal or external capacitors.

Supported Features
==================

The ``nrf54l09pdk/nrf54l09/cpuapp`` board target supports the following hardware features:

+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| RRAM | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| GRTC | on-chip | system clock |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| UARTE | on-chip | serial |
+-----------+------------+----------------------+

Other hardware features have not been enabled yet for this board.

Programming and Debugging
*************************

Applications for the ``nrf54l09pdk/nrf54l09/cpuapp`` board target can be
built, flashed, and debugged in the usual way. See
:ref:`build_an_application` and :ref:`application_run` for more details on
building and running.

Flashing
========

As an example, this section shows how to build and flash the :zephyr:code-sample:`hello_world`
application.

Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`.

To build and program the sample to the nRF54L09 PDK, complete the following steps:

First, connect the nRF54L09 PDK to you computer using the IMCU USB port on the PDK.
Next, build the sample by running the following command:

.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf54l09pdk/nrf54l09/cpuapp
:goals: build flash

Testing the LEDs and buttons in the nRF54L09 PDK
************************************************

Test the nRF54L09 PDK with a :zephyr:code-sample:`blinky` sample.
117 changes: 117 additions & 0 deletions boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

/* This file is common to the secure and non-secure domain */

#include <nordic/nrf54l09_enga_cpuapp.dtsi>
#include "nrf54l09pdk_nrf54l09-common.dtsi"

/ {
chosen {
zephyr,console = &uart20;
zephyr,shell-uart = &uart20;
zephyr,uart-mcumgr = &uart20;
zephyr,bt-mon-uart = &uart20;
zephyr,bt-c2h-uart = &uart20;
zephyr,flash-controller = &rram_controller;
zephyr,flash = &cpuapp_rram;
zephyr,bt-hci = &bt_hci_controller;
zephyr,ieee802154 = &ieee802154;
};
};

&cpuapp_sram {
status = "okay";
};

&lfxo {
load-capacitors = "internal";
load-capacitance-femtofarad = <15500>;
};

&hfxo {
load-capacitors = "internal";
load-capacitance-femtofarad = <15000>;
};

&grtc {
owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
child-owned-channels = <3 4 7 8 9 10 11>;
status = "okay";
};

&cpuapp_rram {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(64)>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x10000 DT_SIZE_K(212)>;
};
slot0_ns_partition: partition@45000 {
label = "image-0-nonsecure";
reg = <0x45000 DT_SIZE_K(212)>;
};
slot1_partition: partition@7a000 {
label = "image-1";
reg = <0x7a000 DT_SIZE_K(212)>;
};
slot1_ns_partition: partition@af000 {
label = "image-1-nonsecure";
reg = <0xaf000 DT_SIZE_K(212)>;
};
storage_partition: partition@e4000 {
label = "storage";
reg = <0xe4000 DT_SIZE_K(36)>;
};
};
};

&uart20 {
status = "okay";
};

&gpio0 {
status = "okay";
};

&gpio1 {
status = "okay";
};

&gpiote20 {
status = "okay";
};

&gpiote30 {
status = "okay";
};

&radio {
status = "okay";
};

&temp {
status = "okay";
};

&clock {
status = "okay";
};

&bt_hci_controller {
status = "okay";
};

&ieee802154 {
status = "okay";
};
67 changes: 67 additions & 0 deletions boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

#include "nrf54l09pdk_nrf54l09-pinctrl.dtsi"

/ {
leds {
compatible = "gpio-leds";
led1: led_1 {
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
label = "Green LED 1";
};
led2: led_2 {
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
label = "Green LED 2";
};
led3: led_3 {
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
label = "Green LED 3";
};
};

buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 1";
zephyr,code = <INPUT_KEY_1>;
};
button2: button_2 {
gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 2";
zephyr,code = <INPUT_KEY_2>;
};
button3: button_3 {
gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 3";
zephyr,code = <INPUT_KEY_3>;
};
};

aliases {
led1 = &led1;
led2 = &led2;
led3 = &led3;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
watchdog0 = &wdt31;
};
};

&uart20 {
current-speed = <115200>;
pinctrl-0 = <&uart20_default>;
pinctrl-1 = <&uart20_sleep>;
pinctrl-names = "default", "sleep";
};
24 changes: 24 additions & 0 deletions boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi
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/*
* Copyright (c) 2024 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/

&pinctrl {
/omit-if-no-ref/ uart20_default: uart20_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 4)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 1, 5)>;
bias-pull-up;
};
};

/omit-if-no-ref/ uart20_sleep: uart20_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 4)>,
<NRF_PSEL(UART_RX, 1, 5)>;
low-power-enable;
};
};
};
19 changes: 19 additions & 0 deletions boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuapp.dts
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

/dts-v1/;

#include "nrf54l09_cpuapp_common.dtsi"

/ {
compatible = "nordic,nrf54l09pdk_nrf54l09-cpuapp";
model = "Nordic nRF54L09 PDK nRF54L09 Application MCU";

chosen {
zephyr,code-partition = &slot0_partition;
zephyr,sram = &cpuapp_sram;
};
};
17 changes: 17 additions & 0 deletions boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuapp.yaml
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# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

identifier: nrf54l09pdk/nrf54l09/cpuapp
name: nRF54L09-PDK-nRF54L09-Application
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
sysbuild: true
ram: 192
flash: 200
supported:
- counter
- gpio
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