From 2483188e4e1d218b0551b1c8a3b624319ebfb7b4 Mon Sep 17 00:00:00 2001 From: Matthias Kretz Date: Tue, 18 Apr 2023 23:30:06 +0200 Subject: [PATCH] Allow faking access to any EVEX encoded SSE register This leads to significantly better code-gen on benchmarks that need many registers. ChangeLog: * vir/simd_benchmarking.h (fake_modify_one, fake_read_one): Prefer v over x in constraints. --- vir/simd_benchmarking.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/vir/simd_benchmarking.h b/vir/simd_benchmarking.h index 75a40b7..3aba8c2 100644 --- a/vir/simd_benchmarking.h +++ b/vir/simd_benchmarking.h @@ -18,7 +18,7 @@ namespace vir fake_modify_one(T& x) { if constexpr (std::is_floating_point_v) - asm volatile("" : "+x"(x)); + asm volatile("" : "+v,x"(x)); else if constexpr (stdx::is_simd_v || stdx::is_simd_mask_v) { #if defined _GLIBCXX_EXPERIMENTAL_SIMD && __cpp_lib_experimental_parallel_simd >= 201803 @@ -36,11 +36,11 @@ namespace vir if constexpr (sizeof(x) < 16) asm volatile("" : "+g"(x)); else - asm volatile("" : "+x,g,m"(x)); + asm volatile("" : "+v,x,g,m"(x)); #endif } else if constexpr (sizeof(x) >= 16) - asm volatile("" : "+x"(x)); + asm volatile("" : "+v,x"(x)); else asm volatile("" : "+g"(x)); } @@ -55,7 +55,7 @@ namespace vir fake_read_one(const T& x) { if constexpr (std::is_floating_point_v) - asm volatile("" ::"x"(x)); + asm volatile("" ::"v,x"(x)); else if constexpr (stdx::is_simd_v || stdx::is_simd_mask_v) { #if defined _GLIBCXX_EXPERIMENTAL_SIMD && __cpp_lib_experimental_parallel_simd >= 201803 @@ -73,11 +73,11 @@ namespace vir if constexpr (sizeof(x) < 16) asm volatile("" ::"g"(x)); else - asm volatile("" ::"x,g,m"(x)); + asm volatile("" ::"v,x,g,m"(x)); #endif } else if constexpr (sizeof(x) >= 16) - asm volatile("" ::"x"(x)); + asm volatile("" ::"v,x"(x)); else asm volatile("" ::"g"(x)); }