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info.yaml
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info.yaml
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---
# TinyTapeout project information
project:
wokwi_id: 0 # Must be 0 if you are not using wokwi
# If using an HDL, set wokwi_id as 0 and uncomment and list your source files here.
# Source files must be in ./src and you must list each source file separately
source_files:
- tt_um_marno_factorize.v
- seg7decoder.v
- factorizer.v
top_module: "tt_um_marno_factorize" # Put the name of your top module here, must start with "tt_um_". Make it unique by prepending your github username
# How many tiles your design occupies? A single tile is about 167x108 uM.
tiles: "1x1" # Valid values: 1x1, 1x2, 2x2, 4x2 or 8x2
# Keep track of the submission yaml
yaml_version: 4
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it. This info will be automatically collected and used to make a datasheet for the chip.
#
# Here is a great example: https://github.com/davidsiaw/tt02-davidsiaw-stackcalc/blob/38c5647f83aad2aec675d566aa3d67b98f0aac81/info.yaml
documentation:
author: "Marno van der Maas"
title: "Number Factorizer"
language: "Verilog"
description: "Takes the input and computes its factors"
# Longer description of how the project works. You can use standard markdown format.
how_it_works: |
This design uses a set of registers to compute the modulo of all factors up to 19 in one or two steps.
The modulus of non-trivial numbers is calculated using the following trick:
```
n % k = (
(2^0 % k) * n[0] +
(2^1 % k) * n[1] +
... +
(2^6 % k) * n[6] +
(2^7 % k) * n[7]
) % k
= big_sum % k
```
The values of `2^x % k` can be computed ahead of time and are hardcoded in the design.
Also we don't actually care about the modulus but rather about when the modulus is equal to zero, because that means that `k` is a factor.
Since the final result of `big_sum` is guaranteed to be less than or equal to `(k - 1) * 8`, we can exhaustively list all the values for which the modulus is zero by:
```
(n % k == 0) = (
big_sum == (k * 0) ||
big_sum == (k * 1) ||
big_sum == (k * 2) ||
... ||
big_sum == (k * m)
)
```
Where `m` is the largest integer for which `k * m <= (k - 1) * 8`.
Factors between 0x1 (decimal 1) and 0xF (decimal 15) are shown in a loop on the seven segment display with a one second delay between each factor.
This design uses some combinatorial logic to convert from binary to hexadecimal for the seven segment display.
The second delay is achieved by a clock divider logic.
The output pins show the prime factors of the input number.
If the input is zero, the output is set to the bottom 8 bits of the counter for debugging purposes.
# Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
how_to_test: |
After reset and input set to 0, the counter on the seven segment display should increase by one every second with a 10 MHz input clock from `0x1` to `0xF`.
The outputs are the lower bits of the internal counter that increases every cycle.
The dot on the seven segment display should be off.
For inputs other than 0, the seven segment display shows the factors one by one, cycling back at the end.
The factor 1 is displayed for all inputs and only factors up to 15 are shown.
For example for 6, the factors 1, 2, 3 and 6 will be shown on the display.
For 7, the factors 1 and 7 will be shown on the display.
For 23, only the factor 1 will be show on the display.
It will also use the output pins to indicate the prime factors, where the least significant bit represents 2 and the most significant bit represents 19.
For example for 6, only 2 and 3 are set to 1.
For 7, only 7 is set to 1.
For 23, all the outputs are zero.
The dot on the seven segment display is only on when the input number is prime.
Hexadecimals are displayed using the [decimal configurations (without modifications)](https://en.wikipedia.org/wiki/Seven-segment_display#Decimal).
And then the hexadecimal values specified [here](https://en.wikipedia.org/wiki/Seven-segment_display#Hexadecimal).
Please reset the design before giving your input.
Also, you can have a look at the [testbench](https://github.com/marnovandermaas/tiny-factorizer/blob/main/src/test.py) for more thorough testing.
# A description of what the inputs do (e.g. red button, SPI CLK, SPI MOSI, etc).
inputs:
- Fist bit of number to factor
- Second bit of number to factor
- Third bit of number to factor
- Fourth bit of number to factor
- Fifth bit of number to factor
- Sixth bit of number to factor
- Seventh bit of number to factor
- Eigth bit of number to factor
# A description of what the outputs do (e.g. status LED, SPI MISO, etc)
outputs:
- Segment a (hex)
- Segment b (hex)
- Segment c (hex)
- Segment d (hex)
- Segment e (hex)
- Segment f (hex)
- Segment g (hex)
- Segment dot (is prime)
# A description of what the bidirectional I/O pins do (e.g. I2C SDA, I2C SCL, etc)
bidirectional:
- Is 2 a factor?
- Is 3 a factor?
- Is 5 a factor?
- Is 7 a factor?
- Is 11 a factor?
- Is 13 a factor?
- Is 17 a factor?
- Is 19 a factor?
# The following fields are optional
tag: "alu, calculator, hexadecimal, math, prime, timer" # Comma separated list of tags: test, encryption, experiment, clock, animation, utility, industrial, pwm, fpga, alu, microprocessor, risc, riscv, sensor, signal generator, fft, filter, music, bcd, sound, serial, timer, random number generator, calculator, decoder, counter, puzzle, multiplier, game, oscillator
external_hw: "seven-segment display" # Describe any external hardware needed
discord: "" # Your discord handle, used for communication and automatically assigning tapeout role after a submission
doc_link: "" # URL to longer form documentation, e.g. the README.md in your repository
clock_hz: 10000000 # Clock frequency in Hz (if required)
picture: "" # Relative path to a picture in your repository