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Assertion '1 == driver_switches.size() #1710

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kpatinos-intel opened this issue Jun 12, 2024 · 1 comment
Open

Assertion '1 == driver_switches.size() #1710

kpatinos-intel opened this issue Jun 12, 2024 · 1 comment

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@kpatinos-intel
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Hello! I am using the latest version in master branch, and I am defining a new architecture. Now I am facing an Assertion Error I don't know how to tackle. It is hard to check what I am doing wrong in the arch definition or if it is a problem in the framework (less likely).

Backannotated 25 General Switch Blocks (GSBs).

Build General Switch Block(GSB) annotation on top of routing resource graph took 0.00 seconds (max_rss 60.5 MiB, delta_rss +0.0 MiB)

Sort incoming edges for each routing track output node of General Switch Block(GSB)

Start sorting edges for GSBs up to [5][5]
[4%] Sorted incoming edges for each routing track output node of GSB[0][0]
[8%] Sorted incoming edges for each routing track output node of GSB[0][1]
[12%] Sorted incoming edges for each routing track output node of GSB[0][2]
[16%] Sorted incoming edges for each routing track output node of GSB[0][3]
[20%] Sorted incoming edges for each routing track output node of GSB[0][4]
[24%] Sorted incoming edges for each routing track output node of GSB[1][0]
[28%] Sorted incoming edges for each routing track output node of GSB[1][1]
[32%] Sorted incoming edges for each routing track output node of GSB[1][2]
[36%] Sorted incoming edges for each routing track output node of GSB[1][3]
[40%] Sorted incoming edges for each routing track output node of GSB[1][4]
[44%] Sorted incoming edges for each routing track output node of GSB[2][0]
[48%] Sorted incoming edges for each routing track output node of GSB[2][1]
[52%] Sorted incoming edges for each routing track output node of GSB[2][2]
[56%] Sorted incoming edges for each routing track output node of GSB[2][3]
[60%] Sorted incoming edges for each routing track output node of GSB[2][4]
[64%] Sorted incoming edges for each routing track output node/home/kpatinos/Intel/OpenFPGA/openfpga/src/mux_lib/mux_library_builder.cpp:52 build_routing_arch_mux_library: Assertion '1 == driver_switches.size()' failed.

So if you could provide any insight what could be wrong or how to solve this issue I will apreciatte.

Thanks Kevin

@tangxifan
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@kpatinos-intel It could be some routing tracks or inputs of your programmable blocks have no drivers. Or you defined different types of switches that drive a routing track or inputs of your programmable blocks

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