[FIRRTL] Allow non-public modules to dedup with public modules

[seldridge]

The FIRRTL spec allows for an amount of wiggle room on what can be done with deduplication and public modules. Currently, we don't do something as aggressive as we could. Consider the following:

FIRRTL version 4.0.0
circuit Foo:
  module A:
  module B:
  module C:
  public module D:
  public module Foo:
    inst a of A
    inst b of B
    inst c of C
    inst d of D

Currently, only modules A, B, and C dedup. However, it is legal to have these dedup with D.

Modify the dedup pass to dedup A, B, and C into D. In the final Verilog, there should only be two modules.

You can make a call and do anything legal if there are multiple possible dedup targets. E.g., if there is public module D and public module E. This should incorporate the must dedup annotations to do what they say.