From b48037e98c57d3bfbac71604ac3002ed34f781c1 Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Mon, 9 Sep 2024 19:05:40 +0300 Subject: [PATCH] platform: intel: ace: remove redundant definitions from memory.h Platforms that can only be built with Zephyr, can directly use Zephyr cached/uncached functions in memory.h. It turns out the SRAM address and size definitions were only needed for these duplicate cache operations, so they can be removed as well. Signed-off-by: Kai Vehmanen --- .../intel/ace/include/ace/lib/memory.h | 27 +++---------------- 1 file changed, 4 insertions(+), 23 deletions(-) diff --git a/src/platform/intel/ace/include/ace/lib/memory.h b/src/platform/intel/ace/include/ace/lib/memory.h index 1ab8cc2de9e0..f86b8e6b99d6 100644 --- a/src/platform/intel/ace/include/ace/lib/memory.h +++ b/src/platform/intel/ace/include/ace/lib/memory.h @@ -34,30 +34,11 @@ #define PLATFORM_LPSRAM_EBB_COUNT (DT_REG_SIZE(DT_NODELABEL(sram1)) / SRAM_BANK_SIZE) #define PLATFORM_HPSRAM_EBB_COUNT (DT_REG_SIZE(DT_NODELABEL(sram0)) / SRAM_BANK_SIZE) -#define SRAM_CACHED_BASE 0xA0000000 -#define SRAM_BASE 0x40000000 -#define SRAM_ALIAS_MASK 0xF0000000 -#define SRAM_ALIAS_OFFSET 0x60000000 +#include -#if !defined UNIT_TEST -static inline void __sparse_cache *uncache_to_cache(void *address) -{ - return (void __sparse_cache *)(((uintptr_t)(address) & ~SRAM_ALIAS_MASK) | - SRAM_CACHED_BASE); -} - -static inline void *cache_to_uncache(void __sparse_cache *address) -{ - return (void *)(((uintptr_t)(address) & ~SRAM_ALIAS_MASK) | SRAM_BASE); -} - -#define is_uncached(address) \ - (((uint32_t)(address) & SRAM_ALIAS_MASK) == SRAM_BASE) -#else -#define uncache_to_cache(address) address -#define cache_to_uncache(address) address -#define is_uncached(address) 0 -#endif +#define uncache_to_cache(address) sys_cache_cached_ptr_get(address) +#define cache_to_uncache(address) sys_cache_uncached_ptr_get(address) +#define is_uncached(address) sys_cache_is_ptr_cached(address) /** * \brief Returns pointer to the memory shared by multiple cores.