So, I heard we cover all things SIMD ???

[jfalcou]

@SadiinsoSnowfall made a nice script that scrub Intel and ARM intrinsic doc and sort/remove duplicates from them. The list is then matched against the intrinsic we use in EVE code. By looking at intrinsics with 0 hit, we can make a lsit of stuff we don't use.

THe idea of this discussion is to have a post per arch where we can discuss if the non used intrinsic are something we should have either as a new function, a new decorator or an optimisation or if they are useless. The following lists were cleaned up of non sensical operations we don't ever support or make no sense for SIMD.

Please try to keep discussion to each sub-arch :)

[jfalcou]

X86 - SSE2

Name	Description
_mm_stream_ps	Store 128-bits (composed of 4 packed single-precision (32-bit) floating-point elements) from "a" into memory using a non-temporal memory hint.
_mm_maskmoveu_si128	Conditionally store 8-bit integer elements from "a" into memory using "mask" (elements are not stored when the highest bit is not set in the corresponding element) and a non-temporal memory hint.
_mm_stream_si128	Store 128-bits of integer data from "a" into memory using a non-temporal memory hint.  "mem_addr" must be aligned on a 16-byte boundary or a general-protection exception may be generated.
_mm_stream_pd	Store 128-bits (composed of 2 packed double-precision (64-bit) floating-point elements) from "a" into memory using a non-temporal memory hint.

[jfalcou]

• Removed sll and slr for having worse latency than the one we use
• Removed the rounding convert as they have no use
• Removed improper 16 bits mul

[jfalcou]

X86 - SSE3

Name	Description
_mm_lddqu_si128	Load 128-bits of integer data from unaligned memory into "dst". This intrinsic may perform better than "_mm_loadu_si128" when the data crosses a cache line boundary.

[jfalcou]

• Removed addsub so people don't use to weite bad complex

[jfalcou]

X86 - SSE4.1

Name	Description
_mm_stream_load_si128	Load 128-bits of integer data from memory into "dst" using a non-temporal memory hint. "mem_addr" must be aligned on a 16-byte boundary or a general-protection exception may be generated.
_mm_packus_epi32	Convert packed signed 32-bit integers from "a" and "b" to packed 16-bit integers using unsigned saturation, and store the results in "dst".
_mm_blend_epi16	Blend packed 16-bit integers from "a" and "b" using control mask "imm8", and store the results in "dst".
_mm_insert_ps	Copy "a" to "tmp", then insert a single-precision (32-bit) floating-point element from "b" into "tmp" using the control in "imm8". Store "tmp" to "dst" using the mask in "imm8" (elements are zeroed out when the corresponding bit is set).

[jfalcou]

• Removed test* as they promote bad AoS code
• Removed mm_mul_epi32 as it is in fact a partial 64 bits multiplication

[jfalcou]

X86 - AVX

Name	Description
_mm256_lddqu_si256	Load 256-bits of integer data from unaligned memory into "dst". This intrinsic may perform better than "_mm256_loadu_si256" when the data crosses a cache line boundary.
_mm256_loadu2_m128	Load two 128-bit values (composed of 4 packed single-precision (32-bit) floating-point elements) from memory, and combine them into a 256-bit value in "dst". "hiaddr" and "loaddr" do not need to be aligned on any particular boundary.
_mm256_loadu2_m128d	Load two 128-bit values (composed of 2 packed double-precision (64-bit) floating-point elements) from memory, and combine them into a 256-bit value in "dst". "hiaddr" and "loaddr" do not need to be aligned on any particular boundary.
_mm256_loadu2_m128i	Load two 128-bit values (composed of integer data) from memory, and combine them into a 256-bit value in "dst". "hiaddr" and "loaddr" do not need to be aligned on any particular boundary.
_mm256_movehdup_ps	Duplicate odd-indexed single-precision (32-bit) floating-point elements from "a", and store the results in "dst".
_mm256_moveldup_ps	Duplicate even-indexed single-precision (32-bit) floating-point elements from "a", and store the results in "dst".
_mm256_movedup_pd	Duplicate even-indexed double-precision (64-bit) floating-point elements from "a", and store the results in "dst".
_mm256_stream_si256	Store 256-bits of integer data from "a" into memory using a non-temporal memory hint. "mem_addr" must be aligned on a 32-byte boundary or a general-protection exception may be generated.
_mm256_stream_pd	Store 256-bits (composed of 4 packed double-precision (64-bit) floating-point elements) from "a" into memory using a non-temporal memory hint. "mem_addr" must be aligned on a 32-byte boundary or a general-protection exception may be generated.
_mm256_stream_ps	Store 256-bits (composed of 8 packed single-precision (32-bit) floating-point elements) from "a" into memory using a non-temporal memory hint. "mem_addr" must be aligned on a 32-byte boundary or a general-protection exception may be generated.
_mm256_storeu2_m128	Store the high and low 128-bit halves (each composed of 4 packed single-precision (32-bit) floating-point elements) from "a" into memory two different 128-bit locations. "hiaddr" and "loaddr" do not need to be aligned on any particular boundary.
_mm256_storeu2_m128d	Store the high and low 128-bit halves (each composed of 2 packed double-precision (64-bit) floating-point elements) from "a" into memory two different 128-bit locations. "hiaddr" and "loaddr" do not need to be aligned on any particular boundary.
_mm256_storeu2_m128i	Store the high and low 128-bit halves (each composed of integer data) from "a" into memory two different 128-bit locations. "hiaddr" and "loaddr" do not need to be aligned on any particular boundary.
_mm256_extract_epi32	Extract a 32-bit integer from "a", selected with "index", and store the result in "dst".
_mm256_extract_epi64	Extract a 64-bit integer from "a", selected with "index", and store the result in "dst".
_mm_permutevar_ps	Shuffle single-precision (32-bit) floating-point elements in "a" using the control in "b", and store the results in "dst".
_mm_permute_ps	Shuffle single-precision (32-bit) floating-point elements in "a" using the control in "imm8", and store the results in "dst".
_mm_permutevar_pd	Shuffle double-precision (64-bit) floating-point elements in "a" using the control in "b", and store the results in "dst".
_mm_permute_pd	Shuffle double-precision (64-bit) floating-point elements in "a" using the control in "imm8", and store the results in "dst".
_mm256_insert_epi8	Copy "a" to "dst", and insert the 8-bit integer "i" into "dst" at the location specified by "index".
_mm256_insert_epi16	Copy "a" to "dst", and insert the 16-bit integer "i" into "dst" at the location specified by "index".
_mm256_insert_epi32	Copy "a" to "dst", and insert the 32-bit integer "i" into "dst" at the location specified by "index".
_mm256_insert_epi64	Copy "a" to "dst", and insert the 64-bit integer "i" into "dst" at the location specified by "index".
_mm256_unpackhi_ps	Unpack and interleave single-precision (32-bit) floating-point elements from the high half of each 128-bit lane in "a" and "b", and store the results in "dst".
_mm256_unpacklo_ps	Unpack and interleave single-precision (32-bit) floating-point elements from the low half of each 128-bit lane in "a" and "b", and store the results in "dst".
_mm256_broadcast_ps	Broadcast 128 bits from memory (composed of 4 packed single-precision (32-bit) floating-point elements) to all elements of "dst".
_mm256_broadcast_pd	Broadcast 128 bits from memory (composed of 2 packed double-precision (64-bit) floating-point elements) to all elements of "dst".

[jfalcou]

• Removed test* for bad practice

[jfalcou]

X86 - AVX2

Name	Description
_mm256_madd_epi16	Multiply packed signed 16-bit integers in "a" and "b", producing intermediate signed 32-bit integers. Horizontally add adjacent pairs of intermediate 32-bit integers, and pack the results in "dst".
_mm256_maddubs_epi16	Vertically multiply each unsigned 8-bit integer from "a" with the corresponding signed 8-bit integer from "b", producing intermediate signed 16-bit integers. Horizontally add adjacent pairs of intermediate signed 16-bit integers, and pack the saturated results in "dst".
_mm_i32gather_pd	Gather double-precision (64-bit) floating-point elements from memory using 32-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i32gather_pd	Gather double-precision (64-bit) floating-point elements from memory using 32-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i32gather_ps	Gather single-precision (32-bit) floating-point elements from memory using 32-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i32gather_ps	Gather single-precision (32-bit) floating-point elements from memory using 32-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i32gather_epi32	Gather 32-bit integers from memory using 32-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i32gather_epi32	Gather 32-bit integers from memory using 32-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i32gather_epi64	Gather 64-bit integers from memory using 32-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i32gather_epi64	Gather 64-bit integers from memory using 32-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 32-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i64gather_pd	Gather double-precision (64-bit) floating-point elements from memory using 64-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i64gather_pd	Gather double-precision (64-bit) floating-point elements from memory using 64-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i64gather_ps	Gather single-precision (32-bit) floating-point elements from memory using 64-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i64gather_ps	Gather single-precision (32-bit) floating-point elements from memory using 64-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i64gather_epi32	Gather 32-bit integers from memory using 64-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i64gather_epi32	Gather 32-bit integers from memory using 64-bit indices. 32-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm_i64gather_epi64	Gather 64-bit integers from memory using 64-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_i64gather_epi64	Gather 64-bit integers from memory using 64-bit indices. 64-bit elements are loaded from addresses starting at "base_addr" and offset by each 64-bit element in "vindex" (each index is scaled by the factor in "scale"). Gathered elements are merged into "dst". "scale" should be 1, 2, 4 or 8.
_mm256_stream_load_si256	Load 256-bits of integer data from memory into "dst" using a non-temporal memory hint. "mem_addr" must be aligned on a 32-byte boundary or a general-protection exception may be generated.
_mm256_slli_si256	Shift 128-bit lanes in "a" left by "imm8" bytes while shifting in zeros, and store the results in "dst".
_mm256_sll_epi16	Shift packed 16-bit integers in "a" left by "count" while shifting in zeros, and store the results in "dst".
_mm256_sll_epi32	Shift packed 32-bit integers in "a" left by "count" while shifting in zeros, and store the results in "dst".
_mm256_sll_epi64	Shift packed 64-bit integers in "a" left by "count" while shifting in zeros, and store the results in "dst".
_mm_sllv_epi32	Shift packed 32-bit integers in "a" left by the amount specified by the corresponding element in "count" while shifting in zeros, and store the results in "dst".
_mm_sllv_epi64	Shift packed 64-bit integers in "a" left by the amount specified by the corresponding element in "count" while shifting in zeros, and store the results in "dst".
_mm256_sra_epi16	Shift packed 16-bit integers in "a" right by "count" while shifting in sign bits, and store the results in "dst".
_mm256_sra_epi32	Shift packed 32-bit integers in "a" right by "count" while shifting in sign bits, and store the results in "dst".
_mm256_srli_si256	Shift 128-bit lanes in "a" right by "imm8" bytes while shifting in zeros, and store the results in "dst".
_mm256_srl_epi16	Shift packed 16-bit integers in "a" right by "count" while shifting in zeros, and store the results in "dst".
_mm256_srl_epi32	Shift packed 32-bit integers in "a" right by "count" while shifting in zeros, and store the results in "dst".
_mm256_srl_epi64	Shift packed 64-bit integers in "a" right by "count" while shifting in zeros, and store the results in "dst".
_mm256_extract_epi8	Extract an 8-bit integer from "a", selected with "index", and store the result in "dst".
_mm256_extract_epi16	Extract a 16-bit integer from "a", selected with "index", and store the result in "dst".
_mm256_blend_epi16	Blend packed 16-bit integers from "a" and "b" within 128-bit lanes using control mask "imm8", and store the results in "dst".
_mm_blend_epi32	Blend packed 32-bit integers from "a" and "b" using control mask "imm8", and store the results in "dst".
_mm256_blend_epi32	Blend packed 32-bit integers from "a" and "b" using control mask "imm8", and store the results in "dst".
_mm_broadcastb_epi8	Broadcast the low packed 8-bit integer from "a" to all elements of "dst".
_mm256_broadcastb_epi8	Broadcast the low packed 8-bit integer from "a" to all elements of "dst".
_mm_broadcastd_epi32	Broadcast the low packed 32-bit integer from "a" to all elements of "dst".
_mm256_broadcastd_epi32	Broadcast the low packed 32-bit integer from "a" to all elements of "dst".
_mm_broadcastq_epi64	Broadcast the low packed 64-bit integer from "a" to all elements of "dst".
_mm256_broadcastq_epi64	Broadcast the low packed 64-bit integer from "a" to all elements of "dst".
_mm_broadcastsd_pd	Broadcast the low double-precision (64-bit) floating-point element from "a" to all elements of "dst".
_mm256_broadcastsd_pd	Broadcast the low double-precision (64-bit) floating-point element from "a" to all elements of "dst".
_mm_broadcastsi128_si256	Broadcast 128 bits of integer data from "a" to all 128-bit lanes in "dst".
_mm256_broadcastsi128_si256	Broadcast 128 bits of integer data from "a" to all 128-bit lanes in "dst".
_mm_broadcastss_ps	Broadcast the low single-precision (32-bit) floating-point element from "a" to all elements of "dst".
_mm256_broadcastss_ps	Broadcast the low single-precision (32-bit) floating-point element from "a" to all elements of "dst".
_mm_broadcastw_epi16	Broadcast the low packed 16-bit integer from "a" to all elements of "dst".
_mm256_broadcastw_epi16	Broadcast the low packed 16-bit integer from "a" to all elements of "dst".
_mm256_extracti128_si256	Extract 128 bits (composed of integer data) from "a", selected with "imm8", and store the result in "dst".
_mm256_inserti128_si256	Copy "a" to "dst", then insert 128 bits (composed of integer data) from "b" into "dst" at the location specified by "imm8".
_mm256_unpackhi_epi32	Unpack and interleave 32-bit integers from the high half of each 128-bit lane in "a" and "b", and store the results in "dst".
_mm256_unpackhi_epi64	Unpack and interleave 64-bit integers from the high half of each 128-bit lane in "a" and "b", and store the results in "dst".
_mm256_unpacklo_epi32	Unpack and interleave 32-bit integers from the low half of each 128-bit lane in "a" and "b", and store the results in "dst".
_mm256_unpacklo_epi64	Unpack and interleave 64-bit integers from the low half of each 128-bit lane in "a" and "b", and store the results in "dst".

[SadiinsoSnowfall]

x86 AVX512 - Foundation (F, CD, VL, DQ, BW)

Descriptions omitted for brevity.

Name	Name	Name
❌ _kortest_mask16_u8	❌ _mm256_mask_cvtpd_epi32	✅ _mm_mask_ror_epi64
❌ _kortest_mask32_u8	❌ _mm512_mask_cvtpd_epi32	✅ _mm256_mask_ror_epi64
❌ _kortest_mask64_u8	❌ _mm_mask_cvtpd_epi64	✅ _mm512_mask_ror_epi64
❌ _kortest_mask8_u8	❌ _mm256_mask_cvtpd_epi64	✅ _mm_mask_rorv_epi32
❌ _kortestc_mask16_u8	❌ _mm512_mask_cvtpd_epi64	✅ _mm256_mask_rorv_epi32
❌ _kortestc_mask32_u8	❌ _mm_mask_cvtpd_epu32	✅ _mm512_mask_rorv_epi32
❌ _kortestc_mask64_u8	❌ _mm256_mask_cvtpd_epu32	✅ _mm_mask_rorv_epi64
❌ _kortestc_mask8_u8	❌ _mm512_mask_cvtpd_epu32	✅ _mm256_mask_rorv_epi64
❌ _kortestz_mask16_u8	❌ _mm_mask_cvtpd_epu64	✅ _mm512_mask_rorv_epi64
❌ _kortestz_mask32_u8	❌ _mm256_mask_cvtpd_epu64	❌ _mm512_mask_roundscale_round_pd
❌ _kortestz_mask64_u8	❌ _mm512_mask_cvtpd_epu64	❌ _mm512_mask_roundscale_round_ps
❌ _kortestz_mask8_u8	❌ _mm_mask_cvtpd_ps	❌ _mm_mask_rsqrt14_ps
❌ _ktest_mask16_u8	❌ _mm256_mask_cvtpd_ps	❌ _mm256_mask_rsqrt14_ps
❌ _ktest_mask32_u8	❌ _mm512_mask_cvtpd_ps	❌ _mm512_mask_rsqrt14_ps
❌ _ktest_mask64_u8	❌ _mm512_mask_cvtpd_pslo	❌ _mm512_mask_scalef_round_pd
❌ _ktest_mask8_u8	❌ _mm_mask_cvtph_ps	❌ _mm512_mask_scalef_round_ps
❌ _ktestc_mask16_u8	❌ _mm256_mask_cvtph_ps	❌ _mm_mask_set1_epi32
❌ _ktestc_mask32_u8	❌ _mm512_mask_cvtph_ps	❌ _mm256_mask_set1_epi32
❌ _ktestc_mask64_u8	❌ _mm_mask_cvtps_epi32	❌ _mm512_mask_set1_epi32
❌ _ktestc_mask8_u8	❌ _mm256_mask_cvtps_epi32	❌ _mm_mask_set1_epi64
❌ _ktestz_mask16_u8	❌ _mm512_mask_cvtps_epi32	❌ _mm256_mask_set1_epi64
❌ _ktestz_mask32_u8	❌ _mm_mask_cvtps_epi64	❌ _mm512_mask_set1_epi64
❌ _ktestz_mask64_u8	❌ _mm256_mask_cvtps_epi64	❌ _mm_mask_shuffle_epi32
❌ _ktestz_mask8_u8	❌ _mm512_mask_cvtps_epi64	❌ _mm256_mask_shuffle_epi32
❌ _mm_abs_epi64	❌ _mm_mask_cvtps_epu32	❌ _mm512_mask_shuffle_epi32
❌ _mm256_abs_epi64	❌ _mm256_mask_cvtps_epu32	❌ _mm_mask_shuffle_epi8
❌ _mm512_add_round_pd	❌ _mm512_mask_cvtps_epu32	❌ _mm256_mask_shuffle_epi8
❌ _mm512_add_round_ps	❌ _mm_mask_cvtps_epu64	❌ _mm512_mask_shuffle_epi8
❌ _mm_alignr_epi32	❌ _mm256_mask_cvtps_epu64	❌ _mm256_mask_shuffle_f32x4
❌ _mm_alignr_epi64	❌ _mm512_mask_cvtps_epu64	❌ _mm512_mask_shuffle_f32x4
❌ _mm512_and_epi32	❌ _mm512_mask_cvtps_pd	❌ _mm256_mask_shuffle_f64x2
❌ _mm512_and_epi64	❌ _mm_mask_cvtps_ph	❌ _mm512_mask_shuffle_f64x2
❌ _mm256_broadcast_f32x4	❌ _mm256_mask_cvtps_ph	❌ _mm256_mask_shuffle_i32x4
❌ _mm256_broadcast_i32x4	❌ _mm512_mask_cvtps_ph	❌ _mm512_mask_shuffle_i32x4
❌ _mm256_cmp_epi16_mask	❌ _mm512_mask_cvtpslo_pd	❌ _mm256_mask_shuffle_i64x2
❌ _mm512_cmp_epi16_mask	❌ _mm_mask_cvtsepi16_epi8	❌ _mm512_mask_shuffle_i64x2
❌ _mm256_cmp_epi8_mask	❌ _mm256_mask_cvtsepi16_epi8	❌ _mm_mask_shuffle_pd
❌ _mm512_cmp_epi8_mask	❌ _mm512_mask_cvtsepi16_epi8	❌ _mm256_mask_shuffle_pd
❌ _mm256_cmp_epu16_mask	❌ _mm_mask_cvtsepi16_storeu_epi8	❌ _mm512_mask_shuffle_pd
❌ _mm512_cmp_epu16_mask	❌ _mm256_mask_cvtsepi16_storeu_epi8	❌ _mm_mask_shuffle_ps
❌ _mm256_cmp_epu8_mask	❌ _mm_mask_cvtsepi32_epi16	❌ _mm256_mask_shuffle_ps
❌ _mm512_cmp_epu8_mask	❌ _mm256_mask_cvtsepi32_epi16	❌ _mm512_mask_shuffle_ps
❌ _mm512_cvt_roundepi32_ps	❌ _mm512_mask_cvtsepi32_epi16	❌ _mm_mask_shufflehi_epi16
❌ _mm512_cvt_roundepi64_pd	❌ _mm_mask_cvtsepi32_epi8	❌ _mm256_mask_shufflehi_epi16
❌ _mm512_cvt_roundepi64_ps	❌ _mm256_mask_cvtsepi32_epi8	❌ _mm512_mask_shufflehi_epi16
❌ _mm512_cvt_roundepu32_ps	❌ _mm512_mask_cvtsepi32_epi8	❌ _mm_mask_shufflelo_epi16
❌ _mm512_cvt_roundepu64_pd	❌ _mm_mask_cvtsepi32_storeu_epi16	❌ _mm256_mask_shufflelo_epi16
❌ _mm512_cvt_roundepu64_ps	❌ _mm256_mask_cvtsepi32_storeu_epi16	❌ _mm512_mask_shufflelo_epi16
❌ _mm512_cvt_roundpd_epi32	❌ _mm512_mask_cvtsepi32_storeu_epi16	🗑 _mm_mask_sll_epi16
❌ _mm512_cvt_roundpd_epi64	❌ _mm_mask_cvtsepi32_storeu_epi8	🗑 _mm256_mask_sll_epi16
❌ _mm512_cvt_roundpd_epu32	❌ _mm256_mask_cvtsepi32_storeu_epi8	🗑 _mm512_mask_sll_epi16
❌ _mm512_cvt_roundpd_epu64	❌ _mm512_mask_cvtsepi32_storeu_epi8	🗑 _mm_mask_sll_epi32
❌ _mm512_cvt_roundpd_ps	❌ _mm_mask_cvtsepi64_epi16	🗑 _mm256_mask_sll_epi32
❌ _mm512_cvt_roundph_ps	❌ _mm256_mask_cvtsepi64_epi16	🗑 _mm512_mask_sll_epi32
❌ _mm512_cvt_roundps_epi32	❌ _mm512_mask_cvtsepi64_epi16	🗑 _mm_mask_sll_epi64
❌ _mm512_cvt_roundps_epi64	❌ _mm_mask_cvtsepi64_epi32	🗑 _mm256_mask_sll_epi64
❌ _mm512_cvt_roundps_epu32	❌ _mm256_mask_cvtsepi64_epi32	🗑 _mm512_mask_sll_epi64
❌ _mm512_cvt_roundps_epu64	❌ _mm512_mask_cvtsepi64_epi32	✅ _mm_mask_slli_epi16
❌ _mm512_cvt_roundps_pd	❌ _mm_mask_cvtsepi64_epi8	✅ _mm256_mask_slli_epi16
❌ _mm512_cvt_roundps_ph	❌ _mm256_mask_cvtsepi64_epi8	✅ _mm512_mask_slli_epi16
❌ _mm512_cvtepi32_pd	❌ _mm512_mask_cvtsepi64_epi8	✅ _mm_mask_slli_epi32
❌ _mm512_cvtepi32lo_pd	❌ _mm_mask_cvtsepi64_storeu_epi16	✅ _mm256_mask_slli_epi32
❌ _mm512_cvtepi8_epi16	❌ _mm256_mask_cvtsepi64_storeu_epi16	✅ _mm512_mask_slli_epi32
❌ _mm_cvtepu32_pd	❌ _mm512_mask_cvtsepi64_storeu_epi16	✅ _mm_mask_slli_epi64
❌ _mm512_cvtepu32lo_pd	❌ _mm_mask_cvtsepi64_storeu_epi32	✅ _mm256_mask_slli_epi64
❌ _mm512_cvtepu8_epi16	❌ _mm256_mask_cvtsepi64_storeu_epi32	✅ _mm512_mask_slli_epi64
❌ _mm512_cvtpd_epi32	❌ _mm512_mask_cvtsepi64_storeu_epi32	✅ _mm_mask_sllv_epi16
❌ _mm_cvtpd_epi64	❌ _mm_mask_cvtsepi64_storeu_epi8	✅ _mm256_mask_sllv_epi16
❌ _mm256_cvtpd_epi64	❌ _mm256_mask_cvtsepi64_storeu_epi8	✅ _mm512_mask_sllv_epi16
❌ _mm512_cvtpd_epi64	❌ _mm512_mask_cvtsepi64_storeu_epi8	✅ _mm_mask_sllv_epi32
❌ _mm_cvtpd_epu32	❌ _mm512_mask_cvtt_roundpd_epi32	✅ _mm256_mask_sllv_epi32
❌ _mm256_cvtpd_epu32	❌ _mm512_mask_cvtt_roundpd_epi64	✅ _mm512_mask_sllv_epi32
❌ _mm512_cvtpd_epu32	❌ _mm512_mask_cvtt_roundpd_epu32	✅ _mm_mask_sllv_epi64
❌ _mm_cvtpd_epu64	❌ _mm512_mask_cvtt_roundpd_epu64	✅ _mm256_mask_sllv_epi64
❌ _mm256_cvtpd_epu64	❌ _mm512_mask_cvtt_roundps_epi32	✅ _mm512_mask_sllv_epi64
❌ _mm512_cvtpd_epu64	❌ _mm512_mask_cvtt_roundps_epi64	❌ _mm512_mask_sqrt_round_pd
❌ _mm512_cvtpd_pslo	❌ _mm512_mask_cvtt_roundps_epu32	❌ _mm512_mask_sqrt_round_ps
❌ _mm512_cvtph_ps	❌ _mm512_mask_cvtt_roundps_epu64	🗑 _mm_mask_sra_epi16
❌ _mm512_cvtps_epi32	❌ _mm_mask_cvttpd_epi32	🗑 _mm256_mask_sra_epi16
❌ _mm_cvtps_epi64	❌ _mm256_mask_cvttpd_epi32	🗑 _mm512_mask_sra_epi16
❌ _mm256_cvtps_epi64	❌ _mm512_mask_cvttpd_epi32	🗑 _mm_mask_sra_epi32
❌ _mm512_cvtps_epi64	❌ _mm_mask_cvttpd_epi64	🗑 _mm256_mask_sra_epi32
❌ _mm_cvtps_epu32	❌ _mm256_mask_cvttpd_epi64	🗑 _mm512_mask_sra_epi32
❌ _mm256_cvtps_epu32	❌ _mm512_mask_cvttpd_epi64	🗑 _mm_mask_sra_epi64
❌ _mm512_cvtps_epu32	❌ _mm_mask_cvttpd_epu32	🗑 _mm256_mask_sra_epi64
❌ _mm_cvtps_epu64	❌ _mm256_mask_cvttpd_epu32	🗑 _mm512_mask_sra_epi64
❌ _mm256_cvtps_epu64	❌ _mm512_mask_cvttpd_epu32	✅ _mm_mask_srai_epi16
❌ _mm512_cvtps_epu64	❌ _mm_mask_cvttpd_epu64	✅ _mm256_mask_srai_epi16
❌ _mm512_cvtps_ph	❌ _mm256_mask_cvttpd_epu64	✅ _mm512_mask_srai_epi16
❌ _mm512_cvtpslo_pd	❌ _mm512_mask_cvttpd_epu64	✅ _mm_mask_srai_epi32
❌ _mm_cvtsepi16_epi8	❌ _mm_mask_cvttps_epi32	✅ _mm256_mask_srai_epi32
❌ _mm256_cvtsepi16_epi8	❌ _mm256_mask_cvttps_epi32	✅ _mm512_mask_srai_epi32
❌ _mm512_cvtsepi16_epi8	❌ _mm512_mask_cvttps_epi32	✅ _mm_mask_srai_epi64
❌ _mm_cvtsepi32_epi16	❌ _mm_mask_cvttps_epi64	✅ _mm256_mask_srai_epi64
❌ _mm256_cvtsepi32_epi16	❌ _mm256_mask_cvttps_epi64	✅ _mm512_mask_srai_epi64
❌ _mm512_cvtsepi32_epi16	❌ _mm512_mask_cvttps_epi64	✅ _mm_mask_srav_epi16
❌ _mm_cvtsepi32_epi8	❌ _mm_mask_cvttps_epu32	✅ _mm256_mask_srav_epi16
❌ _mm256_cvtsepi32_epi8	❌ _mm256_mask_cvttps_epu32	✅ _mm512_mask_srav_epi16
❌ _mm512_cvtsepi32_epi8	❌ _mm512_mask_cvttps_epu32	✅ _mm_mask_srav_epi32
❌ _mm_cvtsepi64_epi16	❌ _mm_mask_cvttps_epu64	✅ _mm256_mask_srav_epi32
❌ _mm256_cvtsepi64_epi16	❌ _mm256_mask_cvttps_epu64	✅ _mm512_mask_srav_epi32
❌ _mm512_cvtsepi64_epi16	❌ _mm512_mask_cvttps_epu64	✅ _mm_mask_srav_epi64
❌ _mm_cvtsepi64_epi32	❌ _mm_mask_cvtusepi16_epi8	✅ _mm256_mask_srav_epi64
❌ _mm256_cvtsepi64_epi32	❌ _mm256_mask_cvtusepi16_epi8	✅ _mm512_mask_srav_epi64
❌ _mm512_cvtsepi64_epi32	❌ _mm512_mask_cvtusepi16_epi8	🗑 _mm_mask_srl_epi16
❌ _mm_cvtsepi64_epi8	❌ _mm_mask_cvtusepi16_storeu_epi8	🗑 _mm256_mask_srl_epi16
❌ _mm256_cvtsepi64_epi8	❌ _mm256_mask_cvtusepi16_storeu_epi8	🗑 _mm512_mask_srl_epi16
❌ _mm512_cvtsepi64_epi8	❌ _mm_mask_cvtusepi32_epi16	🗑 _mm_mask_srl_epi32
❌ _mm512_cvtt_roundpd_epi32	❌ _mm256_mask_cvtusepi32_epi16	🗑 _mm256_mask_srl_epi32
❌ _mm512_cvtt_roundpd_epi64	❌ _mm512_mask_cvtusepi32_epi16	🗑 _mm512_mask_srl_epi32
❌ _mm512_cvtt_roundpd_epu32	❌ _mm_mask_cvtusepi32_epi8	🗑 _mm_mask_srl_epi64
❌ _mm512_cvtt_roundpd_epu64	❌ _mm256_mask_cvtusepi32_epi8	🗑 _mm256_mask_srl_epi64
❌ _mm512_cvtt_roundps_epi32	❌ _mm512_mask_cvtusepi32_epi8	🗑 _mm512_mask_srl_epi64
❌ _mm512_cvtt_roundps_epi64	❌ _mm_mask_cvtusepi32_storeu_epi16	✅ _mm_mask_srli_epi16
❌ _mm512_cvtt_roundps_epu32	❌ _mm256_mask_cvtusepi32_storeu_epi16	✅ _mm256_mask_srli_epi16
❌ _mm512_cvtt_roundps_epu64	❌ _mm512_mask_cvtusepi32_storeu_epi16	✅ _mm512_mask_srli_epi16
❌ _mm256_cvttpd_epu32	❌ _mm_mask_cvtusepi32_storeu_epi8	✅ _mm_mask_srli_epi32
❌ _mm_cvtusepi16_epi8	❌ _mm256_mask_cvtusepi32_storeu_epi8	✅ _mm256_mask_srli_epi32
❌ _mm256_cvtusepi16_epi8	❌ _mm512_mask_cvtusepi32_storeu_epi8	✅ _mm512_mask_srli_epi32
❌ _mm512_cvtusepi16_epi8	❌ _mm_mask_cvtusepi64_epi16	✅ _mm_mask_srli_epi64
❌ _mm_cvtusepi32_epi16	❌ _mm256_mask_cvtusepi64_epi16	✅ _mm256_mask_srli_epi64
❌ _mm256_cvtusepi32_epi16	❌ _mm512_mask_cvtusepi64_epi16	✅ _mm512_mask_srli_epi64
❌ _mm512_cvtusepi32_epi16	❌ _mm_mask_cvtusepi64_epi32	✅ _mm_mask_srlv_epi16
❌ _mm_cvtusepi32_epi8	❌ _mm256_mask_cvtusepi64_epi32	✅ _mm256_mask_srlv_epi16
❌ _mm256_cvtusepi32_epi8	❌ _mm512_mask_cvtusepi64_epi32	✅ _mm512_mask_srlv_epi16
❌ _mm512_cvtusepi32_epi8	❌ _mm_mask_cvtusepi64_epi8	✅ _mm_mask_srlv_epi32
❌ _mm_cvtusepi64_epi16	❌ _mm256_mask_cvtusepi64_epi8	✅ _mm256_mask_srlv_epi32
❌ _mm256_cvtusepi64_epi16	❌ _mm512_mask_cvtusepi64_epi8	✅ _mm512_mask_srlv_epi32
❌ _mm512_cvtusepi64_epi16	❌ _mm_mask_cvtusepi64_storeu_epi16	✅ _mm_mask_srlv_epi64
❌ _mm_cvtusepi64_epi32	❌ _mm256_mask_cvtusepi64_storeu_epi16	✅ _mm256_mask_srlv_epi64
❌ _mm256_cvtusepi64_epi32	❌ _mm512_mask_cvtusepi64_storeu_epi16	✅ _mm512_mask_srlv_epi64
❌ _mm512_cvtusepi64_epi32	❌ _mm_mask_cvtusepi64_storeu_epi32	❌ _mm512_mask_sub_round_pd
❌ _mm_cvtusepi64_epi8	❌ _mm256_mask_cvtusepi64_storeu_epi32	❌ _mm512_mask_sub_round_ps
❌ _mm256_cvtusepi64_epi8	❌ _mm512_mask_cvtusepi64_storeu_epi32	❌ _mm_mask_ternarylogic_epi32
❌ _mm512_cvtusepi64_epi8	❌ _mm_mask_cvtusepi64_storeu_epi8	❌ _mm256_mask_ternarylogic_epi32
❌ _mm512_div_round_pd	❌ _mm256_mask_cvtusepi64_storeu_epi8	❌ _mm512_mask_ternarylogic_epi32
❌ _mm512_div_round_ps	❌ _mm512_mask_cvtusepi64_storeu_epi8	❌ _mm_mask_ternarylogic_epi64
❌ _mm_fixupimm_pd	❌ _mm512_mask_div_round_pd	❌ _mm256_mask_ternarylogic_epi64
❌ _mm256_fixupimm_pd	❌ _mm512_mask_div_round_ps	❌ _mm512_mask_ternarylogic_epi64
❌ _mm512_fixupimm_pd	❌ _mm_mask_expand_epi32	❌ _mm_mask_test_epi16_mask
❌ _mm_fixupimm_ps	❌ _mm256_mask_expand_epi32	❌ _mm256_mask_test_epi16_mask
❌ _mm256_fixupimm_ps	❌ _mm512_mask_expand_epi32	❌ _mm512_mask_test_epi16_mask
❌ _mm512_fixupimm_ps	❌ _mm_mask_expand_epi64	❌ _mm_mask_test_epi32_mask
❌ _mm512_fixupimm_round_pd	❌ _mm256_mask_expand_epi64	❌ _mm256_mask_test_epi32_mask
❌ _mm512_fixupimm_round_ps	❌ _mm512_mask_expand_epi64	❌ _mm512_mask_test_epi32_mask
❌ _mm512_fmadd_round_pd	❌ _mm_mask_expand_pd	❌ _mm_mask_test_epi64_mask
❌ _mm512_fmadd_round_ps	❌ _mm256_mask_expand_pd	❌ _mm256_mask_test_epi64_mask
🗑 _mm512_fmaddsub_pd	❌ _mm512_mask_expand_pd	❌ _mm512_mask_test_epi64_mask
🗑 _mm512_fmaddsub_ps	❌ _mm_mask_expand_ps	❌ _mm_mask_test_epi8_mask
🗑 _mm512_fmaddsub_round_pd	❌ _mm256_mask_expand_ps	❌ _mm256_mask_test_epi8_mask
🗑 _mm512_fmaddsub_round_ps	❌ _mm512_mask_expand_ps	❌ _mm512_mask_test_epi8_mask
❌ _mm512_fmsub_round_pd	❌ _mm_mask_expandloadu_epi32	❌ _mm_mask_testn_epi16_mask
❌ _mm512_fmsub_round_ps	❌ _mm256_mask_expandloadu_epi32	❌ _mm256_mask_testn_epi16_mask
🗑 _mm512_fmsubadd_pd	❌ _mm512_mask_expandloadu_epi32	❌ _mm512_mask_testn_epi16_mask
🗑 _mm512_fmsubadd_ps	❌ _mm_mask_expandloadu_epi64	❌ _mm_mask_testn_epi32_mask
🗑 _mm512_fmsubadd_round_pd	❌ _mm256_mask_expandloadu_epi64	❌ _mm256_mask_testn_epi32_mask
🗑 _mm512_fmsubadd_round_ps	❌ _mm512_mask_expandloadu_epi64	❌ _mm512_mask_testn_epi32_mask
❌ _mm512_fnmadd_round_pd	❌ _mm_mask_expandloadu_pd	❌ _mm_mask_testn_epi64_mask
❌ _mm512_fnmadd_round_ps	❌ _mm256_mask_expandloadu_pd	❌ _mm256_mask_testn_epi64_mask
❌ _mm512_fnmsub_round_pd	❌ _mm512_mask_expandloadu_pd	❌ _mm512_mask_testn_epi64_mask
❌ _mm512_fnmsub_round_ps	❌ _mm_mask_expandloadu_ps	❌ _mm_mask_testn_epi8_mask
❌ _mm_fpclass_pd_mask	❌ _mm256_mask_expandloadu_ps	❌ _mm256_mask_testn_epi8_mask
❌ _mm256_fpclass_pd_mask	❌ _mm512_mask_expandloadu_ps	❌ _mm512_mask_testn_epi8_mask
❌ _mm512_fpclass_pd_mask	❌ _mm_mask_fixupimm_pd	❌ _mm_mask_unpackhi_epi16
❌ _mm_fpclass_ps_mask	❌ _mm256_mask_fixupimm_pd	❌ _mm256_mask_unpackhi_epi16
❌ _mm256_fpclass_ps_mask	❌ _mm512_mask_fixupimm_pd	❌ _mm512_mask_unpackhi_epi16
❌ _mm512_fpclass_ps_mask	❌ _mm_mask_fixupimm_ps	❌ _mm_mask_unpackhi_epi32
❌ _mm512_getexp_round_pd	❌ _mm256_mask_fixupimm_ps	❌ _mm256_mask_unpackhi_epi32
❌ _mm512_getexp_round_ps	❌ _mm512_mask_fixupimm_ps	❌ _mm512_mask_unpackhi_epi32
❌ _mm_getmant_pd	❌ _mm512_mask_fixupimm_round_pd	❌ _mm_mask_unpackhi_epi64
❌ _mm256_getmant_pd	❌ _mm512_mask_fixupimm_round_ps	❌ _mm256_mask_unpackhi_epi64
❌ _mm512_getmant_pd	❌ _mm512_mask_fmadd_round_pd	❌ _mm512_mask_unpackhi_epi64
❌ _mm_getmant_ps	❌ _mm512_mask_fmadd_round_ps	❌ _mm_mask_unpackhi_epi8
❌ _mm256_getmant_ps	🗑 _mm_mask_fmaddsub_pd	❌ _mm256_mask_unpackhi_epi8
❌ _mm512_getmant_ps	🗑 _mm256_mask_fmaddsub_pd	❌ _mm512_mask_unpackhi_epi8
❌ _mm512_getmant_round_pd	🗑 _mm512_mask_fmaddsub_pd	❌ _mm_mask_unpackhi_pd
❌ _mm512_getmant_round_ps	🗑 _mm_mask_fmaddsub_ps	❌ _mm256_mask_unpackhi_pd
❌ _mm512_i32logather_epi64	🗑 _mm256_mask_fmaddsub_ps	❌ _mm512_mask_unpackhi_pd
❌ _mm512_i32logather_pd	🗑 _mm512_mask_fmaddsub_ps	❌ _mm_mask_unpackhi_ps
❌ _mm512_i32loscatter_epi64	🗑 _mm512_mask_fmaddsub_round_pd	❌ _mm256_mask_unpackhi_ps
❌ _mm512_i32loscatter_pd	🗑 _mm512_mask_fmaddsub_round_ps	❌ _mm512_mask_unpackhi_ps
❌ _mm512_int2mask	❌ _mm512_mask_fmsub_round_pd	❌ _mm_mask_unpacklo_epi16
❌ _mm512_kortestc	❌ _mm512_mask_fmsub_round_ps	❌ _mm256_mask_unpacklo_epi16
❌ _mm512_kortestz	🗑 _mm_mask_fmsubadd_pd	❌ _mm512_mask_unpacklo_epi16
❌ _mm512_loadu_epi16	🗑 _mm256_mask_fmsubadd_pd	❌ _mm_mask_unpacklo_epi32
❌ _mm512_loadu_epi8	🗑 _mm512_mask_fmsubadd_pd	❌ _mm256_mask_unpacklo_epi32
❌ _mm512_madd_epi16	🗑 _mm_mask_fmsubadd_ps	❌ _mm512_mask_unpacklo_epi32
❌ _mm512_maddubs_epi16	🗑 _mm256_mask_fmsubadd_ps	❌ _mm_mask_unpacklo_epi64
❌ _mm_mask2_permutex2var_epi16	🗑 _mm512_mask_fmsubadd_ps	❌ _mm256_mask_unpacklo_epi64
❌ _mm256_mask2_permutex2var_epi16	🗑 _mm512_mask_fmsubadd_round_pd	❌ _mm512_mask_unpacklo_epi64
❌ _mm512_mask2_permutex2var_epi16	🗑 _mm512_mask_fmsubadd_round_ps	❌ _mm_mask_unpacklo_epi8
❌ _mm_mask2_permutex2var_epi32	❌ _mm512_mask_fnmadd_round_pd	❌ _mm256_mask_unpacklo_epi8
❌ _mm256_mask2_permutex2var_epi32	❌ _mm512_mask_fnmadd_round_ps	❌ _mm512_mask_unpacklo_epi8
❌ _mm512_mask2_permutex2var_epi32	❌ _mm512_mask_fnmsub_round_pd	❌ _mm_mask_unpacklo_pd
❌ _mm_mask2_permutex2var_epi64	❌ _mm512_mask_fnmsub_round_ps	❌ _mm256_mask_unpacklo_pd
❌ _mm256_mask2_permutex2var_epi64	❌ _mm_mask_fpclass_pd_mask	❌ _mm512_mask_unpacklo_pd
❌ _mm512_mask2_permutex2var_epi64	❌ _mm256_mask_fpclass_pd_mask	❌ _mm_mask_unpacklo_ps
❌ _mm_mask2_permutex2var_pd	❌ _mm512_mask_fpclass_pd_mask	❌ _mm256_mask_unpacklo_ps
❌ _mm256_mask2_permutex2var_pd	❌ _mm_mask_fpclass_ps_mask	❌ _mm512_mask_unpacklo_ps
❌ _mm512_mask2_permutex2var_pd	❌ _mm256_mask_fpclass_ps_mask	❌ _mm_mask_xor_pd
❌ _mm_mask2_permutex2var_ps	❌ _mm512_mask_fpclass_ps_mask	❌ _mm256_mask_xor_pd
❌ _mm256_mask2_permutex2var_ps	❌ _mm512_mask_getexp_round_pd	❌ _mm_mask_xor_ps
❌ _mm512_mask2_permutex2var_ps	❌ _mm512_mask_getexp_round_ps	❌ _mm256_mask_xor_ps
❌ _mm512_mask2int	❌ _mm512_mask_getmant_round_pd	❌ _mm512_max_round_pd
❌ _mm_mask3_fmadd_pd	❌ _mm512_mask_getmant_round_ps	❌ _mm512_max_round_ps
❌ _mm_mask3_fmadd_ps	❌ _mm512_mask_i32logather_epi64	❌ _mm512_min_round_pd
❌ _mm512_mask3_fmadd_round_pd	❌ _mm512_mask_i32logather_pd	❌ _mm512_min_round_ps
❌ _mm512_mask3_fmadd_round_ps	❌ _mm512_mask_i32loscatter_epi64	❌ _mm512_movedup_pd
🗑 _mm_mask3_fmaddsub_pd	❌ _mm512_mask_i32loscatter_pd	❌ _mm512_movehdup_ps
🗑 _mm256_mask3_fmaddsub_pd	❌ _mm_mask_load_epi32	❌ _mm512_moveldup_ps
🗑 _mm512_mask3_fmaddsub_pd	❌ _mm_mask_load_epi64	❌ _mm_movm_epi16
🗑 _mm_mask3_fmaddsub_ps	❌ _mm_mask_load_pd	❌ _mm256_movm_epi16
🗑 _mm256_mask3_fmaddsub_ps	❌ _mm_mask_load_ps	❌ _mm512_movm_epi16
🗑 _mm512_mask3_fmaddsub_ps	❌ _mm_mask_madd_epi16	❌ _mm_movm_epi32
🗑 _mm512_mask3_fmaddsub_round_pd	❌ _mm256_mask_madd_epi16	❌ _mm256_movm_epi32
🗑 _mm512_mask3_fmaddsub_round_ps	❌ _mm512_mask_madd_epi16	❌ _mm512_movm_epi32
❌ _mm_mask3_fmsub_pd	❌ _mm256_mask_maddubs_epi16	❌ _mm_movm_epi64
❌ _mm_mask3_fmsub_ps	❌ _mm512_mask_maddubs_epi16	❌ _mm256_movm_epi64
❌ _mm512_mask3_fmsub_round_pd	✅ _mm_mask_max_epu16	❌ _mm512_movm_epi64
❌ _mm512_mask3_fmsub_round_ps	✅ _mm256_mask_max_epu16	❌ _mm_movm_epi8
🗑 _mm_mask3_fmsubadd_pd	✅ _mm512_mask_max_epu16	❌ _mm256_movm_epi8
🗑 _mm256_mask3_fmsubadd_pd	✅ _mm_mask_max_epu32	❌ _mm512_movm_epi8
🗑 _mm512_mask3_fmsubadd_pd	✅ _mm256_mask_max_epu32	❌ _mm512_mul_epi32
🗑 _mm_mask3_fmsubadd_ps	✅ _mm512_mask_max_epu32	❌ _mm512_mul_epu32
🗑 _mm256_mask3_fmsubadd_ps	✅ _mm_mask_max_epu64	❌ _mm512_mul_round_pd
🗑 _mm512_mask3_fmsubadd_ps	✅ _mm256_mask_max_epu64	❌ _mm512_mul_round_ps
🗑 _mm512_mask3_fmsubadd_round_pd	✅ _mm512_mask_max_epu64	❌ _mm512_mulhi_epi16
🗑 _mm512_mask3_fmsubadd_round_ps	✅ _mm_mask_max_epu8	❌ _mm512_mulhi_epu16
❌ _mm_mask3_fnmadd_pd	✅ _mm256_mask_max_epu8	❌ _mm512_mulhrs_epi16
❌ _mm_mask3_fnmadd_ps	✅ _mm512_mask_max_epu8	❌ _mm_mullo_epi64
❌ _mm512_mask3_fnmadd_round_pd	❌ _mm512_mask_max_round_pd	❌ _mm256_mullo_epi64
❌ _mm512_mask3_fnmadd_round_ps	❌ _mm512_mask_max_round_ps	❌ _mm512_mullox_epi64
❌ _mm_mask3_fnmsub_pd	✅ _mm_mask_min_epu16	❌ _mm_or_epi32
❌ _mm_mask3_fnmsub_ps	✅ _mm256_mask_min_epu16	❌ _mm256_or_epi32
❌ _mm512_mask3_fnmsub_round_pd	✅ _mm512_mask_min_epu16	❌ _mm512_or_epi32
❌ _mm512_mask3_fnmsub_round_ps	✅ _mm_mask_min_epu32	❌ _mm_or_epi64
❌ _mm_mask_alignr_epi32	✅ _mm256_mask_min_epu32	❌ _mm256_or_epi64
❌ _mm256_mask_alignr_epi32	✅ _mm512_mask_min_epu32	❌ _mm512_or_epi64
❌ _mm512_mask_alignr_epi32	✅ _mm_mask_min_epu64	❌ _mm512_packs_epi16
❌ _mm_mask_alignr_epi64	✅ _mm256_mask_min_epu64	❌ _mm512_packs_epi32
❌ _mm256_mask_alignr_epi64	✅ _mm512_mask_min_epu64	❌ _mm512_packus_epi16
❌ _mm512_mask_alignr_epi64	✅ _mm_mask_min_epu8	❌ _mm512_packus_epi32
❌ _mm_mask_alignr_epi8	✅ _mm256_mask_min_epu8	❌ _mm512_permute_ps
❌ _mm256_mask_alignr_epi8	✅ _mm512_mask_min_epu8	❌ _mm512_permutevar_epi32
❌ _mm512_mask_alignr_epi8	❌ _mm512_mask_min_round_pd	❌ _mm512_permutevar_pd
❌ _mm_mask_and_pd	❌ _mm512_mask_min_round_ps	❌ _mm512_permutevar_ps
❌ _mm256_mask_and_pd	❌ _mm_mask_mov_epi16	❌ _mm256_permutex_epi64
❌ _mm_mask_and_ps	❌ _mm256_mask_mov_epi16	❌ _mm256_permutex_pd
❌ _mm256_mask_and_ps	❌ _mm_mask_mov_epi32	❌ _mm512_permutex_pd
❌ _mm_mask_andnot_pd	❌ _mm256_mask_mov_epi32	❌ _mm_permutexvar_epi16
❌ _mm256_mask_andnot_pd	❌ _mm512_mask_mov_epi32	❌ _mm256_permutexvar_epi64
❌ _mm_mask_andnot_ps	❌ _mm_mask_mov_epi64	❌ _mm512_range_round_pd
❌ _mm256_mask_andnot_ps	❌ _mm256_mask_mov_epi64	❌ _mm512_range_round_ps
❌ _mm256_mask_broadcast_f32x4	❌ _mm512_mask_mov_epi64	❌ _mm_reduce_add_epi16
❌ _mm256_mask_broadcast_i32x4	❌ _mm_mask_mov_epi8	❌ _mm256_reduce_add_epi16
❌ _mm256_mask_broadcastb_epi8	❌ _mm256_mask_mov_epi8	❌ _mm512_reduce_add_epi32
❌ _mm512_mask_broadcastb_epi8	❌ _mm_mask_mov_pd	❌ _mm512_reduce_add_epi64
❌ _mm256_mask_broadcastd_epi32	❌ _mm256_mask_mov_pd	❌ _mm_reduce_add_epi8
❌ _mm256_mask_broadcastq_epi64	❌ _mm512_mask_mov_pd	❌ _mm256_reduce_add_epi8
❌ _mm256_mask_broadcastsd_pd	❌ _mm_mask_mov_ps	❌ _mm512_reduce_add_pd
❌ _mm256_mask_broadcastss_ps	❌ _mm256_mask_mov_ps	❌ _mm512_reduce_add_ps
❌ _mm256_mask_broadcastw_epi16	❌ _mm512_mask_mov_ps	❌ _mm_reduce_and_epi16
❌ _mm512_mask_broadcastw_epi16	❌ _mm_mask_mul_epi32	❌ _mm256_reduce_and_epi16
❌ _mm256_mask_cmp_epi16_mask	❌ _mm256_mask_mul_epi32	❌ _mm512_reduce_and_epi32
❌ _mm512_mask_cmp_epi16_mask	❌ _mm512_mask_mul_epi32	❌ _mm512_reduce_and_epi64
❌ _mm256_mask_cmp_epi8_mask	❌ _mm_mask_mul_epu32	❌ _mm_reduce_and_epi8
❌ _mm512_mask_cmp_epi8_mask	❌ _mm256_mask_mul_epu32	❌ _mm256_reduce_and_epi8
❌ _mm256_mask_cmp_epu16_mask	❌ _mm512_mask_mul_epu32	❌ _mm_reduce_max_epi16
❌ _mm512_mask_cmp_epu16_mask	❌ _mm512_mask_mul_round_pd	❌ _mm256_reduce_max_epi16
❌ _mm256_mask_cmp_epu8_mask	❌ _mm512_mask_mul_round_ps	❌ _mm512_reduce_max_epi32
❌ _mm512_mask_cmp_epu8_mask	❌ _mm_mask_mulhi_epi16	❌ _mm512_reduce_max_epi64
❌ _mm_mask_compress_epi32	❌ _mm256_mask_mulhi_epi16	❌ _mm_reduce_max_epi8
❌ _mm256_mask_compress_epi32	❌ _mm512_mask_mulhi_epi16	❌ _mm256_reduce_max_epi8
❌ _mm512_mask_compress_epi32	❌ _mm_mask_mulhi_epu16	❌ _mm_reduce_max_epu16
❌ _mm_mask_compress_epi64	❌ _mm256_mask_mulhi_epu16	❌ _mm256_reduce_max_epu16
❌ _mm256_mask_compress_epi64	❌ _mm512_mask_mulhi_epu16	❌ _mm512_reduce_max_epu32
❌ _mm512_mask_compress_epi64	❌ _mm_mask_mulhrs_epi16	❌ _mm512_reduce_max_epu64
❌ _mm_mask_compress_pd	❌ _mm256_mask_mulhrs_epi16	❌ _mm_reduce_max_epu8
❌ _mm256_mask_compress_pd	❌ _mm512_mask_mulhrs_epi16	❌ _mm256_reduce_max_epu8
❌ _mm512_mask_compress_pd	❌ _mm_mask_mullo_epi16	❌ _mm512_reduce_max_pd
❌ _mm_mask_compress_ps	❌ _mm256_mask_mullo_epi16	❌ _mm512_reduce_max_ps
❌ _mm256_mask_compress_ps	❌ _mm512_mask_mullo_epi16	❌ _mm_reduce_min_epi16
❌ _mm512_mask_compress_ps	❌ _mm_mask_mullo_epi32	❌ _mm256_reduce_min_epi16
❌ _mm_mask_compressstoreu_epi32	❌ _mm256_mask_mullo_epi32	❌ _mm512_reduce_min_epi32
❌ _mm256_mask_compressstoreu_epi32	❌ _mm512_mask_mullo_epi32	❌ _mm512_reduce_min_epi64
❌ _mm512_mask_compressstoreu_epi32	❌ _mm_mask_mullo_epi64	❌ _mm_reduce_min_epi8
❌ _mm_mask_compressstoreu_epi64	❌ _mm256_mask_mullo_epi64	❌ _mm256_reduce_min_epi8
❌ _mm256_mask_compressstoreu_epi64	❌ _mm512_mask_mullo_epi64	❌ _mm_reduce_min_epu16
❌ _mm512_mask_compressstoreu_epi64	❌ _mm512_mask_mullox_epi64	❌ _mm256_reduce_min_epu16
❌ _mm_mask_compressstoreu_pd	❌ _mm_mask_or_pd	❌ _mm512_reduce_min_epu32
❌ _mm256_mask_compressstoreu_pd	❌ _mm256_mask_or_pd	❌ _mm512_reduce_min_epu64
❌ _mm512_mask_compressstoreu_pd	❌ _mm_mask_or_ps	❌ _mm_reduce_min_epu8
❌ _mm_mask_compressstoreu_ps	❌ _mm256_mask_or_ps	❌ _mm256_reduce_min_epu8
❌ _mm256_mask_compressstoreu_ps	❌ _mm_mask_packs_epi16	❌ _mm512_reduce_min_pd
❌ _mm512_mask_compressstoreu_ps	❌ _mm256_mask_packs_epi16	❌ _mm512_reduce_min_ps
❌ _mm512_mask_cvt_roundepi32_ps	❌ _mm512_mask_packs_epi16	❌ _mm_reduce_mul_epi16
❌ _mm512_mask_cvt_roundepi64_pd	❌ _mm_mask_packs_epi32	❌ _mm256_reduce_mul_epi16
❌ _mm512_mask_cvt_roundepi64_ps	❌ _mm256_mask_packs_epi32	❌ _mm512_reduce_mul_epi32
❌ _mm512_mask_cvt_roundepu32_ps	❌ _mm512_mask_packs_epi32	❌ _mm512_reduce_mul_epi64
❌ _mm512_mask_cvt_roundepu64_pd	❌ _mm_mask_packus_epi16	❌ _mm_reduce_mul_epi8
❌ _mm512_mask_cvt_roundepu64_ps	❌ _mm256_mask_packus_epi16	❌ _mm256_reduce_mul_epi8
❌ _mm512_mask_cvt_roundpd_epi32	❌ _mm512_mask_packus_epi16	❌ _mm512_reduce_mul_pd
❌ _mm512_mask_cvt_roundpd_epi64	❌ _mm_mask_packus_epi32	❌ _mm512_reduce_mul_ps
❌ _mm512_mask_cvt_roundpd_epu32	❌ _mm256_mask_packus_epi32	❌ _mm_reduce_or_epi16
❌ _mm512_mask_cvt_roundpd_epu64	❌ _mm512_mask_packus_epi32	❌ _mm256_reduce_or_epi16
❌ _mm512_mask_cvt_roundpd_ps	❌ _mm_mask_permute_pd	❌ _mm512_reduce_or_epi32
❌ _mm512_mask_cvt_roundph_ps	❌ _mm256_mask_permute_pd	❌ _mm512_reduce_or_epi64
❌ _mm512_mask_cvt_roundps_epi32	❌ _mm512_mask_permute_pd	❌ _mm_reduce_or_epi8
❌ _mm512_mask_cvt_roundps_epi64	❌ _mm_mask_permute_ps	❌ _mm256_reduce_or_epi8
❌ _mm512_mask_cvt_roundps_epu32	❌ _mm256_mask_permute_ps	❌ _mm_reduce_pd
❌ _mm512_mask_cvt_roundps_epu64	❌ _mm512_mask_permute_ps	❌ _mm256_reduce_pd
❌ _mm512_mask_cvt_roundps_pd	❌ _mm512_mask_permutevar_epi32	❌ _mm512_reduce_pd
❌ _mm_mask_cvt_roundps_ph	❌ _mm_mask_permutevar_pd	❌ _mm_reduce_ps
❌ _mm256_mask_cvt_roundps_ph	❌ _mm256_mask_permutevar_pd	❌ _mm256_reduce_ps
❌ _mm512_mask_cvt_roundps_ph	❌ _mm512_mask_permutevar_pd	❌ _mm512_reduce_ps
❌ _mm_mask_cvtepi16_epi32	❌ _mm_mask_permutevar_ps	❌ _mm512_reduce_round_pd
❌ _mm256_mask_cvtepi16_epi32	❌ _mm256_mask_permutevar_ps	❌ _mm512_reduce_round_ps
❌ _mm512_mask_cvtepi16_epi32	❌ _mm512_mask_permutevar_ps	❌ _mm_ror_epi32
❌ _mm_mask_cvtepi16_epi64	❌ _mm_mask_permutex2var_epi16	❌ _mm256_ror_epi32
❌ _mm256_mask_cvtepi16_epi64	❌ _mm256_mask_permutex2var_epi16	❌ _mm512_ror_epi32
❌ _mm512_mask_cvtepi16_epi64	❌ _mm512_mask_permutex2var_epi16	❌ _mm_ror_epi64
❌ _mm_mask_cvtepi16_epi8	❌ _mm_mask_permutex2var_epi32	❌ _mm256_ror_epi64
❌ _mm256_mask_cvtepi16_epi8	❌ _mm256_mask_permutex2var_epi32	❌ _mm512_ror_epi64
❌ _mm512_mask_cvtepi16_epi8	❌ _mm512_mask_permutex2var_epi32	❌ _mm_rorv_epi32
❌ _mm_mask_cvtepi16_storeu_epi8	❌ _mm_mask_permutex2var_epi64	❌ _mm256_rorv_epi32
❌ _mm256_mask_cvtepi16_storeu_epi8	❌ _mm256_mask_permutex2var_epi64	❌ _mm512_rorv_epi32
❌ _mm_mask_cvtepi32_epi16	❌ _mm512_mask_permutex2var_epi64	❌ _mm_rorv_epi64
❌ _mm256_mask_cvtepi32_epi16	❌ _mm_mask_permutex2var_pd	❌ _mm256_rorv_epi64
❌ _mm512_mask_cvtepi32_epi16	❌ _mm256_mask_permutex2var_pd	❌ _mm512_rorv_epi64
❌ _mm_mask_cvtepi32_epi64	❌ _mm512_mask_permutex2var_pd	❌ _mm_roundscale_pd
❌ _mm256_mask_cvtepi32_epi64	❌ _mm_mask_permutex2var_ps	❌ _mm256_roundscale_pd
❌ _mm512_mask_cvtepi32_epi64	❌ _mm256_mask_permutex2var_ps	❌ _mm_roundscale_ps
❌ _mm_mask_cvtepi32_epi8	❌ _mm512_mask_permutex2var_ps	❌ _mm256_roundscale_ps
❌ _mm256_mask_cvtepi32_epi8	❌ _mm256_mask_permutex_epi64	❌ _mm512_roundscale_round_pd
❌ _mm512_mask_cvtepi32_epi8	❌ _mm512_mask_permutex_epi64	❌ _mm512_roundscale_round_ps
❌ _mm_mask_cvtepi32_pd	❌ _mm256_mask_permutex_pd	❌ _mm_rsqrt14_ps
❌ _mm256_mask_cvtepi32_pd	❌ _mm512_mask_permutex_pd	❌ _mm256_rsqrt14_ps
❌ _mm512_mask_cvtepi32_pd	❌ _mm_mask_permutexvar_epi16	❌ _mm512_rsqrt14_ps
❌ _mm_mask_cvtepi32_ps	❌ _mm256_mask_permutexvar_epi16	❌ _mm512_scalef_round_pd
❌ _mm256_mask_cvtepi32_ps	❌ _mm512_mask_permutexvar_epi16	❌ _mm512_scalef_round_ps
❌ _mm512_mask_cvtepi32_ps	❌ _mm256_mask_permutexvar_epi32	❌ _mm256_shuffle_f32x4
❌ _mm_mask_cvtepi32_storeu_epi16	❌ _mm512_mask_permutexvar_epi32	❌ _mm256_shuffle_f64x2
❌ _mm256_mask_cvtepi32_storeu_epi16	❌ _mm256_mask_permutexvar_epi64	❌ _mm256_shuffle_i32x4
❌ _mm512_mask_cvtepi32_storeu_epi16	❌ _mm512_mask_permutexvar_epi64	❌ _mm256_shuffle_i64x2
❌ _mm_mask_cvtepi32_storeu_epi8	❌ _mm256_mask_permutexvar_pd	❌ _mm512_shuffle_ps
❌ _mm256_mask_cvtepi32_storeu_epi8	❌ _mm512_mask_permutexvar_pd	❌ _mm512_sll_epi16
❌ _mm512_mask_cvtepi32_storeu_epi8	❌ _mm256_mask_permutexvar_ps	❌ _mm512_sll_epi32
❌ _mm512_mask_cvtepi32lo_pd	❌ _mm512_mask_permutexvar_ps	❌ _mm512_sll_epi64
❌ _mm_mask_cvtepi64_epi16	❌ _mm512_mask_range_round_pd	❌ _mm_sllv_epi16
❌ _mm256_mask_cvtepi64_epi16	❌ _mm512_mask_range_round_ps	❌ _mm256_sllv_epi16
❌ _mm512_mask_cvtepi64_epi16	❌ _mm_mask_reduce_add_epi16	❌ _mm512_sqrt_round_pd
❌ _mm_mask_cvtepi64_epi32	❌ _mm256_mask_reduce_add_epi16	❌ _mm512_sqrt_round_ps
❌ _mm256_mask_cvtepi64_epi32	❌ _mm512_mask_reduce_add_epi32	❌ _mm512_sra_epi16
❌ _mm512_mask_cvtepi64_epi32	❌ _mm512_mask_reduce_add_epi64	❌ _mm512_sra_epi32
❌ _mm_mask_cvtepi64_epi8	❌ _mm_mask_reduce_add_epi8	❌ _mm_sra_epi64
❌ _mm256_mask_cvtepi64_epi8	❌ _mm256_mask_reduce_add_epi8	❌ _mm256_sra_epi64
❌ _mm512_mask_cvtepi64_epi8	❌ _mm512_mask_reduce_add_pd	❌ _mm512_sra_epi64
❌ _mm_mask_cvtepi64_pd	❌ _mm512_mask_reduce_add_ps	❌ _mm256_srai_epi64
❌ _mm256_mask_cvtepi64_pd	❌ _mm_mask_reduce_and_epi16	❌ _mm512_srl_epi16
❌ _mm512_mask_cvtepi64_pd	❌ _mm256_mask_reduce_and_epi16	❌ _mm512_srl_epi32
❌ _mm_mask_cvtepi64_ps	❌ _mm512_mask_reduce_and_epi32	❌ _mm512_srl_epi64
❌ _mm256_mask_cvtepi64_ps	❌ _mm512_mask_reduce_and_epi64	❌ _mm512_stream_load_si512
❌ _mm512_mask_cvtepi64_ps	❌ _mm_mask_reduce_and_epi8	❌ _mm512_stream_pd
❌ _mm_mask_cvtepi64_storeu_epi16	❌ _mm256_mask_reduce_and_epi8	❌ _mm512_stream_ps
❌ _mm256_mask_cvtepi64_storeu_epi16	❌ _mm_mask_reduce_max_epi16	❌ _mm512_stream_si512
❌ _mm512_mask_cvtepi64_storeu_epi16	❌ _mm256_mask_reduce_max_epi16	❌ _mm512_sub_round_pd
❌ _mm_mask_cvtepi64_storeu_epi32	❌ _mm512_mask_reduce_max_epi32	❌ _mm512_sub_round_ps
❌ _mm256_mask_cvtepi64_storeu_epi32	❌ _mm512_mask_reduce_max_epi64	❌ _mm_ternarylogic_epi32
❌ _mm512_mask_cvtepi64_storeu_epi32	❌ _mm_mask_reduce_max_epi8	❌ _mm256_ternarylogic_epi32
❌ _mm_mask_cvtepi64_storeu_epi8	❌ _mm256_mask_reduce_max_epi8	❌ _mm512_ternarylogic_epi32
❌ _mm256_mask_cvtepi64_storeu_epi8	❌ _mm_mask_reduce_max_epu16	❌ _mm_ternarylogic_epi64
❌ _mm512_mask_cvtepi64_storeu_epi8	❌ _mm256_mask_reduce_max_epu16	❌ _mm256_ternarylogic_epi64
❌ _mm_mask_cvtepi8_epi16	❌ _mm512_mask_reduce_max_epu32	❌ _mm512_ternarylogic_epi64
❌ _mm256_mask_cvtepi8_epi16	❌ _mm512_mask_reduce_max_epu64	❌ _mm_test_epi16_mask
❌ _mm512_mask_cvtepi8_epi16	❌ _mm_mask_reduce_max_epu8	❌ _mm256_test_epi16_mask
❌ _mm_mask_cvtepi8_epi32	❌ _mm256_mask_reduce_max_epu8	❌ _mm512_test_epi16_mask
❌ _mm256_mask_cvtepi8_epi32	❌ _mm512_mask_reduce_max_pd	❌ _mm_test_epi32_mask
❌ _mm512_mask_cvtepi8_epi32	❌ _mm512_mask_reduce_max_ps	❌ _mm256_test_epi32_mask
❌ _mm_mask_cvtepi8_epi64	❌ _mm_mask_reduce_min_epi16	❌ _mm512_test_epi32_mask
❌ _mm256_mask_cvtepi8_epi64	❌ _mm256_mask_reduce_min_epi16	❌ _mm_test_epi64_mask
❌ _mm512_mask_cvtepi8_epi64	❌ _mm512_mask_reduce_min_epi32	❌ _mm256_test_epi64_mask
❌ _mm_mask_cvtepu16_epi32	❌ _mm512_mask_reduce_min_epi64	❌ _mm512_test_epi64_mask
❌ _mm256_mask_cvtepu16_epi32	❌ _mm_mask_reduce_min_epi8	❌ _mm_test_epi8_mask
❌ _mm512_mask_cvtepu16_epi32	❌ _mm256_mask_reduce_min_epi8	❌ _mm256_test_epi8_mask
❌ _mm_mask_cvtepu16_epi64	❌ _mm_mask_reduce_min_epu16	❌ _mm512_test_epi8_mask
❌ _mm256_mask_cvtepu16_epi64	❌ _mm256_mask_reduce_min_epu16	❌ _mm_testn_epi16_mask
❌ _mm512_mask_cvtepu16_epi64	❌ _mm512_mask_reduce_min_epu32	❌ _mm256_testn_epi16_mask
❌ _mm_mask_cvtepu32_epi64	❌ _mm512_mask_reduce_min_epu64	❌ _mm512_testn_epi16_mask
❌ _mm256_mask_cvtepu32_epi64	❌ _mm_mask_reduce_min_epu8	❌ _mm_testn_epi32_mask
❌ _mm512_mask_cvtepu32_epi64	❌ _mm256_mask_reduce_min_epu8	❌ _mm256_testn_epi32_mask
❌ _mm_mask_cvtepu32_pd	❌ _mm512_mask_reduce_min_pd	❌ _mm512_testn_epi32_mask
❌ _mm256_mask_cvtepu32_pd	❌ _mm512_mask_reduce_min_ps	❌ _mm_testn_epi64_mask
❌ _mm512_mask_cvtepu32_pd	❌ _mm_mask_reduce_mul_epi16	❌ _mm256_testn_epi64_mask
❌ _mm512_mask_cvtepu32_ps	❌ _mm256_mask_reduce_mul_epi16	❌ _mm512_testn_epi64_mask
❌ _mm512_mask_cvtepu32lo_pd	❌ _mm512_mask_reduce_mul_epi32	❌ _mm_testn_epi8_mask
❌ _mm_mask_cvtepu64_pd	❌ _mm512_mask_reduce_mul_epi64	❌ _mm256_testn_epi8_mask
❌ _mm256_mask_cvtepu64_pd	❌ _mm_mask_reduce_mul_epi8	❌ _mm512_testn_epi8_mask
❌ _mm512_mask_cvtepu64_pd	❌ _mm256_mask_reduce_mul_epi8	❌ _mm512_unpackhi_epi32
❌ _mm_mask_cvtepu64_ps	❌ _mm512_mask_reduce_mul_pd	❌ _mm512_unpackhi_epi64
❌ _mm256_mask_cvtepu64_ps	❌ _mm512_mask_reduce_mul_ps	❌ _mm512_unpackhi_pd
❌ _mm512_mask_cvtepu64_ps	❌ _mm_mask_reduce_or_epi16	❌ _mm512_unpackhi_ps
❌ _mm_mask_cvtepu8_epi16	❌ _mm256_mask_reduce_or_epi16	❌ _mm512_unpacklo_epi32
❌ _mm256_mask_cvtepu8_epi16	❌ _mm512_mask_reduce_or_epi32	❌ _mm512_unpacklo_epi64
❌ _mm512_mask_cvtepu8_epi16	❌ _mm512_mask_reduce_or_epi64	❌ _mm512_unpacklo_pd
❌ _mm_mask_cvtepu8_epi32	❌ _mm_mask_reduce_or_epi8	❌ _mm512_unpacklo_ps
❌ _mm256_mask_cvtepu8_epi32	❌ _mm256_mask_reduce_or_epi8	❌ _mm_xor_epi32
❌ _mm512_mask_cvtepu8_epi32	❌ _mm512_mask_reduce_round_pd	❌ _mm256_xor_epi32
❌ _mm_mask_cvtepu8_epi64	❌ _mm512_mask_reduce_round_ps	❌ _mm512_xor_epi32
❌ _mm256_mask_cvtepu8_epi64	✅ _mm_mask_ror_epi32	❌ _mm_xor_epi64
❌ _mm512_mask_cvtepu8_epi64	✅ _mm256_mask_ror_epi32	❌ _mm256_xor_epi64
❌ _mm_mask_cvtpd_epi32	✅ _mm512_mask_ror_epi32	❌ _mm512_xor_epi64

[SadiinsoSnowfall]

Removed *_mask_sll_* and *_mask_srl_* and *_mask_sla_* because they are covered by their respective i and v variants.

[SadiinsoSnowfall]

#1826 implemented the following intrinsics: *_mask_ror_* and *_mask_rorv_*
#1827 implemented the following intrinsics: *_mask_srlv_*, *_mask_srli_*, *_mask_srai_*, *_mask_srav_*, *_mask_sllv_*, and *_mask_slli_*

[SadiinsoSnowfall]

Removed *_fmaddsub_* and *_fmsubadd_* to mirror SSE3 removal

[SadiinsoSnowfall]

x86 AVX512 - Extended (VBMI, VBMI2, BITALG, VPCLMULDQD, GFNI, POPCOUNTPD)

✓	Name	Description
❌	_mm_bitshuffle_epi64_mask	Gather 64 bits from "b" using selection bits in "c". For each 64-bit element in "b", gather 8 bits from the 64-bit element in "b" at 8 bit position controlled by the 8 corresponding 8-bit elements of "c", and store the result in the corresponding 8-bit element of "dst".
❌	_mm256_bitshuffle_epi64_mask	Gather 64 bits from "b" using selection bits in "c". For each 64-bit element in "b", gather 8 bits from the 64-bit element in "b" at 8 bit position controlled by the 8 corresponding 8-bit elements of "c", and store the result in the corresponding 8-bit element of "dst".
❌	_mm512_bitshuffle_epi64_mask	Gather 64 bits from "b" using selection bits in "c". For each 64-bit element in "b", gather 8 bits from the 64-bit element in "b" at 8 bit position controlled by the 8 corresponding 8-bit elements of "c", and store the result in the corresponding 8-bit element of "dst".
❌	_mm_mask2_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" using the corresponding selector and index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask2_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" across lanes using the corresponding selector and index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask2_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" across lanes using the corresponding selector and index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_bitshuffle_epi64_mask	Gather 64 bits from "b" using selection bits in "c". For each 64-bit element in "b", gather 8 bits from the 64-bit element in "b" at 8 bit position controlled by the 8 corresponding 8-bit elements of "c", and store the result in the corresponding 8-bit element of "dst" using zeromask "k" (elements are zeroed out when the corresponding mask bit is not set).
❌	_mm256_mask_bitshuffle_epi64_mask	Gather 64 bits from "b" using selection bits in "c". For each 64-bit element in "b", gather 8 bits from the 64-bit element in "b" at 8 bit position controlled by the 8 corresponding 8-bit elements of "c", and store the result in the corresponding 8-bit element of "dst" using zeromask "k" (elements are zeroed out when the corresponding mask bit is not set).
❌	_mm512_mask_bitshuffle_epi64_mask	Gather 64 bits from "b" using selection bits in "c". For each 64-bit element in "b", gather 8 bits from the 64-bit element in "b" at 8 bit position controlled by the 8 corresponding 8-bit elements of "c", and store the result in the corresponding 8-bit element of "dst" using zeromask "k" (elements are zeroed out when the corresponding mask bit is not set).
❌	_mm_mask_compress_epi16	Contiguously store the active 16-bit integers in "a" (those with their respective bit set in writemask "k") to "dst", and pass through the remaining elements from "src".
❌	_mm256_mask_compress_epi16	Contiguously store the active 16-bit integers in "a" (those with their respective bit set in writemask "k") to "dst", and pass through the remaining elements from "src".
❌	_mm512_mask_compress_epi16	Contiguously store the active 16-bit integers in "a" (those with their respective bit set in writemask "k") to "dst", and pass through the remaining elements from "src".
❌	_mm_mask_compress_epi8	Contiguously store the active 8-bit integers in "a" (those with their respective bit set in writemask "k") to "dst", and pass through the remaining elements from "src".
❌	_mm256_mask_compress_epi8	Contiguously store the active 8-bit integers in "a" (those with their respective bit set in writemask "k") to "dst", and pass through the remaining elements from "src".
❌	_mm512_mask_compress_epi8	Contiguously store the active 8-bit integers in "a" (those with their respective bit set in writemask "k") to "dst", and pass through the remaining elements from "src".
❌	_mm_mask_compressstoreu_epi16	Contiguously store the active 16-bit integers in "a" (those with their respective bit set in writemask "k") to unaligned memory at "base_addr".
❌	_mm256_mask_compressstoreu_epi16	Contiguously store the active 16-bit integers in "a" (those with their respective bit set in writemask "k") to unaligned memory at "base_addr".
❌	_mm512_mask_compressstoreu_epi16	Contiguously store the active 16-bit integers in "a" (those with their respective bit set in writemask "k") to unaligned memory at "base_addr".
❌	_mm_mask_compressstoreu_epi8	Contiguously store the active 8-bit integers in "a" (those with their respective bit set in writemask "k") to unaligned memory at "base_addr".
❌	_mm256_mask_compressstoreu_epi8	Contiguously store the active 8-bit integers in "a" (those with their respective bit set in writemask "k") to unaligned memory at "base_addr".
❌	_mm512_mask_compressstoreu_epi8	Contiguously store the active 8-bit integers in "a" (those with their respective bit set in writemask "k") to unaligned memory at "base_addr".
❌	_mm_mask_expand_epi16	Load contiguous active 16-bit integers from "a" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_expand_epi16	Load contiguous active 16-bit integers from "a" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_expand_epi16	Load contiguous active 16-bit integers from "a" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_expand_epi8	Load contiguous active 8-bit integers from "a" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_expand_epi8	Load contiguous active 8-bit integers from "a" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_expand_epi8	Load contiguous active 8-bit integers from "a" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_expandloadu_epi16	Load contiguous active 16-bit integers from unaligned memory at "mem_addr" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_expandloadu_epi16	Load contiguous active 16-bit integers from unaligned memory at "mem_addr" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_expandloadu_epi16	Load contiguous active 16-bit integers from unaligned memory at "mem_addr" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_expandloadu_epi8	Load contiguous active 8-bit integers from unaligned memory at "mem_addr" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_expandloadu_epi8	Load contiguous active 8-bit integers from unaligned memory at "mem_addr" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_expandloadu_epi8	Load contiguous active 8-bit integers from unaligned memory at "mem_addr" (those with their respective bit set in mask "k"), and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_multishift_epi64_epi8	For each 64-bit element in "b", select 8 unaligned bytes using a byte-granular shift control within the corresponding 64-bit element of "a", and store the 8 assembled bytes to the corresponding 64-bit element of "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_multishift_epi64_epi8	For each 64-bit element in "b", select 8 unaligned bytes using a byte-granular shift control within the corresponding 64-bit element of "a", and store the 8 assembled bytes to the corresponding 64-bit element of "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_multishift_epi64_epi8	For each 64-bit element in "b", select 8 unaligned bytes using a byte-granular shift control within the corresponding 64-bit element of "a", and store the 8 assembled bytes to the corresponding 64-bit element of "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" using the corresponding selector and index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" across lanes using the corresponding selector and index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" across lanes using the corresponding selector and index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_permutexvar_epi8	Shuffle 8-bit integers in "a" using the corresponding index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_permutexvar_epi8	Shuffle 8-bit integers in "a" across lanes using the corresponding index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_permutexvar_epi8	Shuffle 8-bit integers in "a" across lanes using the corresponding index in "idx", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_popcnt_epi16	Count the number of logical 1 bits in packed 16-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_popcnt_epi16	Count the number of logical 1 bits in packed 16-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_popcnt_epi16	Count the number of logical 1 bits in packed 16-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_popcnt_epi32	Count the number of logical 1 bits in packed 32-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_popcnt_epi32	Count the number of logical 1 bits in packed 32-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_popcnt_epi32	Count the number of logical 1 bits in packed 32-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_popcnt_epi64	Count the number of logical 1 bits in packed 64-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_popcnt_epi64	Count the number of logical 1 bits in packed 64-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_popcnt_epi64	Count the number of logical 1 bits in packed 64-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_popcnt_epi8	Count the number of logical 1 bits in packed 8-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_popcnt_epi8	Count the number of logical 1 bits in packed 8-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_popcnt_epi8	Count the number of logical 1 bits in packed 8-bit integers in "a", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_shldi_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by "imm8" bits, and store the upper 16-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_shldi_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by "imm8" bits, and store the upper 16-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_shldi_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by "imm8" bits, and store the upper 16-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_shldi_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by "imm8" bits, and store the upper 32-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_shldi_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by "imm8" bits, and store the upper 32-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_shldi_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by "imm8" bits, and store the upper 32-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_shldi_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by "imm8" bits, and store the upper 64-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_shldi_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by "imm8" bits, and store the upper 64-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_shldi_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by "imm8" bits, and store the upper 64-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_shldv_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 16-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_shldv_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 16-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_shldv_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 16-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_shldv_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 32-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_shldv_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 32-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_shldv_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 32-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_shldv_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 64-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_shldv_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 64-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_shldv_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 64-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_shrdi_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by "imm8" bits, and store the lower 16-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_shrdi_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by "imm8" bits, and store the lower 16-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_shrdi_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by "imm8" bits, and store the lower 16-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_shrdi_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by "imm8" bits, and store the lower 32-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm256_mask_shrdi_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by "imm8" bits, and store the lower 32-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm512_mask_shrdi_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by "imm8" bits, and store the lower 32-bits in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
❌	_mm_mask_shrdi_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by "imm8" bits, and store the lower 64-bits in "dst" using writemask "k" (elements are copied from "src"" when the corresponding mask bit is not set).
❌	_mm256_mask_shrdi_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by "imm8" bits, and store the lower 64-bits in "dst" using writemask "k" (elements are copied from "src"" when the corresponding mask bit is not set).
❌	_mm512_mask_shrdi_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by "imm8" bits, and store the lower 64-bits in "dst" using writemask "k" (elements are copied from "src"" when the corresponding mask bit is not set).
❌	_mm_mask_shrdv_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 16-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_shrdv_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 16-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_shrdv_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 16-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_shrdv_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 32-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_shrdv_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 32-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_shrdv_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 32-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_mask_shrdv_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 64-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm256_mask_shrdv_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 64-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm512_mask_shrdv_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 64-bits in "dst" using writemask "k" (elements are copied from "a" when the corresponding mask bit is not set).
❌	_mm_multishift_epi64_epi8	For each 64-bit element in "b", select 8 unaligned bytes using a byte-granular shift control within the corresponding 64-bit element of "a", and store the 8 assembled bytes to the corresponding 64-bit element of "dst".
❌	_mm256_multishift_epi64_epi8	For each 64-bit element in "b", select 8 unaligned bytes using a byte-granular shift control within the corresponding 64-bit element of "a", and store the 8 assembled bytes to the corresponding 64-bit element of "dst".
❌	_mm512_multishift_epi64_epi8	For each 64-bit element in "b", select 8 unaligned bytes using a byte-granular shift control within the corresponding 64-bit element of "a", and store the 8 assembled bytes to the corresponding 64-bit element of "dst".
❌	_mm_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" using the corresponding selector and index in "idx", and store the results in "dst".
❌	_mm256_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" across lanes using the corresponding selector and index in "idx", and store the results in "dst".
❌	_mm512_permutex2var_epi8	Shuffle 8-bit integers in "a" and "b" across lanes using the corresponding selector and index in "idx", and store the results in "dst".
❌	_mm_permutexvar_epi8	Shuffle 8-bit integers in "a" using the corresponding index in "idx", and store the results in "dst".
❌	_mm512_permutexvar_epi8	Shuffle 8-bit integers in "a" across lanes using the corresponding index in "idx", and store the results in "dst".
❌	_mm_popcnt_epi16	Count the number of logical 1 bits in packed 16-bit integers in "a", and store the results in "dst".
❌	_mm256_popcnt_epi16	Count the number of logical 1 bits in packed 16-bit integers in "a", and store the results in "dst".
❌	_mm512_popcnt_epi16	Count the number of logical 1 bits in packed 16-bit integers in "a", and store the results in "dst".
❌	_mm_popcnt_epi32	Count the number of logical 1 bits in packed 32-bit integers in "a", and store the results in "dst".
❌	_mm256_popcnt_epi32	Count the number of logical 1 bits in packed 32-bit integers in "a", and store the results in "dst".
❌	_mm512_popcnt_epi32	Count the number of logical 1 bits in packed 32-bit integers in "a", and store the results in "dst".
❌	_mm_popcnt_epi64	Count the number of logical 1 bits in packed 64-bit integers in "a", and store the results in "dst".
❌	_mm256_popcnt_epi64	Count the number of logical 1 bits in packed 64-bit integers in "a", and store the results in "dst".
❌	_mm512_popcnt_epi64	Count the number of logical 1 bits in packed 64-bit integers in "a", and store the results in "dst".
❌	_mm_popcnt_epi8	Count the number of logical 1 bits in packed 8-bit integers in "a", and store the results in "dst".
❌	_mm256_popcnt_epi8	Count the number of logical 1 bits in packed 8-bit integers in "a", and store the results in "dst".
❌	_mm512_popcnt_epi8	Count the number of logical 1 bits in packed 8-bit integers in "a", and store the results in "dst".
❌	_mm_shldi_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by "imm8" bits, and store the upper 16-bits in "dst").
❌	_mm256_shldi_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by "imm8" bits, and store the upper 16-bits in "dst").
❌	_mm512_shldi_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by "imm8" bits, and store the upper 16-bits in "dst").
❌	_mm_shldi_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by "imm8" bits, and store the upper 32-bits in "dst".
❌	_mm256_shldi_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by "imm8" bits, and store the upper 32-bits in "dst".
❌	_mm512_shldi_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by "imm8" bits, and store the upper 32-bits in "dst".
❌	_mm_shldi_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by "imm8" bits, and store the upper 64-bits in "dst").
❌	_mm256_shldi_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by "imm8" bits, and store the upper 64-bits in "dst").
❌	_mm512_shldi_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by "imm8" bits, and store the upper 64-bits in "dst").
❌	_mm_shldv_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 16-bits in "dst".
❌	_mm256_shldv_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 16-bits in "dst".
❌	_mm512_shldv_epi16	Concatenate packed 16-bit integers in "a" and "b" producing an intermediate 32-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 16-bits in "dst".
❌	_mm_shldv_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 32-bits in "dst".
❌	_mm256_shldv_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 32-bits in "dst".
❌	_mm512_shldv_epi32	Concatenate packed 32-bit integers in "a" and "b" producing an intermediate 64-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 32-bits in "dst".
❌	_mm_shldv_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 64-bits in "dst".
❌	_mm256_shldv_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 64-bits in "dst".
❌	_mm512_shldv_epi64	Concatenate packed 64-bit integers in "a" and "b" producing an intermediate 128-bit result. Shift the result left by the amount specified in the corresponding element of "c", and store the upper 64-bits in "dst".
❌	_mm_shrdi_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by "imm8" bits, and store the lower 16-bits in "dst".
❌	_mm256_shrdi_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by "imm8" bits, and store the lower 16-bits in "dst".
❌	_mm512_shrdi_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by "imm8" bits, and store the lower 16-bits in "dst".
❌	_mm_shrdi_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by "imm8" bits, and store the lower 32-bits in "dst".
❌	_mm256_shrdi_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by "imm8" bits, and store the lower 32-bits in "dst".
❌	_mm512_shrdi_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by "imm8" bits, and store the lower 32-bits in "dst".
❌	_mm_shrdi_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by "imm8" bits, and store the lower 64-bits in "dst".
❌	_mm256_shrdi_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by "imm8" bits, and store the lower 64-bits in "dst".
❌	_mm512_shrdi_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by "imm8" bits, and store the lower 64-bits in "dst".
❌	_mm_shrdv_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 16-bits in "dst".
❌	_mm256_shrdv_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 16-bits in "dst".
❌	_mm512_shrdv_epi16	Concatenate packed 16-bit integers in "b" and "a" producing an intermediate 32-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 16-bits in "dst".
❌	_mm_shrdv_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 32-bits in "dst".
❌	_mm256_shrdv_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 32-bits in "dst".
❌	_mm512_shrdv_epi32	Concatenate packed 32-bit integers in "b" and "a" producing an intermediate 64-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 32-bits in "dst".
❌	_mm_shrdv_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 64-bits in "dst".
❌	_mm256_shrdv_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 64-bits in "dst".
❌	_mm512_shrdv_epi64	Concatenate packed 64-bit integers in "b" and "a" producing an intermediate 128-bit result. Shift the result right by the amount specified in the corresponding element of "c", and store the lower 64-bits in "dst".

[SadiinsoSnowfall]

x86 AVX512 - FP16 (FP16)

Descriptions omitted for brevity.

Name	Name	Name
❌ _mm_abs_ph	❌ _mm_getmant_ph	❌ _mm256_mask_div_ph
❌ _mm256_abs_ph	❌ _mm256_getmant_ph	❌ _mm512_mask_div_ph
❌ _mm512_abs_ph	❌ _mm512_getmant_ph	❌ _mm512_mask_div_round_ph
❌ _mm_add_ph	❌ _mm512_getmant_round_ph	❌ _mm_mask_fmadd_ph
❌ _mm256_add_ph	❌ _mm_load_ph	❌ _mm256_mask_fmadd_ph
❌ _mm512_add_ph	❌ _mm256_load_ph	❌ _mm512_mask_fmadd_ph
❌ _mm512_add_round_ph	❌ _mm512_load_ph	❌ _mm512_mask_fmadd_round_ph
❌ _mm_cmp_ph_mask	❌ _mm_loadu_ph	🗑 _mm_mask_fmaddsub_ph
❌ _mm256_cmp_ph_mask	❌ _mm256_loadu_ph	🗑 _mm256_mask_fmaddsub_ph
❌ _mm512_cmp_ph_mask	❌ _mm512_loadu_ph	🗑 _mm512_mask_fmaddsub_ph
❌ _mm512_cmp_round_ph_mask	❌ _mm_mask3_fmadd_ph	🗑 _mm512_mask_fmaddsub_round_ph
❌ _mm_cmp_round_sh_mask	❌ _mm256_mask3_fmadd_ph	❌ _mm_mask_fmsub_ph
❌ _mm_cmp_sh_mask	❌ _mm512_mask3_fmadd_ph	❌ _mm256_mask_fmsub_ph
❌ _mm512_cvt_roundepi16_ph	❌ _mm512_mask3_fmadd_round_ph	❌ _mm512_mask_fmsub_ph
❌ _mm512_cvt_roundepi32_ph	🗑 _mm_mask3_fmaddsub_ph	❌ _mm512_mask_fmsub_round_ph
❌ _mm512_cvt_roundepi64_ph	🗑 _mm256_mask3_fmaddsub_ph	🗑 _mm_mask_fmsubadd_ph
❌ _mm512_cvt_roundepu16_ph	🗑 _mm512_mask3_fmaddsub_ph	🗑 _mm256_mask_fmsubadd_ph
❌ _mm512_cvt_roundepu32_ph	🗑 _mm512_mask3_fmaddsub_round_ph	🗑 _mm512_mask_fmsubadd_ph
❌ _mm512_cvt_roundepu64_ph	❌ _mm_mask3_fmsub_ph	🗑 _mm512_mask_fmsubadd_round_ph
❌ _mm512_cvt_roundpd_ph	❌ _mm256_mask3_fmsub_ph	❌ _mm_mask_fnmadd_ph
❌ _mm512_cvt_roundph_epi16	❌ _mm512_mask3_fmsub_ph	❌ _mm256_mask_fnmadd_ph
❌ _mm512_cvt_roundph_epi32	❌ _mm512_mask3_fmsub_round_ph	❌ _mm512_mask_fnmadd_ph
❌ _mm512_cvt_roundph_epi64	🗑 _mm_mask3_fmsubadd_ph	❌ _mm512_mask_fnmadd_round_ph
❌ _mm512_cvt_roundph_epu16	🗑 _mm256_mask3_fmsubadd_ph	❌ _mm_mask_fnmsub_ph
❌ _mm512_cvt_roundph_epu32	🗑 _mm512_mask3_fmsubadd_ph	❌ _mm256_mask_fnmsub_ph
❌ _mm512_cvt_roundph_epu64	🗑 _mm512_mask3_fmsubadd_round_ph	❌ _mm512_mask_fnmsub_ph
❌ _mm512_cvt_roundph_pd	❌ _mm_mask3_fnmadd_ph	❌ _mm512_mask_fnmsub_round_ph
❌ _mm_cvtepi16_ph	❌ _mm256_mask3_fnmadd_ph	❌ _mm_mask_fpclass_ph_mask
❌ _mm256_cvtepi16_ph	❌ _mm512_mask3_fnmadd_ph	❌ _mm256_mask_fpclass_ph_mask
❌ _mm512_cvtepi16_ph	❌ _mm512_mask3_fnmadd_round_ph	❌ _mm512_mask_fpclass_ph_mask
❌ _mm_cvtepi32_ph	❌ _mm_mask3_fnmsub_ph	❌ _mm_mask_getexp_ph
❌ _mm256_cvtepi32_ph	❌ _mm256_mask3_fnmsub_ph	❌ _mm256_mask_getexp_ph
❌ _mm512_cvtepi32_ph	❌ _mm512_mask3_fnmsub_ph	❌ _mm512_mask_getexp_ph
❌ _mm_cvtepi64_ph	❌ _mm512_mask3_fnmsub_round_ph	❌ _mm512_mask_getexp_round_ph
❌ _mm256_cvtepi64_ph	❌ _mm_mask_add_ph	❌ _mm_mask_getmant_ph
❌ _mm512_cvtepi64_ph	❌ _mm256_mask_add_ph	❌ _mm256_mask_getmant_ph
❌ _mm_cvtepu16_ph	❌ _mm512_mask_add_ph	❌ _mm512_mask_getmant_ph
❌ _mm256_cvtepu16_ph	❌ _mm512_mask_add_round_ph	❌ _mm512_mask_getmant_round_ph
❌ _mm512_cvtepu16_ph	❌ _mm_mask_blend_ph	❌ _mm_mask_max_ph
❌ _mm_cvtepu32_ph	❌ _mm256_mask_blend_ph	❌ _mm256_mask_max_ph
❌ _mm256_cvtepu32_ph	❌ _mm512_mask_blend_ph	❌ _mm512_mask_max_ph
❌ _mm512_cvtepu32_ph	❌ _mm_mask_cmp_ph_mask	❌ _mm512_mask_max_round_ph
❌ _mm_cvtepu64_ph	❌ _mm256_mask_cmp_ph_mask	❌ _mm_mask_min_ph
❌ _mm256_cvtepu64_ph	❌ _mm512_mask_cmp_ph_mask	❌ _mm256_mask_min_ph
❌ _mm512_cvtepu64_ph	❌ _mm512_mask_cmp_round_ph_mask	❌ _mm512_mask_min_ph
❌ _mm_cvtpd_ph	❌ _mm_mask_cmp_round_sh_mask	❌ _mm512_mask_min_round_ph
❌ _mm256_cvtpd_ph	❌ _mm_mask_cmp_sh_mask	❌ _mm_mask_mul_ph
❌ _mm512_cvtpd_ph	❌ _mm512_mask_cvt_roundepi16_ph	❌ _mm256_mask_mul_ph
❌ _mm_cvtph_epi16	❌ _mm512_mask_cvt_roundepi32_ph	❌ _mm512_mask_mul_ph
❌ _mm256_cvtph_epi16	❌ _mm512_mask_cvt_roundepi64_ph	❌ _mm512_mask_mul_round_ph
❌ _mm512_cvtph_epi16	❌ _mm512_mask_cvt_roundepu16_ph	❌ _mm_mask_rcp_ph
❌ _mm_cvtph_epi32	❌ _mm512_mask_cvt_roundepu32_ph	❌ _mm256_mask_rcp_ph
❌ _mm256_cvtph_epi32	❌ _mm512_mask_cvt_roundepu64_ph	❌ _mm512_mask_rcp_ph
❌ _mm512_cvtph_epi32	❌ _mm512_mask_cvt_roundpd_ph	❌ _mm_mask_reduce_ph
❌ _mm_cvtph_epi64	❌ _mm512_mask_cvt_roundph_epi16	❌ _mm256_mask_reduce_ph
❌ _mm256_cvtph_epi64	❌ _mm512_mask_cvt_roundph_epi32	❌ _mm512_mask_reduce_ph
❌ _mm512_cvtph_epi64	❌ _mm512_mask_cvt_roundph_epi64	❌ _mm512_mask_reduce_round_ph
❌ _mm_cvtph_epu16	❌ _mm512_mask_cvt_roundph_epu16	❌ _mm_mask_roundscale_ph
❌ _mm256_cvtph_epu16	❌ _mm512_mask_cvt_roundph_epu32	❌ _mm256_mask_roundscale_ph
❌ _mm512_cvtph_epu16	❌ _mm512_mask_cvt_roundph_epu64	❌ _mm512_mask_roundscale_ph
❌ _mm_cvtph_epu32	❌ _mm512_mask_cvt_roundph_pd	❌ _mm512_mask_roundscale_round_ph
❌ _mm256_cvtph_epu32	❌ _mm_mask_cvtepi16_ph	❌ _mm_mask_rsqrt_ph
❌ _mm512_cvtph_epu32	❌ _mm256_mask_cvtepi16_ph	❌ _mm256_mask_rsqrt_ph
❌ _mm_cvtph_epu64	❌ _mm512_mask_cvtepi16_ph	❌ _mm512_mask_rsqrt_ph
❌ _mm256_cvtph_epu64	❌ _mm_mask_cvtepi32_ph	❌ _mm_mask_scalef_ph
❌ _mm512_cvtph_epu64	❌ _mm256_mask_cvtepi32_ph	❌ _mm256_mask_scalef_ph
❌ _mm_cvtph_pd	❌ _mm512_mask_cvtepi32_ph	❌ _mm512_mask_scalef_ph
❌ _mm256_cvtph_pd	❌ _mm_mask_cvtepi64_ph	❌ _mm512_mask_scalef_round_ph
❌ _mm512_cvtph_pd	❌ _mm256_mask_cvtepi64_ph	❌ _mm_mask_sqrt_ph
❌ _mm512_cvtt_roundph_epi16	❌ _mm512_mask_cvtepi64_ph	❌ _mm256_mask_sqrt_ph
❌ _mm512_cvtt_roundph_epi32	❌ _mm_mask_cvtepu16_ph	❌ _mm512_mask_sqrt_ph
❌ _mm512_cvtt_roundph_epi64	❌ _mm256_mask_cvtepu16_ph	❌ _mm512_mask_sqrt_round_ph
❌ _mm512_cvtt_roundph_epu16	❌ _mm512_mask_cvtepu16_ph	❌ _mm_mask_sub_ph
❌ _mm512_cvtt_roundph_epu32	❌ _mm_mask_cvtepu32_ph	❌ _mm256_mask_sub_ph
❌ _mm512_cvtt_roundph_epu64	❌ _mm256_mask_cvtepu32_ph	❌ _mm512_mask_sub_ph
❌ _mm_cvttph_epi16	❌ _mm512_mask_cvtepu32_ph	❌ _mm512_mask_sub_round_ph
❌ _mm256_cvttph_epi16	❌ _mm_mask_cvtepu64_ph	❌ _mm_max_ph
❌ _mm512_cvttph_epi16	❌ _mm256_mask_cvtepu64_ph	❌ _mm256_max_ph
❌ _mm_cvttph_epi32	❌ _mm512_mask_cvtepu64_ph	❌ _mm512_max_ph
❌ _mm256_cvttph_epi32	❌ _mm_mask_cvtpd_ph	❌ _mm512_max_round_ph
❌ _mm512_cvttph_epi32	❌ _mm256_mask_cvtpd_ph	❌ _mm_min_ph
❌ _mm_cvttph_epi64	❌ _mm512_mask_cvtpd_ph	❌ _mm256_min_ph
❌ _mm256_cvttph_epi64	❌ _mm_mask_cvtph_epi16	❌ _mm512_min_ph
❌ _mm512_cvttph_epi64	❌ _mm256_mask_cvtph_epi16	❌ _mm512_min_round_ph
❌ _mm_cvttph_epu16	❌ _mm512_mask_cvtph_epi16	❌ _mm_mul_ph
❌ _mm256_cvttph_epu16	❌ _mm_mask_cvtph_epi32	❌ _mm256_mul_ph
❌ _mm512_cvttph_epu16	❌ _mm256_mask_cvtph_epi32	❌ _mm512_mul_ph
❌ _mm_cvttph_epu32	❌ _mm512_mask_cvtph_epi32	❌ _mm512_mul_round_ph
❌ _mm256_cvttph_epu32	❌ _mm_mask_cvtph_epi64	❌ _mm_permutex2var_ph
❌ _mm512_cvttph_epu32	❌ _mm256_mask_cvtph_epi64	❌ _mm256_permutex2var_ph
❌ _mm_cvttph_epu64	❌ _mm512_mask_cvtph_epi64	❌ _mm512_permutex2var_ph
❌ _mm256_cvttph_epu64	❌ _mm_mask_cvtph_epu16	❌ _mm_permutexvar_ph
❌ _mm512_cvttph_epu64	❌ _mm256_mask_cvtph_epu16	❌ _mm256_permutexvar_ph
❌ _mm512_cvtx_roundph_ps	❌ _mm512_mask_cvtph_epu16	❌ _mm512_permutexvar_ph
❌ _mm512_cvtx_roundps_ph	❌ _mm_mask_cvtph_epu32	❌ _mm_rcp_ph
❌ _mm_cvtxph_ps	❌ _mm256_mask_cvtph_epu32	❌ _mm256_rcp_ph
❌ _mm256_cvtxph_ps	❌ _mm512_mask_cvtph_epu32	❌ _mm512_rcp_ph
❌ _mm512_cvtxph_ps	❌ _mm_mask_cvtph_epu64	❌ _mm_reduce_add_ph
❌ _mm_cvtxps_ph	❌ _mm256_mask_cvtph_epu64	❌ _mm256_reduce_add_ph
❌ _mm256_cvtxps_ph	❌ _mm512_mask_cvtph_epu64	❌ _mm512_reduce_add_ph
❌ _mm512_cvtxps_ph	❌ _mm_mask_cvtph_pd	❌ _mm_reduce_max_ph
❌ _mm_div_ph	❌ _mm256_mask_cvtph_pd	❌ _mm256_reduce_max_ph
❌ _mm256_div_ph	❌ _mm512_mask_cvtph_pd	❌ _mm512_reduce_max_ph
❌ _mm512_div_ph	❌ _mm512_mask_cvtt_roundph_epi16	❌ _mm_reduce_min_ph
❌ _mm512_div_round_ph	❌ _mm512_mask_cvtt_roundph_epi32	❌ _mm256_reduce_min_ph
❌ _mm_fmadd_ph	❌ _mm512_mask_cvtt_roundph_epi64	❌ _mm512_reduce_min_ph
❌ _mm256_fmadd_ph	❌ _mm512_mask_cvtt_roundph_epu16	❌ _mm_reduce_mul_ph
❌ _mm512_fmadd_ph	❌ _mm512_mask_cvtt_roundph_epu32	❌ _mm256_reduce_mul_ph
❌ _mm512_fmadd_round_ph	❌ _mm512_mask_cvtt_roundph_epu64	❌ _mm512_reduce_mul_ph
🗑 _mm_fmaddsub_ph	❌ _mm_mask_cvttph_epi16	❌ _mm_reduce_ph
🗑 _mm256_fmaddsub_ph	❌ _mm256_mask_cvttph_epi16	❌ _mm256_reduce_ph
🗑 _mm512_fmaddsub_ph	❌ _mm512_mask_cvttph_epi16	❌ _mm512_reduce_ph
🗑 _mm512_fmaddsub_round_ph	❌ _mm_mask_cvttph_epi32	❌ _mm512_reduce_round_ph
❌ _mm_fmsub_ph	❌ _mm256_mask_cvttph_epi32	❌ _mm_roundscale_ph
❌ _mm256_fmsub_ph	❌ _mm512_mask_cvttph_epi32	❌ _mm256_roundscale_ph
❌ _mm512_fmsub_ph	❌ _mm_mask_cvttph_epi64	❌ _mm512_roundscale_ph
❌ _mm512_fmsub_round_ph	❌ _mm256_mask_cvttph_epi64	❌ _mm512_roundscale_round_ph
🗑 _mm_fmsubadd_ph	❌ _mm512_mask_cvttph_epi64	❌ _mm_rsqrt_ph
🗑 _mm256_fmsubadd_ph	❌ _mm_mask_cvttph_epu16	❌ _mm256_rsqrt_ph
🗑 _mm512_fmsubadd_ph	❌ _mm256_mask_cvttph_epu16	❌ _mm512_rsqrt_ph
🗑 _mm512_fmsubadd_round_ph	❌ _mm512_mask_cvttph_epu16	❌ _mm_scalef_ph
❌ _mm_fnmadd_ph	❌ _mm_mask_cvttph_epu32	❌ _mm256_scalef_ph
❌ _mm256_fnmadd_ph	❌ _mm256_mask_cvttph_epu32	❌ _mm512_scalef_ph
❌ _mm512_fnmadd_ph	❌ _mm512_mask_cvttph_epu32	❌ _mm512_scalef_round_ph
❌ _mm512_fnmadd_round_ph	❌ _mm_mask_cvttph_epu64	❌ _mm_sqrt_ph
❌ _mm_fnmsub_ph	❌ _mm256_mask_cvttph_epu64	❌ _mm256_sqrt_ph
❌ _mm256_fnmsub_ph	❌ _mm512_mask_cvttph_epu64	❌ _mm512_sqrt_ph
❌ _mm512_fnmsub_ph	❌ _mm512_mask_cvtx_roundph_ps	❌ _mm512_sqrt_round_ph
❌ _mm512_fnmsub_round_ph	❌ _mm512_mask_cvtx_roundps_ph	❌ _mm_store_ph
❌ _mm_fpclass_ph_mask	❌ _mm_mask_cvtxph_ps	❌ _mm256_store_ph
❌ _mm256_fpclass_ph_mask	❌ _mm256_mask_cvtxph_ps	❌ _mm512_store_ph
❌ _mm512_fpclass_ph_mask	❌ _mm512_mask_cvtxph_ps	❌ _mm_storeu_ph
❌ _mm_getexp_ph	❌ _mm_mask_cvtxps_ph	❌ _mm256_storeu_ph
❌ _mm256_getexp_ph	❌ _mm256_mask_cvtxps_ph	❌ _mm512_storeu_ph
❌ _mm512_getexp_ph	❌ _mm512_mask_cvtxps_ph	❌ _mm_sub_ph
❌ _mm512_getexp_round_ph	❌ _mm_mask_div_ph	❌ _mm256_sub_ph
		❌ _mm512_sub_ph
		❌ _mm512_sub_round_ph

[SadiinsoSnowfall]

Removed *_fmaddsub_* and *_fmsubadd_* to mirror SSE3 removal

[SadiinsoSnowfall]

x86 AVX512 - Intersect (VP2INTERSECT)

✓	Name	Description
❌	_mm_2intersect_epi32	Compute intersection of packed 32-bit integer vectors "a" and "b", and store indication of match in the corresponding bit of two mask registers specified by "k1" and "k2". A match in corresponding elements of "a" and "b" is indicated by a set bit in the corresponding bit of the mask registers.
❌	_mm256_2intersect_epi32	Compute intersection of packed 32-bit integer vectors "a" and "b", and store indication of match in the corresponding bit of two mask registers specified by "k1" and "k2". A match in corresponding elements of "a" and "b" is indicated by a set bit in the corresponding bit of the mask registers.
❌	_mm512_2intersect_epi32	Compute intersection of packed 32-bit integer vectors "a" and "b", and store indication of match in the corresponding bit of two mask registers specified by "k1" and "k2". A match in corresponding elements of "a" and "b" is indicated by a set bit in the corresponding bit of the mask registers.
❌	_mm_2intersect_epi64	Compute intersection of packed 64-bit integer vectors "a" and "b", and store indication of match in the corresponding bit of two mask registers specified by "k1" and "k2". A match in corresponding elements of "a" and "b" is indicated by a set bit in the corresponding bit of the mask registers.
❌	_mm256_2intersect_epi64	Compute intersection of packed 64-bit integer vectors "a" and "b", and store indication of match in the corresponding bit of two mask registers specified by "k1" and "k2". A match in corresponding elements of "a" and "b" is indicated by a set bit in the corresponding bit of the mask registers.
❌	_mm512_2intersect_epi64	Compute intersection of packed 64-bit integer vectors "a" and "b", and store indication of match in the corresponding bit of two mask registers specified by "k1" and "k2". A match in corresponding elements of "a" and "b" is indicated by a set bit in the corresponding bit of the mask regi

[DenisYaroshevskiy]

I think the approach of listing all intrinsics is flawed.

1. We explicitly didn't cover a lot of avx512 because we didn't support any machines that'd have those. If that changes - we need first and foremost decide on what are the machines we now care about. And add CI for that.
   Is there a proposal to support more arches?
2. A lot of intrinsics are just a set of instructions under the hood and shouldn't be used.
3. Some intrinsics are only used in some specific context and not in all contexts one might want them.
4. Some intrinsics were not used deliberetly, like 2intersect for example.
5. Some intrinsics are just convinience functions and are not useful

My point is:

• the effort might be good, this is a reasonable proxy for something
• don't overstate it's value pls, the goal of "having all intrinsics" is not a good one.
• please don't add anything that is not tested on ci
• if you want to add an arch to CI and joel is on board, OK - but fyi: CI for avx512 is absolutely brutal, please don't add more than absolutely necessary.

[SadiinsoSnowfall]

The aim of this list is not to have all of Intel's intrinsics greppable in EVE's source code. But rather to find things that are currently missing, mostly due to oversights.

The current list is already a lot smaller than the full intrinsic list, mostly because we (Joel and I) removed a lot of them that are either macros for instruction sequences, semi-deprecated and extremely slow on modern hardware, or just don't fit EVE altogether.

We briefly discussed about grouping the AVX512 extensions into fewer "extension bundles" (hence why the multiple AVX512 lists) so as to simplify both EVE dispatch design, and the total number of machines that would be needed to cover everything in CI.

Furthermore, we have already chosen to remove many of the intrinsics currently on the list either because they didn't passe the above mentioned criterions, or because they were not needed in order to achieve good codegen when using EVE for the functionality they're meant to provide.

This is mainly why this thread is located in the discussion tab and not treated as an issue, the end goal is not to support everything on the list but rather to get a bird's-eye view of what's currently not included in EVE. This approach was already fruitful as some EVE functions were missing x86 backend support for some data types, which lead to non-optimal codegen in some cases.

[DenisYaroshevskiy]

We briefly discussed about grouping the AVX512 extensions into fewer "extension bundles"

let's talk case by case. The problem is not the checking in code, it is CI. Please think about real important CPU you want to support.

missing x86 backend support for some data types

sure - let's do pr by pr.