runtime sve support

[DenisYaroshevskiy]

UPD: current roadblock, you can put a runtime sve register inside wide https://godbolt.org/z/YY7a6vfKG

The more I think about it, the more I believe that we actually have a reasonable opportunity to fit runtime sve into our model.

So far quite a bit of code I wrote, would work no problem with a runtime sve and / or can be tweaked to do so.
If we can't/don't want to support something with runtime sve at the moment - we can just not. But let's support runtime sve where it doesn't cost us anything.

Here is what I see:

New cardinal type

• We need to inroduce eve::relative<T, int pow2>. I don't like the name though, maybe eve::relative_cardnal but we have eve::fixed and not eve::fixed_cardinal.

The idea is that it allows you to specify the cardinal with relation to expected cardinal, so eve::relative<int, -1> - half the expected cardinal for int.

FAQ:

• why include a type? why can't it be eve::relative<-1> and be "half the register"? The problem is, it does not convert between types. wide<tuple<int, double> - what does that have? full or half?

eve::relative<int, -1> is eve::relative<double -2>

• why not just have the size of t in there?
  we can, then it behaves somewhat like a rational number. reg_byte_size * (1 / sizeof(T))^ (part)
  I think might be more confusing.

• what happens on platfroms with fixed registers?
  this becomes just a typedef for fixed

• what if you give us coefficient less that makes reg size 0?
  UB. Or we can assert.

Can we still use fixed?

I can still be useful to do eve::wide<int, eve::fixed<4>>. And we can make it work in case when this is less than the actual register size. So - less than 16 bytes - 100% we can. I think we should.

What about shuffles (one register)?

Well - the good news is that we can do runtime masks. The bad news is that we use constexpr patterns.
I think we'd need a new pattern type - formula. And we store them as formulas.
For sve we just convert the formula to runtime mask.

What about shuffles 2 registers

We will see, I don't have a good idea yet.

Should we do it?

I think yes - 100%, it would be really cool and is not like "that" hard. Even if give people like transform reduce combined with zip, I think the''d be pretty happy.

[DenisYaroshevskiy]

aggregation

Aggregation as is might or might not work depending on can we create an array of sve registers.

Struct with 2 registers we probably can. Also will see

[jfalcou]

Wr Shuffle:
Neon and ppc shuffle are requiring runtime shuffle vector already and it works just fine with constexpr formula that we already support.

What exactly is missing from what we have currently?

[DenisYaroshevskiy]

patter<1, 2,3, 4, 5,...> - needs to know size at compile time. We can't do that with sve_vla.

[jfalcou]

I was thinking of the one usign a lambda as pattern generator. We can then use it at runtime instead of CT

[jfalcou]

Wr cardinal
It could be interesting to see if and how we can make it work with my will to make fixed a NTTP. If we change cardinal handling, let's do it properly and fix everything.

[jfalcou]

we can then have

template<typename T, int Factor> struct relative_cardinal;

template<typename T, int Factor>
inline constexpr relative_cardinal<T,Factor> relative = {};

Check #1195 (comment) for the rest.

[DenisYaroshevskiy]

If you are OK to have two different types - sure. If you like this one better.

But can we do that in parts?

wide<typename T, typename N> and
wide<arithmetic_scalar T, cardinal auto N> struct wide?

[jfalcou]

Sure of course. The type to auto change will be a large endeavour anyway.

[DenisYaroshevskiy]

I mean I don't know how to do it. What's the migration plan?

[jfalcou]

We can add the relative cardinal , make a concept for it and fixed. And have that working. Then we can move to nttp.

[jfalcou]

For the sve register in a struct, IIRC there is a arm specific macro for allowing them that sya the struct is sizeless itself.

[jfalcou]

__sizeless_struct is the thing. Need to be put in a macro as it has to be applied to any struct containing a sve vla type.

[DenisYaroshevskiy]

Couldn't do it. Don't think it's a thing.

https://godbolt.org/z/ocGrdjYG8
https://bugs.launchpad.net/ubuntu/+source/sleef/+bug/1894146

[DenisYaroshevskiy]

I don't think it's a thing: https://github.com/gcc-mirror/gcc/blob/16e2427f50c208dfe07d07f18009969502c25dc8/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/sizeless-2.c#L1

[DenisYaroshevskiy]

Asked on StackOverflow just in case: https://stackoverflow.com/questions/73210512/arm-sve-wrapping-runtime-sized-register

[jfalcou]

looking around seems this is a ARM compiler extension ...