From dcb70e9d145d93368717b16c68d1f764b31524e3 Mon Sep 17 00:00:00 2001
From: zjli2019 <zhengji.li@ingchips.com>
Date: Tue, 7 Mar 2023 18:01:32 +0800
Subject: [PATCH] fix SYSCTRL_CacheControl

---
 src/FWlib/peripheral_sysctrl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/FWlib/peripheral_sysctrl.c b/src/FWlib/peripheral_sysctrl.c
index f37b51eef..5d29e91f6 100644
--- a/src/FWlib/peripheral_sysctrl.c
+++ b/src/FWlib/peripheral_sysctrl.c
@@ -1026,7 +1026,7 @@ void SYSCTRL_SelectMemoryBlocks(uint32_t block_map)
 void SYSCTRL_CacheControl(SYSCTRL_CacheMemCtrl i_cache, SYSCTRL_CacheMemCtrl d_cache)
 {
     #define IC_BASE 0x40140000
-    #define DC_BASE 0x40140000
+    #define DC_BASE 0x40141000
 
     uint8_t v = (i_cache << 1) | d_cache;
     if (SYSCTRL_MEM_BLOCK_AS_CACHE != i_cache)