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Reduce number of stages and target density
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hpretl committed Mar 14, 2024
1 parent 20ceaf6 commit b58a592
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Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion src/config.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@

# PL_TARGET_DENSITY - You can increase this if Global Placement fails with error GPL-0302.
# Users have reported that values up to 0.8 worked well for them.
set ::env(PL_TARGET_DENSITY) 0.77
set ::env(PL_TARGET_DENSITY) 0.7

# CLOCK_PERIOD - Increase this in case you are getting setup time violations.
# The value is in nanoseconds, so 20ns == 50MHz.
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2 changes: 1 addition & 1 deletion src/tt_um_hpretl_tt06_tdc.v
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ module tt_um_hpretl_tt06_tdc (
input wire rst_n // Async to clk
);

localparam N_DELAY = 256;
localparam N_DELAY = 192;

// All output pins must be assigned. If not used, assign to 0.
assign uio_out[7:0] = 8'b0;
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