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iic-jku / jku-tt06-tdc-v1 Public

generated from TinyTapeout/tt06-verilog-template

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First cut of a working implementation, mixed-signal sim still missing… #3

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First cut of a working implementation, mixed-signal sim still missing…

First cut of a working implementation, mixed-signal sim still missing… #3

Summary
Jobs
- gds
- precheck
- gl_test
- viewer
Run details
- Usage
- Workflow file

Usage Workflow file

Run time

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Job	Run time
gds	46s
viewer	0s
precheck	0s
gl_test	0s
	46s

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