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gds
gds #21: Manually run by hpretl
April 12, 2024 12:27 7m 47s main
April 12, 2024 12:27 7m 47s
Update info.md
gds #20: Commit beeb8db pushed by hpretl
March 17, 2024 12:48 6m 10s main
March 17, 2024 12:48 6m 10s
Update info.md
test #20: Commit beeb8db pushed by hpretl
March 17, 2024 12:48 28s main
March 17, 2024 12:48 28s
Update info.md
docs #20: Commit beeb8db pushed by hpretl
March 17, 2024 12:48 1m 15s main
March 17, 2024 12:48 1m 15s
Rename to tdc_v1
test #19: Commit d6d0274 pushed by hpretl
March 17, 2024 12:30 38s main
March 17, 2024 12:30 38s
Rename to tdc_v1
docs #19: Commit d6d0274 pushed by hpretl
March 17, 2024 12:30 1m 30s main
March 17, 2024 12:30 1m 30s
Rename to tdc_v1
gds #19: Commit d6d0274 pushed by hpretl
March 17, 2024 12:30 6m 10s main
March 17, 2024 12:30 6m 10s
Change to build toplevel for TDC in TT harness
test #18: Commit 494fb4a pushed by hpretl
March 17, 2024 11:56 30s main
March 17, 2024 11:56 30s
Change to build toplevel for TDC in TT harness
gds #18: Commit 494fb4a pushed by hpretl
March 17, 2024 11:56 5m 51s main
March 17, 2024 11:56 5m 51s
Change to build toplevel for TDC in TT harness
docs #18: Commit 494fb4a pushed by hpretl
March 17, 2024 11:56 1m 12s main
March 17, 2024 11:56 1m 12s
Merge branch 'sim' into main
docs #17: Commit 1d3b157 pushed by hpretl
March 17, 2024 11:37 1m 5s main
March 17, 2024 11:37 1m 5s
Merge branch 'sim' into main
test #17: Commit 1d3b157 pushed by hpretl
March 17, 2024 11:37 41s main
March 17, 2024 11:37 41s
Merge branch 'sim' into main
gds #17: Commit 1d3b157 pushed by hpretl
March 17, 2024 11:37 6m 0s main
March 17, 2024 11:37 6m 0s
Adding RAW files
gds #16: Commit 413308a pushed by hpretl
March 17, 2024 11:36 5m 25s main
March 17, 2024 11:36 5m 25s
Adding RAW files
docs #16: Commit 413308a pushed by hpretl
March 17, 2024 11:36 1m 13s main
March 17, 2024 11:36 1m 13s
Adding RAW files
test #16: Commit 413308a pushed by hpretl
March 17, 2024 11:36 30s main
March 17, 2024 11:36 30s
Simulation results for simple and interleaved TDC
test #15: Commit 96e87a3 pushed by hpretl
March 17, 2024 11:35 31s main
March 17, 2024 11:35 31s
Simulation results for simple and interleaved TDC
gds #15: Commit 96e87a3 pushed by hpretl
March 17, 2024 11:35 5m 33s main
March 17, 2024 11:35 5m 33s
Simulation results for simple and interleaved TDC
docs #15: Commit 96e87a3 pushed by hpretl
March 17, 2024 11:35 1m 9s main
March 17, 2024 11:35 1m 9s
Adding RAW files
test #14: Commit 298588a pushed by hpretl
March 17, 2024 11:17 29s sim
sim
March 17, 2024 11:17 29s
Adding RAW files
gds #14: Commit 298588a pushed by hpretl
March 17, 2024 11:17 5m 47s sim
sim
March 17, 2024 11:17 5m 47s
Adding RAW files
docs #14: Commit 298588a pushed by hpretl
March 17, 2024 11:17 1m 20s sim
sim
March 17, 2024 11:17 1m 20s
Simulation results for simple and interleaved TDC
test #13: Commit 96e87a3 pushed by hpretl
March 17, 2024 11:16 51s sim
sim
March 17, 2024 11:16 51s
Simulation results for simple and interleaved TDC
docs #13: Commit 96e87a3 pushed by hpretl
March 17, 2024 11:16 1m 35s sim
sim
March 17, 2024 11:16 1m 35s
Simulation results for simple and interleaved TDC
gds #13: Commit 96e87a3 pushed by hpretl
March 17, 2024 11:16 5m 33s sim
sim
March 17, 2024 11:16 5m 33s