Plexers with enable port?

[effha]

If I am not wrong, all real multiplexer/decoder/demultiplexer chips have enable inputs. The plexers in Digital unfortunately do not have them.
I was able to replace the decoder with a 1-bit demultiplexer where the input corresponds to the enable (tell me if I'm wrong with this solution).
But with the multiplexer, I had to trick by connecting a driver (combined with pulldown resistor) after it. The sel then corresponds to enable and only sel=1 lets the signals of the multiplexer through.
In Logisim there are plexers with (selectable) enable, would it be possible to implement them in Digital as well? Preferably also selectable.

[hneemann]

What should be output if not enabled? Zero or high impedance?
If high impedance is to be output, a driver can be used, if zero is to be output, an AND gate can be connected in series.

[prlaba]

Each section of the 74139 dual 2-line to 4-line decoder/demultiplexer chip has a /G enable pin. That chip uses inverted outputs, so when its /G enable pin is inactive (high) the four output are high. This is an invalid state when the /G input is active (low).

Some other multiplexer/demultiplexer/decoder chips with enable pins have positive (non-inverted) outputs. In that case the outputs would be all low when the enable pin is active.

I don't know of any multiplexer/demultiplexer/decoder chips with tri-state outputs, so when the enable pin is active, inverted outputs should be set to high and non-inverted outputs set to low.

So it would not be straightforward for Digital to provide an enable input for its multiplexers, demultiplexers and decoders unless it also added an attribute indicating if the outputs are positive or inverted.

It seems easier is to simply choose the desired multiplexer, demultiplexer and/or decoder chip from Digital's DIL -> 74xx -> Plexers library. It includes all the popular chips, with the needed enable pins and correct-polarity outputs.

[effha]

I looked at the 74xx DILS, they only handle 1 bit. Now I need 4 and 8 bits width.

[prlaba]

ehffa, all of the 74xx multiplexer/demultiplexer/decoder chips I know of have 4-bit inputs or 4-bit outputs, some are dual sections.

For the more complex chips, I find it useful to use the actual 74xx chips that I would use to build my circuits, rather than native components that might not correspond to any actual chip. if you can't find the chip you need in the library, you can easily create your own, as a subcircuit,

[effha]

ehffa, all of the 74xx multiplexer/demultiplexer/decoder chips I know of have 4-bit inputs or 4-bit outputs, some are dual sections.

I meant the bit width of the bus that I want to process with it. The number of inputs/outputs results inevitably from the dual system. And the most 74xx chips have only 1 bit width, that i would have to use them n times for a n-bus.
But @hneemann has shown below all solutions for my question. 👍

For the more complex chips, I find it useful to use the actual 74xx chips that I would use to build my circuits, rather than native components that might not correspond to any actual chip. if you can't find the chip you need in the library, you can easily create your own, as a subcircuit,

I rather like the symbols instead of the DIL chips. So I can see the plexer on first view at the trapezoid shape.

[effha]

I'm currently trying my hand at the 4Bit CPU of the Minecraftmonkeys. As noob in Digital it's a nice starter project for me. In Logisim it worked fine (I even understood it🙄).

ATM i need zeros when not enabled, which i get with my solution in the starter thread.

[hneemann]

[hneemann]

@effha
In fact, there is no difference in function between the solution with the AND gate and the one with the driver with pull down. However, the performance of the simulation is improved by using the AND gate variant.

[effha]

Thanks, I have just deleted my answer to test before which variant is faster. This was the screenshot:

This also clarifies the matter 😊. I will use the AND method.

[mhpolymath]

@hneemann

How does the decoder with enable (top left) work? There isn't any place to input the enable from the left side. i tried running it, but that didn't work. Also, is there a chance that you would implement the enable bit with the plexers? Thank you

P.S.
Can I create my own components in Digital? so I could make the circuits shown and use them directly as plexers with enable?

[hneemann]

There isn't any place to input the enable from the left side.

The pin labeled en is the enable pin if a demuxer is used as a decoder. If en is set to low, all outputs are low regardless of the sel bits.

Can I create my own components in Digital? so I could make the circuits shown and use them directly as plexers with enable?

Each file stored in the same directory is a sub-circuit that can be used.

[mhpolymath]

That's great, it worked. Thank you!
Is there a way to give the circuit a custom shape so I can make it look like the usual decoder maybe?

Because currently it looks like this:

[hneemann]

If you want it to look like the demuxer, just use the demuxer. 😄
If you want to use your own shape, you can select "user defined" in the circuit settings. Then you can create a template with the "Template" button, edit the created svg-file with a tool of your choice and import the edited file afterwards.

[mhpolymath]

you see, I myself don't care about the shape as long as the function is correct. However, my professor is very stubborn about using Logisim 🥲, but it doesn't work on my laptop, and I like digital, so I need to make it look like I'm using logisim when I submit my work to him... I'll try to do what you suggested, hope I can make it work.