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Dev/sync time validity #61
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Dev/sync time validity #61
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Poofjunior
commented
Nov 18, 2024
- Added supplementary logic analyzer waveform
- Added microcontroller cpp code for interpretting the received timestamp data as the current time.
- Added link to a full state machine example for clocking in the timestamp byte-by-byte.
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The connector pinout for a device *receiving* the timestamp is shown below: | ||
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!["SynchReceiverSchematic](./assets/harp_clock_sync_receiver.png) |
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Should we explicitly state that the subordinate device is expected to provide power to the clock generator power? (prob redundant with the drawing, but still)
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