lecture24.tex

\chapter{I/O}

\section{Thrashing}
Thrashing occurs when the processor encounters page faults so frequently that the time spent resolving the page faults overwhelms the time spent performing the computations. 

\section{Input/Output}
Any transfer of information to or from the CPU/memory (e.g. interaction with keyboards, speakers, etc.) is considered I/O. 

\subsection{Memory Mapped I/O}
\begin{itemize}
    \item A portion of memory is dedicated for communicating with I/O devices
    \item Addresses in this area correspond to different I/O devices
    \item When the CPU wants to send information to an I/O device, it writes to the device corresponding to a specific memory address
\end{itemize}

\subsection{Polling}
The CPU periodically checks the status register to see if there is any data to receive. Polling reads from control register in loop and waits for the device to set the ready bit. The processor then loads from input or writes to output. Polling typically occurs while we are performing a context switch.

\section{Direct Memory Access}
The DMA engine controls movement of data between the memory and the I/O devices such that the CPU can do other work.

\medskip

When we have incoming dat, the DMA performs the following:
\begin{enumerate}
    \item Receive interrupt from device
    \item CPU takes interrupt, initiates transfer $\implies$ Instructs DMA engine to place data at certain address
    \item DMA engine handles the transfer $\implies$ CPU is free to execute other things
    \item Upon completion, DMA engine interrupts the CPU again
\end{enumerate}