diff --git a/CMakeLists.txt b/CMakeLists.txt
index 3a1a3557..467a7062 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -60,6 +60,14 @@ if( VVDEC_ENABLE_ARM_SIMD )
   add_compile_definitions( TARGET_SIMD_ARM )
 endif()
 
+if( VVDEC_ENABLE_X86_SIMD OR VVDEC_ENABLE_ARM_SIMD )
+  if( "${CMAKE_SYSTEM_PROCESSOR}" MATCHES "armv7|arm.*eabi"
+      OR "${CMAKE_CXX_COMPILER}" MATCHES "armv7|arm.*eabi"
+      OR "${CMAKE_OSX_ARCHITECTURES}" MATCHES "armv7" )
+    message( WARNING "You are building for armv7 which is knnow to be broken. As a workaround, disable SIMD at runtime or build with VVDEC_ENABLE_X86_SIMD=0 and VVDEC_ENABLE_ARM_SIMD=0." )
+  endif()
+endif()
+
 if( ${CMAKE_SYSTEM_NAME} STREQUAL "Emscripten" )
   set( VVDEC_TARGET_WASM TRUE )
 
diff --git a/source/Lib/CommonLib/arm/BufferARM.h b/source/Lib/CommonLib/arm/BufferARM.h
index 9632533e..c5eefaee 100644
--- a/source/Lib/CommonLib/arm/BufferARM.h
+++ b/source/Lib/CommonLib/arm/BufferARM.h
@@ -367,6 +367,8 @@ void applyLut_SIMD( Pel* ptr, ptrdiff_t ptrStride, int width, int height, const
   return;
 }
 
+#  if __ARM_ARCH >= 8
+
 template<ARM_VEXT vext>
 void rspBcwCore_SIMD( Pel*       ptr,
                       ptrdiff_t  ptrStride,
@@ -616,6 +618,8 @@ void rspFwdCore_SIMD( Pel*       ptr,
   }
 }
 
+#    endif   // __ARM_ARCH >= 8
+
 template<ARM_VEXT vext>
 void PelBufferOps::_initPelBufOpsARM()
 {
@@ -639,9 +643,11 @@ void PelBufferOps::_initPelBufOpsARM()
   //  transpose4x4 = transposePel_SSE<vext, 4>;
   //  transpose8x8 = transposePel_SSE<vext, 8>;
 
-  rspFwd   = rspFwdCore_SIMD<vext>;
   applyLut = applyLut_SIMD<vext>;
+#    if __ARM_ARCH >= 8
+  rspFwd   = rspFwdCore_SIMD<vext>;
   //  rspBcw   = rspBcwCore_SIMD<vext>;     // disabled, because applyLut is faster
+#    endif   // __ARM_ARCH >= 8
 
   // #if INTPTR_MAX == INT64_MAX || INTPTR_MAX == INT32_MAX
   //   fillN_CU = fillN_CU_SIMD<vext>;
@@ -651,7 +657,8 @@ void PelBufferOps::_initPelBufOpsARM()
 }
 
 template void PelBufferOps::_initPelBufOpsARM<SIMDARM>();
-}
+
+}   // namespace vvdec
 
 #  endif   // TARGET_SIMD_ARM
 #endif     // ENABLE_SIMD_OPT_BUFFER
diff --git a/source/Lib/CommonLib/arm/InterpolationFilterARM.h b/source/Lib/CommonLib/arm/InterpolationFilterARM.h
index 82bbd504..e50f5e7f 100644
--- a/source/Lib/CommonLib/arm/InterpolationFilterARM.h
+++ b/source/Lib/CommonLib/arm/InterpolationFilterARM.h
@@ -52,11 +52,13 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "CommonLib/CommonDef.h"
 #include "../InterpolationFilter.h"
 
-#ifdef TARGET_SIMD_ARM
 
 namespace vvdec
 {
 
+#ifdef TARGET_SIMD_ARM
+#  if __ARM_ARCH >= 8
+
 template<ARM_VEXT vext>
 static void simdInterpolateN2_2D( const ClpRng&       clpRng,
                                   const Pel*          src,
@@ -378,8 +380,16 @@ void InterpolationFilter::_initInterpolationFilterARM()
   //  m_weightedGeoBlk = xWeightedGeoBlk_SSE<vext>;
 }
 
-template void InterpolationFilter::_initInterpolationFilterARM<SIMDARM>();
+#  else    //  !__ARM_ARCH >= 8
 
-}   // namespace vvdec
+template<ARM_VEXT vext>
+void InterpolationFilter::_initInterpolationFilterARM()
+{}
+
+#  endif   //  !__ARM_ARCH >= 8
+
+template void InterpolationFilter::_initInterpolationFilterARM<SIMDARM>();
 
 #endif   // #ifdef TARGET_SIMD_ARM
+
+}   // namespace vvdec
diff --git a/source/Lib/CommonLib/arm/RdCostARM.h b/source/Lib/CommonLib/arm/RdCostARM.h
index 33c99947..9701e3f4 100644
--- a/source/Lib/CommonLib/arm/RdCostARM.h
+++ b/source/Lib/CommonLib/arm/RdCostARM.h
@@ -55,6 +55,7 @@ namespace vvdec
 {
 
 #ifdef TARGET_SIMD_ARM
+#  if __ARM_ARCH >= 8
 
 template<ARM_VEXT vext, bool isWdt16>
 Distortion xGetSAD_MxN_SIMD( const DistParam& rcDtParam )
@@ -251,6 +252,14 @@ void RdCost::_initRdCostARM()
   m_afpDistortFuncX5[ DF_SAD16 ] = xGetSADX5_16xN_SIMD<vext>;
 }
 
+#  else    // !__ARM_ARCH >= 8
+
+template<ARM_VEXT vext>
+void RdCost::_initRdCostARM()
+{}
+
+#  endif   // !__ARM_ARCH >= 8
+
 template void RdCost::_initRdCostARM<SIMDARM>();
 
 #endif   // TARGET_SIMD_ARM