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Merge pull request #148 from K-os/fix_armv7_build
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Fix armv7 build (building only! running with simd still broken)
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adamjw24 authored Jun 30, 2023
2 parents 24486d8 + 97c6561 commit 262f9f3
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Showing 4 changed files with 39 additions and 5 deletions.
8 changes: 8 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -60,6 +60,14 @@ if( VVDEC_ENABLE_ARM_SIMD )
add_compile_definitions( TARGET_SIMD_ARM )
endif()

if( VVDEC_ENABLE_X86_SIMD OR VVDEC_ENABLE_ARM_SIMD )
if( "${CMAKE_SYSTEM_PROCESSOR}" MATCHES "armv7|arm.*eabi"
OR "${CMAKE_CXX_COMPILER}" MATCHES "armv7|arm.*eabi"
OR "${CMAKE_OSX_ARCHITECTURES}" MATCHES "armv7" )
message( WARNING "You are building for armv7 which is knnow to be broken. As a workaround, disable SIMD at runtime or build with VVDEC_ENABLE_X86_SIMD=0 and VVDEC_ENABLE_ARM_SIMD=0." )
endif()
endif()

if( ${CMAKE_SYSTEM_NAME} STREQUAL "Emscripten" )
set( VVDEC_TARGET_WASM TRUE )

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11 changes: 9 additions & 2 deletions source/Lib/CommonLib/arm/BufferARM.h
Original file line number Diff line number Diff line change
Expand Up @@ -367,6 +367,8 @@ void applyLut_SIMD( Pel* ptr, ptrdiff_t ptrStride, int width, int height, const
return;
}

# if __ARM_ARCH >= 8

template<ARM_VEXT vext>
void rspBcwCore_SIMD( Pel* ptr,
ptrdiff_t ptrStride,
Expand Down Expand Up @@ -616,6 +618,8 @@ void rspFwdCore_SIMD( Pel* ptr,
}
}

# endif // __ARM_ARCH >= 8

template<ARM_VEXT vext>
void PelBufferOps::_initPelBufOpsARM()
{
Expand All @@ -639,9 +643,11 @@ void PelBufferOps::_initPelBufOpsARM()
// transpose4x4 = transposePel_SSE<vext, 4>;
// transpose8x8 = transposePel_SSE<vext, 8>;

rspFwd = rspFwdCore_SIMD<vext>;
applyLut = applyLut_SIMD<vext>;
# if __ARM_ARCH >= 8
rspFwd = rspFwdCore_SIMD<vext>;
// rspBcw = rspBcwCore_SIMD<vext>; // disabled, because applyLut is faster
# endif // __ARM_ARCH >= 8

// #if INTPTR_MAX == INT64_MAX || INTPTR_MAX == INT32_MAX
// fillN_CU = fillN_CU_SIMD<vext>;
Expand All @@ -651,7 +657,8 @@ void PelBufferOps::_initPelBufOpsARM()
}

template void PelBufferOps::_initPelBufOpsARM<SIMDARM>();
}

} // namespace vvdec

# endif // TARGET_SIMD_ARM
#endif // ENABLE_SIMD_OPT_BUFFER
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16 changes: 13 additions & 3 deletions source/Lib/CommonLib/arm/InterpolationFilterARM.h
Original file line number Diff line number Diff line change
Expand Up @@ -52,11 +52,13 @@ POSSIBILITY OF SUCH DAMAGE.
#include "CommonLib/CommonDef.h"
#include "../InterpolationFilter.h"

#ifdef TARGET_SIMD_ARM

namespace vvdec
{

#ifdef TARGET_SIMD_ARM
# if __ARM_ARCH >= 8

template<ARM_VEXT vext>
static void simdInterpolateN2_2D( const ClpRng& clpRng,
const Pel* src,
Expand Down Expand Up @@ -378,8 +380,16 @@ void InterpolationFilter::_initInterpolationFilterARM()
// m_weightedGeoBlk = xWeightedGeoBlk_SSE<vext>;
}

template void InterpolationFilter::_initInterpolationFilterARM<SIMDARM>();
# else // !__ARM_ARCH >= 8

} // namespace vvdec
template<ARM_VEXT vext>
void InterpolationFilter::_initInterpolationFilterARM()
{}

# endif // !__ARM_ARCH >= 8

template void InterpolationFilter::_initInterpolationFilterARM<SIMDARM>();

#endif // #ifdef TARGET_SIMD_ARM

} // namespace vvdec
9 changes: 9 additions & 0 deletions source/Lib/CommonLib/arm/RdCostARM.h
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,7 @@ namespace vvdec
{

#ifdef TARGET_SIMD_ARM
# if __ARM_ARCH >= 8

template<ARM_VEXT vext, bool isWdt16>
Distortion xGetSAD_MxN_SIMD( const DistParam& rcDtParam )
Expand Down Expand Up @@ -251,6 +252,14 @@ void RdCost::_initRdCostARM()
m_afpDistortFuncX5[ DF_SAD16 ] = xGetSADX5_16xN_SIMD<vext>;
}

# else // !__ARM_ARCH >= 8

template<ARM_VEXT vext>
void RdCost::_initRdCostARM()
{}

# endif // !__ARM_ARCH >= 8

template void RdCost::_initRdCostARM<SIMDARM>();

#endif // TARGET_SIMD_ARM
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