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Enable ECMP_MEMBER_WIDTH_INTROSPECTION for J3
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Summary: As titled. This is needed for 12.x 2K ECMP support

Reviewed By: jasmeetbagga

Differential Revision: D66855269

fbshipit-source-id: 39d66cf50ca4602d3ea5f54d489abf08b48a1f20
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Ron He authored and facebook-github-bot committed Dec 6, 2024
1 parent 230b933 commit 6a33c35
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion fboss/agent/hw/switch_asics/Jericho3Asic.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -98,6 +98,7 @@ bool Jericho3Asic::isSupported(Feature feature) const {
case HwAsic::Feature::INGRESS_SRAM_MIN_BUFFER_WATERMARK:
case HwAsic::Feature::FDR_FIFO_WATERMARK:
case HwAsic::Feature::EGRESS_CELL_ERROR_STATS:
case HwAsic::Feature::ECMP_MEMBER_WIDTH_INTROSPECTION:
return true;
// Features not expected to work on SIM
case HwAsic::Feature::SHARED_INGRESS_EGRESS_BUFFER_POOL:
Expand Down Expand Up @@ -149,7 +150,6 @@ bool Jericho3Asic::isSupported(Feature feature) const {
case HwAsic::Feature::SAI_MPLS_LABEL_LOOKUP_FAIL_COUNTER:
case HwAsic::Feature::EXACT_MATCH:
case HwAsic::Feature::RX_FREQUENCY_PPM:
case HwAsic::Feature::ECMP_MEMBER_WIDTH_INTROSPECTION:
case HwAsic::Feature::SAI_FIRMWARE_PATH:
// On Jericho3 ASIC we don't create any vlans but rather
// associate RIFs directly with ports. Hence no bridge port
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