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Very slow Cace simulation on ulpcomp2 input offset example #74
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Hi, thanks for the bug report! The repository for sky130_icrg_ip__ulpcomp is here: https://github.com/efabless/sky130_icrg_ip__ulpcomp/ And the problematic parameter is that one here, right? https://github.com/efabless/sky130_icrg_ip__ulpcomp/blob/e0244073f7b21e02c1f6d787516cf0ae9cfe5436/cace/sky130_icrg_ip__ulpcomp2.txt#L425 I've seen something similar with a transient simulation as well. Are you getting a lot of "Reference value" output? Are you running CACE via GUI or CLI? If you are working via cli, could you try passing |
Yes, Correct repo and correct file. There are 2 sims that are dying in what appears to be similar manner. Both output enormous amounts of Reference value data to the GUI. Tim runs the same config file and it finishes in minutes for him. Mine is still going after 20 minutes with 8 railed CPU cores. Sequential might be a good workaround but is not a fix. I will try it today. |
Thanks! I just ran it on my side (fresh pull) and here it seems to work well:
I believe it could be a tooling issue. I am using Nix to set up my tools, it uses the stable version of ngspice. My PDK is Which tool and PDK versions do you use? |
Taking a second look at it, it doesn't seem to work well ^^
Is the repository in a working state? I am asking because I had to replace some |
I'm having the issue after swithing to a prereease version of the PDK that Tim requested. Also note that there are a lot of convergence related comments in the terminal. I suspect either a models issue or an environment setting variable around convergence or ngspice setup that is missing from the default config information. |
cell is ~/cheetah_v3_analog/dependencies/sky130_icrg_ip__ulpcomp/
Run time is exceptionally long for me but about 100x faster for Tim. Suspect an IO setting difference that Tim has set but I have not.
The simulation with the speed problem is input offset voltage
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