VHDL modules for constructing SoCs. No one should actually use these. I did a minimal amount of smokscreen testing, but nothing boyond that. Making perfect modules was not the point of this project... It would take far more time than I want to dedicate to do the verification work required for me to feel "very confident" that these work as intended. This project was stareted because I wanted to learn about the RISC-V architecture and have a somewhat interesting final product in the end.