diff --git a/minichlink/minichlink.c b/minichlink/minichlink.c
index 5edf72a4..327f9a99 100644
--- a/minichlink/minichlink.c
+++ b/minichlink/minichlink.c
@@ -178,6 +178,8 @@ int main( int argc, char ** argv )
 	PostSetupConfigureInterface( dev );
 //	TestFunction( dev );
 
+	MCF.WriteReg32( dev, DMABSTRACTCS, 0x08000702 ); // Clear out any dmabstractcs errors.
+
 	int iarg = 1;
 	const char * lastcommand = 0;
 	for( ; iarg < argc; iarg++ )
@@ -819,15 +821,16 @@ static int DefaultWaitForDoneOp( void * dev, int ignore )
 {
 	int r;
 	uint32_t rrv;
+	int timeout = 100;
 
 	do
 	{
 		r = MCF.ReadReg32( dev, DMABSTRACTCS, &rrv );
 		if( r ) return r;
 	}
-	while( rrv & (1<<12) );
+	while( (rrv & (1<<12)) && timeout-- );
 
-	if( (rrv >> 8 ) & 7 )
+	if( ((rrv >> 8 ) & 7) || (rrv & (1<<12)) )
 	{
 		if( !ignore )
 		{
@@ -878,7 +881,7 @@ int DefaultSetupInterface( void * dev )
 	}
 	else
 	{
-		fprintf( stderr, "Error: Could not read chip code.\n" );
+		fprintf( stderr, "Error: Could not read dmstatus.\n" );
 		return r;
 	}
 
@@ -1502,7 +1505,6 @@ static int DefaultReadWord( void * dev, uint32_t address_to_read, uint32_t * dat
 
 		iss->statetag = STTAG( "RDSQ" );
 		iss->currentstateval = address_to_read;
-
 		r |= MCF.WaitForDoneOp( dev, 0 );
 		if( r ) fprintf( stderr, "Fault on DefaultReadWord Part 1\n" );
 	}
@@ -1833,7 +1835,6 @@ int DefaultReadBinaryBlob( void * dev, uint32_t address_to_read_from, uint32_t r
 	{
 		int r;
 		int remain = rend - rpos;
-
 		if( ( rpos & 3 ) == 0 && remain >= 4 )
 		{
 			uint32_t rw;
@@ -1880,6 +1881,7 @@ int DefaultReadBinaryBlob( void * dev, uint32_t address_to_read_from, uint32_t r
 			}
 		}
 	}
+
 	int r = MCF.WaitForDoneOp( dev, 0 );
 	if( r ) fprintf( stderr, "Fault on DefaultReadBinaryBlob\n" );
 	return r;
diff --git a/minichlink/minichlink.h b/minichlink/minichlink.h
index 0e784822..e62fca0b 100644
--- a/minichlink/minichlink.h
+++ b/minichlink/minichlink.h
@@ -168,6 +168,7 @@ struct InternalState
 #define DMPROGBUF5     0x25
 #define DMPROGBUF6     0x26
 #define DMPROGBUF7     0x27
+#define DMHALTSUM0     0x40
 
 #define DMCPBR       0x7C
 #define DMCFGR       0x7D
diff --git a/minichlink/pgm-esp32s2-ch32xx.c b/minichlink/pgm-esp32s2-ch32xx.c
index 090da555..87ba9892 100644
--- a/minichlink/pgm-esp32s2-ch32xx.c
+++ b/minichlink/pgm-esp32s2-ch32xx.c
@@ -281,14 +281,6 @@ int ESPBlockWrite64( void * dev, uint32_t address_to_write, uint8_t * data )
 	return (char)eps->reply[1];
 }
 
-int ESPPerformSongAndDance( void * dev )
-{
-	struct ESP32ProgrammerStruct * eps = (struct ESP32ProgrammerStruct *)dev;
-	Write2LE( eps, 0x01fe );
-	ESPFlushLLCommands( dev );	
-	return 0;
-}
-
 int ESPVoidHighLevelState( void * dev )
 {
 	struct ESP32ProgrammerStruct * eps = (struct ESP32ProgrammerStruct *)dev;
@@ -427,19 +419,16 @@ void * TryInit_ESP32S2CHFUN()
 	MCF.Control3v3 = ESPControl3v3;
 	MCF.Exit = ESPExit;
 	MCF.VoidHighLevelState = ESPVoidHighLevelState;
-	MCF.PollTerminal = ESPPollTerminal;
+	MCF.VendorCommand = ESPVendorCommand;
 
 	// These are optional. Disabling these is a good mechanismto make sure the core functions still work.
-	MCF.WriteWord = ESPWriteWord;
-	MCF.ReadWord = ESPReadWord;
-
-	MCF.WaitForFlash = ESPWaitForFlash;
-	MCF.WaitForDoneOp = ESPWaitForDoneOp;
+//	MCF.PollTerminal = ESPPollTerminal;
+//	MCF.WriteWord = ESPWriteWord;
+//	MCF.ReadWord = ESPReadWord;
+//	MCF.WaitForFlash = ESPWaitForFlash;
+//	MCF.WaitForDoneOp = ESPWaitForDoneOp;
+//	MCF.BlockWrite64 = ESPBlockWrite64;
 
-	MCF.PerformSongAndDance = ESPPerformSongAndDance;
-
-	MCF.BlockWrite64 = ESPBlockWrite64;
-	MCF.VendorCommand = ESPVendorCommand;
 
 	// Reset internal programmer state.
 	Write2LE( eps, 0x0afe );
@@ -450,6 +439,8 @@ void * TryInit_ESP32S2CHFUN()
 	{
 		eps->dev_version = eps->reply[1];
 	}
+	Write2LE( eps, 0x01fe ); // Trigger Init.
+	ESPFlushLLCommands( eps );	
 	return eps;
 }
 
diff --git a/misc/README.md b/misc/README.md
index 7e6dc6cc..8fe06b20 100644
--- a/misc/README.md
+++ b/misc/README.md
@@ -42,3 +42,129 @@ make -j8
 
 4. Enjoy the built libgcc.a at ./build-ch32v003/lib/gcc/riscv32-unknown-elf/12.2.0/libgcc.a
 
+
+## The vendor bytes section
+
+```sh
+../../ch32v003fun//../minichlink/minichlink -a -r + 0x1ffff700 36 -r + 0x1ffff7e0 20
+```
+
+For a ch32v307 CH32V307WCU6:
+```
+1ffff700: 34 fe 78 dc 18 05 73 30 29 c6 6a 09 85 c5 9f ff 
+1ffff710: 55 a1 05 00 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 62 05 1a 00 
+Read 16 bytes
+1ffff7e0: 20 01 ff ff ff ff ff ff db 4a aa 7b 54 50 d9 16 
+1ffff7f0: ff ff ff ff
+```
+
+Another V307 CH32V307WCU6 (from the same lot)
+```
+1ffff700: 34 fe 78 dc 18 05 73 30 2a c6 8c 09 85 c5 9f ff 
+1ffff710: 55 a1 05 00 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 5c 05 1a 00 
+Read 20 bytes
+1ffff7e0: 20 01 ff ff ff ff ff ff ed 4a aa 7b 54 50 eb 16 
+1ffff7f0: 39 e3 39 e3 
+```
+
+A CH32V307VCT6
+```
+1ffff700: 34 fe 78 dc 28 05 70 30 29 c6 8f 09 85 45 ff ff 
+1ffff710: 55 a1 05 00 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 7c 05 19 00 
+Read 20 bytes
+1ffff7e0: 20 01 ff ff ff ff ff ff 99 65 1a 7b 54 50 07 31 
+1ffff7f0: 39 e3 39 e3 
+```
+
+CH32V305FBP6
+```
+1ffff700: 34 fe 78 dc 38 05 52 30 2a c6 a9 09 45 c5 9b 32 
+1ffff710: 55 a1 05 00 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 81 05 19 00 
+Read 20 bytes
+1ffff7e0: 80 00 ff ff ff ff ff ff cd ab bd 08 7b bc 05 71 
+1ffff7f0: 39 e3 39 e3 
+```
+
+A CH32V208
+```
+1ffff700: 34 fe 78 dc 1c 05 80 20 29 86 51 09 55 00 3f c0 
+1ffff710: 24 01 11 10 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 71 05 1d 00 
+Read 20 bytes
+1ffff7e0: a0 00 ff ff ff ff ff ff 7a 8b d3 7b 54 50 a1 57 
+1ffff7f0: 39 e3 39 e3 
+```
+
+A Ch32v203 GBU6
+```
+1ffff700: 34 fe 78 dc 38 05 5b 30 2d c6 86 09 45 c5 9f 3e 
+1ffff710: 15 a1 05 00 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 75 05 1b 00 
+Read 20 bytes
+1ffff7e0: 80 00 ff ff ff ff ff ff cd ab de b7 78 bc 23 20 
+1ffff7f0: 39 e3 39 e3 
+```
+
+Another CH32v203GBU6
+```
+1ffff700: 34 fe 78 dc 38 05 5b 30 2d c6 72 09 45 c5 9f 3e 
+1ffff710: 15 a1 05 00 00 00 00 86 81 31 15 38 05 fa aa 55 
+1ffff720: 7c 05 1b 00 
+Read 20 bytes
+1ffff7e0: 80 00 ff ff ff ff ff ff cd ab c9 b7 78 bc 0e 20 
+1ffff7f0: 39 e3 39 e3 
+```
+
+A ch32v203c8t6
+```
+1ffff700: 34 fe 78 dc 00 05 31 20 29 86 62 09 05 00 3e c1 
+1ffff710: ff ff ff ff 00 00 08 86 81 31 15 38 05 fa aa 55 
+1ffff720: 88 05 18 00 
+Read 20 bytes
+1ffff7e0: 40 00 ff ff ff ff ff ff cd ab e5 d6 6a bc 1c 3f 
+1ffff7f0: 39 e3 39 e3 
+```
+
+CH32X035F8U6
+```
+1ffff700: 34 fe 78 dc 11 06 5e 03 08 10 69 74 03 5a 00 00 
+1ffff710: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 
+1ffff720: ff ff ff ff 
+Read 20 bytes
+1ffff7e0: 3e 00 ff ff ff ff ff ff cd ab 31 28 45 bc 43 90 
+1ffff7f0: ff ff ff ff 
+```
+
+CH32X035C8T6
+```
+1ffff700: 34 fe 78 dc 01 06 51 03 08 10 41 05 03 5a 00 00 
+1ffff710: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 
+1ffff720: ff ff ff ff 
+Read 20 bytes
+1ffff7e0: 3e 00 ff ff ff ff ff ff cd ab bc 1f 48 bc d1 87 
+1ffff7f0: ff ff ff ff 
+```
+
+For a ch32v003 (QFN)
+```
+1ffff700: 07 f8 98 a3 91 bb 13 07 10 0f 4d b1 13 07 e0 0f 
+1ffff710: 71 b9 33 86 e4 00 08 22 36 c6 3a c4 32 c2 b9 34 
+1ffff720: 12 46 b2 46 
+...
+1ffff7e0: 10 00 ff ff ff ff ff ff cd ab 0c 78 0c bc e5 df 
+1ffff7f0: ff ff ff ff
+```
+
+For a ch32v003 (SOIC-8) (Different Lot)
+```
+1ffff700: 07 f8 98 a3 91 bb 13 07 10 0f 4d b1 13 07 e0 0f 
+1ffff710: 71 b9 33 86 e4 00 08 22 36 c6 3a c4 32 c2 b9 34 
+1ffff720: 12 46 b2 46 
+Read 20 bytes
+1ffff7e0: 10 00 ff ff ff ff ff ff cd ab 8d 3f c6 bc 20 a8 
+1ffff7f0: ff ff ff ff 
+```