From 1475843ec5e5da3378d8fa28c0f40e7ee54dd002 Mon Sep 17 00:00:00 2001 From: Shupei Fan Date: Wed, 11 Sep 2024 07:43:44 +0000 Subject: [PATCH 1/2] [nix] fix verilator build --- nix/t1/conversion/sv-to-verilator-emulator.nix | 5 ++++- nix/t1/t1rocket.nix | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/nix/t1/conversion/sv-to-verilator-emulator.nix b/nix/t1/conversion/sv-to-verilator-emulator.nix index 550090c1d..10a915317 100644 --- a/nix/t1/conversion/sv-to-verilator-emulator.nix +++ b/nix/t1/conversion/sv-to-verilator-emulator.nix @@ -40,7 +40,10 @@ rec { verilatorTop ] ++ extraVerilatorArgs - ++ lib.optionals (enableTrace) [ "--trace-fst" ]; + ++ lib.optionals (enableTrace) [ + "+define+T1_ENABLE_TRACE" + "--trace-fst" + ]; buildPhase = '' runHook preBuild diff --git a/nix/t1/t1rocket.nix b/nix/t1/t1rocket.nix index 6abf8788f..447171288 100644 --- a/nix/t1/t1rocket.nix +++ b/nix/t1/t1rocket.nix @@ -45,10 +45,12 @@ verilator-dpi-lib = scope.makeDifftest { outputName = "t1rocket-verilator-dpi-lib"; moduleType = "dpi_t1rocket"; + emuType = "verilator"; }; verilator-dpi-lib-trace = scope.makeDifftest { outputName = "t1rocket-verilator-trace-dpi-lib"; moduleType = "dpi_t1rocket"; + emuType = "verilator"; enableTrace = true; }; From 63969ea0c9c7fdc7247aa2596e4322c1c9ac931f Mon Sep 17 00:00:00 2001 From: Shupei Fan Date: Wed, 11 Sep 2024 15:40:23 +0000 Subject: [PATCH 2/2] [spike_interfaces] "sim_t" -> "t1_sim_t" to avoid name collision Since spike already define "class sim_t" in riscv/sim.h --- difftest/spike_interfaces/spike_interfaces.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/difftest/spike_interfaces/spike_interfaces.h b/difftest/spike_interfaces/spike_interfaces.h index ceffa8f7f..771ab431f 100644 --- a/difftest/spike_interfaces/spike_interfaces.h +++ b/difftest/spike_interfaces/spike_interfaces.h @@ -17,10 +17,10 @@ ffi_callback ffi_addr_to_mem; extern void *ffi_target; std::vector reg_write_index_vec; -class sim_t : public simif_t { +class t1_sim_t : public simif_t { public: - sim_t() {} - ~sim_t() {} + t1_sim_t() {} + ~t1_sim_t() {} char *addr_to_mem(reg_t addr) override { return ffi_addr_to_mem(ffi_target, addr); } @@ -50,7 +50,7 @@ class Spike { private: cfg_t cfg; - sim_t sim; + t1_sim_t sim; isa_parser_t isa; processor_t proc; };