From 8de4794b35de0f3b9794fe2638a87f70fd143aac Mon Sep 17 00:00:00 2001 From: qinjun-li Date: Sun, 10 Nov 2024 16:41:52 +0800 Subject: [PATCH] [rtl] fix t1rocket redmin. --- t1/src/mask/MaskUnit.scala | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/t1/src/mask/MaskUnit.scala b/t1/src/mask/MaskUnit.scala index 430f16520..e28914951 100644 --- a/t1/src/mask/MaskUnit.scala +++ b/t1/src/mask/MaskUnit.scala @@ -299,9 +299,8 @@ class MaskUnit(parameter: T1Parameter) extends Module { val dLog = log2Ceil(parameter.datapathWidth/8) // How many datapaths does LSB contain? - val lsbDSize = (vlLSB >> dLog).asUInt + changeUIntSize(vlLSB, dLog).orR - // 0 -UIntToOH> 00001 -( >> 1)> 00000 - (UIntToOH(lsbDSize) >> 1).asUInt | Fill(parameter.laneNumber, vlMSB) + val lsbDSize = (vlLSB >> dLog).asUInt - !changeUIntSize(vlLSB, dLog).orR + scanRightOr(UIntToOH(lsbDSize))| Fill(parameter.laneNumber, vlMSB) } )