Assert `AST_INTERNAL::current_scope.count(wiretype_node->str)' failed in /home/alain/RapidSilicon/systemverilog-plugin/frontends/systemverilog/uhdm_ast.cc:466.

[alain-rs]

There seems to be a problem in setting up the current_scope, the top level typespec are not part of the scope when processing the module M port declaration.

synlig/frontends/systemverilog/uhdm_ast.cc

Line 2089 in 4fb4ad4

setup_current_scope(shared.top_nodes, pair.second);

typedef struct packed {
  logic [7:0] prd_1;
  logic [3:0] prd_2;
  logic [7:0] prd_3;
  logic [7:0] prd_4;
} prd_in_t;

module M(input prd_in_t     prd_i);  //  << Problem is here
endmodule

module top();
  prd_in_t    in_prd;  //  << No problem here

  assign in_prd = '{prd_1: 8'b0,  prd_2: 4'b1,  prd_3: 8'b0,  prd_4: 8'b0};    //  << No problem here

M m  (.prd_i ( in_prd  ));

endmodule

[alaindargelas]

@kamilrakoczy @tgorochowik this is a problem showing in quite a few designs.

[kbieganski]

@alaindargelas This seems to be working for me now, can you confirm?

[alaindargelas]

@kbieganski this error is gone in the original testcase.
A new error is showing up:
ERROR: Assert `wire_node->attributes.count(ID::wiretype)' failed in /home/alain/RapidSilicon/Raptor_Tools/parser_plugins/synlig_plugin/frontends/systemverilog/uhdm_ast.cc:482

I'll need to extract a small example.
Closing this case.

[alaindargelas]

This attached testcase has the same assert as the original case.

kmac.tar.gz

ERROR: Assert `AST_INTERNAL::current_scope.count(wiretype_node->str)' failed in /home/alain/synlig/frontends/systemverilog/uhdm_ast.cc:466

[alaindargelas]

@kbieganski are your still investigating this one?

[kbieganski]

Not right now. We're focusing on general stability and usability at this time.

[alaindargelas]

Multiplied define package (test.sv redefined the incomplete package kmac_pkg), Surelog needs a better filter to parse -y files.

[alaindargelas]

chipsalliance/Surelog#3902

[alaindargelas]

Fixed by chipsalliance/Surelog#3903