From 9ee6842bc700bc11b1bdeae9249008b1751f9a4b Mon Sep 17 00:00:00 2001 From: Schuyler Eldridge Date: Thu, 26 Sep 2024 21:56:10 -0400 Subject: [PATCH] Remove Injecting Aspects (#4417) Fully remove injecting aspects. These were deprecated in Chisel 6.6.0. Signed-off-by: Schuyler Eldridge --- build.sbt | 6 +- .../src/main/scala/chisel3/ModuleAspect.scala | 24 --- core/src/main/scala/chisel3/ModuleImpl.scala | 8 +- .../main/scala/chisel3/internal/Binding.scala | 10 +- .../main/scala/chisel3/internal/Builder.scala | 39 +--- .../aop/injecting/InjectStatement.scala | 27 --- .../aop/injecting/InjectingAspect.scala | 122 ------------ .../aop/injecting/InjectingPhase.scala | 50 ----- .../scala/chisel3/stage/phases/Convert.scala | 2 +- .../scala/chisel3/stage/phases/Emitter.scala | 3 +- .../stage/phases/MaybeInjectingPhase.scala | 20 -- .../scala/chisel3/testers/TesterDriver.scala | 5 +- src/main/scala/chisel3/verilog.scala | 1 - src/main/scala/circt/stage/ChiselStage.scala | 2 - .../scala/chiselTests/aop/InjectionSpec.scala | 175 ------------------ .../scala/chiselTests/aop/SelectSpec.scala | 2 +- 16 files changed, 12 insertions(+), 484 deletions(-) delete mode 100644 core/src/main/scala/chisel3/ModuleAspect.scala delete mode 100644 src/main/scala/chisel3/aop/injecting/InjectStatement.scala delete mode 100644 src/main/scala/chisel3/aop/injecting/InjectingAspect.scala delete mode 100644 src/main/scala/chisel3/aop/injecting/InjectingPhase.scala delete mode 100644 src/main/scala/chisel3/stage/phases/MaybeInjectingPhase.scala delete mode 100644 src/test/scala/chiselTests/aop/InjectionSpec.scala diff --git a/build.sbt b/build.sbt index b20f2d95ff0..bbbcd55bb22 100644 --- a/build.sbt +++ b/build.sbt @@ -68,11 +68,7 @@ lazy val warningSuppression = Seq( "cat=deprecation&origin=firrtl\\.options\\.internal\\.WriteableCircuitAnnotation:s", "cat=deprecation&origin=chisel3\\.util\\.experimental\\.BoringUtils.*:s", "cat=deprecation&origin=chisel3\\.experimental\\.IntrinsicModule:s", - "cat=deprecation&origin=chisel3\\.ltl.*:s", - // This is deprecated and planned to be removed - "cat=deprecation&origin=chisel3\\.aop\\.injecting.*:s", - "cat=deprecation&origin=chisel3\\.stage\\.phases\\.MaybeInjectingPhase:s", - "cat=deprecation&origin=chisel3\\.ModuleAspect:s" + "cat=deprecation&origin=chisel3\\.ltl.*:s" ).mkString(",") ) diff --git a/core/src/main/scala/chisel3/ModuleAspect.scala b/core/src/main/scala/chisel3/ModuleAspect.scala deleted file mode 100644 index abe0e1dd8c0..00000000000 --- a/core/src/main/scala/chisel3/ModuleAspect.scala +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 - -package chisel3 - -import chisel3.internal.{Builder, PseudoModule} - -/** Used by Chisel Aspects to inject Chisel code into modules, after they have been elaborated. - * This is an internal API - don't use! - * - * It adds itself as an aspect to the module, which allows proper checking of connection and binding legality. - * - * @param module Module for which this object is an aspect of - */ -@deprecated("injecting aspects are being removed in Chisel 7", "6.6.0") -abstract class ModuleAspect private[chisel3] (module: RawModule) extends RawModule with PseudoModule { - - Builder.addAspect(module, this) - - override def circuitName: String = module.toTarget.circuit - - override def desiredName: String = module.name - - override val _namespace = module._namespace -} diff --git a/core/src/main/scala/chisel3/ModuleImpl.scala b/core/src/main/scala/chisel3/ModuleImpl.scala index baf8b81091d..2d9fb45a648 100644 --- a/core/src/main/scala/chisel3/ModuleImpl.scala +++ b/core/src/main/scala/chisel3/ModuleImpl.scala @@ -532,12 +532,8 @@ package experimental { private[chisel3] val _ids = ArrayBuffer[HasId]() private[chisel3] def addId(d: HasId): Unit = { - if (Builder.aspectModule(this).isDefined) { - aspectModule(this).get.addId(d) - } else { - require(!_closed, "Can't write to module after module close") - _ids += d - } + require(!_closed, "Can't write to module after module close") + _ids += d } // Returns the last id contained within a Module diff --git a/core/src/main/scala/chisel3/internal/Binding.scala b/core/src/main/scala/chisel3/internal/Binding.scala index 8fbe6e70f97..aacdd045ef2 100644 --- a/core/src/main/scala/chisel3/internal/Binding.scala +++ b/core/src/main/scala/chisel3/internal/Binding.scala @@ -58,15 +58,7 @@ private[chisel3] object binding { // Location will track where this Module is, and the bound object can be referenced in FIRRTL sealed trait ConstrainedBinding extends TopBinding { def enclosure: BaseModule - def location: Option[BaseModule] = { - // If an aspect is present, return the aspect module. Otherwise, return the enclosure module - // This allows aspect modules to pretend to be enclosed modules for connectivity checking, - // inside vs outside instance checking, etc. - Builder.aspectModule(enclosure) match { - case None => Some(enclosure) - case Some(aspect) => Some(aspect) - } - } + def location: Option[BaseModule] = Some(enclosure) } // A binding representing a data that cannot be (re)assigned to. diff --git a/core/src/main/scala/chisel3/internal/Builder.scala b/core/src/main/scala/chisel3/internal/Builder.scala index e27a0dfbf0c..aac3964fda6 100644 --- a/core/src/main/scala/chisel3/internal/Builder.scala +++ b/core/src/main/scala/chisel3/internal/Builder.scala @@ -540,11 +540,6 @@ private[chisel3] class DynamicContext( val options = mutable.LinkedHashSet[choice.Case]() var currentModule: Option[BaseModule] = None - /** Contains a mapping from a elaborated module to their aspect - * Set by [[ModuleAspect]] - */ - val aspectModule: mutable.HashMap[BaseModule, BaseModule] = mutable.HashMap.empty[BaseModule, BaseModule] - // Views that do not correspond to a single ReferenceTarget and thus require renaming val unnamedViews: ArrayBuffer[Data] = ArrayBuffer.empty @@ -721,10 +716,6 @@ private[chisel3] object Builder extends LazyLogging { def currentModule_=(target: Option[BaseModule]): Unit = { dynamicContext.currentModule = target } - def aspectModule(module: BaseModule): Option[BaseModule] = dynamicContextVar.value match { - case Some(dynamicContext) => dynamicContext.aspectModule.get(module) - case _ => None - } /** Retrieves the parent of a module based on the elaboration context * @@ -733,23 +724,7 @@ private[chisel3] object Builder extends LazyLogging { * @return the parent of the module provided */ def retrieveParent(module: BaseModule, context: BaseModule): Option[BaseModule] = { - module._parent match { - case Some(parentModule) => { //if a parent exists investigate, otherwise return None - context match { - case aspect: ModuleAspect => { //if aspect context, do the translation - Builder.aspectModule(parentModule) match { - case Some(parentAspect) => Some(parentAspect) //we've found a translation - case _ => Some(parentModule) //no translation found - } - } //otherwise just return our parent - case _ => Some(parentModule) - } - } - case _ => None - } - } - def addAspect(module: BaseModule, aspect: BaseModule): Unit = { - dynamicContext.aspectModule += ((module, aspect)) + module._parent } def forcedModule: BaseModule = currentModule match { case Some(module) => module @@ -761,11 +736,7 @@ private[chisel3] object Builder extends LazyLogging { } def referenceUserModule: RawModule = { currentModule match { - case Some(module: RawModule) => - aspectModule(module) match { - case Some(aspect: RawModule) => aspect - case other => module - } + case Some(module: RawModule) => module case _ => throwException( "Error: Not in a RawModule. Likely cause: Missed Module() wrap, bare chisel API call, or attempting to construct hardware inside a BlackBox." @@ -775,11 +746,7 @@ private[chisel3] object Builder extends LazyLogging { } def referenceUserContainer: BaseModule = { currentModule match { - case Some(module: RawModule) => - aspectModule(module) match { - case Some(aspect: RawModule) => aspect - case other => module - } + case Some(module: RawModule) => module case Some(cls: Class) => cls case _ => throwException( diff --git a/src/main/scala/chisel3/aop/injecting/InjectStatement.scala b/src/main/scala/chisel3/aop/injecting/InjectStatement.scala deleted file mode 100644 index da8e86921cc..00000000000 --- a/src/main/scala/chisel3/aop/injecting/InjectStatement.scala +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 - -package chisel3.aop.injecting - -import chisel3.stage.phases.AspectPhase -import firrtl.annotations.{Annotation, ModuleTarget, NoTargetAnnotation, SingleTargetAnnotation} - -/** Contains all information needed to inject statements into a module - * - * Generated when a [[InjectingAspect]] is consumed by a `AspectPhase` - * Consumed by [[InjectingPhase]] - * - * @param module Module to inject code into at the end of the module - * @param s Statements to inject - * @param modules Additional modules that may be instantiated by s - * @param annotations Additional annotations that should be passed down compiler - */ -@deprecated("injecting aspects are being removed in Chisel 7", "6.6.0") -case class InjectStatement( - module: ModuleTarget, - s: firrtl.ir.Statement, - modules: Seq[firrtl.ir.DefModule], - annotations: Seq[Annotation]) - extends SingleTargetAnnotation[ModuleTarget] { - val target: ModuleTarget = module - override def duplicate(n: ModuleTarget): Annotation = this.copy(module = n) -} diff --git a/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala b/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala deleted file mode 100644 index 5ef4bc2fe82..00000000000 --- a/src/main/scala/chisel3/aop/injecting/InjectingAspect.scala +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 - -package chisel3.aop.injecting - -import chisel3.{withClockAndReset, Module, ModuleAspect, RawModule} -import chisel3.aop._ -import chisel3.experimental.hierarchy.core.Definition -import chisel3.internal.{Builder, BuilderContextCache, DynamicContext} -import chisel3.internal.firrtl.ir.DefModule -import chisel3.stage.{ChiselOptions, DesignAnnotation} -import firrtl.annotations.{Annotation, ModuleTarget} -import firrtl.options.Viewer.view -import firrtl.{ir, _} - -import scala.collection.mutable -import logger.LoggerOptions - -import scala.collection.mutable.ArrayBuffer - -/** Aspect to inject Chisel code into a module of type M - * - * @param selectRoots Given top-level module, pick the instances of a module to apply the aspect (root module) - * @param injection Function to generate Chisel hardware that will be injected to the end of module m - * Signals in m can be referenced and assigned to as if inside m (yes, it is a bit magical) - * @tparam T Type of top-level module - * @tparam M Type of root module (join point) - */ -@deprecated("injecting aspects are being removed in Chisel 7", "6.6.0") -case class InjectingAspect[T <: RawModule, M <: RawModule]( - selectRoots: T => Iterable[M], - injection: M => Unit) - extends InjectorAspect[T, M]( - selectRoots, - injection - ) - -/** Extend to inject Chisel code into a module of type M - * - * @param selectRoots Given top-level module, pick the instances of a module to apply the aspect (root module) - * @param injection Function to generate Chisel hardware that will be injected to the end of module m - * Signals in m can be referenced and assigned to as if inside m (yes, it is a bit magical) - * @tparam T Type of top-level module - * @tparam M Type of root module (join point) - */ -@deprecated("injecting aspects are being removed in Chisel 7", "6.6.0") -abstract class InjectorAspect[T <: RawModule, M <: RawModule]( - selectRoots: T => Iterable[M], - injection: M => Unit) - extends Aspect[T] { - final def toAnnotation(top: T): AnnotationSeq = { - val moduleNames = - Select.allDefinitionsOf[chisel3.experimental.BaseModule](top.toDefinition).map { i => i.toTarget.module }.toSeq - toAnnotation(selectRoots(top), top.name, moduleNames) - } - - /** Returns annotations which contain all injection logic - * - * @param modules The modules to inject into - * @param circuit Top level circuit - * @param moduleNames The names of all existing modules in the original circuit, to avoid name collisions - * @return - */ - final def toAnnotation(modules: Iterable[M], circuit: String, moduleNames: Seq[String]): AnnotationSeq = { - modules.map { module => - val chiselOptions = view[ChiselOptions](annotationsInAspect) - val loggerOptions = view[LoggerOptions](annotationsInAspect) - val dynamicContext = - new DynamicContext( - annotationsInAspect, - chiselOptions.throwOnFirstError, - chiselOptions.useLegacyWidth, - chiselOptions.warningFilters, - chiselOptions.sourceRoots, - None, - loggerOptions, - ArrayBuffer[Definition[_]](), - BuilderContextCache.empty, - chiselOptions.layerMap - ) - // Add existing module names into the namespace. If injection logic instantiates new modules - // which would share the same name, they will get uniquified accordingly - moduleNames.foreach { n => - dynamicContext.globalNamespace.name(n) - } - - val (chiselIR, _) = Builder.build( - Module(new ModuleAspect(module) { - module match { - case x: Module => withClockAndReset(x.clock, x.reset) { injection(module) } - case x: RawModule => injection(module) - } - }), - dynamicContext - ) - - val comps = chiselIR.components.map { - case x: DefModule if x.name == module.name => x.copy(id = module) - case other => other - } - - val annotations: Seq[Annotation] = chiselIR.firrtlAnnotations.toSeq.filterNot { a => - a.isInstanceOf[DesignAnnotation[_]] - } - - /** Statements to be injected via aspect. */ - val stmts = mutable.ArrayBuffer[ir.Statement]() - - /** Modules to be injected via aspect. */ - val modules = Aspect.getFirrtl(chiselIR.copy(components = comps)).modules.flatMap { - // for "container" modules, inject their statements - case m: firrtl.ir.Module if m.name == module.name => - stmts += m.body - Nil - // for modules to be injected - case other: firrtl.ir.DefModule => - Seq(other) - } - - InjectStatement(ModuleTarget(circuit, module.name), ir.Block(stmts.toSeq), modules, annotations) - }.toSeq - } -} diff --git a/src/main/scala/chisel3/aop/injecting/InjectingPhase.scala b/src/main/scala/chisel3/aop/injecting/InjectingPhase.scala deleted file mode 100644 index 45751723735..00000000000 --- a/src/main/scala/chisel3/aop/injecting/InjectingPhase.scala +++ /dev/null @@ -1,50 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 - -package chisel3.aop.injecting - -import chisel3.aop.Aspect -import firrtl.options.Phase -import firrtl.stage.FirrtlCircuitAnnotation -import firrtl.{ir, AnnotationSeq} - -import scala.collection.mutable - -/** Phase that consumes all Aspects and calls their toAnnotationSeq methods. - * - * Consumes the [[chisel3.stage.DesignAnnotation]] and converts every [[Aspect]] into their annotations prior to executing FIRRTL - */ -@deprecated("injecting aspects are being removed in Chisel 7", "6.6.0") -class InjectingPhase extends Phase { - def transform(annotations: AnnotationSeq): AnnotationSeq = { - val addStmtMap = mutable.HashMap[String, Seq[ir.Statement]]() - val addModules = mutable.ArrayBuffer[ir.DefModule]() - val newAnnotations = annotations.flatMap { - case InjectStatement(mt, s, addedModules, annotations) => - addModules ++= addedModules - addStmtMap(mt.module) = addStmtMap.getOrElse(mt.module, Nil) :+ s - annotations - case _ => Seq.empty - } - logger.debug(s"new annotation added: \n${newAnnotations.map(_.serialize).mkString("=n")}") - // Append all statements to end of corresponding modules - annotations.filter { - case _: InjectStatement => false - case _ => true - }.map { - case f @ FirrtlCircuitAnnotation(c) => - val newModules = c.modules.map { m: ir.DefModule => - m match { - case m: ir.Module if addStmtMap.contains(m.name) => - logger.debug(s"Injecting to ${m.name} with statement: \n${ir.Block(addStmtMap(m.name)).serialize}") - m.copy(body = ir.Block(m.body +: addStmtMap(m.name))) - case m: _root_.firrtl.ir.ExtModule if addStmtMap.contains(m.name) => - logger.debug(s"Injecting to ${m.name} with statement: \n${ir.Block(addStmtMap(m.name)).serialize}") - ir.Module(m.info, m.name, false, Nil, m.ports, ir.Block(addStmtMap(m.name))) - case other: ir.DefModule => other - } - } - f.copy(c.copy(modules = newModules ++ addModules)) - case a => a - } ++ newAnnotations - } -} diff --git a/src/main/scala/chisel3/stage/phases/Convert.scala b/src/main/scala/chisel3/stage/phases/Convert.scala index 0be631ccee2..6a4e0193851 100644 --- a/src/main/scala/chisel3/stage/phases/Convert.scala +++ b/src/main/scala/chisel3/stage/phases/Convert.scala @@ -19,7 +19,7 @@ class Convert extends Phase { override def prerequisites = Seq(Dependency[Elaborate]) override def optionalPrerequisites = Seq.empty - override def optionalPrerequisiteOf = Seq(Dependency[MaybeInjectingPhase]) + override def optionalPrerequisiteOf = Seq.empty override def invalidates(a: Phase) = false @nowarn("msg=Do not use annotations val of Circuit directly") diff --git a/src/main/scala/chisel3/stage/phases/Emitter.scala b/src/main/scala/chisel3/stage/phases/Emitter.scala index ea0ba10ea28..68e39d27543 100644 --- a/src/main/scala/chisel3/stage/phases/Emitter.scala +++ b/src/main/scala/chisel3/stage/phases/Emitter.scala @@ -22,8 +22,7 @@ class Emitter extends Phase { Seq( Dependency[Elaborate], Dependency[AddImplicitOutputFile], - Dependency[AddImplicitOutputAnnotationFile], - Dependency[MaybeAspectPhase] + Dependency[AddImplicitOutputAnnotationFile] ) override def optionalPrerequisites = Seq.empty override def optionalPrerequisiteOf = Seq(Dependency[Convert]) diff --git a/src/main/scala/chisel3/stage/phases/MaybeInjectingPhase.scala b/src/main/scala/chisel3/stage/phases/MaybeInjectingPhase.scala deleted file mode 100644 index 39e48f8c9f8..00000000000 --- a/src/main/scala/chisel3/stage/phases/MaybeInjectingPhase.scala +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 - -package chisel3.stage.phases - -import chisel3.aop.injecting.{InjectStatement, InjectingPhase} -import firrtl.AnnotationSeq -import firrtl.options.Phase - -/** Run `InjectingPhase` if a `InjectStatement` is present. - */ -@deprecated("injecting aspects are being removed in Chisel 7", "6.6.0") -class MaybeInjectingPhase extends Phase { - override def prerequisites = Seq.empty - override def optionalPrerequisites = Seq.empty - override def optionalPrerequisiteOf = Seq.empty - override def invalidates(a: Phase) = false - def transform(annotations: AnnotationSeq): AnnotationSeq = annotations.collectFirst { - case _: InjectStatement => new InjectingPhase().transform(annotations) - }.getOrElse(annotations) -} diff --git a/src/main/scala/chisel3/testers/TesterDriver.scala b/src/main/scala/chisel3/testers/TesterDriver.scala index 191b236f43f..b8474f79da1 100644 --- a/src/main/scala/chisel3/testers/TesterDriver.scala +++ b/src/main/scala/chisel3/testers/TesterDriver.scala @@ -3,7 +3,7 @@ package chisel3.testers import chisel3._ -import chisel3.stage.phases.{Convert, Elaborate, Emitter, MaybeInjectingPhase} +import chisel3.stage.phases.{Convert, Elaborate, Emitter} import chisel3.stage.{ChiselCircuitAnnotation, ChiselGeneratorAnnotation} import firrtl.AnnotationSeq import firrtl.annotations.NoTargetAnnotation @@ -61,8 +61,7 @@ object TesterDriver extends BackendCompilationUtilities { targets = Seq( Dependency[AddImplicitTesterDirectory], Dependency[Emitter], - Dependency[Convert], - Dependency[MaybeInjectingPhase] + Dependency[Convert] ) ) diff --git a/src/main/scala/chisel3/verilog.scala b/src/main/scala/chisel3/verilog.scala index e989310146f..5b5d45e8fd5 100644 --- a/src/main/scala/chisel3/verilog.scala +++ b/src/main/scala/chisel3/verilog.scala @@ -10,7 +10,6 @@ object getVerilogString { final def phase = new PhaseManager( Seq( Dependency[chisel3.stage.phases.Checks], - Dependency[chisel3.aop.injecting.InjectingPhase], Dependency[chisel3.stage.phases.Elaborate], Dependency[chisel3.stage.phases.Convert], Dependency[circt.stage.phases.AddImplicitOutputFile], diff --git a/src/main/scala/circt/stage/ChiselStage.scala b/src/main/scala/circt/stage/ChiselStage.scala index 991fbccb740..fdb2e322aac 100644 --- a/src/main/scala/circt/stage/ChiselStage.scala +++ b/src/main/scala/circt/stage/ChiselStage.scala @@ -37,7 +37,6 @@ class ChiselStage extends Stage { Dependency[chisel3.stage.phases.AddSerializationAnnotations], Dependency[chisel3.stage.phases.Convert], Dependency[chisel3.stage.phases.AddDedupGroupAnnotations], - Dependency[chisel3.stage.phases.MaybeInjectingPhase], Dependency[circt.stage.phases.AddImplicitOutputFile], Dependency[circt.stage.phases.CIRCT] ), @@ -57,7 +56,6 @@ object ChiselStage { /** A phase shared by all the CIRCT backends */ private def phase = new PhaseManager( Seq( - Dependency[chisel3.aop.injecting.InjectingPhase], Dependency[chisel3.stage.phases.Elaborate], Dependency[chisel3.stage.phases.Convert], Dependency[circt.stage.phases.AddImplicitOutputFile], diff --git a/src/test/scala/chiselTests/aop/InjectionSpec.scala b/src/test/scala/chiselTests/aop/InjectionSpec.scala deleted file mode 100644 index 0e8806c9f06..00000000000 --- a/src/test/scala/chiselTests/aop/InjectionSpec.scala +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 - -package chiselTests.aop - -import chisel3._ -import chisel3.aop.Select -import chisel3.aop.injecting.InjectingAspect -import chisel3.testers.{BasicTester, TesterDriver} -import chiselTests.{ChiselFlatSpec, Utils} - -object InjectionHierarchy { - - class SubmoduleManipulationTester extends BasicTester { - val moduleSubmoduleA = Module(new SubmoduleA) - } - - class MultiModuleInjectionTester extends BasicTester { - val subA0 = Module(new SubmoduleA) - val subA1 = Module(new SubmoduleA) - } - - class SubmoduleA extends Module { - val io = IO(new Bundle { - val out = Output(Bool()) - }) - io.out := false.B - } - - class SubmoduleB extends Module { - val io = IO(new Bundle { - val in = Input(Bool()) - }) - } - - class SubmoduleC extends experimental.ExtModule with util.HasExtModuleInline { - val io = IO(new Bundle { - val in = Input(Bool()) - }) - //scalastyle:off regex - setInline( - "SubmoduleC.v", - s""" - |module SubmoduleC( - | input io_in - |); - |endmodule - """.stripMargin - ) - } - - class AspectTester(results: Seq[Int]) extends BasicTester { - val values = VecInit(results.map(_.U)) - val counter = RegInit(0.U(results.length.W)) - counter := counter + 1.U - when(counter >= values.length.U) { - stop() - }.otherwise { - when(reset.asBool === false.B) { - assert(counter === values(counter)) - } - } - } -} - -class InjectionSpec extends ChiselFlatSpec with Utils { - import InjectionHierarchy._ - val correctValueAspect = InjectingAspect( - { dut: AspectTester => Seq(dut) }, - { dut: AspectTester => - for (i <- 0 until dut.values.length) { - dut.values(i) := i.U - } - } - ) - - val wrongValueAspect = InjectingAspect( - { dut: AspectTester => Seq(dut) }, - { dut: AspectTester => - for (i <- 0 until dut.values.length) { - dut.values(i) := (i + 1).U - } - } - ) - - val manipulateSubmoduleAspect = InjectingAspect( - { dut: SubmoduleManipulationTester => Seq(dut) }, - { dut: SubmoduleManipulationTester => - val moduleSubmoduleB = Module(new SubmoduleB) - moduleSubmoduleB.io.in := dut.moduleSubmoduleA.io.out - //if we're here then we've elaborated correctly - stop() - } - ) - - val duplicateSubmoduleAspect = InjectingAspect( - { dut: SubmoduleManipulationTester => Seq(dut) }, - { _: SubmoduleManipulationTester => - // By creating a second SubmoduleA, the module names would conflict unless they were uniquified - val moduleSubmoduleA2 = Module(new SubmoduleA) - //if we're here then we've elaborated correctly - stop() - } - ) - - val addingExternalModules = InjectingAspect( - { dut: SubmoduleManipulationTester => Seq(dut) }, - { _: SubmoduleManipulationTester => - // By creating a second SubmoduleA, the module names would conflict unless they were uniquified - val moduleSubmoduleC = Module(new SubmoduleC) - moduleSubmoduleC.io <> DontCare - //if we're here then we've elaborated correctly - stop() - } - ) - - val multiModuleInjectionAspect = InjectingAspect( - { top: MultiModuleInjectionTester => - Select.collectDeep(top) { case m: SubmoduleA => m } - }, - { m: Module => - val wire = Wire(Bool()) - wire := m.reset.asBool - dontTouch(wire) - stop() - } - ) - - "Test" should "pass if inserted the correct values" in { - assertTesterPasses { new AspectTester(Seq(0, 1, 2)) } - } - "Test" should "fail if inserted the wrong values" in { - assertTesterFails { new AspectTester(Seq(9, 9, 9)) } - } - //TODO: SFC->MFC, this test is ignored because aspects yet fully supported by CIRCT/firtool - "Test" should "pass if pass wrong values, but correct with aspect" ignore { - assertTesterPasses({ new AspectTester(Seq(9, 9, 9)) }, Nil) - } - "Test" should "pass if pass wrong values, then wrong aspect, then correct aspect" ignore { - assertTesterPasses( - new AspectTester(Seq(9, 9, 9)), - Nil - ) - } - "Test" should "fail if pass wrong values, then correct aspect, then wrong aspect" in { - assertTesterFails({ new AspectTester(Seq(9, 9, 9)) }, Nil) - } - - "Test" should "pass if the submodules in SubmoduleManipulationTester can be manipulated by manipulateSubmoduleAspect" ignore { - assertTesterPasses( - { new SubmoduleManipulationTester }, - Nil - ) - } - - "Module name collisions when adding a new module" should "be resolved" ignore { - assertTesterPasses( - { new SubmoduleManipulationTester }, - Nil - ) - } - - "Adding external modules" should "work" ignore { - assertTesterPasses( - { new SubmoduleManipulationTester }, - Nil - ) - } - - "Injection into multiple submodules of the same class" should "work" ignore { - assertTesterPasses( - { new MultiModuleInjectionTester }, - Nil - ) - } -} diff --git a/src/test/scala/chiselTests/aop/SelectSpec.scala b/src/test/scala/chiselTests/aop/SelectSpec.scala index a4a47537532..ec251f43841 100644 --- a/src/test/scala/chiselTests/aop/SelectSpec.scala +++ b/src/test/scala/chiselTests/aop/SelectSpec.scala @@ -231,7 +231,7 @@ class SelectSpec extends ChiselFlatSpec { Select.instances(top) should equal(Seq(top.inst0)) } - "Using Definition/Instance with Injecting Aspects" should "throw an error" in { + "Using Definition/Instance with Select APIs" should "throw an error" in { import chisel3.experimental.CloneModuleAsRecord import chisel3.experimental.hierarchy._ @instantiable