diff --git a/docs/src/SUMMARY.md b/docs/src/SUMMARY.md
index 0660bf6..4d10125 100644
--- a/docs/src/SUMMARY.md
+++ b/docs/src/SUMMARY.md
@@ -1,7 +1,7 @@
# Summary
-- [MCU General Specification](./mcu.md)
-- [ROM Specification](./rom.md)
+- [MCU Specification](./mcu.md)
+- [Reference ROM Specification](./rom.md)
- [Runtime Specification](./runtime.md)
- [PLDM Package](./pldm_package.md)
- [Flash Layout](./flash_layout.md)
diff --git a/docs/src/images/MCTP_rx_stack.svg b/docs/src/images/MCTP_rx_stack.svg
deleted file mode 100755
index 0e7112e..0000000
--- a/docs/src/images/MCTP_rx_stack.svg
+++ /dev/null
@@ -1,584 +0,0 @@
-
-
-
-
diff --git a/docs/src/images/MCTP_tx_stack.svg b/docs/src/images/MCTP_tx_stack.svg
deleted file mode 100755
index 934399d..0000000
--- a/docs/src/images/MCTP_tx_stack.svg
+++ /dev/null
@@ -1,633 +0,0 @@
-
-
-
-
diff --git a/docs/src/images/mctp_stack.svg b/docs/src/images/mctp_stack.svg
new file mode 100644
index 0000000..2db8f84
--- /dev/null
+++ b/docs/src/images/mctp_stack.svg
@@ -0,0 +1,2100 @@
+
+
+
+
diff --git a/docs/src/images/mcu_stack.svg b/docs/src/images/mcu_stack.svg
new file mode 100644
index 0000000..5d655d7
--- /dev/null
+++ b/docs/src/images/mcu_stack.svg
@@ -0,0 +1,2117 @@
+
+
+
+
diff --git a/docs/src/mctp.md b/docs/src/mctp.md
index d991b73..3ae8c52 100644
--- a/docs/src/mctp.md
+++ b/docs/src/mctp.md
@@ -9,38 +9,6 @@ MCTP Packets are delivered over physical I3C medium using I3C transfers. Caliptr
managed by an external I3C controller. Minimum transmission size is based on the MCTP baseline MTU (for I3C it is 69 bytes: 64 bytes MCTP payload + 4 bytes MCTP header + 1 byte PEC). Larger than the baseline transfer may be possible after discovery and negotiation with the I3C controller. The negotiated MTU size will be queried from the I3C Target peripheral driver by MCTP capsule.
-## MCTP Receive sequence
-
-```mermaid
-sequenceDiagram
- participant I3CController
- participant I3CTarget
- participant MCTPI3CBinding
- participant MuxMCTPDriver
- participant VirtualMCTPDriver
- participant Application
- loop Assemble packets until eom
- I3CController--)I3CTarget: I3C Private Write transfer
- I3CTarget->>MCTPI3CBinding: if no rx buffer, call write_expected() callback
- MCTPI3CBinding->> MuxMCTPDriver: write_expected() callback
- MuxMCTPDriver->>MCTPI3CBinding: set_rx_buffer() with buffer to receive packet
- MCTPI3CBinding->> I3CTarget: set_rx_buffer() with buffer to receive the packet
- I3CTarget--) I3CController : Send ACK
- I3CController--)I3CTarget: MCTP packet
- Note over I3CController, I3CTarget: Receive entire MCTP packet including the PEC until Sr/P.
- I3CTarget->> MCTPI3CBinding: receive() to receive the packet
- MCTPI3CBinding ->> MCTPI3CBinding: Check the PEC, and pass the packet with MCTPHeader to Mux MCTP layer
- MCTPI3CBinding->>MuxMCTPDriver: receive() to receive the packet
- MuxMCTPDriver->>MuxMCTPDriver: Process MCTP transport header on packet, and assemble if matches any pending Rx states or handle MCTP control msg.
- end
- MuxMCTPDriver->>VirtualMCTPDriver: receive() call to receive the assembled message.
- VirtualMCTPDriver--)Application: Schedule upcall to receive the request/response.
-```
-
-The Receive stack is as shown in the picture below:
-
-
-
## MCTP Send Sequence
```mermaid
@@ -83,7 +51,38 @@ sequenceDiagram
The send stack is as shown in the picture below:
-
+
+
+
+## MCTP Receive sequence
+
+```mermaid
+sequenceDiagram
+ participant I3CController
+ participant I3CTarget
+ participant MCTPI3CBinding
+ participant MuxMCTPDriver
+ participant VirtualMCTPDriver
+ participant Application
+ loop Assemble packets until eom
+ I3CController--)I3CTarget: I3C Private Write transfer
+ I3CTarget->>MCTPI3CBinding: if no rx buffer, call write_expected() callback
+ MCTPI3CBinding->> MuxMCTPDriver: write_expected() callback
+ MuxMCTPDriver->>MCTPI3CBinding: set_rx_buffer() with buffer to receive packet
+ MCTPI3CBinding->> I3CTarget: set_rx_buffer() with buffer to receive the packet
+ I3CTarget--) I3CController : Send ACK
+ I3CController--)I3CTarget: MCTP packet
+ Note over I3CController, I3CTarget: Receive entire MCTP packet including the PEC until Sr/P.
+ I3CTarget->> MCTPI3CBinding: receive() to receive the packet
+ MCTPI3CBinding ->> MCTPI3CBinding: Check the PEC, and pass the packet with MCTPHeader to Mux MCTP layer
+ MCTPI3CBinding->>MuxMCTPDriver: receive() to receive the packet
+ MuxMCTPDriver->>MuxMCTPDriver: Process MCTP transport header on packet, and assemble if matches any pending Rx states or handle MCTP control msg.
+ end
+ MuxMCTPDriver->>VirtualMCTPDriver: receive() call to receive the assembled message.
+ VirtualMCTPDriver--)Application: Schedule upcall to receive the request/response.
+```
+
+(The receive stack picture is nearly identical to the send stack above.)picture below:
## Syscall Library in userspace
diff --git a/docs/src/mcu.md b/docs/src/mcu.md
index ba6f794..ed7c2d9 100644
--- a/docs/src/mcu.md
+++ b/docs/src/mcu.md
@@ -1,5 +1,7 @@
# Caliptra Manufacturer Control Unit (MCU) Firmware and SDK
+*Spec revision: 0.3*
+
The Caliptra MCU firmware is be provided as a reference software development kit (SDK) with a consistent foundation for building a quantum-resilient and standards-compliant Root of Trust (RoT) for SoC implementers. It extends the Caliptra core system to provide the Caliptra Subsystem set of services to the encompassing system.
While Caliptra Core provides support for Identity, Secure Boot, Measured Boot, and Attestation, the Caliptra MCU firmware will be responsible for enabling Recovery, RoT Services, and Platform integration support. All SoC RoTs have specific initialization sequences and scenarios that need to be supported beyond standard RoT features. Hence, the MCU firmware will be distributed as Rust SDK with batteries included to build RoT Applications.
@@ -10,6 +12,8 @@ The Caliptra MCU SDK is composed of two major parts:
**Runtime**: The majority of the MCU firmware SDK is the runtime firmware, which provides the majority of the services after booting. Most of the documentation here consists of the documentation for the runtime.
+
+
## Principles
Caliptra 2.x firmware aspires to be the foundation for the RoT used in SoCs integrating Caliptra. Hence architecture, design and implementation must abide by certain guiding principles. Many of these principles are the founding principles for the Caliptra Project.
diff --git a/docs/src/rom.md b/docs/src/rom.md
index e4652f0..c767c63 100644
--- a/docs/src/rom.md
+++ b/docs/src/rom.md
@@ -1,6 +1,6 @@
-# ROM Specification
+# Reference ROM Specification
-The ROM is executed when the MCU starts.
+The reference ROM is executed when the MCU starts.
The ROM's main responsibilities to the overall Caliptra subsystem are to: