diff --git a/tests/ArianeElab/ArianeElab.log b/tests/ArianeElab/ArianeElab.log
index 8f2a1896a2..a73106af0d 100644
--- a/tests/ArianeElab/ArianeElab.log
+++ b/tests/ArianeElab/ArianeElab.log
@@ -64334,7 +64334,7 @@ design: (work@top)
         \_operation: , line:855:47, endln:855:78
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:855:48, endln:855:70
+        \_constant: , line:855:49, endln:855:63
           |vpiDecompile:32
           |vpiSize:64
           |INT:32
@@ -100820,7 +100820,7 @@ design: (work@top)
           \_operation: , line:855:47, endln:855:78
           |vpiOpType:34
           |vpiOperand:
-          \_constant: , line:855:48, endln:855:70
+          \_constant: , line:855:49, endln:855:63
             |vpiDecompile:32
             |vpiSize:64
             |INT:32
@@ -107831,7 +107831,7 @@ design: (work@top)
             \_operation: , line:855:47, endln:855:78
             |vpiOpType:34
             |vpiOperand:
-            \_constant: , line:855:48, endln:855:70
+            \_constant: , line:855:49, endln:855:63
               |vpiDecompile:32
               |vpiSize:64
               |INT:32
@@ -114925,7 +114925,7 @@ design: (work@top)
                   \_operation: , line:855:47, endln:855:78
                   |vpiOpType:34
                   |vpiOperand:
-                  \_constant: , line:855:48, endln:855:70
+                  \_constant: , line:855:49, endln:855:63
                     |vpiDecompile:32
                     |vpiSize:64
                     |INT:32
diff --git a/tests/ArianeElab2/ArianeElab2.log b/tests/ArianeElab2/ArianeElab2.log
index 1c9c240913..dfd447e0e3 100644
--- a/tests/ArianeElab2/ArianeElab2.log
+++ b/tests/ArianeElab2/ArianeElab2.log
@@ -64945,7 +64945,7 @@ design: (work@top)
         \_operation: , line:855:47, endln:855:78
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:855:48, endln:855:70
+        \_constant: , line:855:49, endln:855:63
           |vpiDecompile:32
           |vpiSize:64
           |INT:32
@@ -102264,7 +102264,7 @@ design: (work@top)
           \_operation: , line:855:47, endln:855:78
           |vpiOpType:34
           |vpiOperand:
-          \_constant: , line:855:48, endln:855:70
+          \_constant: , line:855:49, endln:855:63
             |vpiDecompile:32
             |vpiSize:64
             |INT:32
@@ -109275,7 +109275,7 @@ design: (work@top)
             \_operation: , line:855:47, endln:855:78
             |vpiOpType:34
             |vpiOperand:
-            \_constant: , line:855:48, endln:855:70
+            \_constant: , line:855:49, endln:855:63
               |vpiDecompile:32
               |vpiSize:64
               |INT:32
@@ -116369,7 +116369,7 @@ design: (work@top)
                   \_operation: , line:855:47, endln:855:78
                   |vpiOpType:34
                   |vpiOperand:
-                  \_constant: , line:855:48, endln:855:70
+                  \_constant: , line:855:49, endln:855:63
                     |vpiDecompile:32
                     |vpiSize:64
                     |INT:32
diff --git a/tests/BiasValue/BiasValue.log b/tests/BiasValue/BiasValue.log
index df49ad72f7..66641fa23e 100644
--- a/tests/BiasValue/BiasValue.log
+++ b/tests/BiasValue/BiasValue.log
@@ -1274,7 +1274,7 @@ design: (work@bp_be_rec_to_fp)
     \_module_inst: work@bp_be_rec_to_fp (work@bp_be_rec_to_fp), file:${SURELOG_DIR}/tests/BiasValue/dut.sv, line:1:1, endln:10:10
     |vpiNetDeclAssign:1
     |vpiRhs:
-    \_constant: 
+    \_constant: , line:6:43, endln:6:61
       |vpiDecompile:208
       |vpiSize:64
       |INT:208
diff --git a/tests/BlackConst/BlackConst.log b/tests/BlackConst/BlackConst.log
index 0f4e3d9347..ecc0a494ce 100644
--- a/tests/BlackConst/BlackConst.log
+++ b/tests/BlackConst/BlackConst.log
@@ -2933,7 +2933,7 @@ design: (work@top)
         \_operation: , line:10:4, endln:10:168
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:10:5, endln:10:93
+        \_constant: , line:10:7, endln:10:74
           |vpiDecompile:35
           |vpiSize:64
           |INT:35
@@ -2990,39 +2990,11 @@ design: (work@top)
           |UINT:0
           |vpiConstType:9
         |vpiWidthExpr:
-        \_operation: , line:10:102, endln:10:165
-          |vpiParent:
-          \_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166
-          |vpiOpType:32
-          |vpiOperand:
-          \_constant: , line:10:102, endln:10:165
-            |vpiDecompile:0
-            |vpiSize:64
-            |UINT:0
-            |vpiConstType:9
-          |vpiOperand:
-          \_constant: , line:10:136, endln:10:150
-            |vpiParent:
-            \_operation: , line:10:102, endln:10:165
-            |vpiDecompile:48
-            |vpiSize:32
-            |UINT:48
-            |vpiTypespec:
-            \_ref_typespec: (work@top.pc)
-              |vpiParent:
-              \_constant: , line:10:136, endln:10:150
-              |vpiFullName:work@top.pc
-              |vpiActual:
-              \_int_typespec: , line:143:3, endln:143:32
-            |vpiConstType:9
-          |vpiOperand:
-          \_constant: , line:10:155, endln:10:164
-            |vpiParent:
-            \_operation: , line:10:102, endln:10:165
-            |vpiDecompile:13
-            |vpiSize:64
-            |UINT:13
-            |vpiConstType:9
+        \_constant: , line:10:102, endln:10:165
+          |vpiDecompile:13
+          |vpiSize:64
+          |INT:13
+          |vpiConstType:7
     |vpiLhs:
     \_logic_net: (work@top.pc_sext_li), line:9:27, endln:9:37
   |vpiContAssign:
@@ -3234,52 +3206,11 @@ design: (work@top)
       \_range: , line:35:11, endln:35:58
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:35:14, endln:35:52
-        |vpiParent:
-        \_operation: , line:35:12, endln:35:55
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:35:15, endln:35:27
-          |vpiParent:
-          \_operation: , line:35:14, endln:35:52
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_req_metadata_s.hit_or_repl_way.assoc_p), line:35:16, endln:35:23
-            |vpiParent:
-            \_operation: , line:35:15, endln:35:27
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_req_metadata_s.hit_or_repl_way.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiOperand:
-          \_constant: , line:35:26, endln:35:27
-            |vpiParent:
-            \_operation: , line:35:15, endln:35:27
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:35:31, endln:35:32
-          |vpiParent:
-          \_operation: , line:35:14, endln:35:52
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:35:35, endln:35:52
-          |vpiParent:
-          \_operation: , line:35:14, endln:35:52
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_req_metadata_s.hit_or_repl_way.assoc_p), line:35:43, endln:35:50
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:35:35, endln:35:52
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_req_metadata_s.hit_or_repl_way.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiName:$clog2
+      \_constant: , line:35:14, endln:35:52
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:35:54, endln:35:55
         |vpiParent:
@@ -3312,52 +3243,11 @@ design: (work@top)
       \_range: , line:76:11, endln:76:56
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:76:14, endln:76:50
-        |vpiParent:
-        \_operation: , line:76:12, endln:76:53
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:76:15, endln:76:26
-          |vpiParent:
-          \_operation: , line:76:14, endln:76:50
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.index.sets_p), line:76:16, endln:76:22
-            |vpiParent:
-            \_operation: , line:76:15, endln:76:26
-            |vpiName:sets_p
-            |vpiFullName:work@top.bp_icache_data_mem_pkt_s.index.sets_p
-            |vpiActual:
-            \_parameter: (work@top.sets_p), line:149:17, endln:149:23
-          |vpiOperand:
-          \_constant: , line:76:25, endln:76:26
-            |vpiParent:
-            \_operation: , line:76:15, endln:76:26
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:76:30, endln:76:31
-          |vpiParent:
-          \_operation: , line:76:14, endln:76:50
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:76:34, endln:76:50
-          |vpiParent:
-          \_operation: , line:76:14, endln:76:50
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.index.sets_p), line:76:42, endln:76:48
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:76:34, endln:76:50
-            |vpiName:sets_p
-            |vpiFullName:work@top.bp_icache_data_mem_pkt_s.index.sets_p
-            |vpiActual:
-            \_parameter: (work@top.sets_p), line:149:17, endln:149:23
-          |vpiName:$clog2
+      \_constant: , line:76:14, endln:76:50
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:76:52, endln:76:53
         |vpiParent:
@@ -3387,52 +3277,11 @@ design: (work@top)
       \_range: , line:77:11, endln:77:58
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:77:14, endln:77:52
-        |vpiParent:
-        \_operation: , line:77:12, endln:77:55
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:77:15, endln:77:27
-          |vpiParent:
-          \_operation: , line:77:14, endln:77:52
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.way_id.assoc_p), line:77:16, endln:77:23
-            |vpiParent:
-            \_operation: , line:77:15, endln:77:27
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_data_mem_pkt_s.way_id.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiOperand:
-          \_constant: , line:77:26, endln:77:27
-            |vpiParent:
-            \_operation: , line:77:15, endln:77:27
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:77:31, endln:77:32
-          |vpiParent:
-          \_operation: , line:77:14, endln:77:52
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:77:35, endln:77:52
-          |vpiParent:
-          \_operation: , line:77:14, endln:77:52
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.way_id.assoc_p), line:77:43, endln:77:50
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:77:35, endln:77:52
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_data_mem_pkt_s.way_id.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiName:$clog2
+      \_constant: , line:77:14, endln:77:52
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:77:54, endln:77:55
         |vpiParent:
@@ -3498,26 +3347,11 @@ design: (work@top)
       \_range: , line:79:11, endln:79:45
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:79:13, endln:79:39
-        |vpiParent:
-        \_operation: , line:79:12, endln:79:42
-        |vpiOpType:12
-        |vpiOperand:
-        \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.fill_index.block_width_p), line:79:13, endln:79:26
-          |vpiParent:
-          \_operation: , line:79:13, endln:79:39
-          |vpiName:block_width_p
-          |vpiFullName:work@top.bp_icache_data_mem_pkt_s.fill_index.block_width_p
-          |vpiActual:
-          \_parameter: (work@top.block_width_p), line:151:17, endln:151:30
-        |vpiOperand:
-        \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.fill_index.fill_width_p), line:79:27, endln:79:39
-          |vpiParent:
-          \_operation: , line:79:13, endln:79:39
-          |vpiName:fill_width_p
-          |vpiFullName:work@top.bp_icache_data_mem_pkt_s.fill_index.fill_width_p
-          |vpiActual:
-          \_parameter: (work@top.fill_width_p), line:150:17, endln:150:29
+      \_constant: , line:79:13, endln:79:39
+        |vpiDecompile:1
+        |vpiSize:64
+        |INT:1
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:79:41, endln:79:42
         |vpiParent:
@@ -3547,52 +3381,11 @@ design: (work@top)
       \_range: , line:90:11, endln:90:56
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:90:14, endln:90:50
-        |vpiParent:
-        \_operation: , line:90:12, endln:90:53
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:90:15, endln:90:26
-          |vpiParent:
-          \_operation: , line:90:14, endln:90:50
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.index.sets_p), line:90:16, endln:90:22
-            |vpiParent:
-            \_operation: , line:90:15, endln:90:26
-            |vpiName:sets_p
-            |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.index.sets_p
-            |vpiActual:
-            \_parameter: (work@top.sets_p), line:149:17, endln:149:23
-          |vpiOperand:
-          \_constant: , line:90:25, endln:90:26
-            |vpiParent:
-            \_operation: , line:90:15, endln:90:26
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:90:30, endln:90:31
-          |vpiParent:
-          \_operation: , line:90:14, endln:90:50
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:90:34, endln:90:50
-          |vpiParent:
-          \_operation: , line:90:14, endln:90:50
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.index.sets_p), line:90:42, endln:90:48
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:90:34, endln:90:50
-            |vpiName:sets_p
-            |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.index.sets_p
-            |vpiActual:
-            \_parameter: (work@top.sets_p), line:149:17, endln:149:23
-          |vpiName:$clog2
+      \_constant: , line:90:14, endln:90:50
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:90:52, endln:90:53
         |vpiParent:
@@ -3622,52 +3415,11 @@ design: (work@top)
       \_range: , line:91:10, endln:91:57
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:91:13, endln:91:51
-        |vpiParent:
-        \_operation: , line:91:11, endln:91:54
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:91:14, endln:91:26
-          |vpiParent:
-          \_operation: , line:91:13, endln:91:51
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.way_id.assoc_p), line:91:15, endln:91:22
-            |vpiParent:
-            \_operation: , line:91:14, endln:91:26
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.way_id.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiOperand:
-          \_constant: , line:91:25, endln:91:26
-            |vpiParent:
-            \_operation: , line:91:14, endln:91:26
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:91:30, endln:91:31
-          |vpiParent:
-          \_operation: , line:91:13, endln:91:51
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:91:34, endln:91:51
-          |vpiParent:
-          \_operation: , line:91:13, endln:91:51
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.way_id.assoc_p), line:91:42, endln:91:49
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:91:34, endln:91:51
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.way_id.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiName:$clog2
+      \_constant: , line:91:13, endln:91:51
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:91:53, endln:91:54
         |vpiParent:
@@ -3813,52 +3565,11 @@ design: (work@top)
       \_range: , line:112:11, endln:112:56
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:112:14, endln:112:50
-        |vpiParent:
-        \_operation: , line:112:12, endln:112:53
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:112:15, endln:112:26
-          |vpiParent:
-          \_operation: , line:112:14, endln:112:50
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_stat_mem_pkt_s.index.sets_p), line:112:16, endln:112:22
-            |vpiParent:
-            \_operation: , line:112:15, endln:112:26
-            |vpiName:sets_p
-            |vpiFullName:work@top.bp_icache_stat_mem_pkt_s.index.sets_p
-            |vpiActual:
-            \_parameter: (work@top.sets_p), line:149:17, endln:149:23
-          |vpiOperand:
-          \_constant: , line:112:25, endln:112:26
-            |vpiParent:
-            \_operation: , line:112:15, endln:112:26
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:112:30, endln:112:31
-          |vpiParent:
-          \_operation: , line:112:14, endln:112:50
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:112:34, endln:112:50
-          |vpiParent:
-          \_operation: , line:112:14, endln:112:50
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_stat_mem_pkt_s.index.sets_p), line:112:42, endln:112:48
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:112:34, endln:112:50
-            |vpiName:sets_p
-            |vpiFullName:work@top.bp_icache_stat_mem_pkt_s.index.sets_p
-            |vpiActual:
-            \_parameter: (work@top.sets_p), line:149:17, endln:149:23
-          |vpiName:$clog2
+      \_constant: , line:112:14, endln:112:50
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:112:52, endln:112:53
         |vpiParent:
@@ -3888,52 +3599,11 @@ design: (work@top)
       \_range: , line:113:11, endln:113:58
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:113:14, endln:113:52
-        |vpiParent:
-        \_operation: , line:113:12, endln:113:55
-        |vpiOpType:32
-        |vpiOperand:
-        \_operation: , line:113:15, endln:113:27
-          |vpiParent:
-          \_operation: , line:113:14, endln:113:52
-          |vpiOpType:14
-          |vpiOperand:
-          \_ref_obj: (work@top.bp_icache_stat_mem_pkt_s.way_id.assoc_p), line:113:16, endln:113:23
-            |vpiParent:
-            \_operation: , line:113:15, endln:113:27
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_stat_mem_pkt_s.way_id.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiOperand:
-          \_constant: , line:113:26, endln:113:27
-            |vpiParent:
-            \_operation: , line:113:15, endln:113:27
-            |vpiDecompile:1
-            |vpiSize:64
-            |UINT:1
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:113:31, endln:113:32
-          |vpiParent:
-          \_operation: , line:113:14, endln:113:52
-          |vpiDecompile:1
-          |vpiSize:64
-          |UINT:1
-          |vpiConstType:9
-        |vpiOperand:
-        \_sys_func_call: ($clog2), line:113:35, endln:113:52
-          |vpiParent:
-          \_operation: , line:113:14, endln:113:52
-          |vpiArgument:
-          \_ref_obj: (work@top.bp_icache_stat_mem_pkt_s.way_id.assoc_p), line:113:43, endln:113:50
-            |vpiParent:
-            \_sys_func_call: ($clog2), line:113:35, endln:113:52
-            |vpiName:assoc_p
-            |vpiFullName:work@top.bp_icache_stat_mem_pkt_s.way_id.assoc_p
-            |vpiActual:
-            \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-          |vpiName:$clog2
+      \_constant: , line:113:14, endln:113:52
+        |vpiDecompile:4
+        |vpiSize:64
+        |INT:4
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:113:54, endln:113:55
         |vpiParent:
@@ -3967,26 +3637,11 @@ design: (work@top)
       \_range: , line:123:11, endln:123:54
       |vpiOpType:32
       |vpiOperand:
-      \_operation: , line:123:14, endln:123:27
-        |vpiParent:
-        \_operation: , line:123:12, endln:123:51
-        |vpiOpType:20
-        |vpiOperand:
-        \_ref_obj: (work@top.bp_icache_stat_info_s.lru.assoc_p), line:123:15, endln:123:22
-          |vpiParent:
-          \_operation: , line:123:14, endln:123:27
-          |vpiName:assoc_p
-          |vpiFullName:work@top.bp_icache_stat_info_s.lru.assoc_p
-          |vpiActual:
-          \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-        |vpiOperand:
-        \_constant: , line:123:25, endln:123:26
-          |vpiParent:
-          \_operation: , line:123:14, endln:123:27
-          |vpiDecompile:2
-          |vpiSize:64
-          |UINT:2
-          |vpiConstType:9
+      \_constant: , line:123:14, endln:123:27
+        |vpiDecompile:0
+        |vpiSize:64
+        |UINT:0
+        |vpiConstType:9
       |vpiOperand:
       \_constant: , line:123:32, endln:123:33
         |vpiParent:
@@ -3996,26 +3651,11 @@ design: (work@top)
         |UINT:0
         |vpiConstType:9
       |vpiOperand:
-      \_operation: , line:123:37, endln:123:50
-        |vpiParent:
-        \_operation: , line:123:12, endln:123:51
-        |vpiOpType:11
-        |vpiOperand:
-        \_ref_obj: (work@top.bp_icache_stat_info_s.lru.assoc_p), line:123:38, endln:123:45
-          |vpiParent:
-          \_operation: , line:123:37, endln:123:50
-          |vpiName:assoc_p
-          |vpiFullName:work@top.bp_icache_stat_info_s.lru.assoc_p
-          |vpiActual:
-          \_parameter: (work@top.assoc_p), line:148:17, endln:148:24
-        |vpiOperand:
-        \_constant: , line:123:48, endln:123:49
-          |vpiParent:
-          \_operation: , line:123:37, endln:123:50
-          |vpiDecompile:2
-          |vpiSize:64
-          |UINT:2
-          |vpiConstType:9
+      \_constant: , line:123:37, endln:123:50
+        |vpiDecompile:11
+        |vpiSize:64
+        |INT:11
+        |vpiConstType:7
     |vpiRightRange:
     \_constant: , line:123:52, endln:123:53
       |vpiParent:
@@ -4244,60 +3884,6 @@ design: (work@top)
 \_int_typespec: , line:143:3, endln:143:32
   |vpiParent:
   \_ref_typespec: (work@top)
-\_operation: , line:10:102, endln:10:165
-  |vpiParent:
-  \_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166
-  |vpiOpType:32
-  |vpiOperand:
-  \_operation: , line:10:103, endln:10:131
-    |vpiParent:
-    \_operation: , line:10:102, endln:10:165
-    |vpiOpType:20
-    |vpiOperand:
-    \_constant: , line:10:104, endln:10:118
-      |vpiParent:
-      \_operation: , line:10:103, endln:10:131
-      |vpiDecompile:48
-      |vpiSize:32
-      |UINT:48
-      |vpiTypespec:
-      \_ref_typespec: (work@top.pc)
-        |vpiParent:
-        \_constant: , line:10:104, endln:10:118
-        |vpiFullName:work@top.pc
-        |vpiActual:
-        \_int_typespec: , line:143:3, endln:143:32
-      |vpiConstType:9
-    |vpiOperand:
-    \_constant: , line:10:121, endln:10:130
-      |vpiParent:
-      \_operation: , line:10:103, endln:10:131
-      |vpiDecompile:13
-      |vpiSize:64
-      |UINT:13
-      |vpiConstType:9
-  |vpiOperand:
-  \_constant: , line:10:136, endln:10:150
-  |vpiOperand:
-  \_constant: , line:10:155, endln:10:164
-\_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166
-  |vpiParent:
-  \_operation: , line:10:4, endln:10:168
-  |vpiName:pc
-  |vpiFullName:work@top.pc
-  |vpiDefName:pc
-  |vpiConstantSelect:1
-  |vpiIndexedPartSelectType:1
-  |vpiBaseExpr:
-  \_constant: , line:10:98, endln:10:99
-  |vpiWidthExpr:
-  \_operation: , line:10:102, endln:10:165
-\_int_typespec: , line:143:3, endln:143:32
-  |vpiParent:
-  \_ref_typespec: (work@top.pc)
-\_int_typespec: , line:143:3, endln:143:32
-  |vpiParent:
-  \_ref_typespec: (work@top.pc)
 \_logic_typespec: , line:144:3, endln:144:14
   |vpiRange:
   \_range: , line:144:8, endln:144:14
@@ -4406,6 +3992,77 @@ design: (work@top)
   \_operation: , line:10:5, endln:10:93
   |vpiOperand:
   \_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166
+    |vpiParent:
+    \_operation: , line:10:4, endln:10:168
+    |vpiName:pc
+    |vpiFullName:work@top.pc
+    |vpiDefName:pc
+    |vpiConstantSelect:1
+    |vpiIndexedPartSelectType:1
+    |vpiBaseExpr:
+    \_constant: , line:10:98, endln:10:99
+    |vpiWidthExpr:
+    \_operation: , line:10:102, endln:10:165
+      |vpiParent:
+      \_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166
+      |vpiOpType:32
+      |vpiOperand:
+      \_operation: , line:10:103, endln:10:131
+        |vpiParent:
+        \_operation: , line:10:102, endln:10:165
+        |vpiOpType:20
+        |vpiOperand:
+        \_constant: , line:10:104, endln:10:118
+          |vpiParent:
+          \_operation: , line:10:103, endln:10:131
+          |vpiDecompile:48
+          |vpiSize:32
+          |UINT:48
+          |vpiTypespec:
+          \_ref_typespec: (work@top.pc)
+            |vpiParent:
+            \_constant: , line:10:104, endln:10:118
+            |vpiFullName:work@top.pc
+            |vpiActual:
+            \_int_typespec: , line:143:3, endln:143:32
+          |vpiConstType:9
+        |vpiOperand:
+        \_constant: , line:10:121, endln:10:130
+          |vpiParent:
+          \_operation: , line:10:103, endln:10:131
+          |vpiDecompile:13
+          |vpiSize:64
+          |UINT:13
+          |vpiConstType:9
+      |vpiOperand:
+      \_constant: , line:10:136, endln:10:150
+        |vpiParent:
+        \_operation: , line:10:102, endln:10:165
+        |vpiDecompile:48
+        |vpiSize:32
+        |UINT:48
+        |vpiTypespec:
+        \_ref_typespec: (work@top.pc)
+          |vpiParent:
+          \_constant: , line:10:136, endln:10:150
+          |vpiFullName:work@top.pc
+          |vpiActual:
+          \_int_typespec: , line:143:3, endln:143:32
+        |vpiConstType:9
+      |vpiOperand:
+      \_constant: , line:10:155, endln:10:164
+        |vpiParent:
+        \_operation: , line:10:102, endln:10:165
+        |vpiDecompile:13
+        |vpiSize:64
+        |UINT:13
+        |vpiConstType:9
+\_int_typespec: , line:143:3, endln:143:32
+  |vpiParent:
+  \_ref_typespec: (work@top.pc)
+\_int_typespec: , line:143:3, endln:143:32
+  |vpiParent:
+  \_ref_typespec: (work@top.pc)
 \_cont_assign: , line:9:27, endln:9:37
   |vpiParent:
   \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BlackConst/dut.sv, line:142:1, endln:164:10
diff --git a/tests/CastStructMember/CastStructMember.log b/tests/CastStructMember/CastStructMember.log
index 62ecd0046b..57dd46c264 100644
--- a/tests/CastStructMember/CastStructMember.log
+++ b/tests/CastStructMember/CastStructMember.log
@@ -380,7 +380,7 @@ design: (work@Foo)
     \_module_inst: work@Foo (work@Foo), file:${SURELOG_DIR}/tests/CastStructMember/dut.sv, line:6:1, endln:10:10
     |vpiNetDeclAssign:1
     |vpiRhs:
-    \_constant: 
+    \_constant: , line:8:20, endln:8:31
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
diff --git a/tests/ClassScope/ClassScope.log b/tests/ClassScope/ClassScope.log
index bd28d5c098..8ddde15803 100644
--- a/tests/ClassScope/ClassScope.log
+++ b/tests/ClassScope/ClassScope.log
@@ -24308,26 +24308,11 @@ design: (work@top)
       \_range: , line:40:31, endln:40:44
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:40:32, endln:40:37
-        |vpiParent:
-        \_operation: , line:40:32, endln:40:41
-        |vpiOpType:25
-        |vpiOperand:
-        \_ref_obj: (work@top.T.E), line:40:32, endln:40:33
-          |vpiParent:
-          \_operation: , line:40:32, endln:40:37
-          |vpiName:E
-          |vpiFullName:work@top.T.E
-          |vpiActual:
-          \_parameter: (work@top.E), line:39:16, endln:39:17
-        |vpiOperand:
-        \_constant: , line:40:36, endln:40:37
-          |vpiParent:
-          \_operation: , line:40:32, endln:40:37
-          |vpiDecompile:2
-          |vpiSize:64
-          |UINT:2
-          |vpiConstType:9
+      \_constant: , line:40:32, endln:40:37
+        |vpiDecompile:6
+        |vpiSize:64
+        |INT:6
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:40:40, endln:40:41
         |vpiParent:
diff --git a/tests/ClogCast/ClogCast.log b/tests/ClogCast/ClogCast.log
index 397b8f4e74..91e2ce5cdf 100644
--- a/tests/ClogCast/ClogCast.log
+++ b/tests/ClogCast/ClogCast.log
@@ -2038,25 +2038,11 @@ design: (work@debug_rom)
                   \_part_select: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:47
                   |vpiOpType:24
                   |vpiOperand:
-                  \_operation: , line:38:25, endln:38:42
-                    |vpiParent:
-                    \_operation: , line:38:25, endln:38:44
-                    |vpiOpType:11
-                    |vpiOperand:
-                    \_sys_func_call: ($clog2), line:38:25, endln:38:40
-                      |vpiParent:
-                      \_operation: , line:38:25, endln:38:42
-                      |vpiArgument:
-                      \_ref_obj: (work@debug_rom.addr_i.RomSize), line:38:32, endln:38:39
-                        |vpiParent:
-                        \_sys_func_call: ($clog2), line:38:25, endln:38:40
-                        |vpiName:RomSize
-                        |vpiFullName:work@debug_rom.addr_i.RomSize
-                        |vpiActual:
-                        \_parameter: (work@debug_rom.RomSize), line:10:28, endln:10:35
-                      |vpiName:$clog2
-                    |vpiOperand:
-                    \_constant: , line:38:41, endln:38:42
+                  \_constant: , line:38:25, endln:38:42
+                    |vpiDecompile:4
+                    |vpiSize:64
+                    |INT:4
+                    |vpiConstType:7
                   |vpiOperand:
                   \_constant: , line:38:43, endln:38:44
                 |vpiRightRange:
@@ -2120,25 +2106,10 @@ design: (work@debug_rom)
             |vpiActual:
             \_logic_var: (work@debug_rom.addr_q), line:34:32, endln:34:38
           |vpiOperand:
-          \_operation: , line:46:19, endln:46:44
-            |vpiParent:
-            \_operation: , line:46:10, endln:46:44
-            |vpiTypespec:
-            \_ref_typespec: (work@debug_rom.p_outmux)
-              |vpiParent:
-              \_operation: , line:46:19, endln:46:44
-              |vpiFullName:work@debug_rom.p_outmux
-              |vpiActual:
-              \_integer_typespec: , line:46:19, endln:46:34
-            |vpiOpType:67
-            |vpiOperand:
-            \_ref_obj: (work@debug_rom.p_outmux.RomSize), line:46:36, endln:46:43
-              |vpiParent:
-              \_operation: , line:46:19, endln:46:44
-              |vpiName:RomSize
-              |vpiFullName:work@debug_rom.p_outmux.RomSize
-              |vpiActual:
-              \_parameter: (work@debug_rom.RomSize), line:10:28, endln:10:35
+          \_constant: , line:46:19, endln:46:44
+            |vpiSize:32
+            |UINT:19
+            |vpiConstType:9
         |vpiStmt:
         \_begin: (work@debug_rom.p_outmux), line:46:46, endln:48:9
           |vpiParent:
diff --git a/tests/ConcatWidth/ConcatWidth.log b/tests/ConcatWidth/ConcatWidth.log
index a173244041..5d0060d992 100644
--- a/tests/ConcatWidth/ConcatWidth.log
+++ b/tests/ConcatWidth/ConcatWidth.log
@@ -1606,20 +1606,11 @@ design: (work@top)
                 \_operation: , line:14:51, endln:14:80
                 |vpiOpType:34
                 |vpiOperand:
-                \_operation: , line:14:53, endln:14:67
-                  |vpiParent:
-                  \_operation: , line:14:52, endln:14:74
-                  |vpiOpType:11
-                  |vpiOperand:
-                  \_ref_obj: (work@top.CounterWidth), line:14:53, endln:14:65
-                    |vpiParent:
-                    \_operation: , line:14:53, endln:14:67
-                    |vpiName:CounterWidth
-                    |vpiFullName:work@top.CounterWidth
-                    |vpiActual:
-                    \_parameter: (work@top.CounterWidth), line:2:19, endln:2:31
-                  |vpiOperand:
-                  \_constant: , line:14:66, endln:14:67
+                \_constant: , line:14:53, endln:14:67
+                  |vpiDecompile:31
+                  |vpiSize:64
+                  |INT:31
+                  |vpiConstType:7
                 |vpiOperand:
                 \_operation: , line:14:67, endln:14:73
                   |vpiParent:
diff --git a/tests/ElabParam/ElabParam.log b/tests/ElabParam/ElabParam.log
index 51c4636016..1b6bdd6f10 100644
--- a/tests/ElabParam/ElabParam.log
+++ b/tests/ElabParam/ElabParam.log
@@ -1411,7 +1411,7 @@ design: (work@dut)
       \_cont_assign: , line:16:11, endln:17:46
       |vpiOpType:29
       |vpiOperand:
-      \_constant: , line:16:15, endln:17:46
+      \_constant: , line:16:15, endln:16:37
         |vpiSize:4
         |UINT:2
         |vpiConstType:9
diff --git a/tests/EvalFunc/EvalFunc.log b/tests/EvalFunc/EvalFunc.log
index a4c7ac50a0..5f9f693d61 100644
--- a/tests/EvalFunc/EvalFunc.log
+++ b/tests/EvalFunc/EvalFunc.log
@@ -2831,6 +2831,13 @@ design: (work@top)
                 \_ref_obj: (work@top.log2_2.value), line:56:17, endln:56:22
                   |vpiParent:
                   \_func_call: (foo), line:56:13, endln:56:23
+                  |vpiTypespec:
+                  \_ref_typespec: (work@top.log2_2.value)
+                    |vpiParent:
+                    \_ref_obj: (work@top.log2_2.value), line:56:17, endln:56:22
+                    |vpiFullName:work@top.log2_2.value
+                    |vpiActual:
+                    \_integer_typespec: , line:29:7, endln:29:14
                   |vpiName:value
                   |vpiFullName:work@top.log2_2.value
                   |vpiActual:
diff --git a/tests/EvalFuncCont/EvalFuncCont.log b/tests/EvalFuncCont/EvalFuncCont.log
index b45f53a173..7911c85941 100644
--- a/tests/EvalFuncCont/EvalFuncCont.log
+++ b/tests/EvalFuncCont/EvalFuncCont.log
@@ -1884,18 +1884,11 @@ design: (work@t)
           \_if_stmt: , line:31:7, endln:31:32
           |vpiOpType:15
           |vpiOperand:
-          \_sys_func_call: ($bits), line:31:11, endln:31:19
-            |vpiParent:
-            \_operation: , line:31:11, endln:31:24
-            |vpiArgument:
-            \_ref_obj: (work@t.z), line:31:17, endln:31:18
-              |vpiParent:
-              \_sys_func_call: ($bits), line:31:11, endln:31:19
-              |vpiName:z
-              |vpiFullName:work@t.z
-              |vpiActual:
-              \_logic_net: (work@t.z), line:18:23, endln:18:24
-            |vpiName:$bits
+          \_constant: , line:31:11, endln:31:19
+            |vpiDecompile:4
+            |vpiSize:64
+            |UINT:4
+            |vpiConstType:9
           |vpiOperand:
           \_constant: , line:31:23, endln:31:24
         |vpiStmt:
diff --git a/tests/ExprEvalBits/ExprEvalBits.log b/tests/ExprEvalBits/ExprEvalBits.log
index fb8043bb64..7a5cc5a951 100644
--- a/tests/ExprEvalBits/ExprEvalBits.log
+++ b/tests/ExprEvalBits/ExprEvalBits.log
@@ -367,43 +367,11 @@ design: (work@top)
       \_range: , line:3:23, endln:3:57
       |vpiOpType:24
       |vpiOperand:
-      \_operation: , line:3:24, endln:3:46
-        |vpiParent:
-        \_operation: , line:3:24, endln:3:54
-        |vpiOpType:24
-        |vpiOperand:
-        \_operation: , line:3:24, endln:3:41
-          |vpiParent:
-          \_operation: , line:3:24, endln:3:46
-          |vpiOpType:11
-          |vpiOperand:
-          \_sys_func_call: ($bits), line:3:24, endln:3:36
-            |vpiParent:
-            \_operation: , line:3:24, endln:3:41
-            |vpiArgument:
-            \_ref_obj: (PARAM), line:3:30, endln:3:35
-              |vpiParent:
-              \_sys_func_call: ($bits), line:3:24, endln:3:36
-              |vpiName:PARAM
-              |vpiActual:
-              \_parameter: (work@top.PARAM), line:2:19, endln:2:24
-            |vpiName:$bits
-          |vpiOperand:
-          \_constant: , line:3:39, endln:3:41
-            |vpiParent:
-            \_operation: , line:3:24, endln:3:41
-            |vpiDecompile:32
-            |vpiSize:64
-            |UINT:32
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:3:44, endln:3:46
-          |vpiParent:
-          \_operation: , line:3:24, endln:3:46
-          |vpiDecompile:85
-          |vpiSize:64
-          |UINT:85
-          |vpiConstType:9
+      \_constant: , line:3:24, endln:3:46
+        |vpiDecompile:85
+        |vpiSize:64
+        |INT:85
+        |vpiConstType:7
       |vpiOperand:
       \_ref_obj: (PARAM), line:3:49, endln:3:54
         |vpiParent:
diff --git a/tests/ExprReductionBits/ExprReductionBits.log b/tests/ExprReductionBits/ExprReductionBits.log
index ab59160eda..60adaee46b 100644
--- a/tests/ExprReductionBits/ExprReductionBits.log
+++ b/tests/ExprReductionBits/ExprReductionBits.log
@@ -367,43 +367,11 @@ design: (work@top)
       \_range: , line:3:23, endln:3:57
       |vpiOpType:24
       |vpiOperand:
-      \_operation: , line:3:24, endln:3:46
-        |vpiParent:
-        \_operation: , line:3:24, endln:3:54
-        |vpiOpType:24
-        |vpiOperand:
-        \_operation: , line:3:24, endln:3:41
-          |vpiParent:
-          \_operation: , line:3:24, endln:3:46
-          |vpiOpType:11
-          |vpiOperand:
-          \_sys_func_call: ($bits), line:3:24, endln:3:36
-            |vpiParent:
-            \_operation: , line:3:24, endln:3:41
-            |vpiArgument:
-            \_ref_obj: (PARAM), line:3:30, endln:3:35
-              |vpiParent:
-              \_sys_func_call: ($bits), line:3:24, endln:3:36
-              |vpiName:PARAM
-              |vpiActual:
-              \_parameter: (work@top.PARAM), line:2:19, endln:2:24
-            |vpiName:$bits
-          |vpiOperand:
-          \_constant: , line:3:39, endln:3:41
-            |vpiParent:
-            \_operation: , line:3:24, endln:3:41
-            |vpiDecompile:32
-            |vpiSize:64
-            |UINT:32
-            |vpiConstType:9
-        |vpiOperand:
-        \_constant: , line:3:44, endln:3:46
-          |vpiParent:
-          \_operation: , line:3:24, endln:3:46
-          |vpiDecompile:85
-          |vpiSize:64
-          |UINT:85
-          |vpiConstType:9
+      \_constant: , line:3:24, endln:3:46
+        |vpiDecompile:85
+        |vpiSize:64
+        |INT:85
+        |vpiConstType:7
       |vpiOperand:
       \_ref_obj: (PARAM), line:3:49, endln:3:54
         |vpiParent:
diff --git a/tests/Func128Bits/Func128Bits.log b/tests/Func128Bits/Func128Bits.log
index e12389f210..74a75eba66 100644
--- a/tests/Func128Bits/Func128Bits.log
+++ b/tests/Func128Bits/Func128Bits.log
@@ -1972,39 +1972,11 @@ design: (work@ScratchPad)
             \_assignment: , line:21:9, endln:21:61
             |vpiOpType:34
             |vpiOperand:
-            \_operation: , line:21:26, endln:21:54
-              |vpiParent:
-              \_operation: , line:21:25, endln:21:61
-              |vpiOpType:25
-              |vpiOperand:
-              \_operation: , line:21:26, endln:21:43
-                |vpiParent:
-                \_operation: , line:21:26, endln:21:54
-                |vpiOpType:25
-                |vpiOperand:
-                \_ref_obj: (work@ScratchPad.calcBaseAddrs.M_COUNT), line:21:26, endln:21:33
-                  |vpiParent:
-                  \_operation: , line:21:26, endln:21:43
-                  |vpiName:M_COUNT
-                  |vpiFullName:work@ScratchPad.calcBaseAddrs.M_COUNT
-                  |vpiActual:
-                  \_parameter: (work@ScratchPad.M_COUNT), line:10:11, endln:10:18
-                |vpiOperand:
-                \_ref_obj: (work@ScratchPad.calcBaseAddrs.M_REGIONS), line:21:34, endln:21:43
-                  |vpiParent:
-                  \_operation: , line:21:26, endln:21:43
-                  |vpiName:M_REGIONS
-                  |vpiFullName:work@ScratchPad.calcBaseAddrs.M_REGIONS
-                  |vpiActual:
-                  \_parameter: (work@ScratchPad.M_REGIONS), line:11:11, endln:11:20
-              |vpiOperand:
-              \_ref_obj: (work@ScratchPad.calcBaseAddrs.ADDR_WIDTH), line:21:44, endln:21:54
-                |vpiParent:
-                \_operation: , line:21:26, endln:21:54
-                |vpiName:ADDR_WIDTH
-                |vpiFullName:work@ScratchPad.calcBaseAddrs.ADDR_WIDTH
-                |vpiActual:
-                \_parameter: (work@ScratchPad.ADDR_WIDTH), line:12:11, endln:12:21
+            \_constant: , line:21:26, endln:21:54
+              |vpiDecompile:128
+              |vpiSize:64
+              |INT:128
+              |vpiConstType:7
             |vpiOperand:
             \_operation: , line:21:54, endln:21:60
               |vpiParent:
@@ -2098,26 +2070,11 @@ design: (work@ScratchPad)
               |vpiActual:
               \_integer_var: (work@ScratchPad.calcBaseAddrs.i), line:15:13, endln:15:14
             |vpiOperand:
-            \_operation: , line:23:25, endln:23:42
-              |vpiParent:
-              \_operation: , line:23:21, endln:23:42
-              |vpiOpType:25
-              |vpiOperand:
-              \_ref_obj: (work@ScratchPad.calcBaseAddrs.M_COUNT), line:23:25, endln:23:32
-                |vpiParent:
-                \_operation: , line:23:25, endln:23:42
-                |vpiName:M_COUNT
-                |vpiFullName:work@ScratchPad.calcBaseAddrs.M_COUNT
-                |vpiActual:
-                \_parameter: (work@ScratchPad.M_COUNT), line:10:11, endln:10:18
-              |vpiOperand:
-              \_ref_obj: (work@ScratchPad.calcBaseAddrs.M_REGIONS), line:23:33, endln:23:42
-                |vpiParent:
-                \_operation: , line:23:25, endln:23:42
-                |vpiName:M_REGIONS
-                |vpiFullName:work@ScratchPad.calcBaseAddrs.M_REGIONS
-                |vpiActual:
-                \_parameter: (work@ScratchPad.M_REGIONS), line:11:11, endln:11:20
+            \_constant: , line:23:25, endln:23:42
+              |vpiDecompile:4
+              |vpiSize:64
+              |INT:4
+              |vpiConstType:7
           |vpiStmt:
           \_begin: (work@ScratchPad.calcBaseAddrs), line:23:55, endln:34:12
             |vpiParent:
@@ -2503,36 +2460,11 @@ design: (work@ScratchPad)
       \_range: , line:14:10, endln:14:44
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:14:11, endln:14:39
-        |vpiParent:
-        \_operation: , line:14:11, endln:14:41
-        |vpiOpType:25
-        |vpiOperand:
-        \_operation: , line:14:11, endln:14:28
-          |vpiParent:
-          \_operation: , line:14:11, endln:14:39
-          |vpiOpType:25
-          |vpiOperand:
-          \_ref_obj: (M_COUNT), line:14:11, endln:14:18
-            |vpiParent:
-            \_operation: , line:14:11, endln:14:28
-            |vpiName:M_COUNT
-            |vpiActual:
-            \_parameter: (work@ScratchPad.M_COUNT), line:10:11, endln:10:18
-          |vpiOperand:
-          \_ref_obj: (M_REGIONS), line:14:19, endln:14:28
-            |vpiParent:
-            \_operation: , line:14:11, endln:14:28
-            |vpiName:M_REGIONS
-            |vpiActual:
-            \_parameter: (work@ScratchPad.M_REGIONS), line:11:11, endln:11:20
-        |vpiOperand:
-        \_ref_obj: (ADDR_WIDTH), line:14:29, endln:14:39
-          |vpiParent:
-          \_operation: , line:14:11, endln:14:39
-          |vpiName:ADDR_WIDTH
-          |vpiActual:
-          \_parameter: (work@ScratchPad.ADDR_WIDTH), line:12:11, endln:12:21
+      \_constant: , line:14:11, endln:14:39
+        |vpiDecompile:128
+        |vpiSize:64
+        |INT:128
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:14:40, endln:14:41
         |vpiParent:
diff --git a/tests/FuncDef2/FuncDef2.log b/tests/FuncDef2/FuncDef2.log
index 5d7095178f..e8c3fc6f82 100644
--- a/tests/FuncDef2/FuncDef2.log
+++ b/tests/FuncDef2/FuncDef2.log
@@ -21849,6 +21849,13 @@ design: (work@tnoc_vc_splitter)
                 \_operation: , line:127:36, endln:127:68
                   |vpiParent:
                   \_func_call: (tnoc_clog2), line:127:25, endln:127:69
+                  |vpiTypespec:
+                  \_ref_typespec: (work@tnoc_vc_splitter.get_byte_size_width)
+                    |vpiParent:
+                    \_operation: , line:127:36, endln:127:68
+                    |vpiFullName:work@tnoc_vc_splitter.get_byte_size_width
+                    |vpiActual:
+                    \_bit_typespec: , line:66:37, endln:66:40
                   |vpiOpType:12
                   |vpiOperand:
                   \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64
diff --git a/tests/FuncIoTypespec/FuncIoTypespec.log b/tests/FuncIoTypespec/FuncIoTypespec.log
index ba623b522d..3089f096bc 100644
--- a/tests/FuncIoTypespec/FuncIoTypespec.log
+++ b/tests/FuncIoTypespec/FuncIoTypespec.log
@@ -4340,20 +4340,11 @@ design: (work@top)
             |vpiActual:
             \_parameter: (work@top.inst.width_a), line:2:16, endln:2:23
           |vpiOperand:
-          \_operation: , line:50:43, endln:50:52
-            |vpiParent:
-            \_operation: , line:50:23, endln:50:52
-            |vpiOpType:24
-            |vpiOperand:
-            \_ref_obj: (work@top.inst.fshr_u.width_a), line:50:43, endln:50:50
-              |vpiParent:
-              \_operation: , line:50:43, endln:50:52
-              |vpiName:width_a
-              |vpiFullName:work@top.inst.fshr_u.width_a
-              |vpiActual:
-              \_parameter: (work@top.inst.width_a), line:2:16, endln:2:23
-            |vpiOperand:
-            \_constant: , line:50:51, endln:50:52
+          \_constant: , line:50:43, endln:50:52
+            |vpiDecompile:241
+            |vpiSize:64
+            |UINT:241
+            |vpiConstType:9
         |vpiLhs:
         \_parameter: (work@top.inst.fshr_u.ilen), line:50:16, endln:50:20
           |vpiParent:
@@ -4726,20 +4717,11 @@ design: (work@top)
                 \_assignment: , line:70:10, endln:70:52
                 |vpiOpType:34
                 |vpiOperand:
-                \_operation: , line:70:35, endln:70:44
-                  |vpiParent:
-                  \_operation: , line:70:33, endln:70:52
-                  |vpiOpType:24
-                  |vpiOperand:
-                  \_ref_obj: (work@top.inst.fshl_s.width_a), line:70:35, endln:70:42
-                    |vpiParent:
-                    \_operation: , line:70:35, endln:70:44
-                    |vpiName:width_a
-                    |vpiFullName:work@top.inst.fshl_s.width_a
-                    |vpiActual:
-                    \_parameter: (work@top.inst.width_a), line:2:16, endln:2:23
-                  |vpiOperand:
-                  \_constant: , line:70:43, endln:70:44
+                \_constant: , line:70:35, endln:70:44
+                  |vpiDecompile:241
+                  |vpiSize:64
+                  |UINT:241
+                  |vpiConstType:9
                 |vpiOperand:
                 \_operation: , line:70:45, endln:70:51
                   |vpiParent:
diff --git a/tests/HierMultiSelect/HierMultiSelect.log b/tests/HierMultiSelect/HierMultiSelect.log
index f197090613..eaa619e494 100644
--- a/tests/HierMultiSelect/HierMultiSelect.log
+++ b/tests/HierMultiSelect/HierMultiSelect.log
@@ -788,14 +788,11 @@ design: (work@dm_csrs)
           |vpiConstantSelect:1
           |vpiIndexedPartSelectType:1
           |vpiBaseExpr:
-          \_operation: , line:4:34, endln:4:40
-            |vpiParent:
-            \_indexed_part_select: key (work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key.key), line:4:34, endln:4:46
-            |vpiOpType:25
-            |vpiOperand:
-            \_constant: , line:4:34, endln:4:35
-            |vpiOperand:
-            \_constant: , line:4:38, endln:4:40
+          \_constant: , line:4:34, endln:4:40
+            |vpiDecompile:32
+            |vpiSize:64
+            |INT:32
+            |vpiConstType:7
           |vpiWidthExpr:
           \_constant: , line:4:44, endln:4:46
     |vpiLhs:
diff --git a/tests/MultiConcat/MultiConcat.log b/tests/MultiConcat/MultiConcat.log
index 1393b8620a..578046fd52 100644
--- a/tests/MultiConcat/MultiConcat.log
+++ b/tests/MultiConcat/MultiConcat.log
@@ -5321,7 +5321,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:0
           |vpiSize:64
           |INT:0
@@ -5353,7 +5353,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:16
           |vpiSize:64
           |INT:16
@@ -5417,7 +5417,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:1
           |vpiSize:64
           |INT:1
@@ -5449,7 +5449,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:14
           |vpiSize:64
           |INT:14
@@ -5521,7 +5521,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:1
           |vpiSize:64
           |INT:1
@@ -5553,7 +5553,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:14
           |vpiSize:64
           |INT:14
@@ -5617,7 +5617,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:2
           |vpiSize:64
           |INT:2
@@ -5649,7 +5649,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:12
           |vpiSize:64
           |INT:12
@@ -5721,7 +5721,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:2
           |vpiSize:64
           |INT:2
@@ -5753,7 +5753,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:12
           |vpiSize:64
           |INT:12
@@ -5817,7 +5817,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:3
           |vpiSize:64
           |INT:3
@@ -5849,7 +5849,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:10
           |vpiSize:64
           |INT:10
@@ -5921,7 +5921,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:3
           |vpiSize:64
           |INT:3
@@ -5953,7 +5953,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:10
           |vpiSize:64
           |INT:10
@@ -6017,7 +6017,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:4
           |vpiSize:64
           |INT:4
@@ -6049,7 +6049,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:8
           |vpiSize:64
           |INT:8
@@ -6121,7 +6121,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:4
           |vpiSize:64
           |INT:4
@@ -6153,7 +6153,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:8
           |vpiSize:64
           |INT:8
@@ -6217,7 +6217,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:5
           |vpiSize:64
           |INT:5
@@ -6249,7 +6249,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:6
           |vpiSize:64
           |INT:6
@@ -6321,7 +6321,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:5
           |vpiSize:64
           |INT:5
@@ -6353,7 +6353,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:6
           |vpiSize:64
           |INT:6
@@ -6417,7 +6417,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:6
           |vpiSize:64
           |INT:6
@@ -6449,7 +6449,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:4
           |vpiSize:64
           |INT:4
@@ -6521,7 +6521,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:6
           |vpiSize:64
           |INT:6
@@ -6553,7 +6553,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:4
           |vpiSize:64
           |INT:4
@@ -6617,7 +6617,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:125:7, endln:126:33
+        \_constant: , line:125:9, endln:125:12
           |vpiDecompile:7
           |vpiSize:64
           |INT:7
@@ -6649,7 +6649,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:127:7, endln:127:33
+        \_constant: , line:127:9, endln:127:14
           |vpiDecompile:2
           |vpiSize:64
           |INT:2
@@ -6721,7 +6721,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:109:9, endln:110:32
+        \_constant: , line:109:11, endln:109:14
           |vpiDecompile:7
           |vpiSize:64
           |INT:7
@@ -6753,7 +6753,7 @@ design: (unnamed)
         \_operation: , line:132:82, endln:170:4
         |vpiOpType:34
         |vpiOperand:
-        \_constant: , line:111:9, endln:111:35
+        \_constant: , line:111:11, endln:111:16
           |vpiDecompile:2
           |vpiSize:64
           |INT:2
diff --git a/tests/OneImport/OneImport.log b/tests/OneImport/OneImport.log
index 97c1bfa888..661f7f003c 100644
--- a/tests/OneImport/OneImport.log
+++ b/tests/OneImport/OneImport.log
@@ -776,7 +776,7 @@ design: (work@dut)
       \_cont_assign: , line:18:10, endln:19:35
       |vpiOpType:29
       |vpiOperand:
-      \_constant: , line:18:14, endln:19:35
+      \_constant: , line:18:14, endln:18:35
         |vpiSize:3
         |UINT:2
         |vpiConstType:9
diff --git a/tests/PackageFuncCall/PackageFuncCall.log b/tests/PackageFuncCall/PackageFuncCall.log
index fab5bd9f2d..747035fd8b 100644
--- a/tests/PackageFuncCall/PackageFuncCall.log
+++ b/tests/PackageFuncCall/PackageFuncCall.log
@@ -1646,7 +1646,7 @@ design: (work@top)
             |vpiActual:
             \_int_var: (prim_cipher_pkg::sbox4_64bit::k), line:11:14, endln:11:15
           |vpiOperand:
-          \_constant: , line:11:21, endln:11:29
+          \_constant: , line:11:25, endln:11:29
             |vpiDecompile:16
             |vpiSize:64
             |INT:16
diff --git a/tests/PartSelect4/PartSelect4.log b/tests/PartSelect4/PartSelect4.log
index 7223e53eb3..628c6b70a6 100644
--- a/tests/PartSelect4/PartSelect4.log
+++ b/tests/PartSelect4/PartSelect4.log
@@ -1327,26 +1327,11 @@ design: (work@xbar_main)
       \_range: , line:5:65, endln:5:74
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:5:66, endln:5:69
-        |vpiParent:
-        \_operation: , line:5:66, endln:5:71
-        |vpiOpType:25
-        |vpiOperand:
-        \_ref_obj: (work@tlul_socket_1n.DReqDepth.N), line:5:66, endln:5:67
-          |vpiParent:
-          \_operation: , line:5:66, endln:5:69
-          |vpiName:N
-          |vpiFullName:work@tlul_socket_1n.DReqDepth.N
-          |vpiActual:
-          \_parameter: (work@xbar_main.u_s1n_25.N), line:5:48, endln:5:49
-        |vpiOperand:
-        \_constant: , line:5:68, endln:5:69
-          |vpiParent:
-          \_operation: , line:5:66, endln:5:69
-          |vpiDecompile:4
-          |vpiSize:64
-          |UINT:4
-          |vpiConstType:9
+      \_constant: , line:5:66, endln:5:69
+        |vpiDecompile:32
+        |vpiSize:64
+        |INT:32
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:5:70, endln:5:71
         |vpiParent:
@@ -1454,26 +1439,11 @@ design: (work@xbar_main)
       \_range: , line:5:65, endln:5:74
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:5:66, endln:5:69
-        |vpiParent:
-        \_operation: , line:5:66, endln:5:71
-        |vpiOpType:25
-        |vpiOperand:
-        \_ref_obj: (work@xbar_main.u_s1n_25.DReqDepth.N), line:5:66, endln:5:67
-          |vpiParent:
-          \_operation: , line:5:66, endln:5:69
-          |vpiName:N
-          |vpiFullName:work@xbar_main.u_s1n_25.DReqDepth.N
-          |vpiActual:
-          \_parameter: (work@xbar_main.u_s1n_25.N), line:5:48, endln:5:49
-        |vpiOperand:
-        \_constant: , line:5:68, endln:5:69
-          |vpiParent:
-          \_operation: , line:5:66, endln:5:69
-          |vpiDecompile:4
-          |vpiSize:64
-          |UINT:4
-          |vpiConstType:9
+      \_constant: , line:5:66, endln:5:69
+        |vpiDecompile:32
+        |vpiSize:64
+        |INT:32
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:5:70, endln:5:71
         |vpiParent:
diff --git a/tests/PatternAssignment/PatternAssignment.log b/tests/PatternAssignment/PatternAssignment.log
index b910700780..08cdb64e10 100644
--- a/tests/PatternAssignment/PatternAssignment.log
+++ b/tests/PatternAssignment/PatternAssignment.log
@@ -462,7 +462,7 @@ design: (work@dut)
           |BIN:1
           |vpiConstType:3
       |vpiOperand:
-      \_constant: , line:10:12, endln:13:2
+      \_constant: , line:12:7, endln:12:25
         |vpiDecompile:1
         |vpiSize:64
         |INT:1
diff --git a/tests/StringRange/StringRange.log b/tests/StringRange/StringRange.log
index dba6c5eb82..e5689428bb 100644
--- a/tests/StringRange/StringRange.log
+++ b/tests/StringRange/StringRange.log
@@ -2566,6 +2566,13 @@ design: (work@top)
                   |vpiDecompile:"O"
                   |vpiSize:8
                   |STRING:O
+                  |vpiTypespec:
+                  \_ref_typespec: (work@Example)
+                    |vpiParent:
+                    \_constant: , line:34:36, endln:34:39
+                    |vpiFullName:work@Example
+                    |vpiActual:
+                    \_logic_typespec: , line:7:15, endln:7:21
                   |vpiConstType:6
                 |vpiName:flip
                 |vpiFunction:
@@ -4776,6 +4783,13 @@ design: (work@top)
         \_operation: , line:8:16, endln:8:20
           |vpiParent:
           \_assignment: , line:8:9, endln:8:20
+          |vpiTypespec:
+          \_ref_typespec: (work@top.e1.flip)
+            |vpiParent:
+            \_operation: , line:8:16, endln:8:20
+            |vpiFullName:work@top.e1.flip
+            |vpiActual:
+            \_logic_typespec: , line:7:15, endln:7:21
           |vpiOpType:4
           |vpiOperand:
           \_ref_obj: (work@top.e1.flip.inp), line:8:17, endln:8:20
@@ -7477,6 +7491,13 @@ design: (work@top)
         \_operation: , line:8:16, endln:8:20
           |vpiParent:
           \_assignment: , line:8:9, endln:8:20
+          |vpiTypespec:
+          \_ref_typespec: (work@top.e2.flip)
+            |vpiParent:
+            \_operation: , line:8:16, endln:8:20
+            |vpiFullName:work@top.e2.flip
+            |vpiActual:
+            \_logic_typespec: , line:7:15, endln:7:21
           |vpiOpType:4
           |vpiOperand:
           \_ref_obj: (work@top.e2.flip.inp), line:8:17, endln:8:20
@@ -10178,6 +10199,13 @@ design: (work@top)
         \_operation: , line:8:16, endln:8:20
           |vpiParent:
           \_assignment: , line:8:9, endln:8:20
+          |vpiTypespec:
+          \_ref_typespec: (work@top.e3.flip)
+            |vpiParent:
+            \_operation: , line:8:16, endln:8:20
+            |vpiFullName:work@top.e3.flip
+            |vpiActual:
+            \_logic_typespec: , line:7:15, endln:7:21
           |vpiOpType:4
           |vpiOperand:
           \_ref_obj: (work@top.e3.flip.inp), line:8:17, endln:8:20
@@ -12480,6 +12508,13 @@ design: (work@top)
         \_operation: , line:8:16, endln:8:20
           |vpiParent:
           \_assignment: , line:8:9, endln:8:20
+          |vpiTypespec:
+          \_ref_typespec: (work@top.e4.flip)
+            |vpiParent:
+            \_operation: , line:8:16, endln:8:20
+            |vpiFullName:work@top.e4.flip
+            |vpiActual:
+            \_logic_typespec: , line:7:15, endln:7:21
           |vpiOpType:4
           |vpiOperand:
           \_ref_obj: (work@top.e4.flip.inp), line:8:17, endln:8:20
diff --git a/tests/TypespecBits/TypespecBits.log b/tests/TypespecBits/TypespecBits.log
new file mode 100644
index 0000000000..be7d59e5d5
--- /dev/null
+++ b/tests/TypespecBits/TypespecBits.log
@@ -0,0 +1,688 @@
+[INF:CM0023] Creating log file ${SURELOG_DIR}/build/regression/TypespecBits/slpp_all/surelog.log.
+
+AST_DEBUG_BEGIN
+LIB:  work
+FILE: ${SURELOG_DIR}/tests/TypespecBits/dut.sv
+n<> u<0> t<_INVALID_> f<0> l<0:0>
+n<> u<1> t<Null_rule> p<151> s<150> l<2:1> el<1:2>
+n<module> u<2> t<Module_keyword> p<36> s<3> l<2:1> el<2:7>
+n<top> u<3> t<StringConst> p<36> s<18> l<2:8> el<2:11>
+n<> u<4> t<IntegerAtomType_Int> p<5> l<2:24> el<2:27>
+n<> u<5> t<Data_type> p<6> c<4> l<2:24> el<2:27>
+n<> u<6> t<Data_type_or_implicit> p<16> c<5> s<15> l<2:24> el<2:27>
+n<W> u<7> t<StringConst> p<14> s<13> l<2:28> el<2:29>
+n<4> u<8> t<IntConst> p<9> l<2:32> el<2:33>
+n<> u<9> t<Primary_literal> p<10> c<8> l<2:32> el<2:33>
+n<> u<10> t<Constant_primary> p<11> c<9> l<2:32> el<2:33>
+n<> u<11> t<Constant_expression> p<12> c<10> l<2:32> el<2:33>
+n<> u<12> t<Constant_mintypmax_expression> p<13> c<11> l<2:32> el<2:33>
+n<> u<13> t<Constant_param_expression> p<14> c<12> l<2:32> el<2:33>
+n<> u<14> t<Param_assignment> p<15> c<7> l<2:28> el<2:33>
+n<> u<15> t<List_of_param_assignments> p<16> c<14> l<2:28> el<2:33>
+n<> u<16> t<Parameter_declaration> p<17> c<6> l<2:14> el<2:33>
+n<> u<17> t<Parameter_port_declaration> p<18> c<16> l<2:14> el<2:33>
+n<> u<18> t<Parameter_port_list> p<36> c<17> s<35> l<2:12> el<2:34>
+n<> u<19> t<PortDir_Inp> p<32> s<31> l<2:36> el<2:41>
+n<31> u<20> t<IntConst> p<21> l<2:43> el<2:45>
+n<> u<21> t<Primary_literal> p<22> c<20> l<2:43> el<2:45>
+n<> u<22> t<Constant_primary> p<23> c<21> l<2:43> el<2:45>
+n<> u<23> t<Constant_expression> p<28> c<22> s<27> l<2:43> el<2:45>
+n<0> u<24> t<IntConst> p<25> l<2:46> el<2:47>
+n<> u<25> t<Primary_literal> p<26> c<24> l<2:46> el<2:47>
+n<> u<26> t<Constant_primary> p<27> c<25> l<2:46> el<2:47>
+n<> u<27> t<Constant_expression> p<28> c<26> l<2:46> el<2:47>
+n<> u<28> t<Constant_range> p<29> c<23> l<2:43> el<2:47>
+n<> u<29> t<Packed_dimension> p<30> c<28> l<2:42> el<2:48>
+n<> u<30> t<Data_type_or_implicit> p<31> c<29> l<2:42> el<2:48>
+n<> u<31> t<Net_port_type> p<32> c<30> l<2:42> el<2:48>
+n<> u<32> t<Net_port_header> p<34> c<19> s<33> l<2:36> el<2:48>
+n<rand_i> u<33> t<StringConst> p<34> l<2:49> el<2:55>
+n<> u<34> t<Ansi_port_declaration> p<35> c<32> l<2:36> el<2:55>
+n<> u<35> t<List_of_port_declarations> p<36> c<34> l<2:35> el<2:56>
+n<> u<36> t<Module_ansi_header> p<148> c<2> s<66> l<2:1> el<2:57>
+n<> u<37> t<IntVec_TypeLogic> p<58> s<47> l<4:9> el<4:14>
+n<4> u<38> t<IntConst> p<39> l<4:21> el<4:22>
+n<> u<39> t<Primary_literal> p<40> c<38> l<4:21> el<4:22>
+n<> u<40> t<Constant_primary> p<41> c<39> l<4:21> el<4:22>
+n<> u<41> t<Constant_expression> p<46> c<40> s<45> l<4:21> el<4:22>
+n<0> u<42> t<IntConst> p<43> l<4:23> el<4:24>
+n<> u<43> t<Primary_literal> p<44> c<42> l<4:23> el<4:24>
+n<> u<44> t<Constant_primary> p<45> c<43> l<4:23> el<4:24>
+n<> u<45> t<Constant_expression> p<46> c<44> l<4:23> el<4:24>
+n<> u<46> t<Constant_range> p<47> c<41> l<4:21> el<4:24>
+n<> u<47> t<Packed_dimension> p<58> c<46> s<57> l<4:20> el<4:25>
+n<W> u<48> t<StringConst> p<49> l<4:26> el<4:27>
+n<> u<49> t<Primary_literal> p<50> c<48> l<4:26> el<4:27>
+n<> u<50> t<Constant_primary> p<51> c<49> l<4:26> el<4:27>
+n<> u<51> t<Constant_expression> p<56> c<50> s<55> l<4:26> el<4:27>
+n<0> u<52> t<IntConst> p<53> l<4:28> el<4:29>
+n<> u<53> t<Primary_literal> p<54> c<52> l<4:28> el<4:29>
+n<> u<54> t<Constant_primary> p<55> c<53> l<4:28> el<4:29>
+n<> u<55> t<Constant_expression> p<56> c<54> l<4:28> el<4:29>
+n<> u<56> t<Constant_range> p<57> c<51> l<4:26> el<4:29>
+n<> u<57> t<Packed_dimension> p<58> c<56> l<4:25> el<4:30>
+n<> u<58> t<Data_type> p<60> c<37> s<59> l<4:9> el<4:30>
+n<sheet_t> u<59> t<StringConst> p<60> l<4:31> el<4:38>
+n<> u<60> t<Type_declaration> p<61> c<58> l<4:1> el<4:39>
+n<> u<61> t<Data_declaration> p<62> c<60> l<4:1> el<4:39>
+n<> u<62> t<Package_or_generate_item_declaration> p<63> c<61> l<4:1> el<4:39>
+n<> u<63> t<Module_or_generate_item_declaration> p<64> c<62> l<4:1> el<4:39>
+n<> u<64> t<Module_common_item> p<65> c<63> l<4:1> el<4:39>
+n<> u<65> t<Module_or_generate_item> p<66> c<64> l<4:1> el<4:39>
+n<> u<66> t<Non_port_module_item> p<148> c<65> s<100> l<4:1> el<4:39>
+n<> u<67> t<IntVec_TypeLogic> p<90> s<89> l<6:1> el<6:6>
+n<> u<68> t<Dollar_keyword> p<75> s<69> l<6:8> el<6:9>
+n<bits> u<69> t<StringConst> p<75> s<74> l<6:9> el<6:13>
+n<sheet_t> u<70> t<StringConst> p<71> l<6:14> el<6:21>
+n<> u<71> t<Primary_literal> p<72> c<70> l<6:14> el<6:21>
+n<> u<72> t<Primary> p<73> c<71> l<6:14> el<6:21>
+n<> u<73> t<Expression> p<74> c<72> l<6:14> el<6:21>
+n<> u<74> t<List_of_arguments> p<75> c<73> l<6:14> el<6:21>
+n<> u<75> t<Subroutine_call> p<76> c<68> l<6:8> el<6:22>
+n<> u<76> t<Constant_primary> p<77> c<75> l<6:8> el<6:22>
+n<> u<77> t<Constant_expression> p<83> c<76> s<82> l<6:8> el<6:22>
+n<1> u<78> t<IntConst> p<79> l<6:23> el<6:24>
+n<> u<79> t<Primary_literal> p<80> c<78> l<6:23> el<6:24>
+n<> u<80> t<Constant_primary> p<81> c<79> l<6:23> el<6:24>
+n<> u<81> t<Constant_expression> p<83> c<80> l<6:23> el<6:24>
+n<> u<82> t<BinOp_Minus> p<83> s<81> l<6:22> el<6:23>
+n<> u<83> t<Constant_expression> p<88> c<77> s<87> l<6:8> el<6:24>
+n<0> u<84> t<IntConst> p<85> l<6:25> el<6:26>
+n<> u<85> t<Primary_literal> p<86> c<84> l<6:25> el<6:26>
+n<> u<86> t<Constant_primary> p<87> c<85> l<6:25> el<6:26>
+n<> u<87> t<Constant_expression> p<88> c<86> l<6:25> el<6:26>
+n<> u<88> t<Constant_range> p<89> c<83> l<6:8> el<6:26>
+n<> u<89> t<Packed_dimension> p<90> c<88> l<6:7> el<6:27>
+n<> u<90> t<Data_type> p<94> c<67> s<93> l<6:1> el<6:27>
+n<c0> u<91> t<StringConst> p<92> l<6:28> el<6:30>
+n<> u<92> t<Variable_decl_assignment> p<93> c<91> l<6:28> el<6:30>
+n<> u<93> t<List_of_variable_decl_assignments> p<94> c<92> l<6:28> el<6:30>
+n<> u<94> t<Variable_declaration> p<95> c<90> l<6:1> el<6:31>
+n<> u<95> t<Data_declaration> p<96> c<94> l<6:1> el<6:31>
+n<> u<96> t<Package_or_generate_item_declaration> p<97> c<95> l<6:1> el<6:31>
+n<> u<97> t<Module_or_generate_item_declaration> p<98> c<96> l<6:1> el<6:31>
+n<> u<98> t<Module_common_item> p<99> c<97> l<6:1> el<6:31>
+n<> u<99> t<Module_or_generate_item> p<100> c<98> l<6:1> el<6:31>
+n<> u<100> t<Non_port_module_item> p<148> c<99> s<146> l<6:1> el<6:31>
+n<c0> u<101> t<StringConst> p<102> l<7:8> el<7:10>
+n<> u<102> t<Ps_or_hierarchical_identifier> p<105> c<101> s<104> l<7:8> el<7:10>
+n<> u<103> t<Constant_bit_select> p<104> l<7:11> el<7:11>
+n<> u<104> t<Constant_select> p<105> c<103> l<7:11> el<7:11>
+n<> u<105> t<Net_lvalue> p<141> c<102> s<140> l<7:8> el<7:10>
+n<rand_i> u<106> t<StringConst> p<138> s<137> l<7:13> el<7:19>
+n<> u<107> t<Bit_select> p<137> s<136> l<7:19> el<7:19>
+n<1> u<108> t<IntConst> p<109> l<7:20> el<7:21>
+n<> u<109> t<Primary_literal> p<110> c<108> l<7:20> el<7:21>
+n<> u<110> t<Primary> p<111> c<109> l<7:20> el<7:21>
+n<> u<111> t<Expression> p<123> c<110> s<122> l<7:20> el<7:21>
+n<> u<112> t<Dollar_keyword> p<119> s<113> l<7:22> el<7:23>
+n<bits> u<113> t<StringConst> p<119> s<118> l<7:23> el<7:27>
+n<sheet_t> u<114> t<StringConst> p<115> l<7:28> el<7:35>
+n<> u<115> t<Primary_literal> p<116> c<114> l<7:28> el<7:35>
+n<> u<116> t<Primary> p<117> c<115> l<7:28> el<7:35>
+n<> u<117> t<Expression> p<118> c<116> l<7:28> el<7:35>
+n<> u<118> t<List_of_arguments> p<119> c<117> l<7:28> el<7:35>
+n<> u<119> t<Complex_func_call> p<120> c<112> l<7:22> el<7:36>
+n<> u<120> t<Primary> p<121> c<119> l<7:22> el<7:36>
+n<> u<121> t<Expression> p<123> c<120> l<7:22> el<7:36>
+n<> u<122> t<BinOp_Mult> p<123> s<121> l<7:21> el<7:22>
+n<> u<123> t<Expression> p<135> c<111> s<124> l<7:20> el<7:36>
+n<> u<124> t<IncPartSelectOp> p<135> s<134> l<7:36> el<7:38>
+n<> u<125> t<Dollar_keyword> p<132> s<126> l<7:38> el<7:39>
+n<bits> u<126> t<StringConst> p<132> s<131> l<7:39> el<7:43>
+n<sheet_t> u<127> t<StringConst> p<128> l<7:44> el<7:51>
+n<> u<128> t<Primary_literal> p<129> c<127> l<7:44> el<7:51>
+n<> u<129> t<Primary> p<130> c<128> l<7:44> el<7:51>
+n<> u<130> t<Expression> p<131> c<129> l<7:44> el<7:51>
+n<> u<131> t<List_of_arguments> p<132> c<130> l<7:44> el<7:51>
+n<> u<132> t<Subroutine_call> p<133> c<125> l<7:38> el<7:52>
+n<> u<133> t<Constant_primary> p<134> c<132> l<7:38> el<7:52>
+n<> u<134> t<Constant_expression> p<135> c<133> l<7:38> el<7:52>
+n<> u<135> t<Indexed_range> p<136> c<123> l<7:20> el<7:52>
+n<> u<136> t<Part_select_range> p<137> c<135> l<7:20> el<7:52>
+n<> u<137> t<Select> p<138> c<107> l<7:19> el<7:53>
+n<> u<138> t<Complex_func_call> p<139> c<106> l<7:13> el<7:53>
+n<> u<139> t<Primary> p<140> c<138> l<7:13> el<7:53>
+n<> u<140> t<Expression> p<141> c<139> l<7:13> el<7:53>
+n<> u<141> t<Net_assignment> p<142> c<105> l<7:8> el<7:53>
+n<> u<142> t<List_of_net_assignments> p<143> c<141> l<7:8> el<7:53>
+n<> u<143> t<Continuous_assign> p<144> c<142> l<7:1> el<7:54>
+n<> u<144> t<Module_common_item> p<145> c<143> l<7:1> el<7:54>
+n<> u<145> t<Module_or_generate_item> p<146> c<144> l<7:1> el<7:54>
+n<> u<146> t<Non_port_module_item> p<148> c<145> s<147> l<7:1> el<7:54>
+n<> u<147> t<ENDMODULE> p<148> l<9:1> el<9:10>
+n<> u<148> t<Module_declaration> p<149> c<36> l<2:1> el<9:10>
+n<> u<149> t<Description> p<150> c<148> l<2:1> el<9:10>
+n<> u<150> t<Source_text> p<151> c<149> l<2:1> el<9:10>
+n<> u<151> t<Top_level_rule> c<1> l<2:1> el<11:1>
+AST_DEBUG_END
+[WRN:PA0205] ${SURELOG_DIR}/tests/TypespecBits/dut.sv:2:1: No timescale set for "top".
+
+[INF:CP0300] Compilation...
+
+[INF:CP0303] ${SURELOG_DIR}/tests/TypespecBits/dut.sv:2:1: Compile module "work@top".
+
+[INF:EL0526] Design Elaboration...
+
+[NTE:EL0503] ${SURELOG_DIR}/tests/TypespecBits/dut.sv:2:1: Top level module "work@top".
+
+[NTE:EL0508] Nb Top level modules: 1.
+
+[NTE:EL0509] Max instance depth: 1.
+
+[NTE:EL0510] Nb instances: 1.
+
+[NTE:EL0511] Nb leaf instances: 1.
+
+[INF:UH0706] Creating UHDM Model...
+
+=== UHDM Object Stats Begin (Non-Elaborated Model) ===
+constant                                              28
+cont_assign                                            1
+design                                                 1
+indexed_part_select                                    1
+int_typespec                                           2
+logic_net                                              3
+logic_typespec                                         6
+logic_var                                              1
+module_inst                                            5
+operation                                              4
+packed_array_typespec                                  1
+param_assign                                           2
+parameter                                              2
+port                                                   2
+range                                                 11
+ref_obj                                                8
+ref_typespec                                          10
+sys_func_call                                          3
+=== UHDM Object Stats End ===
+[INF:UH0707] Elaborating UHDM...
+
+=== UHDM Object Stats Begin (Elaborated Model) ===
+constant                                              28
+cont_assign                                            2
+design                                                 1
+indexed_part_select                                    2
+int_typespec                                           2
+logic_net                                              3
+logic_typespec                                         6
+logic_var                                              1
+module_inst                                            5
+operation                                              5
+packed_array_typespec                                  1
+param_assign                                           2
+parameter                                              2
+port                                                   3
+range                                                 11
+ref_obj                                               12
+ref_typespec                                          11
+sys_func_call                                          5
+=== UHDM Object Stats End ===
+[INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/TypespecBits/slpp_all/surelog.uhdm ...
+
+[INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/TypespecBits/slpp_all/checker/surelog.chk.html ...
+
+[INF:UH0710] Loading UHDM DB: ${SURELOG_DIR}/build/regression/TypespecBits/slpp_all/surelog.uhdm ...
+
+[INF:UH0711] Decompiling UHDM...
+
+====== UHDM =======
+design: (work@top)
+|vpiElaborated:1
+|vpiName:work@top
+|uhdmallModules:
+\_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+  |vpiParent:
+  \_design: (work@top)
+  |vpiFullName:work@top
+  |vpiParameter:
+  \_parameter: (work@top.W), line:2:28, endln:2:29
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |UINT:4
+    |vpiTypespec:
+    \_ref_typespec: (work@top.W)
+      |vpiParent:
+      \_parameter: (work@top.W), line:2:28, endln:2:29
+      |vpiFullName:work@top.W
+      |vpiActual:
+      \_int_typespec: , line:2:24, endln:2:27
+    |vpiSigned:1
+    |vpiName:W
+    |vpiFullName:work@top.W
+  |vpiParamAssign:
+  \_param_assign: , line:2:28, endln:2:33
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiRhs:
+    \_constant: , line:2:32, endln:2:33
+      |vpiParent:
+      \_param_assign: , line:2:28, endln:2:33
+      |vpiDecompile:4
+      |vpiSize:64
+      |UINT:4
+      |vpiTypespec:
+      \_ref_typespec: (work@top)
+        |vpiParent:
+        \_constant: , line:2:32, endln:2:33
+        |vpiFullName:work@top
+        |vpiActual:
+        \_int_typespec: , line:2:24, endln:2:27
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@top.W), line:2:28, endln:2:29
+  |vpiTypedef:
+  \_logic_typespec: (sheet_t), line:4:9, endln:4:30
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiName:sheet_t
+    |vpiInstance:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiRange:
+    \_range: , line:4:20, endln:4:25
+      |vpiParent:
+      \_logic_typespec: (sheet_t), line:4:9, endln:4:30
+      |vpiLeftRange:
+      \_constant: , line:4:21, endln:4:22
+        |vpiParent:
+        \_range: , line:4:20, endln:4:25
+        |vpiDecompile:4
+        |vpiSize:64
+        |UINT:4
+        |vpiConstType:9
+      |vpiRightRange:
+      \_constant: , line:4:23, endln:4:24
+        |vpiParent:
+        \_range: , line:4:20, endln:4:25
+        |vpiDecompile:0
+        |vpiSize:64
+        |UINT:0
+        |vpiConstType:9
+    |vpiRange:
+    \_range: , line:4:25, endln:4:30
+      |vpiParent:
+      \_logic_typespec: (sheet_t), line:4:9, endln:4:30
+      |vpiLeftRange:
+      \_ref_obj: (work@top.sheet_t.W), line:4:26, endln:4:27
+        |vpiParent:
+        \_range: , line:4:25, endln:4:30
+        |vpiName:W
+        |vpiFullName:work@top.sheet_t.W
+        |vpiActual:
+        \_parameter: (work@top.W), line:2:28, endln:2:29
+      |vpiRightRange:
+      \_constant: , line:4:28, endln:4:29
+        |vpiParent:
+        \_range: , line:4:25, endln:4:30
+        |vpiDecompile:0
+        |vpiSize:64
+        |UINT:0
+        |vpiConstType:9
+  |vpiDefName:work@top
+  |vpiNet:
+  \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiName:rand_i
+    |vpiFullName:work@top.rand_i
+  |vpiNet:
+  \_logic_net: (work@top.c0), line:6:28, endln:6:30
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiTypespec:
+    \_ref_typespec: (work@top.c0)
+      |vpiParent:
+      \_logic_net: (work@top.c0), line:6:28, endln:6:30
+      |vpiFullName:work@top.c0
+      |vpiActual:
+      \_logic_typespec: , line:6:1, endln:6:27
+    |vpiName:c0
+    |vpiFullName:work@top.c0
+    |vpiNetType:36
+  |vpiPort:
+  \_port: (rand_i), line:2:49, endln:2:55
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiName:rand_i
+    |vpiDirection:1
+    |vpiLowConn:
+    \_ref_obj: (work@top.rand_i.rand_i), line:2:49, endln:2:55
+      |vpiParent:
+      \_port: (rand_i), line:2:49, endln:2:55
+      |vpiName:rand_i
+      |vpiFullName:work@top.rand_i.rand_i
+      |vpiActual:
+      \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+    |vpiTypedef:
+    \_ref_typespec: (work@top.rand_i)
+      |vpiParent:
+      \_port: (rand_i), line:2:49, endln:2:55
+      |vpiFullName:work@top.rand_i
+      |vpiActual:
+      \_logic_typespec: , line:2:42, endln:2:48
+  |vpiContAssign:
+  \_cont_assign: , line:7:8, endln:7:53
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiRhs:
+    \_indexed_part_select: rand_i (work@top.rand_i), line:7:20, endln:7:52
+      |vpiParent:
+      \_cont_assign: , line:7:8, endln:7:53
+      |vpiName:rand_i
+      |vpiFullName:work@top.rand_i
+      |vpiDefName:rand_i
+      |vpiConstantSelect:1
+      |vpiIndexedPartSelectType:1
+      |vpiBaseExpr:
+      \_operation: , line:7:20, endln:7:36
+        |vpiParent:
+        \_indexed_part_select: rand_i (work@top.rand_i), line:7:20, endln:7:52
+        |vpiOpType:25
+        |vpiOperand:
+        \_constant: , line:7:20, endln:7:21
+          |vpiParent:
+          \_operation: , line:7:20, endln:7:36
+          |vpiDecompile:1
+          |vpiSize:64
+          |UINT:1
+          |vpiConstType:9
+        |vpiOperand:
+        \_sys_func_call: ($bits), line:7:22, endln:7:36
+          |vpiParent:
+          \_operation: , line:7:20, endln:7:36
+          |vpiArgument:
+          \_ref_obj: (work@top.rand_i.sheet_t), line:7:28, endln:7:35
+            |vpiParent:
+            \_sys_func_call: ($bits), line:7:22, endln:7:36
+            |vpiName:sheet_t
+            |vpiFullName:work@top.rand_i.sheet_t
+          |vpiName:$bits
+      |vpiWidthExpr:
+      \_sys_func_call: ($bits), line:7:38, endln:7:52
+        |vpiParent:
+        \_indexed_part_select: rand_i (work@top.rand_i), line:7:20, endln:7:52
+        |vpiArgument:
+        \_ref_obj: (work@top.rand_i.sheet_t), line:7:44, endln:7:51
+          |vpiParent:
+          \_sys_func_call: ($bits), line:7:38, endln:7:52
+          |vpiName:sheet_t
+          |vpiFullName:work@top.rand_i.sheet_t
+        |vpiName:$bits
+    |vpiLhs:
+    \_ref_obj: (work@top.c0), line:7:8, endln:7:10
+      |vpiParent:
+      \_cont_assign: , line:7:8, endln:7:53
+      |vpiName:c0
+      |vpiFullName:work@top.c0
+      |vpiActual:
+      \_logic_net: (work@top.c0), line:6:28, endln:6:30
+|uhdmtopModules:
+\_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+  |vpiName:work@top
+  |vpiVariables:
+  \_logic_var: (work@top.c0), line:6:28, endln:6:30
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiTypespec:
+    \_ref_typespec: (work@top.c0)
+      |vpiParent:
+      \_logic_var: (work@top.c0), line:6:28, endln:6:30
+      |vpiFullName:work@top.c0
+      |vpiActual:
+      \_logic_typespec: , line:6:1, endln:6:27
+    |vpiName:c0
+    |vpiFullName:work@top.c0
+    |vpiVisibility:1
+  |vpiParameter:
+  \_parameter: (work@top.W), line:2:28, endln:2:29
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |UINT:4
+    |vpiTypespec:
+    \_ref_typespec: (work@top.W)
+      |vpiParent:
+      \_parameter: (work@top.W), line:2:28, endln:2:29
+      |vpiFullName:work@top.W
+      |vpiActual:
+      \_int_typespec: , line:2:24, endln:2:27
+    |vpiSigned:1
+    |vpiName:W
+    |vpiFullName:work@top.W
+  |vpiParamAssign:
+  \_param_assign: , line:2:28, endln:2:33
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiRhs:
+    \_constant: , line:2:32, endln:2:33
+      |vpiParent:
+      \_param_assign: , line:2:28, endln:2:33
+      |vpiDecompile:4
+      |vpiSize:32
+      |UINT:4
+      |vpiTypespec:
+      \_ref_typespec: (work@top)
+        |vpiParent:
+        \_constant: , line:2:32, endln:2:33
+        |vpiFullName:work@top
+        |vpiActual:
+        \_int_typespec: , line:2:24, endln:2:27
+      |vpiConstType:9
+    |vpiLhs:
+    \_parameter: (work@top.W), line:2:28, endln:2:29
+  |vpiTypedef:
+  \_logic_typespec: (sheet_t), line:4:9, endln:4:30
+  |vpiDefName:work@top
+  |vpiTop:1
+  |vpiNet:
+  \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiTypespec:
+    \_ref_typespec: (work@top.rand_i)
+      |vpiParent:
+      \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+      |vpiFullName:work@top.rand_i
+      |vpiActual:
+      \_logic_typespec: , line:2:42, endln:2:48
+    |vpiName:rand_i
+    |vpiFullName:work@top.rand_i
+  |vpiTopModule:1
+  |vpiPort:
+  \_port: (rand_i), line:2:49, endln:2:55
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiName:rand_i
+    |vpiDirection:1
+    |vpiLowConn:
+    \_ref_obj: (work@top.rand_i), line:2:49, endln:2:55
+      |vpiParent:
+      \_port: (rand_i), line:2:49, endln:2:55
+      |vpiName:rand_i
+      |vpiFullName:work@top.rand_i
+      |vpiActual:
+      \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+    |vpiTypedef:
+    \_ref_typespec: (work@top.rand_i)
+      |vpiParent:
+      \_port: (rand_i), line:2:49, endln:2:55
+      |vpiFullName:work@top.rand_i
+      |vpiActual:
+      \_logic_typespec: , line:2:42, endln:2:48
+    |vpiInstance:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+  |vpiContAssign:
+  \_cont_assign: , line:7:8, endln:7:53
+    |vpiParent:
+    \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/TypespecBits/dut.sv, line:2:1, endln:9:10
+    |vpiRhs:
+    \_indexed_part_select: rand_i (work@top.rand_i), line:7:20, endln:7:52
+      |vpiParent:
+      \_cont_assign: , line:7:8, endln:7:53
+      |vpiName:rand_i
+      |vpiFullName:work@top.rand_i
+      |vpiDefName:rand_i
+      |vpiActual:
+      \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+      |vpiConstantSelect:1
+      |vpiIndexedPartSelectType:1
+      |vpiBaseExpr:
+      \_constant: , line:7:20, endln:7:36
+        |vpiDecompile:25
+        |vpiSize:64
+        |INT:25
+        |vpiConstType:7
+      |vpiWidthExpr:
+      \_constant: , line:7:38, endln:7:52
+        |vpiDecompile:25
+        |vpiSize:64
+        |UINT:25
+        |vpiConstType:9
+    |vpiLhs:
+    \_ref_obj: (work@top.c0), line:7:8, endln:7:10
+      |vpiParent:
+      \_cont_assign: , line:7:8, endln:7:53
+      |vpiName:c0
+      |vpiFullName:work@top.c0
+      |vpiActual:
+      \_logic_var: (work@top.c0), line:6:28, endln:6:30
+\_weaklyReferenced:
+\_int_typespec: , line:2:24, endln:2:27
+  |vpiParent:
+  \_parameter: (work@top.W), line:2:28, endln:2:29
+  |vpiSigned:1
+\_logic_typespec: , line:2:42, endln:2:48
+  |vpiRange:
+  \_range: , line:2:42, endln:2:48
+    |vpiParent:
+    \_logic_typespec: , line:2:42, endln:2:48
+    |vpiLeftRange:
+    \_constant: , line:2:43, endln:2:45
+      |vpiParent:
+      \_range: , line:2:42, endln:2:48
+      |vpiDecompile:31
+      |vpiSize:64
+      |UINT:31
+      |vpiConstType:9
+    |vpiRightRange:
+    \_constant: , line:2:46, endln:2:47
+      |vpiParent:
+      \_range: , line:2:42, endln:2:48
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_logic_typespec: , line:2:42, endln:2:48
+  |vpiParent:
+  \_logic_net: (work@top.rand_i), line:2:49, endln:2:55
+  |vpiRange:
+  \_range: , line:2:42, endln:2:48
+    |vpiParent:
+    \_logic_typespec: , line:2:42, endln:2:48
+    |vpiLeftRange:
+    \_constant: , line:2:43, endln:2:45
+      |vpiParent:
+      \_range: , line:2:42, endln:2:48
+      |vpiDecompile:31
+      |vpiSize:64
+      |UINT:31
+      |vpiConstType:9
+    |vpiRightRange:
+    \_constant: , line:2:46, endln:2:47
+      |vpiParent:
+      \_range: , line:2:42, endln:2:48
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_logic_typespec: , line:6:1, endln:6:27
+  |vpiRange:
+  \_range: , line:6:7, endln:6:27
+    |vpiParent:
+    \_logic_typespec: , line:6:1, endln:6:27
+    |vpiLeftRange:
+    \_constant: , line:6:8, endln:6:22
+      |vpiParent:
+      \_range: , line:6:7, endln:6:27
+      |vpiDecompile:24
+      |vpiSize:64
+      |INT:24
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:6:25, endln:6:26
+      |vpiParent:
+      \_range: , line:6:7, endln:6:27
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_logic_typespec: , line:2:42, endln:2:48
+  |vpiRange:
+  \_range: , line:2:42, endln:2:48
+    |vpiParent:
+    \_logic_typespec: , line:2:42, endln:2:48
+    |vpiLeftRange:
+    \_constant: , line:2:43, endln:2:45
+      |vpiParent:
+      \_range: , line:2:42, endln:2:48
+      |vpiDecompile:31
+      |vpiSize:64
+      |UINT:31
+      |vpiConstType:9
+    |vpiRightRange:
+    \_constant: , line:2:46, endln:2:47
+      |vpiParent:
+      \_range: , line:2:42, endln:2:48
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_logic_typespec: , line:6:1, endln:6:27
+  |vpiRange:
+  \_range: , line:6:7, endln:6:27
+    |vpiParent:
+    \_logic_typespec: , line:6:1, endln:6:27
+    |vpiLeftRange:
+    \_operation: , line:6:8, endln:6:24
+      |vpiParent:
+      \_range: , line:6:7, endln:6:27
+      |vpiOpType:11
+      |vpiOperand:
+      \_sys_func_call: ($bits), line:6:8, endln:6:22
+        |vpiParent:
+        \_operation: , line:6:8, endln:6:24
+        |vpiArgument:
+        \_ref_obj: (sheet_t), line:6:14, endln:6:21
+          |vpiParent:
+          \_sys_func_call: ($bits), line:6:8, endln:6:22
+          |vpiName:sheet_t
+        |vpiName:$bits
+      |vpiOperand:
+      \_constant: , line:6:23, endln:6:24
+        |vpiParent:
+        \_operation: , line:6:8, endln:6:24
+        |vpiDecompile:1
+        |vpiSize:64
+        |UINT:1
+        |vpiConstType:9
+    |vpiRightRange:
+    \_constant: , line:6:25, endln:6:26
+      |vpiParent:
+      \_range: , line:6:7, endln:6:27
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_int_typespec: , line:2:24, endln:2:27
+  |vpiParent:
+  \_ref_typespec: (work@top.W)
+  |vpiSigned:1
+===================
+[  FATAL] : 0
+[ SYNTAX] : 0
+[  ERROR] : 0
+[WARNING] : 1
+[   NOTE] : 5
+
+============================== Begin RoundTrip Results ==============================
+[roundtrip]: ${SURELOG_DIR}/tests/TypespecBits/dut.sv | ${SURELOG_DIR}/build/regression/TypespecBits/roundtrip/dut_000.sv | 2 | 9 |
+============================== End RoundTrip Results ==============================
diff --git a/tests/TypespecBits/TypespecBits.sl b/tests/TypespecBits/TypespecBits.sl
new file mode 100644
index 0000000000..b461620aca
--- /dev/null
+++ b/tests/TypespecBits/TypespecBits.sl
@@ -0,0 +1 @@
+-parse -d uhdm -d coveruhdm -elabuhdm -d ast dut.sv -nobuiltin
diff --git a/tests/TypespecBits/dut.sv b/tests/TypespecBits/dut.sv
new file mode 100644
index 0000000000..e81fbefd85
--- /dev/null
+++ b/tests/TypespecBits/dut.sv
@@ -0,0 +1,10 @@
+
+module top #(parameter int W = 4) (input [31:0] rand_i);
+
+typedef logic      [4:0][W:0] sheet_t;   // << Parameterized typespec
+
+logic [$bits(sheet_t)-1:0] c0;
+assign c0 = rand_i[1*$bits(sheet_t)+:$bits(sheet_t)];
+
+endmodule
+
diff --git a/tests/UhdmCoverage/UhdmCoverage.log b/tests/UhdmCoverage/UhdmCoverage.log
index 158d7707a7..4a8955b853 100644
--- a/tests/UhdmCoverage/UhdmCoverage.log
+++ b/tests/UhdmCoverage/UhdmCoverage.log
@@ -2846,7 +2846,7 @@ design: (work@divSqrtRecFNToRaw_small)
           \_part_select: in (work@isSigNaNRecFN.in), line:66:13, endln:66:68
           |vpiOpType:11
           |vpiOperand:
-          \_constant: , line:66:17, endln:66:40
+          \_constant: , line:66:17, endln:66:36
             |vpiDecompile:6
             |vpiSize:32
             |UINT:6
@@ -2865,7 +2865,7 @@ design: (work@divSqrtRecFNToRaw_small)
           \_part_select: in (work@isSigNaNRecFN.in), line:66:13, endln:66:68
           |vpiOpType:11
           |vpiOperand:
-          \_constant: , line:66:43, endln:66:66
+          \_constant: , line:66:43, endln:66:62
             |vpiDecompile:6
             |vpiSize:32
             |UINT:6
diff --git a/tests/UnsizedParam/UnsizedParam.log b/tests/UnsizedParam/UnsizedParam.log
index e0dbcc2ee5..a84f8da629 100644
--- a/tests/UnsizedParam/UnsizedParam.log
+++ b/tests/UnsizedParam/UnsizedParam.log
@@ -485,25 +485,10 @@ design: (work@top)
       |vpiParent:
       \_module_inst: work@submodule (work@top.u_sub_default), file:${SURELOG_DIR}/tests/UnsizedParam/dut.sv, line:9:4, endln:9:30
       |vpiRhs:
-      \_operation: , line:5:15, endln:5:22
-        |vpiParent:
-        \_cont_assign: , line:5:11, endln:5:22
-        |vpiTypespec:
-        \_ref_typespec: (work@top.u_sub_default)
-          |vpiParent:
-          \_operation: , line:5:15, endln:5:22
-          |vpiFullName:work@top.u_sub_default
-          |vpiActual:
-          \_int_typespec: , line:5:15, endln:5:18
-        |vpiOpType:67
-        |vpiOperand:
-        \_ref_obj: (work@top.u_sub_default.Y), line:5:20, endln:5:21
-          |vpiParent:
-          \_operation: , line:5:15, endln:5:22
-          |vpiName:Y
-          |vpiFullName:work@top.u_sub_default.Y
-          |vpiActual:
-          \_parameter: (work@top.u_sub_default.Y), line:4:24, endln:4:25
+      \_constant: , line:5:15, endln:5:22
+        |vpiSize:64
+        |UINT:1048575
+        |vpiConstType:9
       |vpiLhs:
       \_ref_obj: (work@top.u_sub_default.a), line:5:11, endln:5:12
         |vpiParent:
@@ -603,25 +588,10 @@ design: (work@top)
       |vpiParent:
       \_module_inst: work@submodule (work@top.u_sub_5), file:${SURELOG_DIR}/tests/UnsizedParam/dut.sv, line:10:4, endln:10:33
       |vpiRhs:
-      \_operation: , line:5:15, endln:5:22
-        |vpiParent:
-        \_cont_assign: , line:5:11, endln:5:22
-        |vpiTypespec:
-        \_ref_typespec: (work@top.u_sub_5)
-          |vpiParent:
-          \_operation: , line:5:15, endln:5:22
-          |vpiFullName:work@top.u_sub_5
-          |vpiActual:
-          \_int_typespec: , line:5:15, endln:5:18
-        |vpiOpType:67
-        |vpiOperand:
-        \_ref_obj: (work@top.u_sub_5.Y), line:5:20, endln:5:21
-          |vpiParent:
-          \_operation: , line:5:15, endln:5:22
-          |vpiName:Y
-          |vpiFullName:work@top.u_sub_5.Y
-          |vpiActual:
-          \_parameter: (work@top.u_sub_5.Y), line:4:24, endln:4:25
+      \_constant: , line:5:15, endln:5:22
+        |vpiSize:64
+        |UINT:31
+        |vpiConstType:9
       |vpiLhs:
       \_ref_obj: (work@top.u_sub_5.a), line:5:11, endln:5:12
         |vpiParent:
@@ -768,37 +738,6 @@ design: (work@top)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
-\_int_typespec: , line:5:15, endln:5:18
-  |vpiParent:
-  \_ref_typespec: (work@top.u_sub_default)
-  |vpiSigned:1
-\_ref_typespec: (work@top.u_sub_default)
-  |vpiParent:
-  \_operation: , line:5:15, endln:5:22
-  |vpiFullName:work@top.u_sub_default
-  |vpiActual:
-  \_int_typespec: , line:5:15, endln:5:18
-\_operation: , line:5:15, endln:5:22
-  |vpiParent:
-  \_cont_assign: , line:5:11, endln:5:22
-  |vpiTypespec:
-  \_ref_typespec: (work@top.u_sub_default)
-  |vpiOpType:67
-  |vpiOperand:
-  \_ref_obj: (work@submodule.Y), line:5:20, endln:5:21
-\_cont_assign: , line:5:11, endln:5:22
-  |vpiParent:
-  \_module_inst: work@submodule (work@top.u_sub_default), file:${SURELOG_DIR}/tests/UnsizedParam/dut.sv, line:9:4, endln:9:30
-  |vpiRhs:
-  \_operation: , line:5:15, endln:5:22
-  |vpiLhs:
-  \_ref_obj: (work@top.u_sub_default.a), line:5:11, endln:5:12
-    |vpiParent:
-    \_cont_assign: , line:5:11, endln:5:22
-    |vpiName:a
-    |vpiFullName:work@top.u_sub_default.a
-    |vpiActual:
-    \_logic_net: (work@submodule.a), line:5:11, endln:5:12
 \_int_typespec: , line:2:14, endln:2:17
   |vpiParent:
   \_ref_typespec: (work@top.u_sub_5.X)
@@ -886,37 +825,6 @@ design: (work@top)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
-\_int_typespec: , line:5:15, endln:5:18
-  |vpiParent:
-  \_ref_typespec: (work@top.u_sub_5)
-  |vpiSigned:1
-\_ref_typespec: (work@top.u_sub_5)
-  |vpiParent:
-  \_operation: , line:5:15, endln:5:22
-  |vpiFullName:work@top.u_sub_5
-  |vpiActual:
-  \_int_typespec: , line:5:15, endln:5:18
-\_operation: , line:5:15, endln:5:22
-  |vpiParent:
-  \_cont_assign: , line:5:11, endln:5:22
-  |vpiTypespec:
-  \_ref_typespec: (work@top.u_sub_5)
-  |vpiOpType:67
-  |vpiOperand:
-  \_ref_obj: (work@submodule.Y), line:5:20, endln:5:21
-\_cont_assign: , line:5:11, endln:5:22
-  |vpiParent:
-  \_module_inst: work@submodule (work@top.u_sub_5), file:${SURELOG_DIR}/tests/UnsizedParam/dut.sv, line:10:4, endln:10:33
-  |vpiRhs:
-  \_operation: , line:5:15, endln:5:22
-  |vpiLhs:
-  \_ref_obj: (work@top.u_sub_5.a), line:5:11, endln:5:12
-    |vpiParent:
-    \_cont_assign: , line:5:11, endln:5:22
-    |vpiName:a
-    |vpiFullName:work@top.u_sub_5.a
-    |vpiActual:
-    \_logic_net: (work@submodule.a), line:5:11, endln:5:12
 ===================
 [  FATAL] : 0
 [ SYNTAX] : 0
diff --git a/third_party/UHDM b/third_party/UHDM
index 44aab35c00..898b4b8c33 160000
--- a/third_party/UHDM
+++ b/third_party/UHDM
@@ -1 +1 @@
-Subproject commit 44aab35c004c551977a18f17b7aa9174683433b9
+Subproject commit 898b4b8c33c87f1609cd9e2f2c239dfa8c22331c
diff --git a/third_party/tests/AxiInterconnect/AxiInterconnect.log b/third_party/tests/AxiInterconnect/AxiInterconnect.log
index 687f819a07..daa2027a76 100644
--- a/third_party/tests/AxiInterconnect/AxiInterconnect.log
+++ b/third_party/tests/AxiInterconnect/AxiInterconnect.log
@@ -64479,39 +64479,11 @@ design: (work@axi_interconnect_wrapper)
               \_assignment: , line:201:9, endln:201:61
               |vpiOpType:34
               |vpiOperand:
-              \_operation: , line:201:26, endln:201:54
-                |vpiParent:
-                \_operation: , line:201:25, endln:201:61
-                |vpiOpType:25
-                |vpiOperand:
-                \_operation: , line:201:26, endln:201:43
-                  |vpiParent:
-                  \_operation: , line:201:26, endln:201:54
-                  |vpiOpType:25
-                  |vpiOperand:
-                  \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_COUNT), line:201:26, endln:201:33
-                    |vpiParent:
-                    \_operation: , line:201:26, endln:201:43
-                    |vpiName:M_COUNT
-                    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_COUNT
-                    |vpiActual:
-                    \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.M_COUNT), line:39:15, endln:39:22
-                  |vpiOperand:
-                  \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_REGIONS), line:201:34, endln:201:43
-                    |vpiParent:
-                    \_operation: , line:201:26, endln:201:43
-                    |vpiName:M_REGIONS
-                    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_REGIONS
-                    |vpiActual:
-                    \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.M_REGIONS), line:71:15, endln:71:24
-                |vpiOperand:
-                \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.ADDR_WIDTH), line:201:44, endln:201:54
-                  |vpiParent:
-                  \_operation: , line:201:26, endln:201:54
-                  |vpiName:ADDR_WIDTH
-                  |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.ADDR_WIDTH
-                  |vpiActual:
-                  \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.ADDR_WIDTH), line:43:15, endln:43:25
+              \_constant: , line:201:26, endln:201:54
+                |vpiDecompile:128
+                |vpiSize:64
+                |INT:128
+                |vpiConstType:7
               |vpiOperand:
               \_operation: , line:201:54, endln:201:60
                 |vpiParent:
@@ -64605,26 +64577,11 @@ design: (work@axi_interconnect_wrapper)
                 |vpiActual:
                 \_integer_var: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.i), line:195:13, endln:195:14
               |vpiOperand:
-              \_operation: , line:203:25, endln:203:42
-                |vpiParent:
-                \_operation: , line:203:21, endln:203:42
-                |vpiOpType:25
-                |vpiOperand:
-                \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_COUNT), line:203:25, endln:203:32
-                  |vpiParent:
-                  \_operation: , line:203:25, endln:203:42
-                  |vpiName:M_COUNT
-                  |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_COUNT
-                  |vpiActual:
-                  \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.M_COUNT), line:39:15, endln:39:22
-                |vpiOperand:
-                \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_REGIONS), line:203:33, endln:203:42
-                  |vpiParent:
-                  \_operation: , line:203:25, endln:203:42
-                  |vpiName:M_REGIONS
-                  |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs.M_REGIONS
-                  |vpiActual:
-                  \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.M_REGIONS), line:71:15, endln:71:24
+              \_constant: , line:203:25, endln:203:42
+                |vpiDecompile:4
+                |vpiSize:64
+                |INT:4
+                |vpiConstType:7
             |vpiStmt:
             \_begin: (work@axi_interconnect_wrapper.axi_interconnect.calcBaseAddrs), line:203:55, endln:214:12
               |vpiParent:
@@ -81174,31 +81131,11 @@ design: (work@axi_interconnect_wrapper)
                 \_if_else: , line:104:5, endln:140:8
                 |vpiOpType:26
                 |vpiOperand:
-                \_operation: , line:104:9, endln:104:36
-                  |vpiParent:
-                  \_operation: , line:104:9, endln:104:59
-                  |vpiOpType:26
-                  |vpiOperand:
-                  \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK), line:104:9, endln:104:18
-                    |vpiParent:
-                    \_operation: , line:104:9, endln:104:36
-                    |vpiName:ARB_BLOCK
-                    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK
-                    |vpiActual:
-                    \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK), line:40:15, endln:40:24
-                  |vpiOperand:
-                  \_operation: , line:104:22, endln:104:36
-                    |vpiParent:
-                    \_operation: , line:104:9, endln:104:36
-                    |vpiOpType:3
-                    |vpiOperand:
-                    \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK_ACK), line:104:23, endln:104:36
-                      |vpiParent:
-                      \_operation: , line:104:22, endln:104:36
-                      |vpiName:ARB_BLOCK_ACK
-                      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK_ACK
-                      |vpiActual:
-                      \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK_ACK), line:42:15, endln:42:28
+                \_constant: , line:104:9, endln:104:36
+                  |vpiDecompile:0
+                  |vpiSize:64
+                  |UINT:0
+                  |vpiConstType:9
                 |vpiOperand:
                 \_operation: , line:104:40, endln:104:59
                   |vpiParent:
@@ -81306,26 +81243,11 @@ design: (work@axi_interconnect_wrapper)
                     \_operation: , line:109:18, endln:109:89
                     |vpiOpType:26
                     |vpiOperand:
-                    \_operation: , line:109:18, endln:109:44
-                      |vpiParent:
-                      \_operation: , line:109:18, endln:109:59
-                      |vpiOpType:26
-                      |vpiOperand:
-                      \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK), line:109:18, endln:109:27
-                        |vpiParent:
-                        \_operation: , line:109:18, endln:109:44
-                        |vpiName:ARB_BLOCK
-                        |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK
-                        |vpiActual:
-                        \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK), line:40:15, endln:40:24
-                      |vpiOperand:
-                      \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK_ACK), line:109:31, endln:109:44
-                        |vpiParent:
-                        \_operation: , line:109:18, endln:109:44
-                        |vpiName:ARB_BLOCK_ACK
-                        |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK_ACK
-                        |vpiActual:
-                        \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.ARB_BLOCK_ACK), line:42:15, endln:42:28
+                    \_constant: , line:109:18, endln:109:44
+                      |vpiDecompile:1
+                      |vpiSize:64
+                      |UINT:1
+                      |vpiConstType:9
                     |vpiOperand:
                     \_ref_obj: (work@axi_interconnect_wrapper.axi_interconnect.arb_inst.grant_valid), line:109:48, endln:109:59
                       |vpiParent:
@@ -85454,7 +85376,7 @@ design: (work@axi_interconnect_wrapper)
               \_operation: , line:51:29, endln:51:63
               |vpiOpType:34
               |vpiOperand:
-              \_constant: , line:51:30, endln:51:45
+              \_constant: , line:51:31, endln:51:38
                 |vpiDecompile:0
                 |vpiSize:64
                 |INT:0
@@ -88912,7 +88834,7 @@ design: (work@axi_interconnect_wrapper)
               \_operation: , line:51:29, endln:51:63
               |vpiOpType:34
               |vpiOperand:
-              \_constant: , line:51:30, endln:51:45
+              \_constant: , line:51:31, endln:51:38
                 |vpiDecompile:0
                 |vpiSize:64
                 |INT:0
@@ -91585,17 +91507,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000
-        |vpiSize:8
-        |BIN:00000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:310:33, endln:310:49
+        |vpiParent:
+        \_cont_assign: , line:310:20, endln:310:30
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:310:34, endln:310:42
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:310:33, endln:310:49
+          |vpiDecompile:8
+          |vpiSize:32
+          |UINT:8
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:310:34, endln:310:42
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:47:5, endln:47:27
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:310:42, endln:310:48
+          |vpiParent:
+          \_operation: , line:310:33, endln:310:49
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:310:43, endln:310:47
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_id_reg), line:310:20, endln:310:49
     |vpiContAssign:
@@ -91604,17 +91545,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000000000000000000000000000
-        |vpiSize:32
-        |BIN:00000000000000000000000000000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:311:37, endln:311:55
+        |vpiParent:
+        \_cont_assign: , line:311:22, endln:311:34
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:311:38, endln:311:48
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:311:37, endln:311:55
+          |vpiDecompile:32
+          |vpiSize:32
+          |UINT:32
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:311:38, endln:311:48
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:43:5, endln:43:30
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:311:48, endln:311:54
+          |vpiParent:
+          \_operation: , line:311:37, endln:311:55
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:311:49, endln:311:53
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_addr_reg), line:311:22, endln:311:55
     |vpiContAssign:
@@ -91758,17 +91718,29 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:0
-        |vpiSize:1
-        |BIN:0
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:321:39, endln:321:58
+        |vpiParent:
+        \_cont_assign: , line:321:23, endln:321:36
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:321:40, endln:321:51
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:321:39, endln:321:58
+          |vpiDecompile:1
+          |vpiSize:64
+          |UINT:1
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:321:51, endln:321:57
+          |vpiParent:
+          \_operation: , line:321:39, endln:321:58
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:321:52, endln:321:56
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_auser_reg), line:321:23, endln:321:58
     |vpiContAssign:
@@ -91792,17 +91764,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:0
-        |vpiSize:1
-        |BIN:0
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:323:39, endln:323:58
+        |vpiParent:
+        \_cont_assign: , line:323:23, endln:323:36
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:323:40, endln:323:51
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:323:39, endln:323:58
+          |vpiDecompile:1
+          |vpiSize:32
+          |UINT:1
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:323:40, endln:323:51
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:59:5, endln:59:30
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:323:51, endln:323:57
+          |vpiParent:
+          \_operation: , line:323:39, endln:323:58
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:323:52, endln:323:56
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_buser_reg), line:323:23, endln:323:58
     |vpiContAssign:
@@ -95658,17 +95649,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000
-        |vpiSize:8
-        |BIN:00000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:810:42, endln:810:58
+        |vpiParent:
+        \_cont_assign: , line:810:23, endln:810:36
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:810:43, endln:810:51
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:810:42, endln:810:58
+          |vpiDecompile:8
+          |vpiSize:32
+          |UINT:8
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:810:43, endln:810:51
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:47:5, endln:47:27
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:810:51, endln:810:57
+          |vpiParent:
+          \_operation: , line:810:42, endln:810:58
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:810:52, endln:810:56
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rid_reg), line:810:23, endln:810:58
     |vpiContAssign:
@@ -95677,17 +95687,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000000000000000000000000000
-        |vpiSize:32
-        |BIN:00000000000000000000000000000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:811:42, endln:811:60
+        |vpiParent:
+        \_cont_assign: , line:811:23, endln:811:38
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:811:43, endln:811:53
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:811:42, endln:811:60
+          |vpiDecompile:32
+          |vpiSize:32
+          |UINT:32
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:811:43, endln:811:53
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:41:5, endln:41:30
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:811:53, endln:811:59
+          |vpiParent:
+          \_operation: , line:811:42, endln:811:60
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:811:54, endln:811:58
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg), line:811:23, endln:811:60
     |vpiContAssign:
@@ -95756,17 +95785,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000
-        |vpiSize:8
-        |BIN:00000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:817:47, endln:817:63
+        |vpiParent:
+        \_cont_assign: , line:817:23, endln:817:41
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:817:48, endln:817:56
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:817:47, endln:817:63
+          |vpiDecompile:8
+          |vpiSize:32
+          |UINT:8
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:817:48, endln:817:56
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:47:5, endln:47:27
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:817:56, endln:817:62
+          |vpiParent:
+          \_operation: , line:817:47, endln:817:63
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:817:57, endln:817:61
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rid_reg), line:817:23, endln:817:63
     |vpiContAssign:
@@ -95775,17 +95823,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000000000000000000000000000
-        |vpiSize:32
-        |BIN:00000000000000000000000000000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:818:47, endln:818:65
+        |vpiParent:
+        \_cont_assign: , line:818:23, endln:818:43
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:818:48, endln:818:58
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:818:47, endln:818:65
+          |vpiDecompile:32
+          |vpiSize:32
+          |UINT:32
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:818:48, endln:818:58
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:41:5, endln:41:30
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:818:58, endln:818:64
+          |vpiParent:
+          \_operation: , line:818:47, endln:818:65
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:818:59, endln:818:63
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg), line:818:23, endln:818:65
     |vpiContAssign:
@@ -95854,17 +95921,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000000000000000000000000000
-        |vpiSize:32
-        |BIN:00000000000000000000000000000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:903:42, endln:903:60
+        |vpiParent:
+        \_cont_assign: , line:903:23, endln:903:38
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:903:43, endln:903:53
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:903:42, endln:903:60
+          |vpiDecompile:32
+          |vpiSize:32
+          |UINT:32
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:903:43, endln:903:53
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:41:5, endln:41:30
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:903:53, endln:903:59
+          |vpiParent:
+          \_operation: , line:903:42, endln:903:60
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:903:54, endln:903:58
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wdata_reg), line:903:23, endln:903:60
     |vpiContAssign:
@@ -95873,17 +95959,29 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:0000
-        |vpiSize:4
-        |BIN:0000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:904:42, endln:904:60
+        |vpiParent:
+        \_cont_assign: , line:904:23, endln:904:38
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:904:43, endln:904:53
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:904:42, endln:904:60
+          |vpiDecompile:4
+          |vpiSize:64
+          |INT:4
+          |vpiConstType:7
+        |vpiOperand:
+        \_operation: , line:904:53, endln:904:59
+          |vpiParent:
+          \_operation: , line:904:42, endln:904:60
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:904:54, endln:904:58
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg), line:904:23, endln:904:60
     |vpiContAssign:
@@ -95937,17 +96035,36 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:00000000000000000000000000000000
-        |vpiSize:32
-        |BIN:00000000000000000000000000000000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:909:47, endln:909:65
+        |vpiParent:
+        \_cont_assign: , line:909:23, endln:909:43
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:909:48, endln:909:58
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:909:47, endln:909:65
+          |vpiDecompile:32
+          |vpiSize:32
+          |UINT:32
+          |vpiTypespec:
+          \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
+            |vpiParent:
+            \_constant: , line:909:48, endln:909:58
+            |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect
+            |vpiActual:
+            \_int_typespec: , line:41:5, endln:41:30
+          |vpiConstType:9
+        |vpiOperand:
+        \_operation: , line:909:58, endln:909:64
+          |vpiParent:
+          \_operation: , line:909:47, endln:909:65
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:909:59, endln:909:63
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wdata_reg), line:909:23, endln:909:65
     |vpiContAssign:
@@ -95956,17 +96073,29 @@ design: (work@axi_interconnect_wrapper)
       \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
       |vpiNetDeclAssign:1
       |vpiRhs:
-      \_constant: 
-        |vpiDecompile:0000
-        |vpiSize:4
-        |BIN:0000
-        |vpiTypespec:
-        \_ref_typespec: 
+      \_operation: , line:910:47, endln:910:65
+        |vpiParent:
+        \_cont_assign: , line:910:23, endln:910:43
+        |vpiOpType:34
+        |vpiOperand:
+        \_constant: , line:910:48, endln:910:58
           |vpiParent:
-          \_constant: 
-          |vpiActual:
-          \_int_typespec: 
-        |vpiConstType:3
+          \_operation: , line:910:47, endln:910:65
+          |vpiDecompile:4
+          |vpiSize:64
+          |INT:4
+          |vpiConstType:7
+        |vpiOperand:
+        \_operation: , line:910:58, endln:910:64
+          |vpiParent:
+          \_operation: , line:910:47, endln:910:65
+          |vpiOpType:33
+          |vpiOperand:
+          \_constant: , line:910:59, endln:910:63
+            |vpiDecompile:1'b0
+            |vpiSize:1
+            |BIN:0
+            |vpiConstType:3
       |vpiLhs:
       \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg), line:910:23, endln:910:65
     |vpiContAssign:
@@ -105147,36 +105276,11 @@ design: (work@axi_interconnect_wrapper)
       \_range: , line:194:10, endln:194:44
       |vpiOpType:11
       |vpiOperand:
-      \_operation: , line:194:11, endln:194:39
-        |vpiParent:
-        \_operation: , line:194:11, endln:194:41
-        |vpiOpType:25
-        |vpiOperand:
-        \_operation: , line:194:11, endln:194:28
-          |vpiParent:
-          \_operation: , line:194:11, endln:194:39
-          |vpiOpType:25
-          |vpiOperand:
-          \_ref_obj: (M_COUNT), line:194:11, endln:194:18
-            |vpiParent:
-            \_operation: , line:194:11, endln:194:28
-            |vpiName:M_COUNT
-            |vpiActual:
-            \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.M_COUNT), line:39:15, endln:39:22
-          |vpiOperand:
-          \_ref_obj: (M_REGIONS), line:194:19, endln:194:28
-            |vpiParent:
-            \_operation: , line:194:11, endln:194:28
-            |vpiName:M_REGIONS
-            |vpiActual:
-            \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.M_REGIONS), line:71:15, endln:71:24
-        |vpiOperand:
-        \_ref_obj: (ADDR_WIDTH), line:194:29, endln:194:39
-          |vpiParent:
-          \_operation: , line:194:11, endln:194:39
-          |vpiName:ADDR_WIDTH
-          |vpiActual:
-          \_parameter: (work@axi_interconnect_wrapper.axi_interconnect.ADDR_WIDTH), line:43:15, endln:43:25
+      \_constant: , line:194:11, endln:194:39
+        |vpiDecompile:128
+        |vpiSize:64
+        |INT:128
+        |vpiConstType:7
       |vpiOperand:
       \_constant: , line:194:40, endln:194:41
         |vpiParent:
@@ -123324,6 +123428,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:47:5, endln:47:27
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:311:1, endln:311:21
   |vpiParent:
   \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_addr_next), line:311:57, endln:311:70
@@ -123347,6 +123454,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:43:5, endln:43:30
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:312:1, endln:312:4
 \_logic_typespec: , line:313:1, endln:313:10
   |vpiRange:
@@ -123563,6 +123673,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:59:5, endln:59:30
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:325:1, endln:325:18
   |vpiRange:
   \_range: , line:325:5, endln:325:18
@@ -127437,6 +127550,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:47:5, endln:47:27
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:811:1, endln:811:21
   |vpiParent:
   \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg), line:811:23, endln:811:60
@@ -127460,6 +127576,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:41:5, endln:41:30
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:812:1, endln:812:10
   |vpiRange:
   \_range: , line:812:5, endln:812:10
@@ -127547,6 +127666,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:47:5, endln:47:27
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:818:1, endln:818:21
   |vpiParent:
   \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg), line:818:23, endln:818:65
@@ -127570,6 +127692,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:41:5, endln:41:30
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:819:1, endln:819:10
   |vpiRange:
   \_range: , line:819:5, endln:819:10
@@ -127646,6 +127771,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:41:5, endln:41:30
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:904:1, endln:904:21
   |vpiParent:
   \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg), line:904:23, endln:904:60
@@ -127735,6 +127863,9 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_int_typespec: , line:41:5, endln:41:30
+  |vpiParent:
+  \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect)
 \_logic_typespec: , line:910:1, endln:910:21
   |vpiParent:
   \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg), line:910:23, endln:910:65
@@ -149828,6 +149959,114 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_operation: , line:310:33, endln:310:49
+  |vpiParent:
+  \_cont_assign: , line:310:20, endln:310:30
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:310:34, endln:310:42
+  |vpiOperand:
+  \_operation: , line:310:42, endln:310:48
+    |vpiParent:
+    \_operation: , line:310:33, endln:310:49
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:310:43, endln:310:47
+\_cont_assign: , line:310:20, endln:310:30
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:310:33, endln:310:49
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_id_reg), line:310:20, endln:310:49
+    |vpiParent:
+    \_cont_assign: , line:310:20, endln:310:30
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.axi_id_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_id_reg), line:310:20, endln:310:49
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_id_reg
+      |vpiActual:
+      \_logic_typespec: , line:310:1, endln:310:19
+    |vpiName:axi_id_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_id_reg
+    |vpiNetType:48
+\_logic_typespec: , line:310:1, endln:310:19
+  |vpiRange:
+  \_range: , line:310:5, endln:310:19
+    |vpiParent:
+    \_logic_typespec: , line:310:1, endln:310:19
+    |vpiLeftRange:
+    \_constant: , line:310:6, endln:310:14
+      |vpiParent:
+      \_range: , line:310:5, endln:310:19
+      |vpiDecompile:7
+      |vpiSize:64
+      |INT:7
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:310:17, endln:310:18
+      |vpiParent:
+      \_range: , line:310:5, endln:310:19
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_operation: , line:311:37, endln:311:55
+  |vpiParent:
+  \_cont_assign: , line:311:22, endln:311:34
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:311:38, endln:311:48
+  |vpiOperand:
+  \_operation: , line:311:48, endln:311:54
+    |vpiParent:
+    \_operation: , line:311:37, endln:311:55
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:311:49, endln:311:53
+\_cont_assign: , line:311:22, endln:311:34
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:311:37, endln:311:55
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_addr_reg), line:311:22, endln:311:55
+    |vpiParent:
+    \_cont_assign: , line:311:22, endln:311:34
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.axi_addr_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_addr_reg), line:311:22, endln:311:55
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_addr_reg
+      |vpiActual:
+      \_logic_typespec: , line:311:1, endln:311:21
+    |vpiName:axi_addr_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_addr_reg
+    |vpiNetType:48
+\_logic_typespec: , line:311:1, endln:311:21
+  |vpiRange:
+  \_range: , line:311:5, endln:311:21
+    |vpiParent:
+    \_logic_typespec: , line:311:1, endln:311:21
+    |vpiLeftRange:
+    \_constant: , line:311:6, endln:311:16
+      |vpiParent:
+      \_range: , line:311:5, endln:311:21
+      |vpiDecompile:31
+      |vpiSize:64
+      |INT:31
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:311:19, endln:311:20
+      |vpiParent:
+      \_range: , line:311:5, endln:311:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:312:5, endln:312:23
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -150175,6 +150414,60 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_operation: , line:321:39, endln:321:58
+  |vpiParent:
+  \_cont_assign: , line:321:23, endln:321:36
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:321:40, endln:321:51
+  |vpiOperand:
+  \_operation: , line:321:51, endln:321:57
+    |vpiParent:
+    \_operation: , line:321:39, endln:321:58
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:321:52, endln:321:56
+\_cont_assign: , line:321:23, endln:321:36
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:321:39, endln:321:58
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_auser_reg), line:321:23, endln:321:58
+    |vpiParent:
+    \_cont_assign: , line:321:23, endln:321:36
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.axi_auser_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_auser_reg), line:321:23, endln:321:58
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_auser_reg
+      |vpiActual:
+      \_logic_typespec: , line:321:1, endln:321:22
+    |vpiName:axi_auser_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_auser_reg
+    |vpiNetType:48
+\_logic_typespec: , line:321:1, endln:321:22
+  |vpiRange:
+  \_range: , line:321:5, endln:321:22
+    |vpiParent:
+    \_logic_typespec: , line:321:1, endln:321:22
+    |vpiLeftRange:
+    \_constant: , line:321:6, endln:321:17
+      |vpiParent:
+      \_range: , line:321:5, endln:321:22
+      |vpiDecompile:0
+      |vpiSize:64
+      |INT:0
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:321:20, endln:321:21
+      |vpiParent:
+      \_range: , line:321:5, endln:321:22
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:322:11, endln:322:24
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -150218,6 +150511,60 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_operation: , line:323:39, endln:323:58
+  |vpiParent:
+  \_cont_assign: , line:323:23, endln:323:36
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:323:40, endln:323:51
+  |vpiOperand:
+  \_operation: , line:323:51, endln:323:57
+    |vpiParent:
+    \_operation: , line:323:39, endln:323:58
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:323:52, endln:323:56
+\_cont_assign: , line:323:23, endln:323:36
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:323:39, endln:323:58
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_buser_reg), line:323:23, endln:323:58
+    |vpiParent:
+    \_cont_assign: , line:323:23, endln:323:36
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.axi_buser_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.axi_buser_reg), line:323:23, endln:323:58
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_buser_reg
+      |vpiActual:
+      \_logic_typespec: , line:323:1, endln:323:22
+    |vpiName:axi_buser_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.axi_buser_reg
+    |vpiNetType:48
+\_logic_typespec: , line:323:1, endln:323:22
+  |vpiRange:
+  \_range: , line:323:5, endln:323:22
+    |vpiParent:
+    \_logic_typespec: , line:323:1, endln:323:22
+    |vpiLeftRange:
+    \_constant: , line:323:6, endln:323:17
+      |vpiParent:
+      \_range: , line:323:5, endln:323:22
+      |vpiDecompile:0
+      |vpiSize:64
+      |INT:0
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:323:20, endln:323:21
+      |vpiParent:
+      \_range: , line:323:5, endln:323:22
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:325:19, endln:325:36
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -150608,6 +150955,114 @@ design: (work@axi_interconnect_wrapper)
 \_logic_typespec: , line:350:1, endln:350:4
   |vpiParent:
   \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wready_int_reg)
+\_operation: , line:810:42, endln:810:58
+  |vpiParent:
+  \_cont_assign: , line:810:23, endln:810:36
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:810:43, endln:810:51
+  |vpiOperand:
+  \_operation: , line:810:51, endln:810:57
+    |vpiParent:
+    \_operation: , line:810:42, endln:810:58
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:810:52, endln:810:56
+\_cont_assign: , line:810:23, endln:810:36
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:810:42, endln:810:58
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rid_reg), line:810:23, endln:810:58
+    |vpiParent:
+    \_cont_assign: , line:810:23, endln:810:36
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rid_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rid_reg), line:810:23, endln:810:58
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.s_axi_rid_reg
+      |vpiActual:
+      \_logic_typespec: , line:810:1, endln:810:19
+    |vpiName:s_axi_rid_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.s_axi_rid_reg
+    |vpiNetType:48
+\_logic_typespec: , line:810:1, endln:810:19
+  |vpiRange:
+  \_range: , line:810:5, endln:810:19
+    |vpiParent:
+    \_logic_typespec: , line:810:1, endln:810:19
+    |vpiLeftRange:
+    \_constant: , line:810:6, endln:810:14
+      |vpiParent:
+      \_range: , line:810:5, endln:810:19
+      |vpiDecompile:7
+      |vpiSize:64
+      |INT:7
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:810:17, endln:810:18
+      |vpiParent:
+      \_range: , line:810:5, endln:810:19
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_operation: , line:811:42, endln:811:60
+  |vpiParent:
+  \_cont_assign: , line:811:23, endln:811:38
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:811:43, endln:811:53
+  |vpiOperand:
+  \_operation: , line:811:53, endln:811:59
+    |vpiParent:
+    \_operation: , line:811:42, endln:811:60
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:811:54, endln:811:58
+\_cont_assign: , line:811:23, endln:811:38
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:811:42, endln:811:60
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg), line:811:23, endln:811:60
+    |vpiParent:
+    \_cont_assign: , line:811:23, endln:811:38
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg), line:811:23, endln:811:60
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg
+      |vpiActual:
+      \_logic_typespec: , line:811:1, endln:811:21
+    |vpiName:s_axi_rdata_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.s_axi_rdata_reg
+    |vpiNetType:48
+\_logic_typespec: , line:811:1, endln:811:21
+  |vpiRange:
+  \_range: , line:811:5, endln:811:21
+    |vpiParent:
+    \_logic_typespec: , line:811:1, endln:811:21
+    |vpiLeftRange:
+    \_constant: , line:811:6, endln:811:16
+      |vpiParent:
+      \_range: , line:811:5, endln:811:21
+      |vpiDecompile:31
+      |vpiSize:64
+      |INT:31
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:811:19, endln:811:20
+      |vpiParent:
+      \_range: , line:811:5, endln:811:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:812:23, endln:812:38
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -150760,6 +151215,114 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_operation: , line:817:47, endln:817:63
+  |vpiParent:
+  \_cont_assign: , line:817:23, endln:817:41
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:817:48, endln:817:56
+  |vpiOperand:
+  \_operation: , line:817:56, endln:817:62
+    |vpiParent:
+    \_operation: , line:817:47, endln:817:63
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:817:57, endln:817:61
+\_cont_assign: , line:817:23, endln:817:41
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:817:47, endln:817:63
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rid_reg), line:817:23, endln:817:63
+    |vpiParent:
+    \_cont_assign: , line:817:23, endln:817:41
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rid_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rid_reg), line:817:23, endln:817:63
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rid_reg
+      |vpiActual:
+      \_logic_typespec: , line:817:1, endln:817:19
+    |vpiName:temp_s_axi_rid_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rid_reg
+    |vpiNetType:48
+\_logic_typespec: , line:817:1, endln:817:19
+  |vpiRange:
+  \_range: , line:817:5, endln:817:19
+    |vpiParent:
+    \_logic_typespec: , line:817:1, endln:817:19
+    |vpiLeftRange:
+    \_constant: , line:817:6, endln:817:14
+      |vpiParent:
+      \_range: , line:817:5, endln:817:19
+      |vpiDecompile:7
+      |vpiSize:64
+      |INT:7
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:817:17, endln:817:18
+      |vpiParent:
+      \_range: , line:817:5, endln:817:19
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_operation: , line:818:47, endln:818:65
+  |vpiParent:
+  \_cont_assign: , line:818:23, endln:818:43
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:818:48, endln:818:58
+  |vpiOperand:
+  \_operation: , line:818:58, endln:818:64
+    |vpiParent:
+    \_operation: , line:818:47, endln:818:65
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:818:59, endln:818:63
+\_cont_assign: , line:818:23, endln:818:43
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:818:47, endln:818:65
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg), line:818:23, endln:818:65
+    |vpiParent:
+    \_cont_assign: , line:818:23, endln:818:43
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg), line:818:23, endln:818:65
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg
+      |vpiActual:
+      \_logic_typespec: , line:818:1, endln:818:21
+    |vpiName:temp_s_axi_rdata_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rdata_reg
+    |vpiNetType:48
+\_logic_typespec: , line:818:1, endln:818:21
+  |vpiRange:
+  \_range: , line:818:5, endln:818:21
+    |vpiParent:
+    \_logic_typespec: , line:818:1, endln:818:21
+    |vpiLeftRange:
+    \_constant: , line:818:6, endln:818:16
+      |vpiParent:
+      \_range: , line:818:5, endln:818:21
+      |vpiDecompile:31
+      |vpiSize:64
+      |INT:31
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:818:19, endln:818:20
+      |vpiParent:
+      \_range: , line:818:5, endln:818:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:819:23, endln:819:43
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -150892,6 +151455,114 @@ design: (work@axi_interconnect_wrapper)
 \_logic_typespec: , line:822:1, endln:822:4
   |vpiParent:
   \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.temp_s_axi_rvalid_reg)
+\_operation: , line:903:42, endln:903:60
+  |vpiParent:
+  \_cont_assign: , line:903:23, endln:903:38
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:903:43, endln:903:53
+  |vpiOperand:
+  \_operation: , line:903:53, endln:903:59
+    |vpiParent:
+    \_operation: , line:903:42, endln:903:60
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:903:54, endln:903:58
+\_cont_assign: , line:903:23, endln:903:38
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:903:42, endln:903:60
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wdata_reg), line:903:23, endln:903:60
+    |vpiParent:
+    \_cont_assign: , line:903:23, endln:903:38
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wdata_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wdata_reg), line:903:23, endln:903:60
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.m_axi_wdata_reg
+      |vpiActual:
+      \_logic_typespec: , line:903:1, endln:903:21
+    |vpiName:m_axi_wdata_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.m_axi_wdata_reg
+    |vpiNetType:48
+\_logic_typespec: , line:903:1, endln:903:21
+  |vpiRange:
+  \_range: , line:903:5, endln:903:21
+    |vpiParent:
+    \_logic_typespec: , line:903:1, endln:903:21
+    |vpiLeftRange:
+    \_constant: , line:903:6, endln:903:16
+      |vpiParent:
+      \_range: , line:903:5, endln:903:21
+      |vpiDecompile:31
+      |vpiSize:64
+      |INT:31
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:903:19, endln:903:20
+      |vpiParent:
+      \_range: , line:903:5, endln:903:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_operation: , line:904:42, endln:904:60
+  |vpiParent:
+  \_cont_assign: , line:904:23, endln:904:38
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:904:43, endln:904:53
+  |vpiOperand:
+  \_operation: , line:904:53, endln:904:59
+    |vpiParent:
+    \_operation: , line:904:42, endln:904:60
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:904:54, endln:904:58
+\_cont_assign: , line:904:23, endln:904:38
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:904:42, endln:904:60
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg), line:904:23, endln:904:60
+    |vpiParent:
+    \_cont_assign: , line:904:23, endln:904:38
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg), line:904:23, endln:904:60
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg
+      |vpiActual:
+      \_logic_typespec: , line:904:1, endln:904:21
+    |vpiName:m_axi_wstrb_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.m_axi_wstrb_reg
+    |vpiNetType:48
+\_logic_typespec: , line:904:1, endln:904:21
+  |vpiRange:
+  \_range: , line:904:5, endln:904:21
+    |vpiParent:
+    \_logic_typespec: , line:904:1, endln:904:21
+    |vpiLeftRange:
+    \_constant: , line:904:6, endln:904:16
+      |vpiParent:
+      \_range: , line:904:5, endln:904:21
+      |vpiDecompile:3
+      |vpiSize:64
+      |INT:3
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:904:19, endln:904:20
+      |vpiParent:
+      \_range: , line:904:5, endln:904:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:905:23, endln:905:38
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -151001,6 +151672,114 @@ design: (work@axi_interconnect_wrapper)
       |vpiSize:64
       |UINT:0
       |vpiConstType:9
+\_operation: , line:909:47, endln:909:65
+  |vpiParent:
+  \_cont_assign: , line:909:23, endln:909:43
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:909:48, endln:909:58
+  |vpiOperand:
+  \_operation: , line:909:58, endln:909:64
+    |vpiParent:
+    \_operation: , line:909:47, endln:909:65
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:909:59, endln:909:63
+\_cont_assign: , line:909:23, endln:909:43
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:909:47, endln:909:65
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wdata_reg), line:909:23, endln:909:65
+    |vpiParent:
+    \_cont_assign: , line:909:23, endln:909:43
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wdata_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wdata_reg), line:909:23, endln:909:65
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wdata_reg
+      |vpiActual:
+      \_logic_typespec: , line:909:1, endln:909:21
+    |vpiName:temp_m_axi_wdata_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wdata_reg
+    |vpiNetType:48
+\_logic_typespec: , line:909:1, endln:909:21
+  |vpiRange:
+  \_range: , line:909:5, endln:909:21
+    |vpiParent:
+    \_logic_typespec: , line:909:1, endln:909:21
+    |vpiLeftRange:
+    \_constant: , line:909:6, endln:909:16
+      |vpiParent:
+      \_range: , line:909:5, endln:909:21
+      |vpiDecompile:31
+      |vpiSize:64
+      |INT:31
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:909:19, endln:909:20
+      |vpiParent:
+      \_range: , line:909:5, endln:909:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
+\_operation: , line:910:47, endln:910:65
+  |vpiParent:
+  \_cont_assign: , line:910:23, endln:910:43
+  |vpiOpType:34
+  |vpiOperand:
+  \_constant: , line:910:48, endln:910:58
+  |vpiOperand:
+  \_operation: , line:910:58, endln:910:64
+    |vpiParent:
+    \_operation: , line:910:47, endln:910:65
+    |vpiOpType:33
+    |vpiOperand:
+    \_constant: , line:910:59, endln:910:63
+\_cont_assign: , line:910:23, endln:910:43
+  |vpiParent:
+  \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
+  |vpiNetDeclAssign:1
+  |vpiRhs:
+  \_operation: , line:910:47, endln:910:65
+  |vpiLhs:
+  \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg), line:910:23, endln:910:65
+    |vpiParent:
+    \_cont_assign: , line:910:23, endln:910:43
+    |vpiTypespec:
+    \_ref_typespec: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg)
+      |vpiParent:
+      \_logic_net: (work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg), line:910:23, endln:910:65
+      |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg
+      |vpiActual:
+      \_logic_typespec: , line:910:1, endln:910:21
+    |vpiName:temp_m_axi_wstrb_reg
+    |vpiFullName:work@axi_interconnect_wrapper.axi_interconnect.temp_m_axi_wstrb_reg
+    |vpiNetType:48
+\_logic_typespec: , line:910:1, endln:910:21
+  |vpiRange:
+  \_range: , line:910:5, endln:910:21
+    |vpiParent:
+    \_logic_typespec: , line:910:1, endln:910:21
+    |vpiLeftRange:
+    \_constant: , line:910:6, endln:910:16
+      |vpiParent:
+      \_range: , line:910:5, endln:910:21
+      |vpiDecompile:3
+      |vpiSize:64
+      |INT:3
+      |vpiConstType:7
+    |vpiRightRange:
+    \_constant: , line:910:19, endln:910:20
+      |vpiParent:
+      \_range: , line:910:5, endln:910:21
+      |vpiDecompile:0
+      |vpiSize:64
+      |UINT:0
+      |vpiConstType:9
 \_cont_assign: , line:911:23, endln:911:43
   |vpiParent:
   \_module_inst: work@axi_interconnect (work@axi_interconnect_wrapper.axi_interconnect), file:${SURELOG_DIR}/third_party/tests/AxiInterconnect/axi_interconnect_wrapper.v, line:1108:1, endln:1213:3
@@ -152497,30 +153276,6 @@ design: (work@axi_interconnect_wrapper)
   |vpiGenScope:
   \_gen_scope: (work@axi_interconnect_wrapper.axi_interconnect.genblk7[3]), line:519:37, endln:522:4
 \_int_typespec: 
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
-\_int_typespec: 
-  |UINT:1
 ===================
 [  FATAL] : 0
 [ SYNTAX] : 0
diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log
index b7d70009d5..c03486a07c 100644
--- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log
+++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log
@@ -131,7 +131,7 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
   CMake that the project does not need compatibility with older versions.
 
 
--- Configuring done (0.0s)
+-- Configuring done (0.1s)
 -- Generating done (0.0s)
 -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess
 [  6%] Generating 10_lsu_bus_intf.sv
@@ -139,15 +139,15 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
 [ 18%] Generating 12_beh_lib.sv
 [ 25%] Generating 13_ifu_mem_ctl.sv
 [ 31%] Generating 14_mem_lib.sv
-[ 37%] Generating 16_dec_decode_ctl.sv
-[ 43%] Generating 1_lsu_stbuf.sv
-[ 50%] Generating 15_exu.sv
+[ 37%] Generating 15_exu.sv
+[ 43%] Generating 16_dec_decode_ctl.sv
+[ 50%] Generating 1_lsu_stbuf.sv
 [ 56%] Generating 2_ahb_to_axi4.sv
 [ 62%] Generating 3_rvjtag_tap.sv
 [ 68%] Generating 4_dec_tlu_ctl.sv
 [ 75%] Generating 5_lsu_bus_buffer.sv
-[ 81%] Generating 7_axi4_to_ahb.sv
-[ 87%] Generating 6_dbg.sv
+[ 81%] Generating 6_dbg.sv
+[ 87%] Generating 7_axi4_to_ahb.sv
 [ 93%] Generating 8_ifu_aln_ctl.sv
 [100%] Generating 9_tb_top.sv
 [100%] Built target Parse
diff --git a/third_party/tests/oh/BasicOh.log b/third_party/tests/oh/BasicOh.log
index f1bb71eb69..423d5f3a73 100644
--- a/third_party/tests/oh/BasicOh.log
+++ b/third_party/tests/oh/BasicOh.log
@@ -10459,20 +10459,11 @@ design: (work@oh_fifo_async)
                 |vpiActual:
                 \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17
               |vpiOperand:
-              \_operation: , line:27:15, endln:27:18
-                |vpiParent:
-                \_operation: , line:27:12, endln:27:19
-                |vpiOpType:11
-                |vpiOperand:
-                \_ref_obj: (work@oh_fifo_async.wr_bin2gray.N), line:27:15, endln:27:16
-                  |vpiParent:
-                  \_operation: , line:27:15, endln:27:18
-                  |vpiName:N
-                  |vpiFullName:work@oh_fifo_async.wr_bin2gray.N
-                  |vpiActual:
-                  \_parameter: (work@oh_fifo_async.wr_bin2gray.N), line:9:15, endln:9:16
-                |vpiOperand:
-                \_constant: , line:27:17, endln:27:18
+              \_constant: , line:27:15, endln:27:18
+                |vpiDecompile:5
+                |vpiSize:64
+                |INT:5
+                |vpiConstType:7
             |vpiStmt:
             \_assignment: , line:28:4, endln:28:31
               |vpiParent:
@@ -15187,20 +15178,11 @@ design: (work@oh_fifo_async)
                 |vpiActual:
                 \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17
               |vpiOperand:
-              \_operation: , line:27:15, endln:27:18
-                |vpiParent:
-                \_operation: , line:27:12, endln:27:19
-                |vpiOpType:11
-                |vpiOperand:
-                \_ref_obj: (work@oh_fifo_async.rd_bin2gray.N), line:27:15, endln:27:16
-                  |vpiParent:
-                  \_operation: , line:27:15, endln:27:18
-                  |vpiName:N
-                  |vpiFullName:work@oh_fifo_async.rd_bin2gray.N
-                  |vpiActual:
-                  \_parameter: (work@oh_fifo_async.rd_bin2gray.N), line:9:15, endln:9:16
-                |vpiOperand:
-                \_constant: , line:27:17, endln:27:18
+              \_constant: , line:27:15, endln:27:18
+                |vpiDecompile:5
+                |vpiSize:64
+                |INT:5
+                |vpiConstType:7
             |vpiStmt:
             \_assignment: , line:28:4, endln:28:31
               |vpiParent:
@@ -21505,7 +21487,7 @@ design: (work@oh_fifo_async)
             \_cont_assign: , line:68:10, endln:68:66
             |vpiOpType:32
             |vpiOperand:
-            \_constant: , line:68:27, endln:68:66
+            \_constant: , line:68:28, endln:68:34
               |vpiDecompile:1
               |vpiSize:64
               |UINT:1