From 3ff929df4045d979c7bb9f29c049b5e259794896 Mon Sep 17 00:00:00 2001
From: Alain Dargelas <alain.dargelas@gmail.com>
Date: Sun, 10 Dec 2023 22:05:48 -0800
Subject: [PATCH] typespec alias

---
 third_party/UHDM                                |  2 +-
 third_party/tests/CoresSweRVMP/CoresSweRVMP.log | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/third_party/UHDM b/third_party/UHDM
index 579a00b783..d64434ea76 160000
--- a/third_party/UHDM
+++ b/third_party/UHDM
@@ -1 +1 @@
-Subproject commit 579a00b78332f4d4d83c3e7966de1ef6009bd4ab
+Subproject commit d64434ea76e38d9519b6de4f0f9a7a485fd47888
diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log
index 1f6a4edbb0..2785cb420f 100644
--- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log
+++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log
@@ -65,21 +65,21 @@ Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess;
 -- Generating done
 -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess
 [  6%] Generating 10_lsu_bus_intf.sv
-[ 12%] Generating 11_ifu_bp_ctl.sv
-[ 18%] Generating 12_beh_lib.sv
+[ 12%] Generating 12_beh_lib.sv
+[ 18%] Generating 11_ifu_bp_ctl.sv
 [ 25%] Generating 13_ifu_mem_ctl.sv
-[ 31%] Generating 14_mem_lib.sv
+[ 31%] Generating 15_exu.sv
+[ 37%] Generating 14_mem_lib.sv
 [ 43%] Generating 16_dec_decode_ctl.sv
 [ 50%] Generating 1_lsu_stbuf.sv
 [ 56%] Generating 2_ahb_to_axi4.sv
-[ 50%] Generating 15_exu.sv
+[ 62%] Generating 3_rvjtag_tap.sv
 [ 68%] Generating 4_dec_tlu_ctl.sv
 [ 75%] Generating 5_lsu_bus_buffer.sv
-[ 62%] Generating 3_rvjtag_tap.sv
+[ 81%] Generating 6_dbg.sv
 [ 87%] Generating 7_axi4_to_ahb.sv
 [ 93%] Generating 8_ifu_aln_ctl.sv
 [100%] Generating 9_tb_top.sv
-[100%] Generating 6_dbg.sv
 [100%] Built target Parse
 Surelog parsing status: 0
 [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv".