diff --git a/design/dbg/el2_dbg.sv b/design/dbg/el2_dbg.sv index cc498108c0e..0047b8bd422 100644 --- a/design/dbg/el2_dbg.sv +++ b/design/dbg/el2_dbg.sv @@ -65,24 +65,24 @@ import el2_pkg::*; output logic sb_axi_awvalid, input logic sb_axi_awready, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.SB_BUS_TAG-1:0] sb_axi_awid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] sb_axi_awaddr, output logic [3:0] sb_axi_awregion, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] sb_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] sb_axi_awsize, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] sb_axi_awburst, output logic sb_axi_awlock, output logic [3:0] sb_axi_awcache, output logic [2:0] sb_axi_awprot, output logic [3:0] sb_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic sb_axi_wvalid, input logic sb_axi_wready, @@ -98,30 +98,30 @@ import el2_pkg::*; output logic sb_axi_arvalid, input logic sb_axi_arready, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.SB_BUS_TAG-1:0] sb_axi_arid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] sb_axi_araddr, output logic [3:0] sb_axi_arregion, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] sb_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] sb_axi_arsize, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] sb_axi_arburst, output logic sb_axi_arlock, output logic [3:0] sb_axi_arcache, output logic [2:0] sb_axi_arprot, output logic [3:0] sb_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic sb_axi_rvalid, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic sb_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [63:0] sb_axi_rdata, input logic [1:0] sb_axi_rresp, @@ -134,9 +134,9 @@ import el2_pkg::*; input logic dbg_rst_l, input logic clk_override, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); @@ -555,7 +555,7 @@ import el2_pkg::*; dbg_state_en = dmstatus_reg[17]; // resume ack has been updated in the dmstatus register end /* All legal values are handled above. Exclude the default part from coverage. */ - /*verilator coverage_off*/ + /*pragma coverage off*/ default : begin dbg_nxtstate = IDLE; dbg_state_en = 1'b0; @@ -570,7 +570,7 @@ import el2_pkg::*; sb_abmem_cmd_done_en = 1'b0; sb_abmem_data_done_en = 1'b0; end - /*verilator coverage_on*/ + /*pragma coverage on*/ endcase end // always_comb begin @@ -684,7 +684,7 @@ import el2_pkg::*; sbaddress0_reg_wren1 = sbcs_reg[16] & (sbcs_reg[14:12] == 3'b0); // auto increment was set and no error. Update to new address after completing the current command end /* All legal values are handled above. Exclude the default part from coverage. */ - /*verilator coverage_off*/ + /*pragma coverage off*/ default : begin sb_nxtstate = SBIDLE; sb_state_en = 1'b0; @@ -694,7 +694,7 @@ import el2_pkg::*; sbcs_sberror_din[2:0] = 3'b0; sbaddress0_reg_wren1 = 1'b0; end - /*verilator coverage_on*/ + /*pragma coverage on*/ endcase end // always_comb begin diff --git a/design/dec/el2_dec.sv b/design/dec/el2_dec.sv index 5d340feff9e..008fa8b5050 100644 --- a/design/dec/el2_dec.sv +++ b/design/dec/el2_dec.sv @@ -321,9 +321,9 @@ module el2_dec output logic dec_tlu_i0_commit_cmt, // committed i0 instruction // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Flop scan mode control - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/dec/el2_dec_decode_ctl.sv b/design/dec/el2_dec_decode_ctl.sv index c0410e86fa9..7ef09498950 100644 --- a/design/dec/el2_dec_decode_ctl.sv +++ b/design/dec/el2_dec_decode_ctl.sv @@ -197,9 +197,9 @@ import el2_pkg::*; output logic dec_div_active, // non-block divide is active // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/dec/el2_dec_gpr_ctl.sv b/design/dec/el2_dec_gpr_ctl.sv index d406ba97758..8f05515283a 100644 --- a/design/dec/el2_dec_gpr_ctl.sv +++ b/design/dec/el2_dec_gpr_ctl.sv @@ -40,9 +40,9 @@ import el2_pkg::*; output logic [31:0] rd1, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); logic [31:1] [31:0] gpr_out; // 31 x 32 bit GPRs diff --git a/design/dec/el2_dec_pmp_ctl.sv b/design/dec/el2_dec_pmp_ctl.sv index 20446229393..b15057b418b 100644 --- a/design/dec/el2_dec_pmp_ctl.sv +++ b/design/dec/el2_dec_pmp_ctl.sv @@ -59,9 +59,9 @@ module el2_dec_pmp_ctl output logic [31:0] pmp_pmpaddr [pt.PMP_ENTRIES], // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); logic wr_pmpcfg_r; diff --git a/design/dec/el2_dec_tlu_ctl.sv b/design/dec/el2_dec_tlu_ctl.sv index d0dbc4e4fae..ce2dc956a83 100644 --- a/design/dec/el2_dec_tlu_ctl.sv +++ b/design/dec/el2_dec_tlu_ctl.sv @@ -34,9 +34,9 @@ import el2_pkg::*; input logic free_l2clk, input logic rst_l, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [31:1] rst_vec, // reset vector, from core pins input logic nmi_int, // nmi pin @@ -3034,9 +3034,9 @@ import el2_pkg::*; output logic dec_timer_t1_pulse, // timer1 int // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); localparam MITCTL_ENABLE = 0; localparam MITCTL_ENABLE_HALTED = 1; diff --git a/design/dmi/rvjtag_tap.v b/design/dmi/rvjtag_tap.v index b7041bfd84a..d83bf80c63d 100644 --- a/design/dmi/rvjtag_tap.v +++ b/design/dmi/rvjtag_tap.v @@ -30,27 +30,27 @@ output wr_en, output rd_en, input [31:0] rd_data, -/*verilator coverage_off*/ +/*pragma coverage off*/ input [1:0] rd_status, -/*verilator coverage_on*/ +/*pragma coverage on*/ output reg dmi_reset, output reg dmi_hard_reset, -/*verilator coverage_off*/ +/*pragma coverage off*/ input [2:0] idle, input [1:0] dmi_stat, -/*verilator coverage_on*/ +/*pragma coverage on*/ /* -- revisionCode : 4'h0; -- manufacturersIdCode : 11'h45; -- deviceIdCode : 16'h0001; -- order MSB .. LSB -> [4 bit version or revision] [16 bit part number] [11 bit manufacturer id] [value of 1'b1 in LSB] */ -/*verilator coverage_off*/ +/*pragma coverage off*/ input [31:1] jtag_id, input [3:0] version -/*verilator coverage_on*/ +/*pragma coverage on*/ ); localparam USER_DR_LENGTH = AWIDTH + 34; diff --git a/design/el2_dma_ctrl.sv b/design/el2_dma_ctrl.sv index a3ca7f6cbdf..11b5541b0d2 100644 --- a/design/el2_dma_ctrl.sv +++ b/design/el2_dma_ctrl.sv @@ -32,9 +32,9 @@ import el2_pkg::*; input logic dma_bus_clk_en, // slave bus clock enable input logic clk_override, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ // Debug signals input logic [31:0] dbg_cmd_addr, diff --git a/design/el2_mem.sv b/design/el2_mem.sv index 7fde7e12ced..25891642333 100644 --- a/design/el2_mem.sv +++ b/design/el2_mem.sv @@ -85,9 +85,9 @@ import el2_pkg::*; el2_mem_if.veer_icache_src icache_export, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/el2_pic_ctrl.sv b/design/el2_pic_ctrl.sv index 755fb56e47b..d6371bef2f7 100644 --- a/design/el2_pic_ctrl.sv +++ b/design/el2_pic_ctrl.sv @@ -48,9 +48,9 @@ import el2_pkg::*; output logic [31:0] picm_rd_data, // Read data of the register output logic mhwakeup, // Wake-up interrupt request // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/el2_pmp.sv b/design/el2_pmp.sv index 502b11f932c..64721bd50cc 100644 --- a/design/el2_pmp.sv +++ b/design/el2_pmp.sv @@ -25,9 +25,9 @@ module el2_pmp ) ( input logic clk, // Top level clock input logic rst_l, // Reset - /* verilator coverage_off */ + /* pragma coverage off */ input logic scan_mode, // Scan mode - /* verilator coverage_on */ + /* pragma coverage on */ `ifdef RV_SMEPMP input el2_mseccfg_pkt_t mseccfg, // mseccfg CSR content, RLB, MMWP and MML bits @@ -115,9 +115,9 @@ module el2_pmp 2'b11: result = (pmp_req_type == EXEC) | ((pmp_req_type == READ) & ~priv_mode); - /* verilator coverage_off */ + /* pragma coverage off */ default: ; - /* verilator coverage_on */ + /* pragma coverage on */ endcase end else begin if (csr_pmp_cfg.read & csr_pmp_cfg.write & csr_pmp_cfg.execute & csr_pmp_cfg.lock) begin diff --git a/design/el2_veer.sv b/design/el2_veer.sv index def2cc4988b..7b72a0e45ae 100644 --- a/design/el2_veer.sv +++ b/design/el2_veer.sv @@ -135,21 +135,21 @@ import el2_pkg::*; output logic [31:0] lsu_axi_awaddr, output logic [3:0] lsu_axi_awregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_awsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_awburst, output logic lsu_axi_awlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_awcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_awprot, output logic [3:0] lsu_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic lsu_axi_wvalid, input logic lsu_axi_wready, @@ -159,9 +159,9 @@ import el2_pkg::*; input logic lsu_axi_bvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] lsu_axi_bresp, input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_bid, @@ -172,27 +172,27 @@ import el2_pkg::*; output logic [31:0] lsu_axi_araddr, output logic [3:0] lsu_axi_arregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_arsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_arburst, output logic lsu_axi_arlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_arcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_arprot, output logic [3:0] lsu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic lsu_axi_rvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_rid, input logic [63:0] lsu_axi_rdata, input logic [1:0] lsu_axi_rresp, @@ -201,12 +201,12 @@ import el2_pkg::*; //-------------------------- IFU AXI signals-------------------------- // AXI Write Channels /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_awvalid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_awready, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.IFU_BUS_TAG-1:0] ifu_axi_awid, output logic [31:0] ifu_axi_awaddr, output logic [3:0] ifu_axi_awregion, @@ -219,20 +219,20 @@ import el2_pkg::*; output logic [3:0] ifu_axi_awqos, output logic ifu_axi_wvalid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_wready, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [63:0] ifu_axi_wdata, output logic [7:0] ifu_axi_wstrb, output logic ifu_axi_wlast, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_bvalid, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] ifu_axi_bresp, input logic [pt.IFU_BUS_TAG-1:0] ifu_axi_bid, @@ -243,7 +243,7 @@ import el2_pkg::*; output logic [31:0] ifu_axi_araddr, output logic [3:0] ifu_axi_arregion, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] ifu_axi_arlen, output logic [2:0] ifu_axi_arsize, output logic [1:0] ifu_axi_arburst, @@ -251,13 +251,13 @@ import el2_pkg::*; output logic [3:0] ifu_axi_arcache, output logic [2:0] ifu_axi_arprot, output logic [3:0] ifu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_rvalid, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.IFU_BUS_TAG-1:0] ifu_axi_rid, input logic [63:0] ifu_axi_rdata, input logic [1:0] ifu_axi_rresp, @@ -268,24 +268,24 @@ import el2_pkg::*; output logic sb_axi_awvalid, input logic sb_axi_awready, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.SB_BUS_TAG-1:0] sb_axi_awid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] sb_axi_awaddr, output logic [3:0] sb_axi_awregion, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] sb_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] sb_axi_awsize, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] sb_axi_awburst, output logic sb_axi_awlock, output logic [3:0] sb_axi_awcache, output logic [2:0] sb_axi_awprot, output logic [3:0] sb_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic sb_axi_wvalid, input logic sb_axi_wready, @@ -302,30 +302,30 @@ import el2_pkg::*; output logic sb_axi_arvalid, input logic sb_axi_arready, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.SB_BUS_TAG-1:0] sb_axi_arid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] sb_axi_araddr, output logic [3:0] sb_axi_arregion, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] sb_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] sb_axi_arsize, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] sb_axi_arburst, output logic sb_axi_arlock, output logic [3:0] sb_axi_arcache, output logic [2:0] sb_axi_arprot, output logic [3:0] sb_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic sb_axi_rvalid, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic sb_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.SB_BUS_TAG-1:0] sb_axi_rid, input logic [63:0] sb_axi_rdata, input logic [1:0] sb_axi_rresp, @@ -375,10 +375,10 @@ import el2_pkg::*; //// AHB LITE BUS output logic [31:0] haddr, /* exclude signals that are tied to constant value in axi4_to_ahb.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] hburst, output logic hmastlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] hprot, output logic [2:0] hsize, output logic [1:0] htrans, @@ -391,10 +391,10 @@ import el2_pkg::*; // LSU AHB Master output logic [31:0] lsu_haddr, /* exclude signals that are tied to constant value in axi4_to_ahb.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_hburst, output logic lsu_hmastlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_hprot, output logic [2:0] lsu_hsize, output logic [1:0] lsu_htrans, @@ -408,10 +408,10 @@ import el2_pkg::*; //System Bus Debug Master output logic [31:0] sb_haddr, /* exclude signals that are tied to constant value in axi4_to_ahb.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] sb_hburst, output logic sb_hmastlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] sb_hprot, output logic [2:0] sb_hsize, output logic [1:0] sb_htrans, @@ -459,9 +459,9 @@ import el2_pkg::*; input logic timer_int, input logic soft_int, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); @@ -560,39 +560,39 @@ import el2_pkg::*; logic dma_axi_awvalid_ahb; /* exclude signals that are tied to constant value in ahb_to_axi4.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ logic [pt.DMA_BUS_TAG-1:0] dma_axi_awid_ahb; - /*verilator coverage_on*/ + /*pragma coverage on*/ logic [31:0] dma_axi_awaddr_ahb; logic [2:0] dma_axi_awsize_ahb; /* exclude signals that are tied to constant value in ahb_to_axi4.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ logic [2:0] dma_axi_awprot_ahb; logic [7:0] dma_axi_awlen_ahb; logic [1:0] dma_axi_awburst_ahb; - /*verilator coverage_on*/ + /*pragma coverage on*/ logic dma_axi_wvalid_ahb; logic [63:0] dma_axi_wdata_ahb; logic [7:0] dma_axi_wstrb_ahb; /* exclude signals that are tied to constant value in ahb_to_axi4.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ logic dma_axi_wlast_ahb; logic dma_axi_bready_ahb; - /*verilator coverage_on*/ + /*pragma coverage on*/ logic dma_axi_arvalid_ahb; /* exclude signals that are tied to constant value in ahb_to_axi4.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ logic [pt.DMA_BUS_TAG-1:0] dma_axi_arid_ahb; - /*verilator coverage_on*/ + /*pragma coverage on*/ logic [31:0] dma_axi_araddr_ahb; logic [2:0] dma_axi_arsize_ahb; /* exclude signals that are tied to constant value in ahb_to_axi4.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ logic [2:0] dma_axi_arprot_ahb; logic [7:0] dma_axi_arlen_ahb; logic [1:0] dma_axi_arburst_ahb; logic dma_axi_rready_ahb; - /*verilator coverage_on*/ + /*pragma coverage on*/ logic dma_axi_awvalid_int; logic [pt.DMA_BUS_TAG-1:0] dma_axi_awid_int; diff --git a/design/el2_veer_wrapper.sv b/design/el2_veer_wrapper.sv index 7200a28376d..0e067cced8a 100644 --- a/design/el2_veer_wrapper.sv +++ b/design/el2_veer_wrapper.sv @@ -54,21 +54,21 @@ import el2_pkg::*; output logic [31:0] lsu_axi_awaddr, output logic [3:0] lsu_axi_awregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_awsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_awburst, output logic lsu_axi_awlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_awcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_awprot, output logic [3:0] lsu_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic lsu_axi_wvalid, input logic lsu_axi_wready, @@ -78,9 +78,9 @@ import el2_pkg::*; input logic lsu_axi_bvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] lsu_axi_bresp, input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_bid, @@ -91,27 +91,27 @@ import el2_pkg::*; output logic [31:0] lsu_axi_araddr, output logic [3:0] lsu_axi_arregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_arsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_arburst, output logic lsu_axi_arlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_arcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_arprot, output logic [3:0] lsu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic lsu_axi_rvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_rid, input logic [63:0] lsu_axi_rdata, input logic [1:0] lsu_axi_rresp, @@ -120,12 +120,12 @@ import el2_pkg::*; //-------------------------- IFU AXI signals-------------------------- // AXI Write Channels /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_awvalid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_awready, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.IFU_BUS_TAG-1:0] ifu_axi_awid, output logic [31:0] ifu_axi_awaddr, output logic [3:0] ifu_axi_awregion, @@ -138,20 +138,20 @@ import el2_pkg::*; output logic [3:0] ifu_axi_awqos, output logic ifu_axi_wvalid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_wready, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [63:0] ifu_axi_wdata, output logic [7:0] ifu_axi_wstrb, output logic ifu_axi_wlast, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_bvalid, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] ifu_axi_bresp, input logic [pt.IFU_BUS_TAG-1:0] ifu_axi_bid, @@ -162,7 +162,7 @@ import el2_pkg::*; output logic [31:0] ifu_axi_araddr, output logic [3:0] ifu_axi_arregion, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] ifu_axi_arlen, output logic [2:0] ifu_axi_arsize, output logic [1:0] ifu_axi_arburst, @@ -170,13 +170,13 @@ import el2_pkg::*; output logic [3:0] ifu_axi_arcache, output logic [2:0] ifu_axi_arprot, output logic [3:0] ifu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_rvalid, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.IFU_BUS_TAG-1:0] ifu_axi_rid, input logic [63:0] ifu_axi_rdata, input logic [1:0] ifu_axi_rresp, @@ -187,24 +187,24 @@ import el2_pkg::*; output logic sb_axi_awvalid, input logic sb_axi_awready, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.SB_BUS_TAG-1:0] sb_axi_awid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] sb_axi_awaddr, output logic [3:0] sb_axi_awregion, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] sb_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] sb_axi_awsize, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] sb_axi_awburst, output logic sb_axi_awlock, output logic [3:0] sb_axi_awcache, output logic [2:0] sb_axi_awprot, output logic [3:0] sb_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic sb_axi_wvalid, input logic sb_axi_wready, @@ -221,30 +221,30 @@ import el2_pkg::*; output logic sb_axi_arvalid, input logic sb_axi_arready, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [pt.SB_BUS_TAG-1:0] sb_axi_arid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] sb_axi_araddr, output logic [3:0] sb_axi_arregion, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] sb_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] sb_axi_arsize, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] sb_axi_arburst, output logic sb_axi_arlock, output logic [3:0] sb_axi_arcache, output logic [2:0] sb_axi_arprot, output logic [3:0] sb_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic sb_axi_rvalid, /* exclude signals that are tied to constant value in dbg/el2_dbg.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic sb_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.SB_BUS_TAG-1:0] sb_axi_rid, input logic [63:0] sb_axi_rdata, input logic [1:0] sb_axi_rresp, @@ -255,9 +255,9 @@ import el2_pkg::*; input logic dma_axi_awvalid, output logic dma_axi_awready, /* exclude signals that are tied to constant value in tb_top.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [pt.DMA_BUS_TAG-1:0] dma_axi_awid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [31:0] dma_axi_awaddr, input logic [2:0] dma_axi_awsize, input logic [2:0] dma_axi_awprot, @@ -280,9 +280,9 @@ import el2_pkg::*; input logic dma_axi_arvalid, output logic dma_axi_arready, /* exclude signals that are tied to constant value in tb_top.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [pt.DMA_BUS_TAG-1:0] dma_axi_arid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [31:0] dma_axi_araddr, input logic [2:0] dma_axi_arsize, input logic [2:0] dma_axi_arprot, @@ -301,29 +301,29 @@ import el2_pkg::*; //// AHB LITE BUS output logic [31:0] haddr, /* exclude signals that are tied to constant value in axi4_to_ahb.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] hburst, output logic hmastlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] hprot, output logic [2:0] hsize, output logic [1:0] htrans, output logic hwrite, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [63:0] hrdata, input logic hready, input logic hresp, - /*verilator coverage_on*/ + /*pragma coverage on*/ // LSU AHB Master output logic [31:0] lsu_haddr, /* exclude signals that are tied to constant value in axi4_to_ahb.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_hburst, output logic lsu_hmastlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_hprot, output logic [2:0] lsu_hsize, output logic [1:0] lsu_htrans, @@ -331,18 +331,18 @@ import el2_pkg::*; output logic [63:0] lsu_hwdata, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [63:0] lsu_hrdata, input logic lsu_hready, input logic lsu_hresp, - /*verilator coverage_on*/ + /*pragma coverage on*/ // Debug Syster Bus AHB output logic [31:0] sb_haddr, /* exclude signals that are tied to constant value in axi4_to_ahb.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] sb_hburst, output logic sb_hmastlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] sb_hprot, output logic [2:0] sb_hsize, output logic [1:0] sb_htrans, @@ -350,15 +350,15 @@ import el2_pkg::*; output logic [63:0] sb_hwdata, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [63:0] sb_hrdata, input logic sb_hready, input logic sb_hresp, - /*verilator coverage_on*/ + /*pragma coverage on*/ // DMA Slave /* exclude signals that are tied to constant value in tb_top.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic dma_hsel, input logic [31:0] dma_haddr, input logic [2:0] dma_hburst, @@ -368,7 +368,7 @@ import el2_pkg::*; input logic [1:0] dma_htrans, input logic dma_hwrite, input logic [63:0] dma_hwdata, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic dma_hreadyin, output logic [63:0] dma_hrdata, @@ -428,7 +428,7 @@ import el2_pkg::*; output logic o_cpu_run_ack, // Core response to run req // Excluding scan_mode and mbist_mode from coverage as their usage is determined by the integrator of the VeeR core. - /* verilator coverage_off */ + /* pragma coverage off */ input logic scan_mode, // To enable scan mode input logic mbist_mode, // to enable mbist @@ -441,7 +441,7 @@ import el2_pkg::*; output logic [31:0] dmi_uncore_wdata, input logic [31:0] dmi_uncore_rdata, output logic dmi_active - /* verilator coverage_on */ + /* pragma coverage on */ ); logic active_l2clk; @@ -513,7 +513,7 @@ import el2_pkg::*; // zero out the signals not presented at the wrapper instantiation level `ifdef RV_BUILD_AXI4 // Since all the signals in this block are tied to constant, we exclude this from coverage analysis - /*verilator coverage_off*/ + /*pragma coverage off*/ //// AHB LITE BUS logic [31:0] haddr; @@ -598,14 +598,14 @@ import el2_pkg::*; assign dma_hwdata[63:0] = '0; assign dma_hreadyin = '0; - /*verilator coverage_on*/ + /*pragma coverage on*/ `endif // `ifdef RV_BUILD_AXI4 `ifdef RV_BUILD_AHB_LITE // Since all the signals in this block are tied to constant, we exclude this from coverage analysis - /*verilator coverage_off*/ + /*pragma coverage off*/ wire lsu_axi_awvalid; wire lsu_axi_awready; wire [pt.LSU_BUS_TAG-1:0] lsu_axi_awid; @@ -851,7 +851,7 @@ import el2_pkg::*; assign ifu_axi_bresp[1:0] = '0; assign ifu_axi_bid[pt.IFU_BUS_TAG-1:0] = '0; - /*verilator coverage_on*/ + /*pragma coverage on*/ `endif // `ifdef RV_BUILD_AHB_LITE diff --git a/design/exu/el2_exu.sv b/design/exu/el2_exu.sv index f02ba5d87fb..26e90edb23a 100644 --- a/design/exu/el2_exu.sv +++ b/design/exu/el2_exu.sv @@ -23,9 +23,9 @@ import el2_pkg::*; input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan control - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] dec_data_en, // Clock enable {x,r}, one cycle pulse input logic [1:0] dec_ctl_en, // Clock enable {x,r}, two cycle pulse diff --git a/design/exu/el2_exu_alu_ctl.sv b/design/exu/el2_exu_alu_ctl.sv index f339220a651..b815901a3f5 100644 --- a/design/exu/el2_exu_alu_ctl.sv +++ b/design/exu/el2_exu_alu_ctl.sv @@ -23,9 +23,9 @@ import el2_pkg::*; input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan control - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic flush_upper_x, // Branch flush from previous cycle input logic flush_lower_r, // Master flush of entire pipeline diff --git a/design/exu/el2_exu_div_ctl.sv b/design/exu/el2_exu_div_ctl.sv index 9a8eb2d84e3..d7928406896 100644 --- a/design/exu/el2_exu_div_ctl.sv +++ b/design/exu/el2_exu_div_ctl.sv @@ -23,9 +23,9 @@ import el2_pkg::*; input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input el2_div_pkt_t dp, // valid, sign, rem input logic [31:0] dividend, // Numerator @@ -144,9 +144,9 @@ module el2_exu_div_existing_1bit_cheapshortq input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic cancel, // Flush pipeline input logic valid_in, @@ -455,9 +455,9 @@ module el2_exu_div_new_1bit_fullshortq input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic cancel, // Flush pipeline input logic valid_in, @@ -716,9 +716,9 @@ module el2_exu_div_new_2bit_fullshortq input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic cancel, // Flush pipeline input logic valid_in, @@ -993,9 +993,9 @@ module el2_exu_div_new_3bit_fullshortq input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic cancel, // Flush pipeline input logic valid_in, @@ -1328,9 +1328,9 @@ module el2_exu_div_new_4bit_fullshortq input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic cancel, // Flush pipeline input logic valid_in, diff --git a/design/exu/el2_exu_mul_ctl.sv b/design/exu/el2_exu_mul_ctl.sv index a8cd32798af..d45c2f515c1 100644 --- a/design/exu/el2_exu_mul_ctl.sv +++ b/design/exu/el2_exu_mul_ctl.sv @@ -23,9 +23,9 @@ import el2_pkg::*; input logic clk, // Top level clock input logic rst_l, // Reset // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input el2_mul_pkt_t mul_p, // {Valid, RS1 signed operand, RS2 signed operand, Select low 32-bits of result} diff --git a/design/ifu/el2_ifu.sv b/design/ifu/el2_ifu.sv index 68842a19df9..a0325498169 100644 --- a/design/ifu/el2_ifu.sv +++ b/design/ifu/el2_ifu.sv @@ -49,7 +49,7 @@ import el2_pkg::*; //-------------------------- IFU AXI signals-------------------------- // AXI Write Channels /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_awvalid, output logic [pt.IFU_BUS_TAG-1:0] ifu_axi_awid, output logic [31:0] ifu_axi_awaddr, @@ -68,7 +68,7 @@ import el2_pkg::*; output logic ifu_axi_wlast, output logic ifu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ // AXI Read Channels output logic ifu_axi_arvalid, @@ -77,7 +77,7 @@ import el2_pkg::*; output logic [31:0] ifu_axi_araddr, output logic [3:0] ifu_axi_arregion, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] ifu_axi_arlen, output logic [2:0] ifu_axi_arsize, output logic [1:0] ifu_axi_arburst, @@ -85,13 +85,13 @@ import el2_pkg::*; output logic [3:0] ifu_axi_arcache, output logic [2:0] ifu_axi_arprot, output logic [3:0] ifu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_rvalid, /* exclude signals that are tied to constant value in el2_ifu_mem_ctl.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.IFU_BUS_TAG-1:0] ifu_axi_rid, input logic [63:0] ifu_axi_rdata, input logic [1:0] ifu_axi_rresp, @@ -215,9 +215,9 @@ import el2_pkg::*; output logic iccm_correction_state, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); localparam TAGWIDTH = 2 ; diff --git a/design/ifu/el2_ifu_aln_ctl.sv b/design/ifu/el2_ifu_aln_ctl.sv index 3648cd461c5..f69b8c40539 100644 --- a/design/ifu/el2_ifu_aln_ctl.sv +++ b/design/ifu/el2_ifu_aln_ctl.sv @@ -26,9 +26,9 @@ import el2_pkg::*; ( // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // Flop scan mode control - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic rst_l, // reset, active low input logic clk, // Clock only while core active. Through one clock header. For flops with second clock header built in. Connected to ACTIVE_L2CLK. input logic active_clk, // Clock only while core active. Through two clock headers. For flops without second clock header built in. diff --git a/design/ifu/el2_ifu_bp_ctl.sv b/design/ifu/el2_ifu_bp_ctl.sv index a08c3c30d47..e7d9469398e 100644 --- a/design/ifu/el2_ifu_bp_ctl.sv +++ b/design/ifu/el2_ifu_bp_ctl.sv @@ -76,9 +76,9 @@ import el2_pkg::*; output logic [1:0] [$clog2(pt.BTB_SIZE)-1:0] ifu_bp_fa_index_f, // predicted branch index (fully associative option) // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/ifu/el2_ifu_ic_mem.sv b/design/ifu/el2_ifu_ic_mem.sv index 35db09447db..1b1c1b5025a 100644 --- a/design/ifu/el2_ifu_ic_mem.sv +++ b/design/ifu/el2_ifu_ic_mem.sv @@ -55,9 +55,9 @@ import el2_pkg::*; output logic [pt.ICACHE_NUM_WAYS-1:0] ic_rd_hit, // ic_rd_hit[3:0] output logic ic_tag_perr, // Tag Parity error // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Flop scan mode control - /*verilator coverage_on*/ + /*pragma coverage on*/ ) ; // split the veer_icache_src interface into veer_icache_data and veer_icache_tag @@ -142,9 +142,9 @@ import el2_pkg::*; input logic [pt.ICACHE_NUM_WAYS-1:0]ic_rd_hit, el2_mem_if.veer_icache_data icache_export, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ) ; @@ -750,9 +750,9 @@ import el2_pkg::*; output logic [pt.ICACHE_NUM_WAYS-1:0] ic_rd_hit, output logic ic_tag_perr, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ) ; logic [pt.ICACHE_NUM_WAYS-1:0] [25:0] ic_tag_data_raw; diff --git a/design/ifu/el2_ifu_iccm_mem.sv b/design/ifu/el2_ifu_iccm_mem.sv index a7f3752da52..c7a9336b75d 100644 --- a/design/ifu/el2_ifu_iccm_mem.sv +++ b/design/ifu/el2_ifu_iccm_mem.sv @@ -43,9 +43,9 @@ import el2_pkg::*; output logic [63:0] iccm_rd_data, // ICCM read data output logic [77:0] iccm_rd_data_ecc, // ICCM read ecc // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Scan mode control - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/ifu/el2_ifu_ifc_ctl.sv b/design/ifu/el2_ifu_ifc_ctl.sv index bac034cb851..a1bf7615046 100644 --- a/design/ifu/el2_ifu_ifc_ctl.sv +++ b/design/ifu/el2_ifu_ifc_ctl.sv @@ -31,9 +31,9 @@ import el2_pkg::*; input logic rst_l, // reset enable, from core pin // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // scan - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ic_hit_f, // Icache hit input logic ifu_ic_mb_empty, // Miss buffer empty diff --git a/design/ifu/el2_ifu_mem_ctl.sv b/design/ifu/el2_ifu_mem_ctl.sv index 7cabb0599e5..b7b7183efda 100644 --- a/design/ifu/el2_ifu_mem_ctl.sv +++ b/design/ifu/el2_ifu_mem_ctl.sv @@ -65,7 +65,7 @@ import el2_pkg::*; //-------------------------- IFU AXI signals-------------------------- // AXI Write Channels /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_awvalid, output logic [pt.IFU_BUS_TAG-1:0] ifu_axi_awid, output logic [31:0] ifu_axi_awaddr, @@ -84,7 +84,7 @@ import el2_pkg::*; output logic ifu_axi_wlast, output logic ifu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ // AXI Read Channels output logic ifu_axi_arvalid, @@ -93,7 +93,7 @@ import el2_pkg::*; output logic [31:0] ifu_axi_araddr, output logic [3:0] ifu_axi_arregion, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] ifu_axi_arlen, output logic [2:0] ifu_axi_arsize, output logic [1:0] ifu_axi_arburst, @@ -101,13 +101,13 @@ import el2_pkg::*; output logic [3:0] ifu_axi_arcache, output logic [2:0] ifu_axi_arprot, output logic [3:0] ifu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic ifu_axi_rvalid, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic ifu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.IFU_BUS_TAG-1:0] ifu_axi_rid, input logic [63:0] ifu_axi_rdata, input logic [1:0] ifu_axi_rresp, @@ -195,9 +195,9 @@ import el2_pkg::*; // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); // Create different defines for ICACHE and ICCM enable combinations @@ -538,12 +538,12 @@ import el2_pkg::*; exu_flush_final ? ((bus_ifu_wr_en_ff & last_beat) ? IDLE : HIT_U_MISS) : IDLE; miss_state_en = (bus_ifu_wr_en_ff & last_beat) | exu_flush_final | dec_tlu_force_halt; end - /*verilator coverage_off*/ + /*pragma coverage off*/ default: begin : def_case miss_nxtstate = IDLE; miss_state_en = 1'b0; end - /*verilator coverage_on*/ + /*pragma coverage on*/ endcase end rvdffs #(($bits(miss_state_t))) miss_state_ff (.clk(active_clk), .din(miss_nxtstate), .dout({miss_state}), .en(miss_state_en), .*); @@ -979,14 +979,14 @@ assign ic_miss_buff_half[63:0] = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss perr_state_en = 1'b1; end /* perr_state is an enum and the existing members are handled above */ - /*verilator coverage_off*/ + /*pragma coverage off*/ default: begin : def_case perr_nxtstate = ERR_IDLE; perr_state_en = 1'b0; perr_sel_invalidate = 1'b0; perr_sb_write_status = 1'b0; end - /*verilator coverage_on*/ + /*pragma coverage on*/ endcase end @@ -1029,7 +1029,7 @@ assign ic_miss_buff_half[63:0] = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss iccm_correction_state = 1'b1; end - /*verilator coverage_off*/ + /*pragma coverage off*/ default: begin : def_case err_stop_nxtstate = ERR_STOP_IDLE; err_stop_state_en = 1'b0; @@ -1037,7 +1037,7 @@ assign ic_miss_buff_half[63:0] = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss iccm_correction_state = 1'b1; end - /*verilator coverage_on*/ + /*pragma coverage on*/ endcase end rvdffs #(($bits(err_stop_state_t))) err_stop_state_ff (.clk(active_clk), .din(err_stop_nxtstate), .dout({err_stop_state}), .en(err_stop_state_en), .*); diff --git a/design/include/el2_dec_csr_equ_m.svh b/design/include/el2_dec_csr_equ_m.svh index 282fe960d33..7769a4ab709 100644 --- a/design/include/el2_dec_csr_equ_m.svh +++ b/design/include/el2_dec_csr_equ_m.svh @@ -51,7 +51,7 @@ logic csr_mitb1; logic csr_mitcnt0; logic csr_mitcnt1; /* exclude signals that are tied to constant value in this file */ -/*verilator coverage_off*/ +/*pragma coverage off*/ logic csr_perfva; logic csr_perfvb; logic csr_perfvc; @@ -61,7 +61,7 @@ logic csr_perfvf; logic csr_perfvg; logic csr_perfvh; logic csr_perfvi; -/*verilator coverage_on*/ +/*pragma coverage on*/ logic csr_mpmc; logic csr_mcpc; logic csr_meicpct; diff --git a/design/lib/ahb_to_axi4.sv b/design/lib/ahb_to_axi4.sv index d31322b3379..ebef0ca2a67 100644 --- a/design/lib/ahb_to_axi4.sv +++ b/design/lib/ahb_to_axi4.sv @@ -30,9 +30,9 @@ import el2_pkg::*; ( input clk, input rst_l, - /* verilator coverage_off */ + /* pragma coverage off */ input scan_mode, - /* verilator coverage_on */ + /* pragma coverage on */ input bus_clk_en, input clk_override, @@ -41,63 +41,63 @@ import el2_pkg::*; output logic axi_awvalid, input logic axi_awready, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [TAG-1:0] axi_awid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] axi_awaddr, output logic [2:0] axi_awsize, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] axi_awprot, output logic [7:0] axi_awlen, output logic [1:0] axi_awburst, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic axi_wvalid, input logic axi_wready, output logic [63:0] axi_wdata, output logic [7:0] axi_wstrb, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic axi_wlast, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic axi_bvalid, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] axi_bresp, /* Exclude unused AXI rid since it has no equivalent in AHB */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [TAG-1:0] axi_bid, - /*verilator coverage_on*/ + /*pragma coverage on*/ // AXI Read Channels output logic axi_arvalid, input logic axi_arready, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [TAG-1:0] axi_arid, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [31:0] axi_araddr, output logic [2:0] axi_arsize, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] axi_arprot, output logic [7:0] axi_arlen, output logic [1:0] axi_arburst, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic axi_rvalid, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ /* Exclude unused AXI rid since it has no equivalent in AHB */ - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [TAG-1:0] axi_rid, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [63:0] axi_rdata, input logic [1:0] axi_rresp, @@ -105,11 +105,11 @@ import el2_pkg::*; input logic [31:0] ahb_haddr, // ahb bus address // Exclude input signals that are unused in this file (their AXI equivalents // are tied to constants) - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic [2:0] ahb_hburst, // tied to 0 input logic ahb_hmastlock, // tied to 0 input logic [3:0] ahb_hprot, // tied to 4'b0011 - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [2:0] ahb_hsize, // size of bus transaction (possible values 0,1,2,3) input logic [1:0] ahb_htrans, // Transaction type (possible values 0,2 only right now) input logic ahb_hwrite, // ahb bus write diff --git a/design/lib/axi4_to_ahb.sv b/design/lib/axi4_to_ahb.sv index a0f71524348..ed13b1524a4 100644 --- a/design/lib/axi4_to_ahb.sv +++ b/design/lib/axi4_to_ahb.sv @@ -31,9 +31,9 @@ import el2_pkg::*; input free_clk, input rst_l, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ input bus_clk_en, input clk_override, input dec_tlu_force_halt, @@ -76,10 +76,10 @@ import el2_pkg::*; // AHB-Lite signals output logic [31:0] ahb_haddr, // ahb bus address /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] ahb_hburst, // tied to 0 output logic ahb_hmastlock, // tied to 0 - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] ahb_hprot, // [3:1] are tied to 3'b001 output logic [2:0] ahb_hsize, // size of bus transaction (possible values 0,1,2,3) output logic [1:0] ahb_htrans, // Transaction type (possible values 0,2 only right now) diff --git a/design/lib/beh_lib.sv b/design/lib/beh_lib.sv index b51a487555a..689f5574578 100644 --- a/design/lib/beh_lib.sv +++ b/design/lib/beh_lib.sv @@ -170,9 +170,9 @@ module rvdffe #( parameter WIDTH=1, SHORT=0, OVERRIDE=0 ) input logic clk, input logic rst_l, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [WIDTH-1:0] dout ); @@ -213,9 +213,9 @@ module rvdffpcie #( parameter WIDTH=31 ) input logic rst_l, input logic en, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [WIDTH-1:0] dout ); @@ -249,9 +249,9 @@ module rvdfflie #( parameter WIDTH=16, LEFT=8 ) input logic rst_l, input logic en, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [WIDTH-1:0] dout ); @@ -307,9 +307,9 @@ module rvdffppe #( parameter integer WIDTH = 39 ) input logic rst_l, input logic en, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [WIDTH-1:0] dout ); @@ -353,9 +353,9 @@ module rvdffie #( parameter WIDTH=1, OVERRIDE=0 ) input logic clk, input logic rst_l, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [WIDTH-1:0] dout ); @@ -399,9 +399,9 @@ module rvdffiee #( parameter WIDTH=1, OVERRIDE=0 ) input logic clk, input logic rst_l, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic en, output logic [WIDTH-1:0] dout ); @@ -793,9 +793,9 @@ module rvclkhdr input logic en, input logic clk, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic l1clk ); @@ -816,9 +816,9 @@ module rvoclkhdr input logic en, input logic clk, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic l1clk ); diff --git a/design/lsu/el2_lsu.sv b/design/lsu/el2_lsu.sv index 9ed2bf42100..54afe2c14bd 100644 --- a/design/lsu/el2_lsu.sv +++ b/design/lsu/el2_lsu.sv @@ -119,21 +119,21 @@ import el2_pkg::*; output logic [31:0] lsu_axi_awaddr, output logic [3:0] lsu_axi_awregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_awsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_awburst, output logic lsu_axi_awlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_awcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_awprot, output logic [3:0] lsu_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic lsu_axi_wvalid, input logic lsu_axi_wready, @@ -143,9 +143,9 @@ import el2_pkg::*; input logic lsu_axi_bvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] lsu_axi_bresp, input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_bid, @@ -156,27 +156,27 @@ import el2_pkg::*; output logic [31:0] lsu_axi_araddr, output logic [3:0] lsu_axi_arregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_arsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_arburst, output logic lsu_axi_arlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_arcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_arprot, output logic [3:0] lsu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic lsu_axi_rvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_rid, input logic [63:0] lsu_axi_rdata, input logic [1:0] lsu_axi_rresp, @@ -203,9 +203,9 @@ import el2_pkg::*; output logic lsu_dccm_rd_ecc_double_err, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic clk, // Clock only while core active. Through one clock header. For flops with second clock header built in. Connected to ACTIVE_L2CLK. input logic active_clk, // Clock only while core active. Through two clock headers. For flops without second clock header built in. input logic rst_l, // reset, active low diff --git a/design/lsu/el2_lsu_addrcheck.sv b/design/lsu/el2_lsu_addrcheck.sv index f838b50fa85..b18eb82e402 100644 --- a/design/lsu/el2_lsu_addrcheck.sv +++ b/design/lsu/el2_lsu_addrcheck.sv @@ -54,9 +54,9 @@ import el2_pkg::*; input logic lsu_pmp_error_end, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/lsu/el2_lsu_bus_buffer.sv b/design/lsu/el2_lsu_bus_buffer.sv index 2c04c719574..1c699f9595b 100644 --- a/design/lsu/el2_lsu_bus_buffer.sv +++ b/design/lsu/el2_lsu_bus_buffer.sv @@ -32,9 +32,9 @@ import el2_pkg::*; input logic clk_override, // Override non-functional clock gating input logic rst_l, // reset, active low // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic dec_tlu_external_ldfwd_disable, // disable load to load forwarding for externals input logic dec_tlu_wb_coalescing_disable, // disable write buffer coalescing input logic dec_tlu_sideeffect_posted_disable, // Don't block the sideeffect load store to the bus @@ -110,21 +110,21 @@ import el2_pkg::*; output logic [31:0] lsu_axi_awaddr, output logic [3:0] lsu_axi_awregion, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_awsize, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_awburst, output logic lsu_axi_awlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_awcache, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_awprot, output logic [3:0] lsu_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic lsu_axi_wvalid, input logic lsu_axi_wready, @@ -134,9 +134,9 @@ import el2_pkg::*; input logic lsu_axi_bvalid, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] lsu_axi_bresp, input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_bid, @@ -147,27 +147,27 @@ import el2_pkg::*; output logic [31:0] lsu_axi_araddr, output logic [3:0] lsu_axi_arregion, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_arsize, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_arburst, output logic lsu_axi_arlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_arcache, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_arprot, output logic [3:0] lsu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic lsu_axi_rvalid, /* exclude signals that are tied to constant value in this file */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_rid, input logic [63:0] lsu_axi_rdata, input logic [1:0] lsu_axi_rresp, @@ -748,7 +748,7 @@ import el2_pkg::*; buf_cmd_state_bus_en[i] = '0; end /* buf_state is an enum and the existing members are handled above */ - /*verilator coverage_off*/ + /*pragma coverage off*/ default : begin buf_nxtstate[i] = IDLE; buf_state_en[i] = '0; @@ -761,7 +761,7 @@ import el2_pkg::*; buf_rst[i] = '0; buf_cmd_state_bus_en[i] = '0; end - /*verilator coverage_on*/ + /*pragma coverage on*/ endcase end diff --git a/design/lsu/el2_lsu_bus_intf.sv b/design/lsu/el2_lsu_bus_intf.sv index e3ee2841467..38c6f68b835 100644 --- a/design/lsu/el2_lsu_bus_intf.sv +++ b/design/lsu/el2_lsu_bus_intf.sv @@ -31,9 +31,9 @@ import el2_pkg::*; input logic clk_override, // Override non-functional clock gating input logic rst_l, // reset, active low // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic dec_tlu_external_ldfwd_disable, // disable load to load forwarding for externals input logic dec_tlu_wb_coalescing_disable, // disable write buffer coalescing input logic dec_tlu_sideeffect_posted_disable, // disable the posted sideeffect load store to the bus @@ -106,21 +106,21 @@ import el2_pkg::*; output logic [31:0] lsu_axi_awaddr, output logic [3:0] lsu_axi_awregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_awlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_awsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_awburst, output logic lsu_axi_awlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_awcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_awprot, output logic [3:0] lsu_axi_awqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic lsu_axi_wvalid, input logic lsu_axi_wready, @@ -130,9 +130,9 @@ import el2_pkg::*; input logic lsu_axi_bvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_bready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [1:0] lsu_axi_bresp, input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_bid, @@ -143,27 +143,27 @@ import el2_pkg::*; output logic [31:0] lsu_axi_araddr, output logic [3:0] lsu_axi_arregion, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [7:0] lsu_axi_arlen, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [2:0] lsu_axi_arsize, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [1:0] lsu_axi_arburst, output logic lsu_axi_arlock, - /*verilator coverage_on*/ + /*pragma coverage on*/ output logic [3:0] lsu_axi_arcache, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic [2:0] lsu_axi_arprot, output logic [3:0] lsu_axi_arqos, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic lsu_axi_rvalid, /* exclude signals that are tied to constant value in el2_lsu_bus_buffer.sv */ - /*verilator coverage_off*/ + /*pragma coverage off*/ output logic lsu_axi_rready, - /*verilator coverage_on*/ + /*pragma coverage on*/ input logic [pt.LSU_BUS_TAG-1:0] lsu_axi_rid, input logic [63:0] lsu_axi_rdata, input logic [1:0] lsu_axi_rresp, diff --git a/design/lsu/el2_lsu_clkdomain.sv b/design/lsu/el2_lsu_clkdomain.sv index c4c87f785b3..268ac629a13 100644 --- a/design/lsu/el2_lsu_clkdomain.sv +++ b/design/lsu/el2_lsu_clkdomain.sv @@ -74,9 +74,9 @@ import el2_pkg::*; output logic lsu_free_c2_clk, // free double pulse clock // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); logic lsu_c1_m_clken, lsu_c1_r_clken; diff --git a/design/lsu/el2_lsu_dccm_ctl.sv b/design/lsu/el2_lsu_dccm_ctl.sv index 8293680b973..e0fbb98f61d 100644 --- a/design/lsu/el2_lsu_dccm_ctl.sv +++ b/design/lsu/el2_lsu_dccm_ctl.sv @@ -154,9 +154,9 @@ import el2_pkg::*; input logic [31:0] picm_rd_data, // read data // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/lsu/el2_lsu_dccm_mem.sv b/design/lsu/el2_lsu_dccm_mem.sv index fe818a1fc60..a02bba6ef05 100644 --- a/design/lsu/el2_lsu_dccm_mem.sv +++ b/design/lsu/el2_lsu_dccm_mem.sv @@ -51,9 +51,9 @@ module el2_lsu_dccm_mem output logic [pt.DCCM_FDATA_WIDTH-1:0] dccm_rd_data_hi, // read data from the hi bank // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/lsu/el2_lsu_ecc.sv b/design/lsu/el2_lsu_ecc.sv index 59c204c5189..e362b80cdd3 100644 --- a/design/lsu/el2_lsu_ecc.sv +++ b/design/lsu/el2_lsu_ecc.sv @@ -36,9 +36,9 @@ import el2_pkg::*; input logic clk_override, // Override non-functional clock gating input logic rst_l, // reset, active low // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode, // scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ input el2_lsu_pkt_t lsu_pkt_m, // packet in m input el2_lsu_pkt_t lsu_pkt_r, // packet in r diff --git a/design/lsu/el2_lsu_lsc_ctl.sv b/design/lsu/el2_lsu_lsc_ctl.sv index 98d0b04d812..8030cc0d92e 100644 --- a/design/lsu/el2_lsu_lsc_ctl.sv +++ b/design/lsu/el2_lsu_lsc_ctl.sv @@ -115,9 +115,9 @@ import el2_pkg::*; input logic lsu_pmp_error_end, // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ ); diff --git a/design/lsu/el2_lsu_stbuf.sv b/design/lsu/el2_lsu_stbuf.sv index e14928892e0..9b484068cf4 100644 --- a/design/lsu/el2_lsu_stbuf.sv +++ b/design/lsu/el2_lsu_stbuf.sv @@ -82,9 +82,9 @@ import el2_pkg::*; output logic [pt.DCCM_BYTE_WIDTH-1:0] stbuf_fwdbyteen_lo_m, // stbuf data // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core. - /*verilator coverage_off*/ + /*pragma coverage off*/ input logic scan_mode // Scan mode - /*verilator coverage_on*/ + /*pragma coverage on*/ );