diff --git a/data/family/CH32V0.yaml b/data/family/CH32V0.yaml
index 0e950ed..d53b310 100644
--- a/data/family/CH32V0.yaml
+++ b/data/family/CH32V0.yaml
@@ -133,7 +133,7 @@
   address: 0x40012C00
   registers:
     kind: timer
-    version: common
+    version: v3
     block: ADTM
   rcc:
     bus_clock: PCLK2
@@ -276,7 +276,7 @@
   address: 0x40000000
   registers:
     kind: timer
-    version: common
+    version: v3
     block: GPTM
   rcc:
     bus_clock: PCLK1
@@ -297,7 +297,6 @@
       interrupt: TIM2
     - signal: TRG
       interrupt: TIM2
-
   pins:
     # 00 ： 默 认 映 射 (CH1/ETR/PD4 ， CH2/PD3 ， CH3/PC0，CH4/PD7)；
     - pin: PD4
diff --git a/data/registers/adtm_v3.yaml b/data/registers/adtm_v3.yaml
deleted file mode 100644
index f8d7197..0000000
--- a/data/registers/adtm_v3.yaml
+++ /dev/null
@@ -1,779 +0,0 @@
-block/ADTM:
-  description: Advanced timer.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      bit_size: 16
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      bit_size: 16
-      fieldset: CTLR2
-    - name: SMCFGR
-      description: slave mode control register.
-      byte_offset: 8
-      bit_size: 16
-      fieldset: SMCFGR
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      bit_size: 16
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      bit_size: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      bit_size: 16
-      fieldset: SWEVGR
-    - name: CHCTLR1_Input
-      description: capture/compare mode register 1 (input mode).
-      byte_offset: 24
-      bit_size: 16
-      fieldset: CHCTLR1_Input
-    - name: CHCTLR1_Output
-      description: capture/compare mode register (output mode).
-      byte_offset: 24
-      bit_size: 16
-      fieldset: CHCTLR1_Output
-    - name: CHCTLR2_Input
-      description: capture/compare mode register 2 (input mode).
-      byte_offset: 28
-      bit_size: 16
-      fieldset: CHCTLR2_Input
-    - name: CHCTLR2_Output
-      description: capture/compare mode register (output mode).
-      byte_offset: 28
-      bit_size: 16
-      fieldset: CHCTLR2_Output
-    - name: CCER
-      description: capture/compare enable register.
-      byte_offset: 32
-      bit_size: 16
-      fieldset: CCER
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      bit_size: 16
-      fieldset: CNT
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      bit_size: 16
-      fieldset: PSC
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      bit_size: 16
-      fieldset: ATRLR
-    - name: RPTCR
-      description: repetition counter register.
-      byte_offset: 48
-      bit_size: 16
-      fieldset: RPTCR
-    - name: CH1CVR
-      description: capture/compare register 1.
-      byte_offset: 52
-      bit_size: 16
-      fieldset: CH1CVR
-    - name: CH2CVR
-      description: capture/compare register 2.
-      byte_offset: 56
-      bit_size: 16
-      fieldset: CH2CVR
-    - name: CH3CVR
-      description: capture/compare register 3.
-      byte_offset: 60
-      bit_size: 16
-      fieldset: CH3CVR
-    - name: CH4CVR
-      description: capture/compare register 4.
-      byte_offset: 64
-      bit_size: 16
-      fieldset: CH4CVR
-    - name: BDTR
-      description: break and dead-time register.
-      byte_offset: 68
-      bit_size: 16
-      fieldset: BDTR
-    - name: DMACFGR
-      description: DMA control register.
-      byte_offset: 72
-      bit_size: 16
-      fieldset: DMACFGR
-    - name: DMAADR
-      description: DMA address for full transfer.
-      byte_offset: 76
-      bit_size: 16
-      fieldset: DMAADR
-    - name: SPEC
-      description: SPEC.
-      byte_offset: 80
-      bit_size: 16
-      fieldset: SPEC
-fieldset/ATRLR:
-  description: auto-reload register.
-  bit_size: 16
-  fields:
-    - name: ATRLR
-      description: Auto-reload value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/BDTR:
-  description: break and dead-time register.
-  bit_size: 16
-  fields:
-    - name: DTG
-      description: Dead-time generator setup.
-      bit_offset: 0
-      bit_size: 8
-    - name: LOCK
-      description: Lock configuration.
-      bit_offset: 8
-      bit_size: 2
-    - name: OSSI
-      description: Off-state selection for Idle mode.
-      bit_offset: 10
-      bit_size: 1
-    - name: OSSR
-      description: Off-state selection for Run mode.
-      bit_offset: 11
-      bit_size: 1
-    - name: BKE
-      description: Break enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: BKP
-      description: Break polarity.
-      bit_offset: 13
-      bit_size: 1
-    - name: AOE
-      description: Automatic output enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: MOE
-      description: Main output enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CCER:
-  description: capture/compare enable register.
-  bit_size: 16
-  fields:
-    - name: CC1E
-      description: Capture/Compare 1 output enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1P
-      description: Capture/Compare 1 output Polarity.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC1NE
-      description: Capture/Compare 1 complementary output enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC1NP
-      description: Capture/Compare 1 output Polarity.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC2E
-      description: Capture/Compare 2 output enable.
-      bit_offset: 4
-      bit_size: 1
-    - name: CC2P
-      description: Capture/Compare 2 output Polarity.
-      bit_offset: 5
-      bit_size: 1
-    - name: CC2NE
-      description: Capture/Compare 2 complementary output enable.
-      bit_offset: 6
-      bit_size: 1
-    - name: CC2NP
-      description: Capture/Compare 2 output Polarity.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC3E
-      description: Capture/Compare 3 output enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CC3P
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC3NE
-      description: Capture/Compare 3 complementary output enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3NP
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4E
-      description: Capture/Compare 4 output enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: CC4P
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 13
-      bit_size: 1
-fieldset/CH1CVR:
-  description: capture/compare register 1.
-  bit_size: 16
-  fields:
-    - name: CH1CVR
-      description: Capture/Compare 1 value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CH2CVR:
-  description: capture/compare register 2.
-  bit_size: 16
-  fields:
-    - name: CH2CVR
-      description: Capture/Compare 2 value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CH3CVR:
-  description: capture/compare register 3.
-  bit_size: 16
-  fields:
-    - name: CH3CVR
-      description: Capture/Compare value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CH4CVR:
-  description: capture/compare register 4.
-  bit_size: 16
-  fields:
-    - name: CH4CVR
-      description: Capture/Compare value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CHCTLR1_Input:
-  description: capture/compare mode register 1 (input mode).
-  bit_size: 16
-  fields:
-    - name: CC1S
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: IC1PSC
-      description: Input capture 1 prescaler.
-      bit_offset: 2
-      bit_size: 2
-    - name: IC1F
-      description: Input capture 1 filter.
-      bit_offset: 4
-      bit_size: 4
-    - name: CC2S
-      description: Capture/Compare 2 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: IC2PCS
-      description: Input capture 2 prescaler.
-      bit_offset: 10
-      bit_size: 2
-    - name: IC2F
-      description: Input capture 2 filter.
-      bit_offset: 12
-      bit_size: 4
-fieldset/CHCTLR1_Output:
-  description: capture/compare mode register (output mode).
-  bit_size: 16
-  fields:
-    - name: CC1S
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: OC1FE
-      description: Output Compare 1 fast enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: OC1PE
-      description: Output Compare 1 preload enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: OC1M
-      description: Output Compare 1 mode.
-      bit_offset: 4
-      bit_size: 3
-    - name: OC1CE
-      description: Output Compare 1 clear enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC2S
-      description: Capture/Compare 2 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: OC2FE
-      description: Output Compare 2 fast enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: OC2PE
-      description: Output Compare 2 preload enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: OC2M
-      description: Output Compare 2 mode.
-      bit_offset: 12
-      bit_size: 3
-    - name: OC2CE
-      description: Output Compare 2 clear enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CHCTLR2_Input:
-  description: capture/compare mode register 2 (input mode).
-  bit_size: 16
-  fields:
-    - name: CC3S
-      description: Capture/compare 3 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: IC3PSC
-      description: Input capture 3 prescaler.
-      bit_offset: 2
-      bit_size: 2
-    - name: IC3F
-      description: Input capture 3 filter.
-      bit_offset: 4
-      bit_size: 4
-    - name: CC4S
-      description: Capture/Compare 4 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: IC4PSC
-      description: Input capture 4 prescaler.
-      bit_offset: 10
-      bit_size: 2
-    - name: IC4F
-      description: Input capture 4 filter.
-      bit_offset: 12
-      bit_size: 4
-fieldset/CHCTLR2_Output:
-  description: capture/compare mode register (output mode).
-  bit_size: 16
-  fields:
-    - name: CC3S
-      description: Capture/Compare 3 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: OC3FE
-      description: Output compare 3 fast enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: OC3PE
-      description: Output compare 3 preload enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: OC3M
-      description: Output compare 3 mode.
-      bit_offset: 4
-      bit_size: 3
-    - name: OC3CE
-      description: Output compare 3 clear enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC4S
-      description: Capture/Compare 4 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: OC4FE
-      description: Output compare 4 fast enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: OC4PE
-      description: Output compare 4 preload enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: OC4M
-      description: Output compare 4 mode.
-      bit_offset: 12
-      bit_size: 3
-    - name: OC4CE
-      description: Output compare 4 clear enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CNT:
-  description: counter.
-  bit_size: 16
-  fields:
-    - name: CNT
-      description: counter value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CTLR1:
-  description: control register 1.
-  bit_size: 16
-  fields:
-    - name: CEN
-      description: Counter enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: UDIS
-      description: Update disable.
-      bit_offset: 1
-      bit_size: 1
-    - name: URS
-      description: Update request source.
-      bit_offset: 2
-      bit_size: 1
-    - name: OPM
-      description: One-pulse mode.
-      bit_offset: 3
-      bit_size: 1
-    - name: DIR
-      description: Direction.
-      bit_offset: 4
-      bit_size: 1
-    - name: CMS
-      description: Center-aligned mode selection.
-      bit_offset: 5
-      bit_size: 2
-    - name: ARPE
-      description: Auto-reload preload enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CKD
-      description: Clock division.
-      bit_offset: 8
-      bit_size: 2
-    - name: CAPOV
-      description: CAPOV.
-      bit_offset: 14
-      bit_size: 1
-    - name: CAPLVL
-      description: CAPLVL.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CTLR2:
-  description: control register 2.
-  bit_size: 16
-  fields:
-    - name: CCPC
-      description: Capture/compare preloaded control.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCUS
-      description: Capture/compare control update selection.
-      bit_offset: 2
-      bit_size: 1
-    - name: CCDS
-      description: Capture/compare DMA selection.
-      bit_offset: 3
-      bit_size: 1
-    - name: MMS
-      description: Master mode selection.
-      bit_offset: 4
-      bit_size: 3
-      enum: MASTER_MODE_SEL
-    - name: TI1S
-      description: TI1 selection.
-      bit_offset: 7
-      bit_size: 1
-    - name: OIS1
-      description: Output Idle state 1.
-      bit_offset: 8
-      bit_size: 1
-    - name: OIS1N
-      description: Output Idle state 1.
-      bit_offset: 9
-      bit_size: 1
-    - name: OIS2
-      description: Output Idle state 2.
-      bit_offset: 10
-      bit_size: 1
-    - name: OIS2N
-      description: Output Idle state 2.
-      bit_offset: 11
-      bit_size: 1
-    - name: OIS3
-      description: Output Idle state 3.
-      bit_offset: 12
-      bit_size: 1
-    - name: OIS3N
-      description: Output Idle state 3.
-      bit_offset: 13
-      bit_size: 1
-    - name: OIS4
-      description: Output Idle state 4.
-      bit_offset: 14
-      bit_size: 1
-fieldset/DMAADR:
-  description: DMA address for full transfer.
-  bit_size: 16
-  fields:
-    - name: DMAADR
-      description: DMA register for burst accesses.
-      bit_offset: 0
-      bit_size: 16
-fieldset/DMACFGR:
-  description: DMA control register.
-  bit_size: 16
-  fields:
-    - name: DBA
-      description: DMA base address.
-      bit_offset: 0
-      bit_size: 5
-    - name: DBL
-      description: DMA burst length.
-      bit_offset: 8
-      bit_size: 5
-fieldset/DMAINTENR:
-  description: DMA/Interrupt enable register.
-  bit_size: 16
-  fields:
-    - name: UIE
-      description: Update interrupt enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1IE
-      description: Capture/Compare 1 interrupt enable.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2IE
-      description: Capture/Compare 2 interrupt enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3IE
-      description: Capture/Compare 3 interrupt enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4IE
-      description: Capture/Compare 4 interrupt enable.
-      bit_offset: 4
-      bit_size: 1
-    - name: COMIE
-      description: COM interrupt enable.
-      bit_offset: 5
-      bit_size: 1
-    - name: TIE
-      description: Trigger interrupt enable.
-      bit_offset: 6
-      bit_size: 1
-    - name: BIE
-      description: Break interrupt enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: UDE
-      description: Update DMA request enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CC1DE
-      description: Capture/Compare 1 DMA request enable.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC2DE
-      description: Capture/Compare 2 DMA request enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3DE
-      description: Capture/Compare 3 DMA request enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4DE
-      description: Capture/Compare 4 DMA request enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: COMDE
-      description: COM DMA request enable.
-      bit_offset: 13
-      bit_size: 1
-    - name: TDE
-      description: Trigger DMA request enable.
-      bit_offset: 14
-      bit_size: 1
-fieldset/INTFR:
-  description: status register.
-  bit_size: 16
-  fields:
-    - name: UIF
-      description: Update interrupt flag.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1IF
-      description: Capture/compare 1 interrupt flag.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2IF
-      description: Capture/Compare 2 interrupt flag.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3IF
-      description: Capture/Compare 3 interrupt flag.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4IF
-      description: Capture/Compare 4 interrupt flag.
-      bit_offset: 4
-      bit_size: 1
-    - name: COMIF
-      description: COM interrupt flag.
-      bit_offset: 5
-      bit_size: 1
-    - name: TIF
-      description: Trigger interrupt flag.
-      bit_offset: 6
-      bit_size: 1
-    - name: BIF
-      description: Break interrupt flag.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC1OF
-      description: Capture/Compare 1 overcapture flag.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC2OF
-      description: Capture/compare 2 overcapture flag.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3OF
-      description: Capture/Compare 3 overcapture flag.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4OF
-      description: Capture/Compare 4 overcapture flag.
-      bit_offset: 12
-      bit_size: 1
-fieldset/PSC:
-  description: prescaler.
-  bit_size: 16
-  fields:
-    - name: PSC
-      description: Prescaler value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/RPTCR:
-  description: repetition counter register.
-  bit_size: 16
-  fields:
-    - name: RPTCR
-      description: Repetition counter value.
-      bit_offset: 0
-      bit_size: 8
-fieldset/SMCFGR:
-  description: slave mode control register.
-  bit_size: 16
-  fields:
-    - name: SMS
-      description: Slave mode selection.
-      bit_offset: 0
-      bit_size: 3
-    - name: TS
-      description: Trigger selection.
-      bit_offset: 4
-      bit_size: 3
-    - name: MSM
-      description: Master/Slave mode.
-      bit_offset: 7
-      bit_size: 1
-    - name: ETF
-      description: External trigger filter.
-      bit_offset: 8
-      bit_size: 4
-    - name: ETPS
-      description: External trigger prescaler.
-      bit_offset: 12
-      bit_size: 2
-    - name: ECE
-      description: External clock enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: ETP
-      description: External trigger polarity.
-      bit_offset: 15
-      bit_size: 1
-fieldset/SPEC:
-  description: SPEC.
-  bit_size: 16
-  fields:
-    - name: PWM_EN
-      description: PWM_EN.
-      bit_offset: 0
-      bit_size: 2
-    - name: PWM_OC1
-      description: PWM_OC1.
-      bit_offset: 4
-      bit_size: 1
-    - name: PWM_OC5
-      description: PWM_OC5.
-      bit_offset: 5
-      bit_size: 1
-    - name: PWM_OC3
-      description: PWM_OC3.
-      bit_offset: 6
-      bit_size: 1
-    - name: PWM_OC4
-      description: PWM_OC4.
-      bit_offset: 7
-      bit_size: 1
-    - name: TOGGLE
-      description: TOGGLE.
-      bit_offset: 15
-      bit_size: 1
-fieldset/SWEVGR:
-  description: event generation register.
-  bit_size: 16
-  fields:
-    - name: UG
-      description: Update generation.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1G
-      description: Capture/compare 1 generation.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2G
-      description: Capture/compare 2 generation.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3G
-      description: Capture/compare 3 generation.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4G
-      description: Capture/compare 4 generation.
-      bit_offset: 4
-      bit_size: 1
-    - name: COMG
-      description: Capture/Compare control update generation.
-      bit_offset: 5
-      bit_size: 1
-    - name: TG
-      description: Trigger generation.
-      bit_offset: 6
-      bit_size: 1
-    - name: BG
-      description: Break generation.
-      bit_offset: 7
-      bit_size: 1
-enum/MASTER_MODE_SEL:
-  description: Master mode selection.
-  bit_size: 3
-  variants:
-    - name: RESET
-      description: Reset.
-      value: 0
-    - name: ENABLE
-      description: Enable.
-      value: 1
-    - name: UPDATE
-      description: Update.
-      value: 2
-    - name: COMPARE_PULSE
-      description: Compare pulse.
-      value: 3
-    - name: OC1REF
-      description: OC1REF signal is used as trigger output (TRGO).
-      value: 4
-    - name: OC2REF
-      description: OC2REF signal is used as trigger output (TRGO).
-      value: 5
-    - name: OC3REF
-      description: OC3REF signal is used as trigger output (TRGO).
-      value: 6
-    - name: OC4REF
-      description: OC4REF signal is used as trigger output (TRGO).
-      value: 7
diff --git a/data/registers/bctm_v3.yaml b/data/registers/bctm_v3.yaml
deleted file mode 100644
index c318279..0000000
--- a/data/registers/bctm_v3.yaml
+++ /dev/null
@@ -1,142 +0,0 @@
-block/BCTM:
-  description: Basic timer, 16-bit auto-reloadable.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      access: Write
-      fieldset: SWEVGR
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      fieldset: CNT
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      fieldset: PSC
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      fieldset: ATRLR
-fieldset/ATRLR:
-  description: auto-reload register.
-  fields:
-    - name: ATRLR
-      description: Auto-reload value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CNT:
-  description: counter.
-  fields:
-    - name: CNT
-      description: counter value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CTLR1:
-  description: control register 1.
-  fields:
-    - name: CEN
-      description: Counter enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: UDIS
-      description: Update disable.
-      bit_offset: 1
-      bit_size: 1
-    - name: URS
-      description: Update request source.
-      bit_offset: 2
-      bit_size: 1
-    - name: OPM
-      description: One-pulse mode.
-      bit_offset: 3
-      bit_size: 1
-    - name: ARPE
-      description: Auto-reload preload enable.
-      bit_offset: 7
-      bit_size: 1
-fieldset/CTLR2:
-  description: control register 2.
-  fields:
-    - name: MMS
-      description: Master mode selection.
-      bit_offset: 4
-      bit_size: 3
-      enum: MASTER_MODE_SEL
-fieldset/DMAINTENR:
-  description: DMA/Interrupt enable register.
-  fields:
-    - name: UIE
-      description: Update interrupt enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: UDE
-      description: Update DMA request enable.
-      bit_offset: 8
-      bit_size: 1
-fieldset/INTFR:
-  description: status register.
-  fields:
-    - name: UIF
-      description: Update interrupt flag.
-      bit_offset: 0
-      bit_size: 1
-fieldset/PSC:
-  description: prescaler.
-  fields:
-    - name: PSC
-      description: Prescaler value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/SWEVGR:
-  description: event generation register.
-  fields:
-    - name: UG
-      description: Update generation.
-      bit_offset: 0
-      bit_size: 1
-enum/MASTER_MODE_SEL:
-  description: Master mode selection.
-  bit_size: 3
-  variants:
-    - name: RESET
-      description: Reset.
-      value: 0
-    - name: ENABLE
-      description: Enable.
-      value: 1
-    - name: UPDATE
-      description: Update.
-      value: 2
-    # Not available to BCTM
-    - name: COMPARE_PULSE
-      description: Compare pulse.
-      value: 3
-    - name: OC1REF
-      description: OC1REF signal is used as trigger output (TRGO).
-      value: 4
-    - name: OC2REF
-      description: OC2REF signal is used as trigger output (TRGO).
-      value: 5
-    - name: OC3REF
-      description: OC3REF signal is used as trigger output (TRGO).
-      value: 6
-    - name: OC4REF
-      description: OC4REF signal is used as trigger output (TRGO).
-      value: 7
diff --git a/data/registers/gptm32_v2.yaml b/data/registers/gptm32_v2.yaml
deleted file mode 100644
index cb69528..0000000
--- a/data/registers/gptm32_v2.yaml
+++ /dev/null
@@ -1,577 +0,0 @@
-block/GPTM32:
-  description: General purpose timer, 32bit, TIM5.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: SMCFGR
-      description: slave mode control register.
-      byte_offset: 8
-      fieldset: SMCFGR
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      access: Write
-      fieldset: SWEVGR
-    - name: CHCTLR1_Input
-      description: capture/compare mode register 1 (input mode).
-      byte_offset: 24
-      fieldset: CHCTLR1_Input
-    - name: CHCTLR1_Output
-      description: capture/compare mode register 1 (output mode).
-      byte_offset: 24
-      fieldset: CHCTLR1_Output
-    - name: CHCTLR2_Input
-      description: capture/compare mode register 2 (input mode).
-      byte_offset: 28
-      fieldset: CHCTLR2_Input
-    - name: CHCTLR2_Output
-      description: capture/compare mode register 2 (output mode).
-      byte_offset: 28
-      fieldset: CHCTLR2_Output
-    - name: CCER
-      description: capture/compare enable register.
-      byte_offset: 32
-      fieldset: CCER
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      fieldset: CNT
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      fieldset: PSC
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      fieldset: ATRLR
-    - name: CH1CVR
-      description: capture/compare register 1.
-      byte_offset: 52
-      fieldset: CH1CVR
-    - name: CH2CVR
-      description: capture/compare register 2.
-      byte_offset: 56
-      fieldset: CH2CVR
-    - name: CH3CVR
-      description: capture/compare register 3.
-      byte_offset: 60
-      fieldset: CH3CVR
-    - name: CH4CVR
-      description: capture/compare register 4.
-      byte_offset: 64
-      fieldset: CH4CVR
-    - name: DMACFGR
-      description: DMA control register.
-      byte_offset: 72
-      fieldset: DMACFGR
-    - name: DMAADR
-      description: DMA address for full transfer.
-      byte_offset: 76
-      fieldset: DMAADR
-fieldset/ATRLR:
-  description: auto-reload register.
-  fields:
-    - name: ATRLR
-      description: Auto-reload value.
-      bit_offset: 0
-      bit_size: 32
-fieldset/CCER:
-  description: capture/compare enable register.
-  fields:
-    - name: CC1E
-      description: Capture/Compare 1 output enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1P
-      description: Capture/Compare 1 output Polarity.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2E
-      description: Capture/Compare 2 output enable.
-      bit_offset: 4
-      bit_size: 1
-    - name: CC2P
-      description: Capture/Compare 2 output Polarity.
-      bit_offset: 5
-      bit_size: 1
-    - name: CC3E
-      description: Capture/Compare 3 output enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CC3P
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC4E
-      description: Capture/Compare 4 output enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: CC4P
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 13
-      bit_size: 1
-fieldset/CH1CVR:
-  description: capture/compare register 1.
-  fields:
-    - name: CH1CVR
-      description: Capture/Compare 1 value.
-      bit_offset: 0
-      bit_size: 32
-fieldset/CH2CVR:
-  description: capture/compare register 2.
-  fields:
-    - name: CH2CVR
-      description: Capture/Compare 2 value.
-      bit_offset: 0
-      bit_size: 32
-fieldset/CH3CVR:
-  description: capture/compare register 3.
-  fields:
-    - name: CH3CVR
-      description: Capture/Compare value.
-      bit_offset: 0
-      bit_size: 32
-fieldset/CH4CVR:
-  description: capture/compare register 4.
-  fields:
-    - name: CH4CVR
-      description: Capture/Compare value.
-      bit_offset: 0
-      bit_size: 32
-fieldset/CHCTLR1_Input:
-  description: capture/compare mode register 1 (input mode).
-  fields:
-    - name: CC1S
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: IC1PSC
-      description: Input capture 1 prescaler.
-      bit_offset: 2
-      bit_size: 2
-    - name: IC1F
-      description: Input capture 1 filter.
-      bit_offset: 4
-      bit_size: 4
-    - name: CC2S
-      description: Capture/compare 2 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: IC2PSC
-      description: Input capture 2 prescaler.
-      bit_offset: 10
-      bit_size: 2
-    - name: IC2F
-      description: Input capture 2 filter.
-      bit_offset: 12
-      bit_size: 4
-fieldset/CHCTLR1_Output:
-  description: capture/compare mode register 1 (output mode).
-  fields:
-    - name: CC1S
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: OC1FE
-      description: Output compare 1 fast enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: OC1PE
-      description: Output compare 1 preload enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: OC1M
-      description: Output compare 1 mode.
-      bit_offset: 4
-      bit_size: 3
-    - name: OC1CE
-      description: Output compare 1 clear enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC2S
-      description: Capture/Compare 2 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: OC2FE
-      description: Output compare 2 fast enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: OC2PE
-      description: Output compare 2 preload enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: OC2M
-      description: Output compare 2 mode.
-      bit_offset: 12
-      bit_size: 3
-    - name: OC2CE
-      description: Output compare 2 clear enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CHCTLR2_Input:
-  description: capture/compare mode register 2 (input mode).
-  fields:
-    - name: CC3S
-      description: Capture/Compare 3 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: IC3PSC
-      description: Input capture 3 prescaler.
-      bit_offset: 2
-      bit_size: 2
-    - name: IC3F
-      description: Input capture 3 filter.
-      bit_offset: 4
-      bit_size: 4
-    - name: CC4S
-      description: Capture/Compare 4 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: IC4PSC
-      description: Input capture 4 prescaler.
-      bit_offset: 10
-      bit_size: 2
-    - name: IC4F
-      description: Input capture 4 filter.
-      bit_offset: 12
-      bit_size: 4
-fieldset/CHCTLR2_Output:
-  description: capture/compare mode register 2 (output mode).
-  fields:
-    - name: CC3S
-      description: Capture/Compare 3 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: OC3FE
-      description: Output compare 3 fast enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: OC3PE
-      description: Output compare 3 preload enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: OC3M
-      description: Output compare 3 mode.
-      bit_offset: 4
-      bit_size: 3
-    - name: OC3CE
-      description: Output compare 3 clear enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC4S
-      description: Capture/Compare 4 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: OC4FE
-      description: Output compare 4 fast enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: OC4PE
-      description: Output compare 4 preload enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: OC4M
-      description: Output compare 4 mode.
-      bit_offset: 12
-      bit_size: 3
-    - name: OC4CE
-      description: Output compare 4 clear enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CNT:
-  description: counter.
-  fields:
-    - name: CNT
-      description: counter value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CTLR1:
-  description: control register 1.
-  fields:
-    - name: CEN
-      description: Counter enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: UDIS
-      description: Update disable.
-      bit_offset: 1
-      bit_size: 1
-    - name: URS
-      description: Update request source.
-      bit_offset: 2
-      bit_size: 1
-    - name: OPM
-      description: One-pulse mode.
-      bit_offset: 3
-      bit_size: 1
-    - name: DIR
-      description: Direction.
-      bit_offset: 4
-      bit_size: 1
-    - name: CMS
-      description: Center-aligned mode selection.
-      bit_offset: 5
-      bit_size: 2
-    - name: ARPE
-      description: Auto-reload preload enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CKD
-      description: Clock division.
-      bit_offset: 8
-      bit_size: 2
-fieldset/CTLR2:
-  description: control register 2.
-  fields:
-    - name: CCPC
-      description: Compare selection.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCUS
-      description: Update selection.
-      bit_offset: 2
-      bit_size: 1
-    - name: CCDS
-      description: Capture/compare DMA selection.
-      bit_offset: 3
-      bit_size: 1
-    - name: MMS
-      description: Master mode selection.
-      bit_offset: 4
-      bit_size: 3
-      enum: MASTER_MODE_SEL
-    - name: TI1S
-      description: TI1 selection.
-      bit_offset: 7
-      bit_size: 1
-fieldset/DMAADR:
-  description: DMA address for full transfer.
-  fields:
-    - name: DMAADR
-      description: DMA register for burst accesses.
-      bit_offset: 0
-      bit_size: 16
-fieldset/DMACFGR:
-  description: DMA control register.
-  fields:
-    - name: DBA
-      description: DMA base address.
-      bit_offset: 0
-      bit_size: 5
-    - name: DBL
-      description: DMA burst length.
-      bit_offset: 8
-      bit_size: 5
-fieldset/DMAINTENR:
-  description: DMA/Interrupt enable register.
-  fields:
-    - name: UIE
-      description: Update interrupt enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1IE
-      description: Capture/Compare 1 interrupt enable.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2IE
-      description: Capture/Compare 2 interrupt enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3IE
-      description: Capture/Compare 3 interrupt enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4IE
-      description: Capture/Compare 4 interrupt enable.
-      bit_offset: 4
-      bit_size: 1
-    - name: TIE
-      description: Trigger interrupt enable.
-      bit_offset: 6
-      bit_size: 1
-    - name: UDE
-      description: Update DMA request enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CC1DE
-      description: Capture/Compare 1 DMA request enable.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC2DE
-      description: Capture/Compare 2 DMA request enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3DE
-      description: Capture/Compare 3 DMA request enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4DE
-      description: Capture/Compare 4 DMA request enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: COMDE
-      description: COM DMA request enable.
-      bit_offset: 13
-      bit_size: 1
-    - name: TDE
-      description: Trigger DMA request enable.
-      bit_offset: 14
-      bit_size: 1
-fieldset/INTFR:
-  description: status register.
-  fields:
-    - name: UIF
-      description: Update interrupt flag.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1IF
-      description: Capture/compare 1 interrupt flag.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2IF
-      description: Capture/Compare 2 interrupt flag.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3IF
-      description: Capture/Compare 3 interrupt flag.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4IF
-      description: Capture/Compare 4 interrupt flag.
-      bit_offset: 4
-      bit_size: 1
-    - name: TIF
-      description: Trigger interrupt flag.
-      bit_offset: 6
-      bit_size: 1
-    - name: CC1OF
-      description: Capture/Compare 1 overcapture flag.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC2OF
-      description: Capture/compare 2 overcapture flag.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3OF
-      description: Capture/Compare 3 overcapture flag.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4OF
-      description: Capture/Compare 4 overcapture flag.
-      bit_offset: 12
-      bit_size: 1
-fieldset/PSC:
-  description: prescaler.
-  fields:
-    - name: PSC
-      description: Prescaler value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/SMCFGR:
-  description: slave mode control register.
-  fields:
-    - name: SMS
-      description: Slave mode selection.
-      bit_offset: 0
-      bit_size: 3
-    - name: TS
-      description: Trigger selection.
-      bit_offset: 4
-      bit_size: 3
-    - name: MSM
-      description: Master/Slave mode.
-      bit_offset: 7
-      bit_size: 1
-    - name: ETF
-      description: External trigger filter.
-      bit_offset: 8
-      bit_size: 4
-    - name: ETPS
-      description: External trigger prescaler.
-      bit_offset: 12
-      bit_size: 2
-    - name: ECE
-      description: External clock enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: ETP
-      description: External trigger polarity.
-      bit_offset: 15
-      bit_size: 1
-fieldset/SWEVGR:
-  description: event generation register.
-  fields:
-    - name: UG
-      description: Update generation.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1G
-      description: Capture/compare 1 generation.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2G
-      description: Capture/compare 2 generation.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3G
-      description: Capture/compare 3 generation.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4G
-      description: Capture/compare 4 generation.
-      bit_offset: 4
-      bit_size: 1
-    - name: COMG
-      description: Capture/compare generation.
-      bit_offset: 5
-      bit_size: 1
-    - name: TG
-      description: Trigger generation.
-      bit_offset: 6
-      bit_size: 1
-    - name: BG
-      description: Brake generation.
-      bit_offset: 7
-      bit_size: 1
-enum/MASTER_MODE_SEL:
-  description: Master mode selection.
-  bit_size: 3
-  variants:
-    - name: RESET
-      description: Reset.
-      value: 0
-    - name: ENABLE
-      description: Enable.
-      value: 1
-    - name: UPDATE
-      description: Update.
-      value: 2
-    - name: COMPARE_PULSE
-      description: Compare pulse.
-      value: 3
-    - name: OC1REF
-      description: OC1REF signal is used as trigger output (TRGO).
-      value: 4
-    - name: OC2REF
-      description: OC2REF signal is used as trigger output (TRGO).
-      value: 5
-    - name: OC3REF
-      description: OC3REF signal is used as trigger output (TRGO).
-      value: 6
-    - name: OC4REF
-      description: OC4REF signal is used as trigger output (TRGO).
-      value: 7
diff --git a/data/registers/gptm_v3.yaml b/data/registers/gptm_v3.yaml
deleted file mode 100644
index 0220aa2..0000000
--- a/data/registers/gptm_v3.yaml
+++ /dev/null
@@ -1,577 +0,0 @@
-block/GPTM:
-  description: General purpose timer, 16bit.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: SMCFGR
-      description: slave mode control register.
-      byte_offset: 8
-      fieldset: SMCFGR
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      access: Write
-      fieldset: SWEVGR
-    - name: CHCTLR1_Input
-      description: capture/compare mode register 1 (input mode).
-      byte_offset: 24
-      fieldset: CHCTLR1_Input
-    - name: CHCTLR1_Output
-      description: capture/compare mode register 1 (output mode).
-      byte_offset: 24
-      fieldset: CHCTLR1_Output
-    - name: CHCTLR2_Input
-      description: capture/compare mode register 2 (input mode).
-      byte_offset: 28
-      fieldset: CHCTLR2_Input
-    - name: CHCTLR2_Output
-      description: capture/compare mode register 2 (output mode).
-      byte_offset: 28
-      fieldset: CHCTLR2_Output
-    - name: CCER
-      description: capture/compare enable register.
-      byte_offset: 32
-      fieldset: CCER
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      fieldset: CNT
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      fieldset: PSC
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      fieldset: ATRLR
-    - name: CH1CVR
-      description: capture/compare register 1.
-      byte_offset: 52
-      fieldset: CH1CVR
-    - name: CH2CVR
-      description: capture/compare register 2.
-      byte_offset: 56
-      fieldset: CH2CVR
-    - name: CH3CVR
-      description: capture/compare register 3.
-      byte_offset: 60
-      fieldset: CH3CVR
-    - name: CH4CVR
-      description: capture/compare register 4.
-      byte_offset: 64
-      fieldset: CH4CVR
-    - name: DMACFGR
-      description: DMA control register.
-      byte_offset: 72
-      fieldset: DMACFGR
-    - name: DMAADR
-      description: DMA address for full transfer.
-      byte_offset: 76
-      fieldset: DMAADR
-fieldset/ATRLR:
-  description: auto-reload register.
-  fields:
-    - name: ATRLR
-      description: Auto-reload value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CCER:
-  description: capture/compare enable register.
-  fields:
-    - name: CC1E
-      description: Capture/Compare 1 output enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1P
-      description: Capture/Compare 1 output Polarity.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2E
-      description: Capture/Compare 2 output enable.
-      bit_offset: 4
-      bit_size: 1
-    - name: CC2P
-      description: Capture/Compare 2 output Polarity.
-      bit_offset: 5
-      bit_size: 1
-    - name: CC3E
-      description: Capture/Compare 3 output enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CC3P
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC4E
-      description: Capture/Compare 4 output enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: CC4P
-      description: Capture/Compare 3 output Polarity.
-      bit_offset: 13
-      bit_size: 1
-fieldset/CH1CVR:
-  description: capture/compare register 1.
-  fields:
-    - name: CH1CVR
-      description: Capture/Compare 1 value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CH2CVR:
-  description: capture/compare register 2.
-  fields:
-    - name: CH2CVR
-      description: Capture/Compare 2 value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CH3CVR:
-  description: capture/compare register 3.
-  fields:
-    - name: CH3CVR
-      description: Capture/Compare value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CH4CVR:
-  description: capture/compare register 4.
-  fields:
-    - name: CH4CVR
-      description: Capture/Compare value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CHCTLR1_Input:
-  description: capture/compare mode register 1 (input mode).
-  fields:
-    - name: CC1S
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: IC1PSC
-      description: Input capture 1 prescaler.
-      bit_offset: 2
-      bit_size: 2
-    - name: IC1F
-      description: Input capture 1 filter.
-      bit_offset: 4
-      bit_size: 4
-    - name: CC2S
-      description: Capture/compare 2 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: IC2PSC
-      description: Input capture 2 prescaler.
-      bit_offset: 10
-      bit_size: 2
-    - name: IC2F
-      description: Input capture 2 filter.
-      bit_offset: 12
-      bit_size: 4
-fieldset/CHCTLR1_Output:
-  description: capture/compare mode register 1 (output mode).
-  fields:
-    - name: CC1S
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: OC1FE
-      description: Output compare 1 fast enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: OC1PE
-      description: Output compare 1 preload enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: OC1M
-      description: Output compare 1 mode.
-      bit_offset: 4
-      bit_size: 3
-    - name: OC1CE
-      description: Output compare 1 clear enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC2S
-      description: Capture/Compare 2 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: OC2FE
-      description: Output compare 2 fast enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: OC2PE
-      description: Output compare 2 preload enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: OC2M
-      description: Output compare 2 mode.
-      bit_offset: 12
-      bit_size: 3
-    - name: OC2CE
-      description: Output compare 2 clear enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CHCTLR2_Input:
-  description: capture/compare mode register 2 (input mode).
-  fields:
-    - name: CC3S
-      description: Capture/Compare 3 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: IC3PSC
-      description: Input capture 3 prescaler.
-      bit_offset: 2
-      bit_size: 2
-    - name: IC3F
-      description: Input capture 3 filter.
-      bit_offset: 4
-      bit_size: 4
-    - name: CC4S
-      description: Capture/Compare 4 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: IC4PSC
-      description: Input capture 4 prescaler.
-      bit_offset: 10
-      bit_size: 2
-    - name: IC4F
-      description: Input capture 4 filter.
-      bit_offset: 12
-      bit_size: 4
-fieldset/CHCTLR2_Output:
-  description: capture/compare mode register 2 (output mode).
-  fields:
-    - name: CC3S
-      description: Capture/Compare 3 selection.
-      bit_offset: 0
-      bit_size: 2
-    - name: OC3FE
-      description: Output compare 3 fast enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: OC3PE
-      description: Output compare 3 preload enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: OC3M
-      description: Output compare 3 mode.
-      bit_offset: 4
-      bit_size: 3
-    - name: OC3CE
-      description: Output compare 3 clear enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CC4S
-      description: Capture/Compare 4 selection.
-      bit_offset: 8
-      bit_size: 2
-    - name: OC4FE
-      description: Output compare 4 fast enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: OC4PE
-      description: Output compare 4 preload enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: OC4M
-      description: Output compare 4 mode.
-      bit_offset: 12
-      bit_size: 3
-    - name: OC4CE
-      description: Output compare 4 clear enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CNT:
-  description: counter.
-  fields:
-    - name: CNT
-      description: counter value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/CTLR1:
-  description: control register 1.
-  fields:
-    - name: CEN
-      description: Counter enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: UDIS
-      description: Update disable.
-      bit_offset: 1
-      bit_size: 1
-    - name: URS
-      description: Update request source.
-      bit_offset: 2
-      bit_size: 1
-    - name: OPM
-      description: One-pulse mode.
-      bit_offset: 3
-      bit_size: 1
-    - name: DIR
-      description: Direction.
-      bit_offset: 4
-      bit_size: 1
-    - name: CMS
-      description: Center-aligned mode selection.
-      bit_offset: 5
-      bit_size: 2
-    - name: ARPE
-      description: Auto-reload preload enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CKD
-      description: Clock division.
-      bit_offset: 8
-      bit_size: 2
-fieldset/CTLR2:
-  description: control register 2.
-  fields:
-    - name: CCPC
-      description: Compare selection.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCUS
-      description: Update selection.
-      bit_offset: 2
-      bit_size: 1
-    - name: CCDS
-      description: Capture/compare DMA selection.
-      bit_offset: 3
-      bit_size: 1
-    - name: MMS
-      description: Master mode selection.
-      bit_offset: 4
-      bit_size: 3
-      enum: MASTER_MODE_SEL
-    - name: TI1S
-      description: TI1 selection.
-      bit_offset: 7
-      bit_size: 1
-fieldset/DMAADR:
-  description: DMA address for full transfer.
-  fields:
-    - name: DMAADR
-      description: DMA register for burst accesses.
-      bit_offset: 0
-      bit_size: 16
-fieldset/DMACFGR:
-  description: DMA control register.
-  fields:
-    - name: DBA
-      description: DMA base address.
-      bit_offset: 0
-      bit_size: 5
-    - name: DBL
-      description: DMA burst length.
-      bit_offset: 8
-      bit_size: 5
-fieldset/DMAINTENR:
-  description: DMA/Interrupt enable register.
-  fields:
-    - name: UIE
-      description: Update interrupt enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1IE
-      description: Capture/Compare 1 interrupt enable.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2IE
-      description: Capture/Compare 2 interrupt enable.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3IE
-      description: Capture/Compare 3 interrupt enable.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4IE
-      description: Capture/Compare 4 interrupt enable.
-      bit_offset: 4
-      bit_size: 1
-    - name: TIE
-      description: Trigger interrupt enable.
-      bit_offset: 6
-      bit_size: 1
-    - name: UDE
-      description: Update DMA request enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CC1DE
-      description: Capture/Compare 1 DMA request enable.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC2DE
-      description: Capture/Compare 2 DMA request enable.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3DE
-      description: Capture/Compare 3 DMA request enable.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4DE
-      description: Capture/Compare 4 DMA request enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: COMDE
-      description: COM DMA request enable.
-      bit_offset: 13
-      bit_size: 1
-    - name: TDE
-      description: Trigger DMA request enable.
-      bit_offset: 14
-      bit_size: 1
-fieldset/INTFR:
-  description: status register.
-  fields:
-    - name: UIF
-      description: Update interrupt flag.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1IF
-      description: Capture/compare 1 interrupt flag.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2IF
-      description: Capture/Compare 2 interrupt flag.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3IF
-      description: Capture/Compare 3 interrupt flag.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4IF
-      description: Capture/Compare 4 interrupt flag.
-      bit_offset: 4
-      bit_size: 1
-    - name: TIF
-      description: Trigger interrupt flag.
-      bit_offset: 6
-      bit_size: 1
-    - name: CC1OF
-      description: Capture/Compare 1 overcapture flag.
-      bit_offset: 9
-      bit_size: 1
-    - name: CC2OF
-      description: Capture/compare 2 overcapture flag.
-      bit_offset: 10
-      bit_size: 1
-    - name: CC3OF
-      description: Capture/Compare 3 overcapture flag.
-      bit_offset: 11
-      bit_size: 1
-    - name: CC4OF
-      description: Capture/Compare 4 overcapture flag.
-      bit_offset: 12
-      bit_size: 1
-fieldset/PSC:
-  description: prescaler.
-  fields:
-    - name: PSC
-      description: Prescaler value.
-      bit_offset: 0
-      bit_size: 16
-fieldset/SMCFGR:
-  description: slave mode control register.
-  fields:
-    - name: SMS
-      description: Slave mode selection.
-      bit_offset: 0
-      bit_size: 3
-    - name: TS
-      description: Trigger selection.
-      bit_offset: 4
-      bit_size: 3
-    - name: MSM
-      description: Master/Slave mode.
-      bit_offset: 7
-      bit_size: 1
-    - name: ETF
-      description: External trigger filter.
-      bit_offset: 8
-      bit_size: 4
-    - name: ETPS
-      description: External trigger prescaler.
-      bit_offset: 12
-      bit_size: 2
-    - name: ECE
-      description: External clock enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: ETP
-      description: External trigger polarity.
-      bit_offset: 15
-      bit_size: 1
-fieldset/SWEVGR:
-  description: event generation register.
-  fields:
-    - name: UG
-      description: Update generation.
-      bit_offset: 0
-      bit_size: 1
-    - name: CC1G
-      description: Capture/compare 1 generation.
-      bit_offset: 1
-      bit_size: 1
-    - name: CC2G
-      description: Capture/compare 2 generation.
-      bit_offset: 2
-      bit_size: 1
-    - name: CC3G
-      description: Capture/compare 3 generation.
-      bit_offset: 3
-      bit_size: 1
-    - name: CC4G
-      description: Capture/compare 4 generation.
-      bit_offset: 4
-      bit_size: 1
-    - name: COMG
-      description: Capture/compare generation.
-      bit_offset: 5
-      bit_size: 1
-    - name: TG
-      description: Trigger generation.
-      bit_offset: 6
-      bit_size: 1
-    - name: BG
-      description: Brake generation.
-      bit_offset: 7
-      bit_size: 1
-enum/MASTER_MODE_SEL:
-  description: Master mode selection.
-  bit_size: 3
-  variants:
-    - name: RESET
-      description: Reset.
-      value: 0
-    - name: ENABLE
-      description: Enable.
-      value: 1
-    - name: UPDATE
-      description: Update.
-      value: 2
-    - name: COMPARE_PULSE
-      description: Compare pulse.
-      value: 3
-    - name: OC1REF
-      description: OC1REF signal is used as trigger output (TRGO).
-      value: 4
-    - name: OC2REF
-      description: OC2REF signal is used as trigger output (TRGO).
-      value: 5
-    - name: OC3REF
-      description: OC3REF signal is used as trigger output (TRGO).
-      value: 6
-    - name: OC4REF
-      description: OC4REF signal is used as trigger output (TRGO).
-      value: 7
diff --git a/data/registers/timer_common.yaml b/data/registers/timer_common.yaml
deleted file mode 100644
index 1a43471..0000000
--- a/data/registers/timer_common.yaml
+++ /dev/null
@@ -1,864 +0,0 @@
-block/ADTM:
-  description: Advanced timer.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: SMCFGR
-      description: slave mode control register.
-      byte_offset: 8
-      fieldset: SMCFGR
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      fieldset: SWEVGR
-    - name: CHCTLR_Input
-      description: capture/compare mode register 1 (input mode).
-      array:
-        len: 2
-        stride: 4
-      byte_offset: 24
-      fieldset: CHCTLR_Input
-    - name: CHCTLR_Output
-      description: capture/compare mode register (output mode).
-      array:
-        len: 2
-        stride: 4
-      byte_offset: 24
-      fieldset: CHCTLR_Output
-    - name: CCER
-      description: capture/compare enable register.
-      byte_offset: 32
-      fieldset: CCER
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      bit_size: 16
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      bit_size: 16
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      bit_size: 16
-    - name: RPTCR
-      description: repetition counter register.
-      byte_offset: 48
-      fieldset: RPTCR
-    - name: CHCVR
-      description: capture/compare register 1.
-      array:
-        len: 4
-        stride: 4
-      byte_offset: 52
-      bit_size: 16
-    - name: BDTR
-      description: break and dead-time register.
-      byte_offset: 68
-      fieldset: BDTR
-    - name: DMACFGR
-      description: DMA control register.
-      byte_offset: 72
-      fieldset: DMACFGR
-    - name: DMAADR
-      description: DMA address for full transfer.
-      byte_offset: 76
-      fieldset: DMAADR
-    - name: SPEC
-      description: SPEC.
-      byte_offset: 80
-      bit_size: 16
-      fieldset: SPEC
-block/GPTM:
-  description: General purpose timer, 16bit.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: SMCFGR
-      description: slave mode control register.
-      byte_offset: 8
-      fieldset: SMCFGR
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      fieldset: SWEVGR
-    - name: CHCTLR_Input
-      description: capture/compare mode register 1 (input mode).
-      array:
-        len: 2
-        stride: 4
-      byte_offset: 24
-      fieldset: CHCTLR_Input
-    - name: CHCTLR_Output
-      description: capture/compare mode register 1 (output mode).
-      array:
-        len: 2
-        stride: 4
-      byte_offset: 24
-      fieldset: CHCTLR_Output
-    - name: CCER
-      description: capture/compare enable register.
-      byte_offset: 32
-      fieldset: CCER
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      bit_size: 16
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      bit_size: 16
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      bit_size: 16
-    - name: CHCVR
-      description: capture/compare register 1.
-      array:
-        len: 4
-        stride: 4
-      byte_offset: 52
-      bit_size: 16
-    - name: DMACFGR
-      description: DMA control register.
-      byte_offset: 72
-      fieldset: DMACFGR
-    - name: DMAADR
-      description: DMA address for full transfer.
-      byte_offset: 76
-      fieldset: DMAADR
-block/GPTM32:
-  description: General purpose timer, 32bit.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: SMCFGR
-      description: slave mode control register.
-      byte_offset: 8
-      fieldset: SMCFGR
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      fieldset: SWEVGR
-    - name: CHCTLR_Input
-      description: capture/compare mode register 1 (input mode).
-      array:
-        len: 2
-        stride: 4
-      byte_offset: 24
-      fieldset: CHCTLR_Input
-    - name: CHCTLR_Output
-      description: capture/compare mode register 1 (output mode).
-      array:
-        len: 2
-        stride: 4
-      byte_offset: 24
-      fieldset: CHCTLR_Output
-    - name: CCER
-      description: capture/compare enable register.
-      byte_offset: 32
-      fieldset: CCER
-    - name: CNT
-      description: counter, 32bit.
-      byte_offset: 36
-      bit_size: 32
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      bit_size: 16
-    - name: ATRLR
-      description: auto-reload register, 32bit.
-      byte_offset: 44
-      bit_size: 32
-    - name: CHCVR
-      description: capture/compare register, 32bit.
-      array:
-        len: 4
-        stride: 4
-      byte_offset: 52
-      bit_size: 32
-    - name: DMACFGR
-      description: DMA control register.
-      byte_offset: 72
-      fieldset: DMACFGR
-    - name: DMAADR
-      description: DMA address for full transfer.
-      byte_offset: 76
-      fieldset: DMAADR
-block/BCTM:
-  description: Basic timer.
-  items:
-    - name: CTLR1
-      description: control register 1.
-      byte_offset: 0
-      fieldset: CTLR1
-    - name: CTLR2
-      description: control register 2.
-      byte_offset: 4
-      fieldset: CTLR2
-    - name: DMAINTENR
-      description: DMA/Interrupt enable register.
-      byte_offset: 12
-      fieldset: DMAINTENR
-    - name: INTFR
-      description: status register.
-      byte_offset: 16
-      fieldset: INTFR
-    - name: SWEVGR
-      description: event generation register.
-      byte_offset: 20
-      fieldset: SWEVGR
-    - name: CNT
-      description: counter.
-      byte_offset: 36
-      bit_size: 16
-    - name: PSC
-      description: prescaler.
-      byte_offset: 40
-      bit_size: 16
-    - name: ATRLR
-      description: auto-reload register.
-      byte_offset: 44
-      bit_size: 16
-fieldset/BDTR:
-  description: break and dead-time register.
-  fields:
-    - name: DTG
-      description: Dead-time generator setup.
-      bit_offset: 0
-      bit_size: 8
-    - name: LOCK
-      description: Lock configuration.
-      bit_offset: 8
-      bit_size: 2
-    - name: OSSI
-      description: Off-state selection for Idle mode.
-      bit_offset: 10
-      bit_size: 1
-    - name: OSSR
-      description: Off-state selection for Run mode.
-      bit_offset: 11
-      bit_size: 1
-    - name: BKE
-      description: Break enable.
-      bit_offset: 12
-      bit_size: 1
-    - name: BKP
-      description: Break polarity.
-      bit_offset: 13
-      bit_size: 1
-    - name: AOE
-      description: Automatic output enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: MOE
-      description: Main output enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CCER:
-  description: capture/compare enable register.
-  fields:
-    - name: CCE
-      description: Capture/Compare 1 output enable.
-      bit_offset: 0
-      bit_size: 1
-      array:
-        len: 4
-        stride: 4
-    - name: CCP
-      description: Capture/Compare 1 output Polarity.
-      bit_offset: 1
-      bit_size: 1
-      array:
-        len: 4
-        stride: 4
-    - name: CCNE
-      description: Capture/Compare 1 complementary output enable.
-      bit_offset: 2
-      bit_size: 1
-      array:
-        len: 3
-        stride: 4
-    - name: CCNP
-      description: Capture/Compare 1 output Polarity.
-      bit_offset: 3
-      bit_size: 1
-      array:
-        len: 3
-        stride: 4
-fieldset/CHCTLR_Input:
-  description: capture/compare mode register 1 (input mode).
-  fields:
-    - name: CCS
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-      array:
-        len: 2
-        stride: 8
-      enum: CCMR_Input_CCS
-    - name: ICPSC
-      description: Input capture 1 prescaler.
-      bit_offset: 2
-      bit_size: 2
-      array:
-        len: 2
-        stride: 8
-    - name: ICF
-      description: Input capture 1 filter.
-      bit_offset: 4
-      bit_size: 4
-      array:
-        len: 2
-        stride: 8
-      enum: FilterValue
-fieldset/CHCTLR_Output:
-  description: capture/compare mode register (output mode).
-  fields:
-    - name: CCS
-      description: Capture/Compare 1 selection.
-      bit_offset: 0
-      bit_size: 2
-      array:
-        len: 2
-        stride: 8
-      enum: CCMR_Output_CCS
-    - name: IOCFE
-      description: Output Compare 1 fast enable.
-      bit_offset: 2
-      bit_size: 1
-      array:
-        len: 2
-        stride: 8
-    - name: OCPE
-      description: Output Compare 1 preload enable.
-      bit_offset: 3
-      bit_size: 1
-      array:
-        len: 2
-        stride: 8
-    - name: OCM
-      description: Output Compare 1 mode.
-      bit_offset: 4
-      bit_size: 3
-      array:
-        len: 2
-        stride: 8
-      enum: OCM
-    - name: OCCE
-      description: Output Compare 1 clear enable.
-      bit_offset: 7
-      bit_size: 1
-      array:
-        len: 2
-        stride: 8
-fieldset/CTLR1:
-  description: control register 1.
-  fields:
-    - name: CEN
-      description: Counter enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: UDIS
-      description: Update disable.
-      bit_offset: 1
-      bit_size: 1
-    - name: URS
-      description: Update request source.
-      bit_offset: 2
-      bit_size: 1
-      enum: URS
-    - name: OPM
-      description: One-pulse mode.
-      bit_offset: 3
-      bit_size: 1
-    - name: DIR
-      description: Direction.
-      bit_offset: 4
-      bit_size: 1
-      enum: DIR
-    - name: CMS
-      description: Center-aligned mode selection.
-      bit_offset: 5
-      bit_size: 2
-      enum: CMS
-    - name: ARPE
-      description: Auto-reload preload enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: CKD
-      description: Clock division.
-      bit_offset: 8
-      bit_size: 2
-      enum: CKD
-    - name: CAPOV
-      description: Timer capture value configuration enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: CAPLVL
-      description: Timer capture level indication enable.
-      bit_offset: 15
-      bit_size: 1
-fieldset/CTLR2:
-  description: control register 2.
-  fields:
-    - name: CCPC
-      description: Capture/compare preloaded control.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCUS
-      description: Capture/compare control update selection.
-      bit_offset: 2
-      bit_size: 1
-    - name: CCDS
-      description: Capture/compare DMA selection.
-      bit_offset: 3
-      bit_size: 1
-      enum: CCDS
-    - name: MMS
-      description: Master mode selection.
-      bit_offset: 4
-      bit_size: 3
-      enum: MMS
-    - name: TI1S
-      description: TI1 selection.
-      bit_offset: 7
-      bit_size: 1
-    - name: OIS
-      description: Output Idle state 1.
-      bit_offset: 8
-      bit_size: 1
-      array:
-        len: 4
-        stride: 2
-    - name: OISN
-      description: Output Idle state 1.
-      bit_offset: 9
-      bit_size: 1
-      array:
-        len: 3
-        stride: 2
-fieldset/DMAADR:
-  description: DMA address for full transfer.
-  fields:
-    - name: DMAADR
-      description: DMA register for burst accesses.
-      bit_offset: 0
-      bit_size: 16
-fieldset/DMACFGR:
-  description: DMA control register.
-  fields:
-    - name: DBA
-      description: DMA base address.
-      bit_offset: 0
-      bit_size: 5
-    - name: DBL
-      description: DMA burst length.
-      bit_offset: 8
-      bit_size: 5
-fieldset/DMAINTENR:
-  description: DMA/Interrupt enable register.
-  fields:
-    - name: UIE
-      description: Update interrupt enable.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCIE
-      description: Capture/Compare 1 interrupt enable.
-      bit_offset: 1
-      bit_size: 1
-      array:
-        len: 4
-        stride: 1
-    - name: COMIE
-      description: COM interrupt enable.
-      bit_offset: 5
-      bit_size: 1
-    - name: TIE
-      description: Trigger interrupt enable.
-      bit_offset: 6
-      bit_size: 1
-    - name: BIE
-      description: Break interrupt enable.
-      bit_offset: 7
-      bit_size: 1
-    - name: UDE
-      description: Update DMA request enable.
-      bit_offset: 8
-      bit_size: 1
-    - name: CCDE
-      description: Capture/Compare 1 DMA request enable.
-      bit_offset: 9
-      bit_size: 1
-      array:
-        len: 4
-        stride: 1
-    - name: COMDE
-      description: COM DMA request enable.
-      bit_offset: 13
-      bit_size: 1
-    - name: TDE
-      description: Trigger DMA request enable.
-      bit_offset: 14
-      bit_size: 1
-fieldset/INTFR:
-  description: status register.
-  fields:
-    - name: UIF
-      description: Update interrupt flag.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCIF
-      description: Capture/compare 1 interrupt flag.
-      bit_offset: 1
-      bit_size: 1
-      array:
-        len: 4
-        stride: 1
-    - name: COMIF
-      description: COM interrupt flag.
-      bit_offset: 5
-      bit_size: 1
-    - name: TIF
-      description: Trigger interrupt flag.
-      bit_offset: 6
-      bit_size: 1
-    - name: BIF
-      description: Break interrupt flag.
-      bit_offset: 7
-      bit_size: 1
-    - name: CCOF
-      description: Capture/Compare 1 overcapture flag.
-      bit_offset: 9
-      bit_size: 1
-      array:
-        len: 4
-        stride: 1
-fieldset/RPTCR:
-  description: repetition counter register.
-  fields:
-    - name: RPTCR
-      description: Repetition counter value.
-      bit_offset: 0
-      bit_size: 8
-fieldset/SMCFGR:
-  description: slave mode control register.
-  fields:
-    - name: SMS
-      description: Slave mode selection.
-      bit_offset: 0
-      bit_size: 3
-    - name: TS
-      description: Trigger selection.
-      bit_offset: 4
-      bit_size: 3
-    - name: MSM
-      description: Master/Slave mode.
-      bit_offset: 7
-      bit_size: 1
-    - name: ETF
-      description: External trigger filter.
-      bit_offset: 8
-      bit_size: 4
-    - name: ETPS
-      description: External trigger prescaler.
-      bit_offset: 12
-      bit_size: 2
-      enum: ETPS
-    - name: ECE
-      description: External clock enable.
-      bit_offset: 14
-      bit_size: 1
-    - name: ETP
-      description: External trigger polarity.
-      bit_offset: 15
-      bit_size: 1
-fieldset/SWEVGR:
-  description: event generation register.
-  fields:
-    - name: UG
-      description: Update generation.
-      bit_offset: 0
-      bit_size: 1
-    - name: CCG
-      description: Capture/compare 1 generation.
-      bit_offset: 1
-      bit_size: 1
-      array:
-        len: 4
-        stride: 1
-    - name: COMG
-      description: Capture/Compare control update generation.
-      bit_offset: 5
-      bit_size: 1
-    - name: TG
-      description: Trigger generation.
-      bit_offset: 6
-      bit_size: 1
-    - name: BG
-      description: Break generation.
-      bit_offset: 7
-      bit_size: 1
-fieldset/SPEC:
-  description: SPEC.
-  bit_size: 16
-  fields:
-    - name: TOGGLE
-      description: TOGGLE.
-      bit_offset: 15
-      bit_size: 1
-    - name: PWM_EN
-      description: 通道 1 和通道 2 交替使能功能使能位.
-      bit_offset: 0
-      bit_size: 1
-      array:
-        len: 2
-        stride: 1
-    - name: PWM_OC
-      description: 交替使能模式下，通道 1 无效电平配置.
-      bit_offset: 4
-      bit_size: 1
-      array:
-        len: 4
-        stride: 1
-
-enum/CCMR_Input_CCS:
-  bit_size: 2
-  variants:
-    - name: TI4
-      description: "CCx channel is configured as input, normal mapping: ICx mapped to TIx"
-      value: 1
-    - name: TI3
-      description: CCx channel is configured as input, alternate mapping (switches 1 with 2, 3 with 4)
-      value: 2
-    - name: TRC
-      description: CCx channel is configured as input, ICx is mapped on TRC
-      value: 3
-enum/CCMR_Output_CCS:
-  bit_size: 2
-  variants:
-    - name: Output
-      description: CCx channel is configured as output
-      value: 0
-enum/CKD:
-  bit_size: 2
-  description: division ratio between the timer clock (CK_INT) frequency, the dead time and the sampling clock used by the dead time generator and the digital filter (ETR,TIx)
-  variants:
-    - name: Div_1
-      description: Tdts=Tck_int
-      value: 0b00
-    - name: Div_2
-      description: Tdts=2*Tck_int
-      value: 0b01
-    - name: Div_4
-      description: Tdts=4*Tck_int
-      value: 0b10
-    - name: Reserved
-      value: 0b11
-enum/FilterValue:
-  bit_size: 4
-  variants:
-    - name: NoFilter
-      description: No filter, sampling is done at fDTS
-      value: 0
-    - name: FCK_INT_N2
-      description: fSAMPLING=fCK_INT, N=2
-      value: 1
-    - name: FCK_INT_N4
-      description: fSAMPLING=fCK_INT, N=4
-      value: 2
-    - name: FCK_INT_N8
-      description: fSAMPLING=fCK_INT, N=8
-      value: 3
-    - name: FDTS_Div2_N6
-      description: fSAMPLING=fDTS/2, N=6
-      value: 4
-    - name: FDTS_Div2_N8
-      description: fSAMPLING=fDTS/2, N=8
-      value: 5
-    - name: FDTS_Div4_N6
-      description: fSAMPLING=fDTS/4, N=6
-      value: 6
-    - name: FDTS_Div4_N8
-      description: fSAMPLING=fDTS/4, N=8
-      value: 7
-    - name: FDTS_Div8_N6
-      description: fSAMPLING=fDTS/8, N=6
-      value: 8
-    - name: FDTS_Div8_N8
-      description: fSAMPLING=fDTS/8, N=8
-      value: 9
-    - name: FDTS_Div16_N5
-      description: fSAMPLING=fDTS/16, N=5
-      value: 10
-    - name: FDTS_Div16_N6
-      description: fSAMPLING=fDTS/16, N=6
-      value: 11
-    - name: FDTS_Div16_N8
-      description: fSAMPLING=fDTS/16, N=8
-      value: 12
-    - name: FDTS_Div32_N5
-      description: fSAMPLING=fDTS/32, N=5
-      value: 13
-    - name: FDTS_Div32_N6
-      description: fSAMPLING=fDTS/32, N=6
-      value: 14
-    - name: FDTS_Div32_N8
-      description: fSAMPLING=fDTS/32, N=8
-      value: 15
-enum/OCM:
-  bit_size: 3
-  variants:
-    - name: Frozen
-      description: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs
-      value: 0
-    - name: ActiveOnMatch
-      description: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register
-      value: 1
-    - name: InactiveOnMatch
-      description: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register
-      value: 2
-    - name: Toggle
-      description: OCyREF toggles when TIMx_CNT=TIMx_CCRy
-      value: 3
-    - name: ForceInactive
-      description: OCyREF is forced low
-      value: 4
-    - name: ForceActive
-      description: OCyREF is forced high
-      value: 5
-    - name: PwmMode1
-      description: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active
-      value: 6
-    - name: PwmMode2
-      description: Inversely to PwmMode1
-      value: 7
-enum/CMS:
-  bit_size: 2
-  variants:
-    - name: EdgeAligned
-      description: The counter counts up or down depending on the direction bit
-      value: 0
-    - name: CenterAligned1
-      description: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down.
-      value: 1
-    - name: CenterAligned2
-      description: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up.
-      value: 2
-    - name: CenterAligned3
-      description: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down.
-      value: 3
-enum/DIR:
-  bit_size: 1
-  variants:
-    - name: Up
-      description: Counter used as upcounter
-      value: 0
-    - name: Down
-      description: Counter used as downcounter
-      value: 1
-enum/URS:
-  bit_size: 1
-  variants:
-    - name: AnyEvent
-      description: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request
-      value: 0
-    - name: CounterOnly
-      description: Only counter overflow/underflow generates an update interrupt or DMA request
-      value: 1
-enum/CCDS:
-  bit_size: 1
-  variants:
-    - name: OnCompare
-      description: CCx DMA request sent when CCx event occurs
-      value: 0
-    - name: OnUpdate
-      description: CCx DMA request sent when update event occurs
-      value: 1
-
-enum/MMS:
-  bit_size: 3
-  description: Master mode selection.
-  variants:
-    - name: Reset
-      description: Reset
-      value: 0b000
-    - name: Enable
-      description: Enable
-      value: 0b001
-    - name: Update
-      description: Update
-      value: 0b010
-    - name: Compare_Pulse
-      description: Compare Pulse
-      value: 0b011
-    - name: Compare_OC1REF
-      description: Compare OC1REF
-      value: 0b100
-    - name: Compare_OC2REF
-      description: Compare OC2REF
-      value: 0b101
-    - name: Compare_OC3REF
-      description: Compare OC3REF
-      value: 0b110
-    - name: Compare_OC4REF
-      description: Compare OC4REF
-      value: 0b111
-enum/ETPS:
-  bit_size: 2
-  description: External trigger prescaler.
-  variants:
-    - name: Div_1
-      description: ETRP frequency divided by 1
-      value: 0b00
-    - name: Div_2
-      description: ETRP frequency divided by 2
-      value: 0b01
-    - name: Div_4
-      description: ETRP frequency divided by 4
-      value: 0b10
-    - name: Div_8
-      description: ETRP frequency divided by 8
-      value: 0b11