diff --git a/data/chips/CH32V103C6T6.yaml b/data/chips/CH32V103C6T6.yaml index f036ce2..a11dbb5 100644 --- a/data/chips/CH32V103C6T6.yaml +++ b/data/chips/CH32V103C6T6.yaml @@ -31,7 +31,8 @@ cores: - "../family/CH32V1.yaml" - "../peripherals/FV2x_V3x_I2C1.yaml" - "../peripherals/FV2x_V3x_SPI1.yaml" - - "../peripherals/V103_GP16_TIM23.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" + - "../peripherals/V1x_GP16_TIM23.yaml" include_interrupts: "../interrupts/CH32V1.yaml" include_dma_channels: DMA1: "../dma/CH32V103.yaml" diff --git a/data/chips/CH32V103C8T6.yaml b/data/chips/CH32V103C8T6.yaml index 78d6c81..f958a58 100644 --- a/data/chips/CH32V103C8T6.yaml +++ b/data/chips/CH32V103C8T6.yaml @@ -33,6 +33,7 @@ cores: - "../peripherals/FV2x_V3x_I2C2.yaml" - "../peripherals/FV2x_V3x_SPI1.yaml" - "../peripherals/FV2x_V3x_SPI2.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" include_interrupts: "../interrupts/CH32V1.yaml" include_dma_channels: diff --git a/data/chips/CH32V103C8U6.yaml b/data/chips/CH32V103C8U6.yaml index 6e925d7..9d460fb 100644 --- a/data/chips/CH32V103C8U6.yaml +++ b/data/chips/CH32V103C8U6.yaml @@ -33,6 +33,7 @@ cores: - "../peripherals/FV2x_V3x_I2C2.yaml" - "../peripherals/FV2x_V3x_SPI1.yaml" - "../peripherals/FV2x_V3x_SPI2.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" include_interrupts: "../interrupts/CH32V1.yaml" include_dma_channels: diff --git a/data/chips/CH32V103R8T6.yaml b/data/chips/CH32V103R8T6.yaml index ba55903..b18b443 100644 --- a/data/chips/CH32V103R8T6.yaml +++ b/data/chips/CH32V103R8T6.yaml @@ -33,6 +33,7 @@ cores: - "../peripherals/FV2x_V3x_I2C2.yaml" - "../peripherals/FV2x_V3x_SPI1.yaml" - "../peripherals/FV2x_V3x_SPI2.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" include_interrupts: "../interrupts/CH32V1.yaml" include_dma_channels: diff --git a/data/chips/CH32V203F6P6.yaml b/data/chips/CH32V203F6P6.yaml index 5006ddf..04ce16e 100644 --- a/data/chips/CH32V203F6P6.yaml +++ b/data/chips/CH32V203F6P6.yaml @@ -30,7 +30,7 @@ cores: include_peripherals: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203F8P6.yaml b/data/chips/CH32V203F8P6.yaml index 1a34b65..68b6083 100644 --- a/data/chips/CH32V203F8P6.yaml +++ b/data/chips/CH32V203F8P6.yaml @@ -31,7 +31,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203F8U6.yaml b/data/chips/CH32V203F8U6.yaml index 4c5dda8..cbf7fcf 100644 --- a/data/chips/CH32V203F8U6.yaml +++ b/data/chips/CH32V203F8U6.yaml @@ -31,7 +31,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203G6U6.yaml b/data/chips/CH32V203G6U6.yaml index 5cb6898..fe6c735 100644 --- a/data/chips/CH32V203G6U6.yaml +++ b/data/chips/CH32V203G6U6.yaml @@ -31,7 +31,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203G8R6.yaml b/data/chips/CH32V203G8R6.yaml index edb09c0..c5169f7 100644 --- a/data/chips/CH32V203G8R6.yaml +++ b/data/chips/CH32V203G8R6.yaml @@ -31,7 +31,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203K6T6.yaml b/data/chips/CH32V203K6T6.yaml index 3c078f4..19ddbc0 100644 --- a/data/chips/CH32V203K6T6.yaml +++ b/data/chips/CH32V203K6T6.yaml @@ -31,7 +31,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203K8T6.yaml b/data/chips/CH32V203K8T6.yaml index 9614621..4020ac1 100644 --- a/data/chips/CH32V203K8T6.yaml +++ b/data/chips/CH32V203K8T6.yaml @@ -31,7 +31,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" - "../peripherals/FV2x_V3x_ADC2.yaml" diff --git a/data/chips/CH32V203RBT6.yaml b/data/chips/CH32V203RBT6.yaml index 0d81354..c6ea941 100644 --- a/data/chips/CH32V203RBT6.yaml +++ b/data/chips/CH32V203RBT6.yaml @@ -35,7 +35,7 @@ cores: - "../peripherals/FV2x_V3x_USART2.yaml" - "../peripherals/FV2x_V3x_USART3.yaml" - "../peripherals/FV2x_V3x_USART4.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_GP32_TIM5.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" diff --git a/data/chips/CH32V208CBU6.yaml b/data/chips/CH32V208CBU6.yaml index 71e813b..5a2d66b 100644 --- a/data/chips/CH32V208CBU6.yaml +++ b/data/chips/CH32V208CBU6.yaml @@ -36,7 +36,7 @@ cores: - "../peripherals/FV2x_V3x_USART2.yaml" - "../peripherals/FV2x_V3x_USART3.yaml" - "../peripherals/FV2x_V3x_USART4.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_GP32_TIM5.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" diff --git a/data/chips/CH32V208GBU6.yaml b/data/chips/CH32V208GBU6.yaml index 61687b1..22a5868 100644 --- a/data/chips/CH32V208GBU6.yaml +++ b/data/chips/CH32V208GBU6.yaml @@ -34,7 +34,7 @@ cores: - "../family/CH32V2.yaml" - "../peripherals/FV2x_V3x_USART1.yaml" - "../peripherals/FV2x_V3x_USART2.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_GP32_TIM5.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" diff --git a/data/chips/CH32V208RBT6.yaml b/data/chips/CH32V208RBT6.yaml index 73ef6dd..456afa6 100644 --- a/data/chips/CH32V208RBT6.yaml +++ b/data/chips/CH32V208RBT6.yaml @@ -36,7 +36,7 @@ cores: - "../peripherals/FV2x_V3x_USART2.yaml" - "../peripherals/FV2x_V3x_USART3.yaml" - "../peripherals/FV2x_V3x_USART4.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_GP32_TIM5.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" diff --git a/data/chips/CH32V208WBU6.yaml b/data/chips/CH32V208WBU6.yaml index f40bb8b..e3051c6 100644 --- a/data/chips/CH32V208WBU6.yaml +++ b/data/chips/CH32V208WBU6.yaml @@ -36,7 +36,7 @@ cores: - "../peripherals/FV2x_V3x_USART2.yaml" - "../peripherals/FV2x_V3x_USART3.yaml" - "../peripherals/FV2x_V3x_USART4.yaml" - - "../peripherals/FV2x_V3x_ADV_TIM1.yaml" + - "../peripherals/V1x_V2x_ADV_TIM1.yaml" - "../peripherals/FV2x_V3x_GP16_TIM234.yaml" - "../peripherals/FV2x_V3x_GP32_TIM5.yaml" - "../peripherals/FV2x_V3x_ADC1.yaml" diff --git a/data/family/CH32V1.yaml b/data/family/CH32V1.yaml index bbbddf9..5669ebf 100644 --- a/data/family/CH32V1.yaml +++ b/data/family/CH32V1.yaml @@ -369,65 +369,3 @@ signal: IN14 - pin: PC5 signal: IN15 - -- name: TIM1 - address: 0x40012C00 - registers: - kind: timer - version: v3 - block: ADTM - rcc: - bus_clock: PCLK2 - kernel_clock: PCLK2 - enable: - register: APB2PCENR - field: TIM1EN - reset: - register: APB2PRSTR - field: TIM1RST - remap: - register: PCFR1 - field: TIM1_RM - pins: - # 00:默认映射(ETR/PA12,CH1/PA8,CH2/PA9, CH3/PA10,CH4/PA11,BKIN/PB12,CH1N/PB13, CH2N/PB14,CH3N/PB15); - - { pin: "PA12", signal: "ETR", remap: 0b00 } - - { pin: "PA8", signal: "CH1", remap: 0b00 } - - { pin: "PA9", signal: "CH2", remap: 0b00 } - - { pin: "PA10", signal: "CH3", remap: 0b00 } - - { pin: "PA11", signal: "CH4", remap: 0b00 } - - { pin: "PB12", signal: "BKIN", remap: 0b00 } - - { pin: "PB13", signal: "CH1N", remap: 0b00 } - - { pin: "PB14", signal: "CH2N", remap: 0b00 } - - { pin: "PB15", signal: "CH3N", remap: 0b00 } - # 01:部分映射(ETR/PA12,CH1/PA8,CH2/PA9, CH3/PA10,CH4/PA11,BKIN/PA6,CH1N/PA7, CH2N/PB0,CH3N/PB1); - - { pin: "PA12", signal: "ETR", remap: 0b01 } - - { pin: "PA8", signal: "CH1", remap: 0b01 } - - { pin: "PA9", signal: "CH2", remap: 0b01 } - - { pin: "PA10", signal: "CH3", remap: 0b01 } - - { pin: "PA11", signal: "CH4", remap: 0b01 } - - { pin: "PA6", signal: "BKIN", remap: 0b01 } - - { pin: "PA7", signal: "CH1N", remap: 0b01 } - - { pin: "PB0", signal: "CH2N", remap: 0b01 } - - { pin: "PB1", signal: "CH3N", remap: 0b01 } - # 10:保留; - # 11:完全映射(ETR/PE7,CH1/PE9,CH2/PE11, CH3/PE13,CH4/PE14,BKIN/PE15,CH1N/PE8, CH2N/PE10,CH3N/PE12)。 - # - { pin: "PE7", signal: "ETR", remap: 0b11 } - # - { pin: "PE9", signal: "CH1", remap: 0b11 } - # - { pin: "PE11", signal: "CH2", remap: 0b11 } - # - { pin: "PE13", signal: "CH3", remap: 0b11 } - # - { pin: "PE14", signal: "CH4", remap: 0b11 } - # - { pin: "PE15", signal: "BKIN", remap: 0b11 } - # - { pin: "PE8", signal: "CH1N", remap: 0b11 } - # - { pin: "PE10", signal: "CH2N", remap: 0b11 } - # - { pin: "PE12", signal: "CH3N", remap: 0b11 } - interrupts: - - signal: BRK - interrupt: TIM1_BRK - - signal: UP - interrupt: TIM1_UP - - signal: TRG - interrupt: TIM1_TRG_COM - - signal: COM - interrupt: TIM1_TRG_COM - - signal: CC - interrupt: TIM1_CC diff --git a/data/peripherals/V103_GP16_TIM23.yaml b/data/peripherals/V1x_GP16_TIM23.yaml similarity index 100% rename from data/peripherals/V103_GP16_TIM23.yaml rename to data/peripherals/V1x_GP16_TIM23.yaml diff --git a/data/peripherals/V1x_V2x_ADV_TIM1.yaml b/data/peripherals/V1x_V2x_ADV_TIM1.yaml new file mode 100644 index 0000000..81e9292 --- /dev/null +++ b/data/peripherals/V1x_V2x_ADV_TIM1.yaml @@ -0,0 +1,52 @@ +# No GPIOE + +- name: TIM1 + address: 0x40012C00 + registers: + kind: timer + version: v3 + block: ADTM + rcc: + bus_clock: PCLK2 + kernel_clock: PCLK2 + enable: + register: APB2PCENR + field: TIM1EN + reset: + register: APB2PRSTR + field: TIM1RST + remap: + register: PCFR1 + field: TIM1_RM + pins: + # 00:默认映射(ETR/PA12,CH1/PA8,CH2/PA9, CH3/PA10,CH4/PA11,BKIN/PB12,CH1N/PB13, CH2N/PB14,CH3N/PB15); + - { pin: "PA12", signal: "ETR", remap: 0b00 } + - { pin: "PA8", signal: "CH1", remap: 0b00 } + - { pin: "PA9", signal: "CH2", remap: 0b00 } + - { pin: "PA10", signal: "CH3", remap: 0b00 } + - { pin: "PA11", signal: "CH4", remap: 0b00 } + - { pin: "PB12", signal: "BKIN", remap: 0b00 } + - { pin: "PB13", signal: "CH1N", remap: 0b00 } + - { pin: "PB14", signal: "CH2N", remap: 0b00 } + - { pin: "PB15", signal: "CH3N", remap: 0b00 } + # 01:部分映射(ETR/PA12,CH1/PA8,CH2/PA9, CH3/PA10,CH4/PA11,BKIN/PA6,CH1N/PA7, CH2N/PB0,CH3N/PB1); + - { pin: "PA12", signal: "ETR", remap: 0b01 } + - { pin: "PA8", signal: "CH1", remap: 0b01 } + - { pin: "PA9", signal: "CH2", remap: 0b01 } + - { pin: "PA10", signal: "CH3", remap: 0b01 } + - { pin: "PA11", signal: "CH4", remap: 0b01 } + - { pin: "PA6", signal: "BKIN", remap: 0b01 } + - { pin: "PA7", signal: "CH1N", remap: 0b01 } + - { pin: "PB0", signal: "CH2N", remap: 0b01 } + - { pin: "PB1", signal: "CH3N", remap: 0b01 } + interrupts: + - signal: BRK + interrupt: TIM1_BRK + - signal: UP + interrupt: TIM1_UP + - signal: TRG + interrupt: TIM1_TRG_COM + - signal: COM + interrupt: TIM1_TRG_COM + - signal: CC + interrupt: TIM1_CC