From 07b438990b5cb9668a11459aa1351f80825f3826 Mon Sep 17 00:00:00 2001
From: Andelf <andelf@gmail.com>
Date: Sat, 6 Apr 2024 10:25:12 +0800
Subject: [PATCH] fix: CH32X0 ADC clk

---
 data/family/CH32X0.yaml | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/data/family/CH32X0.yaml b/data/family/CH32X0.yaml
index bcf6dd8..374894e 100644
--- a/data/family/CH32X0.yaml
+++ b/data/family/CH32X0.yaml
@@ -415,8 +415,9 @@
     version: x0
     block: ADC
   rcc:
-    bus_clock: HCLK
-    kernel_clock: ADC_CLK
+    # According to the reference manual, the ADC clock is derived from the SYSCLK div by CLK_DIV
+    bus_clock: SYSCLK
+    kernel_clock: SYSCLK
     enable:
       register: APB2PCENR
       field: ADC1EN