diff --git a/cmds.sh b/cmds.sh index bc62982..23a0499 100644 --- a/cmds.sh +++ b/cmds.sh @@ -19,7 +19,7 @@ openFPGALoader -b colorlight-i9 -o 0x0E0000 -f bootloader.fbi # Build the bitstream (provide --flash-boot = 0x800000 (memmapped spi flash) + 0x1E0000 (firmware offset in flash)) # ecppack-bootaddr set to switch back to bootloader on PROGRAMN -python3 example-colorlight-i5.py --ecppack-compress --flash-boot=0x9E0000 --ecppack-bootaddr 0x000000 --cpu-type vexriscv --cpu-variant imac --csr-svd build/colorlight_i5/csr.svd --uart-baudrate=1000000 --timer-uptime --build +python3 example-colorlight-i5.py --ecppack-compress --flash-boot=0x9E0000 --ecppack-bootaddr 0x000000 --cpu-type vexriscv --cpu-variant imac --csr-svd build/colorlight_i5/csr.svd --uart-baudrate=1000000 --timer-uptime --csr-address-width=15 --build # Hold BUTTON while turning on, then flash over DFU device ALT 0 sudo dfu-util --alt 0 --download build/colorlight_i5/gateware/colorlight_i5.bit diff --git a/example-colorlight-i5.py b/example-colorlight-i5.py index d546f54..bc5d561 100755 --- a/example-colorlight-i5.py +++ b/example-colorlight-i5.py @@ -251,6 +251,7 @@ def main(): parser.add_target_argument("--flash-boot", default=0x3E0000, type=lambda x: int(x,0), help="Flash boot address.") viopts = parser.target_group.add_mutually_exclusive_group() args = parser.parse_args() + print(args) soc = BaseSoC(board=args.board, revision=args.revision, toolchain = args.toolchain, diff --git a/rtl/dsp.py b/rtl/dsp.py index fc78d7b..6f75c91 100644 --- a/rtl/dsp.py +++ b/rtl/dsp.py @@ -144,8 +144,7 @@ def __init__(self, mac, dw=32, fbits=16): self.y = Signal(dtype) # Saturation thresholds - SAT_HI = Constant(float_to_fp(1.0), dtype) - SAT_LO = Constant(-float_to_fp(1.0), dtype) + SAT = Constant(2**fbits-1, dtype) fsm = FSM(reset_state="WAIT-SINK-VALID") self.submodules += fsm @@ -177,7 +176,20 @@ def fsm_mac(this_state, next_state, fsm_mac("MAC-RESONANCE", "SATURATION", self.x - self.y, self.resonance, self.x, self.rezz) fsm.act("SATURATION", - NextValue(self.sat, self.rezz), + # TODO: why can't migen spit out a proper signed comparison here without the hack? + If(self.rezz[dw-1] == 0, + If(self.rezz >= SAT, + NextValue(self.sat, SAT) + ).Else( + NextValue(self.sat, self.rezz) + ) + ).Else( + If(self.rezz <= -SAT, + NextValue(self.sat, -SAT) + ).Else( + NextValue(self.sat, self.rezz) + ) + ), NextState("MAC-LADDER0"), ) fsm_mac("MAC-LADDER0", "MAC-LADDER1", @@ -624,7 +636,6 @@ def generator(dut): yield run_simulation(dut, generator(dut), vcd_name="test_dcblock.vcd") - """ def test_ladder_lpf_single(self): print() @@ -663,7 +674,6 @@ def generator(dut): sample_out = yield lpf.source.payload.sample print ("out", hex(sample_out), fp_to_float(sample_out)) run_simulation(dut, generator(dut), vcd_name="test_lpf.vcd") - """ def test_delayline(self): print() diff --git a/sim.py b/sim.py index d717e6f..3350126 100755 --- a/sim.py +++ b/sim.py @@ -61,7 +61,7 @@ def sim_soc_extension(sim_config, soc): soc.add_module("eurorack_pmod0", pmod0) N_VOICES=4 - create_voices(soc, pmod0, N_VOICES) + create_voices(soc, pmod0, n_voices=N_VOICES, start=0, prefix="group0") sim_config.add_module("i2s", ["eurorack_pmod0", "eurorack_pmod_clk0"])