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fix(CMSIS): Match clock/trim settings in SYS registers to latest changes for MAX32657 #1183

Merged
merged 4 commits into from
Oct 9, 2024
Merged

fix(CMSIS): Match clock/trim settings in SYS registers to latest changes for MAX32657 #1183

merged 4 commits into from
Oct 9, 2024

Commits on Sep 19, 2024

  1. Update oscillator trim settings

    @sihyung-maxim
    sihyung-maxim committed Sep 19, 2024
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Commits on Sep 26, 2024

  1. Update MCR ERFO settings

    @sihyung-maxim
    sihyung-maxim committed Sep 26, 2024
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Commits on Oct 2, 2024

  1. Fix BLE registers

    @sihyung-maxim
    sihyung-maxim committed Oct 2, 2024
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  2. Merge branch 'main' into feat/me30_fcr

    @sihyung-maxim
    sihyung-maxim committed Oct 2, 2024
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