From b6bf104c3be7ca6714888c7e0b925e97dd1bf4b1 Mon Sep 17 00:00:00 2001 From: Po-Yi Tsai Date: Sat, 25 Nov 2023 01:23:12 +0800 Subject: [PATCH] Regenerate using svd2rust 0.31.0 --- crates/bcm2711-lpa/Cargo.toml | 2 +- crates/bcm2711-lpa/src/aux_.rs | 14 +- crates/bcm2711-lpa/src/aux_/enables.rs | 20 +- crates/bcm2711-lpa/src/aux_/irq.rs | 20 +- crates/bcm2711-lpa/src/bsc0.rs | 50 ++- crates/bcm2711-lpa/src/bsc0/a.rs | 8 +- crates/bcm2711-lpa/src/bsc0/c.rs | 44 +-- crates/bcm2711-lpa/src/bsc0/clkt.rs | 8 +- crates/bcm2711-lpa/src/bsc0/del.rs | 14 +- crates/bcm2711-lpa/src/bsc0/div.rs | 8 +- crates/bcm2711-lpa/src/bsc0/dlen.rs | 8 +- crates/bcm2711-lpa/src/bsc0/fifo.rs | 8 +- crates/bcm2711-lpa/src/bsc0/s.rs | 20 +- crates/bcm2711-lpa/src/cm_pcm.rs | 14 +- crates/bcm2711-lpa/src/cm_pcm/cs.rs | 72 ++-- crates/bcm2711-lpa/src/cm_pcm/div.rs | 22 +- crates/bcm2711-lpa/src/emmc.rs | 168 +++++++-- crates/bcm2711-lpa/src/emmc/arg1.rs | 2 +- crates/bcm2711-lpa/src/emmc/arg2.rs | 2 +- crates/bcm2711-lpa/src/emmc/blksizecnt.rs | 14 +- crates/bcm2711-lpa/src/emmc/boot_timeout.rs | 2 +- crates/bcm2711-lpa/src/emmc/cmdtm.rs | 73 ++-- crates/bcm2711-lpa/src/emmc/control0.rs | 62 ++-- crates/bcm2711-lpa/src/emmc/control1.rs | 58 +-- crates/bcm2711-lpa/src/emmc/control2.rs | 22 +- crates/bcm2711-lpa/src/emmc/data.rs | 2 +- crates/bcm2711-lpa/src/emmc/dbg_sel.rs | 10 +- crates/bcm2711-lpa/src/emmc/exrdfifo_cfg.rs | 8 +- crates/bcm2711-lpa/src/emmc/exrdfifo_en.rs | 8 +- crates/bcm2711-lpa/src/emmc/force_irpt.rs | 104 +++--- crates/bcm2711-lpa/src/emmc/interrupt.rs | 104 +++--- crates/bcm2711-lpa/src/emmc/irpt_en.rs | 104 +++--- crates/bcm2711-lpa/src/emmc/irpt_mask.rs | 104 +++--- crates/bcm2711-lpa/src/emmc/resp0.rs | 2 +- crates/bcm2711-lpa/src/emmc/resp1.rs | 2 +- crates/bcm2711-lpa/src/emmc/resp2.rs | 2 +- crates/bcm2711-lpa/src/emmc/resp3.rs | 2 +- crates/bcm2711-lpa/src/emmc/slotisr_ver.rs | 20 +- crates/bcm2711-lpa/src/emmc/spi_int_spt.rs | 8 +- crates/bcm2711-lpa/src/emmc/status.rs | 62 ++-- crates/bcm2711-lpa/src/emmc/tune_step.rs | 8 +- crates/bcm2711-lpa/src/emmc/tune_steps_ddr.rs | 8 +- crates/bcm2711-lpa/src/emmc/tune_steps_std.rs | 8 +- crates/bcm2711-lpa/src/generic.rs | 86 +++-- crates/bcm2711-lpa/src/generic/raw.rs | 16 +- crates/bcm2711-lpa/src/gic_cpu.rs | 100 +++++- crates/bcm2711-lpa/src/gic_cpu/gicc_abpr.rs | 8 +- crates/bcm2711-lpa/src/gic_cpu/gicc_aeoir.rs | 12 +- crates/bcm2711-lpa/src/gic_cpu/gicc_ahppir.rs | 2 +- crates/bcm2711-lpa/src/gic_cpu/gicc_aiar.rs | 2 +- crates/bcm2711-lpa/src/gic_cpu/gicc_apr0.rs | 2 +- crates/bcm2711-lpa/src/gic_cpu/gicc_bpr.rs | 8 +- crates/bcm2711-lpa/src/gic_cpu/gicc_ctlr.rs | 68 ++-- crates/bcm2711-lpa/src/gic_cpu/gicc_eoir.rs | 12 +- crates/bcm2711-lpa/src/gic_cpu/gicc_hppir.rs | 14 +- crates/bcm2711-lpa/src/gic_cpu/gicc_iar.rs | 2 +- crates/bcm2711-lpa/src/gic_cpu/gicc_iidr.rs | 28 +- crates/bcm2711-lpa/src/gic_cpu/gicc_nsapr0.rs | 2 +- crates/bcm2711-lpa/src/gic_cpu/gicc_pmr.rs | 8 +- crates/bcm2711-lpa/src/gic_cpu/gicc_rpr.rs | 2 +- crates/bcm2711-lpa/src/gic_dist.rs | 242 ++++++++++--- crates/bcm2711-lpa/src/gic_dist/gicd_cidr0.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_cidr1.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_cidr2.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_cidr3.rs | 15 +- .../src/gic_dist/gicd_cpendsgirn.rs | 2 +- crates/bcm2711-lpa/src/gic_dist/gicd_ctlr.rs | 14 +- .../src/gic_dist/gicd_icactiver.rs | 44 ++- .../gicd_icactiver/gicd_icactiver0.rs | 194 +++++----- .../gicd_icactiver/gicd_icactiver1.rs | 194 +++++----- .../gicd_icactiver/gicd_icactiver2.rs | 194 +++++----- .../gicd_icactiver/gicd_icactiver3.rs | 194 +++++----- .../gicd_icactiver/gicd_icactiver4.rs | 194 +++++----- .../gicd_icactiver/gicd_icactiver5.rs | 194 +++++----- .../gicd_icactiver/gicd_icactiver6.rs | 194 +++++----- .../src/gic_dist/gicd_icenabler.rs | 44 ++- .../gicd_icenabler/gicd_icenabler0.rs | 194 +++++----- .../gicd_icenabler/gicd_icenabler1.rs | 194 +++++----- .../gicd_icenabler/gicd_icenabler2.rs | 194 +++++----- .../gicd_icenabler/gicd_icenabler3.rs | 194 +++++----- .../gicd_icenabler/gicd_icenabler4.rs | 194 +++++----- .../gicd_icenabler/gicd_icenabler5.rs | 194 +++++----- .../gicd_icenabler/gicd_icenabler6.rs | 194 +++++----- crates/bcm2711-lpa/src/gic_dist/gicd_icfgr.rs | 86 ++++- .../src/gic_dist/gicd_icfgr/gicd_icfgr0.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr12.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr16.rs | 131 ++++--- .../src/gic_dist/gicd_icfgr/gicd_icfgr20.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr24.rs | 134 ++++--- .../src/gic_dist/gicd_icfgr/gicd_icfgr28.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr32.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr36.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr4.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr40.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr44.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr48.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr52.rs | 130 +++---- .../src/gic_dist/gicd_icfgr/gicd_icfgr8.rs | 130 +++---- .../bcm2711-lpa/src/gic_dist/gicd_icpendr.rs | 44 ++- .../gic_dist/gicd_icpendr/gicd_icpendr0.rs | 194 +++++----- .../gic_dist/gicd_icpendr/gicd_icpendr1.rs | 194 +++++----- .../gic_dist/gicd_icpendr/gicd_icpendr2.rs | 194 +++++----- .../gic_dist/gicd_icpendr/gicd_icpendr3.rs | 194 +++++----- .../gic_dist/gicd_icpendr/gicd_icpendr4.rs | 194 +++++----- .../gic_dist/gicd_icpendr/gicd_icpendr5.rs | 194 +++++----- .../gic_dist/gicd_icpendr/gicd_icpendr6.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_igroupr.rs | 44 ++- .../gic_dist/gicd_igroupr/gicd_igroupr0.rs | 194 +++++----- .../gic_dist/gicd_igroupr/gicd_igroupr1.rs | 194 +++++----- .../gic_dist/gicd_igroupr/gicd_igroupr2.rs | 194 +++++----- .../gic_dist/gicd_igroupr/gicd_igroupr3.rs | 194 +++++----- .../gic_dist/gicd_igroupr/gicd_igroupr4.rs | 194 +++++----- .../gic_dist/gicd_igroupr/gicd_igroupr5.rs | 194 +++++----- .../gic_dist/gicd_igroupr/gicd_igroupr6.rs | 194 +++++----- crates/bcm2711-lpa/src/gic_dist/gicd_iidr.rs | 2 +- .../src/gic_dist/gicd_ipriorityr.rs | 338 +++++++++++++++--- .../gicd_ipriorityr/gicd_ipriorityr0.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr1.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr10.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr11.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr12.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr13.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr14.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr15.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr16.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr17.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr18.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr19.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr2.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr20.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr21.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr22.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr23.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr24.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr25.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr26.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr27.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr28.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr29.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr3.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr30.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr31.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr32.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr33.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr34.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr35.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr36.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr37.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr38.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr39.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr4.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr40.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr41.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr42.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr43.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr44.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr45.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr46.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr47.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr48.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr49.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr5.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr50.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr51.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr52.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr53.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr54.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr55.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr6.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr7.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr8.rs | 26 +- .../gicd_ipriorityr/gicd_ipriorityr9.rs | 26 +- .../src/gic_dist/gicd_isactiver.rs | 44 ++- .../gicd_isactiver/gicd_isactiver0.rs | 194 +++++----- .../gicd_isactiver/gicd_isactiver1.rs | 194 +++++----- .../gicd_isactiver/gicd_isactiver2.rs | 194 +++++----- .../gicd_isactiver/gicd_isactiver3.rs | 194 +++++----- .../gicd_isactiver/gicd_isactiver4.rs | 194 +++++----- .../gicd_isactiver/gicd_isactiver5.rs | 194 +++++----- .../gicd_isactiver/gicd_isactiver6.rs | 194 +++++----- .../src/gic_dist/gicd_isenabler.rs | 44 ++- .../gicd_isenabler/gicd_isenabler0.rs | 194 +++++----- .../gicd_isenabler/gicd_isenabler1.rs | 194 +++++----- .../gicd_isenabler/gicd_isenabler2.rs | 194 +++++----- .../gicd_isenabler/gicd_isenabler3.rs | 194 +++++----- .../gicd_isenabler/gicd_isenabler4.rs | 194 +++++----- .../gicd_isenabler/gicd_isenabler5.rs | 194 +++++----- .../gicd_isenabler/gicd_isenabler6.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_ispendr.rs | 44 ++- .../gic_dist/gicd_ispendr/gicd_ispendr0.rs | 194 +++++----- .../gic_dist/gicd_ispendr/gicd_ispendr1.rs | 194 +++++----- .../gic_dist/gicd_ispendr/gicd_ispendr2.rs | 194 +++++----- .../gic_dist/gicd_ispendr/gicd_ispendr3.rs | 194 +++++----- .../gic_dist/gicd_ispendr/gicd_ispendr4.rs | 194 +++++----- .../gic_dist/gicd_ispendr/gicd_ispendr5.rs | 194 +++++----- .../gic_dist/gicd_ispendr/gicd_ispendr6.rs | 194 +++++----- .../src/gic_dist/gicd_itargetsr.rs | 338 +++++++++++++++--- .../gicd_itargetsr/gicd_itargetsr0.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr1.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr10.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr11.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr12.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr13.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr14.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr15.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr16.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr17.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr18.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr19.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr2.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr20.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr21.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr22.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr23.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr24.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr25.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr26.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr27.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr28.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr29.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr3.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr30.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr31.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr32.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr33.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr34.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr35.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr36.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr37.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr38.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr39.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr4.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr40.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr41.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr42.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr43.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr44.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr45.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr46.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr47.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr48.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr49.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr5.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr50.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr51.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr52.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr53.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr54.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr55.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr6.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr7.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr8.rs | 26 +- .../gicd_itargetsr/gicd_itargetsr9.rs | 26 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr0.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr1.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr2.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr3.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr4.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr5.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr6.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_pidr7.rs | 15 +- crates/bcm2711-lpa/src/gic_dist/gicd_ppisr.rs | 44 +-- .../src/gic_dist/gicd_spendsgirn.rs | 2 +- .../bcm2711-lpa/src/gic_dist/gicd_spisr0.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_spisr1.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_spisr2.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_spisr3.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_spisr4.rs | 194 +++++----- .../bcm2711-lpa/src/gic_dist/gicd_spisr5.rs | 194 +++++----- crates/bcm2711-lpa/src/gic_dist/gicd_typer.rs | 2 +- crates/bcm2711-lpa/src/gpio.rs | 212 ++++++++--- crates/bcm2711-lpa/src/gpio/extra_mux.rs | 10 +- crates/bcm2711-lpa/src/gpio/gpafen0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gpafen1.rs | 158 ++++---- crates/bcm2711-lpa/src/gpio/gparen0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gparen1.rs | 158 ++++---- crates/bcm2711-lpa/src/gpio/gpclr0.rs | 192 +++++----- crates/bcm2711-lpa/src/gpio/gpclr1.rs | 156 ++++---- crates/bcm2711-lpa/src/gpio/gpeds0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gpeds1.rs | 158 ++++---- crates/bcm2711-lpa/src/gpio/gpfen0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gpfen1.rs | 158 ++++---- crates/bcm2711-lpa/src/gpio/gpfsel0.rs | 82 ++--- crates/bcm2711-lpa/src/gpio/gpfsel1.rs | 82 ++--- crates/bcm2711-lpa/src/gpio/gpfsel2.rs | 82 ++--- crates/bcm2711-lpa/src/gpio/gpfsel3.rs | 82 ++--- crates/bcm2711-lpa/src/gpio/gpfsel4.rs | 82 ++--- crates/bcm2711-lpa/src/gpio/gpfsel5.rs | 66 ++-- crates/bcm2711-lpa/src/gpio/gphen0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gphen1.rs | 158 ++++---- .../src/gpio/gpio_pup_pdn_cntrl_reg0.rs | 102 ++---- .../src/gpio/gpio_pup_pdn_cntrl_reg1.rs | 98 ++--- .../src/gpio/gpio_pup_pdn_cntrl_reg2.rs | 98 ++--- .../src/gpio/gpio_pup_pdn_cntrl_reg3.rs | 62 ++-- crates/bcm2711-lpa/src/gpio/gplen0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gplen1.rs | 158 ++++---- crates/bcm2711-lpa/src/gpio/gplev0.rs | 2 +- crates/bcm2711-lpa/src/gpio/gplev1.rs | 2 +- crates/bcm2711-lpa/src/gpio/gpren0.rs | 194 +++++----- crates/bcm2711-lpa/src/gpio/gpren1.rs | 158 ++++---- crates/bcm2711-lpa/src/gpio/gpset0.rs | 192 +++++----- crates/bcm2711-lpa/src/gpio/gpset1.rs | 156 ++++---- crates/bcm2711-lpa/src/lib.rs | 17 +- crates/bcm2711-lpa/src/lic.rs | 62 +++- crates/bcm2711-lpa/src/lic/basic_pending.rs | 2 +- crates/bcm2711-lpa/src/lic/disable_1.rs | 194 +++++----- crates/bcm2711-lpa/src/lic/disable_2.rs | 194 +++++----- crates/bcm2711-lpa/src/lic/disable_basic.rs | 50 +-- crates/bcm2711-lpa/src/lic/enable_1.rs | 194 +++++----- crates/bcm2711-lpa/src/lic/enable_2.rs | 194 +++++----- crates/bcm2711-lpa/src/lic/enable_basic.rs | 50 +-- crates/bcm2711-lpa/src/lic/fiq_control.rs | 16 +- crates/bcm2711-lpa/src/lic/pending_1.rs | 2 +- crates/bcm2711-lpa/src/lic/pending_2.rs | 2 +- crates/bcm2711-lpa/src/pactl.rs | 8 +- crates/bcm2711-lpa/src/pactl/cs.rs | 122 +++---- crates/bcm2711-lpa/src/pwm0.rs | 54 ++- crates/bcm2711-lpa/src/pwm0/ctl.rs | 96 ++--- crates/bcm2711-lpa/src/pwm0/dat1.rs | 2 +- crates/bcm2711-lpa/src/pwm0/dat2.rs | 2 +- crates/bcm2711-lpa/src/pwm0/dmac.rs | 20 +- crates/bcm2711-lpa/src/pwm0/rng1.rs | 2 +- crates/bcm2711-lpa/src/pwm0/rng2.rs | 2 +- crates/bcm2711-lpa/src/pwm0/sta.rs | 80 ++--- crates/bcm2711-lpa/src/spi0.rs | 38 +- crates/bcm2711-lpa/src/spi0/clk.rs | 8 +- crates/bcm2711-lpa/src/spi0/cs.rs | 118 +++--- crates/bcm2711-lpa/src/spi0/dc.rs | 26 +- crates/bcm2711-lpa/src/spi0/dlen.rs | 8 +- crates/bcm2711-lpa/src/spi0/fifo.rs | 8 +- crates/bcm2711-lpa/src/spi0/ltoh.rs | 8 +- crates/bcm2711-lpa/src/spi1.rs | 38 +- crates/bcm2711-lpa/src/spi1/cntl0.rs | 83 +++-- crates/bcm2711-lpa/src/spi1/cntl1.rs | 32 +- crates/bcm2711-lpa/src/spi1/io.rs | 8 +- crates/bcm2711-lpa/src/spi1/peek.rs | 2 +- crates/bcm2711-lpa/src/spi1/stat.rs | 50 +-- crates/bcm2711-lpa/src/spi1/txhold.rs | 8 +- crates/bcm2711-lpa/src/systmr.rs | 44 ++- crates/bcm2711-lpa/src/systmr/c0.rs | 2 +- crates/bcm2711-lpa/src/systmr/c1.rs | 2 +- crates/bcm2711-lpa/src/systmr/c2.rs | 2 +- crates/bcm2711-lpa/src/systmr/c3.rs | 2 +- crates/bcm2711-lpa/src/systmr/chi.rs | 2 +- crates/bcm2711-lpa/src/systmr/clo.rs | 2 +- crates/bcm2711-lpa/src/systmr/cs.rs | 26 +- crates/bcm2711-lpa/src/uart0.rs | 94 +++-- crates/bcm2711-lpa/src/uart0/cr.rs | 56 +-- crates/bcm2711-lpa/src/uart0/dmacr.rs | 20 +- crates/bcm2711-lpa/src/uart0/dr.rs | 32 +- crates/bcm2711-lpa/src/uart0/ecr.rs | 24 +- crates/bcm2711-lpa/src/uart0/fbrd.rs | 8 +- crates/bcm2711-lpa/src/uart0/fr.rs | 56 +-- crates/bcm2711-lpa/src/uart0/ibrd.rs | 8 +- crates/bcm2711-lpa/src/uart0/icr.rs | 66 ++-- crates/bcm2711-lpa/src/uart0/ifls.rs | 14 +- crates/bcm2711-lpa/src/uart0/imsc.rs | 68 ++-- crates/bcm2711-lpa/src/uart0/lcr_h.rs | 44 +-- crates/bcm2711-lpa/src/uart0/mis.rs | 2 +- crates/bcm2711-lpa/src/uart0/ris.rs | 2 +- crates/bcm2711-lpa/src/uart0/rsr.rs | 2 +- crates/bcm2711-lpa/src/uart1.rs | 80 +++-- crates/bcm2711-lpa/src/uart1/baud.rs | 2 +- crates/bcm2711-lpa/src/uart1/baudh.rs | 2 +- crates/bcm2711-lpa/src/uart1/baudl.rs | 2 +- crates/bcm2711-lpa/src/uart1/cntl.rs | 47 ++- crates/bcm2711-lpa/src/uart1/ier.rs | 14 +- crates/bcm2711-lpa/src/uart1/iir.rs | 20 +- crates/bcm2711-lpa/src/uart1/io.rs | 8 +- crates/bcm2711-lpa/src/uart1/lcr.rs | 22 +- crates/bcm2711-lpa/src/uart1/lsr.rs | 26 +- crates/bcm2711-lpa/src/uart1/mcr.rs | 8 +- crates/bcm2711-lpa/src/uart1/msr.rs | 8 +- crates/bcm2711-lpa/src/uart1/scratch.rs | 2 +- crates/bcm2711-lpa/src/uart1/stat.rs | 74 ++-- crates/bcm2711-lpa/src/usb_otg_device.rs | 290 +++++++++++---- .../bcm2711-lpa/src/usb_otg_device/daint.rs | 2 +- .../src/usb_otg_device/daintmsk.rs | 14 +- crates/bcm2711-lpa/src/usb_otg_device/dcfg.rs | 32 +- crates/bcm2711-lpa/src/usb_otg_device/dctl.rs | 50 +-- .../src/usb_otg_device/deachint.rs | 14 +- .../src/usb_otg_device/deachintmsk.rs | 14 +- .../src/usb_otg_device/diepeachmsk1.rs | 56 +-- .../src/usb_otg_device/diepempmsk.rs | 8 +- .../bcm2711-lpa/src/usb_otg_device/diepmsk.rs | 50 +-- .../src/usb_otg_device/doepeachmsk1.rs | 68 ++-- .../bcm2711-lpa/src/usb_otg_device/doepmsk.rs | 44 +-- crates/bcm2711-lpa/src/usb_otg_device/dsts.rs | 2 +- .../bcm2711-lpa/src/usb_otg_device/dthrctl.rs | 38 +- .../src/usb_otg_device/dvbusdis.rs | 8 +- .../src/usb_otg_device/dvbuspulse.rs | 8 +- .../src/usb_otg_device/in_endpoint.rs | 36 +- .../usb_otg_device/in_endpoint/diepctl0.rs | 68 ++-- .../src/usb_otg_device/in_endpoint/diepdma.rs | 8 +- .../src/usb_otg_device/in_endpoint/diepint.rs | 62 ++-- .../usb_otg_device/in_endpoint/dieptsiz.rs | 14 +- .../src/usb_otg_device/in_endpoint/dtxfsts.rs | 2 +- .../src/usb_otg_device/out_endpoint.rs | 30 +- .../usb_otg_device/out_endpoint/doepctl.rs | 32 +- .../usb_otg_device/out_endpoint/doepdma.rs | 8 +- .../usb_otg_device/out_endpoint/doepint.rs | 38 +- .../usb_otg_device/out_endpoint/doeptsiz.rs | 20 +- crates/bcm2711-lpa/src/usb_otg_global.rs | 188 +++++++--- crates/bcm2711-lpa/src/usb_otg_global/cid.rs | 8 +- .../src/usb_otg_global/dieptxf1.rs | 14 +- .../src/usb_otg_global/dieptxf2.rs | 14 +- .../src/usb_otg_global/dieptxf3.rs | 14 +- .../src/usb_otg_global/dieptxf4.rs | 14 +- .../src/usb_otg_global/dieptxf5.rs | 14 +- .../src/usb_otg_global/dieptxf6.rs | 14 +- .../src/usb_otg_global/dieptxf7.rs | 14 +- .../bcm2711-lpa/src/usb_otg_global/gahbcfg.rs | 40 +-- .../bcm2711-lpa/src/usb_otg_global/gccfg.rs | 38 +- .../bcm2711-lpa/src/usb_otg_global/gintmsk.rs | 152 ++++---- .../bcm2711-lpa/src/usb_otg_global/gintsts.rs | 92 ++--- .../src/usb_otg_global/gnptxfsiz_host.rs | 14 +- .../src/usb_otg_global/gnptxsts.rs | 2 +- .../bcm2711-lpa/src/usb_otg_global/gotgctl.rs | 26 +- .../bcm2711-lpa/src/usb_otg_global/gotgint.rs | 38 +- .../bcm2711-lpa/src/usb_otg_global/grstctl.rs | 38 +- .../bcm2711-lpa/src/usb_otg_global/grxfsiz.rs | 8 +- .../src/usb_otg_global/grxstsp_host.rs | 2 +- .../src/usb_otg_global/grxstsp_peripheral.rs | 2 +- .../src/usb_otg_global/grxstsr_host.rs | 2 +- .../src/usb_otg_global/grxstsr_peripheral.rs | 2 +- .../bcm2711-lpa/src/usb_otg_global/gusbcfg.rs | 144 ++++---- .../src/usb_otg_global/hptxfsiz.rs | 14 +- .../src/usb_otg_global/hw_config0.rs | 2 +- .../src/usb_otg_global/hw_direction.rs | 8 +- .../src/usb_otg_global/tx0fsiz_peripheral.rs | 14 +- crates/bcm2711-lpa/src/usb_otg_global/vid.rs | 2 +- crates/bcm2711-lpa/src/usb_otg_host.rs | 144 ++++++-- crates/bcm2711-lpa/src/usb_otg_host/haint.rs | 2 +- .../bcm2711-lpa/src/usb_otg_host/haintmsk.rs | 8 +- crates/bcm2711-lpa/src/usb_otg_host/hcfg.rs | 8 +- crates/bcm2711-lpa/src/usb_otg_host/hfir.rs | 8 +- crates/bcm2711-lpa/src/usb_otg_host/hfnum.rs | 2 +- .../src/usb_otg_host/host_channel.rs | 38 +- .../src/usb_otg_host/host_channel/hcchar.rs | 62 ++-- .../src/usb_otg_host/host_channel/hcdma.rs | 8 +- .../src/usb_otg_host/host_channel/hcint.rs | 68 ++-- .../src/usb_otg_host/host_channel/hcintmsk.rs | 68 ++-- .../src/usb_otg_host/host_channel/hcsplt.rs | 32 +- .../src/usb_otg_host/host_channel/hctsiz.rs | 20 +- crates/bcm2711-lpa/src/usb_otg_host/hprt.rs | 56 +-- .../bcm2711-lpa/src/usb_otg_host/hptxsts.rs | 8 +- crates/bcm2711-lpa/src/usb_otg_pwrclk.rs | 8 +- .../bcm2711-lpa/src/usb_otg_pwrclk/pcgcctl.rs | 92 ++--- crates/bcm2711-lpa/src/vcmailbox.rs | 66 +++- crates/bcm2711-lpa/src/vcmailbox/config0.rs | 8 +- crates/bcm2711-lpa/src/vcmailbox/config1.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/peek0.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/peek1.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/read.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/sender0.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/sender1.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/status0.rs | 2 +- crates/bcm2711-lpa/src/vcmailbox/status1.rs | 2 +- crates/bcm2835-lpa/Cargo.toml | 2 +- crates/bcm2835-lpa/src/aux_.rs | 14 +- crates/bcm2835-lpa/src/aux_/enables.rs | 20 +- crates/bcm2835-lpa/src/aux_/irq.rs | 20 +- crates/bcm2835-lpa/src/bsc0.rs | 50 ++- crates/bcm2835-lpa/src/bsc0/a.rs | 8 +- crates/bcm2835-lpa/src/bsc0/c.rs | 44 +-- crates/bcm2835-lpa/src/bsc0/clkt.rs | 8 +- crates/bcm2835-lpa/src/bsc0/del.rs | 14 +- crates/bcm2835-lpa/src/bsc0/div.rs | 8 +- crates/bcm2835-lpa/src/bsc0/dlen.rs | 8 +- crates/bcm2835-lpa/src/bsc0/fifo.rs | 8 +- crates/bcm2835-lpa/src/bsc0/s.rs | 20 +- crates/bcm2835-lpa/src/cm_pcm.rs | 14 +- crates/bcm2835-lpa/src/cm_pcm/cs.rs | 72 ++-- crates/bcm2835-lpa/src/cm_pcm/div.rs | 22 +- crates/bcm2835-lpa/src/emmc.rs | 168 +++++++-- crates/bcm2835-lpa/src/emmc/arg1.rs | 2 +- crates/bcm2835-lpa/src/emmc/arg2.rs | 2 +- crates/bcm2835-lpa/src/emmc/blksizecnt.rs | 14 +- crates/bcm2835-lpa/src/emmc/boot_timeout.rs | 2 +- crates/bcm2835-lpa/src/emmc/cmdtm.rs | 73 ++-- crates/bcm2835-lpa/src/emmc/control0.rs | 62 ++-- crates/bcm2835-lpa/src/emmc/control1.rs | 58 +-- crates/bcm2835-lpa/src/emmc/control2.rs | 22 +- crates/bcm2835-lpa/src/emmc/data.rs | 2 +- crates/bcm2835-lpa/src/emmc/dbg_sel.rs | 10 +- crates/bcm2835-lpa/src/emmc/exrdfifo_cfg.rs | 8 +- crates/bcm2835-lpa/src/emmc/exrdfifo_en.rs | 8 +- crates/bcm2835-lpa/src/emmc/force_irpt.rs | 104 +++--- crates/bcm2835-lpa/src/emmc/interrupt.rs | 104 +++--- crates/bcm2835-lpa/src/emmc/irpt_en.rs | 104 +++--- crates/bcm2835-lpa/src/emmc/irpt_mask.rs | 104 +++--- crates/bcm2835-lpa/src/emmc/resp0.rs | 2 +- crates/bcm2835-lpa/src/emmc/resp1.rs | 2 +- crates/bcm2835-lpa/src/emmc/resp2.rs | 2 +- crates/bcm2835-lpa/src/emmc/resp3.rs | 2 +- crates/bcm2835-lpa/src/emmc/slotisr_ver.rs | 20 +- crates/bcm2835-lpa/src/emmc/spi_int_spt.rs | 8 +- crates/bcm2835-lpa/src/emmc/status.rs | 62 ++-- crates/bcm2835-lpa/src/emmc/tune_step.rs | 8 +- crates/bcm2835-lpa/src/emmc/tune_steps_ddr.rs | 8 +- crates/bcm2835-lpa/src/emmc/tune_steps_std.rs | 8 +- crates/bcm2835-lpa/src/generic.rs | 86 +++-- crates/bcm2835-lpa/src/generic/raw.rs | 16 +- crates/bcm2835-lpa/src/gpio.rs | 212 ++++++++--- crates/bcm2835-lpa/src/gpio/extra_mux.rs | 10 +- crates/bcm2835-lpa/src/gpio/gpafen0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gpafen1.rs | 134 +++---- crates/bcm2835-lpa/src/gpio/gparen0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gparen1.rs | 134 +++---- crates/bcm2835-lpa/src/gpio/gpclr0.rs | 192 +++++----- crates/bcm2835-lpa/src/gpio/gpclr1.rs | 132 +++---- crates/bcm2835-lpa/src/gpio/gpeds0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gpeds1.rs | 134 +++---- crates/bcm2835-lpa/src/gpio/gpfen0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gpfen1.rs | 134 +++---- crates/bcm2835-lpa/src/gpio/gpfsel0.rs | 82 ++--- crates/bcm2835-lpa/src/gpio/gpfsel1.rs | 82 ++--- crates/bcm2835-lpa/src/gpio/gpfsel2.rs | 82 ++--- crates/bcm2835-lpa/src/gpio/gpfsel3.rs | 82 ++--- crates/bcm2835-lpa/src/gpio/gpfsel4.rs | 82 ++--- crates/bcm2835-lpa/src/gpio/gpfsel5.rs | 34 +- crates/bcm2835-lpa/src/gpio/gphen0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gphen1.rs | 134 +++---- .../src/gpio/gpio_pup_pdn_cntrl_reg0.rs | 102 ++---- .../src/gpio/gpio_pup_pdn_cntrl_reg1.rs | 98 ++--- .../src/gpio/gpio_pup_pdn_cntrl_reg2.rs | 98 ++--- .../src/gpio/gpio_pup_pdn_cntrl_reg3.rs | 38 +- crates/bcm2835-lpa/src/gpio/gplen0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gplen1.rs | 134 +++---- crates/bcm2835-lpa/src/gpio/gplev0.rs | 2 +- crates/bcm2835-lpa/src/gpio/gplev1.rs | 2 +- crates/bcm2835-lpa/src/gpio/gpren0.rs | 194 +++++----- crates/bcm2835-lpa/src/gpio/gpren1.rs | 134 +++---- crates/bcm2835-lpa/src/gpio/gpset0.rs | 192 +++++----- crates/bcm2835-lpa/src/gpio/gpset1.rs | 132 +++---- crates/bcm2835-lpa/src/lib.rs | 17 +- crates/bcm2835-lpa/src/lic.rs | 62 +++- crates/bcm2835-lpa/src/lic/basic_pending.rs | 2 +- crates/bcm2835-lpa/src/lic/disable_1.rs | 194 +++++----- crates/bcm2835-lpa/src/lic/disable_2.rs | 194 +++++----- crates/bcm2835-lpa/src/lic/disable_basic.rs | 50 +-- crates/bcm2835-lpa/src/lic/enable_1.rs | 194 +++++----- crates/bcm2835-lpa/src/lic/enable_2.rs | 194 +++++----- crates/bcm2835-lpa/src/lic/enable_basic.rs | 50 +-- crates/bcm2835-lpa/src/lic/fiq_control.rs | 16 +- crates/bcm2835-lpa/src/lic/pending_1.rs | 2 +- crates/bcm2835-lpa/src/lic/pending_2.rs | 2 +- crates/bcm2835-lpa/src/pm.rs | 16 +- crates/bcm2835-lpa/src/pm/rstc.rs | 18 +- crates/bcm2835-lpa/src/pm/wdog.rs | 16 +- crates/bcm2835-lpa/src/pwm0.rs | 54 ++- crates/bcm2835-lpa/src/pwm0/ctl.rs | 96 ++--- crates/bcm2835-lpa/src/pwm0/dat1.rs | 2 +- crates/bcm2835-lpa/src/pwm0/dat2.rs | 2 +- crates/bcm2835-lpa/src/pwm0/dmac.rs | 20 +- crates/bcm2835-lpa/src/pwm0/rng1.rs | 2 +- crates/bcm2835-lpa/src/pwm0/rng2.rs | 2 +- crates/bcm2835-lpa/src/pwm0/sta.rs | 80 ++--- crates/bcm2835-lpa/src/spi0.rs | 38 +- crates/bcm2835-lpa/src/spi0/clk.rs | 8 +- crates/bcm2835-lpa/src/spi0/cs.rs | 118 +++--- crates/bcm2835-lpa/src/spi0/dc.rs | 26 +- crates/bcm2835-lpa/src/spi0/dlen.rs | 8 +- crates/bcm2835-lpa/src/spi0/fifo.rs | 8 +- crates/bcm2835-lpa/src/spi0/ltoh.rs | 8 +- crates/bcm2835-lpa/src/spi1.rs | 38 +- crates/bcm2835-lpa/src/spi1/cntl0.rs | 83 +++-- crates/bcm2835-lpa/src/spi1/cntl1.rs | 32 +- crates/bcm2835-lpa/src/spi1/io.rs | 8 +- crates/bcm2835-lpa/src/spi1/peek.rs | 2 +- crates/bcm2835-lpa/src/spi1/stat.rs | 50 +-- crates/bcm2835-lpa/src/spi1/txhold.rs | 8 +- crates/bcm2835-lpa/src/systmr.rs | 44 ++- crates/bcm2835-lpa/src/systmr/c0.rs | 2 +- crates/bcm2835-lpa/src/systmr/c1.rs | 2 +- crates/bcm2835-lpa/src/systmr/c2.rs | 2 +- crates/bcm2835-lpa/src/systmr/c3.rs | 2 +- crates/bcm2835-lpa/src/systmr/chi.rs | 2 +- crates/bcm2835-lpa/src/systmr/clo.rs | 2 +- crates/bcm2835-lpa/src/systmr/cs.rs | 26 +- crates/bcm2835-lpa/src/uart0.rs | 94 +++-- crates/bcm2835-lpa/src/uart0/cr.rs | 56 +-- crates/bcm2835-lpa/src/uart0/dmacr.rs | 20 +- crates/bcm2835-lpa/src/uart0/dr.rs | 32 +- crates/bcm2835-lpa/src/uart0/ecr.rs | 24 +- crates/bcm2835-lpa/src/uart0/fbrd.rs | 8 +- crates/bcm2835-lpa/src/uart0/fr.rs | 56 +-- crates/bcm2835-lpa/src/uart0/ibrd.rs | 8 +- crates/bcm2835-lpa/src/uart0/icr.rs | 66 ++-- crates/bcm2835-lpa/src/uart0/ifls.rs | 14 +- crates/bcm2835-lpa/src/uart0/imsc.rs | 68 ++-- crates/bcm2835-lpa/src/uart0/lcr_h.rs | 44 +-- crates/bcm2835-lpa/src/uart0/mis.rs | 2 +- crates/bcm2835-lpa/src/uart0/ris.rs | 2 +- crates/bcm2835-lpa/src/uart0/rsr.rs | 2 +- crates/bcm2835-lpa/src/uart1.rs | 80 +++-- crates/bcm2835-lpa/src/uart1/baud.rs | 2 +- crates/bcm2835-lpa/src/uart1/baudh.rs | 2 +- crates/bcm2835-lpa/src/uart1/baudl.rs | 2 +- crates/bcm2835-lpa/src/uart1/cntl.rs | 47 ++- crates/bcm2835-lpa/src/uart1/ier.rs | 14 +- crates/bcm2835-lpa/src/uart1/iir.rs | 20 +- crates/bcm2835-lpa/src/uart1/io.rs | 8 +- crates/bcm2835-lpa/src/uart1/lcr.rs | 22 +- crates/bcm2835-lpa/src/uart1/lsr.rs | 26 +- crates/bcm2835-lpa/src/uart1/mcr.rs | 8 +- crates/bcm2835-lpa/src/uart1/msr.rs | 8 +- crates/bcm2835-lpa/src/uart1/scratch.rs | 2 +- crates/bcm2835-lpa/src/uart1/stat.rs | 74 ++-- crates/bcm2835-lpa/src/usb_otg_device.rs | 290 +++++++++++---- .../bcm2835-lpa/src/usb_otg_device/daint.rs | 2 +- .../src/usb_otg_device/daintmsk.rs | 14 +- crates/bcm2835-lpa/src/usb_otg_device/dcfg.rs | 32 +- crates/bcm2835-lpa/src/usb_otg_device/dctl.rs | 50 +-- .../src/usb_otg_device/deachint.rs | 14 +- .../src/usb_otg_device/deachintmsk.rs | 14 +- .../src/usb_otg_device/diepeachmsk1.rs | 56 +-- .../src/usb_otg_device/diepempmsk.rs | 8 +- .../bcm2835-lpa/src/usb_otg_device/diepmsk.rs | 50 +-- .../src/usb_otg_device/doepeachmsk1.rs | 68 ++-- .../bcm2835-lpa/src/usb_otg_device/doepmsk.rs | 44 +-- crates/bcm2835-lpa/src/usb_otg_device/dsts.rs | 2 +- .../bcm2835-lpa/src/usb_otg_device/dthrctl.rs | 38 +- .../src/usb_otg_device/dvbusdis.rs | 8 +- .../src/usb_otg_device/dvbuspulse.rs | 8 +- .../src/usb_otg_device/in_endpoint.rs | 36 +- .../usb_otg_device/in_endpoint/diepctl0.rs | 68 ++-- .../src/usb_otg_device/in_endpoint/diepdma.rs | 8 +- .../src/usb_otg_device/in_endpoint/diepint.rs | 62 ++-- .../usb_otg_device/in_endpoint/dieptsiz.rs | 14 +- .../src/usb_otg_device/in_endpoint/dtxfsts.rs | 2 +- .../src/usb_otg_device/out_endpoint.rs | 30 +- .../usb_otg_device/out_endpoint/doepctl.rs | 32 +- .../usb_otg_device/out_endpoint/doepdma.rs | 8 +- .../usb_otg_device/out_endpoint/doepint.rs | 38 +- .../usb_otg_device/out_endpoint/doeptsiz.rs | 20 +- crates/bcm2835-lpa/src/usb_otg_global.rs | 188 +++++++--- crates/bcm2835-lpa/src/usb_otg_global/cid.rs | 8 +- .../src/usb_otg_global/dieptxf1.rs | 14 +- .../src/usb_otg_global/dieptxf2.rs | 14 +- .../src/usb_otg_global/dieptxf3.rs | 14 +- .../src/usb_otg_global/dieptxf4.rs | 14 +- .../src/usb_otg_global/dieptxf5.rs | 14 +- .../src/usb_otg_global/dieptxf6.rs | 14 +- .../src/usb_otg_global/dieptxf7.rs | 14 +- .../bcm2835-lpa/src/usb_otg_global/gahbcfg.rs | 40 +-- .../bcm2835-lpa/src/usb_otg_global/gccfg.rs | 38 +- .../bcm2835-lpa/src/usb_otg_global/gintmsk.rs | 152 ++++---- .../bcm2835-lpa/src/usb_otg_global/gintsts.rs | 92 ++--- .../src/usb_otg_global/gnptxfsiz_host.rs | 14 +- .../src/usb_otg_global/gnptxsts.rs | 2 +- .../bcm2835-lpa/src/usb_otg_global/gotgctl.rs | 26 +- .../bcm2835-lpa/src/usb_otg_global/gotgint.rs | 38 +- .../bcm2835-lpa/src/usb_otg_global/grstctl.rs | 38 +- .../bcm2835-lpa/src/usb_otg_global/grxfsiz.rs | 8 +- .../src/usb_otg_global/grxstsp_host.rs | 2 +- .../src/usb_otg_global/grxstsp_peripheral.rs | 2 +- .../src/usb_otg_global/grxstsr_host.rs | 2 +- .../src/usb_otg_global/grxstsr_peripheral.rs | 2 +- .../bcm2835-lpa/src/usb_otg_global/gusbcfg.rs | 144 ++++---- .../src/usb_otg_global/hptxfsiz.rs | 14 +- .../src/usb_otg_global/hw_config0.rs | 2 +- .../src/usb_otg_global/hw_direction.rs | 8 +- .../src/usb_otg_global/tx0fsiz_peripheral.rs | 14 +- crates/bcm2835-lpa/src/usb_otg_global/vid.rs | 2 +- crates/bcm2835-lpa/src/usb_otg_host.rs | 144 ++++++-- crates/bcm2835-lpa/src/usb_otg_host/haint.rs | 2 +- .../bcm2835-lpa/src/usb_otg_host/haintmsk.rs | 8 +- crates/bcm2835-lpa/src/usb_otg_host/hcfg.rs | 8 +- crates/bcm2835-lpa/src/usb_otg_host/hfir.rs | 8 +- crates/bcm2835-lpa/src/usb_otg_host/hfnum.rs | 2 +- .../src/usb_otg_host/host_channel.rs | 38 +- .../src/usb_otg_host/host_channel/hcchar.rs | 62 ++-- .../src/usb_otg_host/host_channel/hcdma.rs | 8 +- .../src/usb_otg_host/host_channel/hcint.rs | 68 ++-- .../src/usb_otg_host/host_channel/hcintmsk.rs | 68 ++-- .../src/usb_otg_host/host_channel/hcsplt.rs | 32 +- .../src/usb_otg_host/host_channel/hctsiz.rs | 20 +- crates/bcm2835-lpa/src/usb_otg_host/hprt.rs | 56 +-- .../bcm2835-lpa/src/usb_otg_host/hptxsts.rs | 8 +- crates/bcm2835-lpa/src/usb_otg_pwrclk.rs | 8 +- .../bcm2835-lpa/src/usb_otg_pwrclk/pcgcctl.rs | 92 ++--- crates/bcm2835-lpa/src/vcmailbox.rs | 66 +++- crates/bcm2835-lpa/src/vcmailbox/config0.rs | 8 +- crates/bcm2835-lpa/src/vcmailbox/config1.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/peek0.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/peek1.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/read.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/sender0.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/sender1.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/status0.rs | 2 +- crates/bcm2835-lpa/src/vcmailbox/status1.rs | 2 +- crates/bcm2837-lpa/Cargo.toml | 2 +- crates/bcm2837-lpa/src/aux_.rs | 14 +- crates/bcm2837-lpa/src/aux_/enables.rs | 20 +- crates/bcm2837-lpa/src/aux_/irq.rs | 20 +- crates/bcm2837-lpa/src/bsc0.rs | 50 ++- crates/bcm2837-lpa/src/bsc0/a.rs | 8 +- crates/bcm2837-lpa/src/bsc0/c.rs | 44 +-- crates/bcm2837-lpa/src/bsc0/clkt.rs | 8 +- crates/bcm2837-lpa/src/bsc0/del.rs | 14 +- crates/bcm2837-lpa/src/bsc0/div.rs | 8 +- crates/bcm2837-lpa/src/bsc0/dlen.rs | 8 +- crates/bcm2837-lpa/src/bsc0/fifo.rs | 8 +- crates/bcm2837-lpa/src/bsc0/s.rs | 20 +- crates/bcm2837-lpa/src/cm_pcm.rs | 14 +- crates/bcm2837-lpa/src/cm_pcm/cs.rs | 72 ++-- crates/bcm2837-lpa/src/cm_pcm/div.rs | 22 +- crates/bcm2837-lpa/src/emmc.rs | 168 +++++++-- crates/bcm2837-lpa/src/emmc/arg1.rs | 2 +- crates/bcm2837-lpa/src/emmc/arg2.rs | 2 +- crates/bcm2837-lpa/src/emmc/blksizecnt.rs | 14 +- crates/bcm2837-lpa/src/emmc/boot_timeout.rs | 2 +- crates/bcm2837-lpa/src/emmc/cmdtm.rs | 73 ++-- crates/bcm2837-lpa/src/emmc/control0.rs | 62 ++-- crates/bcm2837-lpa/src/emmc/control1.rs | 58 +-- crates/bcm2837-lpa/src/emmc/control2.rs | 22 +- crates/bcm2837-lpa/src/emmc/data.rs | 2 +- crates/bcm2837-lpa/src/emmc/dbg_sel.rs | 10 +- crates/bcm2837-lpa/src/emmc/exrdfifo_cfg.rs | 8 +- crates/bcm2837-lpa/src/emmc/exrdfifo_en.rs | 8 +- crates/bcm2837-lpa/src/emmc/force_irpt.rs | 104 +++--- crates/bcm2837-lpa/src/emmc/interrupt.rs | 104 +++--- crates/bcm2837-lpa/src/emmc/irpt_en.rs | 104 +++--- crates/bcm2837-lpa/src/emmc/irpt_mask.rs | 104 +++--- crates/bcm2837-lpa/src/emmc/resp0.rs | 2 +- crates/bcm2837-lpa/src/emmc/resp1.rs | 2 +- crates/bcm2837-lpa/src/emmc/resp2.rs | 2 +- crates/bcm2837-lpa/src/emmc/resp3.rs | 2 +- crates/bcm2837-lpa/src/emmc/slotisr_ver.rs | 20 +- crates/bcm2837-lpa/src/emmc/spi_int_spt.rs | 8 +- crates/bcm2837-lpa/src/emmc/status.rs | 62 ++-- crates/bcm2837-lpa/src/emmc/tune_step.rs | 8 +- crates/bcm2837-lpa/src/emmc/tune_steps_ddr.rs | 8 +- crates/bcm2837-lpa/src/emmc/tune_steps_std.rs | 8 +- crates/bcm2837-lpa/src/generic.rs | 86 +++-- crates/bcm2837-lpa/src/generic/raw.rs | 16 +- crates/bcm2837-lpa/src/gpio.rs | 212 ++++++++--- crates/bcm2837-lpa/src/gpio/extra_mux.rs | 10 +- crates/bcm2837-lpa/src/gpio/gpafen0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gpafen1.rs | 134 +++---- crates/bcm2837-lpa/src/gpio/gparen0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gparen1.rs | 134 +++---- crates/bcm2837-lpa/src/gpio/gpclr0.rs | 192 +++++----- crates/bcm2837-lpa/src/gpio/gpclr1.rs | 132 +++---- crates/bcm2837-lpa/src/gpio/gpeds0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gpeds1.rs | 134 +++---- crates/bcm2837-lpa/src/gpio/gpfen0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gpfen1.rs | 134 +++---- crates/bcm2837-lpa/src/gpio/gpfsel0.rs | 82 ++--- crates/bcm2837-lpa/src/gpio/gpfsel1.rs | 82 ++--- crates/bcm2837-lpa/src/gpio/gpfsel2.rs | 82 ++--- crates/bcm2837-lpa/src/gpio/gpfsel3.rs | 82 ++--- crates/bcm2837-lpa/src/gpio/gpfsel4.rs | 82 ++--- crates/bcm2837-lpa/src/gpio/gpfsel5.rs | 34 +- crates/bcm2837-lpa/src/gpio/gphen0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gphen1.rs | 134 +++---- .../src/gpio/gpio_pup_pdn_cntrl_reg0.rs | 102 ++---- .../src/gpio/gpio_pup_pdn_cntrl_reg1.rs | 98 ++--- .../src/gpio/gpio_pup_pdn_cntrl_reg2.rs | 98 ++--- .../src/gpio/gpio_pup_pdn_cntrl_reg3.rs | 38 +- crates/bcm2837-lpa/src/gpio/gplen0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gplen1.rs | 134 +++---- crates/bcm2837-lpa/src/gpio/gplev0.rs | 2 +- crates/bcm2837-lpa/src/gpio/gplev1.rs | 2 +- crates/bcm2837-lpa/src/gpio/gpren0.rs | 194 +++++----- crates/bcm2837-lpa/src/gpio/gpren1.rs | 134 +++---- crates/bcm2837-lpa/src/gpio/gpset0.rs | 192 +++++----- crates/bcm2837-lpa/src/gpio/gpset1.rs | 132 +++---- crates/bcm2837-lpa/src/lib.rs | 17 +- crates/bcm2837-lpa/src/lic.rs | 62 +++- crates/bcm2837-lpa/src/lic/basic_pending.rs | 2 +- crates/bcm2837-lpa/src/lic/disable_1.rs | 194 +++++----- crates/bcm2837-lpa/src/lic/disable_2.rs | 194 +++++----- crates/bcm2837-lpa/src/lic/disable_basic.rs | 50 +-- crates/bcm2837-lpa/src/lic/enable_1.rs | 194 +++++----- crates/bcm2837-lpa/src/lic/enable_2.rs | 194 +++++----- crates/bcm2837-lpa/src/lic/enable_basic.rs | 50 +-- crates/bcm2837-lpa/src/lic/fiq_control.rs | 16 +- crates/bcm2837-lpa/src/lic/pending_1.rs | 2 +- crates/bcm2837-lpa/src/lic/pending_2.rs | 2 +- crates/bcm2837-lpa/src/pwm0.rs | 54 ++- crates/bcm2837-lpa/src/pwm0/ctl.rs | 96 ++--- crates/bcm2837-lpa/src/pwm0/dat1.rs | 2 +- crates/bcm2837-lpa/src/pwm0/dat2.rs | 2 +- crates/bcm2837-lpa/src/pwm0/dmac.rs | 20 +- crates/bcm2837-lpa/src/pwm0/rng1.rs | 2 +- crates/bcm2837-lpa/src/pwm0/rng2.rs | 2 +- crates/bcm2837-lpa/src/pwm0/sta.rs | 80 ++--- crates/bcm2837-lpa/src/spi0.rs | 38 +- crates/bcm2837-lpa/src/spi0/clk.rs | 8 +- crates/bcm2837-lpa/src/spi0/cs.rs | 118 +++--- crates/bcm2837-lpa/src/spi0/dc.rs | 26 +- crates/bcm2837-lpa/src/spi0/dlen.rs | 8 +- crates/bcm2837-lpa/src/spi0/fifo.rs | 8 +- crates/bcm2837-lpa/src/spi0/ltoh.rs | 8 +- crates/bcm2837-lpa/src/spi1.rs | 38 +- crates/bcm2837-lpa/src/spi1/cntl0.rs | 83 +++-- crates/bcm2837-lpa/src/spi1/cntl1.rs | 32 +- crates/bcm2837-lpa/src/spi1/io.rs | 8 +- crates/bcm2837-lpa/src/spi1/peek.rs | 2 +- crates/bcm2837-lpa/src/spi1/stat.rs | 50 +-- crates/bcm2837-lpa/src/spi1/txhold.rs | 8 +- crates/bcm2837-lpa/src/systmr.rs | 44 ++- crates/bcm2837-lpa/src/systmr/c0.rs | 2 +- crates/bcm2837-lpa/src/systmr/c1.rs | 2 +- crates/bcm2837-lpa/src/systmr/c2.rs | 2 +- crates/bcm2837-lpa/src/systmr/c3.rs | 2 +- crates/bcm2837-lpa/src/systmr/chi.rs | 2 +- crates/bcm2837-lpa/src/systmr/clo.rs | 2 +- crates/bcm2837-lpa/src/systmr/cs.rs | 26 +- crates/bcm2837-lpa/src/uart0.rs | 94 +++-- crates/bcm2837-lpa/src/uart0/cr.rs | 56 +-- crates/bcm2837-lpa/src/uart0/dmacr.rs | 20 +- crates/bcm2837-lpa/src/uart0/dr.rs | 32 +- crates/bcm2837-lpa/src/uart0/ecr.rs | 24 +- crates/bcm2837-lpa/src/uart0/fbrd.rs | 8 +- crates/bcm2837-lpa/src/uart0/fr.rs | 56 +-- crates/bcm2837-lpa/src/uart0/ibrd.rs | 8 +- crates/bcm2837-lpa/src/uart0/icr.rs | 66 ++-- crates/bcm2837-lpa/src/uart0/ifls.rs | 14 +- crates/bcm2837-lpa/src/uart0/imsc.rs | 68 ++-- crates/bcm2837-lpa/src/uart0/lcr_h.rs | 44 +-- crates/bcm2837-lpa/src/uart0/mis.rs | 2 +- crates/bcm2837-lpa/src/uart0/ris.rs | 2 +- crates/bcm2837-lpa/src/uart0/rsr.rs | 2 +- crates/bcm2837-lpa/src/uart1.rs | 80 +++-- crates/bcm2837-lpa/src/uart1/baud.rs | 2 +- crates/bcm2837-lpa/src/uart1/baudh.rs | 2 +- crates/bcm2837-lpa/src/uart1/baudl.rs | 2 +- crates/bcm2837-lpa/src/uart1/cntl.rs | 47 ++- crates/bcm2837-lpa/src/uart1/ier.rs | 14 +- crates/bcm2837-lpa/src/uart1/iir.rs | 20 +- crates/bcm2837-lpa/src/uart1/io.rs | 8 +- crates/bcm2837-lpa/src/uart1/lcr.rs | 22 +- crates/bcm2837-lpa/src/uart1/lsr.rs | 26 +- crates/bcm2837-lpa/src/uart1/mcr.rs | 8 +- crates/bcm2837-lpa/src/uart1/msr.rs | 8 +- crates/bcm2837-lpa/src/uart1/scratch.rs | 2 +- crates/bcm2837-lpa/src/uart1/stat.rs | 74 ++-- crates/bcm2837-lpa/src/usb_otg_device.rs | 290 +++++++++++---- .../bcm2837-lpa/src/usb_otg_device/daint.rs | 2 +- .../src/usb_otg_device/daintmsk.rs | 14 +- crates/bcm2837-lpa/src/usb_otg_device/dcfg.rs | 32 +- crates/bcm2837-lpa/src/usb_otg_device/dctl.rs | 50 +-- .../src/usb_otg_device/deachint.rs | 14 +- .../src/usb_otg_device/deachintmsk.rs | 14 +- .../src/usb_otg_device/diepeachmsk1.rs | 56 +-- .../src/usb_otg_device/diepempmsk.rs | 8 +- .../bcm2837-lpa/src/usb_otg_device/diepmsk.rs | 50 +-- .../src/usb_otg_device/doepeachmsk1.rs | 68 ++-- .../bcm2837-lpa/src/usb_otg_device/doepmsk.rs | 44 +-- crates/bcm2837-lpa/src/usb_otg_device/dsts.rs | 2 +- .../bcm2837-lpa/src/usb_otg_device/dthrctl.rs | 38 +- .../src/usb_otg_device/dvbusdis.rs | 8 +- .../src/usb_otg_device/dvbuspulse.rs | 8 +- .../src/usb_otg_device/in_endpoint.rs | 36 +- .../usb_otg_device/in_endpoint/diepctl0.rs | 68 ++-- .../src/usb_otg_device/in_endpoint/diepdma.rs | 8 +- .../src/usb_otg_device/in_endpoint/diepint.rs | 62 ++-- .../usb_otg_device/in_endpoint/dieptsiz.rs | 14 +- .../src/usb_otg_device/in_endpoint/dtxfsts.rs | 2 +- .../src/usb_otg_device/out_endpoint.rs | 30 +- .../usb_otg_device/out_endpoint/doepctl.rs | 32 +- .../usb_otg_device/out_endpoint/doepdma.rs | 8 +- .../usb_otg_device/out_endpoint/doepint.rs | 38 +- .../usb_otg_device/out_endpoint/doeptsiz.rs | 20 +- crates/bcm2837-lpa/src/usb_otg_global.rs | 188 +++++++--- crates/bcm2837-lpa/src/usb_otg_global/cid.rs | 8 +- .../src/usb_otg_global/dieptxf1.rs | 14 +- .../src/usb_otg_global/dieptxf2.rs | 14 +- .../src/usb_otg_global/dieptxf3.rs | 14 +- .../src/usb_otg_global/dieptxf4.rs | 14 +- .../src/usb_otg_global/dieptxf5.rs | 14 +- .../src/usb_otg_global/dieptxf6.rs | 14 +- .../src/usb_otg_global/dieptxf7.rs | 14 +- .../bcm2837-lpa/src/usb_otg_global/gahbcfg.rs | 40 +-- .../bcm2837-lpa/src/usb_otg_global/gccfg.rs | 38 +- .../bcm2837-lpa/src/usb_otg_global/gintmsk.rs | 152 ++++---- .../bcm2837-lpa/src/usb_otg_global/gintsts.rs | 92 ++--- .../src/usb_otg_global/gnptxfsiz_host.rs | 14 +- .../src/usb_otg_global/gnptxsts.rs | 2 +- .../bcm2837-lpa/src/usb_otg_global/gotgctl.rs | 26 +- .../bcm2837-lpa/src/usb_otg_global/gotgint.rs | 38 +- .../bcm2837-lpa/src/usb_otg_global/grstctl.rs | 38 +- .../bcm2837-lpa/src/usb_otg_global/grxfsiz.rs | 8 +- .../src/usb_otg_global/grxstsp_host.rs | 2 +- .../src/usb_otg_global/grxstsp_peripheral.rs | 2 +- .../src/usb_otg_global/grxstsr_host.rs | 2 +- .../src/usb_otg_global/grxstsr_peripheral.rs | 2 +- .../bcm2837-lpa/src/usb_otg_global/gusbcfg.rs | 144 ++++---- .../src/usb_otg_global/hptxfsiz.rs | 14 +- .../src/usb_otg_global/hw_config0.rs | 2 +- .../src/usb_otg_global/hw_direction.rs | 8 +- .../src/usb_otg_global/tx0fsiz_peripheral.rs | 14 +- crates/bcm2837-lpa/src/usb_otg_global/vid.rs | 2 +- crates/bcm2837-lpa/src/usb_otg_host.rs | 144 ++++++-- crates/bcm2837-lpa/src/usb_otg_host/haint.rs | 2 +- .../bcm2837-lpa/src/usb_otg_host/haintmsk.rs | 8 +- crates/bcm2837-lpa/src/usb_otg_host/hcfg.rs | 8 +- crates/bcm2837-lpa/src/usb_otg_host/hfir.rs | 8 +- crates/bcm2837-lpa/src/usb_otg_host/hfnum.rs | 2 +- .../src/usb_otg_host/host_channel.rs | 38 +- .../src/usb_otg_host/host_channel/hcchar.rs | 62 ++-- .../src/usb_otg_host/host_channel/hcdma.rs | 8 +- .../src/usb_otg_host/host_channel/hcint.rs | 68 ++-- .../src/usb_otg_host/host_channel/hcintmsk.rs | 68 ++-- .../src/usb_otg_host/host_channel/hcsplt.rs | 32 +- .../src/usb_otg_host/host_channel/hctsiz.rs | 20 +- crates/bcm2837-lpa/src/usb_otg_host/hprt.rs | 56 +-- .../bcm2837-lpa/src/usb_otg_host/hptxsts.rs | 8 +- crates/bcm2837-lpa/src/usb_otg_pwrclk.rs | 8 +- .../bcm2837-lpa/src/usb_otg_pwrclk/pcgcctl.rs | 92 ++--- crates/bcm2837-lpa/src/vcmailbox.rs | 66 +++- crates/bcm2837-lpa/src/vcmailbox/config0.rs | 8 +- crates/bcm2837-lpa/src/vcmailbox/config1.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/peek0.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/peek1.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/read.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/sender0.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/sender1.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/status0.rs | 2 +- crates/bcm2837-lpa/src/vcmailbox/status1.rs | 2 +- 923 files changed, 26569 insertions(+), 22882 deletions(-) diff --git a/crates/bcm2711-lpa/Cargo.toml b/crates/bcm2711-lpa/Cargo.toml index 1d5d76a..49488e6 100644 --- a/crates/bcm2711-lpa/Cargo.toml +++ b/crates/bcm2711-lpa/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "bcm2711-lpa" -version = "0.2.2" +version = "0.3.0" authors = ["Po-Yi Tsai "] edition = "2021" rust-version = "1.65.0" diff --git a/crates/bcm2711-lpa/src/aux_.rs b/crates/bcm2711-lpa/src/aux_.rs index e442ed8..bb4bdb6 100644 --- a/crates/bcm2711-lpa/src/aux_.rs +++ b/crates/bcm2711-lpa/src/aux_.rs @@ -2,10 +2,20 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + irq: IRQ, + enables: ENABLES, +} +impl RegisterBlock { #[doc = "0x00 - Interrupt status"] - pub irq: IRQ, + #[inline(always)] + pub const fn irq(&self) -> &IRQ { + &self.irq + } #[doc = "0x04 - Enable sub-peripherals"] - pub enables: ENABLES, + #[inline(always)] + pub const fn enables(&self) -> &ENABLES { + &self.enables + } } #[doc = "IRQ (rw) register accessor: Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq`] module"] diff --git a/crates/bcm2711-lpa/src/aux_/enables.rs b/crates/bcm2711-lpa/src/aux_/enables.rs index c84adb4..129a624 100644 --- a/crates/bcm2711-lpa/src/aux_/enables.rs +++ b/crates/bcm2711-lpa/src/aux_/enables.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `UART_1` reader - UART1 enabled"] pub type UART_1_R = crate::BitReader; #[doc = "Field `UART_1` writer - UART1 enabled"] -pub type UART_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 enabled"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 enabled"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 enabled"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 enabled"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UART1 enabled"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UART1 enabled"] #[inline(always)] #[must_use] - pub fn uart_1(&mut self) -> UART_1_W { - UART_1_W::new(self) + pub fn uart_1(&mut self) -> UART_1_W { + UART_1_W::new(self, 0) } #[doc = "Bit 1 - SPI1 enabled"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 enabled"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/aux_/irq.rs b/crates/bcm2711-lpa/src/aux_/irq.rs index 785d02a..1d1c42b 100644 --- a/crates/bcm2711-lpa/src/aux_/irq.rs +++ b/crates/bcm2711-lpa/src/aux_/irq.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `UART_1` reader - UART1 interrupt active"] pub type UART_1_R = crate::BitReader; #[doc = "Field `UART_1` writer - UART1 interrupt active"] -pub type UART_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 interrupt active"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 interrupt active"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 interrupt active"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 interrupt active"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UART1 interrupt active"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UART1 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_1(&mut self) -> UART_1_W { - UART_1_W::new(self) + pub fn uart_1(&mut self) -> UART_1_W { + UART_1_W::new(self, 0) } #[doc = "Bit 1 - SPI1 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0.rs b/crates/bcm2711-lpa/src/bsc0.rs index 0d1c120..0e6821a 100644 --- a/crates/bcm2711-lpa/src/bsc0.rs +++ b/crates/bcm2711-lpa/src/bsc0.rs @@ -2,22 +2,56 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + c: C, + s: S, + dlen: DLEN, + a: A, + fifo: FIFO, + div: DIV, + del: DEL, + clkt: CLKT, +} +impl RegisterBlock { #[doc = "0x00 - Control"] - pub c: C, + #[inline(always)] + pub const fn c(&self) -> &C { + &self.c + } #[doc = "0x04 - Status"] - pub s: S, + #[inline(always)] + pub const fn s(&self) -> &S { + &self.s + } #[doc = "0x08 - Data length"] - pub dlen: DLEN, + #[inline(always)] + pub const fn dlen(&self) -> &DLEN { + &self.dlen + } #[doc = "0x0c - Slave address"] - pub a: A, + #[inline(always)] + pub const fn a(&self) -> &A { + &self.a + } #[doc = "0x10 - Data FIFO"] - pub fifo: FIFO, + #[inline(always)] + pub const fn fifo(&self) -> &FIFO { + &self.fifo + } #[doc = "0x14 - Clock divider"] - pub div: DIV, + #[inline(always)] + pub const fn div(&self) -> &DIV { + &self.div + } #[doc = "0x18 - Data delay (Values must be under CDIV / 2)"] - pub del: DEL, + #[inline(always)] + pub const fn del(&self) -> &DEL { + &self.del + } #[doc = "0x1c - Clock stretch timeout (broken on 283x)"] - pub clkt: CLKT, + #[inline(always)] + pub const fn clkt(&self) -> &CLKT { + &self.clkt + } } #[doc = "C (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`c::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c`] module"] diff --git a/crates/bcm2711-lpa/src/bsc0/a.rs b/crates/bcm2711-lpa/src/bsc0/a.rs index e9669f3..7baa776 100644 --- a/crates/bcm2711-lpa/src/bsc0/a.rs +++ b/crates/bcm2711-lpa/src/bsc0/a.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `ADDR` reader - Slave address"] pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Slave address"] -pub type ADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - Slave address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Slave address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/c.rs b/crates/bcm2711-lpa/src/bsc0/c.rs index 85f86f7..bf50f99 100644 --- a/crates/bcm2711-lpa/src/bsc0/c.rs +++ b/crates/bcm2711-lpa/src/bsc0/c.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `READ` reader - Transfer is read"] pub type READ_R = crate::BitReader; #[doc = "Field `READ` writer - Transfer is read"] -pub type READ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` reader - Clear the FIFO"] pub type CLEAR_R = crate::FieldReader; #[doc = "Field `CLEAR` writer - Clear the FIFO"] -pub type CLEAR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CLEAR_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `ST` reader - Start transfer"] pub type ST_R = crate::BitReader; #[doc = "Field `ST` writer - Start transfer"] -pub type ST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTD` reader - Interrupt on done"] pub type INTD_R = crate::BitReader; #[doc = "Field `INTD` writer - Interrupt on done"] -pub type INTD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTT` reader - Interrupt on TX"] pub type INTT_R = crate::BitReader; #[doc = "Field `INTT` writer - Interrupt on TX"] -pub type INTT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTR` reader - Interrupt on RX"] pub type INTR_R = crate::BitReader; #[doc = "Field `INTR` writer - Interrupt on RX"] -pub type INTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2CEN` reader - I2C Enable"] pub type I2CEN_R = crate::BitReader; #[doc = "Field `I2CEN` writer - I2C Enable"] -pub type I2CEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2CEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer is read"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer is read"] #[inline(always)] #[must_use] - pub fn read(&mut self) -> READ_W { - READ_W::new(self) + pub fn read(&mut self) -> READ_W { + READ_W::new(self, 0) } #[doc = "Bits 4:5 - Clear the FIFO"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W::new(self) + pub fn clear(&mut self) -> CLEAR_W { + CLEAR_W::new(self, 4) } #[doc = "Bit 7 - Start transfer"] #[inline(always)] #[must_use] - pub fn st(&mut self) -> ST_W { - ST_W::new(self) + pub fn st(&mut self) -> ST_W { + ST_W::new(self, 7) } #[doc = "Bit 8 - Interrupt on done"] #[inline(always)] #[must_use] - pub fn intd(&mut self) -> INTD_W { - INTD_W::new(self) + pub fn intd(&mut self) -> INTD_W { + INTD_W::new(self, 8) } #[doc = "Bit 9 - Interrupt on TX"] #[inline(always)] #[must_use] - pub fn intt(&mut self) -> INTT_W { - INTT_W::new(self) + pub fn intt(&mut self) -> INTT_W { + INTT_W::new(self, 9) } #[doc = "Bit 10 - Interrupt on RX"] #[inline(always)] #[must_use] - pub fn intr(&mut self) -> INTR_W { - INTR_W::new(self) + pub fn intr(&mut self) -> INTR_W { + INTR_W::new(self, 10) } #[doc = "Bit 15 - I2C Enable"] #[inline(always)] #[must_use] - pub fn i2cen(&mut self) -> I2CEN_W { - I2CEN_W::new(self) + pub fn i2cen(&mut self) -> I2CEN_W { + I2CEN_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/clkt.rs b/crates/bcm2711-lpa/src/bsc0/clkt.rs index 103f923..52b4821 100644 --- a/crates/bcm2711-lpa/src/bsc0/clkt.rs +++ b/crates/bcm2711-lpa/src/bsc0/clkt.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOUT` reader - Number of SCL clock cycles to wait"] pub type TOUT_R = crate::FieldReader; #[doc = "Field `TOUT` writer - Number of SCL clock cycles to wait"] -pub type TOUT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Number of SCL clock cycles to wait"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Number of SCL clock cycles to wait"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W { - TOUT_W::new(self) + pub fn tout(&mut self) -> TOUT_W { + TOUT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/del.rs b/crates/bcm2711-lpa/src/bsc0/del.rs index 4c0e876..2068915 100644 --- a/crates/bcm2711-lpa/src/bsc0/del.rs +++ b/crates/bcm2711-lpa/src/bsc0/del.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `REDL` reader - Delay before reading after a rising edge"] pub type REDL_R = crate::FieldReader; #[doc = "Field `REDL` writer - Delay before reading after a rising edge"] -pub type REDL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type REDL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `FEDL` reader - Delay before reading after a falling edge"] pub type FEDL_R = crate::FieldReader; #[doc = "Field `FEDL` writer - Delay before reading after a falling edge"] -pub type FEDL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type FEDL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Delay before reading after a rising edge"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Delay before reading after a rising edge"] #[inline(always)] #[must_use] - pub fn redl(&mut self) -> REDL_W { - REDL_W::new(self) + pub fn redl(&mut self) -> REDL_W { + REDL_W::new(self, 0) } #[doc = "Bits 16:31 - Delay before reading after a falling edge"] #[inline(always)] #[must_use] - pub fn fedl(&mut self) -> FEDL_W { - FEDL_W::new(self) + pub fn fedl(&mut self) -> FEDL_W { + FEDL_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/div.rs b/crates/bcm2711-lpa/src/bsc0/div.rs index 9ffd801..b2baf3f 100644 --- a/crates/bcm2711-lpa/src/bsc0/div.rs +++ b/crates/bcm2711-lpa/src/bsc0/div.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CDIV` reader - Divide the source clock"] pub type CDIV_R = crate::FieldReader; #[doc = "Field `CDIV` writer - Divide the source clock"] -pub type CDIV_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type CDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Divide the source clock"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Divide the source clock"] #[inline(always)] #[must_use] - pub fn cdiv(&mut self) -> CDIV_W { - CDIV_W::new(self) + pub fn cdiv(&mut self) -> CDIV_W { + CDIV_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/dlen.rs b/crates/bcm2711-lpa/src/bsc0/dlen.rs index 5c7bb83..c86b386 100644 --- a/crates/bcm2711-lpa/src/bsc0/dlen.rs +++ b/crates/bcm2711-lpa/src/bsc0/dlen.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DLEN` reader - Data length"] pub type DLEN_R = crate::FieldReader; #[doc = "Field `DLEN` writer - Data length"] -pub type DLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Data length"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Data length"] #[inline(always)] #[must_use] - pub fn dlen(&mut self) -> DLEN_W { - DLEN_W::new(self) + pub fn dlen(&mut self) -> DLEN_W { + DLEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/fifo.rs b/crates/bcm2711-lpa/src/bsc0/fifo.rs index 0536908..acea4b1 100644 --- a/crates/bcm2711-lpa/src/bsc0/fifo.rs +++ b/crates/bcm2711-lpa/src/bsc0/fifo.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - Access the FIFO"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Access the FIFO"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Access the FIFO"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Access the FIFO"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/bsc0/s.rs b/crates/bcm2711-lpa/src/bsc0/s.rs index 56cb006..3bbf05a 100644 --- a/crates/bcm2711-lpa/src/bsc0/s.rs +++ b/crates/bcm2711-lpa/src/bsc0/s.rs @@ -7,7 +7,7 @@ pub type TA_R = crate::BitReader; #[doc = "Field `DONE` reader - Transfer done"] pub type DONE_R = crate::BitReader; #[doc = "Field `DONE` writer - Transfer done"] -pub type DONE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TXW` reader - FIFO needs to be written"] pub type TXW_R = crate::BitReader; #[doc = "Field `RXR` reader - FIFO needs to be read"] @@ -23,11 +23,11 @@ pub type RXF_R = crate::BitReader; #[doc = "Field `ERR` reader - Error: No ack"] pub type ERR_R = crate::BitReader; #[doc = "Field `ERR` writer - Error: No ack"] -pub type ERR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLKT` reader - Clock stretch timeout"] pub type CLKT_R = crate::BitReader; #[doc = "Field `CLKT` writer - Clock stretch timeout"] -pub type CLKT_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLKT_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Transfer active"] #[inline(always)] @@ -98,27 +98,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Transfer done"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DONE_W { - DONE_W::new(self) + pub fn done(&mut self) -> DONE_W { + DONE_W::new(self, 1) } #[doc = "Bit 8 - Error: No ack"] #[inline(always)] #[must_use] - pub fn err(&mut self) -> ERR_W { - ERR_W::new(self) + pub fn err(&mut self) -> ERR_W { + ERR_W::new(self, 8) } #[doc = "Bit 9 - Clock stretch timeout"] #[inline(always)] #[must_use] - pub fn clkt(&mut self) -> CLKT_W { - CLKT_W::new(self) + pub fn clkt(&mut self) -> CLKT_W { + CLKT_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/cm_pcm.rs b/crates/bcm2711-lpa/src/cm_pcm.rs index 855e1b0..eafffb7 100644 --- a/crates/bcm2711-lpa/src/cm_pcm.rs +++ b/crates/bcm2711-lpa/src/cm_pcm.rs @@ -2,10 +2,20 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + div: DIV, +} +impl RegisterBlock { #[doc = "0x00 - Control / Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - Clock divisor"] - pub div: DIV, + #[inline(always)] + pub const fn div(&self) -> &DIV { + &self.div + } } #[doc = "CS (rw) register accessor: Control / Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2711-lpa/src/cm_pcm/cs.rs b/crates/bcm2711-lpa/src/cm_pcm/cs.rs index 036729f..753af77 100644 --- a/crates/bcm2711-lpa/src/cm_pcm/cs.rs +++ b/crates/bcm2711-lpa/src/cm_pcm/cs.rs @@ -22,6 +22,8 @@ pub enum SRC_A { PLLC = 6, #[doc = "7: `111`"] HDMI = 7, + #[doc = "0: `0`"] + GND = 0, } impl From for u8 { #[inline(always)] @@ -35,16 +37,16 @@ impl crate::FieldSpec for SRC_A { impl SRC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> SRC_A { match self.bits { - 1 => Some(SRC_A::XOSC), - 2 => Some(SRC_A::TEST0), - 3 => Some(SRC_A::TEST1), - 4 => Some(SRC_A::PLLA), - 5 => Some(SRC_A::PLLB), - 6 => Some(SRC_A::PLLC), - 7 => Some(SRC_A::HDMI), - _ => None, + 1 => SRC_A::XOSC, + 2 => SRC_A::TEST0, + 3 => SRC_A::TEST1, + 4 => SRC_A::PLLA, + 5 => SRC_A::PLLB, + 6 => SRC_A::PLLC, + 7 => SRC_A::HDMI, + _ => SRC_A::GND, } } #[doc = "`1`"] @@ -82,10 +84,15 @@ impl SRC_R { pub fn is_hdmi(&self) -> bool { *self == SRC_A::HDMI } + #[doc = "`0`"] + #[inline(always)] + pub fn is_gnd(&self) -> bool { + matches!(self.variant(), SRC_A::GND) + } } #[doc = "Field `SRC` writer - Clock source"] -pub type SRC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O, SRC_A>; -impl<'a, REG, const O: u8> SRC_W<'a, REG, O> +pub type SRC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, SRC_A>; +impl<'a, REG> SRC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -125,25 +132,30 @@ where pub fn hdmi(self) -> &'a mut crate::W { self.variant(SRC_A::HDMI) } + #[doc = "`0`"] + #[inline(always)] + pub fn gnd(self) -> &'a mut crate::W { + self.variant(SRC_A::GND) + } } #[doc = "Field `ENAB` reader - Enable the clock generator. (Switch SRC first.)"] pub type ENAB_R = crate::BitReader; #[doc = "Field `ENAB` writer - Enable the clock generator. (Switch SRC first.)"] -pub type ENAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENAB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KILL` reader - Stop and reset the generator"] pub type KILL_R = crate::BitReader; #[doc = "Field `KILL` writer - Stop and reset the generator"] -pub type KILL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type KILL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSY` reader - Indicates the clock generator is running"] pub type BUSY_R = crate::BitReader; #[doc = "Field `FLIP` reader - Generate an edge on output. (For testing)"] pub type FLIP_R = crate::BitReader; #[doc = "Field `FLIP` writer - Generate an edge on output. (For testing)"] -pub type FLIP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FLIP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASH` reader - MASH control, stage count"] pub type MASH_R = crate::FieldReader; #[doc = "Field `MASH` writer - MASH control, stage count"] -pub type MASH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type MASH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -161,8 +173,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -219,45 +231,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:3 - Clock source"] #[inline(always)] #[must_use] - pub fn src(&mut self) -> SRC_W { - SRC_W::new(self) + pub fn src(&mut self) -> SRC_W { + SRC_W::new(self, 0) } #[doc = "Bit 4 - Enable the clock generator. (Switch SRC first.)"] #[inline(always)] #[must_use] - pub fn enab(&mut self) -> ENAB_W { - ENAB_W::new(self) + pub fn enab(&mut self) -> ENAB_W { + ENAB_W::new(self, 4) } #[doc = "Bit 5 - Stop and reset the generator"] #[inline(always)] #[must_use] - pub fn kill(&mut self) -> KILL_W { - KILL_W::new(self) + pub fn kill(&mut self) -> KILL_W { + KILL_W::new(self, 5) } #[doc = "Bit 8 - Generate an edge on output. (For testing)"] #[inline(always)] #[must_use] - pub fn flip(&mut self) -> FLIP_W { - FLIP_W::new(self) + pub fn flip(&mut self) -> FLIP_W { + FLIP_W::new(self, 8) } #[doc = "Bits 9:10 - MASH control, stage count"] #[inline(always)] #[must_use] - pub fn mash(&mut self) -> MASH_W { - MASH_W::new(self) + pub fn mash(&mut self) -> MASH_W { + MASH_W::new(self, 9) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/cm_pcm/div.rs b/crates/bcm2711-lpa/src/cm_pcm/div.rs index 825974e..4ded814 100644 --- a/crates/bcm2711-lpa/src/cm_pcm/div.rs +++ b/crates/bcm2711-lpa/src/cm_pcm/div.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `DIVF` reader - Fractional part of divisor"] pub type DIVF_R = crate::FieldReader; #[doc = "Field `DIVF` writer - Fractional part of divisor"] -pub type DIVF_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DIVF_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DIVI` reader - Integer part of divisor"] pub type DIVI_R = crate::FieldReader; #[doc = "Field `DIVI` writer - Integer part of divisor"] -pub type DIVI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DIVI_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -27,8 +27,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,27 +61,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:11 - Fractional part of divisor"] #[inline(always)] #[must_use] - pub fn divf(&mut self) -> DIVF_W { - DIVF_W::new(self) + pub fn divf(&mut self) -> DIVF_W { + DIVF_W::new(self, 0) } #[doc = "Bits 12:23 - Integer part of divisor"] #[inline(always)] #[must_use] - pub fn divi(&mut self) -> DIVI_W { - DIVI_W::new(self) + pub fn divi(&mut self) -> DIVI_W { + DIVI_W::new(self, 12) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc.rs b/crates/bcm2711-lpa/src/emmc.rs index 597a27a..d3fd4a7 100644 --- a/crates/bcm2711-lpa/src/emmc.rs +++ b/crates/bcm2711-lpa/src/emmc.rs @@ -2,63 +2,169 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + arg2: ARG2, + blksizecnt: BLKSIZECNT, + arg1: ARG1, + cmdtm: CMDTM, + resp0: RESP0, + resp1: RESP1, + resp2: RESP2, + resp3: RESP3, + data: DATA, + status: STATUS, + control0: CONTROL0, + control1: CONTROL1, + interrupt: INTERRUPT, + irpt_mask: IRPT_MASK, + irpt_en: IRPT_EN, + control2: CONTROL2, + _reserved16: [u8; 0x10], + force_irpt: FORCE_IRPT, + _reserved17: [u8; 0x1c], + boot_timeout: BOOT_TIMEOUT, + dbg_sel: DBG_SEL, + _reserved19: [u8; 0x08], + exrdfifo_cfg: EXRDFIFO_CFG, + exrdfifo_en: EXRDFIFO_EN, + tune_step: TUNE_STEP, + tune_steps_std: TUNE_STEPS_STD, + tune_steps_ddr: TUNE_STEPS_DDR, + _reserved24: [u8; 0x5c], + spi_int_spt: SPI_INT_SPT, + _reserved25: [u8; 0x08], + slotisr_ver: SLOTISR_VER, +} +impl RegisterBlock { #[doc = "0x00 - Argument for ACMD23 command"] - pub arg2: ARG2, + #[inline(always)] + pub const fn arg2(&self) -> &ARG2 { + &self.arg2 + } #[doc = "0x04 - Numer and size in bytes for data block to be transferred"] - pub blksizecnt: BLKSIZECNT, + #[inline(always)] + pub const fn blksizecnt(&self) -> &BLKSIZECNT { + &self.blksizecnt + } #[doc = "0x08 - Argument for everything but ACMD23"] - pub arg1: ARG1, + #[inline(always)] + pub const fn arg1(&self) -> &ARG1 { + &self.arg1 + } #[doc = "0x0c - Issue commands to the card"] - pub cmdtm: CMDTM, + #[inline(always)] + pub const fn cmdtm(&self) -> &CMDTM { + &self.cmdtm + } #[doc = "0x10 - Status bits of the response"] - pub resp0: RESP0, + #[inline(always)] + pub const fn resp0(&self) -> &RESP0 { + &self.resp0 + } #[doc = "0x14 - Bits 63:32 of CMD2 and CMD10 responses"] - pub resp1: RESP1, + #[inline(always)] + pub const fn resp1(&self) -> &RESP1 { + &self.resp1 + } #[doc = "0x18 - Bits 95:64 of CMD2 and CMD10 responses"] - pub resp2: RESP2, + #[inline(always)] + pub const fn resp2(&self) -> &RESP2 { + &self.resp2 + } #[doc = "0x1c - Bits 127:96 of CMD2 and CMD10 responses"] - pub resp3: RESP3, + #[inline(always)] + pub const fn resp3(&self) -> &RESP3 { + &self.resp3 + } #[doc = "0x20 - Data to/from the card"] - pub data: DATA, + #[inline(always)] + pub const fn data(&self) -> &DATA { + &self.data + } #[doc = "0x24 - Status info for debugging"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &STATUS { + &self.status + } #[doc = "0x28 - Control"] - pub control0: CONTROL0, + #[inline(always)] + pub const fn control0(&self) -> &CONTROL0 { + &self.control0 + } #[doc = "0x2c - Configure"] - pub control1: CONTROL1, + #[inline(always)] + pub const fn control1(&self) -> &CONTROL1 { + &self.control1 + } #[doc = "0x30 - Interrupt flags"] - pub interrupt: INTERRUPT, + #[inline(always)] + pub const fn interrupt(&self) -> &INTERRUPT { + &self.interrupt + } #[doc = "0x34 - Mask interrupts that change in INTERRUPT"] - pub irpt_mask: IRPT_MASK, + #[inline(always)] + pub const fn irpt_mask(&self) -> &IRPT_MASK { + &self.irpt_mask + } #[doc = "0x38 - Enable interrupt to core"] - pub irpt_en: IRPT_EN, + #[inline(always)] + pub const fn irpt_en(&self) -> &IRPT_EN { + &self.irpt_en + } #[doc = "0x3c - Control 2"] - pub control2: CONTROL2, - _reserved16: [u8; 0x10], + #[inline(always)] + pub const fn control2(&self) -> &CONTROL2 { + &self.control2 + } #[doc = "0x50 - Force an interrupt"] - pub force_irpt: FORCE_IRPT, - _reserved17: [u8; 0x1c], + #[inline(always)] + pub const fn force_irpt(&self) -> &FORCE_IRPT { + &self.force_irpt + } #[doc = "0x70 - Number of SD clock cycles to wait for boot"] - pub boot_timeout: BOOT_TIMEOUT, + #[inline(always)] + pub const fn boot_timeout(&self) -> &BOOT_TIMEOUT { + &self.boot_timeout + } #[doc = "0x74 - What submodules are accessed by the debug bus"] - pub dbg_sel: DBG_SEL, - _reserved19: [u8; 0x08], + #[inline(always)] + pub const fn dbg_sel(&self) -> &DBG_SEL { + &self.dbg_sel + } #[doc = "0x80 - Fine tune DMA request generation"] - pub exrdfifo_cfg: EXRDFIFO_CFG, + #[inline(always)] + pub const fn exrdfifo_cfg(&self) -> &EXRDFIFO_CFG { + &self.exrdfifo_cfg + } #[doc = "0x84 - Enable the extension data register"] - pub exrdfifo_en: EXRDFIFO_EN, + #[inline(always)] + pub const fn exrdfifo_en(&self) -> &EXRDFIFO_EN { + &self.exrdfifo_en + } #[doc = "0x88 - Sample clock delay step duration"] - pub tune_step: TUNE_STEP, + #[inline(always)] + pub const fn tune_step(&self) -> &TUNE_STEP { + &self.tune_step + } #[doc = "0x8c - Sample clock delay step count for SDR"] - pub tune_steps_std: TUNE_STEPS_STD, + #[inline(always)] + pub const fn tune_steps_std(&self) -> &TUNE_STEPS_STD { + &self.tune_steps_std + } #[doc = "0x90 - Sample clock delay step count for DDR"] - pub tune_steps_ddr: TUNE_STEPS_DDR, - _reserved24: [u8; 0x5c], + #[inline(always)] + pub const fn tune_steps_ddr(&self) -> &TUNE_STEPS_DDR { + &self.tune_steps_ddr + } #[doc = "0xf0 - Interrupts in SPI mode depend on CS"] - pub spi_int_spt: SPI_INT_SPT, - _reserved25: [u8; 0x08], + #[inline(always)] + pub const fn spi_int_spt(&self) -> &SPI_INT_SPT { + &self.spi_int_spt + } #[doc = "0xfc - Version information and slot interrupt status"] - pub slotisr_ver: SLOTISR_VER, + #[inline(always)] + pub const fn slotisr_ver(&self) -> &SLOTISR_VER { + &self.slotisr_ver + } } #[doc = "ARG2 (rw) register accessor: Argument for ACMD23 command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arg2`] module"] diff --git a/crates/bcm2711-lpa/src/emmc/arg1.rs b/crates/bcm2711-lpa/src/emmc/arg1.rs index 491f890..4dd4150 100644 --- a/crates/bcm2711-lpa/src/emmc/arg1.rs +++ b/crates/bcm2711-lpa/src/emmc/arg1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/arg2.rs b/crates/bcm2711-lpa/src/emmc/arg2.rs index 90678c2..915f1c7 100644 --- a/crates/bcm2711-lpa/src/emmc/arg2.rs +++ b/crates/bcm2711-lpa/src/emmc/arg2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/blksizecnt.rs b/crates/bcm2711-lpa/src/emmc/blksizecnt.rs index c6eec15..1f432bc 100644 --- a/crates/bcm2711-lpa/src/emmc/blksizecnt.rs +++ b/crates/bcm2711-lpa/src/emmc/blksizecnt.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `BLKSIZE` reader - Block size in bytes"] pub type BLKSIZE_R = crate::FieldReader; #[doc = "Field `BLKSIZE` writer - Block size in bytes"] -pub type BLKSIZE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type BLKSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `BLKCNT` reader - Number of blocks to be transferred"] pub type BLKCNT_R = crate::FieldReader; #[doc = "Field `BLKCNT` writer - Number of blocks to be transferred"] -pub type BLKCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type BLKCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:9 - Block size in bytes"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:9 - Block size in bytes"] #[inline(always)] #[must_use] - pub fn blksize(&mut self) -> BLKSIZE_W { - BLKSIZE_W::new(self) + pub fn blksize(&mut self) -> BLKSIZE_W { + BLKSIZE_W::new(self, 0) } #[doc = "Bits 16:31 - Number of blocks to be transferred"] #[inline(always)] #[must_use] - pub fn blkcnt(&mut self) -> BLKCNT_W { - BLKCNT_W::new(self) + pub fn blkcnt(&mut self) -> BLKCNT_W { + BLKCNT_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/boot_timeout.rs b/crates/bcm2711-lpa/src/emmc/boot_timeout.rs index 41d8ff1..1931547 100644 --- a/crates/bcm2711-lpa/src/emmc/boot_timeout.rs +++ b/crates/bcm2711-lpa/src/emmc/boot_timeout.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/cmdtm.rs b/crates/bcm2711-lpa/src/emmc/cmdtm.rs index 6ff28c8..2388784 100644 --- a/crates/bcm2711-lpa/src/emmc/cmdtm.rs +++ b/crates/bcm2711-lpa/src/emmc/cmdtm.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TM_BLKCNT_EN` reader - Enable block counter"] pub type TM_BLKCNT_EN_R = crate::BitReader; #[doc = "Field `TM_BLKCNT_EN` writer - Enable block counter"] -pub type TM_BLKCNT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TM_BLKCNT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TM_AUTO_CMD_EN` reader - Command after completion"] pub type TM_AUTO_CMD_EN_R = crate::FieldReader; #[doc = "Command after completion\n\nValue on reset: 0"] @@ -56,9 +56,8 @@ impl TM_AUTO_CMD_EN_R { } } #[doc = "Field `TM_AUTO_CMD_EN` writer - Command after completion"] -pub type TM_AUTO_CMD_EN_W<'a, REG, const O: u8> = - crate::FieldWriter<'a, REG, 2, O, TM_AUTO_CMD_EN_A>; -impl<'a, REG, const O: u8> TM_AUTO_CMD_EN_W<'a, REG, O> +pub type TM_AUTO_CMD_EN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TM_AUTO_CMD_EN_A>; +impl<'a, REG> TM_AUTO_CMD_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -116,8 +115,8 @@ impl TM_DAT_DIR_R { } } #[doc = "Field `TM_DAT_DIR` writer - Direction of data transfer"] -pub type TM_DAT_DIR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TM_DAT_DIR_A>; -impl<'a, REG, const O: u8> TM_DAT_DIR_W<'a, REG, O> +pub type TM_DAT_DIR_W<'a, REG> = crate::BitWriter<'a, REG, TM_DAT_DIR_A>; +impl<'a, REG> TM_DAT_DIR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -169,8 +168,8 @@ impl TM_MULTI_BLOCK_R { } } #[doc = "Field `TM_MULTI_BLOCK` writer - Type of data transfer"] -pub type TM_MULTI_BLOCK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TM_MULTI_BLOCK_A>; -impl<'a, REG, const O: u8> TM_MULTI_BLOCK_W<'a, REG, O> +pub type TM_MULTI_BLOCK_W<'a, REG> = crate::BitWriter<'a, REG, TM_MULTI_BLOCK_A>; +impl<'a, REG> TM_MULTI_BLOCK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -243,8 +242,8 @@ impl CMD_RSPNS_TYPE_R { } } #[doc = "Field `CMD_RSPNS_TYPE` writer - Type of expected response"] -pub type CMD_RSPNS_TYPE_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, RESPONSE_A>; -impl<'a, REG, const O: u8> CMD_RSPNS_TYPE_W<'a, REG, O> +pub type CMD_RSPNS_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RESPONSE_A>; +impl<'a, REG> CMD_RSPNS_TYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,15 +272,15 @@ where #[doc = "Field `CMD_CRCCHK_EN` reader - Check the responses CRC"] pub type CMD_CRCCHK_EN_R = crate::BitReader; #[doc = "Field `CMD_CRCCHK_EN` writer - Check the responses CRC"] -pub type CMD_CRCCHK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_CRCCHK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_IXCHK_EN` reader - Check that the response has the same command index"] pub type CMD_IXCHK_EN_R = crate::BitReader; #[doc = "Field `CMD_IXCHK_EN` writer - Check that the response has the same command index"] -pub type CMD_IXCHK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_IXCHK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_ISDATA` reader - Command involves data"] pub type CMD_ISDATA_R = crate::BitReader; #[doc = "Field `CMD_ISDATA` writer - Command involves data"] -pub type CMD_ISDATA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_ISDATA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_TYPE` reader - Type of command to be issued"] pub type CMD_TYPE_R = crate::FieldReader; #[doc = "Type of command to be issued\n\nValue on reset: 0"] @@ -340,8 +339,8 @@ impl CMD_TYPE_R { } } #[doc = "Field `CMD_TYPE` writer - Type of command to be issued"] -pub type CMD_TYPE_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, CMD_TYPE_A>; -impl<'a, REG, const O: u8> CMD_TYPE_W<'a, REG, O> +pub type CMD_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CMD_TYPE_A>; +impl<'a, REG> CMD_TYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -370,7 +369,7 @@ where #[doc = "Field `CMD_INDEX` reader - Command index to be issued"] pub type CMD_INDEX_R = crate::FieldReader; #[doc = "Field `CMD_INDEX` writer - Command index to be issued"] -pub type CMD_INDEX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type CMD_INDEX_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bit 1 - Enable block counter"] #[inline(always)] @@ -459,69 +458,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Enable block counter"] #[inline(always)] #[must_use] - pub fn tm_blkcnt_en(&mut self) -> TM_BLKCNT_EN_W { - TM_BLKCNT_EN_W::new(self) + pub fn tm_blkcnt_en(&mut self) -> TM_BLKCNT_EN_W { + TM_BLKCNT_EN_W::new(self, 1) } #[doc = "Bits 2:3 - Command after completion"] #[inline(always)] #[must_use] - pub fn tm_auto_cmd_en(&mut self) -> TM_AUTO_CMD_EN_W { - TM_AUTO_CMD_EN_W::new(self) + pub fn tm_auto_cmd_en(&mut self) -> TM_AUTO_CMD_EN_W { + TM_AUTO_CMD_EN_W::new(self, 2) } #[doc = "Bit 4 - Direction of data transfer"] #[inline(always)] #[must_use] - pub fn tm_dat_dir(&mut self) -> TM_DAT_DIR_W { - TM_DAT_DIR_W::new(self) + pub fn tm_dat_dir(&mut self) -> TM_DAT_DIR_W { + TM_DAT_DIR_W::new(self, 4) } #[doc = "Bit 5 - Type of data transfer"] #[inline(always)] #[must_use] - pub fn tm_multi_block(&mut self) -> TM_MULTI_BLOCK_W { - TM_MULTI_BLOCK_W::new(self) + pub fn tm_multi_block(&mut self) -> TM_MULTI_BLOCK_W { + TM_MULTI_BLOCK_W::new(self, 5) } #[doc = "Bits 16:17 - Type of expected response"] #[inline(always)] #[must_use] - pub fn cmd_rspns_type(&mut self) -> CMD_RSPNS_TYPE_W { - CMD_RSPNS_TYPE_W::new(self) + pub fn cmd_rspns_type(&mut self) -> CMD_RSPNS_TYPE_W { + CMD_RSPNS_TYPE_W::new(self, 16) } #[doc = "Bit 19 - Check the responses CRC"] #[inline(always)] #[must_use] - pub fn cmd_crcchk_en(&mut self) -> CMD_CRCCHK_EN_W { - CMD_CRCCHK_EN_W::new(self) + pub fn cmd_crcchk_en(&mut self) -> CMD_CRCCHK_EN_W { + CMD_CRCCHK_EN_W::new(self, 19) } #[doc = "Bit 20 - Check that the response has the same command index"] #[inline(always)] #[must_use] - pub fn cmd_ixchk_en(&mut self) -> CMD_IXCHK_EN_W { - CMD_IXCHK_EN_W::new(self) + pub fn cmd_ixchk_en(&mut self) -> CMD_IXCHK_EN_W { + CMD_IXCHK_EN_W::new(self, 20) } #[doc = "Bit 21 - Command involves data"] #[inline(always)] #[must_use] - pub fn cmd_isdata(&mut self) -> CMD_ISDATA_W { - CMD_ISDATA_W::new(self) + pub fn cmd_isdata(&mut self) -> CMD_ISDATA_W { + CMD_ISDATA_W::new(self, 21) } #[doc = "Bits 22:23 - Type of command to be issued"] #[inline(always)] #[must_use] - pub fn cmd_type(&mut self) -> CMD_TYPE_W { - CMD_TYPE_W::new(self) + pub fn cmd_type(&mut self) -> CMD_TYPE_W { + CMD_TYPE_W::new(self, 22) } #[doc = "Bits 24:29 - Command index to be issued"] #[inline(always)] #[must_use] - pub fn cmd_index(&mut self) -> CMD_INDEX_W { - CMD_INDEX_W::new(self) + pub fn cmd_index(&mut self) -> CMD_INDEX_W { + CMD_INDEX_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/control0.rs b/crates/bcm2711-lpa/src/emmc/control0.rs index 47fb08f..bb95bf4 100644 --- a/crates/bcm2711-lpa/src/emmc/control0.rs +++ b/crates/bcm2711-lpa/src/emmc/control0.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `HCTL_DWIDTH` reader - Use 4 data lines"] pub type HCTL_DWIDTH_R = crate::BitReader; #[doc = "Field `HCTL_DWIDTH` writer - Use 4 data lines"] -pub type HCTL_DWIDTH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_DWIDTH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HCTL_HS_EN` reader - Enable high speed mode"] pub type HCTL_HS_EN_R = crate::BitReader; #[doc = "Field `HCTL_HS_EN` writer - Enable high speed mode"] -pub type HCTL_HS_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_HS_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HCTL_8BIT` reader - Use 8 data lines"] pub type HCTL_8BIT_R = crate::BitReader; #[doc = "Field `HCTL_8BIT` writer - Use 8 data lines"] -pub type HCTL_8BIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_8BIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_STOP` reader - Stop the current transaction at the next block gap"] pub type GAP_STOP_R = crate::BitReader; #[doc = "Field `GAP_STOP` writer - Stop the current transaction at the next block gap"] -pub type GAP_STOP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_STOP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_RESTART` reader - Restart a transaction stopped by GAP_STOP"] pub type GAP_RESTART_R = crate::BitReader; #[doc = "Field `GAP_RESTART` writer - Restart a transaction stopped by GAP_STOP"] -pub type GAP_RESTART_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_RESTART_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READWAIT_EN` reader - Use DAT2 read/wait protocol"] pub type READWAIT_EN_R = crate::BitReader; #[doc = "Field `READWAIT_EN` writer - Use DAT2 read/wait protocol"] -pub type READWAIT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READWAIT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_IEN` reader - Enable interrupt on block gap"] pub type GAP_IEN_R = crate::BitReader; #[doc = "Field `GAP_IEN` writer - Enable interrupt on block gap"] -pub type GAP_IEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_IEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_MODE` reader - Enable SPI mode"] pub type SPI_MODE_R = crate::BitReader; #[doc = "Field `SPI_MODE` writer - Enable SPI mode"] -pub type SPI_MODE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOT_EN` reader - Boot mode enabled"] pub type BOOT_EN_R = crate::BitReader; #[doc = "Field `BOOT_EN` writer - Boot mode enabled"] -pub type BOOT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ALT_BOOT_EN` reader - Enable alternate boot mode"] pub type ALT_BOOT_EN_R = crate::BitReader; #[doc = "Field `ALT_BOOT_EN` writer - Enable alternate boot mode"] -pub type ALT_BOOT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ALT_BOOT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Use 4 data lines"] #[inline(always)] @@ -112,69 +112,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Use 4 data lines"] #[inline(always)] #[must_use] - pub fn hctl_dwidth(&mut self) -> HCTL_DWIDTH_W { - HCTL_DWIDTH_W::new(self) + pub fn hctl_dwidth(&mut self) -> HCTL_DWIDTH_W { + HCTL_DWIDTH_W::new(self, 1) } #[doc = "Bit 2 - Enable high speed mode"] #[inline(always)] #[must_use] - pub fn hctl_hs_en(&mut self) -> HCTL_HS_EN_W { - HCTL_HS_EN_W::new(self) + pub fn hctl_hs_en(&mut self) -> HCTL_HS_EN_W { + HCTL_HS_EN_W::new(self, 2) } #[doc = "Bit 5 - Use 8 data lines"] #[inline(always)] #[must_use] - pub fn hctl_8bit(&mut self) -> HCTL_8BIT_W { - HCTL_8BIT_W::new(self) + pub fn hctl_8bit(&mut self) -> HCTL_8BIT_W { + HCTL_8BIT_W::new(self, 5) } #[doc = "Bit 16 - Stop the current transaction at the next block gap"] #[inline(always)] #[must_use] - pub fn gap_stop(&mut self) -> GAP_STOP_W { - GAP_STOP_W::new(self) + pub fn gap_stop(&mut self) -> GAP_STOP_W { + GAP_STOP_W::new(self, 16) } #[doc = "Bit 17 - Restart a transaction stopped by GAP_STOP"] #[inline(always)] #[must_use] - pub fn gap_restart(&mut self) -> GAP_RESTART_W { - GAP_RESTART_W::new(self) + pub fn gap_restart(&mut self) -> GAP_RESTART_W { + GAP_RESTART_W::new(self, 17) } #[doc = "Bit 18 - Use DAT2 read/wait protocol"] #[inline(always)] #[must_use] - pub fn readwait_en(&mut self) -> READWAIT_EN_W { - READWAIT_EN_W::new(self) + pub fn readwait_en(&mut self) -> READWAIT_EN_W { + READWAIT_EN_W::new(self, 18) } #[doc = "Bit 19 - Enable interrupt on block gap"] #[inline(always)] #[must_use] - pub fn gap_ien(&mut self) -> GAP_IEN_W { - GAP_IEN_W::new(self) + pub fn gap_ien(&mut self) -> GAP_IEN_W { + GAP_IEN_W::new(self, 19) } #[doc = "Bit 20 - Enable SPI mode"] #[inline(always)] #[must_use] - pub fn spi_mode(&mut self) -> SPI_MODE_W { - SPI_MODE_W::new(self) + pub fn spi_mode(&mut self) -> SPI_MODE_W { + SPI_MODE_W::new(self, 20) } #[doc = "Bit 21 - Boot mode enabled"] #[inline(always)] #[must_use] - pub fn boot_en(&mut self) -> BOOT_EN_W { - BOOT_EN_W::new(self) + pub fn boot_en(&mut self) -> BOOT_EN_W { + BOOT_EN_W::new(self, 21) } #[doc = "Bit 22 - Enable alternate boot mode"] #[inline(always)] #[must_use] - pub fn alt_boot_en(&mut self) -> ALT_BOOT_EN_W { - ALT_BOOT_EN_W::new(self) + pub fn alt_boot_en(&mut self) -> ALT_BOOT_EN_W { + ALT_BOOT_EN_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/control1.rs b/crates/bcm2711-lpa/src/emmc/control1.rs index 40a8765..2171ae4 100644 --- a/crates/bcm2711-lpa/src/emmc/control1.rs +++ b/crates/bcm2711-lpa/src/emmc/control1.rs @@ -5,13 +5,13 @@ pub type W = crate::W; #[doc = "Field `CLK_INTLEN` reader - Enable internal clock"] pub type CLK_INTLEN_R = crate::BitReader; #[doc = "Field `CLK_INTLEN` writer - Enable internal clock"] -pub type CLK_INTLEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLK_INTLEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLK_STABLE` reader - SD Clock stable"] pub type CLK_STABLE_R = crate::BitReader; #[doc = "Field `CLK_EN` reader - SD Clock enable"] pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - SD Clock enable"] -pub type CLK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLK_GENSEL` reader - Mode of clock generation"] pub type CLK_GENSEL_R = crate::BitReader; #[doc = "Mode of clock generation\n\nValue on reset: 0"] @@ -49,8 +49,8 @@ impl CLK_GENSEL_R { } } #[doc = "Field `CLK_GENSEL` writer - Mode of clock generation"] -pub type CLK_GENSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CLK_GENSEL_A>; -impl<'a, REG, const O: u8> CLK_GENSEL_W<'a, REG, O> +pub type CLK_GENSEL_W<'a, REG> = crate::BitWriter<'a, REG, CLK_GENSEL_A>; +impl<'a, REG> CLK_GENSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -68,27 +68,27 @@ where #[doc = "Field `CLK_FREQ_MS2` reader - Clock base divider MSBs"] pub type CLK_FREQ_MS2_R = crate::FieldReader; #[doc = "Field `CLK_FREQ_MS2` writer - Clock base divider MSBs"] -pub type CLK_FREQ_MS2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CLK_FREQ_MS2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CLK_FREQ8` reader - Clock base divider LSB"] pub type CLK_FREQ8_R = crate::FieldReader; #[doc = "Field `CLK_FREQ8` writer - Clock base divider LSB"] -pub type CLK_FREQ8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CLK_FREQ8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DATA_TOUNIT` reader - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] pub type DATA_TOUNIT_R = crate::FieldReader; #[doc = "Field `DATA_TOUNIT` writer - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] -pub type DATA_TOUNIT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DATA_TOUNIT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SRST_HC` reader - Reset the complete host circuit"] pub type SRST_HC_R = crate::BitReader; #[doc = "Field `SRST_HC` writer - Reset the complete host circuit"] -pub type SRST_HC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_HC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRST_CMD` reader - Reset the command handling circuit"] pub type SRST_CMD_R = crate::BitReader; #[doc = "Field `SRST_CMD` writer - Reset the command handling circuit"] -pub type SRST_CMD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_CMD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRST_DATA` reader - Reset the data handling circuit"] pub type SRST_DATA_R = crate::BitReader; #[doc = "Field `SRST_DATA` writer - Reset the data handling circuit"] -pub type SRST_DATA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_DATA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable internal clock"] #[inline(always)] @@ -165,63 +165,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable internal clock"] #[inline(always)] #[must_use] - pub fn clk_intlen(&mut self) -> CLK_INTLEN_W { - CLK_INTLEN_W::new(self) + pub fn clk_intlen(&mut self) -> CLK_INTLEN_W { + CLK_INTLEN_W::new(self, 0) } #[doc = "Bit 2 - SD Clock enable"] #[inline(always)] #[must_use] - pub fn clk_en(&mut self) -> CLK_EN_W { - CLK_EN_W::new(self) + pub fn clk_en(&mut self) -> CLK_EN_W { + CLK_EN_W::new(self, 2) } #[doc = "Bit 5 - Mode of clock generation"] #[inline(always)] #[must_use] - pub fn clk_gensel(&mut self) -> CLK_GENSEL_W { - CLK_GENSEL_W::new(self) + pub fn clk_gensel(&mut self) -> CLK_GENSEL_W { + CLK_GENSEL_W::new(self, 5) } #[doc = "Bits 6:7 - Clock base divider MSBs"] #[inline(always)] #[must_use] - pub fn clk_freq_ms2(&mut self) -> CLK_FREQ_MS2_W { - CLK_FREQ_MS2_W::new(self) + pub fn clk_freq_ms2(&mut self) -> CLK_FREQ_MS2_W { + CLK_FREQ_MS2_W::new(self, 6) } #[doc = "Bits 8:15 - Clock base divider LSB"] #[inline(always)] #[must_use] - pub fn clk_freq8(&mut self) -> CLK_FREQ8_W { - CLK_FREQ8_W::new(self) + pub fn clk_freq8(&mut self) -> CLK_FREQ8_W { + CLK_FREQ8_W::new(self, 8) } #[doc = "Bits 16:19 - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] #[inline(always)] #[must_use] - pub fn data_tounit(&mut self) -> DATA_TOUNIT_W { - DATA_TOUNIT_W::new(self) + pub fn data_tounit(&mut self) -> DATA_TOUNIT_W { + DATA_TOUNIT_W::new(self, 16) } #[doc = "Bit 24 - Reset the complete host circuit"] #[inline(always)] #[must_use] - pub fn srst_hc(&mut self) -> SRST_HC_W { - SRST_HC_W::new(self) + pub fn srst_hc(&mut self) -> SRST_HC_W { + SRST_HC_W::new(self, 24) } #[doc = "Bit 25 - Reset the command handling circuit"] #[inline(always)] #[must_use] - pub fn srst_cmd(&mut self) -> SRST_CMD_W { - SRST_CMD_W::new(self) + pub fn srst_cmd(&mut self) -> SRST_CMD_W { + SRST_CMD_W::new(self, 25) } #[doc = "Bit 26 - Reset the data handling circuit"] #[inline(always)] #[must_use] - pub fn srst_data(&mut self) -> SRST_DATA_W { - SRST_DATA_W::new(self) + pub fn srst_data(&mut self) -> SRST_DATA_W { + SRST_DATA_W::new(self, 26) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/control2.rs b/crates/bcm2711-lpa/src/emmc/control2.rs index bb052fc..0e5ab02 100644 --- a/crates/bcm2711-lpa/src/emmc/control2.rs +++ b/crates/bcm2711-lpa/src/emmc/control2.rs @@ -80,8 +80,8 @@ impl UHSMODE_R { } } #[doc = "Field `UHSMODE` writer - Select the speed of the SD card"] -pub type UHSMODE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O, UHSMODE_A>; -impl<'a, REG, const O: u8> UHSMODE_W<'a, REG, O> +pub type UHSMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, UHSMODE_A>; +impl<'a, REG> UHSMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -115,11 +115,11 @@ where #[doc = "Field `TUNEON` reader - SD Clock tune in progress"] pub type TUNEON_R = crate::BitReader; #[doc = "Field `TUNEON` writer - SD Clock tune in progress"] -pub type TUNEON_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TUNEON_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TUNED` reader - Tuned clock is used for sampling data"] pub type TUNED_R = crate::BitReader; #[doc = "Field `TUNED` writer - Tuned clock is used for sampling data"] -pub type TUNED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TUNED_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Auto command not executed due to an error"] #[inline(always)] @@ -184,27 +184,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 16:18 - Select the speed of the SD card"] #[inline(always)] #[must_use] - pub fn uhsmode(&mut self) -> UHSMODE_W { - UHSMODE_W::new(self) + pub fn uhsmode(&mut self) -> UHSMODE_W { + UHSMODE_W::new(self, 16) } #[doc = "Bit 22 - SD Clock tune in progress"] #[inline(always)] #[must_use] - pub fn tuneon(&mut self) -> TUNEON_W { - TUNEON_W::new(self) + pub fn tuneon(&mut self) -> TUNEON_W { + TUNEON_W::new(self, 22) } #[doc = "Bit 23 - Tuned clock is used for sampling data"] #[inline(always)] #[must_use] - pub fn tuned(&mut self) -> TUNED_W { - TUNED_W::new(self) + pub fn tuned(&mut self) -> TUNED_W { + TUNED_W::new(self, 23) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/data.rs b/crates/bcm2711-lpa/src/emmc/data.rs index ac2280f..2f5aef2 100644 --- a/crates/bcm2711-lpa/src/emmc/data.rs +++ b/crates/bcm2711-lpa/src/emmc/data.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/dbg_sel.rs b/crates/bcm2711-lpa/src/emmc/dbg_sel.rs index 343a4db..a308d75 100644 --- a/crates/bcm2711-lpa/src/emmc/dbg_sel.rs +++ b/crates/bcm2711-lpa/src/emmc/dbg_sel.rs @@ -39,8 +39,8 @@ impl SELECT_R { } } #[doc = "Field `SELECT` writer - "] -pub type SELECT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SELECT_A>; -impl<'a, REG, const O: u8> SELECT_W<'a, REG, O> +pub type SELECT_W<'a, REG> = crate::BitWriter<'a, REG, SELECT_A>; +impl<'a, REG> SELECT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -71,15 +71,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0"] #[inline(always)] #[must_use] - pub fn select(&mut self) -> SELECT_W { - SELECT_W::new(self) + pub fn select(&mut self) -> SELECT_W { + SELECT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/exrdfifo_cfg.rs b/crates/bcm2711-lpa/src/emmc/exrdfifo_cfg.rs index 13440a1..ba96a18 100644 --- a/crates/bcm2711-lpa/src/emmc/exrdfifo_cfg.rs +++ b/crates/bcm2711-lpa/src/emmc/exrdfifo_cfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RD_THRSH` reader - Read threshold in 32 bit words"] pub type RD_THRSH_R = crate::FieldReader; #[doc = "Field `RD_THRSH` writer - Read threshold in 32 bit words"] -pub type RD_THRSH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type RD_THRSH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Read threshold in 32 bit words"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Read threshold in 32 bit words"] #[inline(always)] #[must_use] - pub fn rd_thrsh(&mut self) -> RD_THRSH_W { - RD_THRSH_W::new(self) + pub fn rd_thrsh(&mut self) -> RD_THRSH_W { + RD_THRSH_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/exrdfifo_en.rs b/crates/bcm2711-lpa/src/emmc/exrdfifo_en.rs index e6b6583..464a5fe 100644 --- a/crates/bcm2711-lpa/src/emmc/exrdfifo_en.rs +++ b/crates/bcm2711-lpa/src/emmc/exrdfifo_en.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `ENABLE` reader - Enable the extension FIFO"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable the extension FIFO"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable the extension FIFO"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable the extension FIFO"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/force_irpt.rs b/crates/bcm2711-lpa/src/emmc/force_irpt.rs index 682b8fe..2404f46 100644 --- a/crates/bcm2711-lpa/src/emmc/force_irpt.rs +++ b/crates/bcm2711-lpa/src/emmc/force_irpt.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/interrupt.rs b/crates/bcm2711-lpa/src/emmc/interrupt.rs index c28598f..46231a7 100644 --- a/crates/bcm2711-lpa/src/emmc/interrupt.rs +++ b/crates/bcm2711-lpa/src/emmc/interrupt.rs @@ -5,73 +5,73 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERR` reader - An error has occured"] pub type ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -190,111 +190,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/irpt_en.rs b/crates/bcm2711-lpa/src/emmc/irpt_en.rs index af7bc80..143dd3b 100644 --- a/crates/bcm2711-lpa/src/emmc/irpt_en.rs +++ b/crates/bcm2711-lpa/src/emmc/irpt_en.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/irpt_mask.rs b/crates/bcm2711-lpa/src/emmc/irpt_mask.rs index e8dc746..e3281ca 100644 --- a/crates/bcm2711-lpa/src/emmc/irpt_mask.rs +++ b/crates/bcm2711-lpa/src/emmc/irpt_mask.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/resp0.rs b/crates/bcm2711-lpa/src/emmc/resp0.rs index 79ea5ca..e14de29 100644 --- a/crates/bcm2711-lpa/src/emmc/resp0.rs +++ b/crates/bcm2711-lpa/src/emmc/resp0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/resp1.rs b/crates/bcm2711-lpa/src/emmc/resp1.rs index 12a2f9a..9c6a866 100644 --- a/crates/bcm2711-lpa/src/emmc/resp1.rs +++ b/crates/bcm2711-lpa/src/emmc/resp1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/resp2.rs b/crates/bcm2711-lpa/src/emmc/resp2.rs index 5a51d34..273382e 100644 --- a/crates/bcm2711-lpa/src/emmc/resp2.rs +++ b/crates/bcm2711-lpa/src/emmc/resp2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/resp3.rs b/crates/bcm2711-lpa/src/emmc/resp3.rs index 65ef18f..3f290da 100644 --- a/crates/bcm2711-lpa/src/emmc/resp3.rs +++ b/crates/bcm2711-lpa/src/emmc/resp3.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/emmc/slotisr_ver.rs b/crates/bcm2711-lpa/src/emmc/slotisr_ver.rs index 0db90df..eb34fd8 100644 --- a/crates/bcm2711-lpa/src/emmc/slotisr_ver.rs +++ b/crates/bcm2711-lpa/src/emmc/slotisr_ver.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `SLOT_STATUS` reader - OR of interrupt and wakeup signals for each slot"] pub type SLOT_STATUS_R = crate::FieldReader; #[doc = "Field `SLOT_STATUS` writer - OR of interrupt and wakeup signals for each slot"] -pub type SLOT_STATUS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SLOT_STATUS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SDVERSION` reader - Host controller specification version"] pub type SDVERSION_R = crate::FieldReader; #[doc = "Field `SDVERSION` writer - Host controller specification version"] -pub type SDVERSION_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDVERSION_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VENDOR` reader - Vendor version number"] pub type VENDOR_R = crate::FieldReader; #[doc = "Field `VENDOR` writer - Vendor version number"] -pub type VENDOR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VENDOR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - OR of interrupt and wakeup signals for each slot"] #[inline(always)] @@ -45,27 +45,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - OR of interrupt and wakeup signals for each slot"] #[inline(always)] #[must_use] - pub fn slot_status(&mut self) -> SLOT_STATUS_W { - SLOT_STATUS_W::new(self) + pub fn slot_status(&mut self) -> SLOT_STATUS_W { + SLOT_STATUS_W::new(self, 0) } #[doc = "Bits 16:23 - Host controller specification version"] #[inline(always)] #[must_use] - pub fn sdversion(&mut self) -> SDVERSION_W { - SDVERSION_W::new(self) + pub fn sdversion(&mut self) -> SDVERSION_W { + SDVERSION_W::new(self, 16) } #[doc = "Bits 24:31 - Vendor version number"] #[inline(always)] #[must_use] - pub fn vendor(&mut self) -> VENDOR_W { - VENDOR_W::new(self) + pub fn vendor(&mut self) -> VENDOR_W { + VENDOR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/spi_int_spt.rs b/crates/bcm2711-lpa/src/emmc/spi_int_spt.rs index ba304fe..7c4c0ae 100644 --- a/crates/bcm2711-lpa/src/emmc/spi_int_spt.rs +++ b/crates/bcm2711-lpa/src/emmc/spi_int_spt.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `SELECT` reader - "] pub type SELECT_R = crate::FieldReader; #[doc = "Field `SELECT` writer - "] -pub type SELECT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SELECT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7"] #[inline(always)] #[must_use] - pub fn select(&mut self) -> SELECT_W { - SELECT_W::new(self) + pub fn select(&mut self) -> SELECT_W { + SELECT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/status.rs b/crates/bcm2711-lpa/src/emmc/status.rs index 2b07e21..c4dbd6d 100644 --- a/crates/bcm2711-lpa/src/emmc/status.rs +++ b/crates/bcm2711-lpa/src/emmc/status.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `CMD_INHIBIT` reader - Command line still in use"] pub type CMD_INHIBIT_R = crate::BitReader; #[doc = "Field `CMD_INHIBIT` writer - Command line still in use"] -pub type CMD_INHIBIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_INHIBIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_INHIBIT` reader - Data lines still in use"] pub type DAT_INHIBIT_R = crate::BitReader; #[doc = "Field `DAT_INHIBIT` writer - Data lines still in use"] -pub type DAT_INHIBIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DAT_INHIBIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_ACTIVE` reader - At least one data line is active"] pub type DAT_ACTIVE_R = crate::BitReader; #[doc = "Field `DAT_ACTIVE` writer - At least one data line is active"] -pub type DAT_ACTIVE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DAT_ACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_TRANSFER` reader - Write transfer is active"] pub type WRITE_TRANSFER_R = crate::BitReader; #[doc = "Field `WRITE_TRANSFER` writer - Write transfer is active"] -pub type WRITE_TRANSFER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_TRANSFER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_TRANSFER` reader - Read transfer is active"] pub type READ_TRANSFER_R = crate::BitReader; #[doc = "Field `READ_TRANSFER` writer - Read transfer is active"] -pub type READ_TRANSFER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_TRANSFER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFFER_WRITE_ENABLE` reader - The buffer has space for new data"] pub type BUFFER_WRITE_ENABLE_R = crate::BitReader; #[doc = "Field `BUFFER_WRITE_ENABLE` writer - The buffer has space for new data"] -pub type BUFFER_WRITE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUFFER_WRITE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFFER_READ_ENABLE` reader - New data is available to read"] pub type BUFFER_READ_ENABLE_R = crate::BitReader; #[doc = "Field `BUFFER_READ_ENABLE` writer - New data is available to read"] -pub type BUFFER_READ_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUFFER_READ_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_LEVEL0` reader - Value of DAT\\[3:0\\]"] pub type DAT_LEVEL0_R = crate::FieldReader; #[doc = "Field `DAT_LEVEL0` writer - Value of DAT\\[3:0\\]"] -pub type DAT_LEVEL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DAT_LEVEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CMD_LEVEL` reader - Value of CMD"] pub type CMD_LEVEL_R = crate::BitReader; #[doc = "Field `CMD_LEVEL` writer - Value of CMD"] -pub type CMD_LEVEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_LEVEL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_LEVEL1` reader - Value of DAT\\[7:4\\]"] pub type DAT_LEVEL1_R = crate::FieldReader; #[doc = "Field `DAT_LEVEL1` writer - Value of DAT\\[7:4\\]"] -pub type DAT_LEVEL1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DAT_LEVEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Command line still in use"] #[inline(always)] @@ -124,69 +124,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command line still in use"] #[inline(always)] #[must_use] - pub fn cmd_inhibit(&mut self) -> CMD_INHIBIT_W { - CMD_INHIBIT_W::new(self) + pub fn cmd_inhibit(&mut self) -> CMD_INHIBIT_W { + CMD_INHIBIT_W::new(self, 0) } #[doc = "Bit 1 - Data lines still in use"] #[inline(always)] #[must_use] - pub fn dat_inhibit(&mut self) -> DAT_INHIBIT_W { - DAT_INHIBIT_W::new(self) + pub fn dat_inhibit(&mut self) -> DAT_INHIBIT_W { + DAT_INHIBIT_W::new(self, 1) } #[doc = "Bit 2 - At least one data line is active"] #[inline(always)] #[must_use] - pub fn dat_active(&mut self) -> DAT_ACTIVE_W { - DAT_ACTIVE_W::new(self) + pub fn dat_active(&mut self) -> DAT_ACTIVE_W { + DAT_ACTIVE_W::new(self, 2) } #[doc = "Bit 8 - Write transfer is active"] #[inline(always)] #[must_use] - pub fn write_transfer(&mut self) -> WRITE_TRANSFER_W { - WRITE_TRANSFER_W::new(self) + pub fn write_transfer(&mut self) -> WRITE_TRANSFER_W { + WRITE_TRANSFER_W::new(self, 8) } #[doc = "Bit 9 - Read transfer is active"] #[inline(always)] #[must_use] - pub fn read_transfer(&mut self) -> READ_TRANSFER_W { - READ_TRANSFER_W::new(self) + pub fn read_transfer(&mut self) -> READ_TRANSFER_W { + READ_TRANSFER_W::new(self, 9) } #[doc = "Bit 10 - The buffer has space for new data"] #[inline(always)] #[must_use] - pub fn buffer_write_enable(&mut self) -> BUFFER_WRITE_ENABLE_W { - BUFFER_WRITE_ENABLE_W::new(self) + pub fn buffer_write_enable(&mut self) -> BUFFER_WRITE_ENABLE_W { + BUFFER_WRITE_ENABLE_W::new(self, 10) } #[doc = "Bit 11 - New data is available to read"] #[inline(always)] #[must_use] - pub fn buffer_read_enable(&mut self) -> BUFFER_READ_ENABLE_W { - BUFFER_READ_ENABLE_W::new(self) + pub fn buffer_read_enable(&mut self) -> BUFFER_READ_ENABLE_W { + BUFFER_READ_ENABLE_W::new(self, 11) } #[doc = "Bits 20:23 - Value of DAT\\[3:0\\]"] #[inline(always)] #[must_use] - pub fn dat_level0(&mut self) -> DAT_LEVEL0_W { - DAT_LEVEL0_W::new(self) + pub fn dat_level0(&mut self) -> DAT_LEVEL0_W { + DAT_LEVEL0_W::new(self, 20) } #[doc = "Bit 24 - Value of CMD"] #[inline(always)] #[must_use] - pub fn cmd_level(&mut self) -> CMD_LEVEL_W { - CMD_LEVEL_W::new(self) + pub fn cmd_level(&mut self) -> CMD_LEVEL_W { + CMD_LEVEL_W::new(self, 24) } #[doc = "Bits 25:28 - Value of DAT\\[7:4\\]"] #[inline(always)] #[must_use] - pub fn dat_level1(&mut self) -> DAT_LEVEL1_W { - DAT_LEVEL1_W::new(self) + pub fn dat_level1(&mut self) -> DAT_LEVEL1_W { + DAT_LEVEL1_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/tune_step.rs b/crates/bcm2711-lpa/src/emmc/tune_step.rs index aa0dd84..50aaa04 100644 --- a/crates/bcm2711-lpa/src/emmc/tune_step.rs +++ b/crates/bcm2711-lpa/src/emmc/tune_step.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DELAY` reader - "] pub type DELAY_R = crate::FieldReader; #[doc = "Field `DELAY` writer - "] -pub type DELAY_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2"] #[inline(always)] #[must_use] - pub fn delay(&mut self) -> DELAY_W { - DELAY_W::new(self) + pub fn delay(&mut self) -> DELAY_W { + DELAY_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/tune_steps_ddr.rs b/crates/bcm2711-lpa/src/emmc/tune_steps_ddr.rs index c4f1dd8..e1e156e 100644 --- a/crates/bcm2711-lpa/src/emmc/tune_steps_ddr.rs +++ b/crates/bcm2711-lpa/src/emmc/tune_steps_ddr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `STEPS` reader - "] pub type STEPS_R = crate::FieldReader; #[doc = "Field `STEPS` writer - "] -pub type STEPS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type STEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5"] #[inline(always)] #[must_use] - pub fn steps(&mut self) -> STEPS_W { - STEPS_W::new(self) + pub fn steps(&mut self) -> STEPS_W { + STEPS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/emmc/tune_steps_std.rs b/crates/bcm2711-lpa/src/emmc/tune_steps_std.rs index cf65897..6eb3de0 100644 --- a/crates/bcm2711-lpa/src/emmc/tune_steps_std.rs +++ b/crates/bcm2711-lpa/src/emmc/tune_steps_std.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `STEPS` reader - "] pub type STEPS_R = crate::FieldReader; #[doc = "Field `STEPS` writer - "] -pub type STEPS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type STEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5"] #[inline(always)] #[must_use] - pub fn steps(&mut self) -> STEPS_W { - STEPS_W::new(self) + pub fn steps(&mut self) -> STEPS_W { + STEPS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/generic.rs b/crates/bcm2711-lpa/src/generic.rs index a34573a..453ce21 100644 --- a/crates/bcm2711-lpa/src/generic.rs +++ b/crates/bcm2711-lpa/src/generic.rs @@ -316,12 +316,10 @@ pub struct Safe; #[doc(hidden)] pub struct Unsafe; #[doc = " Write field Proxy with unsafe `bits`"] -pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Unsafe>; +pub type FieldWriter<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Unsafe>; #[doc = " Write field Proxy with safe `bits`"] -pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Safe>; -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> +pub type FieldWriterSafe<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Safe>; +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -329,6 +327,16 @@ where { #[doc = " Field width"] pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes raw bits to the field"] #[doc = ""] #[doc = " # Safety"] @@ -336,8 +344,8 @@ where #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] #[inline(always)] pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -346,7 +354,7 @@ where unsafe { self.bits(FI::Ux::from(variant)) } } } -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> +impl<'a, REG, const WI: u8, FI> FieldWriterSafe<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -354,11 +362,21 @@ where { #[doc = " Field width"] pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -372,19 +390,29 @@ macro_rules! bit_proxy { #[doc(hidden)] pub struct $mwv; #[doc = " Bit-wise write field proxy"] - pub type $writer<'a, REG, const O: u8, FI = bool> = raw::BitWriter<'a, REG, O, FI, $mwv>; - impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> + pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>; + impl<'a, REG, FI> $writer<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, { #[doc = " Field width"] pub const WIDTH: u8 = 1; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + Self::WIDTH + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes bit to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF; + self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -402,7 +430,7 @@ bit_proxy!(BitWriter1C, Bit1C); bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -410,17 +438,17 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -428,11 +456,11 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -440,11 +468,11 @@ where #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -452,11 +480,11 @@ where #[doc = "Clears the field bit by passing one"] #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -464,11 +492,11 @@ where #[doc = "Sets the field bit by passing zero"] #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -476,11 +504,11 @@ where #[doc = "Toggle the field bit by passing one"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -488,7 +516,7 @@ where #[doc = "Toggle the field bit by passing zero"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } diff --git a/crates/bcm2711-lpa/src/generic/raw.rs b/crates/bcm2711-lpa/src/generic/raw.rs index 4ab1635..81f5779 100644 --- a/crates/bcm2711-lpa/src/generic/raw.rs +++ b/crates/bcm2711-lpa/src/generic/raw.rs @@ -41,15 +41,16 @@ impl BitReader { } } } -pub struct FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> +pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, FI: FieldSpec, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, Safety)>, } -impl<'a, REG, const WI: u8, const O: u8, FI, Safety> FieldWriter<'a, REG, WI, O, FI, Safety> +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -57,22 +58,24 @@ where #[doc = " Creates a new instance of the writer"] #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } } -pub struct BitWriter<'a, REG, const O: u8, FI = bool, M = BitM> +pub struct BitWriter<'a, REG, FI = bool, M = BitM> where REG: Writable + RegisterSpec, bool: From, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, M)>, } -impl<'a, REG, const O: u8, FI, M> BitWriter<'a, REG, O, FI, M> +impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M> where REG: Writable + RegisterSpec, bool: From, @@ -80,9 +83,10 @@ where #[doc = " Creates a new instance of the writer"] #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } diff --git a/crates/bcm2711-lpa/src/gic_cpu.rs b/crates/bcm2711-lpa/src/gic_cpu.rs index 5e6916e..ed6d023 100644 --- a/crates/bcm2711-lpa/src/gic_cpu.rs +++ b/crates/bcm2711-lpa/src/gic_cpu.rs @@ -2,40 +2,102 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + gicc_ctlr: GICC_CTLR, + gicc_pmr: GICC_PMR, + gicc_bpr: GICC_BPR, + gicc_iar: GICC_IAR, + gicc_eoir: GICC_EOIR, + gicc_rpr: GICC_RPR, + gicc_hppir: GICC_HPPIR, + gicc_abpr: GICC_ABPR, + gicc_aiar: GICC_AIAR, + gicc_aeoir: GICC_AEOIR, + gicc_ahppir: GICC_AHPPIR, + _reserved11: [u8; 0xa4], + gicc_apr0: GICC_APR0, + _reserved12: [u8; 0x0c], + gicc_nsapr0: GICC_NSAPR0, + _reserved13: [u8; 0x18], + gicc_iidr: GICC_IIDR, + _reserved14: [u8; 0x0f00], + gicc_dir: GICC_DIR, +} +impl RegisterBlock { #[doc = "0x00 - CPU Interface Control"] - pub gicc_ctlr: GICC_CTLR, + #[inline(always)] + pub const fn gicc_ctlr(&self) -> &GICC_CTLR { + &self.gicc_ctlr + } #[doc = "0x04 - Interrupt Priority Mask"] - pub gicc_pmr: GICC_PMR, + #[inline(always)] + pub const fn gicc_pmr(&self) -> &GICC_PMR { + &self.gicc_pmr + } #[doc = "0x08 - Binary Point"] - pub gicc_bpr: GICC_BPR, + #[inline(always)] + pub const fn gicc_bpr(&self) -> &GICC_BPR { + &self.gicc_bpr + } #[doc = "0x0c - Interrupt Acknowledge"] - pub gicc_iar: GICC_IAR, + #[inline(always)] + pub const fn gicc_iar(&self) -> &GICC_IAR { + &self.gicc_iar + } #[doc = "0x10 - End of Interrupt"] - pub gicc_eoir: GICC_EOIR, + #[inline(always)] + pub const fn gicc_eoir(&self) -> &GICC_EOIR { + &self.gicc_eoir + } #[doc = "0x14 - Running Priority"] - pub gicc_rpr: GICC_RPR, + #[inline(always)] + pub const fn gicc_rpr(&self) -> &GICC_RPR { + &self.gicc_rpr + } #[doc = "0x18 - Highest Priority Pending Interrupt"] - pub gicc_hppir: GICC_HPPIR, + #[inline(always)] + pub const fn gicc_hppir(&self) -> &GICC_HPPIR { + &self.gicc_hppir + } #[doc = "0x1c - Aliased Binary Point"] - pub gicc_abpr: GICC_ABPR, + #[inline(always)] + pub const fn gicc_abpr(&self) -> &GICC_ABPR { + &self.gicc_abpr + } #[doc = "0x20 - Aliased Interrupt Acknowledge"] - pub gicc_aiar: GICC_AIAR, + #[inline(always)] + pub const fn gicc_aiar(&self) -> &GICC_AIAR { + &self.gicc_aiar + } #[doc = "0x24 - Aliased End of Interrupt"] - pub gicc_aeoir: GICC_AEOIR, + #[inline(always)] + pub const fn gicc_aeoir(&self) -> &GICC_AEOIR { + &self.gicc_aeoir + } #[doc = "0x28 - Aliased Highest Priority Pending Interrupt"] - pub gicc_ahppir: GICC_AHPPIR, - _reserved11: [u8; 0xa4], + #[inline(always)] + pub const fn gicc_ahppir(&self) -> &GICC_AHPPIR { + &self.gicc_ahppir + } #[doc = "0xd0 - Active Priority"] - pub gicc_apr0: GICC_APR0, - _reserved12: [u8; 0x0c], + #[inline(always)] + pub const fn gicc_apr0(&self) -> &GICC_APR0 { + &self.gicc_apr0 + } #[doc = "0xe0 - Non-Secure Active Priority"] - pub gicc_nsapr0: GICC_NSAPR0, - _reserved13: [u8; 0x18], + #[inline(always)] + pub const fn gicc_nsapr0(&self) -> &GICC_NSAPR0 { + &self.gicc_nsapr0 + } #[doc = "0xfc - CPU Interface Identification Register"] - pub gicc_iidr: GICC_IIDR, - _reserved14: [u8; 0x0f00], + #[inline(always)] + pub const fn gicc_iidr(&self) -> &GICC_IIDR { + &self.gicc_iidr + } #[doc = "0x1000 - Deactivate Interrupt"] - pub gicc_dir: GICC_DIR, + #[inline(always)] + pub const fn gicc_dir(&self) -> &GICC_DIR { + &self.gicc_dir + } } #[doc = "GICC_CTLR (rw) register accessor: CPU Interface Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicc_ctlr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicc_ctlr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicc_ctlr`] module"] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_abpr.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_abpr.rs index efcb713..848be67 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_abpr.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_abpr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BINARY_POINT` reader - Split point between group priority and subpriority"] pub type BINARY_POINT_R = crate::FieldReader; #[doc = "Field `BINARY_POINT` writer - Split point between group priority and subpriority"] -pub type BINARY_POINT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type BINARY_POINT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Split point between group priority and subpriority"] #[inline(always)] @@ -25,15 +25,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Split point between group priority and subpriority"] #[inline(always)] #[must_use] - pub fn binary_point(&mut self) -> BINARY_POINT_W { - BINARY_POINT_W::new(self) + pub fn binary_point(&mut self) -> BINARY_POINT_W { + BINARY_POINT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_aeoir.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_aeoir.rs index 32cf2fa..4203b87 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_aeoir.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_aeoir.rs @@ -1,9 +1,9 @@ #[doc = "Register `GICC_AEOIR` writer"] pub type W = crate::W; #[doc = "Field `INTERRUPT_ID` writer - Interrupt ID"] -pub type INTERRUPT_ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type INTERRUPT_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `CPUID` writer - CPUID that requested a software interrupt, 0 otherwise"] -pub type CPUID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CPUID_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -13,14 +13,14 @@ impl W { #[doc = "Bits 0:9 - Interrupt ID"] #[inline(always)] #[must_use] - pub fn interrupt_id(&mut self) -> INTERRUPT_ID_W { - INTERRUPT_ID_W::new(self) + pub fn interrupt_id(&mut self) -> INTERRUPT_ID_W { + INTERRUPT_ID_W::new(self, 0) } #[doc = "Bits 10:12 - CPUID that requested a software interrupt, 0 otherwise"] #[inline(always)] #[must_use] - pub fn cpuid(&mut self) -> CPUID_W { - CPUID_W::new(self) + pub fn cpuid(&mut self) -> CPUID_W { + CPUID_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_ahppir.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_ahppir.rs index aab7b46..cce0a2d 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_ahppir.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_ahppir.rs @@ -29,7 +29,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Aliased Highest Priority Pending Interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicc_ahppir::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_aiar.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_aiar.rs index 843a17c..dcd0ea3 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_aiar.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_aiar.rs @@ -29,7 +29,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Aliased Interrupt Acknowledge\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicc_aiar::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_apr0.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_apr0.rs index d99208d..aa78d11 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_apr0.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_apr0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_bpr.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_bpr.rs index 8f8b226..f099c26 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_bpr.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_bpr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BINARY_POINT` reader - Split point between group priority and subpriority"] pub type BINARY_POINT_R = crate::FieldReader; #[doc = "Field `BINARY_POINT` writer - Split point between group priority and subpriority"] -pub type BINARY_POINT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type BINARY_POINT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Split point between group priority and subpriority"] #[inline(always)] @@ -25,15 +25,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Split point between group priority and subpriority"] #[inline(always)] #[must_use] - pub fn binary_point(&mut self) -> BINARY_POINT_W { - BINARY_POINT_W::new(self) + pub fn binary_point(&mut self) -> BINARY_POINT_W { + BINARY_POINT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_ctlr.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_ctlr.rs index d56368f..dc5f6cf 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_ctlr.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_ctlr.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `ENABLE_GROUP_0` reader - Enable signaling of group 0"] pub type ENABLE_GROUP_0_R = crate::BitReader; #[doc = "Field `ENABLE_GROUP_0` writer - Enable signaling of group 0"] -pub type ENABLE_GROUP_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_GROUP_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE_GROUP_1` reader - Enable signaling of group 1"] pub type ENABLE_GROUP_1_R = crate::BitReader; #[doc = "Field `ENABLE_GROUP_1` writer - Enable signaling of group 1"] -pub type ENABLE_GROUP_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_GROUP_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACKCTL` reader - Whether a read of IAR acknowledges the interrupt"] pub type ACKCTL_R = crate::BitReader; #[doc = "Field `ACKCTL` writer - Whether a read of IAR acknowledges the interrupt"] -pub type ACKCTL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACKCTL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FIQEN` reader - Group 0 triggers FIQ"] pub type FIQEN_R = crate::BitReader; #[doc = "Field `FIQEN` writer - Group 0 triggers FIQ"] -pub type FIQEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FIQEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBPR` reader - Common control of interrupts through GICC_BPR"] pub type CBPR_R = crate::BitReader; #[doc = "Field `CBPR` writer - Common control of interrupts through GICC_BPR"] -pub type CBPR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBPR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FIQBYPDISGRP0` reader - Bypass FIQ is not signaled to processor"] pub type FIQBYPDISGRP0_R = crate::BitReader; #[doc = "Field `FIQBYPDISGRP0` writer - Bypass FIQ is not signaled to processor"] -pub type FIQBYPDISGRP0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FIQBYPDISGRP0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQBYPDISGRP0` reader - Bypass IRQ is not signaled to processor"] pub type IRQBYPDISGRP0_R = crate::BitReader; #[doc = "Field `IRQBYPDISGRP0` writer - Bypass IRQ is not signaled to processor"] -pub type IRQBYPDISGRP0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IRQBYPDISGRP0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FIQBYPDISGRP1` reader - Alias of group 1 FIQ bypass disable"] pub type FIQBYPDISGRP1_R = crate::BitReader; #[doc = "Field `FIQBYPDISGRP1` writer - Alias of group 1 FIQ bypass disable"] -pub type FIQBYPDISGRP1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FIQBYPDISGRP1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQBYPDISGRP1` reader - Alias of group 1 IRQ bypass disable"] pub type IRQBYPDISGRP1_R = crate::BitReader; #[doc = "Field `IRQBYPDISGRP1` writer - Alias of group 1 IRQ bypass disable"] -pub type IRQBYPDISGRP1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IRQBYPDISGRP1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOIMODES` reader - Secure EOIR does priority drop. DIR does deactivate."] pub type EOIMODES_R = crate::BitReader; #[doc = "Field `EOIMODES` writer - Secure EOIR does priority drop. DIR does deactivate."] -pub type EOIMODES_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOIMODES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOIMODENS` reader - Non-Secure EOIR does priority drop. DIR does deactivate."] pub type EOIMODENS_R = crate::BitReader; #[doc = "Field `EOIMODENS` writer - Non-Secure EOIR does priority drop. DIR does deactivate."] -pub type EOIMODENS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOIMODENS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable signaling of group 0"] #[inline(always)] @@ -140,75 +140,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable signaling of group 0"] #[inline(always)] #[must_use] - pub fn enable_group_0(&mut self) -> ENABLE_GROUP_0_W { - ENABLE_GROUP_0_W::new(self) + pub fn enable_group_0(&mut self) -> ENABLE_GROUP_0_W { + ENABLE_GROUP_0_W::new(self, 0) } #[doc = "Bit 1 - Enable signaling of group 1"] #[inline(always)] #[must_use] - pub fn enable_group_1(&mut self) -> ENABLE_GROUP_1_W { - ENABLE_GROUP_1_W::new(self) + pub fn enable_group_1(&mut self) -> ENABLE_GROUP_1_W { + ENABLE_GROUP_1_W::new(self, 1) } #[doc = "Bit 2 - Whether a read of IAR acknowledges the interrupt"] #[inline(always)] #[must_use] - pub fn ackctl(&mut self) -> ACKCTL_W { - ACKCTL_W::new(self) + pub fn ackctl(&mut self) -> ACKCTL_W { + ACKCTL_W::new(self, 2) } #[doc = "Bit 3 - Group 0 triggers FIQ"] #[inline(always)] #[must_use] - pub fn fiqen(&mut self) -> FIQEN_W { - FIQEN_W::new(self) + pub fn fiqen(&mut self) -> FIQEN_W { + FIQEN_W::new(self, 3) } #[doc = "Bit 4 - Common control of interrupts through GICC_BPR"] #[inline(always)] #[must_use] - pub fn cbpr(&mut self) -> CBPR_W { - CBPR_W::new(self) + pub fn cbpr(&mut self) -> CBPR_W { + CBPR_W::new(self, 4) } #[doc = "Bit 5 - Bypass FIQ is not signaled to processor"] #[inline(always)] #[must_use] - pub fn fiqbypdisgrp0(&mut self) -> FIQBYPDISGRP0_W { - FIQBYPDISGRP0_W::new(self) + pub fn fiqbypdisgrp0(&mut self) -> FIQBYPDISGRP0_W { + FIQBYPDISGRP0_W::new(self, 5) } #[doc = "Bit 6 - Bypass IRQ is not signaled to processor"] #[inline(always)] #[must_use] - pub fn irqbypdisgrp0(&mut self) -> IRQBYPDISGRP0_W { - IRQBYPDISGRP0_W::new(self) + pub fn irqbypdisgrp0(&mut self) -> IRQBYPDISGRP0_W { + IRQBYPDISGRP0_W::new(self, 6) } #[doc = "Bit 7 - Alias of group 1 FIQ bypass disable"] #[inline(always)] #[must_use] - pub fn fiqbypdisgrp1(&mut self) -> FIQBYPDISGRP1_W { - FIQBYPDISGRP1_W::new(self) + pub fn fiqbypdisgrp1(&mut self) -> FIQBYPDISGRP1_W { + FIQBYPDISGRP1_W::new(self, 7) } #[doc = "Bit 8 - Alias of group 1 IRQ bypass disable"] #[inline(always)] #[must_use] - pub fn irqbypdisgrp1(&mut self) -> IRQBYPDISGRP1_W { - IRQBYPDISGRP1_W::new(self) + pub fn irqbypdisgrp1(&mut self) -> IRQBYPDISGRP1_W { + IRQBYPDISGRP1_W::new(self, 8) } #[doc = "Bit 9 - Secure EOIR does priority drop. DIR does deactivate."] #[inline(always)] #[must_use] - pub fn eoimodes(&mut self) -> EOIMODES_W { - EOIMODES_W::new(self) + pub fn eoimodes(&mut self) -> EOIMODES_W { + EOIMODES_W::new(self, 9) } #[doc = "Bit 10 - Non-Secure EOIR does priority drop. DIR does deactivate."] #[inline(always)] #[must_use] - pub fn eoimodens(&mut self) -> EOIMODENS_W { - EOIMODENS_W::new(self) + pub fn eoimodens(&mut self) -> EOIMODENS_W { + EOIMODENS_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_eoir.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_eoir.rs index 39a0ad3..dc6fc27 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_eoir.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_eoir.rs @@ -1,9 +1,9 @@ #[doc = "Register `GICC_EOIR` writer"] pub type W = crate::W; #[doc = "Field `INTERRUPT_ID` writer - Interrupt ID"] -pub type INTERRUPT_ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type INTERRUPT_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `CPUID` writer - CPUID that requested a software interrupt, 0 otherwise"] -pub type CPUID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CPUID_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -13,14 +13,14 @@ impl W { #[doc = "Bits 0:9 - Interrupt ID"] #[inline(always)] #[must_use] - pub fn interrupt_id(&mut self) -> INTERRUPT_ID_W { - INTERRUPT_ID_W::new(self) + pub fn interrupt_id(&mut self) -> INTERRUPT_ID_W { + INTERRUPT_ID_W::new(self, 0) } #[doc = "Bits 10:12 - CPUID that requested a software interrupt, 0 otherwise"] #[inline(always)] #[must_use] - pub fn cpuid(&mut self) -> CPUID_W { - CPUID_W::new(self) + pub fn cpuid(&mut self) -> CPUID_W { + CPUID_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_hppir.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_hppir.rs index eeade18..5e8850b 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_hppir.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_hppir.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INTERRUPT_ID` reader - Pending Interrupt ID"] pub type INTERRUPT_ID_R = crate::FieldReader; #[doc = "Field `INTERRUPT_ID` writer - Pending Interrupt ID"] -pub type INTERRUPT_ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type INTERRUPT_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `CPUID` reader - CPUID that requested a software interrupt, 0 otherwise"] pub type CPUID_R = crate::FieldReader; #[doc = "Field `CPUID` writer - CPUID that requested a software interrupt, 0 otherwise"] -pub type CPUID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CPUID_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:9 - Pending Interrupt ID"] #[inline(always)] @@ -35,21 +35,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:9 - Pending Interrupt ID"] #[inline(always)] #[must_use] - pub fn interrupt_id(&mut self) -> INTERRUPT_ID_W { - INTERRUPT_ID_W::new(self) + pub fn interrupt_id(&mut self) -> INTERRUPT_ID_W { + INTERRUPT_ID_W::new(self, 0) } #[doc = "Bits 10:12 - CPUID that requested a software interrupt, 0 otherwise"] #[inline(always)] #[must_use] - pub fn cpuid(&mut self) -> CPUID_W { - CPUID_W::new(self) + pub fn cpuid(&mut self) -> CPUID_W { + CPUID_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_iar.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_iar.rs index 56296b0..976c968 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_iar.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_iar.rs @@ -29,7 +29,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Interrupt Acknowledge\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicc_iar::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_iidr.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_iidr.rs index 46c6d1f..f0f3185 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_iidr.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_iidr.rs @@ -10,6 +10,8 @@ pub type ID_R = crate::FieldReader; pub enum ID_A { #[doc = "33690683: ID is valid"] VALID = 33690683, + #[doc = "0: ID is *NOT* valid"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -23,10 +25,10 @@ impl crate::FieldSpec for ID_A { impl ID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> ID_A { match self.bits { - 33690683 => Some(ID_A::VALID), - _ => None, + 33690683 => ID_A::VALID, + _ => ID_A::INVALID, } } #[doc = "ID is valid"] @@ -34,10 +36,15 @@ impl ID_R { pub fn is_valid(&self) -> bool { *self == ID_A::VALID } + #[doc = "ID is *NOT* valid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), ID_A::INVALID) + } } #[doc = "Field `ID` writer - ID"] -pub type ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, ID_A>; -impl<'a, REG, const O: u8> ID_W<'a, REG, O> +pub type ID_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 32, ID_A>; +impl<'a, REG> ID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -47,6 +54,11 @@ where pub fn valid(self) -> &'a mut crate::W { self.variant(ID_A::VALID) } + #[doc = "ID is *NOT* valid"] + #[inline(always)] + pub fn invalid(self) -> &'a mut crate::W { + self.variant(ID_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - ID"] @@ -64,15 +76,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - ID"] #[inline(always)] #[must_use] - pub fn id(&mut self) -> ID_W { - ID_W::new(self) + pub fn id(&mut self) -> ID_W { + ID_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_nsapr0.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_nsapr0.rs index 3fbe506..ea891d4 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_nsapr0.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_nsapr0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_pmr.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_pmr.rs index b4c145e..a51285b 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_pmr.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_pmr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PRIORITY` reader - Interrupts with a higher number are not signaled"] pub type PRIORITY_R = crate::FieldReader; #[doc = "Field `PRIORITY` writer - Interrupts with a higher number are not signaled"] -pub type PRIORITY_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PRIORITY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupts with a higher number are not signaled"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupts with a higher number are not signaled"] #[inline(always)] #[must_use] - pub fn priority(&mut self) -> PRIORITY_W { - PRIORITY_W::new(self) + pub fn priority(&mut self) -> PRIORITY_W { + PRIORITY_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_cpu/gicc_rpr.rs b/crates/bcm2711-lpa/src/gic_cpu/gicc_rpr.rs index 3133e4f..2c53f66 100644 --- a/crates/bcm2711-lpa/src/gic_cpu/gicc_rpr.rs +++ b/crates/bcm2711-lpa/src/gic_cpu/gicc_rpr.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Running Priority\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicc_rpr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist.rs b/crates/bcm2711-lpa/src/gic_dist.rs index ba8c534..1c59c1b 100644 --- a/crates/bcm2711-lpa/src/gic_dist.rs +++ b/crates/bcm2711-lpa/src/gic_dist.rs @@ -2,91 +2,233 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + gicd_ctlr: GICD_CTLR, + gicd_typer: GICD_TYPER, + gicd_iidr: GICD_IIDR, + _reserved3: [u8; 0x74], + gicd_igroupr: GICD_IGROUPR, + _reserved4: [u8; 0x64], + gicd_isenabler: GICD_ISENABLER, + _reserved5: [u8; 0x64], + gicd_icenabler: GICD_ICENABLER, + _reserved6: [u8; 0x64], + gicd_ispendr: GICD_ISPENDR, + _reserved7: [u8; 0x64], + gicd_icpendr: GICD_ICPENDR, + _reserved8: [u8; 0x64], + gicd_isactiver: GICD_ISACTIVER, + _reserved9: [u8; 0x64], + gicd_icactiver: GICD_ICACTIVER, + _reserved10: [u8; 0x64], + gicd_ipriorityr: GICD_IPRIORITYR, + _reserved11: [u8; 0x0320], + gicd_itargetsr: GICD_ITARGETSR, + _reserved12: [u8; 0x0320], + gicd_icfgr: GICD_ICFGR, + _reserved13: [u8; 0xc8], + gicd_ppisr: GICD_PPISR, + gicd_spisr0: GICD_SPISR0, + gicd_spisr1: GICD_SPISR1, + gicd_spisr2: GICD_SPISR2, + gicd_spisr3: GICD_SPISR3, + gicd_spisr4: GICD_SPISR4, + gicd_spisr5: GICD_SPISR5, + _reserved20: [u8; 0x01e4], + gicd_sgir: GICD_SGIR, + _reserved21: [u8; 0x0c], + gicd_cpendsgirn: GICD_CPENDSGIRN, + _reserved22: [u8; 0x0c], + gicd_spendsgirn: GICD_SPENDSGIRN, + _reserved23: [u8; 0xac], + gicd_pidr4: GICD_PIDR4, + gicd_pidr5: GICD_PIDR5, + gicd_pidr6: GICD_PIDR6, + gicd_pidr7: GICD_PIDR7, + gicd_pidr0: GICD_PIDR0, + gicd_pidr1: GICD_PIDR1, + gicd_pidr2: GICD_PIDR2, + gicd_pidr3: GICD_PIDR3, + gicd_cidr0: GICD_CIDR0, + gicd_cidr1: GICD_CIDR1, + gicd_cidr2: GICD_CIDR2, + gicd_cidr3: GICD_CIDR3, +} +impl RegisterBlock { #[doc = "0x00 - Distributor Control Register"] - pub gicd_ctlr: GICD_CTLR, + #[inline(always)] + pub const fn gicd_ctlr(&self) -> &GICD_CTLR { + &self.gicd_ctlr + } #[doc = "0x04 - Interrupt Controller Type Register"] - pub gicd_typer: GICD_TYPER, + #[inline(always)] + pub const fn gicd_typer(&self) -> &GICD_TYPER { + &self.gicd_typer + } #[doc = "0x08 - Distributor Implementer Identification Register"] - pub gicd_iidr: GICD_IIDR, - _reserved3: [u8; 0x74], + #[inline(always)] + pub const fn gicd_iidr(&self) -> &GICD_IIDR { + &self.gicd_iidr + } #[doc = "0x80..0x9c - Interrupt Group Registers"] - pub gicd_igroupr: GICD_IGROUPR, - _reserved4: [u8; 0x64], + #[inline(always)] + pub const fn gicd_igroupr(&self) -> &GICD_IGROUPR { + &self.gicd_igroupr + } #[doc = "0x100..0x11c - Interrupt Set-Enable Registers"] - pub gicd_isenabler: GICD_ISENABLER, - _reserved5: [u8; 0x64], + #[inline(always)] + pub const fn gicd_isenabler(&self) -> &GICD_ISENABLER { + &self.gicd_isenabler + } #[doc = "0x180..0x19c - Interrupt Clear-Enable Registers"] - pub gicd_icenabler: GICD_ICENABLER, - _reserved6: [u8; 0x64], + #[inline(always)] + pub const fn gicd_icenabler(&self) -> &GICD_ICENABLER { + &self.gicd_icenabler + } #[doc = "0x200..0x21c - Interrupt Set-Pending Registers"] - pub gicd_ispendr: GICD_ISPENDR, - _reserved7: [u8; 0x64], + #[inline(always)] + pub const fn gicd_ispendr(&self) -> &GICD_ISPENDR { + &self.gicd_ispendr + } #[doc = "0x280..0x29c - Interrupt Clear-Pending Registers"] - pub gicd_icpendr: GICD_ICPENDR, - _reserved8: [u8; 0x64], + #[inline(always)] + pub const fn gicd_icpendr(&self) -> &GICD_ICPENDR { + &self.gicd_icpendr + } #[doc = "0x300..0x31c - Interrupt Set-Active Registers"] - pub gicd_isactiver: GICD_ISACTIVER, - _reserved9: [u8; 0x64], + #[inline(always)] + pub const fn gicd_isactiver(&self) -> &GICD_ISACTIVER { + &self.gicd_isactiver + } #[doc = "0x380..0x39c - Interrupt Clear-Active Registers"] - pub gicd_icactiver: GICD_ICACTIVER, - _reserved10: [u8; 0x64], + #[inline(always)] + pub const fn gicd_icactiver(&self) -> &GICD_ICACTIVER { + &self.gicd_icactiver + } #[doc = "0x400..0x4e0 - Interrupt Priority"] - pub gicd_ipriorityr: GICD_IPRIORITYR, - _reserved11: [u8; 0x0320], + #[inline(always)] + pub const fn gicd_ipriorityr(&self) -> &GICD_IPRIORITYR { + &self.gicd_ipriorityr + } #[doc = "0x800..0x8e0 - Interrupt Processor Targets"] - pub gicd_itargetsr: GICD_ITARGETSR, - _reserved12: [u8; 0x0320], + #[inline(always)] + pub const fn gicd_itargetsr(&self) -> &GICD_ITARGETSR { + &self.gicd_itargetsr + } #[doc = "0xc00..0xc38 - Interrupt Configuration"] - pub gicd_icfgr: GICD_ICFGR, - _reserved13: [u8; 0xc8], + #[inline(always)] + pub const fn gicd_icfgr(&self) -> &GICD_ICFGR { + &self.gicd_icfgr + } #[doc = "0xd00 - Private Peripheral Interrupt Status Register"] - pub gicd_ppisr: GICD_PPISR, + #[inline(always)] + pub const fn gicd_ppisr(&self) -> &GICD_PPISR { + &self.gicd_ppisr + } #[doc = "0xd04 - Shared Peripheral Interrupt Status Registers"] - pub gicd_spisr0: GICD_SPISR0, + #[inline(always)] + pub const fn gicd_spisr0(&self) -> &GICD_SPISR0 { + &self.gicd_spisr0 + } #[doc = "0xd08 - Shared Peripheral Interrupt Status Registers"] - pub gicd_spisr1: GICD_SPISR1, + #[inline(always)] + pub const fn gicd_spisr1(&self) -> &GICD_SPISR1 { + &self.gicd_spisr1 + } #[doc = "0xd0c - Shared Peripheral Interrupt Status Registers"] - pub gicd_spisr2: GICD_SPISR2, + #[inline(always)] + pub const fn gicd_spisr2(&self) -> &GICD_SPISR2 { + &self.gicd_spisr2 + } #[doc = "0xd10 - Shared Peripheral Interrupt Status Registers"] - pub gicd_spisr3: GICD_SPISR3, + #[inline(always)] + pub const fn gicd_spisr3(&self) -> &GICD_SPISR3 { + &self.gicd_spisr3 + } #[doc = "0xd14 - Shared Peripheral Interrupt Status Registers"] - pub gicd_spisr4: GICD_SPISR4, + #[inline(always)] + pub const fn gicd_spisr4(&self) -> &GICD_SPISR4 { + &self.gicd_spisr4 + } #[doc = "0xd18 - Shared Peripheral Interrupt Status Registers"] - pub gicd_spisr5: GICD_SPISR5, - _reserved20: [u8; 0x01e4], + #[inline(always)] + pub const fn gicd_spisr5(&self) -> &GICD_SPISR5 { + &self.gicd_spisr5 + } #[doc = "0xf00 - Software Generated Interrupt Register"] - pub gicd_sgir: GICD_SGIR, - _reserved21: [u8; 0x0c], + #[inline(always)] + pub const fn gicd_sgir(&self) -> &GICD_SGIR { + &self.gicd_sgir + } #[doc = "0xf10 - SGI Clear-Pending Registers"] - pub gicd_cpendsgirn: GICD_CPENDSGIRN, - _reserved22: [u8; 0x0c], + #[inline(always)] + pub const fn gicd_cpendsgirn(&self) -> &GICD_CPENDSGIRN { + &self.gicd_cpendsgirn + } #[doc = "0xf20 - SGI Set-Pending Registers"] - pub gicd_spendsgirn: GICD_SPENDSGIRN, - _reserved23: [u8; 0xac], + #[inline(always)] + pub const fn gicd_spendsgirn(&self) -> &GICD_SPENDSGIRN { + &self.gicd_spendsgirn + } #[doc = "0xfd0 - Peripheral ID 4"] - pub gicd_pidr4: GICD_PIDR4, + #[inline(always)] + pub const fn gicd_pidr4(&self) -> &GICD_PIDR4 { + &self.gicd_pidr4 + } #[doc = "0xfd4 - Peripheral ID 5"] - pub gicd_pidr5: GICD_PIDR5, + #[inline(always)] + pub const fn gicd_pidr5(&self) -> &GICD_PIDR5 { + &self.gicd_pidr5 + } #[doc = "0xfd8 - Peripheral ID 6"] - pub gicd_pidr6: GICD_PIDR6, + #[inline(always)] + pub const fn gicd_pidr6(&self) -> &GICD_PIDR6 { + &self.gicd_pidr6 + } #[doc = "0xfdc - Peripheral ID 7"] - pub gicd_pidr7: GICD_PIDR7, + #[inline(always)] + pub const fn gicd_pidr7(&self) -> &GICD_PIDR7 { + &self.gicd_pidr7 + } #[doc = "0xfe0 - Peripheral ID 0"] - pub gicd_pidr0: GICD_PIDR0, + #[inline(always)] + pub const fn gicd_pidr0(&self) -> &GICD_PIDR0 { + &self.gicd_pidr0 + } #[doc = "0xfe4 - Peripheral ID 1"] - pub gicd_pidr1: GICD_PIDR1, + #[inline(always)] + pub const fn gicd_pidr1(&self) -> &GICD_PIDR1 { + &self.gicd_pidr1 + } #[doc = "0xfe8 - Peripheral ID 2"] - pub gicd_pidr2: GICD_PIDR2, + #[inline(always)] + pub const fn gicd_pidr2(&self) -> &GICD_PIDR2 { + &self.gicd_pidr2 + } #[doc = "0xfec - Peripheral ID 3"] - pub gicd_pidr3: GICD_PIDR3, + #[inline(always)] + pub const fn gicd_pidr3(&self) -> &GICD_PIDR3 { + &self.gicd_pidr3 + } #[doc = "0xff0 - Component ID 0"] - pub gicd_cidr0: GICD_CIDR0, + #[inline(always)] + pub const fn gicd_cidr0(&self) -> &GICD_CIDR0 { + &self.gicd_cidr0 + } #[doc = "0xff4 - Component ID 1"] - pub gicd_cidr1: GICD_CIDR1, + #[inline(always)] + pub const fn gicd_cidr1(&self) -> &GICD_CIDR1 { + &self.gicd_cidr1 + } #[doc = "0xff8 - Component ID 2"] - pub gicd_cidr2: GICD_CIDR2, + #[inline(always)] + pub const fn gicd_cidr2(&self) -> &GICD_CIDR2 { + &self.gicd_cidr2 + } #[doc = "0xffc - Component ID 3"] - pub gicd_cidr3: GICD_CIDR3, + #[inline(always)] + pub const fn gicd_cidr3(&self) -> &GICD_CIDR3 { + &self.gicd_cidr3 + } } #[doc = "GICD_CTLR (rw) register accessor: Distributor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_ctlr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_ctlr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_ctlr`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr0.rs index 4254623..52fa7b9 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr0.rs @@ -8,6 +8,8 @@ pub type GICD_CIDR0_R = crate::FieldReader; pub enum GICD_CIDR0_A { #[doc = "13: Valid"] VALID = 13, + #[doc = "0: Invalid ID"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_CIDR0_A { impl GICD_CIDR0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_CIDR0_A { match self.bits { - 13 => Some(GICD_CIDR0_A::VALID), - _ => None, + 13 => GICD_CIDR0_A::VALID, + _ => GICD_CIDR0_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_CIDR0_R { pub fn is_valid(&self) -> bool { *self == GICD_CIDR0_A::VALID } + #[doc = "Invalid ID"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_CIDR0_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Component ID 0"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Component ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_cidr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr1.rs index 52aa465..a8d1480 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr1.rs @@ -8,6 +8,8 @@ pub type GICD_CIDR1_R = crate::FieldReader; pub enum GICD_CIDR1_A { #[doc = "240: Valid"] VALID = 240, + #[doc = "0: Invalid ID"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_CIDR1_A { impl GICD_CIDR1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_CIDR1_A { match self.bits { - 240 => Some(GICD_CIDR1_A::VALID), - _ => None, + 240 => GICD_CIDR1_A::VALID, + _ => GICD_CIDR1_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_CIDR1_R { pub fn is_valid(&self) -> bool { *self == GICD_CIDR1_A::VALID } + #[doc = "Invalid ID"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_CIDR1_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Component ID 1"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Component ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_cidr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr2.rs index 4c7d919..b63b8f5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr2.rs @@ -8,6 +8,8 @@ pub type GICD_CIDR2_R = crate::FieldReader; pub enum GICD_CIDR2_A { #[doc = "5: Valid"] VALID = 5, + #[doc = "0: Invalid ID"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_CIDR2_A { impl GICD_CIDR2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_CIDR2_A { match self.bits { - 5 => Some(GICD_CIDR2_A::VALID), - _ => None, + 5 => GICD_CIDR2_A::VALID, + _ => GICD_CIDR2_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_CIDR2_R { pub fn is_valid(&self) -> bool { *self == GICD_CIDR2_A::VALID } + #[doc = "Invalid ID"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_CIDR2_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Component ID 2"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Component ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_cidr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr3.rs index 29f17d9..1ea92af 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_cidr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_cidr3.rs @@ -8,6 +8,8 @@ pub type GICD_CIDR3_R = crate::FieldReader; pub enum GICD_CIDR3_A { #[doc = "177: Valid"] VALID = 177, + #[doc = "0: Invalid ID"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_CIDR3_A { impl GICD_CIDR3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_CIDR3_A { match self.bits { - 177 => Some(GICD_CIDR3_A::VALID), - _ => None, + 177 => GICD_CIDR3_A::VALID, + _ => GICD_CIDR3_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_CIDR3_R { pub fn is_valid(&self) -> bool { *self == GICD_CIDR3_A::VALID } + #[doc = "Invalid ID"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_CIDR3_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Component ID 3"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Component ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_cidr3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_cpendsgirn.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_cpendsgirn.rs index ad22a08..bf22b85 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_cpendsgirn.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_cpendsgirn.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ctlr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ctlr.rs index 61f351c..aea7819 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ctlr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ctlr.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `ENABLE_GROUP0` reader - Enable group 0 interrupts"] pub type ENABLE_GROUP0_R = crate::BitReader; #[doc = "Field `ENABLE_GROUP0` writer - Enable group 0 interrupts"] -pub type ENABLE_GROUP0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_GROUP0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE_GROUP1` reader - Enable group 1 interrupts"] pub type ENABLE_GROUP1_R = crate::BitReader; #[doc = "Field `ENABLE_GROUP1` writer - Enable group 1 interrupts"] -pub type ENABLE_GROUP1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_GROUP1_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable group 0 interrupts"] #[inline(always)] @@ -38,21 +38,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable group 0 interrupts"] #[inline(always)] #[must_use] - pub fn enable_group0(&mut self) -> ENABLE_GROUP0_W { - ENABLE_GROUP0_W::new(self) + pub fn enable_group0(&mut self) -> ENABLE_GROUP0_W { + ENABLE_GROUP0_W::new(self, 0) } #[doc = "Bit 1 - Enable group 1 interrupts"] #[inline(always)] #[must_use] - pub fn enable_group1(&mut self) -> ENABLE_GROUP1_W { - ENABLE_GROUP1_W::new(self) + pub fn enable_group1(&mut self) -> ENABLE_GROUP1_W { + ENABLE_GROUP1_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver.rs index c312143..97b86de 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ICACTIVER { + gicd_icactiver0: GICD_ICACTIVER0, + gicd_icactiver1: GICD_ICACTIVER1, + gicd_icactiver2: GICD_ICACTIVER2, + gicd_icactiver3: GICD_ICACTIVER3, + gicd_icactiver4: GICD_ICACTIVER4, + gicd_icactiver5: GICD_ICACTIVER5, + gicd_icactiver6: GICD_ICACTIVER6, +} +impl GICD_ICACTIVER { #[doc = "0x00 - Interrupt Clear-Active"] - pub gicd_icactiver0: GICD_ICACTIVER0, + #[inline(always)] + pub const fn gicd_icactiver0(&self) -> &GICD_ICACTIVER0 { + &self.gicd_icactiver0 + } #[doc = "0x04 - Interrupt Clear-Active"] - pub gicd_icactiver1: GICD_ICACTIVER1, + #[inline(always)] + pub const fn gicd_icactiver1(&self) -> &GICD_ICACTIVER1 { + &self.gicd_icactiver1 + } #[doc = "0x08 - Interrupt Clear-Active"] - pub gicd_icactiver2: GICD_ICACTIVER2, + #[inline(always)] + pub const fn gicd_icactiver2(&self) -> &GICD_ICACTIVER2 { + &self.gicd_icactiver2 + } #[doc = "0x0c - Interrupt Clear-Active"] - pub gicd_icactiver3: GICD_ICACTIVER3, + #[inline(always)] + pub const fn gicd_icactiver3(&self) -> &GICD_ICACTIVER3 { + &self.gicd_icactiver3 + } #[doc = "0x10 - Interrupt Clear-Active"] - pub gicd_icactiver4: GICD_ICACTIVER4, + #[inline(always)] + pub const fn gicd_icactiver4(&self) -> &GICD_ICACTIVER4 { + &self.gicd_icactiver4 + } #[doc = "0x14 - Interrupt Clear-Active"] - pub gicd_icactiver5: GICD_ICACTIVER5, + #[inline(always)] + pub const fn gicd_icactiver5(&self) -> &GICD_ICACTIVER5 { + &self.gicd_icactiver5 + } #[doc = "0x18 - Interrupt Clear-Active"] - pub gicd_icactiver6: GICD_ICACTIVER6, + #[inline(always)] + pub const fn gicd_icactiver6(&self) -> &GICD_ICACTIVER6 { + &self.gicd_icactiver6 + } } #[doc = "GICD_ICACTIVER0 (rw) register accessor: Interrupt Clear-Active\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_icactiver0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_icactiver0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_icactiver0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver0.rs index d1e28fd..627afae 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver1.rs index bdcfea4..2ac8926 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver2.rs index 1d4be44..9570625 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver3.rs index 6fba2a3..dc636d4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver4.rs index 6d97840..a35e48b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver5.rs index 1812c50..2f11cf0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver6.rs index 585420b..f56e512 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icactiver/gicd_icactiver6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler.rs index 4d38500..e812955 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ICENABLER { + gicd_icenabler0: GICD_ICENABLER0, + gicd_icenabler1: GICD_ICENABLER1, + gicd_icenabler2: GICD_ICENABLER2, + gicd_icenabler3: GICD_ICENABLER3, + gicd_icenabler4: GICD_ICENABLER4, + gicd_icenabler5: GICD_ICENABLER5, + gicd_icenabler6: GICD_ICENABLER6, +} +impl GICD_ICENABLER { #[doc = "0x00 - Interrupt Clear-Enable"] - pub gicd_icenabler0: GICD_ICENABLER0, + #[inline(always)] + pub const fn gicd_icenabler0(&self) -> &GICD_ICENABLER0 { + &self.gicd_icenabler0 + } #[doc = "0x04 - Interrupt Clear-Enable"] - pub gicd_icenabler1: GICD_ICENABLER1, + #[inline(always)] + pub const fn gicd_icenabler1(&self) -> &GICD_ICENABLER1 { + &self.gicd_icenabler1 + } #[doc = "0x08 - Interrupt Clear-Enable"] - pub gicd_icenabler2: GICD_ICENABLER2, + #[inline(always)] + pub const fn gicd_icenabler2(&self) -> &GICD_ICENABLER2 { + &self.gicd_icenabler2 + } #[doc = "0x0c - Interrupt Clear-Enable"] - pub gicd_icenabler3: GICD_ICENABLER3, + #[inline(always)] + pub const fn gicd_icenabler3(&self) -> &GICD_ICENABLER3 { + &self.gicd_icenabler3 + } #[doc = "0x10 - Interrupt Clear-Enable"] - pub gicd_icenabler4: GICD_ICENABLER4, + #[inline(always)] + pub const fn gicd_icenabler4(&self) -> &GICD_ICENABLER4 { + &self.gicd_icenabler4 + } #[doc = "0x14 - Interrupt Clear-Enable"] - pub gicd_icenabler5: GICD_ICENABLER5, + #[inline(always)] + pub const fn gicd_icenabler5(&self) -> &GICD_ICENABLER5 { + &self.gicd_icenabler5 + } #[doc = "0x18 - Interrupt Clear-Enable"] - pub gicd_icenabler6: GICD_ICENABLER6, + #[inline(always)] + pub const fn gicd_icenabler6(&self) -> &GICD_ICENABLER6 { + &self.gicd_icenabler6 + } } #[doc = "GICD_ICENABLER0 (rw) register accessor: Interrupt Clear-Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_icenabler0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_icenabler0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_icenabler0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler0.rs index 267ac9b..81332ff 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler1.rs index 914db6d..968c4be 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler2.rs index 7995d43..b4c123c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler3.rs index f2445ac..21f1786 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler4.rs index 9fdc31d..9244159 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler5.rs index 20af349..09f87b0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler6.rs index 19cee55..ea1bcbd 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icenabler/gicd_icenabler6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr.rs index cb2db86..4b292fd 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr.rs @@ -2,34 +2,92 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ICFGR { + gicd_icfgr0: GICD_ICFGR0, + gicd_icfgr4: GICD_ICFGR4, + gicd_icfgr8: GICD_ICFGR8, + gicd_icfgr12: GICD_ICFGR12, + gicd_icfgr16: GICD_ICFGR16, + gicd_icfgr20: GICD_ICFGR20, + gicd_icfgr24: GICD_ICFGR24, + gicd_icfgr28: GICD_ICFGR28, + gicd_icfgr32: GICD_ICFGR32, + gicd_icfgr36: GICD_ICFGR36, + gicd_icfgr40: GICD_ICFGR40, + gicd_icfgr44: GICD_ICFGR44, + gicd_icfgr48: GICD_ICFGR48, + gicd_icfgr52: GICD_ICFGR52, +} +impl GICD_ICFGR { #[doc = "0x00 - Interrupt Configuration 0 - 15"] - pub gicd_icfgr0: GICD_ICFGR0, + #[inline(always)] + pub const fn gicd_icfgr0(&self) -> &GICD_ICFGR0 { + &self.gicd_icfgr0 + } #[doc = "0x04 - Interrupt Configuration 16 - 31"] - pub gicd_icfgr4: GICD_ICFGR4, + #[inline(always)] + pub const fn gicd_icfgr4(&self) -> &GICD_ICFGR4 { + &self.gicd_icfgr4 + } #[doc = "0x08 - Interrupt Configuration 32 - 47"] - pub gicd_icfgr8: GICD_ICFGR8, + #[inline(always)] + pub const fn gicd_icfgr8(&self) -> &GICD_ICFGR8 { + &self.gicd_icfgr8 + } #[doc = "0x0c - Interrupt Configuration 48 - 63"] - pub gicd_icfgr12: GICD_ICFGR12, + #[inline(always)] + pub const fn gicd_icfgr12(&self) -> &GICD_ICFGR12 { + &self.gicd_icfgr12 + } #[doc = "0x10 - Interrupt Configuration 64 - 79"] - pub gicd_icfgr16: GICD_ICFGR16, + #[inline(always)] + pub const fn gicd_icfgr16(&self) -> &GICD_ICFGR16 { + &self.gicd_icfgr16 + } #[doc = "0x14 - Interrupt Configuration 80 - 95"] - pub gicd_icfgr20: GICD_ICFGR20, + #[inline(always)] + pub const fn gicd_icfgr20(&self) -> &GICD_ICFGR20 { + &self.gicd_icfgr20 + } #[doc = "0x18 - Interrupt Configuration 96 - 111"] - pub gicd_icfgr24: GICD_ICFGR24, + #[inline(always)] + pub const fn gicd_icfgr24(&self) -> &GICD_ICFGR24 { + &self.gicd_icfgr24 + } #[doc = "0x1c - Interrupt Configuration 112 - 127"] - pub gicd_icfgr28: GICD_ICFGR28, + #[inline(always)] + pub const fn gicd_icfgr28(&self) -> &GICD_ICFGR28 { + &self.gicd_icfgr28 + } #[doc = "0x20 - Interrupt Configuration 128 - 143"] - pub gicd_icfgr32: GICD_ICFGR32, + #[inline(always)] + pub const fn gicd_icfgr32(&self) -> &GICD_ICFGR32 { + &self.gicd_icfgr32 + } #[doc = "0x24 - Interrupt Configuration 144 - 159"] - pub gicd_icfgr36: GICD_ICFGR36, + #[inline(always)] + pub const fn gicd_icfgr36(&self) -> &GICD_ICFGR36 { + &self.gicd_icfgr36 + } #[doc = "0x28 - Interrupt Configuration 160 - 175"] - pub gicd_icfgr40: GICD_ICFGR40, + #[inline(always)] + pub const fn gicd_icfgr40(&self) -> &GICD_ICFGR40 { + &self.gicd_icfgr40 + } #[doc = "0x2c - Interrupt Configuration 176 - 191"] - pub gicd_icfgr44: GICD_ICFGR44, + #[inline(always)] + pub const fn gicd_icfgr44(&self) -> &GICD_ICFGR44 { + &self.gicd_icfgr44 + } #[doc = "0x30 - Interrupt Configuration 192 - 207"] - pub gicd_icfgr48: GICD_ICFGR48, + #[inline(always)] + pub const fn gicd_icfgr48(&self) -> &GICD_ICFGR48 { + &self.gicd_icfgr48 + } #[doc = "0x34 - Interrupt Configuration 208 - 223"] - pub gicd_icfgr52: GICD_ICFGR52, + #[inline(always)] + pub const fn gicd_icfgr52(&self) -> &GICD_ICFGR52 { + &self.gicd_icfgr52 + } } #[doc = "GICD_ICFGR0 (rw) register accessor: Interrupt Configuration 0 - 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_icfgr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_icfgr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_icfgr0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr0.rs index cac6b6a..f44a2dd 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr0.rs @@ -39,8 +39,8 @@ impl INT0_R { } } #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT0_A>; -impl<'a, REG, const O: u8> INT0_W<'a, REG, O> +pub type INT0_W<'a, REG> = crate::BitWriter<'a, REG, INT0_A>; +impl<'a, REG> INT0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT1_R { } } #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT1_A>; -impl<'a, REG, const O: u8> INT1_W<'a, REG, O> +pub type INT1_W<'a, REG> = crate::BitWriter<'a, REG, INT1_A>; +impl<'a, REG> INT1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT2_R { } } #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT2_A>; -impl<'a, REG, const O: u8> INT2_W<'a, REG, O> +pub type INT2_W<'a, REG> = crate::BitWriter<'a, REG, INT2_A>; +impl<'a, REG> INT2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT3_R { } } #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT3_A>; -impl<'a, REG, const O: u8> INT3_W<'a, REG, O> +pub type INT3_W<'a, REG> = crate::BitWriter<'a, REG, INT3_A>; +impl<'a, REG> INT3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT4_R { } } #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT4_A>; -impl<'a, REG, const O: u8> INT4_W<'a, REG, O> +pub type INT4_W<'a, REG> = crate::BitWriter<'a, REG, INT4_A>; +impl<'a, REG> INT4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT5_R { } } #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT5_A>; -impl<'a, REG, const O: u8> INT5_W<'a, REG, O> +pub type INT5_W<'a, REG> = crate::BitWriter<'a, REG, INT5_A>; +impl<'a, REG> INT5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT6_R { } } #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT6_A>; -impl<'a, REG, const O: u8> INT6_W<'a, REG, O> +pub type INT6_W<'a, REG> = crate::BitWriter<'a, REG, INT6_A>; +impl<'a, REG> INT6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT7_R { } } #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT7_A>; -impl<'a, REG, const O: u8> INT7_W<'a, REG, O> +pub type INT7_W<'a, REG> = crate::BitWriter<'a, REG, INT7_A>; +impl<'a, REG> INT7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT8_R { } } #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT8_A>; -impl<'a, REG, const O: u8> INT8_W<'a, REG, O> +pub type INT8_W<'a, REG> = crate::BitWriter<'a, REG, INT8_A>; +impl<'a, REG> INT8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT9_R { } } #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT9_A>; -impl<'a, REG, const O: u8> INT9_W<'a, REG, O> +pub type INT9_W<'a, REG> = crate::BitWriter<'a, REG, INT9_A>; +impl<'a, REG> INT9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT10_R { } } #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT10_A>; -impl<'a, REG, const O: u8> INT10_W<'a, REG, O> +pub type INT10_W<'a, REG> = crate::BitWriter<'a, REG, INT10_A>; +impl<'a, REG> INT10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT11_R { } } #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT11_A>; -impl<'a, REG, const O: u8> INT11_W<'a, REG, O> +pub type INT11_W<'a, REG> = crate::BitWriter<'a, REG, INT11_A>; +impl<'a, REG> INT11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT12_R { } } #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT12_A>; -impl<'a, REG, const O: u8> INT12_W<'a, REG, O> +pub type INT12_W<'a, REG> = crate::BitWriter<'a, REG, INT12_A>; +impl<'a, REG> INT12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT13_R { } } #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT13_A>; -impl<'a, REG, const O: u8> INT13_W<'a, REG, O> +pub type INT13_W<'a, REG> = crate::BitWriter<'a, REG, INT13_A>; +impl<'a, REG> INT13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT14_R { } } #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT14_A>; -impl<'a, REG, const O: u8> INT14_W<'a, REG, O> +pub type INT14_W<'a, REG> = crate::BitWriter<'a, REG, INT14_A>; +impl<'a, REG> INT14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT15_R { } } #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT15_A>; -impl<'a, REG, const O: u8> INT15_W<'a, REG, O> +pub type INT15_W<'a, REG> = crate::BitWriter<'a, REG, INT15_A>; +impl<'a, REG> INT15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr12.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr12.rs index 5ecdb1f..5621a27 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr12.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr12.rs @@ -39,8 +39,8 @@ impl INT48_R { } } #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT48_A>; -impl<'a, REG, const O: u8> INT48_W<'a, REG, O> +pub type INT48_W<'a, REG> = crate::BitWriter<'a, REG, INT48_A>; +impl<'a, REG> INT48_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT49_R { } } #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT49_A>; -impl<'a, REG, const O: u8> INT49_W<'a, REG, O> +pub type INT49_W<'a, REG> = crate::BitWriter<'a, REG, INT49_A>; +impl<'a, REG> INT49_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT50_R { } } #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT50_A>; -impl<'a, REG, const O: u8> INT50_W<'a, REG, O> +pub type INT50_W<'a, REG> = crate::BitWriter<'a, REG, INT50_A>; +impl<'a, REG> INT50_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT51_R { } } #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT51_A>; -impl<'a, REG, const O: u8> INT51_W<'a, REG, O> +pub type INT51_W<'a, REG> = crate::BitWriter<'a, REG, INT51_A>; +impl<'a, REG> INT51_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT52_R { } } #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT52_A>; -impl<'a, REG, const O: u8> INT52_W<'a, REG, O> +pub type INT52_W<'a, REG> = crate::BitWriter<'a, REG, INT52_A>; +impl<'a, REG> INT52_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT53_R { } } #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT53_A>; -impl<'a, REG, const O: u8> INT53_W<'a, REG, O> +pub type INT53_W<'a, REG> = crate::BitWriter<'a, REG, INT53_A>; +impl<'a, REG> INT53_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT54_R { } } #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT54_A>; -impl<'a, REG, const O: u8> INT54_W<'a, REG, O> +pub type INT54_W<'a, REG> = crate::BitWriter<'a, REG, INT54_A>; +impl<'a, REG> INT54_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT55_R { } } #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT55_A>; -impl<'a, REG, const O: u8> INT55_W<'a, REG, O> +pub type INT55_W<'a, REG> = crate::BitWriter<'a, REG, INT55_A>; +impl<'a, REG> INT55_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT56_R { } } #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT56_A>; -impl<'a, REG, const O: u8> INT56_W<'a, REG, O> +pub type INT56_W<'a, REG> = crate::BitWriter<'a, REG, INT56_A>; +impl<'a, REG> INT56_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT57_R { } } #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT57_A>; -impl<'a, REG, const O: u8> INT57_W<'a, REG, O> +pub type INT57_W<'a, REG> = crate::BitWriter<'a, REG, INT57_A>; +impl<'a, REG> INT57_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT58_R { } } #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT58_A>; -impl<'a, REG, const O: u8> INT58_W<'a, REG, O> +pub type INT58_W<'a, REG> = crate::BitWriter<'a, REG, INT58_A>; +impl<'a, REG> INT58_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT59_R { } } #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT59_A>; -impl<'a, REG, const O: u8> INT59_W<'a, REG, O> +pub type INT59_W<'a, REG> = crate::BitWriter<'a, REG, INT59_A>; +impl<'a, REG> INT59_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT60_R { } } #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT60_A>; -impl<'a, REG, const O: u8> INT60_W<'a, REG, O> +pub type INT60_W<'a, REG> = crate::BitWriter<'a, REG, INT60_A>; +impl<'a, REG> INT60_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT61_R { } } #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT61_A>; -impl<'a, REG, const O: u8> INT61_W<'a, REG, O> +pub type INT61_W<'a, REG> = crate::BitWriter<'a, REG, INT61_A>; +impl<'a, REG> INT61_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT62_R { } } #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT62_A>; -impl<'a, REG, const O: u8> INT62_W<'a, REG, O> +pub type INT62_W<'a, REG> = crate::BitWriter<'a, REG, INT62_A>; +impl<'a, REG> INT62_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT63_R { } } #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT63_A>; -impl<'a, REG, const O: u8> INT63_W<'a, REG, O> +pub type INT63_W<'a, REG> = crate::BitWriter<'a, REG, INT63_A>; +impl<'a, REG> INT63_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr16.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr16.rs index c4b7b18..4059a37 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr16.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr16.rs @@ -39,8 +39,8 @@ impl TIMER_R { } } #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TIMER_A>; -impl<'a, REG, const O: u8> TIMER_W<'a, REG, O> +pub type TIMER_W<'a, REG> = crate::BitWriter<'a, REG, TIMER_A>; +impl<'a, REG> TIMER_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl MAILBOX_R { } } #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MAILBOX_A>; -impl<'a, REG, const O: u8> MAILBOX_W<'a, REG, O> +pub type MAILBOX_W<'a, REG> = crate::BitWriter<'a, REG, MAILBOX_A>; +impl<'a, REG> MAILBOX_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl DOORBELL0_R { } } #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DOORBELL0_A>; -impl<'a, REG, const O: u8> DOORBELL0_W<'a, REG, O> +pub type DOORBELL0_W<'a, REG> = crate::BitWriter<'a, REG, DOORBELL0_A>; +impl<'a, REG> DOORBELL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl DOORBELL1_R { } } #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DOORBELL1_A>; -impl<'a, REG, const O: u8> DOORBELL1_W<'a, REG, O> +pub type DOORBELL1_W<'a, REG> = crate::BitWriter<'a, REG, DOORBELL1_A>; +impl<'a, REG> DOORBELL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl VPU0_HALTED_R { } } #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, VPU0_HALTED_A>; -impl<'a, REG, const O: u8> VPU0_HALTED_W<'a, REG, O> +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter<'a, REG, VPU0_HALTED_A>; +impl<'a, REG> VPU0_HALTED_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl VPU1_HALTED_R { } } #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, VPU1_HALTED_A>; -impl<'a, REG, const O: u8> VPU1_HALTED_W<'a, REG, O> +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter<'a, REG, VPU1_HALTED_A>; +impl<'a, REG> VPU1_HALTED_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,9 +357,8 @@ impl ARM_ADDRESS_ERROR_R { } } #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = - crate::BitWriter<'a, REG, O, ARM_ADDRESS_ERROR_A>; -impl<'a, REG, const O: u8> ARM_ADDRESS_ERROR_W<'a, REG, O> +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter<'a, REG, ARM_ADDRESS_ERROR_A>; +impl<'a, REG> ARM_ADDRESS_ERROR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -411,8 +410,8 @@ impl ARM_AXI_ERROR_R { } } #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ARM_AXI_ERROR_A>; -impl<'a, REG, const O: u8> ARM_AXI_ERROR_W<'a, REG, O> +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter<'a, REG, ARM_AXI_ERROR_A>; +impl<'a, REG> ARM_AXI_ERROR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -464,8 +463,8 @@ impl SWI0_R { } } #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI0_A>; -impl<'a, REG, const O: u8> SWI0_W<'a, REG, O> +pub type SWI0_W<'a, REG> = crate::BitWriter<'a, REG, SWI0_A>; +impl<'a, REG> SWI0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -517,8 +516,8 @@ impl SWI1_R { } } #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI1_A>; -impl<'a, REG, const O: u8> SWI1_W<'a, REG, O> +pub type SWI1_W<'a, REG> = crate::BitWriter<'a, REG, SWI1_A>; +impl<'a, REG> SWI1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -570,8 +569,8 @@ impl SWI2_R { } } #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI2_A>; -impl<'a, REG, const O: u8> SWI2_W<'a, REG, O> +pub type SWI2_W<'a, REG> = crate::BitWriter<'a, REG, SWI2_A>; +impl<'a, REG> SWI2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -623,8 +622,8 @@ impl SWI3_R { } } #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI3_A>; -impl<'a, REG, const O: u8> SWI3_W<'a, REG, O> +pub type SWI3_W<'a, REG> = crate::BitWriter<'a, REG, SWI3_A>; +impl<'a, REG> SWI3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -676,8 +675,8 @@ impl SWI4_R { } } #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI4_A>; -impl<'a, REG, const O: u8> SWI4_W<'a, REG, O> +pub type SWI4_W<'a, REG> = crate::BitWriter<'a, REG, SWI4_A>; +impl<'a, REG> SWI4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -729,8 +728,8 @@ impl SWI5_R { } } #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI5_A>; -impl<'a, REG, const O: u8> SWI5_W<'a, REG, O> +pub type SWI5_W<'a, REG> = crate::BitWriter<'a, REG, SWI5_A>; +impl<'a, REG> SWI5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -782,8 +781,8 @@ impl SWI6_R { } } #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI6_A>; -impl<'a, REG, const O: u8> SWI6_W<'a, REG, O> +pub type SWI6_W<'a, REG> = crate::BitWriter<'a, REG, SWI6_A>; +impl<'a, REG> SWI6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -835,8 +834,8 @@ impl SWI7_R { } } #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SWI7_A>; -impl<'a, REG, const O: u8> SWI7_W<'a, REG, O> +pub type SWI7_W<'a, REG> = crate::BitWriter<'a, REG, SWI7_A>; +impl<'a, REG> SWI7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -963,105 +962,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 1) } #[doc = "Bit 3 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 3) } #[doc = "Bit 5 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 5) } #[doc = "Bit 7 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 7) } #[doc = "Bit 9 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 9) } #[doc = "Bit 11 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 11) } #[doc = "Bit 13 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 13) } #[doc = "Bit 15 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 15) } #[doc = "Bit 17 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 17) } #[doc = "Bit 19 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 19) } #[doc = "Bit 21 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 21) } #[doc = "Bit 23 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 23) } #[doc = "Bit 25 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 25) } #[doc = "Bit 27 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 27) } #[doc = "Bit 29 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 29) } #[doc = "Bit 31 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr20.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr20.rs index 563917b..32a1142 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr20.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr20.rs @@ -39,8 +39,8 @@ impl INT80_R { } } #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT80_A>; -impl<'a, REG, const O: u8> INT80_W<'a, REG, O> +pub type INT80_W<'a, REG> = crate::BitWriter<'a, REG, INT80_A>; +impl<'a, REG> INT80_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT81_R { } } #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT81_A>; -impl<'a, REG, const O: u8> INT81_W<'a, REG, O> +pub type INT81_W<'a, REG> = crate::BitWriter<'a, REG, INT81_A>; +impl<'a, REG> INT81_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT82_R { } } #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT82_A>; -impl<'a, REG, const O: u8> INT82_W<'a, REG, O> +pub type INT82_W<'a, REG> = crate::BitWriter<'a, REG, INT82_A>; +impl<'a, REG> INT82_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT83_R { } } #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT83_A>; -impl<'a, REG, const O: u8> INT83_W<'a, REG, O> +pub type INT83_W<'a, REG> = crate::BitWriter<'a, REG, INT83_A>; +impl<'a, REG> INT83_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT84_R { } } #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT84_A>; -impl<'a, REG, const O: u8> INT84_W<'a, REG, O> +pub type INT84_W<'a, REG> = crate::BitWriter<'a, REG, INT84_A>; +impl<'a, REG> INT84_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT85_R { } } #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT85_A>; -impl<'a, REG, const O: u8> INT85_W<'a, REG, O> +pub type INT85_W<'a, REG> = crate::BitWriter<'a, REG, INT85_A>; +impl<'a, REG> INT85_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT86_R { } } #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT86_A>; -impl<'a, REG, const O: u8> INT86_W<'a, REG, O> +pub type INT86_W<'a, REG> = crate::BitWriter<'a, REG, INT86_A>; +impl<'a, REG> INT86_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT87_R { } } #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT87_A>; -impl<'a, REG, const O: u8> INT87_W<'a, REG, O> +pub type INT87_W<'a, REG> = crate::BitWriter<'a, REG, INT87_A>; +impl<'a, REG> INT87_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT88_R { } } #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT88_A>; -impl<'a, REG, const O: u8> INT88_W<'a, REG, O> +pub type INT88_W<'a, REG> = crate::BitWriter<'a, REG, INT88_A>; +impl<'a, REG> INT88_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT89_R { } } #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT89_A>; -impl<'a, REG, const O: u8> INT89_W<'a, REG, O> +pub type INT89_W<'a, REG> = crate::BitWriter<'a, REG, INT89_A>; +impl<'a, REG> INT89_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT90_R { } } #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT90_A>; -impl<'a, REG, const O: u8> INT90_W<'a, REG, O> +pub type INT90_W<'a, REG> = crate::BitWriter<'a, REG, INT90_A>; +impl<'a, REG> INT90_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT91_R { } } #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT91_A>; -impl<'a, REG, const O: u8> INT91_W<'a, REG, O> +pub type INT91_W<'a, REG> = crate::BitWriter<'a, REG, INT91_A>; +impl<'a, REG> INT91_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT92_R { } } #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT92_A>; -impl<'a, REG, const O: u8> INT92_W<'a, REG, O> +pub type INT92_W<'a, REG> = crate::BitWriter<'a, REG, INT92_A>; +impl<'a, REG> INT92_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT93_R { } } #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT93_A>; -impl<'a, REG, const O: u8> INT93_W<'a, REG, O> +pub type INT93_W<'a, REG> = crate::BitWriter<'a, REG, INT93_A>; +impl<'a, REG> INT93_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT94_R { } } #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT94_A>; -impl<'a, REG, const O: u8> INT94_W<'a, REG, O> +pub type INT94_W<'a, REG> = crate::BitWriter<'a, REG, INT94_A>; +impl<'a, REG> INT94_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT95_R { } } #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT95_A>; -impl<'a, REG, const O: u8> INT95_W<'a, REG, O> +pub type INT95_W<'a, REG> = crate::BitWriter<'a, REG, INT95_A>; +impl<'a, REG> INT95_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr24.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr24.rs index 4137b35..ed9030f 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr24.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr24.rs @@ -39,8 +39,8 @@ impl TIMER_0_R { } } #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TIMER_0_A>; -impl<'a, REG, const O: u8> TIMER_0_W<'a, REG, O> +pub type TIMER_0_W<'a, REG> = crate::BitWriter<'a, REG, TIMER_0_A>; +impl<'a, REG> TIMER_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl TIMER_1_R { } } #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TIMER_1_A>; -impl<'a, REG, const O: u8> TIMER_1_W<'a, REG, O> +pub type TIMER_1_W<'a, REG> = crate::BitWriter<'a, REG, TIMER_1_A>; +impl<'a, REG> TIMER_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl TIMER_2_R { } } #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TIMER_2_A>; -impl<'a, REG, const O: u8> TIMER_2_W<'a, REG, O> +pub type TIMER_2_W<'a, REG> = crate::BitWriter<'a, REG, TIMER_2_A>; +impl<'a, REG> TIMER_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl TIMER_3_R { } } #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TIMER_3_A>; -impl<'a, REG, const O: u8> TIMER_3_W<'a, REG, O> +pub type TIMER_3_W<'a, REG> = crate::BitWriter<'a, REG, TIMER_3_A>; +impl<'a, REG> TIMER_3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl H264_0_R { } } #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, H264_0_A>; -impl<'a, REG, const O: u8> H264_0_W<'a, REG, O> +pub type H264_0_W<'a, REG> = crate::BitWriter<'a, REG, H264_0_A>; +impl<'a, REG> H264_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl H264_1_R { } } #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, H264_1_A>; -impl<'a, REG, const O: u8> H264_1_W<'a, REG, O> +pub type H264_1_W<'a, REG> = crate::BitWriter<'a, REG, H264_1_A>; +impl<'a, REG> H264_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl H264_2_R { } } #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, H264_2_A>; -impl<'a, REG, const O: u8> H264_2_W<'a, REG, O> +pub type H264_2_W<'a, REG> = crate::BitWriter<'a, REG, H264_2_A>; +impl<'a, REG> H264_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl JPEG_R { } } #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, JPEG_A>; -impl<'a, REG, const O: u8> JPEG_W<'a, REG, O> +pub type JPEG_W<'a, REG> = crate::BitWriter<'a, REG, JPEG_A>; +impl<'a, REG> JPEG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl ISP_R { } } #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ISP_A>; -impl<'a, REG, const O: u8> ISP_W<'a, REG, O> +pub type ISP_W<'a, REG> = crate::BitWriter<'a, REG, ISP_A>; +impl<'a, REG> ISP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl USB_R { } } #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, USB_A>; -impl<'a, REG, const O: u8> USB_W<'a, REG, O> +pub type USB_W<'a, REG> = crate::BitWriter<'a, REG, USB_A>; +impl<'a, REG> USB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl V3D_R { } } #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, V3D_A>; -impl<'a, REG, const O: u8> V3D_W<'a, REG, O> +pub type V3D_W<'a, REG> = crate::BitWriter<'a, REG, V3D_A>; +impl<'a, REG> V3D_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl TRANSPOSER_R { } } #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TRANSPOSER_A>; -impl<'a, REG, const O: u8> TRANSPOSER_W<'a, REG, O> +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter<'a, REG, TRANSPOSER_A>; +impl<'a, REG> TRANSPOSER_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,9 +675,8 @@ impl MULTICORE_SYNC_0_R { } } #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = - crate::BitWriter<'a, REG, O, MULTICORE_SYNC_0_A>; -impl<'a, REG, const O: u8> MULTICORE_SYNC_0_W<'a, REG, O> +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter<'a, REG, MULTICORE_SYNC_0_A>; +impl<'a, REG> MULTICORE_SYNC_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -729,9 +728,8 @@ impl MULTICORE_SYNC_1_R { } } #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = - crate::BitWriter<'a, REG, O, MULTICORE_SYNC_1_A>; -impl<'a, REG, const O: u8> MULTICORE_SYNC_1_W<'a, REG, O> +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter<'a, REG, MULTICORE_SYNC_1_A>; +impl<'a, REG> MULTICORE_SYNC_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -783,9 +781,8 @@ impl MULTICORE_SYNC_2_R { } } #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = - crate::BitWriter<'a, REG, O, MULTICORE_SYNC_2_A>; -impl<'a, REG, const O: u8> MULTICORE_SYNC_2_W<'a, REG, O> +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter<'a, REG, MULTICORE_SYNC_2_A>; +impl<'a, REG> MULTICORE_SYNC_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -837,9 +834,8 @@ impl MULTICORE_SYNC_3_R { } } #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = - crate::BitWriter<'a, REG, O, MULTICORE_SYNC_3_A>; -impl<'a, REG, const O: u8> MULTICORE_SYNC_3_W<'a, REG, O> +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter<'a, REG, MULTICORE_SYNC_3_A>; +impl<'a, REG> MULTICORE_SYNC_3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -972,105 +968,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 1) } #[doc = "Bit 3 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 3) } #[doc = "Bit 5 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 5) } #[doc = "Bit 7 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 7) } #[doc = "Bit 9 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 9) } #[doc = "Bit 11 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 11) } #[doc = "Bit 13 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 13) } #[doc = "Bit 15 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 15) } #[doc = "Bit 17 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 17) } #[doc = "Bit 19 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 19) } #[doc = "Bit 21 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 21) } #[doc = "Bit 23 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 23) } #[doc = "Bit 25 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 25) } #[doc = "Bit 27 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 27) } #[doc = "Bit 29 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 29) } #[doc = "Bit 31 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr28.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr28.rs index a92d41f..029cdc4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr28.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr28.rs @@ -39,8 +39,8 @@ impl DMA_0_R { } } #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_0_A>; -impl<'a, REG, const O: u8> DMA_0_W<'a, REG, O> +pub type DMA_0_W<'a, REG> = crate::BitWriter<'a, REG, DMA_0_A>; +impl<'a, REG> DMA_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl DMA_1_R { } } #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_1_A>; -impl<'a, REG, const O: u8> DMA_1_W<'a, REG, O> +pub type DMA_1_W<'a, REG> = crate::BitWriter<'a, REG, DMA_1_A>; +impl<'a, REG> DMA_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl DMA_2_R { } } #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_2_A>; -impl<'a, REG, const O: u8> DMA_2_W<'a, REG, O> +pub type DMA_2_W<'a, REG> = crate::BitWriter<'a, REG, DMA_2_A>; +impl<'a, REG> DMA_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl DMA_3_R { } } #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_3_A>; -impl<'a, REG, const O: u8> DMA_3_W<'a, REG, O> +pub type DMA_3_W<'a, REG> = crate::BitWriter<'a, REG, DMA_3_A>; +impl<'a, REG> DMA_3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl DMA_4_R { } } #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_4_A>; -impl<'a, REG, const O: u8> DMA_4_W<'a, REG, O> +pub type DMA_4_W<'a, REG> = crate::BitWriter<'a, REG, DMA_4_A>; +impl<'a, REG> DMA_4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl DMA_5_R { } } #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_5_A>; -impl<'a, REG, const O: u8> DMA_5_W<'a, REG, O> +pub type DMA_5_W<'a, REG> = crate::BitWriter<'a, REG, DMA_5_A>; +impl<'a, REG> DMA_5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl DMA_6_R { } } #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_6_A>; -impl<'a, REG, const O: u8> DMA_6_W<'a, REG, O> +pub type DMA_6_W<'a, REG> = crate::BitWriter<'a, REG, DMA_6_A>; +impl<'a, REG> DMA_6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl DMA_7_8_R { } } #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_7_8_A>; -impl<'a, REG, const O: u8> DMA_7_8_W<'a, REG, O> +pub type DMA_7_8_W<'a, REG> = crate::BitWriter<'a, REG, DMA_7_8_A>; +impl<'a, REG> DMA_7_8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl DMA_9_10_R { } } #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_9_10_A>; -impl<'a, REG, const O: u8> DMA_9_10_W<'a, REG, O> +pub type DMA_9_10_W<'a, REG> = crate::BitWriter<'a, REG, DMA_9_10_A>; +impl<'a, REG> DMA_9_10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl DMA_11_R { } } #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_11_A>; -impl<'a, REG, const O: u8> DMA_11_W<'a, REG, O> +pub type DMA_11_W<'a, REG> = crate::BitWriter<'a, REG, DMA_11_A>; +impl<'a, REG> DMA_11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl DMA_12_R { } } #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_12_A>; -impl<'a, REG, const O: u8> DMA_12_W<'a, REG, O> +pub type DMA_12_W<'a, REG> = crate::BitWriter<'a, REG, DMA_12_A>; +impl<'a, REG> DMA_12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl DMA_13_R { } } #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_13_A>; -impl<'a, REG, const O: u8> DMA_13_W<'a, REG, O> +pub type DMA_13_W<'a, REG> = crate::BitWriter<'a, REG, DMA_13_A>; +impl<'a, REG> DMA_13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl DMA_14_R { } } #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_14_A>; -impl<'a, REG, const O: u8> DMA_14_W<'a, REG, O> +pub type DMA_14_W<'a, REG> = crate::BitWriter<'a, REG, DMA_14_A>; +impl<'a, REG> DMA_14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl AUX_R { } } #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, AUX_A>; -impl<'a, REG, const O: u8> AUX_W<'a, REG, O> +pub type AUX_W<'a, REG> = crate::BitWriter<'a, REG, AUX_A>; +impl<'a, REG> AUX_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl ARM_R { } } #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ARM_A>; -impl<'a, REG, const O: u8> ARM_W<'a, REG, O> +pub type ARM_W<'a, REG> = crate::BitWriter<'a, REG, ARM_A>; +impl<'a, REG> ARM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl DMA_15_R { } } #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DMA_15_A>; -impl<'a, REG, const O: u8> DMA_15_W<'a, REG, O> +pub type DMA_15_W<'a, REG> = crate::BitWriter<'a, REG, DMA_15_A>; +impl<'a, REG> DMA_15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 1) } #[doc = "Bit 3 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 3) } #[doc = "Bit 5 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 5) } #[doc = "Bit 7 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 7) } #[doc = "Bit 9 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 9) } #[doc = "Bit 11 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 11) } #[doc = "Bit 13 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 13) } #[doc = "Bit 15 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 15) } #[doc = "Bit 17 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 17) } #[doc = "Bit 19 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 19) } #[doc = "Bit 21 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 21) } #[doc = "Bit 23 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 23) } #[doc = "Bit 25 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 25) } #[doc = "Bit 27 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 27) } #[doc = "Bit 29 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 29) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr32.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr32.rs index ab58073..20ce5cd 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr32.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr32.rs @@ -39,8 +39,8 @@ impl HDMI_CEC_R { } } #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, HDMI_CEC_A>; -impl<'a, REG, const O: u8> HDMI_CEC_W<'a, REG, O> +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter<'a, REG, HDMI_CEC_A>; +impl<'a, REG> HDMI_CEC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl HVS_R { } } #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, HVS_A>; -impl<'a, REG, const O: u8> HVS_W<'a, REG, O> +pub type HVS_W<'a, REG> = crate::BitWriter<'a, REG, HVS_A>; +impl<'a, REG> HVS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl RPIVID_R { } } #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, RPIVID_A>; -impl<'a, REG, const O: u8> RPIVID_W<'a, REG, O> +pub type RPIVID_W<'a, REG> = crate::BitWriter<'a, REG, RPIVID_A>; +impl<'a, REG> RPIVID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl SDC_R { } } #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SDC_A>; -impl<'a, REG, const O: u8> SDC_W<'a, REG, O> +pub type SDC_W<'a, REG> = crate::BitWriter<'a, REG, SDC_A>; +impl<'a, REG> SDC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl DSI_0_R { } } #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DSI_0_A>; -impl<'a, REG, const O: u8> DSI_0_W<'a, REG, O> +pub type DSI_0_W<'a, REG> = crate::BitWriter<'a, REG, DSI_0_A>; +impl<'a, REG> DSI_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl PIXEL_VALVE_2_R { } } #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PIXEL_VALVE_2_A>; -impl<'a, REG, const O: u8> PIXEL_VALVE_2_W<'a, REG, O> +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter<'a, REG, PIXEL_VALVE_2_A>; +impl<'a, REG> PIXEL_VALVE_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl CAMERA_0_R { } } #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CAMERA_0_A>; -impl<'a, REG, const O: u8> CAMERA_0_W<'a, REG, O> +pub type CAMERA_0_W<'a, REG> = crate::BitWriter<'a, REG, CAMERA_0_A>; +impl<'a, REG> CAMERA_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl CAMERA_1_R { } } #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CAMERA_1_A>; -impl<'a, REG, const O: u8> CAMERA_1_W<'a, REG, O> +pub type CAMERA_1_W<'a, REG> = crate::BitWriter<'a, REG, CAMERA_1_A>; +impl<'a, REG> CAMERA_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl HDMI_0_R { } } #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, HDMI_0_A>; -impl<'a, REG, const O: u8> HDMI_0_W<'a, REG, O> +pub type HDMI_0_W<'a, REG> = crate::BitWriter<'a, REG, HDMI_0_A>; +impl<'a, REG> HDMI_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl HDMI_1_R { } } #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, HDMI_1_A>; -impl<'a, REG, const O: u8> HDMI_1_W<'a, REG, O> +pub type HDMI_1_W<'a, REG> = crate::BitWriter<'a, REG, HDMI_1_A>; +impl<'a, REG> HDMI_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl PIXEL_VALVE_3_R { } } #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PIXEL_VALVE_3_A>; -impl<'a, REG, const O: u8> PIXEL_VALVE_3_W<'a, REG, O> +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter<'a, REG, PIXEL_VALVE_3_A>; +impl<'a, REG> PIXEL_VALVE_3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl SPI_BSC_SLAVE_R { } } #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SPI_BSC_SLAVE_A>; -impl<'a, REG, const O: u8> SPI_BSC_SLAVE_W<'a, REG, O> +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter<'a, REG, SPI_BSC_SLAVE_A>; +impl<'a, REG> SPI_BSC_SLAVE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl DSI_1_R { } } #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DSI_1_A>; -impl<'a, REG, const O: u8> DSI_1_W<'a, REG, O> +pub type DSI_1_W<'a, REG> = crate::BitWriter<'a, REG, DSI_1_A>; +impl<'a, REG> DSI_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl PIXEL_VALVE_0_R { } } #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PIXEL_VALVE_0_A>; -impl<'a, REG, const O: u8> PIXEL_VALVE_0_W<'a, REG, O> +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter<'a, REG, PIXEL_VALVE_0_A>; +impl<'a, REG> PIXEL_VALVE_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl PIXEL_VALVE_1_2_R { } } #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PIXEL_VALVE_1_2_A>; -impl<'a, REG, const O: u8> PIXEL_VALVE_1_2_W<'a, REG, O> +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter<'a, REG, PIXEL_VALVE_1_2_A>; +impl<'a, REG> PIXEL_VALVE_1_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl CPR_R { } } #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CPR_A>; -impl<'a, REG, const O: u8> CPR_W<'a, REG, O> +pub type CPR_W<'a, REG> = crate::BitWriter<'a, REG, CPR_A>; +impl<'a, REG> CPR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -971,105 +971,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 1) } #[doc = "Bit 3 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 3) } #[doc = "Bit 5 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 5) } #[doc = "Bit 7 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 7) } #[doc = "Bit 9 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 9) } #[doc = "Bit 11 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 11) } #[doc = "Bit 13 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 13) } #[doc = "Bit 15 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 15) } #[doc = "Bit 17 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 17) } #[doc = "Bit 19 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 19) } #[doc = "Bit 21 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 21) } #[doc = "Bit 23 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 23) } #[doc = "Bit 25 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 25) } #[doc = "Bit 27 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 27) } #[doc = "Bit 29 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 29) } #[doc = "Bit 31 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr36.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr36.rs index bcacc71..423995d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr36.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr36.rs @@ -39,8 +39,8 @@ impl SMI_R { } } #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SMI_A>; -impl<'a, REG, const O: u8> SMI_W<'a, REG, O> +pub type SMI_W<'a, REG> = crate::BitWriter<'a, REG, SMI_A>; +impl<'a, REG> SMI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl GPIO_0_R { } } #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, GPIO_0_A>; -impl<'a, REG, const O: u8> GPIO_0_W<'a, REG, O> +pub type GPIO_0_W<'a, REG> = crate::BitWriter<'a, REG, GPIO_0_A>; +impl<'a, REG> GPIO_0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl GPIO_1_R { } } #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, GPIO_1_A>; -impl<'a, REG, const O: u8> GPIO_1_W<'a, REG, O> +pub type GPIO_1_W<'a, REG> = crate::BitWriter<'a, REG, GPIO_1_A>; +impl<'a, REG> GPIO_1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl GPIO_2_R { } } #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, GPIO_2_A>; -impl<'a, REG, const O: u8> GPIO_2_W<'a, REG, O> +pub type GPIO_2_W<'a, REG> = crate::BitWriter<'a, REG, GPIO_2_A>; +impl<'a, REG> GPIO_2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl GPIO_3_R { } } #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, GPIO_3_A>; -impl<'a, REG, const O: u8> GPIO_3_W<'a, REG, O> +pub type GPIO_3_W<'a, REG> = crate::BitWriter<'a, REG, GPIO_3_A>; +impl<'a, REG> GPIO_3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl I2C_R { } } #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, I2C_A>; -impl<'a, REG, const O: u8> I2C_W<'a, REG, O> +pub type I2C_W<'a, REG> = crate::BitWriter<'a, REG, I2C_A>; +impl<'a, REG> I2C_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl SPI_R { } } #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SPI_A>; -impl<'a, REG, const O: u8> SPI_W<'a, REG, O> +pub type SPI_W<'a, REG> = crate::BitWriter<'a, REG, SPI_A>; +impl<'a, REG> SPI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl PCM_I2S_R { } } #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PCM_I2S_A>; -impl<'a, REG, const O: u8> PCM_I2S_W<'a, REG, O> +pub type PCM_I2S_W<'a, REG> = crate::BitWriter<'a, REG, PCM_I2S_A>; +impl<'a, REG> PCM_I2S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl SDHOST_R { } } #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SDHOST_A>; -impl<'a, REG, const O: u8> SDHOST_W<'a, REG, O> +pub type SDHOST_W<'a, REG> = crate::BitWriter<'a, REG, SDHOST_A>; +impl<'a, REG> SDHOST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl UART_R { } } #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, UART_A>; -impl<'a, REG, const O: u8> UART_W<'a, REG, O> +pub type UART_W<'a, REG> = crate::BitWriter<'a, REG, UART_A>; +impl<'a, REG> UART_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl ETH_PCIE_R { } } #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ETH_PCIE_A>; -impl<'a, REG, const O: u8> ETH_PCIE_W<'a, REG, O> +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter<'a, REG, ETH_PCIE_A>; +impl<'a, REG> ETH_PCIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl VEC_R { } } #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, VEC_A>; -impl<'a, REG, const O: u8> VEC_W<'a, REG, O> +pub type VEC_W<'a, REG> = crate::BitWriter<'a, REG, VEC_A>; +impl<'a, REG> VEC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl CPG_R { } } #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CPG_A>; -impl<'a, REG, const O: u8> CPG_W<'a, REG, O> +pub type CPG_W<'a, REG> = crate::BitWriter<'a, REG, CPG_A>; +impl<'a, REG> CPG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl RNG_R { } } #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, RNG_A>; -impl<'a, REG, const O: u8> RNG_W<'a, REG, O> +pub type RNG_W<'a, REG> = crate::BitWriter<'a, REG, RNG_A>; +impl<'a, REG> RNG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl EMMC_R { } } #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, EMMC_A>; -impl<'a, REG, const O: u8> EMMC_W<'a, REG, O> +pub type EMMC_W<'a, REG> = crate::BitWriter<'a, REG, EMMC_A>; +impl<'a, REG> EMMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl ETH_PCIE_SECURE_R { } } #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ETH_PCIE_SECURE_A>; -impl<'a, REG, const O: u8> ETH_PCIE_SECURE_W<'a, REG, O> +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter<'a, REG, ETH_PCIE_SECURE_A>; +impl<'a, REG> ETH_PCIE_SECURE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -959,105 +959,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 1) } #[doc = "Bit 3 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 3) } #[doc = "Bit 5 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 5) } #[doc = "Bit 7 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 7) } #[doc = "Bit 9 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 9) } #[doc = "Bit 11 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 11) } #[doc = "Bit 13 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 13) } #[doc = "Bit 15 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 15) } #[doc = "Bit 17 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 17) } #[doc = "Bit 19 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 19) } #[doc = "Bit 21 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 21) } #[doc = "Bit 23 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 23) } #[doc = "Bit 25 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 25) } #[doc = "Bit 27 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 27) } #[doc = "Bit 29 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 29) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr4.rs index 9c1e7c0..8ddbbbc 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr4.rs @@ -39,8 +39,8 @@ impl INT16_R { } } #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT16_A>; -impl<'a, REG, const O: u8> INT16_W<'a, REG, O> +pub type INT16_W<'a, REG> = crate::BitWriter<'a, REG, INT16_A>; +impl<'a, REG> INT16_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT17_R { } } #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT17_A>; -impl<'a, REG, const O: u8> INT17_W<'a, REG, O> +pub type INT17_W<'a, REG> = crate::BitWriter<'a, REG, INT17_A>; +impl<'a, REG> INT17_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT18_R { } } #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT18_A>; -impl<'a, REG, const O: u8> INT18_W<'a, REG, O> +pub type INT18_W<'a, REG> = crate::BitWriter<'a, REG, INT18_A>; +impl<'a, REG> INT18_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT19_R { } } #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT19_A>; -impl<'a, REG, const O: u8> INT19_W<'a, REG, O> +pub type INT19_W<'a, REG> = crate::BitWriter<'a, REG, INT19_A>; +impl<'a, REG> INT19_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT20_R { } } #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT20_A>; -impl<'a, REG, const O: u8> INT20_W<'a, REG, O> +pub type INT20_W<'a, REG> = crate::BitWriter<'a, REG, INT20_A>; +impl<'a, REG> INT20_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT21_R { } } #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT21_A>; -impl<'a, REG, const O: u8> INT21_W<'a, REG, O> +pub type INT21_W<'a, REG> = crate::BitWriter<'a, REG, INT21_A>; +impl<'a, REG> INT21_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT22_R { } } #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT22_A>; -impl<'a, REG, const O: u8> INT22_W<'a, REG, O> +pub type INT22_W<'a, REG> = crate::BitWriter<'a, REG, INT22_A>; +impl<'a, REG> INT22_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT23_R { } } #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT23_A>; -impl<'a, REG, const O: u8> INT23_W<'a, REG, O> +pub type INT23_W<'a, REG> = crate::BitWriter<'a, REG, INT23_A>; +impl<'a, REG> INT23_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT24_R { } } #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT24_A>; -impl<'a, REG, const O: u8> INT24_W<'a, REG, O> +pub type INT24_W<'a, REG> = crate::BitWriter<'a, REG, INT24_A>; +impl<'a, REG> INT24_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT25_R { } } #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT25_A>; -impl<'a, REG, const O: u8> INT25_W<'a, REG, O> +pub type INT25_W<'a, REG> = crate::BitWriter<'a, REG, INT25_A>; +impl<'a, REG> INT25_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT26_R { } } #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT26_A>; -impl<'a, REG, const O: u8> INT26_W<'a, REG, O> +pub type INT26_W<'a, REG> = crate::BitWriter<'a, REG, INT26_A>; +impl<'a, REG> INT26_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT27_R { } } #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT27_A>; -impl<'a, REG, const O: u8> INT27_W<'a, REG, O> +pub type INT27_W<'a, REG> = crate::BitWriter<'a, REG, INT27_A>; +impl<'a, REG> INT27_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT28_R { } } #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT28_A>; -impl<'a, REG, const O: u8> INT28_W<'a, REG, O> +pub type INT28_W<'a, REG> = crate::BitWriter<'a, REG, INT28_A>; +impl<'a, REG> INT28_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT29_R { } } #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT29_A>; -impl<'a, REG, const O: u8> INT29_W<'a, REG, O> +pub type INT29_W<'a, REG> = crate::BitWriter<'a, REG, INT29_A>; +impl<'a, REG> INT29_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT30_R { } } #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT30_A>; -impl<'a, REG, const O: u8> INT30_W<'a, REG, O> +pub type INT30_W<'a, REG> = crate::BitWriter<'a, REG, INT30_A>; +impl<'a, REG> INT30_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT31_R { } } #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT31_A>; -impl<'a, REG, const O: u8> INT31_W<'a, REG, O> +pub type INT31_W<'a, REG> = crate::BitWriter<'a, REG, INT31_A>; +impl<'a, REG> INT31_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr40.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr40.rs index e2984b7..ac08998 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr40.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr40.rs @@ -39,8 +39,8 @@ impl INT160_R { } } #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT160_A>; -impl<'a, REG, const O: u8> INT160_W<'a, REG, O> +pub type INT160_W<'a, REG> = crate::BitWriter<'a, REG, INT160_A>; +impl<'a, REG> INT160_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT161_R { } } #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT161_A>; -impl<'a, REG, const O: u8> INT161_W<'a, REG, O> +pub type INT161_W<'a, REG> = crate::BitWriter<'a, REG, INT161_A>; +impl<'a, REG> INT161_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT162_R { } } #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT162_A>; -impl<'a, REG, const O: u8> INT162_W<'a, REG, O> +pub type INT162_W<'a, REG> = crate::BitWriter<'a, REG, INT162_A>; +impl<'a, REG> INT162_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT163_R { } } #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT163_A>; -impl<'a, REG, const O: u8> INT163_W<'a, REG, O> +pub type INT163_W<'a, REG> = crate::BitWriter<'a, REG, INT163_A>; +impl<'a, REG> INT163_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT164_R { } } #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT164_A>; -impl<'a, REG, const O: u8> INT164_W<'a, REG, O> +pub type INT164_W<'a, REG> = crate::BitWriter<'a, REG, INT164_A>; +impl<'a, REG> INT164_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT165_R { } } #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT165_A>; -impl<'a, REG, const O: u8> INT165_W<'a, REG, O> +pub type INT165_W<'a, REG> = crate::BitWriter<'a, REG, INT165_A>; +impl<'a, REG> INT165_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT166_R { } } #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT166_A>; -impl<'a, REG, const O: u8> INT166_W<'a, REG, O> +pub type INT166_W<'a, REG> = crate::BitWriter<'a, REG, INT166_A>; +impl<'a, REG> INT166_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT167_R { } } #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT167_A>; -impl<'a, REG, const O: u8> INT167_W<'a, REG, O> +pub type INT167_W<'a, REG> = crate::BitWriter<'a, REG, INT167_A>; +impl<'a, REG> INT167_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT168_R { } } #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT168_A>; -impl<'a, REG, const O: u8> INT168_W<'a, REG, O> +pub type INT168_W<'a, REG> = crate::BitWriter<'a, REG, INT168_A>; +impl<'a, REG> INT168_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT169_R { } } #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT169_A>; -impl<'a, REG, const O: u8> INT169_W<'a, REG, O> +pub type INT169_W<'a, REG> = crate::BitWriter<'a, REG, INT169_A>; +impl<'a, REG> INT169_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT170_R { } } #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT170_A>; -impl<'a, REG, const O: u8> INT170_W<'a, REG, O> +pub type INT170_W<'a, REG> = crate::BitWriter<'a, REG, INT170_A>; +impl<'a, REG> INT170_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT171_R { } } #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT171_A>; -impl<'a, REG, const O: u8> INT171_W<'a, REG, O> +pub type INT171_W<'a, REG> = crate::BitWriter<'a, REG, INT171_A>; +impl<'a, REG> INT171_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT172_R { } } #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT172_A>; -impl<'a, REG, const O: u8> INT172_W<'a, REG, O> +pub type INT172_W<'a, REG> = crate::BitWriter<'a, REG, INT172_A>; +impl<'a, REG> INT172_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT173_R { } } #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT173_A>; -impl<'a, REG, const O: u8> INT173_W<'a, REG, O> +pub type INT173_W<'a, REG> = crate::BitWriter<'a, REG, INT173_A>; +impl<'a, REG> INT173_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT174_R { } } #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT174_A>; -impl<'a, REG, const O: u8> INT174_W<'a, REG, O> +pub type INT174_W<'a, REG> = crate::BitWriter<'a, REG, INT174_A>; +impl<'a, REG> INT174_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT175_R { } } #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT175_A>; -impl<'a, REG, const O: u8> INT175_W<'a, REG, O> +pub type INT175_W<'a, REG> = crate::BitWriter<'a, REG, INT175_A>; +impl<'a, REG> INT175_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr44.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr44.rs index bf618d2..c730d72 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr44.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr44.rs @@ -39,8 +39,8 @@ impl INT176_R { } } #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT176_A>; -impl<'a, REG, const O: u8> INT176_W<'a, REG, O> +pub type INT176_W<'a, REG> = crate::BitWriter<'a, REG, INT176_A>; +impl<'a, REG> INT176_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT177_R { } } #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT177_A>; -impl<'a, REG, const O: u8> INT177_W<'a, REG, O> +pub type INT177_W<'a, REG> = crate::BitWriter<'a, REG, INT177_A>; +impl<'a, REG> INT177_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT178_R { } } #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT178_A>; -impl<'a, REG, const O: u8> INT178_W<'a, REG, O> +pub type INT178_W<'a, REG> = crate::BitWriter<'a, REG, INT178_A>; +impl<'a, REG> INT178_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT179_R { } } #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT179_A>; -impl<'a, REG, const O: u8> INT179_W<'a, REG, O> +pub type INT179_W<'a, REG> = crate::BitWriter<'a, REG, INT179_A>; +impl<'a, REG> INT179_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT180_R { } } #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT180_A>; -impl<'a, REG, const O: u8> INT180_W<'a, REG, O> +pub type INT180_W<'a, REG> = crate::BitWriter<'a, REG, INT180_A>; +impl<'a, REG> INT180_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT181_R { } } #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT181_A>; -impl<'a, REG, const O: u8> INT181_W<'a, REG, O> +pub type INT181_W<'a, REG> = crate::BitWriter<'a, REG, INT181_A>; +impl<'a, REG> INT181_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT182_R { } } #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT182_A>; -impl<'a, REG, const O: u8> INT182_W<'a, REG, O> +pub type INT182_W<'a, REG> = crate::BitWriter<'a, REG, INT182_A>; +impl<'a, REG> INT182_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT183_R { } } #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT183_A>; -impl<'a, REG, const O: u8> INT183_W<'a, REG, O> +pub type INT183_W<'a, REG> = crate::BitWriter<'a, REG, INT183_A>; +impl<'a, REG> INT183_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT184_R { } } #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT184_A>; -impl<'a, REG, const O: u8> INT184_W<'a, REG, O> +pub type INT184_W<'a, REG> = crate::BitWriter<'a, REG, INT184_A>; +impl<'a, REG> INT184_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT185_R { } } #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT185_A>; -impl<'a, REG, const O: u8> INT185_W<'a, REG, O> +pub type INT185_W<'a, REG> = crate::BitWriter<'a, REG, INT185_A>; +impl<'a, REG> INT185_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT186_R { } } #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT186_A>; -impl<'a, REG, const O: u8> INT186_W<'a, REG, O> +pub type INT186_W<'a, REG> = crate::BitWriter<'a, REG, INT186_A>; +impl<'a, REG> INT186_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT187_R { } } #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT187_A>; -impl<'a, REG, const O: u8> INT187_W<'a, REG, O> +pub type INT187_W<'a, REG> = crate::BitWriter<'a, REG, INT187_A>; +impl<'a, REG> INT187_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT188_R { } } #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT188_A>; -impl<'a, REG, const O: u8> INT188_W<'a, REG, O> +pub type INT188_W<'a, REG> = crate::BitWriter<'a, REG, INT188_A>; +impl<'a, REG> INT188_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT189_R { } } #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT189_A>; -impl<'a, REG, const O: u8> INT189_W<'a, REG, O> +pub type INT189_W<'a, REG> = crate::BitWriter<'a, REG, INT189_A>; +impl<'a, REG> INT189_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT190_R { } } #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT190_A>; -impl<'a, REG, const O: u8> INT190_W<'a, REG, O> +pub type INT190_W<'a, REG> = crate::BitWriter<'a, REG, INT190_A>; +impl<'a, REG> INT190_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT191_R { } } #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT191_A>; -impl<'a, REG, const O: u8> INT191_W<'a, REG, O> +pub type INT191_W<'a, REG> = crate::BitWriter<'a, REG, INT191_A>; +impl<'a, REG> INT191_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr48.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr48.rs index e315e8e..ff1b8f5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr48.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr48.rs @@ -39,8 +39,8 @@ impl INT192_R { } } #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT192_A>; -impl<'a, REG, const O: u8> INT192_W<'a, REG, O> +pub type INT192_W<'a, REG> = crate::BitWriter<'a, REG, INT192_A>; +impl<'a, REG> INT192_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT193_R { } } #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT193_A>; -impl<'a, REG, const O: u8> INT193_W<'a, REG, O> +pub type INT193_W<'a, REG> = crate::BitWriter<'a, REG, INT193_A>; +impl<'a, REG> INT193_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT194_R { } } #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT194_A>; -impl<'a, REG, const O: u8> INT194_W<'a, REG, O> +pub type INT194_W<'a, REG> = crate::BitWriter<'a, REG, INT194_A>; +impl<'a, REG> INT194_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT195_R { } } #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT195_A>; -impl<'a, REG, const O: u8> INT195_W<'a, REG, O> +pub type INT195_W<'a, REG> = crate::BitWriter<'a, REG, INT195_A>; +impl<'a, REG> INT195_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT196_R { } } #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT196_A>; -impl<'a, REG, const O: u8> INT196_W<'a, REG, O> +pub type INT196_W<'a, REG> = crate::BitWriter<'a, REG, INT196_A>; +impl<'a, REG> INT196_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT197_R { } } #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT197_A>; -impl<'a, REG, const O: u8> INT197_W<'a, REG, O> +pub type INT197_W<'a, REG> = crate::BitWriter<'a, REG, INT197_A>; +impl<'a, REG> INT197_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT198_R { } } #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT198_A>; -impl<'a, REG, const O: u8> INT198_W<'a, REG, O> +pub type INT198_W<'a, REG> = crate::BitWriter<'a, REG, INT198_A>; +impl<'a, REG> INT198_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT199_R { } } #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT199_A>; -impl<'a, REG, const O: u8> INT199_W<'a, REG, O> +pub type INT199_W<'a, REG> = crate::BitWriter<'a, REG, INT199_A>; +impl<'a, REG> INT199_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT200_R { } } #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT200_A>; -impl<'a, REG, const O: u8> INT200_W<'a, REG, O> +pub type INT200_W<'a, REG> = crate::BitWriter<'a, REG, INT200_A>; +impl<'a, REG> INT200_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT201_R { } } #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT201_A>; -impl<'a, REG, const O: u8> INT201_W<'a, REG, O> +pub type INT201_W<'a, REG> = crate::BitWriter<'a, REG, INT201_A>; +impl<'a, REG> INT201_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT202_R { } } #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT202_A>; -impl<'a, REG, const O: u8> INT202_W<'a, REG, O> +pub type INT202_W<'a, REG> = crate::BitWriter<'a, REG, INT202_A>; +impl<'a, REG> INT202_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT203_R { } } #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT203_A>; -impl<'a, REG, const O: u8> INT203_W<'a, REG, O> +pub type INT203_W<'a, REG> = crate::BitWriter<'a, REG, INT203_A>; +impl<'a, REG> INT203_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT204_R { } } #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT204_A>; -impl<'a, REG, const O: u8> INT204_W<'a, REG, O> +pub type INT204_W<'a, REG> = crate::BitWriter<'a, REG, INT204_A>; +impl<'a, REG> INT204_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT205_R { } } #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT205_A>; -impl<'a, REG, const O: u8> INT205_W<'a, REG, O> +pub type INT205_W<'a, REG> = crate::BitWriter<'a, REG, INT205_A>; +impl<'a, REG> INT205_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT206_R { } } #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT206_A>; -impl<'a, REG, const O: u8> INT206_W<'a, REG, O> +pub type INT206_W<'a, REG> = crate::BitWriter<'a, REG, INT206_A>; +impl<'a, REG> INT206_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT207_R { } } #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT207_A>; -impl<'a, REG, const O: u8> INT207_W<'a, REG, O> +pub type INT207_W<'a, REG> = crate::BitWriter<'a, REG, INT207_A>; +impl<'a, REG> INT207_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr52.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr52.rs index 0ad5a00..8512591 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr52.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr52.rs @@ -39,8 +39,8 @@ impl INT208_R { } } #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT208_A>; -impl<'a, REG, const O: u8> INT208_W<'a, REG, O> +pub type INT208_W<'a, REG> = crate::BitWriter<'a, REG, INT208_A>; +impl<'a, REG> INT208_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT209_R { } } #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT209_A>; -impl<'a, REG, const O: u8> INT209_W<'a, REG, O> +pub type INT209_W<'a, REG> = crate::BitWriter<'a, REG, INT209_A>; +impl<'a, REG> INT209_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT210_R { } } #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT210_A>; -impl<'a, REG, const O: u8> INT210_W<'a, REG, O> +pub type INT210_W<'a, REG> = crate::BitWriter<'a, REG, INT210_A>; +impl<'a, REG> INT210_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT211_R { } } #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT211_A>; -impl<'a, REG, const O: u8> INT211_W<'a, REG, O> +pub type INT211_W<'a, REG> = crate::BitWriter<'a, REG, INT211_A>; +impl<'a, REG> INT211_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT212_R { } } #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT212_A>; -impl<'a, REG, const O: u8> INT212_W<'a, REG, O> +pub type INT212_W<'a, REG> = crate::BitWriter<'a, REG, INT212_A>; +impl<'a, REG> INT212_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT213_R { } } #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT213_A>; -impl<'a, REG, const O: u8> INT213_W<'a, REG, O> +pub type INT213_W<'a, REG> = crate::BitWriter<'a, REG, INT213_A>; +impl<'a, REG> INT213_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT214_R { } } #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT214_A>; -impl<'a, REG, const O: u8> INT214_W<'a, REG, O> +pub type INT214_W<'a, REG> = crate::BitWriter<'a, REG, INT214_A>; +impl<'a, REG> INT214_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT215_R { } } #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT215_A>; -impl<'a, REG, const O: u8> INT215_W<'a, REG, O> +pub type INT215_W<'a, REG> = crate::BitWriter<'a, REG, INT215_A>; +impl<'a, REG> INT215_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT216_R { } } #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT216_A>; -impl<'a, REG, const O: u8> INT216_W<'a, REG, O> +pub type INT216_W<'a, REG> = crate::BitWriter<'a, REG, INT216_A>; +impl<'a, REG> INT216_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT217_R { } } #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT217_A>; -impl<'a, REG, const O: u8> INT217_W<'a, REG, O> +pub type INT217_W<'a, REG> = crate::BitWriter<'a, REG, INT217_A>; +impl<'a, REG> INT217_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT218_R { } } #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT218_A>; -impl<'a, REG, const O: u8> INT218_W<'a, REG, O> +pub type INT218_W<'a, REG> = crate::BitWriter<'a, REG, INT218_A>; +impl<'a, REG> INT218_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT219_R { } } #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT219_A>; -impl<'a, REG, const O: u8> INT219_W<'a, REG, O> +pub type INT219_W<'a, REG> = crate::BitWriter<'a, REG, INT219_A>; +impl<'a, REG> INT219_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT220_R { } } #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT220_A>; -impl<'a, REG, const O: u8> INT220_W<'a, REG, O> +pub type INT220_W<'a, REG> = crate::BitWriter<'a, REG, INT220_A>; +impl<'a, REG> INT220_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT221_R { } } #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT221_A>; -impl<'a, REG, const O: u8> INT221_W<'a, REG, O> +pub type INT221_W<'a, REG> = crate::BitWriter<'a, REG, INT221_A>; +impl<'a, REG> INT221_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT222_R { } } #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT222_A>; -impl<'a, REG, const O: u8> INT222_W<'a, REG, O> +pub type INT222_W<'a, REG> = crate::BitWriter<'a, REG, INT222_A>; +impl<'a, REG> INT222_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT223_R { } } #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT223_A>; -impl<'a, REG, const O: u8> INT223_W<'a, REG, O> +pub type INT223_W<'a, REG> = crate::BitWriter<'a, REG, INT223_A>; +impl<'a, REG> INT223_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr8.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr8.rs index 93fdbf2..fbc3db5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr8.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icfgr/gicd_icfgr8.rs @@ -39,8 +39,8 @@ impl INT32_R { } } #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT32_A>; -impl<'a, REG, const O: u8> INT32_W<'a, REG, O> +pub type INT32_W<'a, REG> = crate::BitWriter<'a, REG, INT32_A>; +impl<'a, REG> INT32_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -92,8 +92,8 @@ impl INT33_R { } } #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT33_A>; -impl<'a, REG, const O: u8> INT33_W<'a, REG, O> +pub type INT33_W<'a, REG> = crate::BitWriter<'a, REG, INT33_A>; +impl<'a, REG> INT33_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -145,8 +145,8 @@ impl INT34_R { } } #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT34_A>; -impl<'a, REG, const O: u8> INT34_W<'a, REG, O> +pub type INT34_W<'a, REG> = crate::BitWriter<'a, REG, INT34_A>; +impl<'a, REG> INT34_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -198,8 +198,8 @@ impl INT35_R { } } #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT35_A>; -impl<'a, REG, const O: u8> INT35_W<'a, REG, O> +pub type INT35_W<'a, REG> = crate::BitWriter<'a, REG, INT35_A>; +impl<'a, REG> INT35_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -251,8 +251,8 @@ impl INT36_R { } } #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT36_A>; -impl<'a, REG, const O: u8> INT36_W<'a, REG, O> +pub type INT36_W<'a, REG> = crate::BitWriter<'a, REG, INT36_A>; +impl<'a, REG> INT36_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -304,8 +304,8 @@ impl INT37_R { } } #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT37_A>; -impl<'a, REG, const O: u8> INT37_W<'a, REG, O> +pub type INT37_W<'a, REG> = crate::BitWriter<'a, REG, INT37_A>; +impl<'a, REG> INT37_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -357,8 +357,8 @@ impl INT38_R { } } #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT38_A>; -impl<'a, REG, const O: u8> INT38_W<'a, REG, O> +pub type INT38_W<'a, REG> = crate::BitWriter<'a, REG, INT38_A>; +impl<'a, REG> INT38_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -410,8 +410,8 @@ impl INT39_R { } } #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT39_A>; -impl<'a, REG, const O: u8> INT39_W<'a, REG, O> +pub type INT39_W<'a, REG> = crate::BitWriter<'a, REG, INT39_A>; +impl<'a, REG> INT39_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -463,8 +463,8 @@ impl INT40_R { } } #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT40_A>; -impl<'a, REG, const O: u8> INT40_W<'a, REG, O> +pub type INT40_W<'a, REG> = crate::BitWriter<'a, REG, INT40_A>; +impl<'a, REG> INT40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -516,8 +516,8 @@ impl INT41_R { } } #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT41_A>; -impl<'a, REG, const O: u8> INT41_W<'a, REG, O> +pub type INT41_W<'a, REG> = crate::BitWriter<'a, REG, INT41_A>; +impl<'a, REG> INT41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -569,8 +569,8 @@ impl INT42_R { } } #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT42_A>; -impl<'a, REG, const O: u8> INT42_W<'a, REG, O> +pub type INT42_W<'a, REG> = crate::BitWriter<'a, REG, INT42_A>; +impl<'a, REG> INT42_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -622,8 +622,8 @@ impl INT43_R { } } #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT43_A>; -impl<'a, REG, const O: u8> INT43_W<'a, REG, O> +pub type INT43_W<'a, REG> = crate::BitWriter<'a, REG, INT43_A>; +impl<'a, REG> INT43_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -675,8 +675,8 @@ impl INT44_R { } } #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT44_A>; -impl<'a, REG, const O: u8> INT44_W<'a, REG, O> +pub type INT44_W<'a, REG> = crate::BitWriter<'a, REG, INT44_A>; +impl<'a, REG> INT44_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -728,8 +728,8 @@ impl INT45_R { } } #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT45_A>; -impl<'a, REG, const O: u8> INT45_W<'a, REG, O> +pub type INT45_W<'a, REG> = crate::BitWriter<'a, REG, INT45_A>; +impl<'a, REG> INT45_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -781,8 +781,8 @@ impl INT46_R { } } #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT46_A>; -impl<'a, REG, const O: u8> INT46_W<'a, REG, O> +pub type INT46_W<'a, REG> = crate::BitWriter<'a, REG, INT46_A>; +impl<'a, REG> INT46_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -834,8 +834,8 @@ impl INT47_R { } } #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, INT47_A>; -impl<'a, REG, const O: u8> INT47_W<'a, REG, O> +pub type INT47_W<'a, REG> = crate::BitWriter<'a, REG, INT47_A>; +impl<'a, REG> INT47_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -956,105 +956,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 1) } #[doc = "Bit 3 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 3) } #[doc = "Bit 5 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 5) } #[doc = "Bit 7 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 7) } #[doc = "Bit 9 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 9) } #[doc = "Bit 11 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 11) } #[doc = "Bit 13 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 13) } #[doc = "Bit 15 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 15) } #[doc = "Bit 17 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 17) } #[doc = "Bit 19 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 19) } #[doc = "Bit 21 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 21) } #[doc = "Bit 23 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 23) } #[doc = "Bit 25 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 25) } #[doc = "Bit 27 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 27) } #[doc = "Bit 29 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 29) } #[doc = "Bit 31 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr.rs index ddc5d8b..e8f8637 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ICPENDR { + gicd_icpendr0: GICD_ICPENDR0, + gicd_icpendr1: GICD_ICPENDR1, + gicd_icpendr2: GICD_ICPENDR2, + gicd_icpendr3: GICD_ICPENDR3, + gicd_icpendr4: GICD_ICPENDR4, + gicd_icpendr5: GICD_ICPENDR5, + gicd_icpendr6: GICD_ICPENDR6, +} +impl GICD_ICPENDR { #[doc = "0x00 - Interrupt Clear-Pending"] - pub gicd_icpendr0: GICD_ICPENDR0, + #[inline(always)] + pub const fn gicd_icpendr0(&self) -> &GICD_ICPENDR0 { + &self.gicd_icpendr0 + } #[doc = "0x04 - Interrupt Clear-Pending"] - pub gicd_icpendr1: GICD_ICPENDR1, + #[inline(always)] + pub const fn gicd_icpendr1(&self) -> &GICD_ICPENDR1 { + &self.gicd_icpendr1 + } #[doc = "0x08 - Interrupt Clear-Pending"] - pub gicd_icpendr2: GICD_ICPENDR2, + #[inline(always)] + pub const fn gicd_icpendr2(&self) -> &GICD_ICPENDR2 { + &self.gicd_icpendr2 + } #[doc = "0x0c - Interrupt Clear-Pending"] - pub gicd_icpendr3: GICD_ICPENDR3, + #[inline(always)] + pub const fn gicd_icpendr3(&self) -> &GICD_ICPENDR3 { + &self.gicd_icpendr3 + } #[doc = "0x10 - Interrupt Clear-Pending"] - pub gicd_icpendr4: GICD_ICPENDR4, + #[inline(always)] + pub const fn gicd_icpendr4(&self) -> &GICD_ICPENDR4 { + &self.gicd_icpendr4 + } #[doc = "0x14 - Interrupt Clear-Pending"] - pub gicd_icpendr5: GICD_ICPENDR5, + #[inline(always)] + pub const fn gicd_icpendr5(&self) -> &GICD_ICPENDR5 { + &self.gicd_icpendr5 + } #[doc = "0x18 - Interrupt Clear-Pending"] - pub gicd_icpendr6: GICD_ICPENDR6, + #[inline(always)] + pub const fn gicd_icpendr6(&self) -> &GICD_ICPENDR6 { + &self.gicd_icpendr6 + } } #[doc = "GICD_ICPENDR0 (rw) register accessor: Interrupt Clear-Pending\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_icpendr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_icpendr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_icpendr0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr0.rs index a454d13..a810a7f 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr1.rs index c63ac66..668b483 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr2.rs index 1124427..625ed99 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr3.rs index f06a68f..90ef515 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr4.rs index 61c4a90..681d36d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr5.rs index 321de1d..6988603 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr6.rs index 9bd4b8c..0976cd2 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_icpendr/gicd_icpendr6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr.rs index 5bac0f6..0d7f004 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_IGROUPR { + gicd_igroupr0: GICD_IGROUPR0, + gicd_igroupr1: GICD_IGROUPR1, + gicd_igroupr2: GICD_IGROUPR2, + gicd_igroupr3: GICD_IGROUPR3, + gicd_igroupr4: GICD_IGROUPR4, + gicd_igroupr5: GICD_IGROUPR5, + gicd_igroupr6: GICD_IGROUPR6, +} +impl GICD_IGROUPR { #[doc = "0x00 - Interrupt Group"] - pub gicd_igroupr0: GICD_IGROUPR0, + #[inline(always)] + pub const fn gicd_igroupr0(&self) -> &GICD_IGROUPR0 { + &self.gicd_igroupr0 + } #[doc = "0x04 - Interrupt Group"] - pub gicd_igroupr1: GICD_IGROUPR1, + #[inline(always)] + pub const fn gicd_igroupr1(&self) -> &GICD_IGROUPR1 { + &self.gicd_igroupr1 + } #[doc = "0x08 - Interrupt Group"] - pub gicd_igroupr2: GICD_IGROUPR2, + #[inline(always)] + pub const fn gicd_igroupr2(&self) -> &GICD_IGROUPR2 { + &self.gicd_igroupr2 + } #[doc = "0x0c - Interrupt Group"] - pub gicd_igroupr3: GICD_IGROUPR3, + #[inline(always)] + pub const fn gicd_igroupr3(&self) -> &GICD_IGROUPR3 { + &self.gicd_igroupr3 + } #[doc = "0x10 - Interrupt Group"] - pub gicd_igroupr4: GICD_IGROUPR4, + #[inline(always)] + pub const fn gicd_igroupr4(&self) -> &GICD_IGROUPR4 { + &self.gicd_igroupr4 + } #[doc = "0x14 - Interrupt Group"] - pub gicd_igroupr5: GICD_IGROUPR5, + #[inline(always)] + pub const fn gicd_igroupr5(&self) -> &GICD_IGROUPR5 { + &self.gicd_igroupr5 + } #[doc = "0x18 - Interrupt Group"] - pub gicd_igroupr6: GICD_IGROUPR6, + #[inline(always)] + pub const fn gicd_igroupr6(&self) -> &GICD_IGROUPR6 { + &self.gicd_igroupr6 + } } #[doc = "GICD_IGROUPR0 (rw) register accessor: Interrupt Group\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_igroupr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_igroupr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_igroupr0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr0.rs index 5e8cdd0..6a74d1c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr1.rs index 7ea91f6..c946cb5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr2.rs index 6652c31..6e7195c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr3.rs index 742fb7e..4155877 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr4.rs index 399aa88..936b5a9 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr5.rs index db16be6..02bdd9d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr6.rs index 7c7e098..818f1c1 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_igroupr/gicd_igroupr6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_iidr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_iidr.rs index 6aa681e..d5f653b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_iidr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_iidr.rs @@ -45,7 +45,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Distributor Implementer Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_iidr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr.rs index e0b5a9a..84f4bde 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr.rs @@ -2,118 +2,344 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_IPRIORITYR { + gicd_ipriorityr0: GICD_IPRIORITYR0, + gicd_ipriorityr1: GICD_IPRIORITYR1, + gicd_ipriorityr2: GICD_IPRIORITYR2, + gicd_ipriorityr3: GICD_IPRIORITYR3, + gicd_ipriorityr4: GICD_IPRIORITYR4, + gicd_ipriorityr5: GICD_IPRIORITYR5, + gicd_ipriorityr6: GICD_IPRIORITYR6, + gicd_ipriorityr7: GICD_IPRIORITYR7, + gicd_ipriorityr8: GICD_IPRIORITYR8, + gicd_ipriorityr9: GICD_IPRIORITYR9, + gicd_ipriorityr10: GICD_IPRIORITYR10, + gicd_ipriorityr11: GICD_IPRIORITYR11, + gicd_ipriorityr12: GICD_IPRIORITYR12, + gicd_ipriorityr13: GICD_IPRIORITYR13, + gicd_ipriorityr14: GICD_IPRIORITYR14, + gicd_ipriorityr15: GICD_IPRIORITYR15, + gicd_ipriorityr16: GICD_IPRIORITYR16, + gicd_ipriorityr17: GICD_IPRIORITYR17, + gicd_ipriorityr18: GICD_IPRIORITYR18, + gicd_ipriorityr19: GICD_IPRIORITYR19, + gicd_ipriorityr20: GICD_IPRIORITYR20, + gicd_ipriorityr21: GICD_IPRIORITYR21, + gicd_ipriorityr22: GICD_IPRIORITYR22, + gicd_ipriorityr23: GICD_IPRIORITYR23, + gicd_ipriorityr24: GICD_IPRIORITYR24, + gicd_ipriorityr25: GICD_IPRIORITYR25, + gicd_ipriorityr26: GICD_IPRIORITYR26, + gicd_ipriorityr27: GICD_IPRIORITYR27, + gicd_ipriorityr28: GICD_IPRIORITYR28, + gicd_ipriorityr29: GICD_IPRIORITYR29, + gicd_ipriorityr30: GICD_IPRIORITYR30, + gicd_ipriorityr31: GICD_IPRIORITYR31, + gicd_ipriorityr32: GICD_IPRIORITYR32, + gicd_ipriorityr33: GICD_IPRIORITYR33, + gicd_ipriorityr34: GICD_IPRIORITYR34, + gicd_ipriorityr35: GICD_IPRIORITYR35, + gicd_ipriorityr36: GICD_IPRIORITYR36, + gicd_ipriorityr37: GICD_IPRIORITYR37, + gicd_ipriorityr38: GICD_IPRIORITYR38, + gicd_ipriorityr39: GICD_IPRIORITYR39, + gicd_ipriorityr40: GICD_IPRIORITYR40, + gicd_ipriorityr41: GICD_IPRIORITYR41, + gicd_ipriorityr42: GICD_IPRIORITYR42, + gicd_ipriorityr43: GICD_IPRIORITYR43, + gicd_ipriorityr44: GICD_IPRIORITYR44, + gicd_ipriorityr45: GICD_IPRIORITYR45, + gicd_ipriorityr46: GICD_IPRIORITYR46, + gicd_ipriorityr47: GICD_IPRIORITYR47, + gicd_ipriorityr48: GICD_IPRIORITYR48, + gicd_ipriorityr49: GICD_IPRIORITYR49, + gicd_ipriorityr50: GICD_IPRIORITYR50, + gicd_ipriorityr51: GICD_IPRIORITYR51, + gicd_ipriorityr52: GICD_IPRIORITYR52, + gicd_ipriorityr53: GICD_IPRIORITYR53, + gicd_ipriorityr54: GICD_IPRIORITYR54, + gicd_ipriorityr55: GICD_IPRIORITYR55, +} +impl GICD_IPRIORITYR { #[doc = "0x00 - Interrupt Priority 0 - 3 (Lower is first)"] - pub gicd_ipriorityr0: GICD_IPRIORITYR0, + #[inline(always)] + pub const fn gicd_ipriorityr0(&self) -> &GICD_IPRIORITYR0 { + &self.gicd_ipriorityr0 + } #[doc = "0x04 - Interrupt Priority 4 - 7 (Lower is first)"] - pub gicd_ipriorityr1: GICD_IPRIORITYR1, + #[inline(always)] + pub const fn gicd_ipriorityr1(&self) -> &GICD_IPRIORITYR1 { + &self.gicd_ipriorityr1 + } #[doc = "0x08 - Interrupt Priority 8 - 11 (Lower is first)"] - pub gicd_ipriorityr2: GICD_IPRIORITYR2, + #[inline(always)] + pub const fn gicd_ipriorityr2(&self) -> &GICD_IPRIORITYR2 { + &self.gicd_ipriorityr2 + } #[doc = "0x0c - Interrupt Priority 12 - 15 (Lower is first)"] - pub gicd_ipriorityr3: GICD_IPRIORITYR3, + #[inline(always)] + pub const fn gicd_ipriorityr3(&self) -> &GICD_IPRIORITYR3 { + &self.gicd_ipriorityr3 + } #[doc = "0x10 - Interrupt Priority 16 - 19 (Lower is first)"] - pub gicd_ipriorityr4: GICD_IPRIORITYR4, + #[inline(always)] + pub const fn gicd_ipriorityr4(&self) -> &GICD_IPRIORITYR4 { + &self.gicd_ipriorityr4 + } #[doc = "0x14 - Interrupt Priority 20 - 23 (Lower is first)"] - pub gicd_ipriorityr5: GICD_IPRIORITYR5, + #[inline(always)] + pub const fn gicd_ipriorityr5(&self) -> &GICD_IPRIORITYR5 { + &self.gicd_ipriorityr5 + } #[doc = "0x18 - Interrupt Priority 24 - 27 (Lower is first)"] - pub gicd_ipriorityr6: GICD_IPRIORITYR6, + #[inline(always)] + pub const fn gicd_ipriorityr6(&self) -> &GICD_IPRIORITYR6 { + &self.gicd_ipriorityr6 + } #[doc = "0x1c - Interrupt Priority 28 - 31 (Lower is first)"] - pub gicd_ipriorityr7: GICD_IPRIORITYR7, + #[inline(always)] + pub const fn gicd_ipriorityr7(&self) -> &GICD_IPRIORITYR7 { + &self.gicd_ipriorityr7 + } #[doc = "0x20 - Interrupt Priority 32 - 35 (Lower is first)"] - pub gicd_ipriorityr8: GICD_IPRIORITYR8, + #[inline(always)] + pub const fn gicd_ipriorityr8(&self) -> &GICD_IPRIORITYR8 { + &self.gicd_ipriorityr8 + } #[doc = "0x24 - Interrupt Priority 36 - 39 (Lower is first)"] - pub gicd_ipriorityr9: GICD_IPRIORITYR9, + #[inline(always)] + pub const fn gicd_ipriorityr9(&self) -> &GICD_IPRIORITYR9 { + &self.gicd_ipriorityr9 + } #[doc = "0x28 - Interrupt Priority 40 - 43 (Lower is first)"] - pub gicd_ipriorityr10: GICD_IPRIORITYR10, + #[inline(always)] + pub const fn gicd_ipriorityr10(&self) -> &GICD_IPRIORITYR10 { + &self.gicd_ipriorityr10 + } #[doc = "0x2c - Interrupt Priority 44 - 47 (Lower is first)"] - pub gicd_ipriorityr11: GICD_IPRIORITYR11, + #[inline(always)] + pub const fn gicd_ipriorityr11(&self) -> &GICD_IPRIORITYR11 { + &self.gicd_ipriorityr11 + } #[doc = "0x30 - Interrupt Priority 48 - 51 (Lower is first)"] - pub gicd_ipriorityr12: GICD_IPRIORITYR12, + #[inline(always)] + pub const fn gicd_ipriorityr12(&self) -> &GICD_IPRIORITYR12 { + &self.gicd_ipriorityr12 + } #[doc = "0x34 - Interrupt Priority 52 - 55 (Lower is first)"] - pub gicd_ipriorityr13: GICD_IPRIORITYR13, + #[inline(always)] + pub const fn gicd_ipriorityr13(&self) -> &GICD_IPRIORITYR13 { + &self.gicd_ipriorityr13 + } #[doc = "0x38 - Interrupt Priority 56 - 59 (Lower is first)"] - pub gicd_ipriorityr14: GICD_IPRIORITYR14, + #[inline(always)] + pub const fn gicd_ipriorityr14(&self) -> &GICD_IPRIORITYR14 { + &self.gicd_ipriorityr14 + } #[doc = "0x3c - Interrupt Priority 60 - 63 (Lower is first)"] - pub gicd_ipriorityr15: GICD_IPRIORITYR15, + #[inline(always)] + pub const fn gicd_ipriorityr15(&self) -> &GICD_IPRIORITYR15 { + &self.gicd_ipriorityr15 + } #[doc = "0x40 - Interrupt Priority 64 - 67 (Lower is first)"] - pub gicd_ipriorityr16: GICD_IPRIORITYR16, + #[inline(always)] + pub const fn gicd_ipriorityr16(&self) -> &GICD_IPRIORITYR16 { + &self.gicd_ipriorityr16 + } #[doc = "0x44 - Interrupt Priority 68 - 71 (Lower is first)"] - pub gicd_ipriorityr17: GICD_IPRIORITYR17, + #[inline(always)] + pub const fn gicd_ipriorityr17(&self) -> &GICD_IPRIORITYR17 { + &self.gicd_ipriorityr17 + } #[doc = "0x48 - Interrupt Priority 72 - 75 (Lower is first)"] - pub gicd_ipriorityr18: GICD_IPRIORITYR18, + #[inline(always)] + pub const fn gicd_ipriorityr18(&self) -> &GICD_IPRIORITYR18 { + &self.gicd_ipriorityr18 + } #[doc = "0x4c - Interrupt Priority 76 - 79 (Lower is first)"] - pub gicd_ipriorityr19: GICD_IPRIORITYR19, + #[inline(always)] + pub const fn gicd_ipriorityr19(&self) -> &GICD_IPRIORITYR19 { + &self.gicd_ipriorityr19 + } #[doc = "0x50 - Interrupt Priority 80 - 83 (Lower is first)"] - pub gicd_ipriorityr20: GICD_IPRIORITYR20, + #[inline(always)] + pub const fn gicd_ipriorityr20(&self) -> &GICD_IPRIORITYR20 { + &self.gicd_ipriorityr20 + } #[doc = "0x54 - Interrupt Priority 84 - 87 (Lower is first)"] - pub gicd_ipriorityr21: GICD_IPRIORITYR21, + #[inline(always)] + pub const fn gicd_ipriorityr21(&self) -> &GICD_IPRIORITYR21 { + &self.gicd_ipriorityr21 + } #[doc = "0x58 - Interrupt Priority 88 - 91 (Lower is first)"] - pub gicd_ipriorityr22: GICD_IPRIORITYR22, + #[inline(always)] + pub const fn gicd_ipriorityr22(&self) -> &GICD_IPRIORITYR22 { + &self.gicd_ipriorityr22 + } #[doc = "0x5c - Interrupt Priority 92 - 95 (Lower is first)"] - pub gicd_ipriorityr23: GICD_IPRIORITYR23, + #[inline(always)] + pub const fn gicd_ipriorityr23(&self) -> &GICD_IPRIORITYR23 { + &self.gicd_ipriorityr23 + } #[doc = "0x60 - Interrupt Priority 96 - 99 (Lower is first)"] - pub gicd_ipriorityr24: GICD_IPRIORITYR24, + #[inline(always)] + pub const fn gicd_ipriorityr24(&self) -> &GICD_IPRIORITYR24 { + &self.gicd_ipriorityr24 + } #[doc = "0x64 - Interrupt Priority 100 - 103 (Lower is first)"] - pub gicd_ipriorityr25: GICD_IPRIORITYR25, + #[inline(always)] + pub const fn gicd_ipriorityr25(&self) -> &GICD_IPRIORITYR25 { + &self.gicd_ipriorityr25 + } #[doc = "0x68 - Interrupt Priority 104 - 107 (Lower is first)"] - pub gicd_ipriorityr26: GICD_IPRIORITYR26, + #[inline(always)] + pub const fn gicd_ipriorityr26(&self) -> &GICD_IPRIORITYR26 { + &self.gicd_ipriorityr26 + } #[doc = "0x6c - Interrupt Priority 108 - 111 (Lower is first)"] - pub gicd_ipriorityr27: GICD_IPRIORITYR27, + #[inline(always)] + pub const fn gicd_ipriorityr27(&self) -> &GICD_IPRIORITYR27 { + &self.gicd_ipriorityr27 + } #[doc = "0x70 - Interrupt Priority 112 - 115 (Lower is first)"] - pub gicd_ipriorityr28: GICD_IPRIORITYR28, + #[inline(always)] + pub const fn gicd_ipriorityr28(&self) -> &GICD_IPRIORITYR28 { + &self.gicd_ipriorityr28 + } #[doc = "0x74 - Interrupt Priority 116 - 119 (Lower is first)"] - pub gicd_ipriorityr29: GICD_IPRIORITYR29, + #[inline(always)] + pub const fn gicd_ipriorityr29(&self) -> &GICD_IPRIORITYR29 { + &self.gicd_ipriorityr29 + } #[doc = "0x78 - Interrupt Priority 120 - 123 (Lower is first)"] - pub gicd_ipriorityr30: GICD_IPRIORITYR30, + #[inline(always)] + pub const fn gicd_ipriorityr30(&self) -> &GICD_IPRIORITYR30 { + &self.gicd_ipriorityr30 + } #[doc = "0x7c - Interrupt Priority 124 - 127 (Lower is first)"] - pub gicd_ipriorityr31: GICD_IPRIORITYR31, + #[inline(always)] + pub const fn gicd_ipriorityr31(&self) -> &GICD_IPRIORITYR31 { + &self.gicd_ipriorityr31 + } #[doc = "0x80 - Interrupt Priority 128 - 131 (Lower is first)"] - pub gicd_ipriorityr32: GICD_IPRIORITYR32, + #[inline(always)] + pub const fn gicd_ipriorityr32(&self) -> &GICD_IPRIORITYR32 { + &self.gicd_ipriorityr32 + } #[doc = "0x84 - Interrupt Priority 132 - 135 (Lower is first)"] - pub gicd_ipriorityr33: GICD_IPRIORITYR33, + #[inline(always)] + pub const fn gicd_ipriorityr33(&self) -> &GICD_IPRIORITYR33 { + &self.gicd_ipriorityr33 + } #[doc = "0x88 - Interrupt Priority 136 - 139 (Lower is first)"] - pub gicd_ipriorityr34: GICD_IPRIORITYR34, + #[inline(always)] + pub const fn gicd_ipriorityr34(&self) -> &GICD_IPRIORITYR34 { + &self.gicd_ipriorityr34 + } #[doc = "0x8c - Interrupt Priority 140 - 143 (Lower is first)"] - pub gicd_ipriorityr35: GICD_IPRIORITYR35, + #[inline(always)] + pub const fn gicd_ipriorityr35(&self) -> &GICD_IPRIORITYR35 { + &self.gicd_ipriorityr35 + } #[doc = "0x90 - Interrupt Priority 144 - 147 (Lower is first)"] - pub gicd_ipriorityr36: GICD_IPRIORITYR36, + #[inline(always)] + pub const fn gicd_ipriorityr36(&self) -> &GICD_IPRIORITYR36 { + &self.gicd_ipriorityr36 + } #[doc = "0x94 - Interrupt Priority 148 - 151 (Lower is first)"] - pub gicd_ipriorityr37: GICD_IPRIORITYR37, + #[inline(always)] + pub const fn gicd_ipriorityr37(&self) -> &GICD_IPRIORITYR37 { + &self.gicd_ipriorityr37 + } #[doc = "0x98 - Interrupt Priority 152 - 155 (Lower is first)"] - pub gicd_ipriorityr38: GICD_IPRIORITYR38, + #[inline(always)] + pub const fn gicd_ipriorityr38(&self) -> &GICD_IPRIORITYR38 { + &self.gicd_ipriorityr38 + } #[doc = "0x9c - Interrupt Priority 156 - 159 (Lower is first)"] - pub gicd_ipriorityr39: GICD_IPRIORITYR39, + #[inline(always)] + pub const fn gicd_ipriorityr39(&self) -> &GICD_IPRIORITYR39 { + &self.gicd_ipriorityr39 + } #[doc = "0xa0 - Interrupt Priority 160 - 163 (Lower is first)"] - pub gicd_ipriorityr40: GICD_IPRIORITYR40, + #[inline(always)] + pub const fn gicd_ipriorityr40(&self) -> &GICD_IPRIORITYR40 { + &self.gicd_ipriorityr40 + } #[doc = "0xa4 - Interrupt Priority 164 - 167 (Lower is first)"] - pub gicd_ipriorityr41: GICD_IPRIORITYR41, + #[inline(always)] + pub const fn gicd_ipriorityr41(&self) -> &GICD_IPRIORITYR41 { + &self.gicd_ipriorityr41 + } #[doc = "0xa8 - Interrupt Priority 168 - 171 (Lower is first)"] - pub gicd_ipriorityr42: GICD_IPRIORITYR42, + #[inline(always)] + pub const fn gicd_ipriorityr42(&self) -> &GICD_IPRIORITYR42 { + &self.gicd_ipriorityr42 + } #[doc = "0xac - Interrupt Priority 172 - 175 (Lower is first)"] - pub gicd_ipriorityr43: GICD_IPRIORITYR43, + #[inline(always)] + pub const fn gicd_ipriorityr43(&self) -> &GICD_IPRIORITYR43 { + &self.gicd_ipriorityr43 + } #[doc = "0xb0 - Interrupt Priority 176 - 179 (Lower is first)"] - pub gicd_ipriorityr44: GICD_IPRIORITYR44, + #[inline(always)] + pub const fn gicd_ipriorityr44(&self) -> &GICD_IPRIORITYR44 { + &self.gicd_ipriorityr44 + } #[doc = "0xb4 - Interrupt Priority 180 - 183 (Lower is first)"] - pub gicd_ipriorityr45: GICD_IPRIORITYR45, + #[inline(always)] + pub const fn gicd_ipriorityr45(&self) -> &GICD_IPRIORITYR45 { + &self.gicd_ipriorityr45 + } #[doc = "0xb8 - Interrupt Priority 184 - 187 (Lower is first)"] - pub gicd_ipriorityr46: GICD_IPRIORITYR46, + #[inline(always)] + pub const fn gicd_ipriorityr46(&self) -> &GICD_IPRIORITYR46 { + &self.gicd_ipriorityr46 + } #[doc = "0xbc - Interrupt Priority 188 - 191 (Lower is first)"] - pub gicd_ipriorityr47: GICD_IPRIORITYR47, + #[inline(always)] + pub const fn gicd_ipriorityr47(&self) -> &GICD_IPRIORITYR47 { + &self.gicd_ipriorityr47 + } #[doc = "0xc0 - Interrupt Priority 192 - 195 (Lower is first)"] - pub gicd_ipriorityr48: GICD_IPRIORITYR48, + #[inline(always)] + pub const fn gicd_ipriorityr48(&self) -> &GICD_IPRIORITYR48 { + &self.gicd_ipriorityr48 + } #[doc = "0xc4 - Interrupt Priority 196 - 199 (Lower is first)"] - pub gicd_ipriorityr49: GICD_IPRIORITYR49, + #[inline(always)] + pub const fn gicd_ipriorityr49(&self) -> &GICD_IPRIORITYR49 { + &self.gicd_ipriorityr49 + } #[doc = "0xc8 - Interrupt Priority 200 - 203 (Lower is first)"] - pub gicd_ipriorityr50: GICD_IPRIORITYR50, + #[inline(always)] + pub const fn gicd_ipriorityr50(&self) -> &GICD_IPRIORITYR50 { + &self.gicd_ipriorityr50 + } #[doc = "0xcc - Interrupt Priority 204 - 207 (Lower is first)"] - pub gicd_ipriorityr51: GICD_IPRIORITYR51, + #[inline(always)] + pub const fn gicd_ipriorityr51(&self) -> &GICD_IPRIORITYR51 { + &self.gicd_ipriorityr51 + } #[doc = "0xd0 - Interrupt Priority 208 - 211 (Lower is first)"] - pub gicd_ipriorityr52: GICD_IPRIORITYR52, + #[inline(always)] + pub const fn gicd_ipriorityr52(&self) -> &GICD_IPRIORITYR52 { + &self.gicd_ipriorityr52 + } #[doc = "0xd4 - Interrupt Priority 212 - 215 (Lower is first)"] - pub gicd_ipriorityr53: GICD_IPRIORITYR53, + #[inline(always)] + pub const fn gicd_ipriorityr53(&self) -> &GICD_IPRIORITYR53 { + &self.gicd_ipriorityr53 + } #[doc = "0xd8 - Interrupt Priority 216 - 219 (Lower is first)"] - pub gicd_ipriorityr54: GICD_IPRIORITYR54, + #[inline(always)] + pub const fn gicd_ipriorityr54(&self) -> &GICD_IPRIORITYR54 { + &self.gicd_ipriorityr54 + } #[doc = "0xdc - Interrupt Priority 220 - 223 (Lower is first)"] - pub gicd_ipriorityr55: GICD_IPRIORITYR55, + #[inline(always)] + pub const fn gicd_ipriorityr55(&self) -> &GICD_IPRIORITYR55 { + &self.gicd_ipriorityr55 + } } #[doc = "GICD_IPRIORITYR0 (rw) register accessor: Interrupt Priority 0 - 3 (Lower is first)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_ipriorityr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_ipriorityr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_ipriorityr0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr0.rs index ec512ce..b8f1970 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr0.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::FieldReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::FieldReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::FieldReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::FieldReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr1.rs index 3143efd..a780b73 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr1.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::FieldReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::FieldReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::FieldReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::FieldReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 4"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr10.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr10.rs index e97756a..e534f81 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr10.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr10.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::FieldReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT40_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::FieldReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT41_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::FieldReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT42_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::FieldReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT43_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 40"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr11.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr11.rs index 338aaa9..ba343c2 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr11.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr11.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::FieldReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT44_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::FieldReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT45_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::FieldReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT46_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::FieldReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT47_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 44"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr12.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr12.rs index 2d7d147..91ba46d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr12.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr12.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::FieldReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT48_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::FieldReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT49_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::FieldReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT50_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::FieldReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT51_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 48"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr13.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr13.rs index 485c477..d3b9316 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr13.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr13.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::FieldReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT52_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::FieldReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT53_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::FieldReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT54_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::FieldReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT55_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 52"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr14.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr14.rs index cdea11b..d7a8e78 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr14.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr14.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::FieldReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT56_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::FieldReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT57_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::FieldReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT58_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::FieldReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT59_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 56"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr15.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr15.rs index 9aea127..a1005f0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr15.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr15.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::FieldReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT60_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::FieldReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT61_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::FieldReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT62_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::FieldReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT63_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 60"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr16.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr16.rs index 8a604ee..2738681 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr16.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr16.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::FieldReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::FieldReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MAILBOX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::FieldReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DOORBELL0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::FieldReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DOORBELL1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - ARMC Timer"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bits 8:15 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 8) } #[doc = "Bits 16:23 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 16) } #[doc = "Bits 24:31 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr17.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr17.rs index 2bd895e..2a810db 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr17.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr17.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::FieldReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::FieldReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::FieldReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::FieldReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - VPU0 halted"] #[inline(always)] @@ -64,33 +64,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 0) } #[doc = "Bits 8:15 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 8) } #[doc = "Bits 16:23 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 16) } #[doc = "Bits 24:31 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr18.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr18.rs index 8448e10..ed8a4c7 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr18.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr18.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::FieldReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::FieldReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::FieldReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::FieldReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Software interrupt 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 0) } #[doc = "Bits 8:15 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 8) } #[doc = "Bits 16:23 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 16) } #[doc = "Bits 24:31 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr19.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr19.rs index 37f71e2..d6cc58f 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr19.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr19.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::FieldReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::FieldReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::FieldReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::FieldReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Software interrupt 4"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 0) } #[doc = "Bits 8:15 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 8) } #[doc = "Bits 16:23 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 16) } #[doc = "Bits 24:31 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr2.rs index f4f3f46..693c98c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr2.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::FieldReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::FieldReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT9_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::FieldReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT10_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::FieldReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT11_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 8"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr20.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr20.rs index b13c5a6..540579d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr20.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr20.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::FieldReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT80_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::FieldReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT81_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::FieldReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT82_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::FieldReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT83_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 80"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr21.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr21.rs index f7c67a7..9d543c0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr21.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr21.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::FieldReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT84_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::FieldReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT85_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::FieldReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT86_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::FieldReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT87_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 84"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr22.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr22.rs index ac598d4..1c82c9e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr22.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr22.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::FieldReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT88_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::FieldReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT89_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::FieldReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT90_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::FieldReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT91_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 88"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr23.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr23.rs index ff696d9..0b768ea 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr23.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr23.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::FieldReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT92_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::FieldReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT93_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::FieldReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT94_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::FieldReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT95_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 92"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr24.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr24.rs index b1be94e..af6d958 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr24.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr24.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::FieldReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::FieldReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::FieldReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::FieldReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Timer 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bits 8:15 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 8) } #[doc = "Bits 16:23 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 16) } #[doc = "Bits 24:31 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr25.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr25.rs index 8ab82f2..e6e9e88 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr25.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr25.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::FieldReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type H264_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::FieldReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type H264_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::FieldReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type H264_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::FieldReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type JPEG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - H264 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 0) } #[doc = "Bits 8:15 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 8) } #[doc = "Bits 16:23 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 16) } #[doc = "Bits 24:31 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr26.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr26.rs index 856c96d..9baf9e3 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr26.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr26.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::FieldReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ISP_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::FieldReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type USB_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::FieldReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type V3D_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::FieldReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TRANSPOSER_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - ISP"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 0) } #[doc = "Bits 8:15 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 8) } #[doc = "Bits 16:23 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 16) } #[doc = "Bits 24:31 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr27.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr27.rs index 1e0fe8c..b63a45d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr27.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr27.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Multicore Sync 0"] #[inline(always)] @@ -64,33 +64,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 0) } #[doc = "Bits 8:15 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 8) } #[doc = "Bits 16:23 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 16) } #[doc = "Bits 24:31 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr28.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr28.rs index 5a91734..54b2f6d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr28.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr28.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::FieldReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::FieldReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::FieldReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::FieldReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 0) } #[doc = "Bits 8:15 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 8) } #[doc = "Bits 16:23 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 16) } #[doc = "Bits 24:31 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr29.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr29.rs index b951ca4..54c928a 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr29.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr29.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::FieldReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::FieldReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::FieldReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::FieldReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_7_8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA 4"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 0) } #[doc = "Bits 8:15 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 8) } #[doc = "Bits 16:23 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 16) } #[doc = "Bits 24:31 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr3.rs index 3bd4feb..968782b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr3.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::FieldReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT12_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::FieldReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT13_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::FieldReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT14_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::FieldReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT15_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 12"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr30.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr30.rs index 302ff75..53a0598 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr30.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr30.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::FieldReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_9_10_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::FieldReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_11_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::FieldReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_12_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::FieldReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_13_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - OR of DMA 9 and 10"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 0) } #[doc = "Bits 8:15 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 8) } #[doc = "Bits 16:23 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 16) } #[doc = "Bits 24:31 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr31.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr31.rs index df4d600..e4c8d73 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr31.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr31.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::FieldReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_14_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::FieldReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type AUX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::FieldReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ARM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::FieldReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_15_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA 14"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 0) } #[doc = "Bits 8:15 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 8) } #[doc = "Bits 16:23 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 16) } #[doc = "Bits 24:31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr32.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr32.rs index 1e1fd99..954b4f6 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr32.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr32.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::FieldReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HDMI_CEC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::FieldReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HVS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::FieldReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RPIVID_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::FieldReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - HDMI CEC"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bits 8:15 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 8) } #[doc = "Bits 16:23 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 16) } #[doc = "Bits 24:31 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr33.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr33.rs index 6b3a086..e68abf6 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr33.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr33.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::FieldReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DSI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::FieldReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CAMERA_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::FieldReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CAMERA_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DSI 0"] #[inline(always)] @@ -55,33 +55,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 8) } #[doc = "Bits 16:23 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 16) } #[doc = "Bits 24:31 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr34.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr34.rs index 615851a..dc23208 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr34.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr34.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::FieldReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HDMI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::FieldReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HDMI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::FieldReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - HDMI 0"] #[inline(always)] @@ -58,33 +58,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 0) } #[doc = "Bits 8:15 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 16) } #[doc = "Bits 24:31 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr35.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr35.rs index c4e5531..b6235e4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr35.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr35.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::FieldReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DSI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::FieldReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CPR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DSI 1"] #[inline(always)] @@ -58,33 +58,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 0) } #[doc = "Bits 8:15 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 8) } #[doc = "Bits 16:23 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 16) } #[doc = "Bits 24:31 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr36.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr36.rs index d0d5b86..f247ab1 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr36.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr36.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::FieldReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SMI_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::FieldReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::FieldReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::FieldReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - SMI"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 0) } #[doc = "Bits 8:15 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 8) } #[doc = "Bits 16:23 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 16) } #[doc = "Bits 24:31 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr37.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr37.rs index 146e8cc..a742798 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr37.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr37.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::FieldReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::FieldReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type I2C_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::FieldReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SPI_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::FieldReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PCM_I2S_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - GPIO 3"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 0) } #[doc = "Bits 8:15 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 8) } #[doc = "Bits 16:23 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 16) } #[doc = "Bits 24:31 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr38.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr38.rs index 9086dfd..ee8ecde 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr38.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr38.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::FieldReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDHOST_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::FieldReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type UART_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::FieldReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ETH_PCIE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::FieldReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VEC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - SDHOST"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 0) } #[doc = "Bits 8:15 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 8) } #[doc = "Bits 16:23 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 16) } #[doc = "Bits 24:31 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr39.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr39.rs index 3d8944a..087b9fe 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr39.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr39.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::FieldReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CPG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::FieldReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RNG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::FieldReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type EMMC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::FieldReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - CPG"] #[inline(always)] @@ -55,33 +55,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 0) } #[doc = "Bits 8:15 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 8) } #[doc = "Bits 16:23 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 16) } #[doc = "Bits 24:31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr4.rs index 070cbdf..84f72b7 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr4.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::FieldReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT16_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::FieldReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT17_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::FieldReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT18_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::FieldReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT19_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 16"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr40.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr40.rs index a2a63d0..83c360b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr40.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr40.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::FieldReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT160_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::FieldReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT161_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::FieldReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT162_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::FieldReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT163_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 160"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr41.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr41.rs index 2878594..2fa16d0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr41.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr41.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::FieldReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT164_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::FieldReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT165_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::FieldReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT166_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::FieldReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT167_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 164"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr42.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr42.rs index 5f84ad2..baf508e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr42.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr42.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::FieldReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT168_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::FieldReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT169_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::FieldReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT170_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::FieldReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT171_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 168"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr43.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr43.rs index 4622c47..44eb302 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr43.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr43.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::FieldReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT172_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::FieldReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT173_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::FieldReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT174_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::FieldReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT175_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 172"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr44.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr44.rs index b6e59cb..3be23b1 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr44.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr44.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::FieldReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT176_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::FieldReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT177_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::FieldReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT178_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::FieldReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT179_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 176"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr45.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr45.rs index 4adde4d..99ab4a4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr45.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr45.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::FieldReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT180_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::FieldReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT181_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::FieldReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT182_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::FieldReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT183_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 180"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr46.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr46.rs index c74e6ee..77063c8 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr46.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr46.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::FieldReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT184_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::FieldReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT185_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::FieldReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT186_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::FieldReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT187_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 184"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr47.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr47.rs index 565a527..0f03b13 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr47.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr47.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::FieldReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT188_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::FieldReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT189_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::FieldReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT190_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::FieldReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT191_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 188"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr48.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr48.rs index 74284dd..7b81c43 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr48.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr48.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::FieldReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT192_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::FieldReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT193_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::FieldReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT194_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::FieldReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT195_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 192"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr49.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr49.rs index 614c76c..c5e7b42 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr49.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr49.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::FieldReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT196_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::FieldReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT197_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::FieldReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT198_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::FieldReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT199_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 196"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr5.rs index 4fb8985..26156e2 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr5.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::FieldReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT20_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::FieldReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT21_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::FieldReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT22_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::FieldReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT23_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 20"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr50.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr50.rs index 3895383..9656503 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr50.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr50.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::FieldReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT200_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::FieldReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT201_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::FieldReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT202_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::FieldReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT203_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 200"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr51.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr51.rs index 5c83f40..165f0ce 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr51.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr51.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::FieldReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT204_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::FieldReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT205_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::FieldReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT206_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::FieldReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT207_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 204"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr52.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr52.rs index 1b6583f..d793422 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr52.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr52.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::FieldReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT208_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::FieldReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT209_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::FieldReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT210_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::FieldReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT211_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 208"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr53.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr53.rs index fdfc206..a6381dc 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr53.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr53.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::FieldReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT212_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::FieldReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT213_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::FieldReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT214_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::FieldReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT215_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 212"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr54.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr54.rs index d49a711..d3256bf 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr54.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr54.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::FieldReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT216_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::FieldReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT217_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::FieldReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT218_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::FieldReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT219_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 216"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr55.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr55.rs index ebf3ead..dfcdca3 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr55.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr55.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::FieldReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT220_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::FieldReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT221_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::FieldReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT222_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::FieldReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT223_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 220"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr6.rs index d12573a..1e83c11 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr6.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::FieldReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT24_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::FieldReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT25_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::FieldReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT26_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::FieldReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT27_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 24"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr7.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr7.rs index 62a0986..864daf6 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr7.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr7.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::FieldReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT28_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::FieldReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT29_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::FieldReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT30_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::FieldReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT31_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 28"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr8.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr8.rs index 737dc73..952f7eb 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr8.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr8.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::FieldReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT32_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::FieldReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT33_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::FieldReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT34_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::FieldReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT35_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 32"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr9.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr9.rs index d3f2418..ac69fc4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr9.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ipriorityr/gicd_ipriorityr9.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::FieldReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT36_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::FieldReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT37_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::FieldReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT38_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::FieldReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT39_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 36"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver.rs index 4b679ea..884722c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ISACTIVER { + gicd_isactiver0: GICD_ISACTIVER0, + gicd_isactiver1: GICD_ISACTIVER1, + gicd_isactiver2: GICD_ISACTIVER2, + gicd_isactiver3: GICD_ISACTIVER3, + gicd_isactiver4: GICD_ISACTIVER4, + gicd_isactiver5: GICD_ISACTIVER5, + gicd_isactiver6: GICD_ISACTIVER6, +} +impl GICD_ISACTIVER { #[doc = "0x00 - Interrupt Set-Active"] - pub gicd_isactiver0: GICD_ISACTIVER0, + #[inline(always)] + pub const fn gicd_isactiver0(&self) -> &GICD_ISACTIVER0 { + &self.gicd_isactiver0 + } #[doc = "0x04 - Interrupt Set-Active"] - pub gicd_isactiver1: GICD_ISACTIVER1, + #[inline(always)] + pub const fn gicd_isactiver1(&self) -> &GICD_ISACTIVER1 { + &self.gicd_isactiver1 + } #[doc = "0x08 - Interrupt Set-Active"] - pub gicd_isactiver2: GICD_ISACTIVER2, + #[inline(always)] + pub const fn gicd_isactiver2(&self) -> &GICD_ISACTIVER2 { + &self.gicd_isactiver2 + } #[doc = "0x0c - Interrupt Set-Active"] - pub gicd_isactiver3: GICD_ISACTIVER3, + #[inline(always)] + pub const fn gicd_isactiver3(&self) -> &GICD_ISACTIVER3 { + &self.gicd_isactiver3 + } #[doc = "0x10 - Interrupt Set-Active"] - pub gicd_isactiver4: GICD_ISACTIVER4, + #[inline(always)] + pub const fn gicd_isactiver4(&self) -> &GICD_ISACTIVER4 { + &self.gicd_isactiver4 + } #[doc = "0x14 - Interrupt Set-Active"] - pub gicd_isactiver5: GICD_ISACTIVER5, + #[inline(always)] + pub const fn gicd_isactiver5(&self) -> &GICD_ISACTIVER5 { + &self.gicd_isactiver5 + } #[doc = "0x18 - Interrupt Set-Active"] - pub gicd_isactiver6: GICD_ISACTIVER6, + #[inline(always)] + pub const fn gicd_isactiver6(&self) -> &GICD_ISACTIVER6 { + &self.gicd_isactiver6 + } } #[doc = "GICD_ISACTIVER0 (rw) register accessor: Interrupt Set-Active\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_isactiver0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_isactiver0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_isactiver0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver0.rs index f32fe51..82b6ad9 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver1.rs index 55f7697..82ce118 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver2.rs index 85f88b2..4bf027a 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver3.rs index 0cb087a..23061ab 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver4.rs index 961a4d1..7d37f37 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver5.rs index 0dbf3ab..f4198c7 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver6.rs index 721b7d5..a1af667 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isactiver/gicd_isactiver6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler.rs index 5216faf..ecd39c1 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ISENABLER { + gicd_isenabler0: GICD_ISENABLER0, + gicd_isenabler1: GICD_ISENABLER1, + gicd_isenabler2: GICD_ISENABLER2, + gicd_isenabler3: GICD_ISENABLER3, + gicd_isenabler4: GICD_ISENABLER4, + gicd_isenabler5: GICD_ISENABLER5, + gicd_isenabler6: GICD_ISENABLER6, +} +impl GICD_ISENABLER { #[doc = "0x00 - Interrupt Set-Enable"] - pub gicd_isenabler0: GICD_ISENABLER0, + #[inline(always)] + pub const fn gicd_isenabler0(&self) -> &GICD_ISENABLER0 { + &self.gicd_isenabler0 + } #[doc = "0x04 - Interrupt Set-Enable"] - pub gicd_isenabler1: GICD_ISENABLER1, + #[inline(always)] + pub const fn gicd_isenabler1(&self) -> &GICD_ISENABLER1 { + &self.gicd_isenabler1 + } #[doc = "0x08 - Interrupt Set-Enable"] - pub gicd_isenabler2: GICD_ISENABLER2, + #[inline(always)] + pub const fn gicd_isenabler2(&self) -> &GICD_ISENABLER2 { + &self.gicd_isenabler2 + } #[doc = "0x0c - Interrupt Set-Enable"] - pub gicd_isenabler3: GICD_ISENABLER3, + #[inline(always)] + pub const fn gicd_isenabler3(&self) -> &GICD_ISENABLER3 { + &self.gicd_isenabler3 + } #[doc = "0x10 - Interrupt Set-Enable"] - pub gicd_isenabler4: GICD_ISENABLER4, + #[inline(always)] + pub const fn gicd_isenabler4(&self) -> &GICD_ISENABLER4 { + &self.gicd_isenabler4 + } #[doc = "0x14 - Interrupt Set-Enable"] - pub gicd_isenabler5: GICD_ISENABLER5, + #[inline(always)] + pub const fn gicd_isenabler5(&self) -> &GICD_ISENABLER5 { + &self.gicd_isenabler5 + } #[doc = "0x18 - Interrupt Set-Enable"] - pub gicd_isenabler6: GICD_ISENABLER6, + #[inline(always)] + pub const fn gicd_isenabler6(&self) -> &GICD_ISENABLER6 { + &self.gicd_isenabler6 + } } #[doc = "GICD_ISENABLER0 (rw) register accessor: Interrupt Set-Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_isenabler0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_isenabler0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_isenabler0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler0.rs index 9b50ed8..cdf6e2b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler1.rs index fca12dc..80f59e4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler2.rs index 913251f..5bdf454 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler3.rs index 9adc818..0795ef9 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler4.rs index d943476..801ebdf 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler5.rs index f149b4a..44b7225 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler6.rs index 6076662..13ddfd5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_isenabler/gicd_isenabler6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr.rs index 33eb696..f57f83f 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ISPENDR { + gicd_ispendr0: GICD_ISPENDR0, + gicd_ispendr1: GICD_ISPENDR1, + gicd_ispendr2: GICD_ISPENDR2, + gicd_ispendr3: GICD_ISPENDR3, + gicd_ispendr4: GICD_ISPENDR4, + gicd_ispendr5: GICD_ISPENDR5, + gicd_ispendr6: GICD_ISPENDR6, +} +impl GICD_ISPENDR { #[doc = "0x00 - Interrupt Set-Pending"] - pub gicd_ispendr0: GICD_ISPENDR0, + #[inline(always)] + pub const fn gicd_ispendr0(&self) -> &GICD_ISPENDR0 { + &self.gicd_ispendr0 + } #[doc = "0x04 - Interrupt Set-Pending"] - pub gicd_ispendr1: GICD_ISPENDR1, + #[inline(always)] + pub const fn gicd_ispendr1(&self) -> &GICD_ISPENDR1 { + &self.gicd_ispendr1 + } #[doc = "0x08 - Interrupt Set-Pending"] - pub gicd_ispendr2: GICD_ISPENDR2, + #[inline(always)] + pub const fn gicd_ispendr2(&self) -> &GICD_ISPENDR2 { + &self.gicd_ispendr2 + } #[doc = "0x0c - Interrupt Set-Pending"] - pub gicd_ispendr3: GICD_ISPENDR3, + #[inline(always)] + pub const fn gicd_ispendr3(&self) -> &GICD_ISPENDR3 { + &self.gicd_ispendr3 + } #[doc = "0x10 - Interrupt Set-Pending"] - pub gicd_ispendr4: GICD_ISPENDR4, + #[inline(always)] + pub const fn gicd_ispendr4(&self) -> &GICD_ISPENDR4 { + &self.gicd_ispendr4 + } #[doc = "0x14 - Interrupt Set-Pending"] - pub gicd_ispendr5: GICD_ISPENDR5, + #[inline(always)] + pub const fn gicd_ispendr5(&self) -> &GICD_ISPENDR5 { + &self.gicd_ispendr5 + } #[doc = "0x18 - Interrupt Set-Pending"] - pub gicd_ispendr6: GICD_ISPENDR6, + #[inline(always)] + pub const fn gicd_ispendr6(&self) -> &GICD_ISPENDR6 { + &self.gicd_ispendr6 + } } #[doc = "GICD_ISPENDR0 (rw) register accessor: Interrupt Set-Pending\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_ispendr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_ispendr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_ispendr0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr0.rs index bd095e3..44b4c45 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr1.rs index 1bf7599..0c646cf 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr2.rs index 8a316b5..a4de137 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::BitReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT80_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::BitReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT81_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::BitReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT82_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::BitReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT83_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::BitReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT84_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::BitReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT85_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::BitReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT86_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::BitReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT87_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::BitReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT88_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::BitReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT89_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::BitReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT90_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::BitReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT91_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::BitReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT92_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::BitReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT93_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::BitReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT94_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::BitReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT95_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr3.rs index f739a4a..89dc8b7 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr4.rs index 5c84121..bea7d71 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr5.rs index d8ca879..257d24c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::BitReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT160_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::BitReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT161_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::BitReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT162_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::BitReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT163_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::BitReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT164_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::BitReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT165_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::BitReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT166_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::BitReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT167_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::BitReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT168_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::BitReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT169_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::BitReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT170_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::BitReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT171_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::BitReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT172_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::BitReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT173_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::BitReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT174_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::BitReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT175_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::BitReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT176_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::BitReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT177_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::BitReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT178_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::BitReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT179_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::BitReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT180_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::BitReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT181_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::BitReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT182_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::BitReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT183_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::BitReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT184_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::BitReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT185_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::BitReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT186_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::BitReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT187_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::BitReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT188_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::BitReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT189_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::BitReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT190_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::BitReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT191_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr6.rs index 56da067..1e4ec45 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ispendr/gicd_ispendr6.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::BitReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT192_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::BitReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT193_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::BitReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT194_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::BitReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT195_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::BitReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT196_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::BitReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT197_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::BitReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT198_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::BitReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT199_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::BitReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT200_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::BitReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT201_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::BitReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT202_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::BitReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT203_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::BitReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT204_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::BitReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT205_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::BitReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT206_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::BitReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT207_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::BitReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT208_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::BitReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT209_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::BitReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT210_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::BitReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT211_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::BitReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT212_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::BitReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT213_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::BitReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT214_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::BitReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT215_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::BitReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT216_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::BitReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT217_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::BitReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT218_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::BitReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT219_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::BitReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT220_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::BitReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT221_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::BitReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT222_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::BitReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT223_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr.rs index f4550d4..31f527e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr.rs @@ -2,118 +2,344 @@ #[repr(C)] #[derive(Debug)] pub struct GICD_ITARGETSR { + gicd_itargetsr0: GICD_ITARGETSR0, + gicd_itargetsr1: GICD_ITARGETSR1, + gicd_itargetsr2: GICD_ITARGETSR2, + gicd_itargetsr3: GICD_ITARGETSR3, + gicd_itargetsr4: GICD_ITARGETSR4, + gicd_itargetsr5: GICD_ITARGETSR5, + gicd_itargetsr6: GICD_ITARGETSR6, + gicd_itargetsr7: GICD_ITARGETSR7, + gicd_itargetsr8: GICD_ITARGETSR8, + gicd_itargetsr9: GICD_ITARGETSR9, + gicd_itargetsr10: GICD_ITARGETSR10, + gicd_itargetsr11: GICD_ITARGETSR11, + gicd_itargetsr12: GICD_ITARGETSR12, + gicd_itargetsr13: GICD_ITARGETSR13, + gicd_itargetsr14: GICD_ITARGETSR14, + gicd_itargetsr15: GICD_ITARGETSR15, + gicd_itargetsr16: GICD_ITARGETSR16, + gicd_itargetsr17: GICD_ITARGETSR17, + gicd_itargetsr18: GICD_ITARGETSR18, + gicd_itargetsr19: GICD_ITARGETSR19, + gicd_itargetsr20: GICD_ITARGETSR20, + gicd_itargetsr21: GICD_ITARGETSR21, + gicd_itargetsr22: GICD_ITARGETSR22, + gicd_itargetsr23: GICD_ITARGETSR23, + gicd_itargetsr24: GICD_ITARGETSR24, + gicd_itargetsr25: GICD_ITARGETSR25, + gicd_itargetsr26: GICD_ITARGETSR26, + gicd_itargetsr27: GICD_ITARGETSR27, + gicd_itargetsr28: GICD_ITARGETSR28, + gicd_itargetsr29: GICD_ITARGETSR29, + gicd_itargetsr30: GICD_ITARGETSR30, + gicd_itargetsr31: GICD_ITARGETSR31, + gicd_itargetsr32: GICD_ITARGETSR32, + gicd_itargetsr33: GICD_ITARGETSR33, + gicd_itargetsr34: GICD_ITARGETSR34, + gicd_itargetsr35: GICD_ITARGETSR35, + gicd_itargetsr36: GICD_ITARGETSR36, + gicd_itargetsr37: GICD_ITARGETSR37, + gicd_itargetsr38: GICD_ITARGETSR38, + gicd_itargetsr39: GICD_ITARGETSR39, + gicd_itargetsr40: GICD_ITARGETSR40, + gicd_itargetsr41: GICD_ITARGETSR41, + gicd_itargetsr42: GICD_ITARGETSR42, + gicd_itargetsr43: GICD_ITARGETSR43, + gicd_itargetsr44: GICD_ITARGETSR44, + gicd_itargetsr45: GICD_ITARGETSR45, + gicd_itargetsr46: GICD_ITARGETSR46, + gicd_itargetsr47: GICD_ITARGETSR47, + gicd_itargetsr48: GICD_ITARGETSR48, + gicd_itargetsr49: GICD_ITARGETSR49, + gicd_itargetsr50: GICD_ITARGETSR50, + gicd_itargetsr51: GICD_ITARGETSR51, + gicd_itargetsr52: GICD_ITARGETSR52, + gicd_itargetsr53: GICD_ITARGETSR53, + gicd_itargetsr54: GICD_ITARGETSR54, + gicd_itargetsr55: GICD_ITARGETSR55, +} +impl GICD_ITARGETSR { #[doc = "0x00 - Interrupt Processor Target 0 - 3"] - pub gicd_itargetsr0: GICD_ITARGETSR0, + #[inline(always)] + pub const fn gicd_itargetsr0(&self) -> &GICD_ITARGETSR0 { + &self.gicd_itargetsr0 + } #[doc = "0x04 - Interrupt Processor Target 4 - 7"] - pub gicd_itargetsr1: GICD_ITARGETSR1, + #[inline(always)] + pub const fn gicd_itargetsr1(&self) -> &GICD_ITARGETSR1 { + &self.gicd_itargetsr1 + } #[doc = "0x08 - Interrupt Processor Target 8 - 11"] - pub gicd_itargetsr2: GICD_ITARGETSR2, + #[inline(always)] + pub const fn gicd_itargetsr2(&self) -> &GICD_ITARGETSR2 { + &self.gicd_itargetsr2 + } #[doc = "0x0c - Interrupt Processor Target 12 - 15"] - pub gicd_itargetsr3: GICD_ITARGETSR3, + #[inline(always)] + pub const fn gicd_itargetsr3(&self) -> &GICD_ITARGETSR3 { + &self.gicd_itargetsr3 + } #[doc = "0x10 - Interrupt Processor Target 16 - 19"] - pub gicd_itargetsr4: GICD_ITARGETSR4, + #[inline(always)] + pub const fn gicd_itargetsr4(&self) -> &GICD_ITARGETSR4 { + &self.gicd_itargetsr4 + } #[doc = "0x14 - Interrupt Processor Target 20 - 23"] - pub gicd_itargetsr5: GICD_ITARGETSR5, + #[inline(always)] + pub const fn gicd_itargetsr5(&self) -> &GICD_ITARGETSR5 { + &self.gicd_itargetsr5 + } #[doc = "0x18 - Interrupt Processor Target 24 - 27"] - pub gicd_itargetsr6: GICD_ITARGETSR6, + #[inline(always)] + pub const fn gicd_itargetsr6(&self) -> &GICD_ITARGETSR6 { + &self.gicd_itargetsr6 + } #[doc = "0x1c - Interrupt Processor Target 28 - 31"] - pub gicd_itargetsr7: GICD_ITARGETSR7, + #[inline(always)] + pub const fn gicd_itargetsr7(&self) -> &GICD_ITARGETSR7 { + &self.gicd_itargetsr7 + } #[doc = "0x20 - Interrupt Processor Target 32 - 35"] - pub gicd_itargetsr8: GICD_ITARGETSR8, + #[inline(always)] + pub const fn gicd_itargetsr8(&self) -> &GICD_ITARGETSR8 { + &self.gicd_itargetsr8 + } #[doc = "0x24 - Interrupt Processor Target 36 - 39"] - pub gicd_itargetsr9: GICD_ITARGETSR9, + #[inline(always)] + pub const fn gicd_itargetsr9(&self) -> &GICD_ITARGETSR9 { + &self.gicd_itargetsr9 + } #[doc = "0x28 - Interrupt Processor Target 40 - 43"] - pub gicd_itargetsr10: GICD_ITARGETSR10, + #[inline(always)] + pub const fn gicd_itargetsr10(&self) -> &GICD_ITARGETSR10 { + &self.gicd_itargetsr10 + } #[doc = "0x2c - Interrupt Processor Target 44 - 47"] - pub gicd_itargetsr11: GICD_ITARGETSR11, + #[inline(always)] + pub const fn gicd_itargetsr11(&self) -> &GICD_ITARGETSR11 { + &self.gicd_itargetsr11 + } #[doc = "0x30 - Interrupt Processor Target 48 - 51"] - pub gicd_itargetsr12: GICD_ITARGETSR12, + #[inline(always)] + pub const fn gicd_itargetsr12(&self) -> &GICD_ITARGETSR12 { + &self.gicd_itargetsr12 + } #[doc = "0x34 - Interrupt Processor Target 52 - 55"] - pub gicd_itargetsr13: GICD_ITARGETSR13, + #[inline(always)] + pub const fn gicd_itargetsr13(&self) -> &GICD_ITARGETSR13 { + &self.gicd_itargetsr13 + } #[doc = "0x38 - Interrupt Processor Target 56 - 59"] - pub gicd_itargetsr14: GICD_ITARGETSR14, + #[inline(always)] + pub const fn gicd_itargetsr14(&self) -> &GICD_ITARGETSR14 { + &self.gicd_itargetsr14 + } #[doc = "0x3c - Interrupt Processor Target 60 - 63"] - pub gicd_itargetsr15: GICD_ITARGETSR15, + #[inline(always)] + pub const fn gicd_itargetsr15(&self) -> &GICD_ITARGETSR15 { + &self.gicd_itargetsr15 + } #[doc = "0x40 - Interrupt Processor Target 64 - 67"] - pub gicd_itargetsr16: GICD_ITARGETSR16, + #[inline(always)] + pub const fn gicd_itargetsr16(&self) -> &GICD_ITARGETSR16 { + &self.gicd_itargetsr16 + } #[doc = "0x44 - Interrupt Processor Target 68 - 71"] - pub gicd_itargetsr17: GICD_ITARGETSR17, + #[inline(always)] + pub const fn gicd_itargetsr17(&self) -> &GICD_ITARGETSR17 { + &self.gicd_itargetsr17 + } #[doc = "0x48 - Interrupt Processor Target 72 - 75"] - pub gicd_itargetsr18: GICD_ITARGETSR18, + #[inline(always)] + pub const fn gicd_itargetsr18(&self) -> &GICD_ITARGETSR18 { + &self.gicd_itargetsr18 + } #[doc = "0x4c - Interrupt Processor Target 76 - 79"] - pub gicd_itargetsr19: GICD_ITARGETSR19, + #[inline(always)] + pub const fn gicd_itargetsr19(&self) -> &GICD_ITARGETSR19 { + &self.gicd_itargetsr19 + } #[doc = "0x50 - Interrupt Processor Target 80 - 83"] - pub gicd_itargetsr20: GICD_ITARGETSR20, + #[inline(always)] + pub const fn gicd_itargetsr20(&self) -> &GICD_ITARGETSR20 { + &self.gicd_itargetsr20 + } #[doc = "0x54 - Interrupt Processor Target 84 - 87"] - pub gicd_itargetsr21: GICD_ITARGETSR21, + #[inline(always)] + pub const fn gicd_itargetsr21(&self) -> &GICD_ITARGETSR21 { + &self.gicd_itargetsr21 + } #[doc = "0x58 - Interrupt Processor Target 88 - 91"] - pub gicd_itargetsr22: GICD_ITARGETSR22, + #[inline(always)] + pub const fn gicd_itargetsr22(&self) -> &GICD_ITARGETSR22 { + &self.gicd_itargetsr22 + } #[doc = "0x5c - Interrupt Processor Target 92 - 95"] - pub gicd_itargetsr23: GICD_ITARGETSR23, + #[inline(always)] + pub const fn gicd_itargetsr23(&self) -> &GICD_ITARGETSR23 { + &self.gicd_itargetsr23 + } #[doc = "0x60 - Interrupt Processor Target 96 - 99"] - pub gicd_itargetsr24: GICD_ITARGETSR24, + #[inline(always)] + pub const fn gicd_itargetsr24(&self) -> &GICD_ITARGETSR24 { + &self.gicd_itargetsr24 + } #[doc = "0x64 - Interrupt Processor Target 100 - 103"] - pub gicd_itargetsr25: GICD_ITARGETSR25, + #[inline(always)] + pub const fn gicd_itargetsr25(&self) -> &GICD_ITARGETSR25 { + &self.gicd_itargetsr25 + } #[doc = "0x68 - Interrupt Processor Target 104 - 107"] - pub gicd_itargetsr26: GICD_ITARGETSR26, + #[inline(always)] + pub const fn gicd_itargetsr26(&self) -> &GICD_ITARGETSR26 { + &self.gicd_itargetsr26 + } #[doc = "0x6c - Interrupt Processor Target 108 - 111"] - pub gicd_itargetsr27: GICD_ITARGETSR27, + #[inline(always)] + pub const fn gicd_itargetsr27(&self) -> &GICD_ITARGETSR27 { + &self.gicd_itargetsr27 + } #[doc = "0x70 - Interrupt Processor Target 112 - 115"] - pub gicd_itargetsr28: GICD_ITARGETSR28, + #[inline(always)] + pub const fn gicd_itargetsr28(&self) -> &GICD_ITARGETSR28 { + &self.gicd_itargetsr28 + } #[doc = "0x74 - Interrupt Processor Target 116 - 119"] - pub gicd_itargetsr29: GICD_ITARGETSR29, + #[inline(always)] + pub const fn gicd_itargetsr29(&self) -> &GICD_ITARGETSR29 { + &self.gicd_itargetsr29 + } #[doc = "0x78 - Interrupt Processor Target 120 - 123"] - pub gicd_itargetsr30: GICD_ITARGETSR30, + #[inline(always)] + pub const fn gicd_itargetsr30(&self) -> &GICD_ITARGETSR30 { + &self.gicd_itargetsr30 + } #[doc = "0x7c - Interrupt Processor Target 124 - 127"] - pub gicd_itargetsr31: GICD_ITARGETSR31, + #[inline(always)] + pub const fn gicd_itargetsr31(&self) -> &GICD_ITARGETSR31 { + &self.gicd_itargetsr31 + } #[doc = "0x80 - Interrupt Processor Target 128 - 131"] - pub gicd_itargetsr32: GICD_ITARGETSR32, + #[inline(always)] + pub const fn gicd_itargetsr32(&self) -> &GICD_ITARGETSR32 { + &self.gicd_itargetsr32 + } #[doc = "0x84 - Interrupt Processor Target 132 - 135"] - pub gicd_itargetsr33: GICD_ITARGETSR33, + #[inline(always)] + pub const fn gicd_itargetsr33(&self) -> &GICD_ITARGETSR33 { + &self.gicd_itargetsr33 + } #[doc = "0x88 - Interrupt Processor Target 136 - 139"] - pub gicd_itargetsr34: GICD_ITARGETSR34, + #[inline(always)] + pub const fn gicd_itargetsr34(&self) -> &GICD_ITARGETSR34 { + &self.gicd_itargetsr34 + } #[doc = "0x8c - Interrupt Processor Target 140 - 143"] - pub gicd_itargetsr35: GICD_ITARGETSR35, + #[inline(always)] + pub const fn gicd_itargetsr35(&self) -> &GICD_ITARGETSR35 { + &self.gicd_itargetsr35 + } #[doc = "0x90 - Interrupt Processor Target 144 - 147"] - pub gicd_itargetsr36: GICD_ITARGETSR36, + #[inline(always)] + pub const fn gicd_itargetsr36(&self) -> &GICD_ITARGETSR36 { + &self.gicd_itargetsr36 + } #[doc = "0x94 - Interrupt Processor Target 148 - 151"] - pub gicd_itargetsr37: GICD_ITARGETSR37, + #[inline(always)] + pub const fn gicd_itargetsr37(&self) -> &GICD_ITARGETSR37 { + &self.gicd_itargetsr37 + } #[doc = "0x98 - Interrupt Processor Target 152 - 155"] - pub gicd_itargetsr38: GICD_ITARGETSR38, + #[inline(always)] + pub const fn gicd_itargetsr38(&self) -> &GICD_ITARGETSR38 { + &self.gicd_itargetsr38 + } #[doc = "0x9c - Interrupt Processor Target 156 - 159"] - pub gicd_itargetsr39: GICD_ITARGETSR39, + #[inline(always)] + pub const fn gicd_itargetsr39(&self) -> &GICD_ITARGETSR39 { + &self.gicd_itargetsr39 + } #[doc = "0xa0 - Interrupt Processor Target 160 - 163"] - pub gicd_itargetsr40: GICD_ITARGETSR40, + #[inline(always)] + pub const fn gicd_itargetsr40(&self) -> &GICD_ITARGETSR40 { + &self.gicd_itargetsr40 + } #[doc = "0xa4 - Interrupt Processor Target 164 - 167"] - pub gicd_itargetsr41: GICD_ITARGETSR41, + #[inline(always)] + pub const fn gicd_itargetsr41(&self) -> &GICD_ITARGETSR41 { + &self.gicd_itargetsr41 + } #[doc = "0xa8 - Interrupt Processor Target 168 - 171"] - pub gicd_itargetsr42: GICD_ITARGETSR42, + #[inline(always)] + pub const fn gicd_itargetsr42(&self) -> &GICD_ITARGETSR42 { + &self.gicd_itargetsr42 + } #[doc = "0xac - Interrupt Processor Target 172 - 175"] - pub gicd_itargetsr43: GICD_ITARGETSR43, + #[inline(always)] + pub const fn gicd_itargetsr43(&self) -> &GICD_ITARGETSR43 { + &self.gicd_itargetsr43 + } #[doc = "0xb0 - Interrupt Processor Target 176 - 179"] - pub gicd_itargetsr44: GICD_ITARGETSR44, + #[inline(always)] + pub const fn gicd_itargetsr44(&self) -> &GICD_ITARGETSR44 { + &self.gicd_itargetsr44 + } #[doc = "0xb4 - Interrupt Processor Target 180 - 183"] - pub gicd_itargetsr45: GICD_ITARGETSR45, + #[inline(always)] + pub const fn gicd_itargetsr45(&self) -> &GICD_ITARGETSR45 { + &self.gicd_itargetsr45 + } #[doc = "0xb8 - Interrupt Processor Target 184 - 187"] - pub gicd_itargetsr46: GICD_ITARGETSR46, + #[inline(always)] + pub const fn gicd_itargetsr46(&self) -> &GICD_ITARGETSR46 { + &self.gicd_itargetsr46 + } #[doc = "0xbc - Interrupt Processor Target 188 - 191"] - pub gicd_itargetsr47: GICD_ITARGETSR47, + #[inline(always)] + pub const fn gicd_itargetsr47(&self) -> &GICD_ITARGETSR47 { + &self.gicd_itargetsr47 + } #[doc = "0xc0 - Interrupt Processor Target 192 - 195"] - pub gicd_itargetsr48: GICD_ITARGETSR48, + #[inline(always)] + pub const fn gicd_itargetsr48(&self) -> &GICD_ITARGETSR48 { + &self.gicd_itargetsr48 + } #[doc = "0xc4 - Interrupt Processor Target 196 - 199"] - pub gicd_itargetsr49: GICD_ITARGETSR49, + #[inline(always)] + pub const fn gicd_itargetsr49(&self) -> &GICD_ITARGETSR49 { + &self.gicd_itargetsr49 + } #[doc = "0xc8 - Interrupt Processor Target 200 - 203"] - pub gicd_itargetsr50: GICD_ITARGETSR50, + #[inline(always)] + pub const fn gicd_itargetsr50(&self) -> &GICD_ITARGETSR50 { + &self.gicd_itargetsr50 + } #[doc = "0xcc - Interrupt Processor Target 204 - 207"] - pub gicd_itargetsr51: GICD_ITARGETSR51, + #[inline(always)] + pub const fn gicd_itargetsr51(&self) -> &GICD_ITARGETSR51 { + &self.gicd_itargetsr51 + } #[doc = "0xd0 - Interrupt Processor Target 208 - 211"] - pub gicd_itargetsr52: GICD_ITARGETSR52, + #[inline(always)] + pub const fn gicd_itargetsr52(&self) -> &GICD_ITARGETSR52 { + &self.gicd_itargetsr52 + } #[doc = "0xd4 - Interrupt Processor Target 212 - 215"] - pub gicd_itargetsr53: GICD_ITARGETSR53, + #[inline(always)] + pub const fn gicd_itargetsr53(&self) -> &GICD_ITARGETSR53 { + &self.gicd_itargetsr53 + } #[doc = "0xd8 - Interrupt Processor Target 216 - 219"] - pub gicd_itargetsr54: GICD_ITARGETSR54, + #[inline(always)] + pub const fn gicd_itargetsr54(&self) -> &GICD_ITARGETSR54 { + &self.gicd_itargetsr54 + } #[doc = "0xdc - Interrupt Processor Target 220 - 223"] - pub gicd_itargetsr55: GICD_ITARGETSR55, + #[inline(always)] + pub const fn gicd_itargetsr55(&self) -> &GICD_ITARGETSR55 { + &self.gicd_itargetsr55 + } } #[doc = "GICD_ITARGETSR0 (rw) register accessor: Interrupt Processor Target 0 - 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_itargetsr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gicd_itargetsr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gicd_itargetsr0`] module"] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr0.rs index 3397ff6..aea3b76 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr0.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::FieldReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::FieldReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::FieldReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::FieldReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr1.rs index c59f832..6371d9e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr1.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::FieldReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::FieldReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::FieldReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::FieldReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 4"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr10.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr10.rs index f24a72b..342f952 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr10.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr10.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::FieldReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT40_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::FieldReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT41_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::FieldReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT42_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::FieldReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT43_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 40"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr11.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr11.rs index c9888e1..44b982d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr11.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr11.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::FieldReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT44_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::FieldReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT45_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::FieldReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT46_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::FieldReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT47_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 44"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr12.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr12.rs index fe7df13..36b7962 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr12.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr12.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::FieldReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT48_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::FieldReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT49_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::FieldReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT50_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::FieldReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT51_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 48"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr13.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr13.rs index 69db0f9..9fd0456 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr13.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr13.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::FieldReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT52_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::FieldReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT53_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::FieldReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT54_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::FieldReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT55_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 52"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr14.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr14.rs index dadd760..74ff27e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr14.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr14.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::FieldReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT56_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::FieldReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT57_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::FieldReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT58_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::FieldReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT59_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 56"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr15.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr15.rs index 040245f..15941df 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr15.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr15.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::FieldReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT60_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::FieldReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT61_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::FieldReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT62_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::FieldReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT63_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 60"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr16.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr16.rs index b269778..9ed10ab 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr16.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr16.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::FieldReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::FieldReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MAILBOX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::FieldReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DOORBELL0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::FieldReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DOORBELL1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - ARMC Timer"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bits 8:15 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 8) } #[doc = "Bits 16:23 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 16) } #[doc = "Bits 24:31 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr17.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr17.rs index 46adba9..026a7f5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr17.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr17.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::FieldReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::FieldReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::FieldReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::FieldReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - VPU0 halted"] #[inline(always)] @@ -64,33 +64,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 0) } #[doc = "Bits 8:15 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 8) } #[doc = "Bits 16:23 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 16) } #[doc = "Bits 24:31 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr18.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr18.rs index b6aa1cd..b6d4ffe 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr18.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr18.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::FieldReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::FieldReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::FieldReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::FieldReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Software interrupt 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 0) } #[doc = "Bits 8:15 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 8) } #[doc = "Bits 16:23 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 16) } #[doc = "Bits 24:31 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr19.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr19.rs index ba3a1fb..17ffdf4 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr19.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr19.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::FieldReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::FieldReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::FieldReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::FieldReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SWI7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Software interrupt 4"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 0) } #[doc = "Bits 8:15 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 8) } #[doc = "Bits 16:23 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 16) } #[doc = "Bits 24:31 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr2.rs index e250597..d268168 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr2.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::FieldReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::FieldReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT9_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::FieldReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT10_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::FieldReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT11_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 8"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr20.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr20.rs index a4c1242..c5625bb 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr20.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr20.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT80` reader - Interrupt 80"] pub type INT80_R = crate::FieldReader; #[doc = "Field `INT80` writer - Interrupt 80"] -pub type INT80_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT80_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT81` reader - Interrupt 81"] pub type INT81_R = crate::FieldReader; #[doc = "Field `INT81` writer - Interrupt 81"] -pub type INT81_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT81_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT82` reader - Interrupt 82"] pub type INT82_R = crate::FieldReader; #[doc = "Field `INT82` writer - Interrupt 82"] -pub type INT82_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT82_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT83` reader - Interrupt 83"] pub type INT83_R = crate::FieldReader; #[doc = "Field `INT83` writer - Interrupt 83"] -pub type INT83_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT83_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 80"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 80"] #[inline(always)] #[must_use] - pub fn int80(&mut self) -> INT80_W { - INT80_W::new(self) + pub fn int80(&mut self) -> INT80_W { + INT80_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 81"] #[inline(always)] #[must_use] - pub fn int81(&mut self) -> INT81_W { - INT81_W::new(self) + pub fn int81(&mut self) -> INT81_W { + INT81_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 82"] #[inline(always)] #[must_use] - pub fn int82(&mut self) -> INT82_W { - INT82_W::new(self) + pub fn int82(&mut self) -> INT82_W { + INT82_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 83"] #[inline(always)] #[must_use] - pub fn int83(&mut self) -> INT83_W { - INT83_W::new(self) + pub fn int83(&mut self) -> INT83_W { + INT83_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr21.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr21.rs index 9cd76bb..26c3c71 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr21.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr21.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT84` reader - Interrupt 84"] pub type INT84_R = crate::FieldReader; #[doc = "Field `INT84` writer - Interrupt 84"] -pub type INT84_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT84_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT85` reader - Interrupt 85"] pub type INT85_R = crate::FieldReader; #[doc = "Field `INT85` writer - Interrupt 85"] -pub type INT85_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT85_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT86` reader - Interrupt 86"] pub type INT86_R = crate::FieldReader; #[doc = "Field `INT86` writer - Interrupt 86"] -pub type INT86_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT86_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT87` reader - Interrupt 87"] pub type INT87_R = crate::FieldReader; #[doc = "Field `INT87` writer - Interrupt 87"] -pub type INT87_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT87_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 84"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 84"] #[inline(always)] #[must_use] - pub fn int84(&mut self) -> INT84_W { - INT84_W::new(self) + pub fn int84(&mut self) -> INT84_W { + INT84_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 85"] #[inline(always)] #[must_use] - pub fn int85(&mut self) -> INT85_W { - INT85_W::new(self) + pub fn int85(&mut self) -> INT85_W { + INT85_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 86"] #[inline(always)] #[must_use] - pub fn int86(&mut self) -> INT86_W { - INT86_W::new(self) + pub fn int86(&mut self) -> INT86_W { + INT86_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 87"] #[inline(always)] #[must_use] - pub fn int87(&mut self) -> INT87_W { - INT87_W::new(self) + pub fn int87(&mut self) -> INT87_W { + INT87_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr22.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr22.rs index 682a1a5..abcda49 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr22.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr22.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT88` reader - Interrupt 88"] pub type INT88_R = crate::FieldReader; #[doc = "Field `INT88` writer - Interrupt 88"] -pub type INT88_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT88_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT89` reader - Interrupt 89"] pub type INT89_R = crate::FieldReader; #[doc = "Field `INT89` writer - Interrupt 89"] -pub type INT89_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT89_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT90` reader - Interrupt 90"] pub type INT90_R = crate::FieldReader; #[doc = "Field `INT90` writer - Interrupt 90"] -pub type INT90_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT90_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT91` reader - Interrupt 91"] pub type INT91_R = crate::FieldReader; #[doc = "Field `INT91` writer - Interrupt 91"] -pub type INT91_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT91_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 88"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 88"] #[inline(always)] #[must_use] - pub fn int88(&mut self) -> INT88_W { - INT88_W::new(self) + pub fn int88(&mut self) -> INT88_W { + INT88_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 89"] #[inline(always)] #[must_use] - pub fn int89(&mut self) -> INT89_W { - INT89_W::new(self) + pub fn int89(&mut self) -> INT89_W { + INT89_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 90"] #[inline(always)] #[must_use] - pub fn int90(&mut self) -> INT90_W { - INT90_W::new(self) + pub fn int90(&mut self) -> INT90_W { + INT90_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 91"] #[inline(always)] #[must_use] - pub fn int91(&mut self) -> INT91_W { - INT91_W::new(self) + pub fn int91(&mut self) -> INT91_W { + INT91_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr23.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr23.rs index a7e602a..fc4d0b1 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr23.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr23.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT92` reader - Interrupt 92"] pub type INT92_R = crate::FieldReader; #[doc = "Field `INT92` writer - Interrupt 92"] -pub type INT92_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT92_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT93` reader - Interrupt 93"] pub type INT93_R = crate::FieldReader; #[doc = "Field `INT93` writer - Interrupt 93"] -pub type INT93_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT93_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT94` reader - Interrupt 94"] pub type INT94_R = crate::FieldReader; #[doc = "Field `INT94` writer - Interrupt 94"] -pub type INT94_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT94_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT95` reader - Interrupt 95"] pub type INT95_R = crate::FieldReader; #[doc = "Field `INT95` writer - Interrupt 95"] -pub type INT95_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT95_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 92"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 92"] #[inline(always)] #[must_use] - pub fn int92(&mut self) -> INT92_W { - INT92_W::new(self) + pub fn int92(&mut self) -> INT92_W { + INT92_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 93"] #[inline(always)] #[must_use] - pub fn int93(&mut self) -> INT93_W { - INT93_W::new(self) + pub fn int93(&mut self) -> INT93_W { + INT93_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 94"] #[inline(always)] #[must_use] - pub fn int94(&mut self) -> INT94_W { - INT94_W::new(self) + pub fn int94(&mut self) -> INT94_W { + INT94_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 95"] #[inline(always)] #[must_use] - pub fn int95(&mut self) -> INT95_W { - INT95_W::new(self) + pub fn int95(&mut self) -> INT95_W { + INT95_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr24.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr24.rs index 69df3b8..7f6ea36 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr24.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr24.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::FieldReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::FieldReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::FieldReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::FieldReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TIMER_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Timer 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bits 8:15 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 8) } #[doc = "Bits 16:23 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 16) } #[doc = "Bits 24:31 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr25.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr25.rs index 79f7321..4bcef09 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr25.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr25.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::FieldReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type H264_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::FieldReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type H264_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::FieldReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type H264_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::FieldReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type JPEG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - H264 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 0) } #[doc = "Bits 8:15 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 8) } #[doc = "Bits 16:23 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 16) } #[doc = "Bits 24:31 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr26.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr26.rs index 5e618ff..3438311 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr26.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr26.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::FieldReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ISP_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::FieldReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type USB_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::FieldReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type V3D_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::FieldReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TRANSPOSER_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - ISP"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 0) } #[doc = "Bits 8:15 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 8) } #[doc = "Bits 16:23 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 16) } #[doc = "Bits 24:31 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr27.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr27.rs index e026659..2b6b71a 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr27.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr27.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::FieldReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Multicore Sync 0"] #[inline(always)] @@ -64,33 +64,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 0) } #[doc = "Bits 8:15 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 8) } #[doc = "Bits 16:23 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 16) } #[doc = "Bits 24:31 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr28.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr28.rs index a6fab06..0ca7640 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr28.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr28.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::FieldReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::FieldReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::FieldReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::FieldReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 0) } #[doc = "Bits 8:15 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 8) } #[doc = "Bits 16:23 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 16) } #[doc = "Bits 24:31 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr29.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr29.rs index 77e09cb..bb51b59 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr29.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr29.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::FieldReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::FieldReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::FieldReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::FieldReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_7_8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA 4"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 0) } #[doc = "Bits 8:15 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 8) } #[doc = "Bits 16:23 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 16) } #[doc = "Bits 24:31 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr3.rs index 0622d98..ccc9900 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr3.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::FieldReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT12_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::FieldReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT13_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::FieldReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT14_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::FieldReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT15_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 12"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr30.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr30.rs index fdae147..8198d25 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr30.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr30.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::FieldReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_9_10_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::FieldReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_11_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::FieldReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_12_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::FieldReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_13_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - OR of DMA 9 and 10"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 0) } #[doc = "Bits 8:15 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 8) } #[doc = "Bits 16:23 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 16) } #[doc = "Bits 24:31 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr31.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr31.rs index 784e82a..ab22655 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr31.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr31.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::FieldReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_14_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::FieldReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type AUX_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::FieldReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ARM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::FieldReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DMA_15_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA 14"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 0) } #[doc = "Bits 8:15 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 8) } #[doc = "Bits 16:23 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 16) } #[doc = "Bits 24:31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr32.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr32.rs index 9c9ca2a..dc22cd7 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr32.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr32.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::FieldReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HDMI_CEC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::FieldReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HVS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::FieldReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RPIVID_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::FieldReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - HDMI CEC"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bits 8:15 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 8) } #[doc = "Bits 16:23 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 16) } #[doc = "Bits 24:31 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr33.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr33.rs index 655c559..2278467 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr33.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr33.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::FieldReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DSI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::FieldReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CAMERA_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::FieldReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CAMERA_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DSI 0"] #[inline(always)] @@ -55,33 +55,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 8) } #[doc = "Bits 16:23 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 16) } #[doc = "Bits 24:31 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr34.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr34.rs index d52fe55..4e08b3b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr34.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr34.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::FieldReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HDMI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::FieldReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type HDMI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::FieldReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - HDMI 0"] #[inline(always)] @@ -58,33 +58,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 0) } #[doc = "Bits 8:15 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 16) } #[doc = "Bits 24:31 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr35.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr35.rs index 7f3f731..50e8689 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr35.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr35.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::FieldReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DSI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::FieldReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::FieldReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CPR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DSI 1"] #[inline(always)] @@ -58,33 +58,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 0) } #[doc = "Bits 8:15 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 8) } #[doc = "Bits 16:23 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 16) } #[doc = "Bits 24:31 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr36.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr36.rs index f77fdb6..8b4d5ad 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr36.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr36.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::FieldReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SMI_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::FieldReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::FieldReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::FieldReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - SMI"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 0) } #[doc = "Bits 8:15 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 8) } #[doc = "Bits 16:23 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 16) } #[doc = "Bits 24:31 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr37.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr37.rs index 513c923..2f9f1f6 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr37.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr37.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::FieldReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type GPIO_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::FieldReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type I2C_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::FieldReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SPI_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::FieldReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PCM_I2S_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - GPIO 3"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 0) } #[doc = "Bits 8:15 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 8) } #[doc = "Bits 16:23 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 16) } #[doc = "Bits 24:31 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr38.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr38.rs index 7e9fc43..f2d49df 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr38.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr38.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::FieldReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDHOST_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::FieldReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type UART_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::FieldReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ETH_PCIE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::FieldReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VEC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - SDHOST"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 0) } #[doc = "Bits 8:15 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 8) } #[doc = "Bits 16:23 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 16) } #[doc = "Bits 24:31 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr39.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr39.rs index 7ea4832..d5377b3 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr39.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr39.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::FieldReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CPG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::FieldReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RNG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::FieldReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type EMMC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::FieldReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - CPG"] #[inline(always)] @@ -55,33 +55,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 0) } #[doc = "Bits 8:15 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 8) } #[doc = "Bits 16:23 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 16) } #[doc = "Bits 24:31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr4.rs index b852a7f..1f1d879 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr4.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::FieldReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT16_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::FieldReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT17_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::FieldReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT18_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::FieldReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT19_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 16"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr40.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr40.rs index 1390830..e6a34c0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr40.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr40.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT160` reader - Interrupt 160"] pub type INT160_R = crate::FieldReader; #[doc = "Field `INT160` writer - Interrupt 160"] -pub type INT160_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT160_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT161` reader - Interrupt 161"] pub type INT161_R = crate::FieldReader; #[doc = "Field `INT161` writer - Interrupt 161"] -pub type INT161_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT161_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT162` reader - Interrupt 162"] pub type INT162_R = crate::FieldReader; #[doc = "Field `INT162` writer - Interrupt 162"] -pub type INT162_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT162_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT163` reader - Interrupt 163"] pub type INT163_R = crate::FieldReader; #[doc = "Field `INT163` writer - Interrupt 163"] -pub type INT163_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT163_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 160"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 160"] #[inline(always)] #[must_use] - pub fn int160(&mut self) -> INT160_W { - INT160_W::new(self) + pub fn int160(&mut self) -> INT160_W { + INT160_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 161"] #[inline(always)] #[must_use] - pub fn int161(&mut self) -> INT161_W { - INT161_W::new(self) + pub fn int161(&mut self) -> INT161_W { + INT161_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 162"] #[inline(always)] #[must_use] - pub fn int162(&mut self) -> INT162_W { - INT162_W::new(self) + pub fn int162(&mut self) -> INT162_W { + INT162_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 163"] #[inline(always)] #[must_use] - pub fn int163(&mut self) -> INT163_W { - INT163_W::new(self) + pub fn int163(&mut self) -> INT163_W { + INT163_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr41.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr41.rs index 45af0b2..922eade 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr41.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr41.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT164` reader - Interrupt 164"] pub type INT164_R = crate::FieldReader; #[doc = "Field `INT164` writer - Interrupt 164"] -pub type INT164_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT164_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT165` reader - Interrupt 165"] pub type INT165_R = crate::FieldReader; #[doc = "Field `INT165` writer - Interrupt 165"] -pub type INT165_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT165_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT166` reader - Interrupt 166"] pub type INT166_R = crate::FieldReader; #[doc = "Field `INT166` writer - Interrupt 166"] -pub type INT166_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT166_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT167` reader - Interrupt 167"] pub type INT167_R = crate::FieldReader; #[doc = "Field `INT167` writer - Interrupt 167"] -pub type INT167_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT167_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 164"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 164"] #[inline(always)] #[must_use] - pub fn int164(&mut self) -> INT164_W { - INT164_W::new(self) + pub fn int164(&mut self) -> INT164_W { + INT164_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 165"] #[inline(always)] #[must_use] - pub fn int165(&mut self) -> INT165_W { - INT165_W::new(self) + pub fn int165(&mut self) -> INT165_W { + INT165_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 166"] #[inline(always)] #[must_use] - pub fn int166(&mut self) -> INT166_W { - INT166_W::new(self) + pub fn int166(&mut self) -> INT166_W { + INT166_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 167"] #[inline(always)] #[must_use] - pub fn int167(&mut self) -> INT167_W { - INT167_W::new(self) + pub fn int167(&mut self) -> INT167_W { + INT167_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr42.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr42.rs index 9dc320c..c2c9952 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr42.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr42.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT168` reader - Interrupt 168"] pub type INT168_R = crate::FieldReader; #[doc = "Field `INT168` writer - Interrupt 168"] -pub type INT168_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT168_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT169` reader - Interrupt 169"] pub type INT169_R = crate::FieldReader; #[doc = "Field `INT169` writer - Interrupt 169"] -pub type INT169_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT169_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT170` reader - Interrupt 170"] pub type INT170_R = crate::FieldReader; #[doc = "Field `INT170` writer - Interrupt 170"] -pub type INT170_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT170_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT171` reader - Interrupt 171"] pub type INT171_R = crate::FieldReader; #[doc = "Field `INT171` writer - Interrupt 171"] -pub type INT171_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT171_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 168"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 168"] #[inline(always)] #[must_use] - pub fn int168(&mut self) -> INT168_W { - INT168_W::new(self) + pub fn int168(&mut self) -> INT168_W { + INT168_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 169"] #[inline(always)] #[must_use] - pub fn int169(&mut self) -> INT169_W { - INT169_W::new(self) + pub fn int169(&mut self) -> INT169_W { + INT169_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 170"] #[inline(always)] #[must_use] - pub fn int170(&mut self) -> INT170_W { - INT170_W::new(self) + pub fn int170(&mut self) -> INT170_W { + INT170_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 171"] #[inline(always)] #[must_use] - pub fn int171(&mut self) -> INT171_W { - INT171_W::new(self) + pub fn int171(&mut self) -> INT171_W { + INT171_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr43.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr43.rs index 7699124..2faefaf 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr43.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr43.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT172` reader - Interrupt 172"] pub type INT172_R = crate::FieldReader; #[doc = "Field `INT172` writer - Interrupt 172"] -pub type INT172_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT172_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT173` reader - Interrupt 173"] pub type INT173_R = crate::FieldReader; #[doc = "Field `INT173` writer - Interrupt 173"] -pub type INT173_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT173_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT174` reader - Interrupt 174"] pub type INT174_R = crate::FieldReader; #[doc = "Field `INT174` writer - Interrupt 174"] -pub type INT174_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT174_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT175` reader - Interrupt 175"] pub type INT175_R = crate::FieldReader; #[doc = "Field `INT175` writer - Interrupt 175"] -pub type INT175_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT175_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 172"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 172"] #[inline(always)] #[must_use] - pub fn int172(&mut self) -> INT172_W { - INT172_W::new(self) + pub fn int172(&mut self) -> INT172_W { + INT172_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 173"] #[inline(always)] #[must_use] - pub fn int173(&mut self) -> INT173_W { - INT173_W::new(self) + pub fn int173(&mut self) -> INT173_W { + INT173_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 174"] #[inline(always)] #[must_use] - pub fn int174(&mut self) -> INT174_W { - INT174_W::new(self) + pub fn int174(&mut self) -> INT174_W { + INT174_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 175"] #[inline(always)] #[must_use] - pub fn int175(&mut self) -> INT175_W { - INT175_W::new(self) + pub fn int175(&mut self) -> INT175_W { + INT175_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr44.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr44.rs index 72f5c65..6efbad8 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr44.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr44.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT176` reader - Interrupt 176"] pub type INT176_R = crate::FieldReader; #[doc = "Field `INT176` writer - Interrupt 176"] -pub type INT176_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT176_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT177` reader - Interrupt 177"] pub type INT177_R = crate::FieldReader; #[doc = "Field `INT177` writer - Interrupt 177"] -pub type INT177_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT177_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT178` reader - Interrupt 178"] pub type INT178_R = crate::FieldReader; #[doc = "Field `INT178` writer - Interrupt 178"] -pub type INT178_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT178_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT179` reader - Interrupt 179"] pub type INT179_R = crate::FieldReader; #[doc = "Field `INT179` writer - Interrupt 179"] -pub type INT179_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT179_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 176"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 176"] #[inline(always)] #[must_use] - pub fn int176(&mut self) -> INT176_W { - INT176_W::new(self) + pub fn int176(&mut self) -> INT176_W { + INT176_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 177"] #[inline(always)] #[must_use] - pub fn int177(&mut self) -> INT177_W { - INT177_W::new(self) + pub fn int177(&mut self) -> INT177_W { + INT177_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 178"] #[inline(always)] #[must_use] - pub fn int178(&mut self) -> INT178_W { - INT178_W::new(self) + pub fn int178(&mut self) -> INT178_W { + INT178_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 179"] #[inline(always)] #[must_use] - pub fn int179(&mut self) -> INT179_W { - INT179_W::new(self) + pub fn int179(&mut self) -> INT179_W { + INT179_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr45.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr45.rs index 4e77f6a..97a6aa5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr45.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr45.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT180` reader - Interrupt 180"] pub type INT180_R = crate::FieldReader; #[doc = "Field `INT180` writer - Interrupt 180"] -pub type INT180_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT180_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT181` reader - Interrupt 181"] pub type INT181_R = crate::FieldReader; #[doc = "Field `INT181` writer - Interrupt 181"] -pub type INT181_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT181_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT182` reader - Interrupt 182"] pub type INT182_R = crate::FieldReader; #[doc = "Field `INT182` writer - Interrupt 182"] -pub type INT182_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT182_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT183` reader - Interrupt 183"] pub type INT183_R = crate::FieldReader; #[doc = "Field `INT183` writer - Interrupt 183"] -pub type INT183_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT183_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 180"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 180"] #[inline(always)] #[must_use] - pub fn int180(&mut self) -> INT180_W { - INT180_W::new(self) + pub fn int180(&mut self) -> INT180_W { + INT180_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 181"] #[inline(always)] #[must_use] - pub fn int181(&mut self) -> INT181_W { - INT181_W::new(self) + pub fn int181(&mut self) -> INT181_W { + INT181_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 182"] #[inline(always)] #[must_use] - pub fn int182(&mut self) -> INT182_W { - INT182_W::new(self) + pub fn int182(&mut self) -> INT182_W { + INT182_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 183"] #[inline(always)] #[must_use] - pub fn int183(&mut self) -> INT183_W { - INT183_W::new(self) + pub fn int183(&mut self) -> INT183_W { + INT183_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr46.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr46.rs index e698c81..08d90da 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr46.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr46.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT184` reader - Interrupt 184"] pub type INT184_R = crate::FieldReader; #[doc = "Field `INT184` writer - Interrupt 184"] -pub type INT184_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT184_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT185` reader - Interrupt 185"] pub type INT185_R = crate::FieldReader; #[doc = "Field `INT185` writer - Interrupt 185"] -pub type INT185_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT185_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT186` reader - Interrupt 186"] pub type INT186_R = crate::FieldReader; #[doc = "Field `INT186` writer - Interrupt 186"] -pub type INT186_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT186_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT187` reader - Interrupt 187"] pub type INT187_R = crate::FieldReader; #[doc = "Field `INT187` writer - Interrupt 187"] -pub type INT187_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT187_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 184"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 184"] #[inline(always)] #[must_use] - pub fn int184(&mut self) -> INT184_W { - INT184_W::new(self) + pub fn int184(&mut self) -> INT184_W { + INT184_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 185"] #[inline(always)] #[must_use] - pub fn int185(&mut self) -> INT185_W { - INT185_W::new(self) + pub fn int185(&mut self) -> INT185_W { + INT185_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 186"] #[inline(always)] #[must_use] - pub fn int186(&mut self) -> INT186_W { - INT186_W::new(self) + pub fn int186(&mut self) -> INT186_W { + INT186_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 187"] #[inline(always)] #[must_use] - pub fn int187(&mut self) -> INT187_W { - INT187_W::new(self) + pub fn int187(&mut self) -> INT187_W { + INT187_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr47.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr47.rs index 635bbe5..11f7298 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr47.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr47.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT188` reader - Interrupt 188"] pub type INT188_R = crate::FieldReader; #[doc = "Field `INT188` writer - Interrupt 188"] -pub type INT188_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT188_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT189` reader - Interrupt 189"] pub type INT189_R = crate::FieldReader; #[doc = "Field `INT189` writer - Interrupt 189"] -pub type INT189_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT189_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT190` reader - Interrupt 190"] pub type INT190_R = crate::FieldReader; #[doc = "Field `INT190` writer - Interrupt 190"] -pub type INT190_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT190_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT191` reader - Interrupt 191"] pub type INT191_R = crate::FieldReader; #[doc = "Field `INT191` writer - Interrupt 191"] -pub type INT191_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT191_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 188"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 188"] #[inline(always)] #[must_use] - pub fn int188(&mut self) -> INT188_W { - INT188_W::new(self) + pub fn int188(&mut self) -> INT188_W { + INT188_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 189"] #[inline(always)] #[must_use] - pub fn int189(&mut self) -> INT189_W { - INT189_W::new(self) + pub fn int189(&mut self) -> INT189_W { + INT189_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 190"] #[inline(always)] #[must_use] - pub fn int190(&mut self) -> INT190_W { - INT190_W::new(self) + pub fn int190(&mut self) -> INT190_W { + INT190_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 191"] #[inline(always)] #[must_use] - pub fn int191(&mut self) -> INT191_W { - INT191_W::new(self) + pub fn int191(&mut self) -> INT191_W { + INT191_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr48.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr48.rs index 81d71d9..e7963d9 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr48.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr48.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT192` reader - Interrupt 192"] pub type INT192_R = crate::FieldReader; #[doc = "Field `INT192` writer - Interrupt 192"] -pub type INT192_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT192_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT193` reader - Interrupt 193"] pub type INT193_R = crate::FieldReader; #[doc = "Field `INT193` writer - Interrupt 193"] -pub type INT193_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT193_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT194` reader - Interrupt 194"] pub type INT194_R = crate::FieldReader; #[doc = "Field `INT194` writer - Interrupt 194"] -pub type INT194_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT194_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT195` reader - Interrupt 195"] pub type INT195_R = crate::FieldReader; #[doc = "Field `INT195` writer - Interrupt 195"] -pub type INT195_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT195_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 192"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 192"] #[inline(always)] #[must_use] - pub fn int192(&mut self) -> INT192_W { - INT192_W::new(self) + pub fn int192(&mut self) -> INT192_W { + INT192_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 193"] #[inline(always)] #[must_use] - pub fn int193(&mut self) -> INT193_W { - INT193_W::new(self) + pub fn int193(&mut self) -> INT193_W { + INT193_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 194"] #[inline(always)] #[must_use] - pub fn int194(&mut self) -> INT194_W { - INT194_W::new(self) + pub fn int194(&mut self) -> INT194_W { + INT194_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 195"] #[inline(always)] #[must_use] - pub fn int195(&mut self) -> INT195_W { - INT195_W::new(self) + pub fn int195(&mut self) -> INT195_W { + INT195_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr49.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr49.rs index 1aaf425..2768876 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr49.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr49.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT196` reader - Interrupt 196"] pub type INT196_R = crate::FieldReader; #[doc = "Field `INT196` writer - Interrupt 196"] -pub type INT196_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT196_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT197` reader - Interrupt 197"] pub type INT197_R = crate::FieldReader; #[doc = "Field `INT197` writer - Interrupt 197"] -pub type INT197_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT197_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT198` reader - Interrupt 198"] pub type INT198_R = crate::FieldReader; #[doc = "Field `INT198` writer - Interrupt 198"] -pub type INT198_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT198_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT199` reader - Interrupt 199"] pub type INT199_R = crate::FieldReader; #[doc = "Field `INT199` writer - Interrupt 199"] -pub type INT199_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT199_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 196"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 196"] #[inline(always)] #[must_use] - pub fn int196(&mut self) -> INT196_W { - INT196_W::new(self) + pub fn int196(&mut self) -> INT196_W { + INT196_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 197"] #[inline(always)] #[must_use] - pub fn int197(&mut self) -> INT197_W { - INT197_W::new(self) + pub fn int197(&mut self) -> INT197_W { + INT197_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 198"] #[inline(always)] #[must_use] - pub fn int198(&mut self) -> INT198_W { - INT198_W::new(self) + pub fn int198(&mut self) -> INT198_W { + INT198_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 199"] #[inline(always)] #[must_use] - pub fn int199(&mut self) -> INT199_W { - INT199_W::new(self) + pub fn int199(&mut self) -> INT199_W { + INT199_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr5.rs index f1c6b39..efec710 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr5.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::FieldReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT20_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::FieldReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT21_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::FieldReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT22_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::FieldReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT23_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 20"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr50.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr50.rs index 00e5d50..725de7e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr50.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr50.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT200` reader - Interrupt 200"] pub type INT200_R = crate::FieldReader; #[doc = "Field `INT200` writer - Interrupt 200"] -pub type INT200_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT200_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT201` reader - Interrupt 201"] pub type INT201_R = crate::FieldReader; #[doc = "Field `INT201` writer - Interrupt 201"] -pub type INT201_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT201_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT202` reader - Interrupt 202"] pub type INT202_R = crate::FieldReader; #[doc = "Field `INT202` writer - Interrupt 202"] -pub type INT202_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT202_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT203` reader - Interrupt 203"] pub type INT203_R = crate::FieldReader; #[doc = "Field `INT203` writer - Interrupt 203"] -pub type INT203_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT203_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 200"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 200"] #[inline(always)] #[must_use] - pub fn int200(&mut self) -> INT200_W { - INT200_W::new(self) + pub fn int200(&mut self) -> INT200_W { + INT200_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 201"] #[inline(always)] #[must_use] - pub fn int201(&mut self) -> INT201_W { - INT201_W::new(self) + pub fn int201(&mut self) -> INT201_W { + INT201_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 202"] #[inline(always)] #[must_use] - pub fn int202(&mut self) -> INT202_W { - INT202_W::new(self) + pub fn int202(&mut self) -> INT202_W { + INT202_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 203"] #[inline(always)] #[must_use] - pub fn int203(&mut self) -> INT203_W { - INT203_W::new(self) + pub fn int203(&mut self) -> INT203_W { + INT203_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr51.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr51.rs index dc25b0a..8b95bed 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr51.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr51.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT204` reader - Interrupt 204"] pub type INT204_R = crate::FieldReader; #[doc = "Field `INT204` writer - Interrupt 204"] -pub type INT204_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT204_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT205` reader - Interrupt 205"] pub type INT205_R = crate::FieldReader; #[doc = "Field `INT205` writer - Interrupt 205"] -pub type INT205_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT205_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT206` reader - Interrupt 206"] pub type INT206_R = crate::FieldReader; #[doc = "Field `INT206` writer - Interrupt 206"] -pub type INT206_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT206_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT207` reader - Interrupt 207"] pub type INT207_R = crate::FieldReader; #[doc = "Field `INT207` writer - Interrupt 207"] -pub type INT207_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT207_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 204"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 204"] #[inline(always)] #[must_use] - pub fn int204(&mut self) -> INT204_W { - INT204_W::new(self) + pub fn int204(&mut self) -> INT204_W { + INT204_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 205"] #[inline(always)] #[must_use] - pub fn int205(&mut self) -> INT205_W { - INT205_W::new(self) + pub fn int205(&mut self) -> INT205_W { + INT205_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 206"] #[inline(always)] #[must_use] - pub fn int206(&mut self) -> INT206_W { - INT206_W::new(self) + pub fn int206(&mut self) -> INT206_W { + INT206_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 207"] #[inline(always)] #[must_use] - pub fn int207(&mut self) -> INT207_W { - INT207_W::new(self) + pub fn int207(&mut self) -> INT207_W { + INT207_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr52.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr52.rs index 798ef1b..20ed0cf 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr52.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr52.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT208` reader - Interrupt 208"] pub type INT208_R = crate::FieldReader; #[doc = "Field `INT208` writer - Interrupt 208"] -pub type INT208_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT208_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT209` reader - Interrupt 209"] pub type INT209_R = crate::FieldReader; #[doc = "Field `INT209` writer - Interrupt 209"] -pub type INT209_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT209_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT210` reader - Interrupt 210"] pub type INT210_R = crate::FieldReader; #[doc = "Field `INT210` writer - Interrupt 210"] -pub type INT210_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT210_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT211` reader - Interrupt 211"] pub type INT211_R = crate::FieldReader; #[doc = "Field `INT211` writer - Interrupt 211"] -pub type INT211_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT211_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 208"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 208"] #[inline(always)] #[must_use] - pub fn int208(&mut self) -> INT208_W { - INT208_W::new(self) + pub fn int208(&mut self) -> INT208_W { + INT208_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 209"] #[inline(always)] #[must_use] - pub fn int209(&mut self) -> INT209_W { - INT209_W::new(self) + pub fn int209(&mut self) -> INT209_W { + INT209_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 210"] #[inline(always)] #[must_use] - pub fn int210(&mut self) -> INT210_W { - INT210_W::new(self) + pub fn int210(&mut self) -> INT210_W { + INT210_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 211"] #[inline(always)] #[must_use] - pub fn int211(&mut self) -> INT211_W { - INT211_W::new(self) + pub fn int211(&mut self) -> INT211_W { + INT211_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr53.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr53.rs index 38ea4b0..143f0f0 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr53.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr53.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT212` reader - Interrupt 212"] pub type INT212_R = crate::FieldReader; #[doc = "Field `INT212` writer - Interrupt 212"] -pub type INT212_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT212_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT213` reader - Interrupt 213"] pub type INT213_R = crate::FieldReader; #[doc = "Field `INT213` writer - Interrupt 213"] -pub type INT213_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT213_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT214` reader - Interrupt 214"] pub type INT214_R = crate::FieldReader; #[doc = "Field `INT214` writer - Interrupt 214"] -pub type INT214_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT214_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT215` reader - Interrupt 215"] pub type INT215_R = crate::FieldReader; #[doc = "Field `INT215` writer - Interrupt 215"] -pub type INT215_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT215_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 212"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 212"] #[inline(always)] #[must_use] - pub fn int212(&mut self) -> INT212_W { - INT212_W::new(self) + pub fn int212(&mut self) -> INT212_W { + INT212_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 213"] #[inline(always)] #[must_use] - pub fn int213(&mut self) -> INT213_W { - INT213_W::new(self) + pub fn int213(&mut self) -> INT213_W { + INT213_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 214"] #[inline(always)] #[must_use] - pub fn int214(&mut self) -> INT214_W { - INT214_W::new(self) + pub fn int214(&mut self) -> INT214_W { + INT214_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 215"] #[inline(always)] #[must_use] - pub fn int215(&mut self) -> INT215_W { - INT215_W::new(self) + pub fn int215(&mut self) -> INT215_W { + INT215_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr54.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr54.rs index 8cbfb77..6ed54b3 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr54.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr54.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT216` reader - Interrupt 216"] pub type INT216_R = crate::FieldReader; #[doc = "Field `INT216` writer - Interrupt 216"] -pub type INT216_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT216_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT217` reader - Interrupt 217"] pub type INT217_R = crate::FieldReader; #[doc = "Field `INT217` writer - Interrupt 217"] -pub type INT217_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT217_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT218` reader - Interrupt 218"] pub type INT218_R = crate::FieldReader; #[doc = "Field `INT218` writer - Interrupt 218"] -pub type INT218_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT218_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT219` reader - Interrupt 219"] pub type INT219_R = crate::FieldReader; #[doc = "Field `INT219` writer - Interrupt 219"] -pub type INT219_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT219_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 216"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 216"] #[inline(always)] #[must_use] - pub fn int216(&mut self) -> INT216_W { - INT216_W::new(self) + pub fn int216(&mut self) -> INT216_W { + INT216_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 217"] #[inline(always)] #[must_use] - pub fn int217(&mut self) -> INT217_W { - INT217_W::new(self) + pub fn int217(&mut self) -> INT217_W { + INT217_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 218"] #[inline(always)] #[must_use] - pub fn int218(&mut self) -> INT218_W { - INT218_W::new(self) + pub fn int218(&mut self) -> INT218_W { + INT218_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 219"] #[inline(always)] #[must_use] - pub fn int219(&mut self) -> INT219_W { - INT219_W::new(self) + pub fn int219(&mut self) -> INT219_W { + INT219_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr55.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr55.rs index 3bc371b..7fcf765 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr55.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr55.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT220` reader - Interrupt 220"] pub type INT220_R = crate::FieldReader; #[doc = "Field `INT220` writer - Interrupt 220"] -pub type INT220_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT220_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT221` reader - Interrupt 221"] pub type INT221_R = crate::FieldReader; #[doc = "Field `INT221` writer - Interrupt 221"] -pub type INT221_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT221_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT222` reader - Interrupt 222"] pub type INT222_R = crate::FieldReader; #[doc = "Field `INT222` writer - Interrupt 222"] -pub type INT222_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT222_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT223` reader - Interrupt 223"] pub type INT223_R = crate::FieldReader; #[doc = "Field `INT223` writer - Interrupt 223"] -pub type INT223_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT223_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 220"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 220"] #[inline(always)] #[must_use] - pub fn int220(&mut self) -> INT220_W { - INT220_W::new(self) + pub fn int220(&mut self) -> INT220_W { + INT220_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 221"] #[inline(always)] #[must_use] - pub fn int221(&mut self) -> INT221_W { - INT221_W::new(self) + pub fn int221(&mut self) -> INT221_W { + INT221_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 222"] #[inline(always)] #[must_use] - pub fn int222(&mut self) -> INT222_W { - INT222_W::new(self) + pub fn int222(&mut self) -> INT222_W { + INT222_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 223"] #[inline(always)] #[must_use] - pub fn int223(&mut self) -> INT223_W { - INT223_W::new(self) + pub fn int223(&mut self) -> INT223_W { + INT223_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr6.rs index 6c84128..bea0dfe 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr6.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::FieldReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT24_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::FieldReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT25_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::FieldReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT26_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::FieldReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT27_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 24"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr7.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr7.rs index 1f50911..11c8547 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr7.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr7.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::FieldReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT28_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::FieldReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT29_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::FieldReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT30_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::FieldReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT31_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 28"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr8.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr8.rs index a0035ef..4fd82c5 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr8.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr8.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::FieldReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT32_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::FieldReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT33_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::FieldReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT34_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::FieldReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT35_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 32"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr9.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr9.rs index eb4345f..4717b81 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr9.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_itargetsr/gicd_itargetsr9.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::FieldReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT36_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::FieldReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT37_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::FieldReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT38_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::FieldReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type INT39_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Interrupt 36"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 0) } #[doc = "Bits 8:15 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 8) } #[doc = "Bits 16:23 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 16) } #[doc = "Bits 24:31 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr0.rs index 82cd0ed..cf9b53b 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr0.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR0_R = crate::FieldReader; pub enum GICD_PIDR0_A { #[doc = "144: Valid"] VALID = 144, + #[doc = "0: Invalid"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR0_A { impl GICD_PIDR0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR0_A { match self.bits { - 144 => Some(GICD_PIDR0_A::VALID), - _ => None, + 144 => GICD_PIDR0_A::VALID, + _ => GICD_PIDR0_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR0_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR0_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR0_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 0"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr1.rs index fb54acb..498d844 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr1.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR1_R = crate::FieldReader; pub enum GICD_PIDR1_A { #[doc = "180: Valid"] VALID = 180, + #[doc = "0: Invalid"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR1_A { impl GICD_PIDR1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR1_A { match self.bits { - 180 => Some(GICD_PIDR1_A::VALID), - _ => None, + 180 => GICD_PIDR1_A::VALID, + _ => GICD_PIDR1_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR1_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR1_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR1_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 1"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr2.rs index 0732af6..6b24ac6 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr2.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR2_R = crate::FieldReader; pub enum GICD_PIDR2_A { #[doc = "43: Valid"] VALID = 43, + #[doc = "0: Invalid"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR2_A { impl GICD_PIDR2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR2_A { match self.bits { - 43 => Some(GICD_PIDR2_A::VALID), - _ => None, + 43 => GICD_PIDR2_A::VALID, + _ => GICD_PIDR2_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR2_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR2_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR2_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 2"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr3.rs index fc6c9ee..c24b60c 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr3.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR3_R = crate::FieldReader; pub enum GICD_PIDR3_A { #[doc = "0: Valid"] VALID = 0, + #[doc = "1: Invalid"] + INVALID = 1, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR3_A { impl GICD_PIDR3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR3_A { match self.bits { - 0 => Some(GICD_PIDR3_A::VALID), - _ => None, + 0 => GICD_PIDR3_A::VALID, + _ => GICD_PIDR3_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR3_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR3_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR3_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 3"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr4.rs index 485a1b8..82d2b02 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr4.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR4_R = crate::FieldReader; pub enum GICD_PIDR4_A { #[doc = "4: Valid"] VALID = 4, + #[doc = "0: Invalid"] + INVALID = 0, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR4_A { impl GICD_PIDR4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR4_A { match self.bits { - 4 => Some(GICD_PIDR4_A::VALID), - _ => None, + 4 => GICD_PIDR4_A::VALID, + _ => GICD_PIDR4_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR4_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR4_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR4_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 4"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr5.rs index 4e4cc2d..e78dc43 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr5.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR5_R = crate::FieldReader; pub enum GICD_PIDR5_A { #[doc = "0: Valid"] VALID = 0, + #[doc = "1: Invalid"] + INVALID = 1, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR5_A { impl GICD_PIDR5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR5_A { match self.bits { - 0 => Some(GICD_PIDR5_A::VALID), - _ => None, + 0 => GICD_PIDR5_A::VALID, + _ => GICD_PIDR5_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR5_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR5_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR5_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 5"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr6.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr6.rs index 38fbd6a..299eaca 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr6.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr6.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR6_R = crate::FieldReader; pub enum GICD_PIDR6_A { #[doc = "0: Valid"] VALID = 0, + #[doc = "1: Invalid"] + INVALID = 1, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR6_A { impl GICD_PIDR6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR6_A { match self.bits { - 0 => Some(GICD_PIDR6_A::VALID), - _ => None, + 0 => GICD_PIDR6_A::VALID, + _ => GICD_PIDR6_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR6_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR6_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR6_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 6"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr7.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr7.rs index 7a77f8b..eb1d53d 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_pidr7.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_pidr7.rs @@ -8,6 +8,8 @@ pub type GICD_PIDR7_R = crate::FieldReader; pub enum GICD_PIDR7_A { #[doc = "0: Valid"] VALID = 0, + #[doc = "1: Invalid"] + INVALID = 1, } impl From for u32 { #[inline(always)] @@ -21,10 +23,10 @@ impl crate::FieldSpec for GICD_PIDR7_A { impl GICD_PIDR7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> GICD_PIDR7_A { match self.bits { - 0 => Some(GICD_PIDR7_A::VALID), - _ => None, + 0 => GICD_PIDR7_A::VALID, + _ => GICD_PIDR7_A::INVALID, } } #[doc = "Valid"] @@ -32,6 +34,11 @@ impl GICD_PIDR7_R { pub fn is_valid(&self) -> bool { *self == GICD_PIDR7_A::VALID } + #[doc = "Invalid"] + #[inline(always)] + pub fn is_invalid(&self) -> bool { + matches!(self.variant(), GICD_PIDR7_A::INVALID) + } } impl R { #[doc = "Bits 0:31 - Peripheral ID 7"] @@ -49,7 +56,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Peripheral ID 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_pidr7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_ppisr.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_ppisr.rs index 7ea883c..2a530de 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_ppisr.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_ppisr.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `ID25` reader - Virtual maintenance interrupt"] pub type ID25_R = crate::BitReader; #[doc = "Field `ID25` writer - Virtual maintenance interrupt"] -pub type ID25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ID26` reader - Hypervisor timer event"] pub type ID26_R = crate::BitReader; #[doc = "Field `ID26` writer - Hypervisor timer event"] -pub type ID26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ID27` reader - Virtual timer event"] pub type ID27_R = crate::BitReader; #[doc = "Field `ID27` writer - Virtual timer event"] -pub type ID27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ID28` reader - nLEGACYFIQ signal"] pub type ID28_R = crate::BitReader; #[doc = "Field `ID28` writer - nLEGACYFIQ signal"] -pub type ID28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ID29` reader - Secure physical timer event"] pub type ID29_R = crate::BitReader; #[doc = "Field `ID29` writer - Secure physical timer event"] -pub type ID29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ID30` reader - Non-secure physical timer event"] pub type ID30_R = crate::BitReader; #[doc = "Field `ID30` writer - Non-secure physical timer event"] -pub type ID30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ID31` reader - nLEGACYIRQ signal"] pub type ID31_R = crate::BitReader; #[doc = "Field `ID31` writer - nLEGACYIRQ signal"] -pub type ID31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ID31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 9 - Virtual maintenance interrupt"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 9 - Virtual maintenance interrupt"] #[inline(always)] #[must_use] - pub fn id25(&mut self) -> ID25_W { - ID25_W::new(self) + pub fn id25(&mut self) -> ID25_W { + ID25_W::new(self, 9) } #[doc = "Bit 10 - Hypervisor timer event"] #[inline(always)] #[must_use] - pub fn id26(&mut self) -> ID26_W { - ID26_W::new(self) + pub fn id26(&mut self) -> ID26_W { + ID26_W::new(self, 10) } #[doc = "Bit 11 - Virtual timer event"] #[inline(always)] #[must_use] - pub fn id27(&mut self) -> ID27_W { - ID27_W::new(self) + pub fn id27(&mut self) -> ID27_W { + ID27_W::new(self, 11) } #[doc = "Bit 12 - nLEGACYFIQ signal"] #[inline(always)] #[must_use] - pub fn id28(&mut self) -> ID28_W { - ID28_W::new(self) + pub fn id28(&mut self) -> ID28_W { + ID28_W::new(self, 12) } #[doc = "Bit 13 - Secure physical timer event"] #[inline(always)] #[must_use] - pub fn id29(&mut self) -> ID29_W { - ID29_W::new(self) + pub fn id29(&mut self) -> ID29_W { + ID29_W::new(self, 13) } #[doc = "Bit 14 - Non-secure physical timer event"] #[inline(always)] #[must_use] - pub fn id30(&mut self) -> ID30_W { - ID30_W::new(self) + pub fn id30(&mut self) -> ID30_W { + ID30_W::new(self, 14) } #[doc = "Bit 15 - nLEGACYIRQ signal"] #[inline(always)] #[must_use] - pub fn id31(&mut self) -> ID31_W { - ID31_W::new(self) + pub fn id31(&mut self) -> ID31_W { + ID31_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spendsgirn.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spendsgirn.rs index b926118..219973e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spendsgirn.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spendsgirn.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr0.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr0.rs index 5a4eb65..b11c650 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr0.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `SPI32` reader - Shared interrupt 32"] pub type SPI32_R = crate::BitReader; #[doc = "Field `SPI32` writer - Shared interrupt 32"] -pub type SPI32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI33` reader - Shared interrupt 33"] pub type SPI33_R = crate::BitReader; #[doc = "Field `SPI33` writer - Shared interrupt 33"] -pub type SPI33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI34` reader - Shared interrupt 34"] pub type SPI34_R = crate::BitReader; #[doc = "Field `SPI34` writer - Shared interrupt 34"] -pub type SPI34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI35` reader - Shared interrupt 35"] pub type SPI35_R = crate::BitReader; #[doc = "Field `SPI35` writer - Shared interrupt 35"] -pub type SPI35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI36` reader - Shared interrupt 36"] pub type SPI36_R = crate::BitReader; #[doc = "Field `SPI36` writer - Shared interrupt 36"] -pub type SPI36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI37` reader - Shared interrupt 37"] pub type SPI37_R = crate::BitReader; #[doc = "Field `SPI37` writer - Shared interrupt 37"] -pub type SPI37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI38` reader - Shared interrupt 38"] pub type SPI38_R = crate::BitReader; #[doc = "Field `SPI38` writer - Shared interrupt 38"] -pub type SPI38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI39` reader - Shared interrupt 39"] pub type SPI39_R = crate::BitReader; #[doc = "Field `SPI39` writer - Shared interrupt 39"] -pub type SPI39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI40` reader - Shared interrupt 40"] pub type SPI40_R = crate::BitReader; #[doc = "Field `SPI40` writer - Shared interrupt 40"] -pub type SPI40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI41` reader - Shared interrupt 41"] pub type SPI41_R = crate::BitReader; #[doc = "Field `SPI41` writer - Shared interrupt 41"] -pub type SPI41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI42` reader - Shared interrupt 42"] pub type SPI42_R = crate::BitReader; #[doc = "Field `SPI42` writer - Shared interrupt 42"] -pub type SPI42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI43` reader - Shared interrupt 43"] pub type SPI43_R = crate::BitReader; #[doc = "Field `SPI43` writer - Shared interrupt 43"] -pub type SPI43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI44` reader - Shared interrupt 44"] pub type SPI44_R = crate::BitReader; #[doc = "Field `SPI44` writer - Shared interrupt 44"] -pub type SPI44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI45` reader - Shared interrupt 45"] pub type SPI45_R = crate::BitReader; #[doc = "Field `SPI45` writer - Shared interrupt 45"] -pub type SPI45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI46` reader - Shared interrupt 46"] pub type SPI46_R = crate::BitReader; #[doc = "Field `SPI46` writer - Shared interrupt 46"] -pub type SPI46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI47` reader - Shared interrupt 47"] pub type SPI47_R = crate::BitReader; #[doc = "Field `SPI47` writer - Shared interrupt 47"] -pub type SPI47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI48` reader - Shared interrupt 48"] pub type SPI48_R = crate::BitReader; #[doc = "Field `SPI48` writer - Shared interrupt 48"] -pub type SPI48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI49` reader - Shared interrupt 49"] pub type SPI49_R = crate::BitReader; #[doc = "Field `SPI49` writer - Shared interrupt 49"] -pub type SPI49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI50` reader - Shared interrupt 50"] pub type SPI50_R = crate::BitReader; #[doc = "Field `SPI50` writer - Shared interrupt 50"] -pub type SPI50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI51` reader - Shared interrupt 51"] pub type SPI51_R = crate::BitReader; #[doc = "Field `SPI51` writer - Shared interrupt 51"] -pub type SPI51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI52` reader - Shared interrupt 52"] pub type SPI52_R = crate::BitReader; #[doc = "Field `SPI52` writer - Shared interrupt 52"] -pub type SPI52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI53` reader - Shared interrupt 53"] pub type SPI53_R = crate::BitReader; #[doc = "Field `SPI53` writer - Shared interrupt 53"] -pub type SPI53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI54` reader - Shared interrupt 54"] pub type SPI54_R = crate::BitReader; #[doc = "Field `SPI54` writer - Shared interrupt 54"] -pub type SPI54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI55` reader - Shared interrupt 55"] pub type SPI55_R = crate::BitReader; #[doc = "Field `SPI55` writer - Shared interrupt 55"] -pub type SPI55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI56` reader - Shared interrupt 56"] pub type SPI56_R = crate::BitReader; #[doc = "Field `SPI56` writer - Shared interrupt 56"] -pub type SPI56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI57` reader - Shared interrupt 57"] pub type SPI57_R = crate::BitReader; #[doc = "Field `SPI57` writer - Shared interrupt 57"] -pub type SPI57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI57_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI58` reader - Shared interrupt 58"] pub type SPI58_R = crate::BitReader; #[doc = "Field `SPI58` writer - Shared interrupt 58"] -pub type SPI58_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI58_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI59` reader - Shared interrupt 59"] pub type SPI59_R = crate::BitReader; #[doc = "Field `SPI59` writer - Shared interrupt 59"] -pub type SPI59_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI59_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI60` reader - Shared interrupt 60"] pub type SPI60_R = crate::BitReader; #[doc = "Field `SPI60` writer - Shared interrupt 60"] -pub type SPI60_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI60_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI61` reader - Shared interrupt 61"] pub type SPI61_R = crate::BitReader; #[doc = "Field `SPI61` writer - Shared interrupt 61"] -pub type SPI61_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI61_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI62` reader - Shared interrupt 62"] pub type SPI62_R = crate::BitReader; #[doc = "Field `SPI62` writer - Shared interrupt 62"] -pub type SPI62_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI62_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI63` reader - Shared interrupt 63"] pub type SPI63_R = crate::BitReader; #[doc = "Field `SPI63` writer - Shared interrupt 63"] -pub type SPI63_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI63_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Shared interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Shared interrupt 32"] #[inline(always)] #[must_use] - pub fn spi32(&mut self) -> SPI32_W { - SPI32_W::new(self) + pub fn spi32(&mut self) -> SPI32_W { + SPI32_W::new(self, 0) } #[doc = "Bit 1 - Shared interrupt 33"] #[inline(always)] #[must_use] - pub fn spi33(&mut self) -> SPI33_W { - SPI33_W::new(self) + pub fn spi33(&mut self) -> SPI33_W { + SPI33_W::new(self, 1) } #[doc = "Bit 2 - Shared interrupt 34"] #[inline(always)] #[must_use] - pub fn spi34(&mut self) -> SPI34_W { - SPI34_W::new(self) + pub fn spi34(&mut self) -> SPI34_W { + SPI34_W::new(self, 2) } #[doc = "Bit 3 - Shared interrupt 35"] #[inline(always)] #[must_use] - pub fn spi35(&mut self) -> SPI35_W { - SPI35_W::new(self) + pub fn spi35(&mut self) -> SPI35_W { + SPI35_W::new(self, 3) } #[doc = "Bit 4 - Shared interrupt 36"] #[inline(always)] #[must_use] - pub fn spi36(&mut self) -> SPI36_W { - SPI36_W::new(self) + pub fn spi36(&mut self) -> SPI36_W { + SPI36_W::new(self, 4) } #[doc = "Bit 5 - Shared interrupt 37"] #[inline(always)] #[must_use] - pub fn spi37(&mut self) -> SPI37_W { - SPI37_W::new(self) + pub fn spi37(&mut self) -> SPI37_W { + SPI37_W::new(self, 5) } #[doc = "Bit 6 - Shared interrupt 38"] #[inline(always)] #[must_use] - pub fn spi38(&mut self) -> SPI38_W { - SPI38_W::new(self) + pub fn spi38(&mut self) -> SPI38_W { + SPI38_W::new(self, 6) } #[doc = "Bit 7 - Shared interrupt 39"] #[inline(always)] #[must_use] - pub fn spi39(&mut self) -> SPI39_W { - SPI39_W::new(self) + pub fn spi39(&mut self) -> SPI39_W { + SPI39_W::new(self, 7) } #[doc = "Bit 8 - Shared interrupt 40"] #[inline(always)] #[must_use] - pub fn spi40(&mut self) -> SPI40_W { - SPI40_W::new(self) + pub fn spi40(&mut self) -> SPI40_W { + SPI40_W::new(self, 8) } #[doc = "Bit 9 - Shared interrupt 41"] #[inline(always)] #[must_use] - pub fn spi41(&mut self) -> SPI41_W { - SPI41_W::new(self) + pub fn spi41(&mut self) -> SPI41_W { + SPI41_W::new(self, 9) } #[doc = "Bit 10 - Shared interrupt 42"] #[inline(always)] #[must_use] - pub fn spi42(&mut self) -> SPI42_W { - SPI42_W::new(self) + pub fn spi42(&mut self) -> SPI42_W { + SPI42_W::new(self, 10) } #[doc = "Bit 11 - Shared interrupt 43"] #[inline(always)] #[must_use] - pub fn spi43(&mut self) -> SPI43_W { - SPI43_W::new(self) + pub fn spi43(&mut self) -> SPI43_W { + SPI43_W::new(self, 11) } #[doc = "Bit 12 - Shared interrupt 44"] #[inline(always)] #[must_use] - pub fn spi44(&mut self) -> SPI44_W { - SPI44_W::new(self) + pub fn spi44(&mut self) -> SPI44_W { + SPI44_W::new(self, 12) } #[doc = "Bit 13 - Shared interrupt 45"] #[inline(always)] #[must_use] - pub fn spi45(&mut self) -> SPI45_W { - SPI45_W::new(self) + pub fn spi45(&mut self) -> SPI45_W { + SPI45_W::new(self, 13) } #[doc = "Bit 14 - Shared interrupt 46"] #[inline(always)] #[must_use] - pub fn spi46(&mut self) -> SPI46_W { - SPI46_W::new(self) + pub fn spi46(&mut self) -> SPI46_W { + SPI46_W::new(self, 14) } #[doc = "Bit 15 - Shared interrupt 47"] #[inline(always)] #[must_use] - pub fn spi47(&mut self) -> SPI47_W { - SPI47_W::new(self) + pub fn spi47(&mut self) -> SPI47_W { + SPI47_W::new(self, 15) } #[doc = "Bit 16 - Shared interrupt 48"] #[inline(always)] #[must_use] - pub fn spi48(&mut self) -> SPI48_W { - SPI48_W::new(self) + pub fn spi48(&mut self) -> SPI48_W { + SPI48_W::new(self, 16) } #[doc = "Bit 17 - Shared interrupt 49"] #[inline(always)] #[must_use] - pub fn spi49(&mut self) -> SPI49_W { - SPI49_W::new(self) + pub fn spi49(&mut self) -> SPI49_W { + SPI49_W::new(self, 17) } #[doc = "Bit 18 - Shared interrupt 50"] #[inline(always)] #[must_use] - pub fn spi50(&mut self) -> SPI50_W { - SPI50_W::new(self) + pub fn spi50(&mut self) -> SPI50_W { + SPI50_W::new(self, 18) } #[doc = "Bit 19 - Shared interrupt 51"] #[inline(always)] #[must_use] - pub fn spi51(&mut self) -> SPI51_W { - SPI51_W::new(self) + pub fn spi51(&mut self) -> SPI51_W { + SPI51_W::new(self, 19) } #[doc = "Bit 20 - Shared interrupt 52"] #[inline(always)] #[must_use] - pub fn spi52(&mut self) -> SPI52_W { - SPI52_W::new(self) + pub fn spi52(&mut self) -> SPI52_W { + SPI52_W::new(self, 20) } #[doc = "Bit 21 - Shared interrupt 53"] #[inline(always)] #[must_use] - pub fn spi53(&mut self) -> SPI53_W { - SPI53_W::new(self) + pub fn spi53(&mut self) -> SPI53_W { + SPI53_W::new(self, 21) } #[doc = "Bit 22 - Shared interrupt 54"] #[inline(always)] #[must_use] - pub fn spi54(&mut self) -> SPI54_W { - SPI54_W::new(self) + pub fn spi54(&mut self) -> SPI54_W { + SPI54_W::new(self, 22) } #[doc = "Bit 23 - Shared interrupt 55"] #[inline(always)] #[must_use] - pub fn spi55(&mut self) -> SPI55_W { - SPI55_W::new(self) + pub fn spi55(&mut self) -> SPI55_W { + SPI55_W::new(self, 23) } #[doc = "Bit 24 - Shared interrupt 56"] #[inline(always)] #[must_use] - pub fn spi56(&mut self) -> SPI56_W { - SPI56_W::new(self) + pub fn spi56(&mut self) -> SPI56_W { + SPI56_W::new(self, 24) } #[doc = "Bit 25 - Shared interrupt 57"] #[inline(always)] #[must_use] - pub fn spi57(&mut self) -> SPI57_W { - SPI57_W::new(self) + pub fn spi57(&mut self) -> SPI57_W { + SPI57_W::new(self, 25) } #[doc = "Bit 26 - Shared interrupt 58"] #[inline(always)] #[must_use] - pub fn spi58(&mut self) -> SPI58_W { - SPI58_W::new(self) + pub fn spi58(&mut self) -> SPI58_W { + SPI58_W::new(self, 26) } #[doc = "Bit 27 - Shared interrupt 59"] #[inline(always)] #[must_use] - pub fn spi59(&mut self) -> SPI59_W { - SPI59_W::new(self) + pub fn spi59(&mut self) -> SPI59_W { + SPI59_W::new(self, 27) } #[doc = "Bit 28 - Shared interrupt 60"] #[inline(always)] #[must_use] - pub fn spi60(&mut self) -> SPI60_W { - SPI60_W::new(self) + pub fn spi60(&mut self) -> SPI60_W { + SPI60_W::new(self, 28) } #[doc = "Bit 29 - Shared interrupt 61"] #[inline(always)] #[must_use] - pub fn spi61(&mut self) -> SPI61_W { - SPI61_W::new(self) + pub fn spi61(&mut self) -> SPI61_W { + SPI61_W::new(self, 29) } #[doc = "Bit 30 - Shared interrupt 62"] #[inline(always)] #[must_use] - pub fn spi62(&mut self) -> SPI62_W { - SPI62_W::new(self) + pub fn spi62(&mut self) -> SPI62_W { + SPI62_W::new(self, 30) } #[doc = "Bit 31 - Shared interrupt 63"] #[inline(always)] #[must_use] - pub fn spi63(&mut self) -> SPI63_W { - SPI63_W::new(self) + pub fn spi63(&mut self) -> SPI63_W { + SPI63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr1.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr1.rs index 132f983..78916f8 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr1.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI0` reader - Software interrupt 0"] pub type SWI0_R = crate::BitReader; #[doc = "Field `SWI0` writer - Software interrupt 0"] -pub type SWI0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI1` reader - Software interrupt 1"] pub type SWI1_R = crate::BitReader; #[doc = "Field `SWI1` writer - Software interrupt 1"] -pub type SWI1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI2` reader - Software interrupt 2"] pub type SWI2_R = crate::BitReader; #[doc = "Field `SWI2` writer - Software interrupt 2"] -pub type SWI2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI3` reader - Software interrupt 3"] pub type SWI3_R = crate::BitReader; #[doc = "Field `SWI3` writer - Software interrupt 3"] -pub type SWI3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI4` reader - Software interrupt 4"] pub type SWI4_R = crate::BitReader; #[doc = "Field `SWI4` writer - Software interrupt 4"] -pub type SWI4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI5` reader - Software interrupt 5"] pub type SWI5_R = crate::BitReader; #[doc = "Field `SWI5` writer - Software interrupt 5"] -pub type SWI5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI6` reader - Software interrupt 6"] pub type SWI6_R = crate::BitReader; #[doc = "Field `SWI6` writer - Software interrupt 6"] -pub type SWI6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWI7` reader - Software interrupt 7"] pub type SWI7_R = crate::BitReader; #[doc = "Field `SWI7` writer - Software interrupt 7"] -pub type SWI7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SWI7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI80` reader - Shared interrupt 80"] pub type SPI80_R = crate::BitReader; #[doc = "Field `SPI80` writer - Shared interrupt 80"] -pub type SPI80_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI80_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI81` reader - Shared interrupt 81"] pub type SPI81_R = crate::BitReader; #[doc = "Field `SPI81` writer - Shared interrupt 81"] -pub type SPI81_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI81_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI82` reader - Shared interrupt 82"] pub type SPI82_R = crate::BitReader; #[doc = "Field `SPI82` writer - Shared interrupt 82"] -pub type SPI82_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI82_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI83` reader - Shared interrupt 83"] pub type SPI83_R = crate::BitReader; #[doc = "Field `SPI83` writer - Shared interrupt 83"] -pub type SPI83_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI83_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI84` reader - Shared interrupt 84"] pub type SPI84_R = crate::BitReader; #[doc = "Field `SPI84` writer - Shared interrupt 84"] -pub type SPI84_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI84_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI85` reader - Shared interrupt 85"] pub type SPI85_R = crate::BitReader; #[doc = "Field `SPI85` writer - Shared interrupt 85"] -pub type SPI85_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI85_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI86` reader - Shared interrupt 86"] pub type SPI86_R = crate::BitReader; #[doc = "Field `SPI86` writer - Shared interrupt 86"] -pub type SPI86_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI86_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI87` reader - Shared interrupt 87"] pub type SPI87_R = crate::BitReader; #[doc = "Field `SPI87` writer - Shared interrupt 87"] -pub type SPI87_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI87_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI88` reader - Shared interrupt 88"] pub type SPI88_R = crate::BitReader; #[doc = "Field `SPI88` writer - Shared interrupt 88"] -pub type SPI88_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI88_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI89` reader - Shared interrupt 89"] pub type SPI89_R = crate::BitReader; #[doc = "Field `SPI89` writer - Shared interrupt 89"] -pub type SPI89_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI89_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI90` reader - Shared interrupt 90"] pub type SPI90_R = crate::BitReader; #[doc = "Field `SPI90` writer - Shared interrupt 90"] -pub type SPI90_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI90_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI91` reader - Shared interrupt 91"] pub type SPI91_R = crate::BitReader; #[doc = "Field `SPI91` writer - Shared interrupt 91"] -pub type SPI91_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI91_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI92` reader - Shared interrupt 92"] pub type SPI92_R = crate::BitReader; #[doc = "Field `SPI92` writer - Shared interrupt 92"] -pub type SPI92_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI92_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI93` reader - Shared interrupt 93"] pub type SPI93_R = crate::BitReader; #[doc = "Field `SPI93` writer - Shared interrupt 93"] -pub type SPI93_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI93_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI94` reader - Shared interrupt 94"] pub type SPI94_R = crate::BitReader; #[doc = "Field `SPI94` writer - Shared interrupt 94"] -pub type SPI94_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI94_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI95` reader - Shared interrupt 95"] pub type SPI95_R = crate::BitReader; #[doc = "Field `SPI95` writer - Shared interrupt 95"] -pub type SPI95_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI95_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -338,201 +338,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = "Bit 8 - Software interrupt 0"] #[inline(always)] #[must_use] - pub fn swi0(&mut self) -> SWI0_W { - SWI0_W::new(self) + pub fn swi0(&mut self) -> SWI0_W { + SWI0_W::new(self, 8) } #[doc = "Bit 9 - Software interrupt 1"] #[inline(always)] #[must_use] - pub fn swi1(&mut self) -> SWI1_W { - SWI1_W::new(self) + pub fn swi1(&mut self) -> SWI1_W { + SWI1_W::new(self, 9) } #[doc = "Bit 10 - Software interrupt 2"] #[inline(always)] #[must_use] - pub fn swi2(&mut self) -> SWI2_W { - SWI2_W::new(self) + pub fn swi2(&mut self) -> SWI2_W { + SWI2_W::new(self, 10) } #[doc = "Bit 11 - Software interrupt 3"] #[inline(always)] #[must_use] - pub fn swi3(&mut self) -> SWI3_W { - SWI3_W::new(self) + pub fn swi3(&mut self) -> SWI3_W { + SWI3_W::new(self, 11) } #[doc = "Bit 12 - Software interrupt 4"] #[inline(always)] #[must_use] - pub fn swi4(&mut self) -> SWI4_W { - SWI4_W::new(self) + pub fn swi4(&mut self) -> SWI4_W { + SWI4_W::new(self, 12) } #[doc = "Bit 13 - Software interrupt 5"] #[inline(always)] #[must_use] - pub fn swi5(&mut self) -> SWI5_W { - SWI5_W::new(self) + pub fn swi5(&mut self) -> SWI5_W { + SWI5_W::new(self, 13) } #[doc = "Bit 14 - Software interrupt 6"] #[inline(always)] #[must_use] - pub fn swi6(&mut self) -> SWI6_W { - SWI6_W::new(self) + pub fn swi6(&mut self) -> SWI6_W { + SWI6_W::new(self, 14) } #[doc = "Bit 15 - Software interrupt 7"] #[inline(always)] #[must_use] - pub fn swi7(&mut self) -> SWI7_W { - SWI7_W::new(self) + pub fn swi7(&mut self) -> SWI7_W { + SWI7_W::new(self, 15) } #[doc = "Bit 16 - Shared interrupt 80"] #[inline(always)] #[must_use] - pub fn spi80(&mut self) -> SPI80_W { - SPI80_W::new(self) + pub fn spi80(&mut self) -> SPI80_W { + SPI80_W::new(self, 16) } #[doc = "Bit 17 - Shared interrupt 81"] #[inline(always)] #[must_use] - pub fn spi81(&mut self) -> SPI81_W { - SPI81_W::new(self) + pub fn spi81(&mut self) -> SPI81_W { + SPI81_W::new(self, 17) } #[doc = "Bit 18 - Shared interrupt 82"] #[inline(always)] #[must_use] - pub fn spi82(&mut self) -> SPI82_W { - SPI82_W::new(self) + pub fn spi82(&mut self) -> SPI82_W { + SPI82_W::new(self, 18) } #[doc = "Bit 19 - Shared interrupt 83"] #[inline(always)] #[must_use] - pub fn spi83(&mut self) -> SPI83_W { - SPI83_W::new(self) + pub fn spi83(&mut self) -> SPI83_W { + SPI83_W::new(self, 19) } #[doc = "Bit 20 - Shared interrupt 84"] #[inline(always)] #[must_use] - pub fn spi84(&mut self) -> SPI84_W { - SPI84_W::new(self) + pub fn spi84(&mut self) -> SPI84_W { + SPI84_W::new(self, 20) } #[doc = "Bit 21 - Shared interrupt 85"] #[inline(always)] #[must_use] - pub fn spi85(&mut self) -> SPI85_W { - SPI85_W::new(self) + pub fn spi85(&mut self) -> SPI85_W { + SPI85_W::new(self, 21) } #[doc = "Bit 22 - Shared interrupt 86"] #[inline(always)] #[must_use] - pub fn spi86(&mut self) -> SPI86_W { - SPI86_W::new(self) + pub fn spi86(&mut self) -> SPI86_W { + SPI86_W::new(self, 22) } #[doc = "Bit 23 - Shared interrupt 87"] #[inline(always)] #[must_use] - pub fn spi87(&mut self) -> SPI87_W { - SPI87_W::new(self) + pub fn spi87(&mut self) -> SPI87_W { + SPI87_W::new(self, 23) } #[doc = "Bit 24 - Shared interrupt 88"] #[inline(always)] #[must_use] - pub fn spi88(&mut self) -> SPI88_W { - SPI88_W::new(self) + pub fn spi88(&mut self) -> SPI88_W { + SPI88_W::new(self, 24) } #[doc = "Bit 25 - Shared interrupt 89"] #[inline(always)] #[must_use] - pub fn spi89(&mut self) -> SPI89_W { - SPI89_W::new(self) + pub fn spi89(&mut self) -> SPI89_W { + SPI89_W::new(self, 25) } #[doc = "Bit 26 - Shared interrupt 90"] #[inline(always)] #[must_use] - pub fn spi90(&mut self) -> SPI90_W { - SPI90_W::new(self) + pub fn spi90(&mut self) -> SPI90_W { + SPI90_W::new(self, 26) } #[doc = "Bit 27 - Shared interrupt 91"] #[inline(always)] #[must_use] - pub fn spi91(&mut self) -> SPI91_W { - SPI91_W::new(self) + pub fn spi91(&mut self) -> SPI91_W { + SPI91_W::new(self, 27) } #[doc = "Bit 28 - Shared interrupt 92"] #[inline(always)] #[must_use] - pub fn spi92(&mut self) -> SPI92_W { - SPI92_W::new(self) + pub fn spi92(&mut self) -> SPI92_W { + SPI92_W::new(self, 28) } #[doc = "Bit 29 - Shared interrupt 93"] #[inline(always)] #[must_use] - pub fn spi93(&mut self) -> SPI93_W { - SPI93_W::new(self) + pub fn spi93(&mut self) -> SPI93_W { + SPI93_W::new(self, 29) } #[doc = "Bit 30 - Shared interrupt 94"] #[inline(always)] #[must_use] - pub fn spi94(&mut self) -> SPI94_W { - SPI94_W::new(self) + pub fn spi94(&mut self) -> SPI94_W { + SPI94_W::new(self, 30) } #[doc = "Bit 31 - Shared interrupt 95"] #[inline(always)] #[must_use] - pub fn spi95(&mut self) -> SPI95_W { - SPI95_W::new(self) + pub fn spi95(&mut self) -> SPI95_W { + SPI95_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr2.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr2.rs index cf50471..aa14dda 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr2.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr3.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr3.rs index 3dcb77a..2d7ef92 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr3.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr3.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr4.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr4.rs index cd31bdc..e51ae1e 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr4.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr4.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `SPI160` reader - Shared interrupt 160"] pub type SPI160_R = crate::BitReader; #[doc = "Field `SPI160` writer - Shared interrupt 160"] -pub type SPI160_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI160_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI161` reader - Shared interrupt 161"] pub type SPI161_R = crate::BitReader; #[doc = "Field `SPI161` writer - Shared interrupt 161"] -pub type SPI161_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI161_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI162` reader - Shared interrupt 162"] pub type SPI162_R = crate::BitReader; #[doc = "Field `SPI162` writer - Shared interrupt 162"] -pub type SPI162_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI162_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI163` reader - Shared interrupt 163"] pub type SPI163_R = crate::BitReader; #[doc = "Field `SPI163` writer - Shared interrupt 163"] -pub type SPI163_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI163_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI164` reader - Shared interrupt 164"] pub type SPI164_R = crate::BitReader; #[doc = "Field `SPI164` writer - Shared interrupt 164"] -pub type SPI164_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI164_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI165` reader - Shared interrupt 165"] pub type SPI165_R = crate::BitReader; #[doc = "Field `SPI165` writer - Shared interrupt 165"] -pub type SPI165_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI165_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI166` reader - Shared interrupt 166"] pub type SPI166_R = crate::BitReader; #[doc = "Field `SPI166` writer - Shared interrupt 166"] -pub type SPI166_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI166_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI167` reader - Shared interrupt 167"] pub type SPI167_R = crate::BitReader; #[doc = "Field `SPI167` writer - Shared interrupt 167"] -pub type SPI167_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI167_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI168` reader - Shared interrupt 168"] pub type SPI168_R = crate::BitReader; #[doc = "Field `SPI168` writer - Shared interrupt 168"] -pub type SPI168_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI168_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI169` reader - Shared interrupt 169"] pub type SPI169_R = crate::BitReader; #[doc = "Field `SPI169` writer - Shared interrupt 169"] -pub type SPI169_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI169_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI170` reader - Shared interrupt 170"] pub type SPI170_R = crate::BitReader; #[doc = "Field `SPI170` writer - Shared interrupt 170"] -pub type SPI170_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI170_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI171` reader - Shared interrupt 171"] pub type SPI171_R = crate::BitReader; #[doc = "Field `SPI171` writer - Shared interrupt 171"] -pub type SPI171_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI171_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI172` reader - Shared interrupt 172"] pub type SPI172_R = crate::BitReader; #[doc = "Field `SPI172` writer - Shared interrupt 172"] -pub type SPI172_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI172_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI173` reader - Shared interrupt 173"] pub type SPI173_R = crate::BitReader; #[doc = "Field `SPI173` writer - Shared interrupt 173"] -pub type SPI173_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI173_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI174` reader - Shared interrupt 174"] pub type SPI174_R = crate::BitReader; #[doc = "Field `SPI174` writer - Shared interrupt 174"] -pub type SPI174_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI174_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI175` reader - Shared interrupt 175"] pub type SPI175_R = crate::BitReader; #[doc = "Field `SPI175` writer - Shared interrupt 175"] -pub type SPI175_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI175_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI176` reader - Shared interrupt 176"] pub type SPI176_R = crate::BitReader; #[doc = "Field `SPI176` writer - Shared interrupt 176"] -pub type SPI176_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI176_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI177` reader - Shared interrupt 177"] pub type SPI177_R = crate::BitReader; #[doc = "Field `SPI177` writer - Shared interrupt 177"] -pub type SPI177_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI177_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI178` reader - Shared interrupt 178"] pub type SPI178_R = crate::BitReader; #[doc = "Field `SPI178` writer - Shared interrupt 178"] -pub type SPI178_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI178_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI179` reader - Shared interrupt 179"] pub type SPI179_R = crate::BitReader; #[doc = "Field `SPI179` writer - Shared interrupt 179"] -pub type SPI179_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI179_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI180` reader - Shared interrupt 180"] pub type SPI180_R = crate::BitReader; #[doc = "Field `SPI180` writer - Shared interrupt 180"] -pub type SPI180_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI180_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI181` reader - Shared interrupt 181"] pub type SPI181_R = crate::BitReader; #[doc = "Field `SPI181` writer - Shared interrupt 181"] -pub type SPI181_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI181_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI182` reader - Shared interrupt 182"] pub type SPI182_R = crate::BitReader; #[doc = "Field `SPI182` writer - Shared interrupt 182"] -pub type SPI182_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI182_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI183` reader - Shared interrupt 183"] pub type SPI183_R = crate::BitReader; #[doc = "Field `SPI183` writer - Shared interrupt 183"] -pub type SPI183_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI183_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI184` reader - Shared interrupt 184"] pub type SPI184_R = crate::BitReader; #[doc = "Field `SPI184` writer - Shared interrupt 184"] -pub type SPI184_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI184_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI185` reader - Shared interrupt 185"] pub type SPI185_R = crate::BitReader; #[doc = "Field `SPI185` writer - Shared interrupt 185"] -pub type SPI185_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI185_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI186` reader - Shared interrupt 186"] pub type SPI186_R = crate::BitReader; #[doc = "Field `SPI186` writer - Shared interrupt 186"] -pub type SPI186_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI186_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI187` reader - Shared interrupt 187"] pub type SPI187_R = crate::BitReader; #[doc = "Field `SPI187` writer - Shared interrupt 187"] -pub type SPI187_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI187_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI188` reader - Shared interrupt 188"] pub type SPI188_R = crate::BitReader; #[doc = "Field `SPI188` writer - Shared interrupt 188"] -pub type SPI188_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI188_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI189` reader - Shared interrupt 189"] pub type SPI189_R = crate::BitReader; #[doc = "Field `SPI189` writer - Shared interrupt 189"] -pub type SPI189_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI189_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI190` reader - Shared interrupt 190"] pub type SPI190_R = crate::BitReader; #[doc = "Field `SPI190` writer - Shared interrupt 190"] -pub type SPI190_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI190_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI191` reader - Shared interrupt 191"] pub type SPI191_R = crate::BitReader; #[doc = "Field `SPI191` writer - Shared interrupt 191"] -pub type SPI191_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI191_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Shared interrupt 160"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Shared interrupt 160"] #[inline(always)] #[must_use] - pub fn spi160(&mut self) -> SPI160_W { - SPI160_W::new(self) + pub fn spi160(&mut self) -> SPI160_W { + SPI160_W::new(self, 0) } #[doc = "Bit 1 - Shared interrupt 161"] #[inline(always)] #[must_use] - pub fn spi161(&mut self) -> SPI161_W { - SPI161_W::new(self) + pub fn spi161(&mut self) -> SPI161_W { + SPI161_W::new(self, 1) } #[doc = "Bit 2 - Shared interrupt 162"] #[inline(always)] #[must_use] - pub fn spi162(&mut self) -> SPI162_W { - SPI162_W::new(self) + pub fn spi162(&mut self) -> SPI162_W { + SPI162_W::new(self, 2) } #[doc = "Bit 3 - Shared interrupt 163"] #[inline(always)] #[must_use] - pub fn spi163(&mut self) -> SPI163_W { - SPI163_W::new(self) + pub fn spi163(&mut self) -> SPI163_W { + SPI163_W::new(self, 3) } #[doc = "Bit 4 - Shared interrupt 164"] #[inline(always)] #[must_use] - pub fn spi164(&mut self) -> SPI164_W { - SPI164_W::new(self) + pub fn spi164(&mut self) -> SPI164_W { + SPI164_W::new(self, 4) } #[doc = "Bit 5 - Shared interrupt 165"] #[inline(always)] #[must_use] - pub fn spi165(&mut self) -> SPI165_W { - SPI165_W::new(self) + pub fn spi165(&mut self) -> SPI165_W { + SPI165_W::new(self, 5) } #[doc = "Bit 6 - Shared interrupt 166"] #[inline(always)] #[must_use] - pub fn spi166(&mut self) -> SPI166_W { - SPI166_W::new(self) + pub fn spi166(&mut self) -> SPI166_W { + SPI166_W::new(self, 6) } #[doc = "Bit 7 - Shared interrupt 167"] #[inline(always)] #[must_use] - pub fn spi167(&mut self) -> SPI167_W { - SPI167_W::new(self) + pub fn spi167(&mut self) -> SPI167_W { + SPI167_W::new(self, 7) } #[doc = "Bit 8 - Shared interrupt 168"] #[inline(always)] #[must_use] - pub fn spi168(&mut self) -> SPI168_W { - SPI168_W::new(self) + pub fn spi168(&mut self) -> SPI168_W { + SPI168_W::new(self, 8) } #[doc = "Bit 9 - Shared interrupt 169"] #[inline(always)] #[must_use] - pub fn spi169(&mut self) -> SPI169_W { - SPI169_W::new(self) + pub fn spi169(&mut self) -> SPI169_W { + SPI169_W::new(self, 9) } #[doc = "Bit 10 - Shared interrupt 170"] #[inline(always)] #[must_use] - pub fn spi170(&mut self) -> SPI170_W { - SPI170_W::new(self) + pub fn spi170(&mut self) -> SPI170_W { + SPI170_W::new(self, 10) } #[doc = "Bit 11 - Shared interrupt 171"] #[inline(always)] #[must_use] - pub fn spi171(&mut self) -> SPI171_W { - SPI171_W::new(self) + pub fn spi171(&mut self) -> SPI171_W { + SPI171_W::new(self, 11) } #[doc = "Bit 12 - Shared interrupt 172"] #[inline(always)] #[must_use] - pub fn spi172(&mut self) -> SPI172_W { - SPI172_W::new(self) + pub fn spi172(&mut self) -> SPI172_W { + SPI172_W::new(self, 12) } #[doc = "Bit 13 - Shared interrupt 173"] #[inline(always)] #[must_use] - pub fn spi173(&mut self) -> SPI173_W { - SPI173_W::new(self) + pub fn spi173(&mut self) -> SPI173_W { + SPI173_W::new(self, 13) } #[doc = "Bit 14 - Shared interrupt 174"] #[inline(always)] #[must_use] - pub fn spi174(&mut self) -> SPI174_W { - SPI174_W::new(self) + pub fn spi174(&mut self) -> SPI174_W { + SPI174_W::new(self, 14) } #[doc = "Bit 15 - Shared interrupt 175"] #[inline(always)] #[must_use] - pub fn spi175(&mut self) -> SPI175_W { - SPI175_W::new(self) + pub fn spi175(&mut self) -> SPI175_W { + SPI175_W::new(self, 15) } #[doc = "Bit 16 - Shared interrupt 176"] #[inline(always)] #[must_use] - pub fn spi176(&mut self) -> SPI176_W { - SPI176_W::new(self) + pub fn spi176(&mut self) -> SPI176_W { + SPI176_W::new(self, 16) } #[doc = "Bit 17 - Shared interrupt 177"] #[inline(always)] #[must_use] - pub fn spi177(&mut self) -> SPI177_W { - SPI177_W::new(self) + pub fn spi177(&mut self) -> SPI177_W { + SPI177_W::new(self, 17) } #[doc = "Bit 18 - Shared interrupt 178"] #[inline(always)] #[must_use] - pub fn spi178(&mut self) -> SPI178_W { - SPI178_W::new(self) + pub fn spi178(&mut self) -> SPI178_W { + SPI178_W::new(self, 18) } #[doc = "Bit 19 - Shared interrupt 179"] #[inline(always)] #[must_use] - pub fn spi179(&mut self) -> SPI179_W { - SPI179_W::new(self) + pub fn spi179(&mut self) -> SPI179_W { + SPI179_W::new(self, 19) } #[doc = "Bit 20 - Shared interrupt 180"] #[inline(always)] #[must_use] - pub fn spi180(&mut self) -> SPI180_W { - SPI180_W::new(self) + pub fn spi180(&mut self) -> SPI180_W { + SPI180_W::new(self, 20) } #[doc = "Bit 21 - Shared interrupt 181"] #[inline(always)] #[must_use] - pub fn spi181(&mut self) -> SPI181_W { - SPI181_W::new(self) + pub fn spi181(&mut self) -> SPI181_W { + SPI181_W::new(self, 21) } #[doc = "Bit 22 - Shared interrupt 182"] #[inline(always)] #[must_use] - pub fn spi182(&mut self) -> SPI182_W { - SPI182_W::new(self) + pub fn spi182(&mut self) -> SPI182_W { + SPI182_W::new(self, 22) } #[doc = "Bit 23 - Shared interrupt 183"] #[inline(always)] #[must_use] - pub fn spi183(&mut self) -> SPI183_W { - SPI183_W::new(self) + pub fn spi183(&mut self) -> SPI183_W { + SPI183_W::new(self, 23) } #[doc = "Bit 24 - Shared interrupt 184"] #[inline(always)] #[must_use] - pub fn spi184(&mut self) -> SPI184_W { - SPI184_W::new(self) + pub fn spi184(&mut self) -> SPI184_W { + SPI184_W::new(self, 24) } #[doc = "Bit 25 - Shared interrupt 185"] #[inline(always)] #[must_use] - pub fn spi185(&mut self) -> SPI185_W { - SPI185_W::new(self) + pub fn spi185(&mut self) -> SPI185_W { + SPI185_W::new(self, 25) } #[doc = "Bit 26 - Shared interrupt 186"] #[inline(always)] #[must_use] - pub fn spi186(&mut self) -> SPI186_W { - SPI186_W::new(self) + pub fn spi186(&mut self) -> SPI186_W { + SPI186_W::new(self, 26) } #[doc = "Bit 27 - Shared interrupt 187"] #[inline(always)] #[must_use] - pub fn spi187(&mut self) -> SPI187_W { - SPI187_W::new(self) + pub fn spi187(&mut self) -> SPI187_W { + SPI187_W::new(self, 27) } #[doc = "Bit 28 - Shared interrupt 188"] #[inline(always)] #[must_use] - pub fn spi188(&mut self) -> SPI188_W { - SPI188_W::new(self) + pub fn spi188(&mut self) -> SPI188_W { + SPI188_W::new(self, 28) } #[doc = "Bit 29 - Shared interrupt 189"] #[inline(always)] #[must_use] - pub fn spi189(&mut self) -> SPI189_W { - SPI189_W::new(self) + pub fn spi189(&mut self) -> SPI189_W { + SPI189_W::new(self, 29) } #[doc = "Bit 30 - Shared interrupt 190"] #[inline(always)] #[must_use] - pub fn spi190(&mut self) -> SPI190_W { - SPI190_W::new(self) + pub fn spi190(&mut self) -> SPI190_W { + SPI190_W::new(self, 30) } #[doc = "Bit 31 - Shared interrupt 191"] #[inline(always)] #[must_use] - pub fn spi191(&mut self) -> SPI191_W { - SPI191_W::new(self) + pub fn spi191(&mut self) -> SPI191_W { + SPI191_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr5.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr5.rs index c907dbc..3a15eab 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_spisr5.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_spisr5.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `SPI192` reader - Shared interrupt 192"] pub type SPI192_R = crate::BitReader; #[doc = "Field `SPI192` writer - Shared interrupt 192"] -pub type SPI192_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI192_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI193` reader - Shared interrupt 193"] pub type SPI193_R = crate::BitReader; #[doc = "Field `SPI193` writer - Shared interrupt 193"] -pub type SPI193_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI193_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI194` reader - Shared interrupt 194"] pub type SPI194_R = crate::BitReader; #[doc = "Field `SPI194` writer - Shared interrupt 194"] -pub type SPI194_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI194_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI195` reader - Shared interrupt 195"] pub type SPI195_R = crate::BitReader; #[doc = "Field `SPI195` writer - Shared interrupt 195"] -pub type SPI195_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI195_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI196` reader - Shared interrupt 196"] pub type SPI196_R = crate::BitReader; #[doc = "Field `SPI196` writer - Shared interrupt 196"] -pub type SPI196_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI196_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI197` reader - Shared interrupt 197"] pub type SPI197_R = crate::BitReader; #[doc = "Field `SPI197` writer - Shared interrupt 197"] -pub type SPI197_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI197_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI198` reader - Shared interrupt 198"] pub type SPI198_R = crate::BitReader; #[doc = "Field `SPI198` writer - Shared interrupt 198"] -pub type SPI198_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI198_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI199` reader - Shared interrupt 199"] pub type SPI199_R = crate::BitReader; #[doc = "Field `SPI199` writer - Shared interrupt 199"] -pub type SPI199_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI199_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI200` reader - Shared interrupt 200"] pub type SPI200_R = crate::BitReader; #[doc = "Field `SPI200` writer - Shared interrupt 200"] -pub type SPI200_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI200_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI201` reader - Shared interrupt 201"] pub type SPI201_R = crate::BitReader; #[doc = "Field `SPI201` writer - Shared interrupt 201"] -pub type SPI201_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI201_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI202` reader - Shared interrupt 202"] pub type SPI202_R = crate::BitReader; #[doc = "Field `SPI202` writer - Shared interrupt 202"] -pub type SPI202_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI202_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI203` reader - Shared interrupt 203"] pub type SPI203_R = crate::BitReader; #[doc = "Field `SPI203` writer - Shared interrupt 203"] -pub type SPI203_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI203_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI204` reader - Shared interrupt 204"] pub type SPI204_R = crate::BitReader; #[doc = "Field `SPI204` writer - Shared interrupt 204"] -pub type SPI204_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI204_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI205` reader - Shared interrupt 205"] pub type SPI205_R = crate::BitReader; #[doc = "Field `SPI205` writer - Shared interrupt 205"] -pub type SPI205_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI205_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI206` reader - Shared interrupt 206"] pub type SPI206_R = crate::BitReader; #[doc = "Field `SPI206` writer - Shared interrupt 206"] -pub type SPI206_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI206_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI207` reader - Shared interrupt 207"] pub type SPI207_R = crate::BitReader; #[doc = "Field `SPI207` writer - Shared interrupt 207"] -pub type SPI207_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI207_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI208` reader - Shared interrupt 208"] pub type SPI208_R = crate::BitReader; #[doc = "Field `SPI208` writer - Shared interrupt 208"] -pub type SPI208_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI208_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI209` reader - Shared interrupt 209"] pub type SPI209_R = crate::BitReader; #[doc = "Field `SPI209` writer - Shared interrupt 209"] -pub type SPI209_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI209_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI210` reader - Shared interrupt 210"] pub type SPI210_R = crate::BitReader; #[doc = "Field `SPI210` writer - Shared interrupt 210"] -pub type SPI210_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI210_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI211` reader - Shared interrupt 211"] pub type SPI211_R = crate::BitReader; #[doc = "Field `SPI211` writer - Shared interrupt 211"] -pub type SPI211_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI211_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI212` reader - Shared interrupt 212"] pub type SPI212_R = crate::BitReader; #[doc = "Field `SPI212` writer - Shared interrupt 212"] -pub type SPI212_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI212_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI213` reader - Shared interrupt 213"] pub type SPI213_R = crate::BitReader; #[doc = "Field `SPI213` writer - Shared interrupt 213"] -pub type SPI213_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI213_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI214` reader - Shared interrupt 214"] pub type SPI214_R = crate::BitReader; #[doc = "Field `SPI214` writer - Shared interrupt 214"] -pub type SPI214_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI214_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI215` reader - Shared interrupt 215"] pub type SPI215_R = crate::BitReader; #[doc = "Field `SPI215` writer - Shared interrupt 215"] -pub type SPI215_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI215_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI216` reader - Shared interrupt 216"] pub type SPI216_R = crate::BitReader; #[doc = "Field `SPI216` writer - Shared interrupt 216"] -pub type SPI216_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI216_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI217` reader - Shared interrupt 217"] pub type SPI217_R = crate::BitReader; #[doc = "Field `SPI217` writer - Shared interrupt 217"] -pub type SPI217_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI217_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI218` reader - Shared interrupt 218"] pub type SPI218_R = crate::BitReader; #[doc = "Field `SPI218` writer - Shared interrupt 218"] -pub type SPI218_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI218_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI219` reader - Shared interrupt 219"] pub type SPI219_R = crate::BitReader; #[doc = "Field `SPI219` writer - Shared interrupt 219"] -pub type SPI219_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI219_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI220` reader - Shared interrupt 220"] pub type SPI220_R = crate::BitReader; #[doc = "Field `SPI220` writer - Shared interrupt 220"] -pub type SPI220_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI220_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI221` reader - Shared interrupt 221"] pub type SPI221_R = crate::BitReader; #[doc = "Field `SPI221` writer - Shared interrupt 221"] -pub type SPI221_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI221_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI222` reader - Shared interrupt 222"] pub type SPI222_R = crate::BitReader; #[doc = "Field `SPI222` writer - Shared interrupt 222"] -pub type SPI222_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI222_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI223` reader - Shared interrupt 223"] pub type SPI223_R = crate::BitReader; #[doc = "Field `SPI223` writer - Shared interrupt 223"] -pub type SPI223_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI223_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Shared interrupt 192"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Shared interrupt 192"] #[inline(always)] #[must_use] - pub fn spi192(&mut self) -> SPI192_W { - SPI192_W::new(self) + pub fn spi192(&mut self) -> SPI192_W { + SPI192_W::new(self, 0) } #[doc = "Bit 1 - Shared interrupt 193"] #[inline(always)] #[must_use] - pub fn spi193(&mut self) -> SPI193_W { - SPI193_W::new(self) + pub fn spi193(&mut self) -> SPI193_W { + SPI193_W::new(self, 1) } #[doc = "Bit 2 - Shared interrupt 194"] #[inline(always)] #[must_use] - pub fn spi194(&mut self) -> SPI194_W { - SPI194_W::new(self) + pub fn spi194(&mut self) -> SPI194_W { + SPI194_W::new(self, 2) } #[doc = "Bit 3 - Shared interrupt 195"] #[inline(always)] #[must_use] - pub fn spi195(&mut self) -> SPI195_W { - SPI195_W::new(self) + pub fn spi195(&mut self) -> SPI195_W { + SPI195_W::new(self, 3) } #[doc = "Bit 4 - Shared interrupt 196"] #[inline(always)] #[must_use] - pub fn spi196(&mut self) -> SPI196_W { - SPI196_W::new(self) + pub fn spi196(&mut self) -> SPI196_W { + SPI196_W::new(self, 4) } #[doc = "Bit 5 - Shared interrupt 197"] #[inline(always)] #[must_use] - pub fn spi197(&mut self) -> SPI197_W { - SPI197_W::new(self) + pub fn spi197(&mut self) -> SPI197_W { + SPI197_W::new(self, 5) } #[doc = "Bit 6 - Shared interrupt 198"] #[inline(always)] #[must_use] - pub fn spi198(&mut self) -> SPI198_W { - SPI198_W::new(self) + pub fn spi198(&mut self) -> SPI198_W { + SPI198_W::new(self, 6) } #[doc = "Bit 7 - Shared interrupt 199"] #[inline(always)] #[must_use] - pub fn spi199(&mut self) -> SPI199_W { - SPI199_W::new(self) + pub fn spi199(&mut self) -> SPI199_W { + SPI199_W::new(self, 7) } #[doc = "Bit 8 - Shared interrupt 200"] #[inline(always)] #[must_use] - pub fn spi200(&mut self) -> SPI200_W { - SPI200_W::new(self) + pub fn spi200(&mut self) -> SPI200_W { + SPI200_W::new(self, 8) } #[doc = "Bit 9 - Shared interrupt 201"] #[inline(always)] #[must_use] - pub fn spi201(&mut self) -> SPI201_W { - SPI201_W::new(self) + pub fn spi201(&mut self) -> SPI201_W { + SPI201_W::new(self, 9) } #[doc = "Bit 10 - Shared interrupt 202"] #[inline(always)] #[must_use] - pub fn spi202(&mut self) -> SPI202_W { - SPI202_W::new(self) + pub fn spi202(&mut self) -> SPI202_W { + SPI202_W::new(self, 10) } #[doc = "Bit 11 - Shared interrupt 203"] #[inline(always)] #[must_use] - pub fn spi203(&mut self) -> SPI203_W { - SPI203_W::new(self) + pub fn spi203(&mut self) -> SPI203_W { + SPI203_W::new(self, 11) } #[doc = "Bit 12 - Shared interrupt 204"] #[inline(always)] #[must_use] - pub fn spi204(&mut self) -> SPI204_W { - SPI204_W::new(self) + pub fn spi204(&mut self) -> SPI204_W { + SPI204_W::new(self, 12) } #[doc = "Bit 13 - Shared interrupt 205"] #[inline(always)] #[must_use] - pub fn spi205(&mut self) -> SPI205_W { - SPI205_W::new(self) + pub fn spi205(&mut self) -> SPI205_W { + SPI205_W::new(self, 13) } #[doc = "Bit 14 - Shared interrupt 206"] #[inline(always)] #[must_use] - pub fn spi206(&mut self) -> SPI206_W { - SPI206_W::new(self) + pub fn spi206(&mut self) -> SPI206_W { + SPI206_W::new(self, 14) } #[doc = "Bit 15 - Shared interrupt 207"] #[inline(always)] #[must_use] - pub fn spi207(&mut self) -> SPI207_W { - SPI207_W::new(self) + pub fn spi207(&mut self) -> SPI207_W { + SPI207_W::new(self, 15) } #[doc = "Bit 16 - Shared interrupt 208"] #[inline(always)] #[must_use] - pub fn spi208(&mut self) -> SPI208_W { - SPI208_W::new(self) + pub fn spi208(&mut self) -> SPI208_W { + SPI208_W::new(self, 16) } #[doc = "Bit 17 - Shared interrupt 209"] #[inline(always)] #[must_use] - pub fn spi209(&mut self) -> SPI209_W { - SPI209_W::new(self) + pub fn spi209(&mut self) -> SPI209_W { + SPI209_W::new(self, 17) } #[doc = "Bit 18 - Shared interrupt 210"] #[inline(always)] #[must_use] - pub fn spi210(&mut self) -> SPI210_W { - SPI210_W::new(self) + pub fn spi210(&mut self) -> SPI210_W { + SPI210_W::new(self, 18) } #[doc = "Bit 19 - Shared interrupt 211"] #[inline(always)] #[must_use] - pub fn spi211(&mut self) -> SPI211_W { - SPI211_W::new(self) + pub fn spi211(&mut self) -> SPI211_W { + SPI211_W::new(self, 19) } #[doc = "Bit 20 - Shared interrupt 212"] #[inline(always)] #[must_use] - pub fn spi212(&mut self) -> SPI212_W { - SPI212_W::new(self) + pub fn spi212(&mut self) -> SPI212_W { + SPI212_W::new(self, 20) } #[doc = "Bit 21 - Shared interrupt 213"] #[inline(always)] #[must_use] - pub fn spi213(&mut self) -> SPI213_W { - SPI213_W::new(self) + pub fn spi213(&mut self) -> SPI213_W { + SPI213_W::new(self, 21) } #[doc = "Bit 22 - Shared interrupt 214"] #[inline(always)] #[must_use] - pub fn spi214(&mut self) -> SPI214_W { - SPI214_W::new(self) + pub fn spi214(&mut self) -> SPI214_W { + SPI214_W::new(self, 22) } #[doc = "Bit 23 - Shared interrupt 215"] #[inline(always)] #[must_use] - pub fn spi215(&mut self) -> SPI215_W { - SPI215_W::new(self) + pub fn spi215(&mut self) -> SPI215_W { + SPI215_W::new(self, 23) } #[doc = "Bit 24 - Shared interrupt 216"] #[inline(always)] #[must_use] - pub fn spi216(&mut self) -> SPI216_W { - SPI216_W::new(self) + pub fn spi216(&mut self) -> SPI216_W { + SPI216_W::new(self, 24) } #[doc = "Bit 25 - Shared interrupt 217"] #[inline(always)] #[must_use] - pub fn spi217(&mut self) -> SPI217_W { - SPI217_W::new(self) + pub fn spi217(&mut self) -> SPI217_W { + SPI217_W::new(self, 25) } #[doc = "Bit 26 - Shared interrupt 218"] #[inline(always)] #[must_use] - pub fn spi218(&mut self) -> SPI218_W { - SPI218_W::new(self) + pub fn spi218(&mut self) -> SPI218_W { + SPI218_W::new(self, 26) } #[doc = "Bit 27 - Shared interrupt 219"] #[inline(always)] #[must_use] - pub fn spi219(&mut self) -> SPI219_W { - SPI219_W::new(self) + pub fn spi219(&mut self) -> SPI219_W { + SPI219_W::new(self, 27) } #[doc = "Bit 28 - Shared interrupt 220"] #[inline(always)] #[must_use] - pub fn spi220(&mut self) -> SPI220_W { - SPI220_W::new(self) + pub fn spi220(&mut self) -> SPI220_W { + SPI220_W::new(self, 28) } #[doc = "Bit 29 - Shared interrupt 221"] #[inline(always)] #[must_use] - pub fn spi221(&mut self) -> SPI221_W { - SPI221_W::new(self) + pub fn spi221(&mut self) -> SPI221_W { + SPI221_W::new(self, 29) } #[doc = "Bit 30 - Shared interrupt 222"] #[inline(always)] #[must_use] - pub fn spi222(&mut self) -> SPI222_W { - SPI222_W::new(self) + pub fn spi222(&mut self) -> SPI222_W { + SPI222_W::new(self, 30) } #[doc = "Bit 31 - Shared interrupt 223"] #[inline(always)] #[must_use] - pub fn spi223(&mut self) -> SPI223_W { - SPI223_W::new(self) + pub fn spi223(&mut self) -> SPI223_W { + SPI223_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gic_dist/gicd_typer.rs b/crates/bcm2711-lpa/src/gic_dist/gicd_typer.rs index ecbf265..0511780 100644 --- a/crates/bcm2711-lpa/src/gic_dist/gicd_typer.rs +++ b/crates/bcm2711-lpa/src/gic_dist/gicd_typer.rs @@ -48,7 +48,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Interrupt Controller Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gicd_typer::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gpio.rs b/crates/bcm2711-lpa/src/gpio.rs index 270dc41..9526818 100644 --- a/crates/bcm2711-lpa/src/gpio.rs +++ b/crates/bcm2711-lpa/src/gpio.rs @@ -2,80 +2,206 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + gpfsel0: GPFSEL0, + gpfsel1: GPFSEL1, + gpfsel2: GPFSEL2, + gpfsel3: GPFSEL3, + gpfsel4: GPFSEL4, + gpfsel5: GPFSEL5, + _reserved6: [u8; 0x04], + gpset0: GPSET0, + gpset1: GPSET1, + _reserved8: [u8; 0x04], + gpclr0: GPCLR0, + gpclr1: GPCLR1, + _reserved10: [u8; 0x04], + gplev0: GPLEV0, + gplev1: GPLEV1, + _reserved12: [u8; 0x04], + gpeds0: GPEDS0, + gpeds1: GPEDS1, + _reserved14: [u8; 0x04], + gpren0: GPREN0, + gpren1: GPREN1, + _reserved16: [u8; 0x04], + gpfen0: GPFEN0, + gpfen1: GPFEN1, + _reserved18: [u8; 0x04], + gphen0: GPHEN0, + gphen1: GPHEN1, + _reserved20: [u8; 0x04], + gplen0: GPLEN0, + gplen1: GPLEN1, + _reserved22: [u8; 0x04], + gparen0: GPAREN0, + gparen1: GPAREN1, + _reserved24: [u8; 0x04], + gpafen0: GPAFEN0, + gpafen1: GPAFEN1, + _reserved26: [u8; 0x40], + extra_mux: EXTRA_MUX, + _reserved27: [u8; 0x10], + gpio_pup_pdn_cntrl_reg0: GPIO_PUP_PDN_CNTRL_REG0, + gpio_pup_pdn_cntrl_reg1: GPIO_PUP_PDN_CNTRL_REG1, + gpio_pup_pdn_cntrl_reg2: GPIO_PUP_PDN_CNTRL_REG2, + gpio_pup_pdn_cntrl_reg3: GPIO_PUP_PDN_CNTRL_REG3, +} +impl RegisterBlock { #[doc = "0x00 - GPIO Function Select 0"] - pub gpfsel0: GPFSEL0, + #[inline(always)] + pub const fn gpfsel0(&self) -> &GPFSEL0 { + &self.gpfsel0 + } #[doc = "0x04 - GPIO Function Select 1"] - pub gpfsel1: GPFSEL1, + #[inline(always)] + pub const fn gpfsel1(&self) -> &GPFSEL1 { + &self.gpfsel1 + } #[doc = "0x08 - GPIO Function Select 2"] - pub gpfsel2: GPFSEL2, + #[inline(always)] + pub const fn gpfsel2(&self) -> &GPFSEL2 { + &self.gpfsel2 + } #[doc = "0x0c - GPIO Function Select 3"] - pub gpfsel3: GPFSEL3, + #[inline(always)] + pub const fn gpfsel3(&self) -> &GPFSEL3 { + &self.gpfsel3 + } #[doc = "0x10 - GPIO Function Select 4"] - pub gpfsel4: GPFSEL4, + #[inline(always)] + pub const fn gpfsel4(&self) -> &GPFSEL4 { + &self.gpfsel4 + } #[doc = "0x14 - GPIO Function Select 5"] - pub gpfsel5: GPFSEL5, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn gpfsel5(&self) -> &GPFSEL5 { + &self.gpfsel5 + } #[doc = "0x1c - GPIO Pin Output Set 0"] - pub gpset0: GPSET0, + #[inline(always)] + pub const fn gpset0(&self) -> &GPSET0 { + &self.gpset0 + } #[doc = "0x20 - GPIO Pin Output Set 1"] - pub gpset1: GPSET1, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn gpset1(&self) -> &GPSET1 { + &self.gpset1 + } #[doc = "0x28 - GPIO Pin Output Clear 0"] - pub gpclr0: GPCLR0, + #[inline(always)] + pub const fn gpclr0(&self) -> &GPCLR0 { + &self.gpclr0 + } #[doc = "0x2c - GPIO Pin Output Clear 1"] - pub gpclr1: GPCLR1, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn gpclr1(&self) -> &GPCLR1 { + &self.gpclr1 + } #[doc = "0x34 - GPIO Pin Level 0"] - pub gplev0: GPLEV0, + #[inline(always)] + pub const fn gplev0(&self) -> &GPLEV0 { + &self.gplev0 + } #[doc = "0x38 - GPIO Pin Level 1"] - pub gplev1: GPLEV1, - _reserved12: [u8; 0x04], + #[inline(always)] + pub const fn gplev1(&self) -> &GPLEV1 { + &self.gplev1 + } #[doc = "0x40 - GPIO Pin Event Detect Status 0"] - pub gpeds0: GPEDS0, + #[inline(always)] + pub const fn gpeds0(&self) -> &GPEDS0 { + &self.gpeds0 + } #[doc = "0x44 - GPIO Pin Event Detect Status 1"] - pub gpeds1: GPEDS1, - _reserved14: [u8; 0x04], + #[inline(always)] + pub const fn gpeds1(&self) -> &GPEDS1 { + &self.gpeds1 + } #[doc = "0x4c - GPIO Pin Rising Edge Detect Enable 0"] - pub gpren0: GPREN0, + #[inline(always)] + pub const fn gpren0(&self) -> &GPREN0 { + &self.gpren0 + } #[doc = "0x50 - GPIO Pin Rising Edge Detect Enable 1"] - pub gpren1: GPREN1, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn gpren1(&self) -> &GPREN1 { + &self.gpren1 + } #[doc = "0x58 - GPIO Pin Falling Edge Detect Enable 0"] - pub gpfen0: GPFEN0, + #[inline(always)] + pub const fn gpfen0(&self) -> &GPFEN0 { + &self.gpfen0 + } #[doc = "0x5c - GPIO Pin Falling Edge Detect Enable 1"] - pub gpfen1: GPFEN1, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn gpfen1(&self) -> &GPFEN1 { + &self.gpfen1 + } #[doc = "0x64 - GPIO Pin High Detect Enable 0"] - pub gphen0: GPHEN0, + #[inline(always)] + pub const fn gphen0(&self) -> &GPHEN0 { + &self.gphen0 + } #[doc = "0x68 - GPIO Pin High Detect Enable 1"] - pub gphen1: GPHEN1, - _reserved20: [u8; 0x04], + #[inline(always)] + pub const fn gphen1(&self) -> &GPHEN1 { + &self.gphen1 + } #[doc = "0x70 - GPIO Pin Low Detect Enable 0"] - pub gplen0: GPLEN0, + #[inline(always)] + pub const fn gplen0(&self) -> &GPLEN0 { + &self.gplen0 + } #[doc = "0x74 - GPIO Pin Low Detect Enable 1"] - pub gplen1: GPLEN1, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn gplen1(&self) -> &GPLEN1 { + &self.gplen1 + } #[doc = "0x7c - GPIO Pin Async. Rising Edge Detect 0"] - pub gparen0: GPAREN0, + #[inline(always)] + pub const fn gparen0(&self) -> &GPAREN0 { + &self.gparen0 + } #[doc = "0x80 - GPIO Pin Async. Rising Edge Detect 1"] - pub gparen1: GPAREN1, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn gparen1(&self) -> &GPAREN1 { + &self.gparen1 + } #[doc = "0x88 - GPIO Pin Async. Falling Edge Detect 0"] - pub gpafen0: GPAFEN0, + #[inline(always)] + pub const fn gpafen0(&self) -> &GPAFEN0 { + &self.gpafen0 + } #[doc = "0x8c - GPIO Pin Async. Falling Edge Detect 1"] - pub gpafen1: GPAFEN1, - _reserved26: [u8; 0x40], + #[inline(always)] + pub const fn gpafen1(&self) -> &GPAFEN1 { + &self.gpafen1 + } #[doc = "0xd0 - Undocumented multiplexing bits"] - pub extra_mux: EXTRA_MUX, - _reserved27: [u8; 0x10], + #[inline(always)] + pub const fn extra_mux(&self) -> &EXTRA_MUX { + &self.extra_mux + } #[doc = "0xe4 - GPIO Pull-up / Pull-down Register 0"] - pub gpio_pup_pdn_cntrl_reg0: GPIO_PUP_PDN_CNTRL_REG0, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg0(&self) -> &GPIO_PUP_PDN_CNTRL_REG0 { + &self.gpio_pup_pdn_cntrl_reg0 + } #[doc = "0xe8 - GPIO Pull-up / Pull-down Register 1"] - pub gpio_pup_pdn_cntrl_reg1: GPIO_PUP_PDN_CNTRL_REG1, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg1(&self) -> &GPIO_PUP_PDN_CNTRL_REG1 { + &self.gpio_pup_pdn_cntrl_reg1 + } #[doc = "0xec - GPIO Pull-up / Pull-down Register 2"] - pub gpio_pup_pdn_cntrl_reg2: GPIO_PUP_PDN_CNTRL_REG2, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg2(&self) -> &GPIO_PUP_PDN_CNTRL_REG2 { + &self.gpio_pup_pdn_cntrl_reg2 + } #[doc = "0xf0 - GPIO Pull-up / Pull-down Register 3"] - pub gpio_pup_pdn_cntrl_reg3: GPIO_PUP_PDN_CNTRL_REG3, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg3(&self) -> &GPIO_PUP_PDN_CNTRL_REG3 { + &self.gpio_pup_pdn_cntrl_reg3 + } } #[doc = "GPFSEL0 (rw) register accessor: GPIO Function Select 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpfsel0::R`]. You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpfsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpfsel0`] module"] diff --git a/crates/bcm2711-lpa/src/gpio/extra_mux.rs b/crates/bcm2711-lpa/src/gpio/extra_mux.rs index bac06d5..f5c8939 100644 --- a/crates/bcm2711-lpa/src/gpio/extra_mux.rs +++ b/crates/bcm2711-lpa/src/gpio/extra_mux.rs @@ -39,8 +39,8 @@ impl SDIO_R { } } #[doc = "Field `SDIO` writer - Switch peripheral connection to undocumented SDIO pins used on Pi 4"] -pub type SDIO_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SDIO_A>; -impl<'a, REG, const O: u8> SDIO_W<'a, REG, O> +pub type SDIO_W<'a, REG> = crate::BitWriter<'a, REG, SDIO_A>; +impl<'a, REG> SDIO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -71,15 +71,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Switch peripheral connection to undocumented SDIO pins used on Pi 4"] #[inline(always)] #[must_use] - pub fn sdio(&mut self) -> SDIO_W { - SDIO_W::new(self) + pub fn sdio(&mut self) -> SDIO_W { + SDIO_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpafen0.rs b/crates/bcm2711-lpa/src/gpio/gpafen0.rs index 44bf785..539e1b8 100644 --- a/crates/bcm2711-lpa/src/gpio/gpafen0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpafen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `AFEN0` reader - Async falling enabled 0"] pub type AFEN0_R = crate::BitReader; #[doc = "Field `AFEN0` writer - Async falling enabled 0"] -pub type AFEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN1` reader - Async falling enabled 1"] pub type AFEN1_R = crate::BitReader; #[doc = "Field `AFEN1` writer - Async falling enabled 1"] -pub type AFEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN2` reader - Async falling enabled 2"] pub type AFEN2_R = crate::BitReader; #[doc = "Field `AFEN2` writer - Async falling enabled 2"] -pub type AFEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN3` reader - Async falling enabled 3"] pub type AFEN3_R = crate::BitReader; #[doc = "Field `AFEN3` writer - Async falling enabled 3"] -pub type AFEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN4` reader - Async falling enabled 4"] pub type AFEN4_R = crate::BitReader; #[doc = "Field `AFEN4` writer - Async falling enabled 4"] -pub type AFEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN5` reader - Async falling enabled 5"] pub type AFEN5_R = crate::BitReader; #[doc = "Field `AFEN5` writer - Async falling enabled 5"] -pub type AFEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN6` reader - Async falling enabled 6"] pub type AFEN6_R = crate::BitReader; #[doc = "Field `AFEN6` writer - Async falling enabled 6"] -pub type AFEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN7` reader - Async falling enabled 7"] pub type AFEN7_R = crate::BitReader; #[doc = "Field `AFEN7` writer - Async falling enabled 7"] -pub type AFEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN8` reader - Async falling enabled 8"] pub type AFEN8_R = crate::BitReader; #[doc = "Field `AFEN8` writer - Async falling enabled 8"] -pub type AFEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN9` reader - Async falling enabled 9"] pub type AFEN9_R = crate::BitReader; #[doc = "Field `AFEN9` writer - Async falling enabled 9"] -pub type AFEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN10` reader - Async falling enabled 10"] pub type AFEN10_R = crate::BitReader; #[doc = "Field `AFEN10` writer - Async falling enabled 10"] -pub type AFEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN11` reader - Async falling enabled 11"] pub type AFEN11_R = crate::BitReader; #[doc = "Field `AFEN11` writer - Async falling enabled 11"] -pub type AFEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN12` reader - Async falling enabled 12"] pub type AFEN12_R = crate::BitReader; #[doc = "Field `AFEN12` writer - Async falling enabled 12"] -pub type AFEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN13` reader - Async falling enabled 13"] pub type AFEN13_R = crate::BitReader; #[doc = "Field `AFEN13` writer - Async falling enabled 13"] -pub type AFEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN14` reader - Async falling enabled 14"] pub type AFEN14_R = crate::BitReader; #[doc = "Field `AFEN14` writer - Async falling enabled 14"] -pub type AFEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN15` reader - Async falling enabled 15"] pub type AFEN15_R = crate::BitReader; #[doc = "Field `AFEN15` writer - Async falling enabled 15"] -pub type AFEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN16` reader - Async falling enabled 16"] pub type AFEN16_R = crate::BitReader; #[doc = "Field `AFEN16` writer - Async falling enabled 16"] -pub type AFEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN17` reader - Async falling enabled 17"] pub type AFEN17_R = crate::BitReader; #[doc = "Field `AFEN17` writer - Async falling enabled 17"] -pub type AFEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN18` reader - Async falling enabled 18"] pub type AFEN18_R = crate::BitReader; #[doc = "Field `AFEN18` writer - Async falling enabled 18"] -pub type AFEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN19` reader - Async falling enabled 19"] pub type AFEN19_R = crate::BitReader; #[doc = "Field `AFEN19` writer - Async falling enabled 19"] -pub type AFEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN20` reader - Async falling enabled 20"] pub type AFEN20_R = crate::BitReader; #[doc = "Field `AFEN20` writer - Async falling enabled 20"] -pub type AFEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN21` reader - Async falling enabled 21"] pub type AFEN21_R = crate::BitReader; #[doc = "Field `AFEN21` writer - Async falling enabled 21"] -pub type AFEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN22` reader - Async falling enabled 22"] pub type AFEN22_R = crate::BitReader; #[doc = "Field `AFEN22` writer - Async falling enabled 22"] -pub type AFEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN23` reader - Async falling enabled 23"] pub type AFEN23_R = crate::BitReader; #[doc = "Field `AFEN23` writer - Async falling enabled 23"] -pub type AFEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN24` reader - Async falling enabled 24"] pub type AFEN24_R = crate::BitReader; #[doc = "Field `AFEN24` writer - Async falling enabled 24"] -pub type AFEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN25` reader - Async falling enabled 25"] pub type AFEN25_R = crate::BitReader; #[doc = "Field `AFEN25` writer - Async falling enabled 25"] -pub type AFEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN26` reader - Async falling enabled 26"] pub type AFEN26_R = crate::BitReader; #[doc = "Field `AFEN26` writer - Async falling enabled 26"] -pub type AFEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN27` reader - Async falling enabled 27"] pub type AFEN27_R = crate::BitReader; #[doc = "Field `AFEN27` writer - Async falling enabled 27"] -pub type AFEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN28` reader - Async falling enabled 28"] pub type AFEN28_R = crate::BitReader; #[doc = "Field `AFEN28` writer - Async falling enabled 28"] -pub type AFEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN29` reader - Async falling enabled 29"] pub type AFEN29_R = crate::BitReader; #[doc = "Field `AFEN29` writer - Async falling enabled 29"] -pub type AFEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN30` reader - Async falling enabled 30"] pub type AFEN30_R = crate::BitReader; #[doc = "Field `AFEN30` writer - Async falling enabled 30"] -pub type AFEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN31` reader - Async falling enabled 31"] pub type AFEN31_R = crate::BitReader; #[doc = "Field `AFEN31` writer - Async falling enabled 31"] -pub type AFEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async falling enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async falling enabled 0"] #[inline(always)] #[must_use] - pub fn afen0(&mut self) -> AFEN0_W { - AFEN0_W::new(self) + pub fn afen0(&mut self) -> AFEN0_W { + AFEN0_W::new(self, 0) } #[doc = "Bit 1 - Async falling enabled 1"] #[inline(always)] #[must_use] - pub fn afen1(&mut self) -> AFEN1_W { - AFEN1_W::new(self) + pub fn afen1(&mut self) -> AFEN1_W { + AFEN1_W::new(self, 1) } #[doc = "Bit 2 - Async falling enabled 2"] #[inline(always)] #[must_use] - pub fn afen2(&mut self) -> AFEN2_W { - AFEN2_W::new(self) + pub fn afen2(&mut self) -> AFEN2_W { + AFEN2_W::new(self, 2) } #[doc = "Bit 3 - Async falling enabled 3"] #[inline(always)] #[must_use] - pub fn afen3(&mut self) -> AFEN3_W { - AFEN3_W::new(self) + pub fn afen3(&mut self) -> AFEN3_W { + AFEN3_W::new(self, 3) } #[doc = "Bit 4 - Async falling enabled 4"] #[inline(always)] #[must_use] - pub fn afen4(&mut self) -> AFEN4_W { - AFEN4_W::new(self) + pub fn afen4(&mut self) -> AFEN4_W { + AFEN4_W::new(self, 4) } #[doc = "Bit 5 - Async falling enabled 5"] #[inline(always)] #[must_use] - pub fn afen5(&mut self) -> AFEN5_W { - AFEN5_W::new(self) + pub fn afen5(&mut self) -> AFEN5_W { + AFEN5_W::new(self, 5) } #[doc = "Bit 6 - Async falling enabled 6"] #[inline(always)] #[must_use] - pub fn afen6(&mut self) -> AFEN6_W { - AFEN6_W::new(self) + pub fn afen6(&mut self) -> AFEN6_W { + AFEN6_W::new(self, 6) } #[doc = "Bit 7 - Async falling enabled 7"] #[inline(always)] #[must_use] - pub fn afen7(&mut self) -> AFEN7_W { - AFEN7_W::new(self) + pub fn afen7(&mut self) -> AFEN7_W { + AFEN7_W::new(self, 7) } #[doc = "Bit 8 - Async falling enabled 8"] #[inline(always)] #[must_use] - pub fn afen8(&mut self) -> AFEN8_W { - AFEN8_W::new(self) + pub fn afen8(&mut self) -> AFEN8_W { + AFEN8_W::new(self, 8) } #[doc = "Bit 9 - Async falling enabled 9"] #[inline(always)] #[must_use] - pub fn afen9(&mut self) -> AFEN9_W { - AFEN9_W::new(self) + pub fn afen9(&mut self) -> AFEN9_W { + AFEN9_W::new(self, 9) } #[doc = "Bit 10 - Async falling enabled 10"] #[inline(always)] #[must_use] - pub fn afen10(&mut self) -> AFEN10_W { - AFEN10_W::new(self) + pub fn afen10(&mut self) -> AFEN10_W { + AFEN10_W::new(self, 10) } #[doc = "Bit 11 - Async falling enabled 11"] #[inline(always)] #[must_use] - pub fn afen11(&mut self) -> AFEN11_W { - AFEN11_W::new(self) + pub fn afen11(&mut self) -> AFEN11_W { + AFEN11_W::new(self, 11) } #[doc = "Bit 12 - Async falling enabled 12"] #[inline(always)] #[must_use] - pub fn afen12(&mut self) -> AFEN12_W { - AFEN12_W::new(self) + pub fn afen12(&mut self) -> AFEN12_W { + AFEN12_W::new(self, 12) } #[doc = "Bit 13 - Async falling enabled 13"] #[inline(always)] #[must_use] - pub fn afen13(&mut self) -> AFEN13_W { - AFEN13_W::new(self) + pub fn afen13(&mut self) -> AFEN13_W { + AFEN13_W::new(self, 13) } #[doc = "Bit 14 - Async falling enabled 14"] #[inline(always)] #[must_use] - pub fn afen14(&mut self) -> AFEN14_W { - AFEN14_W::new(self) + pub fn afen14(&mut self) -> AFEN14_W { + AFEN14_W::new(self, 14) } #[doc = "Bit 15 - Async falling enabled 15"] #[inline(always)] #[must_use] - pub fn afen15(&mut self) -> AFEN15_W { - AFEN15_W::new(self) + pub fn afen15(&mut self) -> AFEN15_W { + AFEN15_W::new(self, 15) } #[doc = "Bit 16 - Async falling enabled 16"] #[inline(always)] #[must_use] - pub fn afen16(&mut self) -> AFEN16_W { - AFEN16_W::new(self) + pub fn afen16(&mut self) -> AFEN16_W { + AFEN16_W::new(self, 16) } #[doc = "Bit 17 - Async falling enabled 17"] #[inline(always)] #[must_use] - pub fn afen17(&mut self) -> AFEN17_W { - AFEN17_W::new(self) + pub fn afen17(&mut self) -> AFEN17_W { + AFEN17_W::new(self, 17) } #[doc = "Bit 18 - Async falling enabled 18"] #[inline(always)] #[must_use] - pub fn afen18(&mut self) -> AFEN18_W { - AFEN18_W::new(self) + pub fn afen18(&mut self) -> AFEN18_W { + AFEN18_W::new(self, 18) } #[doc = "Bit 19 - Async falling enabled 19"] #[inline(always)] #[must_use] - pub fn afen19(&mut self) -> AFEN19_W { - AFEN19_W::new(self) + pub fn afen19(&mut self) -> AFEN19_W { + AFEN19_W::new(self, 19) } #[doc = "Bit 20 - Async falling enabled 20"] #[inline(always)] #[must_use] - pub fn afen20(&mut self) -> AFEN20_W { - AFEN20_W::new(self) + pub fn afen20(&mut self) -> AFEN20_W { + AFEN20_W::new(self, 20) } #[doc = "Bit 21 - Async falling enabled 21"] #[inline(always)] #[must_use] - pub fn afen21(&mut self) -> AFEN21_W { - AFEN21_W::new(self) + pub fn afen21(&mut self) -> AFEN21_W { + AFEN21_W::new(self, 21) } #[doc = "Bit 22 - Async falling enabled 22"] #[inline(always)] #[must_use] - pub fn afen22(&mut self) -> AFEN22_W { - AFEN22_W::new(self) + pub fn afen22(&mut self) -> AFEN22_W { + AFEN22_W::new(self, 22) } #[doc = "Bit 23 - Async falling enabled 23"] #[inline(always)] #[must_use] - pub fn afen23(&mut self) -> AFEN23_W { - AFEN23_W::new(self) + pub fn afen23(&mut self) -> AFEN23_W { + AFEN23_W::new(self, 23) } #[doc = "Bit 24 - Async falling enabled 24"] #[inline(always)] #[must_use] - pub fn afen24(&mut self) -> AFEN24_W { - AFEN24_W::new(self) + pub fn afen24(&mut self) -> AFEN24_W { + AFEN24_W::new(self, 24) } #[doc = "Bit 25 - Async falling enabled 25"] #[inline(always)] #[must_use] - pub fn afen25(&mut self) -> AFEN25_W { - AFEN25_W::new(self) + pub fn afen25(&mut self) -> AFEN25_W { + AFEN25_W::new(self, 25) } #[doc = "Bit 26 - Async falling enabled 26"] #[inline(always)] #[must_use] - pub fn afen26(&mut self) -> AFEN26_W { - AFEN26_W::new(self) + pub fn afen26(&mut self) -> AFEN26_W { + AFEN26_W::new(self, 26) } #[doc = "Bit 27 - Async falling enabled 27"] #[inline(always)] #[must_use] - pub fn afen27(&mut self) -> AFEN27_W { - AFEN27_W::new(self) + pub fn afen27(&mut self) -> AFEN27_W { + AFEN27_W::new(self, 27) } #[doc = "Bit 28 - Async falling enabled 28"] #[inline(always)] #[must_use] - pub fn afen28(&mut self) -> AFEN28_W { - AFEN28_W::new(self) + pub fn afen28(&mut self) -> AFEN28_W { + AFEN28_W::new(self, 28) } #[doc = "Bit 29 - Async falling enabled 29"] #[inline(always)] #[must_use] - pub fn afen29(&mut self) -> AFEN29_W { - AFEN29_W::new(self) + pub fn afen29(&mut self) -> AFEN29_W { + AFEN29_W::new(self, 29) } #[doc = "Bit 30 - Async falling enabled 30"] #[inline(always)] #[must_use] - pub fn afen30(&mut self) -> AFEN30_W { - AFEN30_W::new(self) + pub fn afen30(&mut self) -> AFEN30_W { + AFEN30_W::new(self, 30) } #[doc = "Bit 31 - Async falling enabled 31"] #[inline(always)] #[must_use] - pub fn afen31(&mut self) -> AFEN31_W { - AFEN31_W::new(self) + pub fn afen31(&mut self) -> AFEN31_W { + AFEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpafen1.rs b/crates/bcm2711-lpa/src/gpio/gpafen1.rs index 5c3b732..762f994 100644 --- a/crates/bcm2711-lpa/src/gpio/gpafen1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpafen1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `AFEN32` reader - Async falling enabled 32"] pub type AFEN32_R = crate::BitReader; #[doc = "Field `AFEN32` writer - Async falling enabled 32"] -pub type AFEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN33` reader - Async falling enabled 33"] pub type AFEN33_R = crate::BitReader; #[doc = "Field `AFEN33` writer - Async falling enabled 33"] -pub type AFEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN34` reader - Async falling enabled 34"] pub type AFEN34_R = crate::BitReader; #[doc = "Field `AFEN34` writer - Async falling enabled 34"] -pub type AFEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN35` reader - Async falling enabled 35"] pub type AFEN35_R = crate::BitReader; #[doc = "Field `AFEN35` writer - Async falling enabled 35"] -pub type AFEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN36` reader - Async falling enabled 36"] pub type AFEN36_R = crate::BitReader; #[doc = "Field `AFEN36` writer - Async falling enabled 36"] -pub type AFEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN37` reader - Async falling enabled 37"] pub type AFEN37_R = crate::BitReader; #[doc = "Field `AFEN37` writer - Async falling enabled 37"] -pub type AFEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN38` reader - Async falling enabled 38"] pub type AFEN38_R = crate::BitReader; #[doc = "Field `AFEN38` writer - Async falling enabled 38"] -pub type AFEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN39` reader - Async falling enabled 39"] pub type AFEN39_R = crate::BitReader; #[doc = "Field `AFEN39` writer - Async falling enabled 39"] -pub type AFEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN40` reader - Async falling enabled 40"] pub type AFEN40_R = crate::BitReader; #[doc = "Field `AFEN40` writer - Async falling enabled 40"] -pub type AFEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN41` reader - Async falling enabled 41"] pub type AFEN41_R = crate::BitReader; #[doc = "Field `AFEN41` writer - Async falling enabled 41"] -pub type AFEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN42` reader - Async falling enabled 42"] pub type AFEN42_R = crate::BitReader; #[doc = "Field `AFEN42` writer - Async falling enabled 42"] -pub type AFEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN43` reader - Async falling enabled 43"] pub type AFEN43_R = crate::BitReader; #[doc = "Field `AFEN43` writer - Async falling enabled 43"] -pub type AFEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN44` reader - Async falling enabled 44"] pub type AFEN44_R = crate::BitReader; #[doc = "Field `AFEN44` writer - Async falling enabled 44"] -pub type AFEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN45` reader - Async falling enabled 45"] pub type AFEN45_R = crate::BitReader; #[doc = "Field `AFEN45` writer - Async falling enabled 45"] -pub type AFEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN46` reader - Async falling enabled 46"] pub type AFEN46_R = crate::BitReader; #[doc = "Field `AFEN46` writer - Async falling enabled 46"] -pub type AFEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN47` reader - Async falling enabled 47"] pub type AFEN47_R = crate::BitReader; #[doc = "Field `AFEN47` writer - Async falling enabled 47"] -pub type AFEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN48` reader - Async falling enabled 48"] pub type AFEN48_R = crate::BitReader; #[doc = "Field `AFEN48` writer - Async falling enabled 48"] -pub type AFEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN49` reader - Async falling enabled 49"] pub type AFEN49_R = crate::BitReader; #[doc = "Field `AFEN49` writer - Async falling enabled 49"] -pub type AFEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN50` reader - Async falling enabled 50"] pub type AFEN50_R = crate::BitReader; #[doc = "Field `AFEN50` writer - Async falling enabled 50"] -pub type AFEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN51` reader - Async falling enabled 51"] pub type AFEN51_R = crate::BitReader; #[doc = "Field `AFEN51` writer - Async falling enabled 51"] -pub type AFEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN52` reader - Async falling enabled 52"] pub type AFEN52_R = crate::BitReader; #[doc = "Field `AFEN52` writer - Async falling enabled 52"] -pub type AFEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN53` reader - Async falling enabled 53"] pub type AFEN53_R = crate::BitReader; #[doc = "Field `AFEN53` writer - Async falling enabled 53"] -pub type AFEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN54` reader - Async falling enabled 54"] pub type AFEN54_R = crate::BitReader; #[doc = "Field `AFEN54` writer - Async falling enabled 54"] -pub type AFEN54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN55` reader - Async falling enabled 55"] pub type AFEN55_R = crate::BitReader; #[doc = "Field `AFEN55` writer - Async falling enabled 55"] -pub type AFEN55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN56` reader - Async falling enabled 56"] pub type AFEN56_R = crate::BitReader; #[doc = "Field `AFEN56` writer - Async falling enabled 56"] -pub type AFEN56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN57` reader - Async falling enabled 57"] pub type AFEN57_R = crate::BitReader; #[doc = "Field `AFEN57` writer - Async falling enabled 57"] -pub type AFEN57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN57_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async falling enabled 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async falling enabled 32"] #[inline(always)] #[must_use] - pub fn afen32(&mut self) -> AFEN32_W { - AFEN32_W::new(self) + pub fn afen32(&mut self) -> AFEN32_W { + AFEN32_W::new(self, 0) } #[doc = "Bit 1 - Async falling enabled 33"] #[inline(always)] #[must_use] - pub fn afen33(&mut self) -> AFEN33_W { - AFEN33_W::new(self) + pub fn afen33(&mut self) -> AFEN33_W { + AFEN33_W::new(self, 1) } #[doc = "Bit 2 - Async falling enabled 34"] #[inline(always)] #[must_use] - pub fn afen34(&mut self) -> AFEN34_W { - AFEN34_W::new(self) + pub fn afen34(&mut self) -> AFEN34_W { + AFEN34_W::new(self, 2) } #[doc = "Bit 3 - Async falling enabled 35"] #[inline(always)] #[must_use] - pub fn afen35(&mut self) -> AFEN35_W { - AFEN35_W::new(self) + pub fn afen35(&mut self) -> AFEN35_W { + AFEN35_W::new(self, 3) } #[doc = "Bit 4 - Async falling enabled 36"] #[inline(always)] #[must_use] - pub fn afen36(&mut self) -> AFEN36_W { - AFEN36_W::new(self) + pub fn afen36(&mut self) -> AFEN36_W { + AFEN36_W::new(self, 4) } #[doc = "Bit 5 - Async falling enabled 37"] #[inline(always)] #[must_use] - pub fn afen37(&mut self) -> AFEN37_W { - AFEN37_W::new(self) + pub fn afen37(&mut self) -> AFEN37_W { + AFEN37_W::new(self, 5) } #[doc = "Bit 6 - Async falling enabled 38"] #[inline(always)] #[must_use] - pub fn afen38(&mut self) -> AFEN38_W { - AFEN38_W::new(self) + pub fn afen38(&mut self) -> AFEN38_W { + AFEN38_W::new(self, 6) } #[doc = "Bit 7 - Async falling enabled 39"] #[inline(always)] #[must_use] - pub fn afen39(&mut self) -> AFEN39_W { - AFEN39_W::new(self) + pub fn afen39(&mut self) -> AFEN39_W { + AFEN39_W::new(self, 7) } #[doc = "Bit 8 - Async falling enabled 40"] #[inline(always)] #[must_use] - pub fn afen40(&mut self) -> AFEN40_W { - AFEN40_W::new(self) + pub fn afen40(&mut self) -> AFEN40_W { + AFEN40_W::new(self, 8) } #[doc = "Bit 9 - Async falling enabled 41"] #[inline(always)] #[must_use] - pub fn afen41(&mut self) -> AFEN41_W { - AFEN41_W::new(self) + pub fn afen41(&mut self) -> AFEN41_W { + AFEN41_W::new(self, 9) } #[doc = "Bit 10 - Async falling enabled 42"] #[inline(always)] #[must_use] - pub fn afen42(&mut self) -> AFEN42_W { - AFEN42_W::new(self) + pub fn afen42(&mut self) -> AFEN42_W { + AFEN42_W::new(self, 10) } #[doc = "Bit 11 - Async falling enabled 43"] #[inline(always)] #[must_use] - pub fn afen43(&mut self) -> AFEN43_W { - AFEN43_W::new(self) + pub fn afen43(&mut self) -> AFEN43_W { + AFEN43_W::new(self, 11) } #[doc = "Bit 12 - Async falling enabled 44"] #[inline(always)] #[must_use] - pub fn afen44(&mut self) -> AFEN44_W { - AFEN44_W::new(self) + pub fn afen44(&mut self) -> AFEN44_W { + AFEN44_W::new(self, 12) } #[doc = "Bit 13 - Async falling enabled 45"] #[inline(always)] #[must_use] - pub fn afen45(&mut self) -> AFEN45_W { - AFEN45_W::new(self) + pub fn afen45(&mut self) -> AFEN45_W { + AFEN45_W::new(self, 13) } #[doc = "Bit 14 - Async falling enabled 46"] #[inline(always)] #[must_use] - pub fn afen46(&mut self) -> AFEN46_W { - AFEN46_W::new(self) + pub fn afen46(&mut self) -> AFEN46_W { + AFEN46_W::new(self, 14) } #[doc = "Bit 15 - Async falling enabled 47"] #[inline(always)] #[must_use] - pub fn afen47(&mut self) -> AFEN47_W { - AFEN47_W::new(self) + pub fn afen47(&mut self) -> AFEN47_W { + AFEN47_W::new(self, 15) } #[doc = "Bit 16 - Async falling enabled 48"] #[inline(always)] #[must_use] - pub fn afen48(&mut self) -> AFEN48_W { - AFEN48_W::new(self) + pub fn afen48(&mut self) -> AFEN48_W { + AFEN48_W::new(self, 16) } #[doc = "Bit 17 - Async falling enabled 49"] #[inline(always)] #[must_use] - pub fn afen49(&mut self) -> AFEN49_W { - AFEN49_W::new(self) + pub fn afen49(&mut self) -> AFEN49_W { + AFEN49_W::new(self, 17) } #[doc = "Bit 18 - Async falling enabled 50"] #[inline(always)] #[must_use] - pub fn afen50(&mut self) -> AFEN50_W { - AFEN50_W::new(self) + pub fn afen50(&mut self) -> AFEN50_W { + AFEN50_W::new(self, 18) } #[doc = "Bit 19 - Async falling enabled 51"] #[inline(always)] #[must_use] - pub fn afen51(&mut self) -> AFEN51_W { - AFEN51_W::new(self) + pub fn afen51(&mut self) -> AFEN51_W { + AFEN51_W::new(self, 19) } #[doc = "Bit 20 - Async falling enabled 52"] #[inline(always)] #[must_use] - pub fn afen52(&mut self) -> AFEN52_W { - AFEN52_W::new(self) + pub fn afen52(&mut self) -> AFEN52_W { + AFEN52_W::new(self, 20) } #[doc = "Bit 21 - Async falling enabled 53"] #[inline(always)] #[must_use] - pub fn afen53(&mut self) -> AFEN53_W { - AFEN53_W::new(self) + pub fn afen53(&mut self) -> AFEN53_W { + AFEN53_W::new(self, 21) } #[doc = "Bit 22 - Async falling enabled 54"] #[inline(always)] #[must_use] - pub fn afen54(&mut self) -> AFEN54_W { - AFEN54_W::new(self) + pub fn afen54(&mut self) -> AFEN54_W { + AFEN54_W::new(self, 22) } #[doc = "Bit 23 - Async falling enabled 55"] #[inline(always)] #[must_use] - pub fn afen55(&mut self) -> AFEN55_W { - AFEN55_W::new(self) + pub fn afen55(&mut self) -> AFEN55_W { + AFEN55_W::new(self, 23) } #[doc = "Bit 24 - Async falling enabled 56"] #[inline(always)] #[must_use] - pub fn afen56(&mut self) -> AFEN56_W { - AFEN56_W::new(self) + pub fn afen56(&mut self) -> AFEN56_W { + AFEN56_W::new(self, 24) } #[doc = "Bit 25 - Async falling enabled 57"] #[inline(always)] #[must_use] - pub fn afen57(&mut self) -> AFEN57_W { - AFEN57_W::new(self) + pub fn afen57(&mut self) -> AFEN57_W { + AFEN57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gparen0.rs b/crates/bcm2711-lpa/src/gpio/gparen0.rs index ac719d0..38a09c9 100644 --- a/crates/bcm2711-lpa/src/gpio/gparen0.rs +++ b/crates/bcm2711-lpa/src/gpio/gparen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `AREN0` reader - Async rising enabled 0"] pub type AREN0_R = crate::BitReader; #[doc = "Field `AREN0` writer - Async rising enabled 0"] -pub type AREN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN1` reader - Async rising enabled 1"] pub type AREN1_R = crate::BitReader; #[doc = "Field `AREN1` writer - Async rising enabled 1"] -pub type AREN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN2` reader - Async rising enabled 2"] pub type AREN2_R = crate::BitReader; #[doc = "Field `AREN2` writer - Async rising enabled 2"] -pub type AREN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN3` reader - Async rising enabled 3"] pub type AREN3_R = crate::BitReader; #[doc = "Field `AREN3` writer - Async rising enabled 3"] -pub type AREN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN4` reader - Async rising enabled 4"] pub type AREN4_R = crate::BitReader; #[doc = "Field `AREN4` writer - Async rising enabled 4"] -pub type AREN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN5` reader - Async rising enabled 5"] pub type AREN5_R = crate::BitReader; #[doc = "Field `AREN5` writer - Async rising enabled 5"] -pub type AREN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN6` reader - Async rising enabled 6"] pub type AREN6_R = crate::BitReader; #[doc = "Field `AREN6` writer - Async rising enabled 6"] -pub type AREN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN7` reader - Async rising enabled 7"] pub type AREN7_R = crate::BitReader; #[doc = "Field `AREN7` writer - Async rising enabled 7"] -pub type AREN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN8` reader - Async rising enabled 8"] pub type AREN8_R = crate::BitReader; #[doc = "Field `AREN8` writer - Async rising enabled 8"] -pub type AREN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN9` reader - Async rising enabled 9"] pub type AREN9_R = crate::BitReader; #[doc = "Field `AREN9` writer - Async rising enabled 9"] -pub type AREN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN10` reader - Async rising enabled 10"] pub type AREN10_R = crate::BitReader; #[doc = "Field `AREN10` writer - Async rising enabled 10"] -pub type AREN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN11` reader - Async rising enabled 11"] pub type AREN11_R = crate::BitReader; #[doc = "Field `AREN11` writer - Async rising enabled 11"] -pub type AREN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN12` reader - Async rising enabled 12"] pub type AREN12_R = crate::BitReader; #[doc = "Field `AREN12` writer - Async rising enabled 12"] -pub type AREN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN13` reader - Async rising enabled 13"] pub type AREN13_R = crate::BitReader; #[doc = "Field `AREN13` writer - Async rising enabled 13"] -pub type AREN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN14` reader - Async rising enabled 14"] pub type AREN14_R = crate::BitReader; #[doc = "Field `AREN14` writer - Async rising enabled 14"] -pub type AREN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN15` reader - Async rising enabled 15"] pub type AREN15_R = crate::BitReader; #[doc = "Field `AREN15` writer - Async rising enabled 15"] -pub type AREN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN16` reader - Async rising enabled 16"] pub type AREN16_R = crate::BitReader; #[doc = "Field `AREN16` writer - Async rising enabled 16"] -pub type AREN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN17` reader - Async rising enabled 17"] pub type AREN17_R = crate::BitReader; #[doc = "Field `AREN17` writer - Async rising enabled 17"] -pub type AREN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN18` reader - Async rising enabled 18"] pub type AREN18_R = crate::BitReader; #[doc = "Field `AREN18` writer - Async rising enabled 18"] -pub type AREN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN19` reader - Async rising enabled 19"] pub type AREN19_R = crate::BitReader; #[doc = "Field `AREN19` writer - Async rising enabled 19"] -pub type AREN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN20` reader - Async rising enabled 20"] pub type AREN20_R = crate::BitReader; #[doc = "Field `AREN20` writer - Async rising enabled 20"] -pub type AREN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN21` reader - Async rising enabled 21"] pub type AREN21_R = crate::BitReader; #[doc = "Field `AREN21` writer - Async rising enabled 21"] -pub type AREN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN22` reader - Async rising enabled 22"] pub type AREN22_R = crate::BitReader; #[doc = "Field `AREN22` writer - Async rising enabled 22"] -pub type AREN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN23` reader - Async rising enabled 23"] pub type AREN23_R = crate::BitReader; #[doc = "Field `AREN23` writer - Async rising enabled 23"] -pub type AREN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN24` reader - Async rising enabled 24"] pub type AREN24_R = crate::BitReader; #[doc = "Field `AREN24` writer - Async rising enabled 24"] -pub type AREN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN25` reader - Async rising enabled 25"] pub type AREN25_R = crate::BitReader; #[doc = "Field `AREN25` writer - Async rising enabled 25"] -pub type AREN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN26` reader - Async rising enabled 26"] pub type AREN26_R = crate::BitReader; #[doc = "Field `AREN26` writer - Async rising enabled 26"] -pub type AREN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN27` reader - Async rising enabled 27"] pub type AREN27_R = crate::BitReader; #[doc = "Field `AREN27` writer - Async rising enabled 27"] -pub type AREN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN28` reader - Async rising enabled 28"] pub type AREN28_R = crate::BitReader; #[doc = "Field `AREN28` writer - Async rising enabled 28"] -pub type AREN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN29` reader - Async rising enabled 29"] pub type AREN29_R = crate::BitReader; #[doc = "Field `AREN29` writer - Async rising enabled 29"] -pub type AREN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN30` reader - Async rising enabled 30"] pub type AREN30_R = crate::BitReader; #[doc = "Field `AREN30` writer - Async rising enabled 30"] -pub type AREN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN31` reader - Async rising enabled 31"] pub type AREN31_R = crate::BitReader; #[doc = "Field `AREN31` writer - Async rising enabled 31"] -pub type AREN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async rising enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async rising enabled 0"] #[inline(always)] #[must_use] - pub fn aren0(&mut self) -> AREN0_W { - AREN0_W::new(self) + pub fn aren0(&mut self) -> AREN0_W { + AREN0_W::new(self, 0) } #[doc = "Bit 1 - Async rising enabled 1"] #[inline(always)] #[must_use] - pub fn aren1(&mut self) -> AREN1_W { - AREN1_W::new(self) + pub fn aren1(&mut self) -> AREN1_W { + AREN1_W::new(self, 1) } #[doc = "Bit 2 - Async rising enabled 2"] #[inline(always)] #[must_use] - pub fn aren2(&mut self) -> AREN2_W { - AREN2_W::new(self) + pub fn aren2(&mut self) -> AREN2_W { + AREN2_W::new(self, 2) } #[doc = "Bit 3 - Async rising enabled 3"] #[inline(always)] #[must_use] - pub fn aren3(&mut self) -> AREN3_W { - AREN3_W::new(self) + pub fn aren3(&mut self) -> AREN3_W { + AREN3_W::new(self, 3) } #[doc = "Bit 4 - Async rising enabled 4"] #[inline(always)] #[must_use] - pub fn aren4(&mut self) -> AREN4_W { - AREN4_W::new(self) + pub fn aren4(&mut self) -> AREN4_W { + AREN4_W::new(self, 4) } #[doc = "Bit 5 - Async rising enabled 5"] #[inline(always)] #[must_use] - pub fn aren5(&mut self) -> AREN5_W { - AREN5_W::new(self) + pub fn aren5(&mut self) -> AREN5_W { + AREN5_W::new(self, 5) } #[doc = "Bit 6 - Async rising enabled 6"] #[inline(always)] #[must_use] - pub fn aren6(&mut self) -> AREN6_W { - AREN6_W::new(self) + pub fn aren6(&mut self) -> AREN6_W { + AREN6_W::new(self, 6) } #[doc = "Bit 7 - Async rising enabled 7"] #[inline(always)] #[must_use] - pub fn aren7(&mut self) -> AREN7_W { - AREN7_W::new(self) + pub fn aren7(&mut self) -> AREN7_W { + AREN7_W::new(self, 7) } #[doc = "Bit 8 - Async rising enabled 8"] #[inline(always)] #[must_use] - pub fn aren8(&mut self) -> AREN8_W { - AREN8_W::new(self) + pub fn aren8(&mut self) -> AREN8_W { + AREN8_W::new(self, 8) } #[doc = "Bit 9 - Async rising enabled 9"] #[inline(always)] #[must_use] - pub fn aren9(&mut self) -> AREN9_W { - AREN9_W::new(self) + pub fn aren9(&mut self) -> AREN9_W { + AREN9_W::new(self, 9) } #[doc = "Bit 10 - Async rising enabled 10"] #[inline(always)] #[must_use] - pub fn aren10(&mut self) -> AREN10_W { - AREN10_W::new(self) + pub fn aren10(&mut self) -> AREN10_W { + AREN10_W::new(self, 10) } #[doc = "Bit 11 - Async rising enabled 11"] #[inline(always)] #[must_use] - pub fn aren11(&mut self) -> AREN11_W { - AREN11_W::new(self) + pub fn aren11(&mut self) -> AREN11_W { + AREN11_W::new(self, 11) } #[doc = "Bit 12 - Async rising enabled 12"] #[inline(always)] #[must_use] - pub fn aren12(&mut self) -> AREN12_W { - AREN12_W::new(self) + pub fn aren12(&mut self) -> AREN12_W { + AREN12_W::new(self, 12) } #[doc = "Bit 13 - Async rising enabled 13"] #[inline(always)] #[must_use] - pub fn aren13(&mut self) -> AREN13_W { - AREN13_W::new(self) + pub fn aren13(&mut self) -> AREN13_W { + AREN13_W::new(self, 13) } #[doc = "Bit 14 - Async rising enabled 14"] #[inline(always)] #[must_use] - pub fn aren14(&mut self) -> AREN14_W { - AREN14_W::new(self) + pub fn aren14(&mut self) -> AREN14_W { + AREN14_W::new(self, 14) } #[doc = "Bit 15 - Async rising enabled 15"] #[inline(always)] #[must_use] - pub fn aren15(&mut self) -> AREN15_W { - AREN15_W::new(self) + pub fn aren15(&mut self) -> AREN15_W { + AREN15_W::new(self, 15) } #[doc = "Bit 16 - Async rising enabled 16"] #[inline(always)] #[must_use] - pub fn aren16(&mut self) -> AREN16_W { - AREN16_W::new(self) + pub fn aren16(&mut self) -> AREN16_W { + AREN16_W::new(self, 16) } #[doc = "Bit 17 - Async rising enabled 17"] #[inline(always)] #[must_use] - pub fn aren17(&mut self) -> AREN17_W { - AREN17_W::new(self) + pub fn aren17(&mut self) -> AREN17_W { + AREN17_W::new(self, 17) } #[doc = "Bit 18 - Async rising enabled 18"] #[inline(always)] #[must_use] - pub fn aren18(&mut self) -> AREN18_W { - AREN18_W::new(self) + pub fn aren18(&mut self) -> AREN18_W { + AREN18_W::new(self, 18) } #[doc = "Bit 19 - Async rising enabled 19"] #[inline(always)] #[must_use] - pub fn aren19(&mut self) -> AREN19_W { - AREN19_W::new(self) + pub fn aren19(&mut self) -> AREN19_W { + AREN19_W::new(self, 19) } #[doc = "Bit 20 - Async rising enabled 20"] #[inline(always)] #[must_use] - pub fn aren20(&mut self) -> AREN20_W { - AREN20_W::new(self) + pub fn aren20(&mut self) -> AREN20_W { + AREN20_W::new(self, 20) } #[doc = "Bit 21 - Async rising enabled 21"] #[inline(always)] #[must_use] - pub fn aren21(&mut self) -> AREN21_W { - AREN21_W::new(self) + pub fn aren21(&mut self) -> AREN21_W { + AREN21_W::new(self, 21) } #[doc = "Bit 22 - Async rising enabled 22"] #[inline(always)] #[must_use] - pub fn aren22(&mut self) -> AREN22_W { - AREN22_W::new(self) + pub fn aren22(&mut self) -> AREN22_W { + AREN22_W::new(self, 22) } #[doc = "Bit 23 - Async rising enabled 23"] #[inline(always)] #[must_use] - pub fn aren23(&mut self) -> AREN23_W { - AREN23_W::new(self) + pub fn aren23(&mut self) -> AREN23_W { + AREN23_W::new(self, 23) } #[doc = "Bit 24 - Async rising enabled 24"] #[inline(always)] #[must_use] - pub fn aren24(&mut self) -> AREN24_W { - AREN24_W::new(self) + pub fn aren24(&mut self) -> AREN24_W { + AREN24_W::new(self, 24) } #[doc = "Bit 25 - Async rising enabled 25"] #[inline(always)] #[must_use] - pub fn aren25(&mut self) -> AREN25_W { - AREN25_W::new(self) + pub fn aren25(&mut self) -> AREN25_W { + AREN25_W::new(self, 25) } #[doc = "Bit 26 - Async rising enabled 26"] #[inline(always)] #[must_use] - pub fn aren26(&mut self) -> AREN26_W { - AREN26_W::new(self) + pub fn aren26(&mut self) -> AREN26_W { + AREN26_W::new(self, 26) } #[doc = "Bit 27 - Async rising enabled 27"] #[inline(always)] #[must_use] - pub fn aren27(&mut self) -> AREN27_W { - AREN27_W::new(self) + pub fn aren27(&mut self) -> AREN27_W { + AREN27_W::new(self, 27) } #[doc = "Bit 28 - Async rising enabled 28"] #[inline(always)] #[must_use] - pub fn aren28(&mut self) -> AREN28_W { - AREN28_W::new(self) + pub fn aren28(&mut self) -> AREN28_W { + AREN28_W::new(self, 28) } #[doc = "Bit 29 - Async rising enabled 29"] #[inline(always)] #[must_use] - pub fn aren29(&mut self) -> AREN29_W { - AREN29_W::new(self) + pub fn aren29(&mut self) -> AREN29_W { + AREN29_W::new(self, 29) } #[doc = "Bit 30 - Async rising enabled 30"] #[inline(always)] #[must_use] - pub fn aren30(&mut self) -> AREN30_W { - AREN30_W::new(self) + pub fn aren30(&mut self) -> AREN30_W { + AREN30_W::new(self, 30) } #[doc = "Bit 31 - Async rising enabled 31"] #[inline(always)] #[must_use] - pub fn aren31(&mut self) -> AREN31_W { - AREN31_W::new(self) + pub fn aren31(&mut self) -> AREN31_W { + AREN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gparen1.rs b/crates/bcm2711-lpa/src/gpio/gparen1.rs index fee315a..d01870a 100644 --- a/crates/bcm2711-lpa/src/gpio/gparen1.rs +++ b/crates/bcm2711-lpa/src/gpio/gparen1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `AREN32` reader - Async rising enabled 32"] pub type AREN32_R = crate::BitReader; #[doc = "Field `AREN32` writer - Async rising enabled 32"] -pub type AREN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN33` reader - Async rising enabled 33"] pub type AREN33_R = crate::BitReader; #[doc = "Field `AREN33` writer - Async rising enabled 33"] -pub type AREN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN34` reader - Async rising enabled 34"] pub type AREN34_R = crate::BitReader; #[doc = "Field `AREN34` writer - Async rising enabled 34"] -pub type AREN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN35` reader - Async rising enabled 35"] pub type AREN35_R = crate::BitReader; #[doc = "Field `AREN35` writer - Async rising enabled 35"] -pub type AREN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN36` reader - Async rising enabled 36"] pub type AREN36_R = crate::BitReader; #[doc = "Field `AREN36` writer - Async rising enabled 36"] -pub type AREN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN37` reader - Async rising enabled 37"] pub type AREN37_R = crate::BitReader; #[doc = "Field `AREN37` writer - Async rising enabled 37"] -pub type AREN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN38` reader - Async rising enabled 38"] pub type AREN38_R = crate::BitReader; #[doc = "Field `AREN38` writer - Async rising enabled 38"] -pub type AREN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN39` reader - Async rising enabled 39"] pub type AREN39_R = crate::BitReader; #[doc = "Field `AREN39` writer - Async rising enabled 39"] -pub type AREN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN40` reader - Async rising enabled 40"] pub type AREN40_R = crate::BitReader; #[doc = "Field `AREN40` writer - Async rising enabled 40"] -pub type AREN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN41` reader - Async rising enabled 41"] pub type AREN41_R = crate::BitReader; #[doc = "Field `AREN41` writer - Async rising enabled 41"] -pub type AREN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN42` reader - Async rising enabled 42"] pub type AREN42_R = crate::BitReader; #[doc = "Field `AREN42` writer - Async rising enabled 42"] -pub type AREN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN43` reader - Async rising enabled 43"] pub type AREN43_R = crate::BitReader; #[doc = "Field `AREN43` writer - Async rising enabled 43"] -pub type AREN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN44` reader - Async rising enabled 44"] pub type AREN44_R = crate::BitReader; #[doc = "Field `AREN44` writer - Async rising enabled 44"] -pub type AREN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN45` reader - Async rising enabled 45"] pub type AREN45_R = crate::BitReader; #[doc = "Field `AREN45` writer - Async rising enabled 45"] -pub type AREN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN46` reader - Async rising enabled 46"] pub type AREN46_R = crate::BitReader; #[doc = "Field `AREN46` writer - Async rising enabled 46"] -pub type AREN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN47` reader - Async rising enabled 47"] pub type AREN47_R = crate::BitReader; #[doc = "Field `AREN47` writer - Async rising enabled 47"] -pub type AREN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN48` reader - Async rising enabled 48"] pub type AREN48_R = crate::BitReader; #[doc = "Field `AREN48` writer - Async rising enabled 48"] -pub type AREN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN49` reader - Async rising enabled 49"] pub type AREN49_R = crate::BitReader; #[doc = "Field `AREN49` writer - Async rising enabled 49"] -pub type AREN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN50` reader - Async rising enabled 50"] pub type AREN50_R = crate::BitReader; #[doc = "Field `AREN50` writer - Async rising enabled 50"] -pub type AREN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN51` reader - Async rising enabled 51"] pub type AREN51_R = crate::BitReader; #[doc = "Field `AREN51` writer - Async rising enabled 51"] -pub type AREN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN52` reader - Async rising enabled 52"] pub type AREN52_R = crate::BitReader; #[doc = "Field `AREN52` writer - Async rising enabled 52"] -pub type AREN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN53` reader - Async rising enabled 53"] pub type AREN53_R = crate::BitReader; #[doc = "Field `AREN53` writer - Async rising enabled 53"] -pub type AREN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN54` reader - Async rising enabled 54"] pub type AREN54_R = crate::BitReader; #[doc = "Field `AREN54` writer - Async rising enabled 54"] -pub type AREN54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN55` reader - Async rising enabled 55"] pub type AREN55_R = crate::BitReader; #[doc = "Field `AREN55` writer - Async rising enabled 55"] -pub type AREN55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN56` reader - Async rising enabled 56"] pub type AREN56_R = crate::BitReader; #[doc = "Field `AREN56` writer - Async rising enabled 56"] -pub type AREN56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN57` reader - Async rising enabled 57"] pub type AREN57_R = crate::BitReader; #[doc = "Field `AREN57` writer - Async rising enabled 57"] -pub type AREN57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN57_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async rising enabled 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async rising enabled 32"] #[inline(always)] #[must_use] - pub fn aren32(&mut self) -> AREN32_W { - AREN32_W::new(self) + pub fn aren32(&mut self) -> AREN32_W { + AREN32_W::new(self, 0) } #[doc = "Bit 1 - Async rising enabled 33"] #[inline(always)] #[must_use] - pub fn aren33(&mut self) -> AREN33_W { - AREN33_W::new(self) + pub fn aren33(&mut self) -> AREN33_W { + AREN33_W::new(self, 1) } #[doc = "Bit 2 - Async rising enabled 34"] #[inline(always)] #[must_use] - pub fn aren34(&mut self) -> AREN34_W { - AREN34_W::new(self) + pub fn aren34(&mut self) -> AREN34_W { + AREN34_W::new(self, 2) } #[doc = "Bit 3 - Async rising enabled 35"] #[inline(always)] #[must_use] - pub fn aren35(&mut self) -> AREN35_W { - AREN35_W::new(self) + pub fn aren35(&mut self) -> AREN35_W { + AREN35_W::new(self, 3) } #[doc = "Bit 4 - Async rising enabled 36"] #[inline(always)] #[must_use] - pub fn aren36(&mut self) -> AREN36_W { - AREN36_W::new(self) + pub fn aren36(&mut self) -> AREN36_W { + AREN36_W::new(self, 4) } #[doc = "Bit 5 - Async rising enabled 37"] #[inline(always)] #[must_use] - pub fn aren37(&mut self) -> AREN37_W { - AREN37_W::new(self) + pub fn aren37(&mut self) -> AREN37_W { + AREN37_W::new(self, 5) } #[doc = "Bit 6 - Async rising enabled 38"] #[inline(always)] #[must_use] - pub fn aren38(&mut self) -> AREN38_W { - AREN38_W::new(self) + pub fn aren38(&mut self) -> AREN38_W { + AREN38_W::new(self, 6) } #[doc = "Bit 7 - Async rising enabled 39"] #[inline(always)] #[must_use] - pub fn aren39(&mut self) -> AREN39_W { - AREN39_W::new(self) + pub fn aren39(&mut self) -> AREN39_W { + AREN39_W::new(self, 7) } #[doc = "Bit 8 - Async rising enabled 40"] #[inline(always)] #[must_use] - pub fn aren40(&mut self) -> AREN40_W { - AREN40_W::new(self) + pub fn aren40(&mut self) -> AREN40_W { + AREN40_W::new(self, 8) } #[doc = "Bit 9 - Async rising enabled 41"] #[inline(always)] #[must_use] - pub fn aren41(&mut self) -> AREN41_W { - AREN41_W::new(self) + pub fn aren41(&mut self) -> AREN41_W { + AREN41_W::new(self, 9) } #[doc = "Bit 10 - Async rising enabled 42"] #[inline(always)] #[must_use] - pub fn aren42(&mut self) -> AREN42_W { - AREN42_W::new(self) + pub fn aren42(&mut self) -> AREN42_W { + AREN42_W::new(self, 10) } #[doc = "Bit 11 - Async rising enabled 43"] #[inline(always)] #[must_use] - pub fn aren43(&mut self) -> AREN43_W { - AREN43_W::new(self) + pub fn aren43(&mut self) -> AREN43_W { + AREN43_W::new(self, 11) } #[doc = "Bit 12 - Async rising enabled 44"] #[inline(always)] #[must_use] - pub fn aren44(&mut self) -> AREN44_W { - AREN44_W::new(self) + pub fn aren44(&mut self) -> AREN44_W { + AREN44_W::new(self, 12) } #[doc = "Bit 13 - Async rising enabled 45"] #[inline(always)] #[must_use] - pub fn aren45(&mut self) -> AREN45_W { - AREN45_W::new(self) + pub fn aren45(&mut self) -> AREN45_W { + AREN45_W::new(self, 13) } #[doc = "Bit 14 - Async rising enabled 46"] #[inline(always)] #[must_use] - pub fn aren46(&mut self) -> AREN46_W { - AREN46_W::new(self) + pub fn aren46(&mut self) -> AREN46_W { + AREN46_W::new(self, 14) } #[doc = "Bit 15 - Async rising enabled 47"] #[inline(always)] #[must_use] - pub fn aren47(&mut self) -> AREN47_W { - AREN47_W::new(self) + pub fn aren47(&mut self) -> AREN47_W { + AREN47_W::new(self, 15) } #[doc = "Bit 16 - Async rising enabled 48"] #[inline(always)] #[must_use] - pub fn aren48(&mut self) -> AREN48_W { - AREN48_W::new(self) + pub fn aren48(&mut self) -> AREN48_W { + AREN48_W::new(self, 16) } #[doc = "Bit 17 - Async rising enabled 49"] #[inline(always)] #[must_use] - pub fn aren49(&mut self) -> AREN49_W { - AREN49_W::new(self) + pub fn aren49(&mut self) -> AREN49_W { + AREN49_W::new(self, 17) } #[doc = "Bit 18 - Async rising enabled 50"] #[inline(always)] #[must_use] - pub fn aren50(&mut self) -> AREN50_W { - AREN50_W::new(self) + pub fn aren50(&mut self) -> AREN50_W { + AREN50_W::new(self, 18) } #[doc = "Bit 19 - Async rising enabled 51"] #[inline(always)] #[must_use] - pub fn aren51(&mut self) -> AREN51_W { - AREN51_W::new(self) + pub fn aren51(&mut self) -> AREN51_W { + AREN51_W::new(self, 19) } #[doc = "Bit 20 - Async rising enabled 52"] #[inline(always)] #[must_use] - pub fn aren52(&mut self) -> AREN52_W { - AREN52_W::new(self) + pub fn aren52(&mut self) -> AREN52_W { + AREN52_W::new(self, 20) } #[doc = "Bit 21 - Async rising enabled 53"] #[inline(always)] #[must_use] - pub fn aren53(&mut self) -> AREN53_W { - AREN53_W::new(self) + pub fn aren53(&mut self) -> AREN53_W { + AREN53_W::new(self, 21) } #[doc = "Bit 22 - Async rising enabled 54"] #[inline(always)] #[must_use] - pub fn aren54(&mut self) -> AREN54_W { - AREN54_W::new(self) + pub fn aren54(&mut self) -> AREN54_W { + AREN54_W::new(self, 22) } #[doc = "Bit 23 - Async rising enabled 55"] #[inline(always)] #[must_use] - pub fn aren55(&mut self) -> AREN55_W { - AREN55_W::new(self) + pub fn aren55(&mut self) -> AREN55_W { + AREN55_W::new(self, 23) } #[doc = "Bit 24 - Async rising enabled 56"] #[inline(always)] #[must_use] - pub fn aren56(&mut self) -> AREN56_W { - AREN56_W::new(self) + pub fn aren56(&mut self) -> AREN56_W { + AREN56_W::new(self, 24) } #[doc = "Bit 25 - Async rising enabled 57"] #[inline(always)] #[must_use] - pub fn aren57(&mut self) -> AREN57_W { - AREN57_W::new(self) + pub fn aren57(&mut self) -> AREN57_W { + AREN57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpclr0.rs b/crates/bcm2711-lpa/src/gpio/gpclr0.rs index 210af7f..d25acb3 100644 --- a/crates/bcm2711-lpa/src/gpio/gpclr0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpclr0.rs @@ -1,69 +1,69 @@ #[doc = "Register `GPCLR0` writer"] pub type W = crate::W; #[doc = "Field `CLR0` writer - Clear 0"] -pub type CLR0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR1` writer - Clear 1"] -pub type CLR1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR2` writer - Clear 2"] -pub type CLR2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR3` writer - Clear 3"] -pub type CLR3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR4` writer - Clear 4"] -pub type CLR4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR5` writer - Clear 5"] -pub type CLR5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR6` writer - Clear 6"] -pub type CLR6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR7` writer - Clear 7"] -pub type CLR7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR8` writer - Clear 8"] -pub type CLR8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR9` writer - Clear 9"] -pub type CLR9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR10` writer - Clear 10"] -pub type CLR10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR11` writer - Clear 11"] -pub type CLR11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR12` writer - Clear 12"] -pub type CLR12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR13` writer - Clear 13"] -pub type CLR13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR14` writer - Clear 14"] -pub type CLR14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR15` writer - Clear 15"] -pub type CLR15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR16` writer - Clear 16"] -pub type CLR16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR17` writer - Clear 17"] -pub type CLR17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR18` writer - Clear 18"] -pub type CLR18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR19` writer - Clear 19"] -pub type CLR19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR20` writer - Clear 20"] -pub type CLR20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR21` writer - Clear 21"] -pub type CLR21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR22` writer - Clear 22"] -pub type CLR22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR23` writer - Clear 23"] -pub type CLR23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR24` writer - Clear 24"] -pub type CLR24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR25` writer - Clear 25"] -pub type CLR25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR26` writer - Clear 26"] -pub type CLR26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR27` writer - Clear 27"] -pub type CLR27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR28` writer - Clear 28"] -pub type CLR28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR29` writer - Clear 29"] -pub type CLR29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR30` writer - Clear 30"] -pub type CLR30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR31` writer - Clear 31"] -pub type CLR31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -73,194 +73,194 @@ impl W { #[doc = "Bit 0 - Clear 0"] #[inline(always)] #[must_use] - pub fn clr0(&mut self) -> CLR0_W { - CLR0_W::new(self) + pub fn clr0(&mut self) -> CLR0_W { + CLR0_W::new(self, 0) } #[doc = "Bit 1 - Clear 1"] #[inline(always)] #[must_use] - pub fn clr1(&mut self) -> CLR1_W { - CLR1_W::new(self) + pub fn clr1(&mut self) -> CLR1_W { + CLR1_W::new(self, 1) } #[doc = "Bit 2 - Clear 2"] #[inline(always)] #[must_use] - pub fn clr2(&mut self) -> CLR2_W { - CLR2_W::new(self) + pub fn clr2(&mut self) -> CLR2_W { + CLR2_W::new(self, 2) } #[doc = "Bit 3 - Clear 3"] #[inline(always)] #[must_use] - pub fn clr3(&mut self) -> CLR3_W { - CLR3_W::new(self) + pub fn clr3(&mut self) -> CLR3_W { + CLR3_W::new(self, 3) } #[doc = "Bit 4 - Clear 4"] #[inline(always)] #[must_use] - pub fn clr4(&mut self) -> CLR4_W { - CLR4_W::new(self) + pub fn clr4(&mut self) -> CLR4_W { + CLR4_W::new(self, 4) } #[doc = "Bit 5 - Clear 5"] #[inline(always)] #[must_use] - pub fn clr5(&mut self) -> CLR5_W { - CLR5_W::new(self) + pub fn clr5(&mut self) -> CLR5_W { + CLR5_W::new(self, 5) } #[doc = "Bit 6 - Clear 6"] #[inline(always)] #[must_use] - pub fn clr6(&mut self) -> CLR6_W { - CLR6_W::new(self) + pub fn clr6(&mut self) -> CLR6_W { + CLR6_W::new(self, 6) } #[doc = "Bit 7 - Clear 7"] #[inline(always)] #[must_use] - pub fn clr7(&mut self) -> CLR7_W { - CLR7_W::new(self) + pub fn clr7(&mut self) -> CLR7_W { + CLR7_W::new(self, 7) } #[doc = "Bit 8 - Clear 8"] #[inline(always)] #[must_use] - pub fn clr8(&mut self) -> CLR8_W { - CLR8_W::new(self) + pub fn clr8(&mut self) -> CLR8_W { + CLR8_W::new(self, 8) } #[doc = "Bit 9 - Clear 9"] #[inline(always)] #[must_use] - pub fn clr9(&mut self) -> CLR9_W { - CLR9_W::new(self) + pub fn clr9(&mut self) -> CLR9_W { + CLR9_W::new(self, 9) } #[doc = "Bit 10 - Clear 10"] #[inline(always)] #[must_use] - pub fn clr10(&mut self) -> CLR10_W { - CLR10_W::new(self) + pub fn clr10(&mut self) -> CLR10_W { + CLR10_W::new(self, 10) } #[doc = "Bit 11 - Clear 11"] #[inline(always)] #[must_use] - pub fn clr11(&mut self) -> CLR11_W { - CLR11_W::new(self) + pub fn clr11(&mut self) -> CLR11_W { + CLR11_W::new(self, 11) } #[doc = "Bit 12 - Clear 12"] #[inline(always)] #[must_use] - pub fn clr12(&mut self) -> CLR12_W { - CLR12_W::new(self) + pub fn clr12(&mut self) -> CLR12_W { + CLR12_W::new(self, 12) } #[doc = "Bit 13 - Clear 13"] #[inline(always)] #[must_use] - pub fn clr13(&mut self) -> CLR13_W { - CLR13_W::new(self) + pub fn clr13(&mut self) -> CLR13_W { + CLR13_W::new(self, 13) } #[doc = "Bit 14 - Clear 14"] #[inline(always)] #[must_use] - pub fn clr14(&mut self) -> CLR14_W { - CLR14_W::new(self) + pub fn clr14(&mut self) -> CLR14_W { + CLR14_W::new(self, 14) } #[doc = "Bit 15 - Clear 15"] #[inline(always)] #[must_use] - pub fn clr15(&mut self) -> CLR15_W { - CLR15_W::new(self) + pub fn clr15(&mut self) -> CLR15_W { + CLR15_W::new(self, 15) } #[doc = "Bit 16 - Clear 16"] #[inline(always)] #[must_use] - pub fn clr16(&mut self) -> CLR16_W { - CLR16_W::new(self) + pub fn clr16(&mut self) -> CLR16_W { + CLR16_W::new(self, 16) } #[doc = "Bit 17 - Clear 17"] #[inline(always)] #[must_use] - pub fn clr17(&mut self) -> CLR17_W { - CLR17_W::new(self) + pub fn clr17(&mut self) -> CLR17_W { + CLR17_W::new(self, 17) } #[doc = "Bit 18 - Clear 18"] #[inline(always)] #[must_use] - pub fn clr18(&mut self) -> CLR18_W { - CLR18_W::new(self) + pub fn clr18(&mut self) -> CLR18_W { + CLR18_W::new(self, 18) } #[doc = "Bit 19 - Clear 19"] #[inline(always)] #[must_use] - pub fn clr19(&mut self) -> CLR19_W { - CLR19_W::new(self) + pub fn clr19(&mut self) -> CLR19_W { + CLR19_W::new(self, 19) } #[doc = "Bit 20 - Clear 20"] #[inline(always)] #[must_use] - pub fn clr20(&mut self) -> CLR20_W { - CLR20_W::new(self) + pub fn clr20(&mut self) -> CLR20_W { + CLR20_W::new(self, 20) } #[doc = "Bit 21 - Clear 21"] #[inline(always)] #[must_use] - pub fn clr21(&mut self) -> CLR21_W { - CLR21_W::new(self) + pub fn clr21(&mut self) -> CLR21_W { + CLR21_W::new(self, 21) } #[doc = "Bit 22 - Clear 22"] #[inline(always)] #[must_use] - pub fn clr22(&mut self) -> CLR22_W { - CLR22_W::new(self) + pub fn clr22(&mut self) -> CLR22_W { + CLR22_W::new(self, 22) } #[doc = "Bit 23 - Clear 23"] #[inline(always)] #[must_use] - pub fn clr23(&mut self) -> CLR23_W { - CLR23_W::new(self) + pub fn clr23(&mut self) -> CLR23_W { + CLR23_W::new(self, 23) } #[doc = "Bit 24 - Clear 24"] #[inline(always)] #[must_use] - pub fn clr24(&mut self) -> CLR24_W { - CLR24_W::new(self) + pub fn clr24(&mut self) -> CLR24_W { + CLR24_W::new(self, 24) } #[doc = "Bit 25 - Clear 25"] #[inline(always)] #[must_use] - pub fn clr25(&mut self) -> CLR25_W { - CLR25_W::new(self) + pub fn clr25(&mut self) -> CLR25_W { + CLR25_W::new(self, 25) } #[doc = "Bit 26 - Clear 26"] #[inline(always)] #[must_use] - pub fn clr26(&mut self) -> CLR26_W { - CLR26_W::new(self) + pub fn clr26(&mut self) -> CLR26_W { + CLR26_W::new(self, 26) } #[doc = "Bit 27 - Clear 27"] #[inline(always)] #[must_use] - pub fn clr27(&mut self) -> CLR27_W { - CLR27_W::new(self) + pub fn clr27(&mut self) -> CLR27_W { + CLR27_W::new(self, 27) } #[doc = "Bit 28 - Clear 28"] #[inline(always)] #[must_use] - pub fn clr28(&mut self) -> CLR28_W { - CLR28_W::new(self) + pub fn clr28(&mut self) -> CLR28_W { + CLR28_W::new(self, 28) } #[doc = "Bit 29 - Clear 29"] #[inline(always)] #[must_use] - pub fn clr29(&mut self) -> CLR29_W { - CLR29_W::new(self) + pub fn clr29(&mut self) -> CLR29_W { + CLR29_W::new(self, 29) } #[doc = "Bit 30 - Clear 30"] #[inline(always)] #[must_use] - pub fn clr30(&mut self) -> CLR30_W { - CLR30_W::new(self) + pub fn clr30(&mut self) -> CLR30_W { + CLR30_W::new(self, 30) } #[doc = "Bit 31 - Clear 31"] #[inline(always)] #[must_use] - pub fn clr31(&mut self) -> CLR31_W { - CLR31_W::new(self) + pub fn clr31(&mut self) -> CLR31_W { + CLR31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpclr1.rs b/crates/bcm2711-lpa/src/gpio/gpclr1.rs index a09a556..2c2b0be 100644 --- a/crates/bcm2711-lpa/src/gpio/gpclr1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpclr1.rs @@ -1,57 +1,57 @@ #[doc = "Register `GPCLR1` writer"] pub type W = crate::W; #[doc = "Field `CLR32` writer - Clear 32"] -pub type CLR32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR33` writer - Clear 33"] -pub type CLR33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR34` writer - Clear 34"] -pub type CLR34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR35` writer - Clear 35"] -pub type CLR35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR36` writer - Clear 36"] -pub type CLR36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR37` writer - Clear 37"] -pub type CLR37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR38` writer - Clear 38"] -pub type CLR38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR39` writer - Clear 39"] -pub type CLR39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR40` writer - Clear 40"] -pub type CLR40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR41` writer - Clear 41"] -pub type CLR41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR42` writer - Clear 42"] -pub type CLR42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR43` writer - Clear 43"] -pub type CLR43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR44` writer - Clear 44"] -pub type CLR44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR45` writer - Clear 45"] -pub type CLR45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR46` writer - Clear 46"] -pub type CLR46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR47` writer - Clear 47"] -pub type CLR47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR48` writer - Clear 48"] -pub type CLR48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR49` writer - Clear 49"] -pub type CLR49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR50` writer - Clear 50"] -pub type CLR50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR51` writer - Clear 51"] -pub type CLR51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR52` writer - Clear 52"] -pub type CLR52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR53` writer - Clear 53"] -pub type CLR53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR53_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR54` writer - Clear 54"] -pub type CLR54_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR54_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR55` writer - Clear 55"] -pub type CLR55_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR55_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR56` writer - Clear 56"] -pub type CLR56_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR56_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR57` writer - Clear 57"] -pub type CLR57_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR57_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -61,158 +61,158 @@ impl W { #[doc = "Bit 0 - Clear 32"] #[inline(always)] #[must_use] - pub fn clr32(&mut self) -> CLR32_W { - CLR32_W::new(self) + pub fn clr32(&mut self) -> CLR32_W { + CLR32_W::new(self, 0) } #[doc = "Bit 1 - Clear 33"] #[inline(always)] #[must_use] - pub fn clr33(&mut self) -> CLR33_W { - CLR33_W::new(self) + pub fn clr33(&mut self) -> CLR33_W { + CLR33_W::new(self, 1) } #[doc = "Bit 2 - Clear 34"] #[inline(always)] #[must_use] - pub fn clr34(&mut self) -> CLR34_W { - CLR34_W::new(self) + pub fn clr34(&mut self) -> CLR34_W { + CLR34_W::new(self, 2) } #[doc = "Bit 3 - Clear 35"] #[inline(always)] #[must_use] - pub fn clr35(&mut self) -> CLR35_W { - CLR35_W::new(self) + pub fn clr35(&mut self) -> CLR35_W { + CLR35_W::new(self, 3) } #[doc = "Bit 4 - Clear 36"] #[inline(always)] #[must_use] - pub fn clr36(&mut self) -> CLR36_W { - CLR36_W::new(self) + pub fn clr36(&mut self) -> CLR36_W { + CLR36_W::new(self, 4) } #[doc = "Bit 5 - Clear 37"] #[inline(always)] #[must_use] - pub fn clr37(&mut self) -> CLR37_W { - CLR37_W::new(self) + pub fn clr37(&mut self) -> CLR37_W { + CLR37_W::new(self, 5) } #[doc = "Bit 6 - Clear 38"] #[inline(always)] #[must_use] - pub fn clr38(&mut self) -> CLR38_W { - CLR38_W::new(self) + pub fn clr38(&mut self) -> CLR38_W { + CLR38_W::new(self, 6) } #[doc = "Bit 7 - Clear 39"] #[inline(always)] #[must_use] - pub fn clr39(&mut self) -> CLR39_W { - CLR39_W::new(self) + pub fn clr39(&mut self) -> CLR39_W { + CLR39_W::new(self, 7) } #[doc = "Bit 8 - Clear 40"] #[inline(always)] #[must_use] - pub fn clr40(&mut self) -> CLR40_W { - CLR40_W::new(self) + pub fn clr40(&mut self) -> CLR40_W { + CLR40_W::new(self, 8) } #[doc = "Bit 9 - Clear 41"] #[inline(always)] #[must_use] - pub fn clr41(&mut self) -> CLR41_W { - CLR41_W::new(self) + pub fn clr41(&mut self) -> CLR41_W { + CLR41_W::new(self, 9) } #[doc = "Bit 10 - Clear 42"] #[inline(always)] #[must_use] - pub fn clr42(&mut self) -> CLR42_W { - CLR42_W::new(self) + pub fn clr42(&mut self) -> CLR42_W { + CLR42_W::new(self, 10) } #[doc = "Bit 11 - Clear 43"] #[inline(always)] #[must_use] - pub fn clr43(&mut self) -> CLR43_W { - CLR43_W::new(self) + pub fn clr43(&mut self) -> CLR43_W { + CLR43_W::new(self, 11) } #[doc = "Bit 12 - Clear 44"] #[inline(always)] #[must_use] - pub fn clr44(&mut self) -> CLR44_W { - CLR44_W::new(self) + pub fn clr44(&mut self) -> CLR44_W { + CLR44_W::new(self, 12) } #[doc = "Bit 13 - Clear 45"] #[inline(always)] #[must_use] - pub fn clr45(&mut self) -> CLR45_W { - CLR45_W::new(self) + pub fn clr45(&mut self) -> CLR45_W { + CLR45_W::new(self, 13) } #[doc = "Bit 14 - Clear 46"] #[inline(always)] #[must_use] - pub fn clr46(&mut self) -> CLR46_W { - CLR46_W::new(self) + pub fn clr46(&mut self) -> CLR46_W { + CLR46_W::new(self, 14) } #[doc = "Bit 15 - Clear 47"] #[inline(always)] #[must_use] - pub fn clr47(&mut self) -> CLR47_W { - CLR47_W::new(self) + pub fn clr47(&mut self) -> CLR47_W { + CLR47_W::new(self, 15) } #[doc = "Bit 16 - Clear 48"] #[inline(always)] #[must_use] - pub fn clr48(&mut self) -> CLR48_W { - CLR48_W::new(self) + pub fn clr48(&mut self) -> CLR48_W { + CLR48_W::new(self, 16) } #[doc = "Bit 17 - Clear 49"] #[inline(always)] #[must_use] - pub fn clr49(&mut self) -> CLR49_W { - CLR49_W::new(self) + pub fn clr49(&mut self) -> CLR49_W { + CLR49_W::new(self, 17) } #[doc = "Bit 18 - Clear 50"] #[inline(always)] #[must_use] - pub fn clr50(&mut self) -> CLR50_W { - CLR50_W::new(self) + pub fn clr50(&mut self) -> CLR50_W { + CLR50_W::new(self, 18) } #[doc = "Bit 19 - Clear 51"] #[inline(always)] #[must_use] - pub fn clr51(&mut self) -> CLR51_W { - CLR51_W::new(self) + pub fn clr51(&mut self) -> CLR51_W { + CLR51_W::new(self, 19) } #[doc = "Bit 20 - Clear 52"] #[inline(always)] #[must_use] - pub fn clr52(&mut self) -> CLR52_W { - CLR52_W::new(self) + pub fn clr52(&mut self) -> CLR52_W { + CLR52_W::new(self, 20) } #[doc = "Bit 21 - Clear 53"] #[inline(always)] #[must_use] - pub fn clr53(&mut self) -> CLR53_W { - CLR53_W::new(self) + pub fn clr53(&mut self) -> CLR53_W { + CLR53_W::new(self, 21) } #[doc = "Bit 22 - Clear 54"] #[inline(always)] #[must_use] - pub fn clr54(&mut self) -> CLR54_W { - CLR54_W::new(self) + pub fn clr54(&mut self) -> CLR54_W { + CLR54_W::new(self, 22) } #[doc = "Bit 23 - Clear 55"] #[inline(always)] #[must_use] - pub fn clr55(&mut self) -> CLR55_W { - CLR55_W::new(self) + pub fn clr55(&mut self) -> CLR55_W { + CLR55_W::new(self, 23) } #[doc = "Bit 24 - Clear 56"] #[inline(always)] #[must_use] - pub fn clr56(&mut self) -> CLR56_W { - CLR56_W::new(self) + pub fn clr56(&mut self) -> CLR56_W { + CLR56_W::new(self, 24) } #[doc = "Bit 25 - Clear 57"] #[inline(always)] #[must_use] - pub fn clr57(&mut self) -> CLR57_W { - CLR57_W::new(self) + pub fn clr57(&mut self) -> CLR57_W { + CLR57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpeds0.rs b/crates/bcm2711-lpa/src/gpio/gpeds0.rs index caa11e1..f89e12d 100644 --- a/crates/bcm2711-lpa/src/gpio/gpeds0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpeds0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `EDS0` reader - Event detected 0"] pub type EDS0_R = crate::BitReader; #[doc = "Field `EDS0` writer - Event detected 0"] -pub type EDS0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS1` reader - Event detected 1"] pub type EDS1_R = crate::BitReader; #[doc = "Field `EDS1` writer - Event detected 1"] -pub type EDS1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS2` reader - Event detected 2"] pub type EDS2_R = crate::BitReader; #[doc = "Field `EDS2` writer - Event detected 2"] -pub type EDS2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS3` reader - Event detected 3"] pub type EDS3_R = crate::BitReader; #[doc = "Field `EDS3` writer - Event detected 3"] -pub type EDS3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS4` reader - Event detected 4"] pub type EDS4_R = crate::BitReader; #[doc = "Field `EDS4` writer - Event detected 4"] -pub type EDS4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS5` reader - Event detected 5"] pub type EDS5_R = crate::BitReader; #[doc = "Field `EDS5` writer - Event detected 5"] -pub type EDS5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS6` reader - Event detected 6"] pub type EDS6_R = crate::BitReader; #[doc = "Field `EDS6` writer - Event detected 6"] -pub type EDS6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS7` reader - Event detected 7"] pub type EDS7_R = crate::BitReader; #[doc = "Field `EDS7` writer - Event detected 7"] -pub type EDS7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS8` reader - Event detected 8"] pub type EDS8_R = crate::BitReader; #[doc = "Field `EDS8` writer - Event detected 8"] -pub type EDS8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS9` reader - Event detected 9"] pub type EDS9_R = crate::BitReader; #[doc = "Field `EDS9` writer - Event detected 9"] -pub type EDS9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS10` reader - Event detected 10"] pub type EDS10_R = crate::BitReader; #[doc = "Field `EDS10` writer - Event detected 10"] -pub type EDS10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS11` reader - Event detected 11"] pub type EDS11_R = crate::BitReader; #[doc = "Field `EDS11` writer - Event detected 11"] -pub type EDS11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS12` reader - Event detected 12"] pub type EDS12_R = crate::BitReader; #[doc = "Field `EDS12` writer - Event detected 12"] -pub type EDS12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS13` reader - Event detected 13"] pub type EDS13_R = crate::BitReader; #[doc = "Field `EDS13` writer - Event detected 13"] -pub type EDS13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS14` reader - Event detected 14"] pub type EDS14_R = crate::BitReader; #[doc = "Field `EDS14` writer - Event detected 14"] -pub type EDS14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS15` reader - Event detected 15"] pub type EDS15_R = crate::BitReader; #[doc = "Field `EDS15` writer - Event detected 15"] -pub type EDS15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS16` reader - Event detected 16"] pub type EDS16_R = crate::BitReader; #[doc = "Field `EDS16` writer - Event detected 16"] -pub type EDS16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS17` reader - Event detected 17"] pub type EDS17_R = crate::BitReader; #[doc = "Field `EDS17` writer - Event detected 17"] -pub type EDS17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS18` reader - Event detected 18"] pub type EDS18_R = crate::BitReader; #[doc = "Field `EDS18` writer - Event detected 18"] -pub type EDS18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS19` reader - Event detected 19"] pub type EDS19_R = crate::BitReader; #[doc = "Field `EDS19` writer - Event detected 19"] -pub type EDS19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS20` reader - Event detected 20"] pub type EDS20_R = crate::BitReader; #[doc = "Field `EDS20` writer - Event detected 20"] -pub type EDS20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS21` reader - Event detected 21"] pub type EDS21_R = crate::BitReader; #[doc = "Field `EDS21` writer - Event detected 21"] -pub type EDS21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS22` reader - Event detected 22"] pub type EDS22_R = crate::BitReader; #[doc = "Field `EDS22` writer - Event detected 22"] -pub type EDS22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS23` reader - Event detected 23"] pub type EDS23_R = crate::BitReader; #[doc = "Field `EDS23` writer - Event detected 23"] -pub type EDS23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS24` reader - Event detected 24"] pub type EDS24_R = crate::BitReader; #[doc = "Field `EDS24` writer - Event detected 24"] -pub type EDS24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS25` reader - Event detected 25"] pub type EDS25_R = crate::BitReader; #[doc = "Field `EDS25` writer - Event detected 25"] -pub type EDS25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS26` reader - Event detected 26"] pub type EDS26_R = crate::BitReader; #[doc = "Field `EDS26` writer - Event detected 26"] -pub type EDS26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS27` reader - Event detected 27"] pub type EDS27_R = crate::BitReader; #[doc = "Field `EDS27` writer - Event detected 27"] -pub type EDS27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS28` reader - Event detected 28"] pub type EDS28_R = crate::BitReader; #[doc = "Field `EDS28` writer - Event detected 28"] -pub type EDS28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS29` reader - Event detected 29"] pub type EDS29_R = crate::BitReader; #[doc = "Field `EDS29` writer - Event detected 29"] -pub type EDS29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS30` reader - Event detected 30"] pub type EDS30_R = crate::BitReader; #[doc = "Field `EDS30` writer - Event detected 30"] -pub type EDS30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS31` reader - Event detected 31"] pub type EDS31_R = crate::BitReader; #[doc = "Field `EDS31` writer - Event detected 31"] -pub type EDS31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Event detected 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Event detected 0"] #[inline(always)] #[must_use] - pub fn eds0(&mut self) -> EDS0_W { - EDS0_W::new(self) + pub fn eds0(&mut self) -> EDS0_W { + EDS0_W::new(self, 0) } #[doc = "Bit 1 - Event detected 1"] #[inline(always)] #[must_use] - pub fn eds1(&mut self) -> EDS1_W { - EDS1_W::new(self) + pub fn eds1(&mut self) -> EDS1_W { + EDS1_W::new(self, 1) } #[doc = "Bit 2 - Event detected 2"] #[inline(always)] #[must_use] - pub fn eds2(&mut self) -> EDS2_W { - EDS2_W::new(self) + pub fn eds2(&mut self) -> EDS2_W { + EDS2_W::new(self, 2) } #[doc = "Bit 3 - Event detected 3"] #[inline(always)] #[must_use] - pub fn eds3(&mut self) -> EDS3_W { - EDS3_W::new(self) + pub fn eds3(&mut self) -> EDS3_W { + EDS3_W::new(self, 3) } #[doc = "Bit 4 - Event detected 4"] #[inline(always)] #[must_use] - pub fn eds4(&mut self) -> EDS4_W { - EDS4_W::new(self) + pub fn eds4(&mut self) -> EDS4_W { + EDS4_W::new(self, 4) } #[doc = "Bit 5 - Event detected 5"] #[inline(always)] #[must_use] - pub fn eds5(&mut self) -> EDS5_W { - EDS5_W::new(self) + pub fn eds5(&mut self) -> EDS5_W { + EDS5_W::new(self, 5) } #[doc = "Bit 6 - Event detected 6"] #[inline(always)] #[must_use] - pub fn eds6(&mut self) -> EDS6_W { - EDS6_W::new(self) + pub fn eds6(&mut self) -> EDS6_W { + EDS6_W::new(self, 6) } #[doc = "Bit 7 - Event detected 7"] #[inline(always)] #[must_use] - pub fn eds7(&mut self) -> EDS7_W { - EDS7_W::new(self) + pub fn eds7(&mut self) -> EDS7_W { + EDS7_W::new(self, 7) } #[doc = "Bit 8 - Event detected 8"] #[inline(always)] #[must_use] - pub fn eds8(&mut self) -> EDS8_W { - EDS8_W::new(self) + pub fn eds8(&mut self) -> EDS8_W { + EDS8_W::new(self, 8) } #[doc = "Bit 9 - Event detected 9"] #[inline(always)] #[must_use] - pub fn eds9(&mut self) -> EDS9_W { - EDS9_W::new(self) + pub fn eds9(&mut self) -> EDS9_W { + EDS9_W::new(self, 9) } #[doc = "Bit 10 - Event detected 10"] #[inline(always)] #[must_use] - pub fn eds10(&mut self) -> EDS10_W { - EDS10_W::new(self) + pub fn eds10(&mut self) -> EDS10_W { + EDS10_W::new(self, 10) } #[doc = "Bit 11 - Event detected 11"] #[inline(always)] #[must_use] - pub fn eds11(&mut self) -> EDS11_W { - EDS11_W::new(self) + pub fn eds11(&mut self) -> EDS11_W { + EDS11_W::new(self, 11) } #[doc = "Bit 12 - Event detected 12"] #[inline(always)] #[must_use] - pub fn eds12(&mut self) -> EDS12_W { - EDS12_W::new(self) + pub fn eds12(&mut self) -> EDS12_W { + EDS12_W::new(self, 12) } #[doc = "Bit 13 - Event detected 13"] #[inline(always)] #[must_use] - pub fn eds13(&mut self) -> EDS13_W { - EDS13_W::new(self) + pub fn eds13(&mut self) -> EDS13_W { + EDS13_W::new(self, 13) } #[doc = "Bit 14 - Event detected 14"] #[inline(always)] #[must_use] - pub fn eds14(&mut self) -> EDS14_W { - EDS14_W::new(self) + pub fn eds14(&mut self) -> EDS14_W { + EDS14_W::new(self, 14) } #[doc = "Bit 15 - Event detected 15"] #[inline(always)] #[must_use] - pub fn eds15(&mut self) -> EDS15_W { - EDS15_W::new(self) + pub fn eds15(&mut self) -> EDS15_W { + EDS15_W::new(self, 15) } #[doc = "Bit 16 - Event detected 16"] #[inline(always)] #[must_use] - pub fn eds16(&mut self) -> EDS16_W { - EDS16_W::new(self) + pub fn eds16(&mut self) -> EDS16_W { + EDS16_W::new(self, 16) } #[doc = "Bit 17 - Event detected 17"] #[inline(always)] #[must_use] - pub fn eds17(&mut self) -> EDS17_W { - EDS17_W::new(self) + pub fn eds17(&mut self) -> EDS17_W { + EDS17_W::new(self, 17) } #[doc = "Bit 18 - Event detected 18"] #[inline(always)] #[must_use] - pub fn eds18(&mut self) -> EDS18_W { - EDS18_W::new(self) + pub fn eds18(&mut self) -> EDS18_W { + EDS18_W::new(self, 18) } #[doc = "Bit 19 - Event detected 19"] #[inline(always)] #[must_use] - pub fn eds19(&mut self) -> EDS19_W { - EDS19_W::new(self) + pub fn eds19(&mut self) -> EDS19_W { + EDS19_W::new(self, 19) } #[doc = "Bit 20 - Event detected 20"] #[inline(always)] #[must_use] - pub fn eds20(&mut self) -> EDS20_W { - EDS20_W::new(self) + pub fn eds20(&mut self) -> EDS20_W { + EDS20_W::new(self, 20) } #[doc = "Bit 21 - Event detected 21"] #[inline(always)] #[must_use] - pub fn eds21(&mut self) -> EDS21_W { - EDS21_W::new(self) + pub fn eds21(&mut self) -> EDS21_W { + EDS21_W::new(self, 21) } #[doc = "Bit 22 - Event detected 22"] #[inline(always)] #[must_use] - pub fn eds22(&mut self) -> EDS22_W { - EDS22_W::new(self) + pub fn eds22(&mut self) -> EDS22_W { + EDS22_W::new(self, 22) } #[doc = "Bit 23 - Event detected 23"] #[inline(always)] #[must_use] - pub fn eds23(&mut self) -> EDS23_W { - EDS23_W::new(self) + pub fn eds23(&mut self) -> EDS23_W { + EDS23_W::new(self, 23) } #[doc = "Bit 24 - Event detected 24"] #[inline(always)] #[must_use] - pub fn eds24(&mut self) -> EDS24_W { - EDS24_W::new(self) + pub fn eds24(&mut self) -> EDS24_W { + EDS24_W::new(self, 24) } #[doc = "Bit 25 - Event detected 25"] #[inline(always)] #[must_use] - pub fn eds25(&mut self) -> EDS25_W { - EDS25_W::new(self) + pub fn eds25(&mut self) -> EDS25_W { + EDS25_W::new(self, 25) } #[doc = "Bit 26 - Event detected 26"] #[inline(always)] #[must_use] - pub fn eds26(&mut self) -> EDS26_W { - EDS26_W::new(self) + pub fn eds26(&mut self) -> EDS26_W { + EDS26_W::new(self, 26) } #[doc = "Bit 27 - Event detected 27"] #[inline(always)] #[must_use] - pub fn eds27(&mut self) -> EDS27_W { - EDS27_W::new(self) + pub fn eds27(&mut self) -> EDS27_W { + EDS27_W::new(self, 27) } #[doc = "Bit 28 - Event detected 28"] #[inline(always)] #[must_use] - pub fn eds28(&mut self) -> EDS28_W { - EDS28_W::new(self) + pub fn eds28(&mut self) -> EDS28_W { + EDS28_W::new(self, 28) } #[doc = "Bit 29 - Event detected 29"] #[inline(always)] #[must_use] - pub fn eds29(&mut self) -> EDS29_W { - EDS29_W::new(self) + pub fn eds29(&mut self) -> EDS29_W { + EDS29_W::new(self, 29) } #[doc = "Bit 30 - Event detected 30"] #[inline(always)] #[must_use] - pub fn eds30(&mut self) -> EDS30_W { - EDS30_W::new(self) + pub fn eds30(&mut self) -> EDS30_W { + EDS30_W::new(self, 30) } #[doc = "Bit 31 - Event detected 31"] #[inline(always)] #[must_use] - pub fn eds31(&mut self) -> EDS31_W { - EDS31_W::new(self) + pub fn eds31(&mut self) -> EDS31_W { + EDS31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpeds1.rs b/crates/bcm2711-lpa/src/gpio/gpeds1.rs index a9f835c..2889d3c 100644 --- a/crates/bcm2711-lpa/src/gpio/gpeds1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpeds1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `EDS32` reader - Event detected 32"] pub type EDS32_R = crate::BitReader; #[doc = "Field `EDS32` writer - Event detected 32"] -pub type EDS32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS33` reader - Event detected 33"] pub type EDS33_R = crate::BitReader; #[doc = "Field `EDS33` writer - Event detected 33"] -pub type EDS33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS34` reader - Event detected 34"] pub type EDS34_R = crate::BitReader; #[doc = "Field `EDS34` writer - Event detected 34"] -pub type EDS34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS35` reader - Event detected 35"] pub type EDS35_R = crate::BitReader; #[doc = "Field `EDS35` writer - Event detected 35"] -pub type EDS35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS36` reader - Event detected 36"] pub type EDS36_R = crate::BitReader; #[doc = "Field `EDS36` writer - Event detected 36"] -pub type EDS36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS37` reader - Event detected 37"] pub type EDS37_R = crate::BitReader; #[doc = "Field `EDS37` writer - Event detected 37"] -pub type EDS37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS38` reader - Event detected 38"] pub type EDS38_R = crate::BitReader; #[doc = "Field `EDS38` writer - Event detected 38"] -pub type EDS38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS39` reader - Event detected 39"] pub type EDS39_R = crate::BitReader; #[doc = "Field `EDS39` writer - Event detected 39"] -pub type EDS39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS40` reader - Event detected 40"] pub type EDS40_R = crate::BitReader; #[doc = "Field `EDS40` writer - Event detected 40"] -pub type EDS40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS41` reader - Event detected 41"] pub type EDS41_R = crate::BitReader; #[doc = "Field `EDS41` writer - Event detected 41"] -pub type EDS41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS42` reader - Event detected 42"] pub type EDS42_R = crate::BitReader; #[doc = "Field `EDS42` writer - Event detected 42"] -pub type EDS42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS43` reader - Event detected 43"] pub type EDS43_R = crate::BitReader; #[doc = "Field `EDS43` writer - Event detected 43"] -pub type EDS43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS44` reader - Event detected 44"] pub type EDS44_R = crate::BitReader; #[doc = "Field `EDS44` writer - Event detected 44"] -pub type EDS44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS45` reader - Event detected 45"] pub type EDS45_R = crate::BitReader; #[doc = "Field `EDS45` writer - Event detected 45"] -pub type EDS45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS46` reader - Event detected 46"] pub type EDS46_R = crate::BitReader; #[doc = "Field `EDS46` writer - Event detected 46"] -pub type EDS46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS47` reader - Event detected 47"] pub type EDS47_R = crate::BitReader; #[doc = "Field `EDS47` writer - Event detected 47"] -pub type EDS47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS48` reader - Event detected 48"] pub type EDS48_R = crate::BitReader; #[doc = "Field `EDS48` writer - Event detected 48"] -pub type EDS48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS49` reader - Event detected 49"] pub type EDS49_R = crate::BitReader; #[doc = "Field `EDS49` writer - Event detected 49"] -pub type EDS49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS50` reader - Event detected 50"] pub type EDS50_R = crate::BitReader; #[doc = "Field `EDS50` writer - Event detected 50"] -pub type EDS50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS51` reader - Event detected 51"] pub type EDS51_R = crate::BitReader; #[doc = "Field `EDS51` writer - Event detected 51"] -pub type EDS51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS52` reader - Event detected 52"] pub type EDS52_R = crate::BitReader; #[doc = "Field `EDS52` writer - Event detected 52"] -pub type EDS52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS53` reader - Event detected 53"] pub type EDS53_R = crate::BitReader; #[doc = "Field `EDS53` writer - Event detected 53"] -pub type EDS53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS53_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS54` reader - Event detected 54"] pub type EDS54_R = crate::BitReader; #[doc = "Field `EDS54` writer - Event detected 54"] -pub type EDS54_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS54_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS55` reader - Event detected 55"] pub type EDS55_R = crate::BitReader; #[doc = "Field `EDS55` writer - Event detected 55"] -pub type EDS55_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS55_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS56` reader - Event detected 56"] pub type EDS56_R = crate::BitReader; #[doc = "Field `EDS56` writer - Event detected 56"] -pub type EDS56_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS56_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS57` reader - Event detected 57"] pub type EDS57_R = crate::BitReader; #[doc = "Field `EDS57` writer - Event detected 57"] -pub type EDS57_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS57_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Event detected 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Event detected 32"] #[inline(always)] #[must_use] - pub fn eds32(&mut self) -> EDS32_W { - EDS32_W::new(self) + pub fn eds32(&mut self) -> EDS32_W { + EDS32_W::new(self, 0) } #[doc = "Bit 1 - Event detected 33"] #[inline(always)] #[must_use] - pub fn eds33(&mut self) -> EDS33_W { - EDS33_W::new(self) + pub fn eds33(&mut self) -> EDS33_W { + EDS33_W::new(self, 1) } #[doc = "Bit 2 - Event detected 34"] #[inline(always)] #[must_use] - pub fn eds34(&mut self) -> EDS34_W { - EDS34_W::new(self) + pub fn eds34(&mut self) -> EDS34_W { + EDS34_W::new(self, 2) } #[doc = "Bit 3 - Event detected 35"] #[inline(always)] #[must_use] - pub fn eds35(&mut self) -> EDS35_W { - EDS35_W::new(self) + pub fn eds35(&mut self) -> EDS35_W { + EDS35_W::new(self, 3) } #[doc = "Bit 4 - Event detected 36"] #[inline(always)] #[must_use] - pub fn eds36(&mut self) -> EDS36_W { - EDS36_W::new(self) + pub fn eds36(&mut self) -> EDS36_W { + EDS36_W::new(self, 4) } #[doc = "Bit 5 - Event detected 37"] #[inline(always)] #[must_use] - pub fn eds37(&mut self) -> EDS37_W { - EDS37_W::new(self) + pub fn eds37(&mut self) -> EDS37_W { + EDS37_W::new(self, 5) } #[doc = "Bit 6 - Event detected 38"] #[inline(always)] #[must_use] - pub fn eds38(&mut self) -> EDS38_W { - EDS38_W::new(self) + pub fn eds38(&mut self) -> EDS38_W { + EDS38_W::new(self, 6) } #[doc = "Bit 7 - Event detected 39"] #[inline(always)] #[must_use] - pub fn eds39(&mut self) -> EDS39_W { - EDS39_W::new(self) + pub fn eds39(&mut self) -> EDS39_W { + EDS39_W::new(self, 7) } #[doc = "Bit 8 - Event detected 40"] #[inline(always)] #[must_use] - pub fn eds40(&mut self) -> EDS40_W { - EDS40_W::new(self) + pub fn eds40(&mut self) -> EDS40_W { + EDS40_W::new(self, 8) } #[doc = "Bit 9 - Event detected 41"] #[inline(always)] #[must_use] - pub fn eds41(&mut self) -> EDS41_W { - EDS41_W::new(self) + pub fn eds41(&mut self) -> EDS41_W { + EDS41_W::new(self, 9) } #[doc = "Bit 10 - Event detected 42"] #[inline(always)] #[must_use] - pub fn eds42(&mut self) -> EDS42_W { - EDS42_W::new(self) + pub fn eds42(&mut self) -> EDS42_W { + EDS42_W::new(self, 10) } #[doc = "Bit 11 - Event detected 43"] #[inline(always)] #[must_use] - pub fn eds43(&mut self) -> EDS43_W { - EDS43_W::new(self) + pub fn eds43(&mut self) -> EDS43_W { + EDS43_W::new(self, 11) } #[doc = "Bit 12 - Event detected 44"] #[inline(always)] #[must_use] - pub fn eds44(&mut self) -> EDS44_W { - EDS44_W::new(self) + pub fn eds44(&mut self) -> EDS44_W { + EDS44_W::new(self, 12) } #[doc = "Bit 13 - Event detected 45"] #[inline(always)] #[must_use] - pub fn eds45(&mut self) -> EDS45_W { - EDS45_W::new(self) + pub fn eds45(&mut self) -> EDS45_W { + EDS45_W::new(self, 13) } #[doc = "Bit 14 - Event detected 46"] #[inline(always)] #[must_use] - pub fn eds46(&mut self) -> EDS46_W { - EDS46_W::new(self) + pub fn eds46(&mut self) -> EDS46_W { + EDS46_W::new(self, 14) } #[doc = "Bit 15 - Event detected 47"] #[inline(always)] #[must_use] - pub fn eds47(&mut self) -> EDS47_W { - EDS47_W::new(self) + pub fn eds47(&mut self) -> EDS47_W { + EDS47_W::new(self, 15) } #[doc = "Bit 16 - Event detected 48"] #[inline(always)] #[must_use] - pub fn eds48(&mut self) -> EDS48_W { - EDS48_W::new(self) + pub fn eds48(&mut self) -> EDS48_W { + EDS48_W::new(self, 16) } #[doc = "Bit 17 - Event detected 49"] #[inline(always)] #[must_use] - pub fn eds49(&mut self) -> EDS49_W { - EDS49_W::new(self) + pub fn eds49(&mut self) -> EDS49_W { + EDS49_W::new(self, 17) } #[doc = "Bit 18 - Event detected 50"] #[inline(always)] #[must_use] - pub fn eds50(&mut self) -> EDS50_W { - EDS50_W::new(self) + pub fn eds50(&mut self) -> EDS50_W { + EDS50_W::new(self, 18) } #[doc = "Bit 19 - Event detected 51"] #[inline(always)] #[must_use] - pub fn eds51(&mut self) -> EDS51_W { - EDS51_W::new(self) + pub fn eds51(&mut self) -> EDS51_W { + EDS51_W::new(self, 19) } #[doc = "Bit 20 - Event detected 52"] #[inline(always)] #[must_use] - pub fn eds52(&mut self) -> EDS52_W { - EDS52_W::new(self) + pub fn eds52(&mut self) -> EDS52_W { + EDS52_W::new(self, 20) } #[doc = "Bit 21 - Event detected 53"] #[inline(always)] #[must_use] - pub fn eds53(&mut self) -> EDS53_W { - EDS53_W::new(self) + pub fn eds53(&mut self) -> EDS53_W { + EDS53_W::new(self, 21) } #[doc = "Bit 22 - Event detected 54"] #[inline(always)] #[must_use] - pub fn eds54(&mut self) -> EDS54_W { - EDS54_W::new(self) + pub fn eds54(&mut self) -> EDS54_W { + EDS54_W::new(self, 22) } #[doc = "Bit 23 - Event detected 55"] #[inline(always)] #[must_use] - pub fn eds55(&mut self) -> EDS55_W { - EDS55_W::new(self) + pub fn eds55(&mut self) -> EDS55_W { + EDS55_W::new(self, 23) } #[doc = "Bit 24 - Event detected 56"] #[inline(always)] #[must_use] - pub fn eds56(&mut self) -> EDS56_W { - EDS56_W::new(self) + pub fn eds56(&mut self) -> EDS56_W { + EDS56_W::new(self, 24) } #[doc = "Bit 25 - Event detected 57"] #[inline(always)] #[must_use] - pub fn eds57(&mut self) -> EDS57_W { - EDS57_W::new(self) + pub fn eds57(&mut self) -> EDS57_W { + EDS57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfen0.rs b/crates/bcm2711-lpa/src/gpio/gpfen0.rs index abcf609..511158e 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfen0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `FEN0` reader - Falling edge enabled 0"] pub type FEN0_R = crate::BitReader; #[doc = "Field `FEN0` writer - Falling edge enabled 0"] -pub type FEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN1` reader - Falling edge enabled 1"] pub type FEN1_R = crate::BitReader; #[doc = "Field `FEN1` writer - Falling edge enabled 1"] -pub type FEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN2` reader - Falling edge enabled 2"] pub type FEN2_R = crate::BitReader; #[doc = "Field `FEN2` writer - Falling edge enabled 2"] -pub type FEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN3` reader - Falling edge enabled 3"] pub type FEN3_R = crate::BitReader; #[doc = "Field `FEN3` writer - Falling edge enabled 3"] -pub type FEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN4` reader - Falling edge enabled 4"] pub type FEN4_R = crate::BitReader; #[doc = "Field `FEN4` writer - Falling edge enabled 4"] -pub type FEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN5` reader - Falling edge enabled 5"] pub type FEN5_R = crate::BitReader; #[doc = "Field `FEN5` writer - Falling edge enabled 5"] -pub type FEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN6` reader - Falling edge enabled 6"] pub type FEN6_R = crate::BitReader; #[doc = "Field `FEN6` writer - Falling edge enabled 6"] -pub type FEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN7` reader - Falling edge enabled 7"] pub type FEN7_R = crate::BitReader; #[doc = "Field `FEN7` writer - Falling edge enabled 7"] -pub type FEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN8` reader - Falling edge enabled 8"] pub type FEN8_R = crate::BitReader; #[doc = "Field `FEN8` writer - Falling edge enabled 8"] -pub type FEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN9` reader - Falling edge enabled 9"] pub type FEN9_R = crate::BitReader; #[doc = "Field `FEN9` writer - Falling edge enabled 9"] -pub type FEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN10` reader - Falling edge enabled 10"] pub type FEN10_R = crate::BitReader; #[doc = "Field `FEN10` writer - Falling edge enabled 10"] -pub type FEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN11` reader - Falling edge enabled 11"] pub type FEN11_R = crate::BitReader; #[doc = "Field `FEN11` writer - Falling edge enabled 11"] -pub type FEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN12` reader - Falling edge enabled 12"] pub type FEN12_R = crate::BitReader; #[doc = "Field `FEN12` writer - Falling edge enabled 12"] -pub type FEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN13` reader - Falling edge enabled 13"] pub type FEN13_R = crate::BitReader; #[doc = "Field `FEN13` writer - Falling edge enabled 13"] -pub type FEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN14` reader - Falling edge enabled 14"] pub type FEN14_R = crate::BitReader; #[doc = "Field `FEN14` writer - Falling edge enabled 14"] -pub type FEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN15` reader - Falling edge enabled 15"] pub type FEN15_R = crate::BitReader; #[doc = "Field `FEN15` writer - Falling edge enabled 15"] -pub type FEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN16` reader - Falling edge enabled 16"] pub type FEN16_R = crate::BitReader; #[doc = "Field `FEN16` writer - Falling edge enabled 16"] -pub type FEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN17` reader - Falling edge enabled 17"] pub type FEN17_R = crate::BitReader; #[doc = "Field `FEN17` writer - Falling edge enabled 17"] -pub type FEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN18` reader - Falling edge enabled 18"] pub type FEN18_R = crate::BitReader; #[doc = "Field `FEN18` writer - Falling edge enabled 18"] -pub type FEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN19` reader - Falling edge enabled 19"] pub type FEN19_R = crate::BitReader; #[doc = "Field `FEN19` writer - Falling edge enabled 19"] -pub type FEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN20` reader - Falling edge enabled 20"] pub type FEN20_R = crate::BitReader; #[doc = "Field `FEN20` writer - Falling edge enabled 20"] -pub type FEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN21` reader - Falling edge enabled 21"] pub type FEN21_R = crate::BitReader; #[doc = "Field `FEN21` writer - Falling edge enabled 21"] -pub type FEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN22` reader - Falling edge enabled 22"] pub type FEN22_R = crate::BitReader; #[doc = "Field `FEN22` writer - Falling edge enabled 22"] -pub type FEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN23` reader - Falling edge enabled 23"] pub type FEN23_R = crate::BitReader; #[doc = "Field `FEN23` writer - Falling edge enabled 23"] -pub type FEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN24` reader - Falling edge enabled 24"] pub type FEN24_R = crate::BitReader; #[doc = "Field `FEN24` writer - Falling edge enabled 24"] -pub type FEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN25` reader - Falling edge enabled 25"] pub type FEN25_R = crate::BitReader; #[doc = "Field `FEN25` writer - Falling edge enabled 25"] -pub type FEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN26` reader - Falling edge enabled 26"] pub type FEN26_R = crate::BitReader; #[doc = "Field `FEN26` writer - Falling edge enabled 26"] -pub type FEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN27` reader - Falling edge enabled 27"] pub type FEN27_R = crate::BitReader; #[doc = "Field `FEN27` writer - Falling edge enabled 27"] -pub type FEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN28` reader - Falling edge enabled 28"] pub type FEN28_R = crate::BitReader; #[doc = "Field `FEN28` writer - Falling edge enabled 28"] -pub type FEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN29` reader - Falling edge enabled 29"] pub type FEN29_R = crate::BitReader; #[doc = "Field `FEN29` writer - Falling edge enabled 29"] -pub type FEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN30` reader - Falling edge enabled 30"] pub type FEN30_R = crate::BitReader; #[doc = "Field `FEN30` writer - Falling edge enabled 30"] -pub type FEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN31` reader - Falling edge enabled 31"] pub type FEN31_R = crate::BitReader; #[doc = "Field `FEN31` writer - Falling edge enabled 31"] -pub type FEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Falling edge enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Falling edge enabled 0"] #[inline(always)] #[must_use] - pub fn fen0(&mut self) -> FEN0_W { - FEN0_W::new(self) + pub fn fen0(&mut self) -> FEN0_W { + FEN0_W::new(self, 0) } #[doc = "Bit 1 - Falling edge enabled 1"] #[inline(always)] #[must_use] - pub fn fen1(&mut self) -> FEN1_W { - FEN1_W::new(self) + pub fn fen1(&mut self) -> FEN1_W { + FEN1_W::new(self, 1) } #[doc = "Bit 2 - Falling edge enabled 2"] #[inline(always)] #[must_use] - pub fn fen2(&mut self) -> FEN2_W { - FEN2_W::new(self) + pub fn fen2(&mut self) -> FEN2_W { + FEN2_W::new(self, 2) } #[doc = "Bit 3 - Falling edge enabled 3"] #[inline(always)] #[must_use] - pub fn fen3(&mut self) -> FEN3_W { - FEN3_W::new(self) + pub fn fen3(&mut self) -> FEN3_W { + FEN3_W::new(self, 3) } #[doc = "Bit 4 - Falling edge enabled 4"] #[inline(always)] #[must_use] - pub fn fen4(&mut self) -> FEN4_W { - FEN4_W::new(self) + pub fn fen4(&mut self) -> FEN4_W { + FEN4_W::new(self, 4) } #[doc = "Bit 5 - Falling edge enabled 5"] #[inline(always)] #[must_use] - pub fn fen5(&mut self) -> FEN5_W { - FEN5_W::new(self) + pub fn fen5(&mut self) -> FEN5_W { + FEN5_W::new(self, 5) } #[doc = "Bit 6 - Falling edge enabled 6"] #[inline(always)] #[must_use] - pub fn fen6(&mut self) -> FEN6_W { - FEN6_W::new(self) + pub fn fen6(&mut self) -> FEN6_W { + FEN6_W::new(self, 6) } #[doc = "Bit 7 - Falling edge enabled 7"] #[inline(always)] #[must_use] - pub fn fen7(&mut self) -> FEN7_W { - FEN7_W::new(self) + pub fn fen7(&mut self) -> FEN7_W { + FEN7_W::new(self, 7) } #[doc = "Bit 8 - Falling edge enabled 8"] #[inline(always)] #[must_use] - pub fn fen8(&mut self) -> FEN8_W { - FEN8_W::new(self) + pub fn fen8(&mut self) -> FEN8_W { + FEN8_W::new(self, 8) } #[doc = "Bit 9 - Falling edge enabled 9"] #[inline(always)] #[must_use] - pub fn fen9(&mut self) -> FEN9_W { - FEN9_W::new(self) + pub fn fen9(&mut self) -> FEN9_W { + FEN9_W::new(self, 9) } #[doc = "Bit 10 - Falling edge enabled 10"] #[inline(always)] #[must_use] - pub fn fen10(&mut self) -> FEN10_W { - FEN10_W::new(self) + pub fn fen10(&mut self) -> FEN10_W { + FEN10_W::new(self, 10) } #[doc = "Bit 11 - Falling edge enabled 11"] #[inline(always)] #[must_use] - pub fn fen11(&mut self) -> FEN11_W { - FEN11_W::new(self) + pub fn fen11(&mut self) -> FEN11_W { + FEN11_W::new(self, 11) } #[doc = "Bit 12 - Falling edge enabled 12"] #[inline(always)] #[must_use] - pub fn fen12(&mut self) -> FEN12_W { - FEN12_W::new(self) + pub fn fen12(&mut self) -> FEN12_W { + FEN12_W::new(self, 12) } #[doc = "Bit 13 - Falling edge enabled 13"] #[inline(always)] #[must_use] - pub fn fen13(&mut self) -> FEN13_W { - FEN13_W::new(self) + pub fn fen13(&mut self) -> FEN13_W { + FEN13_W::new(self, 13) } #[doc = "Bit 14 - Falling edge enabled 14"] #[inline(always)] #[must_use] - pub fn fen14(&mut self) -> FEN14_W { - FEN14_W::new(self) + pub fn fen14(&mut self) -> FEN14_W { + FEN14_W::new(self, 14) } #[doc = "Bit 15 - Falling edge enabled 15"] #[inline(always)] #[must_use] - pub fn fen15(&mut self) -> FEN15_W { - FEN15_W::new(self) + pub fn fen15(&mut self) -> FEN15_W { + FEN15_W::new(self, 15) } #[doc = "Bit 16 - Falling edge enabled 16"] #[inline(always)] #[must_use] - pub fn fen16(&mut self) -> FEN16_W { - FEN16_W::new(self) + pub fn fen16(&mut self) -> FEN16_W { + FEN16_W::new(self, 16) } #[doc = "Bit 17 - Falling edge enabled 17"] #[inline(always)] #[must_use] - pub fn fen17(&mut self) -> FEN17_W { - FEN17_W::new(self) + pub fn fen17(&mut self) -> FEN17_W { + FEN17_W::new(self, 17) } #[doc = "Bit 18 - Falling edge enabled 18"] #[inline(always)] #[must_use] - pub fn fen18(&mut self) -> FEN18_W { - FEN18_W::new(self) + pub fn fen18(&mut self) -> FEN18_W { + FEN18_W::new(self, 18) } #[doc = "Bit 19 - Falling edge enabled 19"] #[inline(always)] #[must_use] - pub fn fen19(&mut self) -> FEN19_W { - FEN19_W::new(self) + pub fn fen19(&mut self) -> FEN19_W { + FEN19_W::new(self, 19) } #[doc = "Bit 20 - Falling edge enabled 20"] #[inline(always)] #[must_use] - pub fn fen20(&mut self) -> FEN20_W { - FEN20_W::new(self) + pub fn fen20(&mut self) -> FEN20_W { + FEN20_W::new(self, 20) } #[doc = "Bit 21 - Falling edge enabled 21"] #[inline(always)] #[must_use] - pub fn fen21(&mut self) -> FEN21_W { - FEN21_W::new(self) + pub fn fen21(&mut self) -> FEN21_W { + FEN21_W::new(self, 21) } #[doc = "Bit 22 - Falling edge enabled 22"] #[inline(always)] #[must_use] - pub fn fen22(&mut self) -> FEN22_W { - FEN22_W::new(self) + pub fn fen22(&mut self) -> FEN22_W { + FEN22_W::new(self, 22) } #[doc = "Bit 23 - Falling edge enabled 23"] #[inline(always)] #[must_use] - pub fn fen23(&mut self) -> FEN23_W { - FEN23_W::new(self) + pub fn fen23(&mut self) -> FEN23_W { + FEN23_W::new(self, 23) } #[doc = "Bit 24 - Falling edge enabled 24"] #[inline(always)] #[must_use] - pub fn fen24(&mut self) -> FEN24_W { - FEN24_W::new(self) + pub fn fen24(&mut self) -> FEN24_W { + FEN24_W::new(self, 24) } #[doc = "Bit 25 - Falling edge enabled 25"] #[inline(always)] #[must_use] - pub fn fen25(&mut self) -> FEN25_W { - FEN25_W::new(self) + pub fn fen25(&mut self) -> FEN25_W { + FEN25_W::new(self, 25) } #[doc = "Bit 26 - Falling edge enabled 26"] #[inline(always)] #[must_use] - pub fn fen26(&mut self) -> FEN26_W { - FEN26_W::new(self) + pub fn fen26(&mut self) -> FEN26_W { + FEN26_W::new(self, 26) } #[doc = "Bit 27 - Falling edge enabled 27"] #[inline(always)] #[must_use] - pub fn fen27(&mut self) -> FEN27_W { - FEN27_W::new(self) + pub fn fen27(&mut self) -> FEN27_W { + FEN27_W::new(self, 27) } #[doc = "Bit 28 - Falling edge enabled 28"] #[inline(always)] #[must_use] - pub fn fen28(&mut self) -> FEN28_W { - FEN28_W::new(self) + pub fn fen28(&mut self) -> FEN28_W { + FEN28_W::new(self, 28) } #[doc = "Bit 29 - Falling edge enabled 29"] #[inline(always)] #[must_use] - pub fn fen29(&mut self) -> FEN29_W { - FEN29_W::new(self) + pub fn fen29(&mut self) -> FEN29_W { + FEN29_W::new(self, 29) } #[doc = "Bit 30 - Falling edge enabled 30"] #[inline(always)] #[must_use] - pub fn fen30(&mut self) -> FEN30_W { - FEN30_W::new(self) + pub fn fen30(&mut self) -> FEN30_W { + FEN30_W::new(self, 30) } #[doc = "Bit 31 - Falling edge enabled 31"] #[inline(always)] #[must_use] - pub fn fen31(&mut self) -> FEN31_W { - FEN31_W::new(self) + pub fn fen31(&mut self) -> FEN31_W { + FEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfen1.rs b/crates/bcm2711-lpa/src/gpio/gpfen1.rs index becc880..e63bcf5 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfen1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfen1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `FEN32` reader - Falling edge enabled 32"] pub type FEN32_R = crate::BitReader; #[doc = "Field `FEN32` writer - Falling edge enabled 32"] -pub type FEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN33` reader - Falling edge enabled 33"] pub type FEN33_R = crate::BitReader; #[doc = "Field `FEN33` writer - Falling edge enabled 33"] -pub type FEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN34` reader - Falling edge enabled 34"] pub type FEN34_R = crate::BitReader; #[doc = "Field `FEN34` writer - Falling edge enabled 34"] -pub type FEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN35` reader - Falling edge enabled 35"] pub type FEN35_R = crate::BitReader; #[doc = "Field `FEN35` writer - Falling edge enabled 35"] -pub type FEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN36` reader - Falling edge enabled 36"] pub type FEN36_R = crate::BitReader; #[doc = "Field `FEN36` writer - Falling edge enabled 36"] -pub type FEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN37` reader - Falling edge enabled 37"] pub type FEN37_R = crate::BitReader; #[doc = "Field `FEN37` writer - Falling edge enabled 37"] -pub type FEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN38` reader - Falling edge enabled 38"] pub type FEN38_R = crate::BitReader; #[doc = "Field `FEN38` writer - Falling edge enabled 38"] -pub type FEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN39` reader - Falling edge enabled 39"] pub type FEN39_R = crate::BitReader; #[doc = "Field `FEN39` writer - Falling edge enabled 39"] -pub type FEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN40` reader - Falling edge enabled 40"] pub type FEN40_R = crate::BitReader; #[doc = "Field `FEN40` writer - Falling edge enabled 40"] -pub type FEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN41` reader - Falling edge enabled 41"] pub type FEN41_R = crate::BitReader; #[doc = "Field `FEN41` writer - Falling edge enabled 41"] -pub type FEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN42` reader - Falling edge enabled 42"] pub type FEN42_R = crate::BitReader; #[doc = "Field `FEN42` writer - Falling edge enabled 42"] -pub type FEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN43` reader - Falling edge enabled 43"] pub type FEN43_R = crate::BitReader; #[doc = "Field `FEN43` writer - Falling edge enabled 43"] -pub type FEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN44` reader - Falling edge enabled 44"] pub type FEN44_R = crate::BitReader; #[doc = "Field `FEN44` writer - Falling edge enabled 44"] -pub type FEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN45` reader - Falling edge enabled 45"] pub type FEN45_R = crate::BitReader; #[doc = "Field `FEN45` writer - Falling edge enabled 45"] -pub type FEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN46` reader - Falling edge enabled 46"] pub type FEN46_R = crate::BitReader; #[doc = "Field `FEN46` writer - Falling edge enabled 46"] -pub type FEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN47` reader - Falling edge enabled 47"] pub type FEN47_R = crate::BitReader; #[doc = "Field `FEN47` writer - Falling edge enabled 47"] -pub type FEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN48` reader - Falling edge enabled 48"] pub type FEN48_R = crate::BitReader; #[doc = "Field `FEN48` writer - Falling edge enabled 48"] -pub type FEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN49` reader - Falling edge enabled 49"] pub type FEN49_R = crate::BitReader; #[doc = "Field `FEN49` writer - Falling edge enabled 49"] -pub type FEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN50` reader - Falling edge enabled 50"] pub type FEN50_R = crate::BitReader; #[doc = "Field `FEN50` writer - Falling edge enabled 50"] -pub type FEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN51` reader - Falling edge enabled 51"] pub type FEN51_R = crate::BitReader; #[doc = "Field `FEN51` writer - Falling edge enabled 51"] -pub type FEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN52` reader - Falling edge enabled 52"] pub type FEN52_R = crate::BitReader; #[doc = "Field `FEN52` writer - Falling edge enabled 52"] -pub type FEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN53` reader - Falling edge enabled 53"] pub type FEN53_R = crate::BitReader; #[doc = "Field `FEN53` writer - Falling edge enabled 53"] -pub type FEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN54` reader - Falling edge enabled 54"] pub type FEN54_R = crate::BitReader; #[doc = "Field `FEN54` writer - Falling edge enabled 54"] -pub type FEN54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN55` reader - Falling edge enabled 55"] pub type FEN55_R = crate::BitReader; #[doc = "Field `FEN55` writer - Falling edge enabled 55"] -pub type FEN55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN56` reader - Falling edge enabled 56"] pub type FEN56_R = crate::BitReader; #[doc = "Field `FEN56` writer - Falling edge enabled 56"] -pub type FEN56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN57` reader - Falling edge enabled 57"] pub type FEN57_R = crate::BitReader; #[doc = "Field `FEN57` writer - Falling edge enabled 57"] -pub type FEN57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN57_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Falling edge enabled 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Falling edge enabled 32"] #[inline(always)] #[must_use] - pub fn fen32(&mut self) -> FEN32_W { - FEN32_W::new(self) + pub fn fen32(&mut self) -> FEN32_W { + FEN32_W::new(self, 0) } #[doc = "Bit 1 - Falling edge enabled 33"] #[inline(always)] #[must_use] - pub fn fen33(&mut self) -> FEN33_W { - FEN33_W::new(self) + pub fn fen33(&mut self) -> FEN33_W { + FEN33_W::new(self, 1) } #[doc = "Bit 2 - Falling edge enabled 34"] #[inline(always)] #[must_use] - pub fn fen34(&mut self) -> FEN34_W { - FEN34_W::new(self) + pub fn fen34(&mut self) -> FEN34_W { + FEN34_W::new(self, 2) } #[doc = "Bit 3 - Falling edge enabled 35"] #[inline(always)] #[must_use] - pub fn fen35(&mut self) -> FEN35_W { - FEN35_W::new(self) + pub fn fen35(&mut self) -> FEN35_W { + FEN35_W::new(self, 3) } #[doc = "Bit 4 - Falling edge enabled 36"] #[inline(always)] #[must_use] - pub fn fen36(&mut self) -> FEN36_W { - FEN36_W::new(self) + pub fn fen36(&mut self) -> FEN36_W { + FEN36_W::new(self, 4) } #[doc = "Bit 5 - Falling edge enabled 37"] #[inline(always)] #[must_use] - pub fn fen37(&mut self) -> FEN37_W { - FEN37_W::new(self) + pub fn fen37(&mut self) -> FEN37_W { + FEN37_W::new(self, 5) } #[doc = "Bit 6 - Falling edge enabled 38"] #[inline(always)] #[must_use] - pub fn fen38(&mut self) -> FEN38_W { - FEN38_W::new(self) + pub fn fen38(&mut self) -> FEN38_W { + FEN38_W::new(self, 6) } #[doc = "Bit 7 - Falling edge enabled 39"] #[inline(always)] #[must_use] - pub fn fen39(&mut self) -> FEN39_W { - FEN39_W::new(self) + pub fn fen39(&mut self) -> FEN39_W { + FEN39_W::new(self, 7) } #[doc = "Bit 8 - Falling edge enabled 40"] #[inline(always)] #[must_use] - pub fn fen40(&mut self) -> FEN40_W { - FEN40_W::new(self) + pub fn fen40(&mut self) -> FEN40_W { + FEN40_W::new(self, 8) } #[doc = "Bit 9 - Falling edge enabled 41"] #[inline(always)] #[must_use] - pub fn fen41(&mut self) -> FEN41_W { - FEN41_W::new(self) + pub fn fen41(&mut self) -> FEN41_W { + FEN41_W::new(self, 9) } #[doc = "Bit 10 - Falling edge enabled 42"] #[inline(always)] #[must_use] - pub fn fen42(&mut self) -> FEN42_W { - FEN42_W::new(self) + pub fn fen42(&mut self) -> FEN42_W { + FEN42_W::new(self, 10) } #[doc = "Bit 11 - Falling edge enabled 43"] #[inline(always)] #[must_use] - pub fn fen43(&mut self) -> FEN43_W { - FEN43_W::new(self) + pub fn fen43(&mut self) -> FEN43_W { + FEN43_W::new(self, 11) } #[doc = "Bit 12 - Falling edge enabled 44"] #[inline(always)] #[must_use] - pub fn fen44(&mut self) -> FEN44_W { - FEN44_W::new(self) + pub fn fen44(&mut self) -> FEN44_W { + FEN44_W::new(self, 12) } #[doc = "Bit 13 - Falling edge enabled 45"] #[inline(always)] #[must_use] - pub fn fen45(&mut self) -> FEN45_W { - FEN45_W::new(self) + pub fn fen45(&mut self) -> FEN45_W { + FEN45_W::new(self, 13) } #[doc = "Bit 14 - Falling edge enabled 46"] #[inline(always)] #[must_use] - pub fn fen46(&mut self) -> FEN46_W { - FEN46_W::new(self) + pub fn fen46(&mut self) -> FEN46_W { + FEN46_W::new(self, 14) } #[doc = "Bit 15 - Falling edge enabled 47"] #[inline(always)] #[must_use] - pub fn fen47(&mut self) -> FEN47_W { - FEN47_W::new(self) + pub fn fen47(&mut self) -> FEN47_W { + FEN47_W::new(self, 15) } #[doc = "Bit 16 - Falling edge enabled 48"] #[inline(always)] #[must_use] - pub fn fen48(&mut self) -> FEN48_W { - FEN48_W::new(self) + pub fn fen48(&mut self) -> FEN48_W { + FEN48_W::new(self, 16) } #[doc = "Bit 17 - Falling edge enabled 49"] #[inline(always)] #[must_use] - pub fn fen49(&mut self) -> FEN49_W { - FEN49_W::new(self) + pub fn fen49(&mut self) -> FEN49_W { + FEN49_W::new(self, 17) } #[doc = "Bit 18 - Falling edge enabled 50"] #[inline(always)] #[must_use] - pub fn fen50(&mut self) -> FEN50_W { - FEN50_W::new(self) + pub fn fen50(&mut self) -> FEN50_W { + FEN50_W::new(self, 18) } #[doc = "Bit 19 - Falling edge enabled 51"] #[inline(always)] #[must_use] - pub fn fen51(&mut self) -> FEN51_W { - FEN51_W::new(self) + pub fn fen51(&mut self) -> FEN51_W { + FEN51_W::new(self, 19) } #[doc = "Bit 20 - Falling edge enabled 52"] #[inline(always)] #[must_use] - pub fn fen52(&mut self) -> FEN52_W { - FEN52_W::new(self) + pub fn fen52(&mut self) -> FEN52_W { + FEN52_W::new(self, 20) } #[doc = "Bit 21 - Falling edge enabled 53"] #[inline(always)] #[must_use] - pub fn fen53(&mut self) -> FEN53_W { - FEN53_W::new(self) + pub fn fen53(&mut self) -> FEN53_W { + FEN53_W::new(self, 21) } #[doc = "Bit 22 - Falling edge enabled 54"] #[inline(always)] #[must_use] - pub fn fen54(&mut self) -> FEN54_W { - FEN54_W::new(self) + pub fn fen54(&mut self) -> FEN54_W { + FEN54_W::new(self, 22) } #[doc = "Bit 23 - Falling edge enabled 55"] #[inline(always)] #[must_use] - pub fn fen55(&mut self) -> FEN55_W { - FEN55_W::new(self) + pub fn fen55(&mut self) -> FEN55_W { + FEN55_W::new(self, 23) } #[doc = "Bit 24 - Falling edge enabled 56"] #[inline(always)] #[must_use] - pub fn fen56(&mut self) -> FEN56_W { - FEN56_W::new(self) + pub fn fen56(&mut self) -> FEN56_W { + FEN56_W::new(self, 24) } #[doc = "Bit 25 - Falling edge enabled 57"] #[inline(always)] #[must_use] - pub fn fen57(&mut self) -> FEN57_W { - FEN57_W::new(self) + pub fn fen57(&mut self) -> FEN57_W { + FEN57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfsel0.rs b/crates/bcm2711-lpa/src/gpio/gpfsel0.rs index f418e9e..359d81b 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfsel0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfsel0.rs @@ -92,8 +92,8 @@ impl FSEL0_R { } } #[doc = "Field `FSEL0` writer - Function Select 0"] -pub type FSEL0_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL0_A>; -impl<'a, REG, const O: u8> FSEL0_W<'a, REG, O> +pub type FSEL0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL0_A>; +impl<'a, REG> FSEL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL1_R { } } #[doc = "Field `FSEL1` writer - Function Select 1"] -pub type FSEL1_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL1_A>; -impl<'a, REG, const O: u8> FSEL1_W<'a, REG, O> +pub type FSEL1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL1_A>; +impl<'a, REG> FSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL2_R { } } #[doc = "Field `FSEL2` writer - Function Select 2"] -pub type FSEL2_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL2_A>; -impl<'a, REG, const O: u8> FSEL2_W<'a, REG, O> +pub type FSEL2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL2_A>; +impl<'a, REG> FSEL2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL3_R { } } #[doc = "Field `FSEL3` writer - Function Select 3"] -pub type FSEL3_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL3_A>; -impl<'a, REG, const O: u8> FSEL3_W<'a, REG, O> +pub type FSEL3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL3_A>; +impl<'a, REG> FSEL3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL4_R { } } #[doc = "Field `FSEL4` writer - Function Select 4"] -pub type FSEL4_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL4_A>; -impl<'a, REG, const O: u8> FSEL4_W<'a, REG, O> +pub type FSEL4_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL4_A>; +impl<'a, REG> FSEL4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL5_R { } } #[doc = "Field `FSEL5` writer - Function Select 5"] -pub type FSEL5_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL5_A>; -impl<'a, REG, const O: u8> FSEL5_W<'a, REG, O> +pub type FSEL5_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL5_A>; +impl<'a, REG> FSEL5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL6_R { } } #[doc = "Field `FSEL6` writer - Function Select 6"] -pub type FSEL6_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL6_A>; -impl<'a, REG, const O: u8> FSEL6_W<'a, REG, O> +pub type FSEL6_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL6_A>; +impl<'a, REG> FSEL6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL7_R { } } #[doc = "Field `FSEL7` writer - Function Select 7"] -pub type FSEL7_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL7_A>; -impl<'a, REG, const O: u8> FSEL7_W<'a, REG, O> +pub type FSEL7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL7_A>; +impl<'a, REG> FSEL7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL8_R { } } #[doc = "Field `FSEL8` writer - Function Select 8"] -pub type FSEL8_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL8_A>; -impl<'a, REG, const O: u8> FSEL8_W<'a, REG, O> +pub type FSEL8_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL8_A>; +impl<'a, REG> FSEL8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL9_R { } } #[doc = "Field `FSEL9` writer - Function Select 9"] -pub type FSEL9_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL9_A>; -impl<'a, REG, const O: u8> FSEL9_W<'a, REG, O> +pub type FSEL9_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL9_A>; +impl<'a, REG> FSEL9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 0"] #[inline(always)] #[must_use] - pub fn fsel0(&mut self) -> FSEL0_W { - FSEL0_W::new(self) + pub fn fsel0(&mut self) -> FSEL0_W { + FSEL0_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 1"] #[inline(always)] #[must_use] - pub fn fsel1(&mut self) -> FSEL1_W { - FSEL1_W::new(self) + pub fn fsel1(&mut self) -> FSEL1_W { + FSEL1_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 2"] #[inline(always)] #[must_use] - pub fn fsel2(&mut self) -> FSEL2_W { - FSEL2_W::new(self) + pub fn fsel2(&mut self) -> FSEL2_W { + FSEL2_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 3"] #[inline(always)] #[must_use] - pub fn fsel3(&mut self) -> FSEL3_W { - FSEL3_W::new(self) + pub fn fsel3(&mut self) -> FSEL3_W { + FSEL3_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 4"] #[inline(always)] #[must_use] - pub fn fsel4(&mut self) -> FSEL4_W { - FSEL4_W::new(self) + pub fn fsel4(&mut self) -> FSEL4_W { + FSEL4_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 5"] #[inline(always)] #[must_use] - pub fn fsel5(&mut self) -> FSEL5_W { - FSEL5_W::new(self) + pub fn fsel5(&mut self) -> FSEL5_W { + FSEL5_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 6"] #[inline(always)] #[must_use] - pub fn fsel6(&mut self) -> FSEL6_W { - FSEL6_W::new(self) + pub fn fsel6(&mut self) -> FSEL6_W { + FSEL6_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 7"] #[inline(always)] #[must_use] - pub fn fsel7(&mut self) -> FSEL7_W { - FSEL7_W::new(self) + pub fn fsel7(&mut self) -> FSEL7_W { + FSEL7_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 8"] #[inline(always)] #[must_use] - pub fn fsel8(&mut self) -> FSEL8_W { - FSEL8_W::new(self) + pub fn fsel8(&mut self) -> FSEL8_W { + FSEL8_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 9"] #[inline(always)] #[must_use] - pub fn fsel9(&mut self) -> FSEL9_W { - FSEL9_W::new(self) + pub fn fsel9(&mut self) -> FSEL9_W { + FSEL9_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfsel1.rs b/crates/bcm2711-lpa/src/gpio/gpfsel1.rs index 939c0b4..38bb7e0 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfsel1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfsel1.rs @@ -92,8 +92,8 @@ impl FSEL10_R { } } #[doc = "Field `FSEL10` writer - Function Select 10"] -pub type FSEL10_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL10_A>; -impl<'a, REG, const O: u8> FSEL10_W<'a, REG, O> +pub type FSEL10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL10_A>; +impl<'a, REG> FSEL10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL11_R { } } #[doc = "Field `FSEL11` writer - Function Select 11"] -pub type FSEL11_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL11_A>; -impl<'a, REG, const O: u8> FSEL11_W<'a, REG, O> +pub type FSEL11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL11_A>; +impl<'a, REG> FSEL11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL12_R { } } #[doc = "Field `FSEL12` writer - Function Select 12"] -pub type FSEL12_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL12_A>; -impl<'a, REG, const O: u8> FSEL12_W<'a, REG, O> +pub type FSEL12_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL12_A>; +impl<'a, REG> FSEL12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL13_R { } } #[doc = "Field `FSEL13` writer - Function Select 13"] -pub type FSEL13_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL13_A>; -impl<'a, REG, const O: u8> FSEL13_W<'a, REG, O> +pub type FSEL13_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL13_A>; +impl<'a, REG> FSEL13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL14_R { } } #[doc = "Field `FSEL14` writer - Function Select 14"] -pub type FSEL14_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL14_A>; -impl<'a, REG, const O: u8> FSEL14_W<'a, REG, O> +pub type FSEL14_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL14_A>; +impl<'a, REG> FSEL14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL15_R { } } #[doc = "Field `FSEL15` writer - Function Select 15"] -pub type FSEL15_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL15_A>; -impl<'a, REG, const O: u8> FSEL15_W<'a, REG, O> +pub type FSEL15_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL15_A>; +impl<'a, REG> FSEL15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL16_R { } } #[doc = "Field `FSEL16` writer - Function Select 16"] -pub type FSEL16_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL16_A>; -impl<'a, REG, const O: u8> FSEL16_W<'a, REG, O> +pub type FSEL16_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL16_A>; +impl<'a, REG> FSEL16_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL17_R { } } #[doc = "Field `FSEL17` writer - Function Select 17"] -pub type FSEL17_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL17_A>; -impl<'a, REG, const O: u8> FSEL17_W<'a, REG, O> +pub type FSEL17_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL17_A>; +impl<'a, REG> FSEL17_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL18_R { } } #[doc = "Field `FSEL18` writer - Function Select 18"] -pub type FSEL18_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL18_A>; -impl<'a, REG, const O: u8> FSEL18_W<'a, REG, O> +pub type FSEL18_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL18_A>; +impl<'a, REG> FSEL18_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL19_R { } } #[doc = "Field `FSEL19` writer - Function Select 19"] -pub type FSEL19_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL19_A>; -impl<'a, REG, const O: u8> FSEL19_W<'a, REG, O> +pub type FSEL19_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL19_A>; +impl<'a, REG> FSEL19_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 10"] #[inline(always)] #[must_use] - pub fn fsel10(&mut self) -> FSEL10_W { - FSEL10_W::new(self) + pub fn fsel10(&mut self) -> FSEL10_W { + FSEL10_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 11"] #[inline(always)] #[must_use] - pub fn fsel11(&mut self) -> FSEL11_W { - FSEL11_W::new(self) + pub fn fsel11(&mut self) -> FSEL11_W { + FSEL11_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 12"] #[inline(always)] #[must_use] - pub fn fsel12(&mut self) -> FSEL12_W { - FSEL12_W::new(self) + pub fn fsel12(&mut self) -> FSEL12_W { + FSEL12_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 13"] #[inline(always)] #[must_use] - pub fn fsel13(&mut self) -> FSEL13_W { - FSEL13_W::new(self) + pub fn fsel13(&mut self) -> FSEL13_W { + FSEL13_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 14"] #[inline(always)] #[must_use] - pub fn fsel14(&mut self) -> FSEL14_W { - FSEL14_W::new(self) + pub fn fsel14(&mut self) -> FSEL14_W { + FSEL14_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 15"] #[inline(always)] #[must_use] - pub fn fsel15(&mut self) -> FSEL15_W { - FSEL15_W::new(self) + pub fn fsel15(&mut self) -> FSEL15_W { + FSEL15_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 16"] #[inline(always)] #[must_use] - pub fn fsel16(&mut self) -> FSEL16_W { - FSEL16_W::new(self) + pub fn fsel16(&mut self) -> FSEL16_W { + FSEL16_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 17"] #[inline(always)] #[must_use] - pub fn fsel17(&mut self) -> FSEL17_W { - FSEL17_W::new(self) + pub fn fsel17(&mut self) -> FSEL17_W { + FSEL17_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 18"] #[inline(always)] #[must_use] - pub fn fsel18(&mut self) -> FSEL18_W { - FSEL18_W::new(self) + pub fn fsel18(&mut self) -> FSEL18_W { + FSEL18_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 19"] #[inline(always)] #[must_use] - pub fn fsel19(&mut self) -> FSEL19_W { - FSEL19_W::new(self) + pub fn fsel19(&mut self) -> FSEL19_W { + FSEL19_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfsel2.rs b/crates/bcm2711-lpa/src/gpio/gpfsel2.rs index a9af1e5..cdcb0b7 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfsel2.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfsel2.rs @@ -92,8 +92,8 @@ impl FSEL20_R { } } #[doc = "Field `FSEL20` writer - Function Select 20"] -pub type FSEL20_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL20_A>; -impl<'a, REG, const O: u8> FSEL20_W<'a, REG, O> +pub type FSEL20_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL20_A>; +impl<'a, REG> FSEL20_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL21_R { } } #[doc = "Field `FSEL21` writer - Function Select 21"] -pub type FSEL21_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL21_A>; -impl<'a, REG, const O: u8> FSEL21_W<'a, REG, O> +pub type FSEL21_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL21_A>; +impl<'a, REG> FSEL21_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL22_R { } } #[doc = "Field `FSEL22` writer - Function Select 22"] -pub type FSEL22_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL22_A>; -impl<'a, REG, const O: u8> FSEL22_W<'a, REG, O> +pub type FSEL22_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL22_A>; +impl<'a, REG> FSEL22_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL23_R { } } #[doc = "Field `FSEL23` writer - Function Select 23"] -pub type FSEL23_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL23_A>; -impl<'a, REG, const O: u8> FSEL23_W<'a, REG, O> +pub type FSEL23_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL23_A>; +impl<'a, REG> FSEL23_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL24_R { } } #[doc = "Field `FSEL24` writer - Function Select 24"] -pub type FSEL24_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL24_A>; -impl<'a, REG, const O: u8> FSEL24_W<'a, REG, O> +pub type FSEL24_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL24_A>; +impl<'a, REG> FSEL24_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL25_R { } } #[doc = "Field `FSEL25` writer - Function Select 25"] -pub type FSEL25_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL25_A>; -impl<'a, REG, const O: u8> FSEL25_W<'a, REG, O> +pub type FSEL25_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL25_A>; +impl<'a, REG> FSEL25_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL26_R { } } #[doc = "Field `FSEL26` writer - Function Select 26"] -pub type FSEL26_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL26_A>; -impl<'a, REG, const O: u8> FSEL26_W<'a, REG, O> +pub type FSEL26_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL26_A>; +impl<'a, REG> FSEL26_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL27_R { } } #[doc = "Field `FSEL27` writer - Function Select 27"] -pub type FSEL27_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL27_A>; -impl<'a, REG, const O: u8> FSEL27_W<'a, REG, O> +pub type FSEL27_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL27_A>; +impl<'a, REG> FSEL27_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL28_R { } } #[doc = "Field `FSEL28` writer - Function Select 28"] -pub type FSEL28_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL28_A>; -impl<'a, REG, const O: u8> FSEL28_W<'a, REG, O> +pub type FSEL28_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL28_A>; +impl<'a, REG> FSEL28_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL29_R { } } #[doc = "Field `FSEL29` writer - Function Select 29"] -pub type FSEL29_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL29_A>; -impl<'a, REG, const O: u8> FSEL29_W<'a, REG, O> +pub type FSEL29_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL29_A>; +impl<'a, REG> FSEL29_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 20"] #[inline(always)] #[must_use] - pub fn fsel20(&mut self) -> FSEL20_W { - FSEL20_W::new(self) + pub fn fsel20(&mut self) -> FSEL20_W { + FSEL20_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 21"] #[inline(always)] #[must_use] - pub fn fsel21(&mut self) -> FSEL21_W { - FSEL21_W::new(self) + pub fn fsel21(&mut self) -> FSEL21_W { + FSEL21_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 22"] #[inline(always)] #[must_use] - pub fn fsel22(&mut self) -> FSEL22_W { - FSEL22_W::new(self) + pub fn fsel22(&mut self) -> FSEL22_W { + FSEL22_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 23"] #[inline(always)] #[must_use] - pub fn fsel23(&mut self) -> FSEL23_W { - FSEL23_W::new(self) + pub fn fsel23(&mut self) -> FSEL23_W { + FSEL23_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 24"] #[inline(always)] #[must_use] - pub fn fsel24(&mut self) -> FSEL24_W { - FSEL24_W::new(self) + pub fn fsel24(&mut self) -> FSEL24_W { + FSEL24_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 25"] #[inline(always)] #[must_use] - pub fn fsel25(&mut self) -> FSEL25_W { - FSEL25_W::new(self) + pub fn fsel25(&mut self) -> FSEL25_W { + FSEL25_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 26"] #[inline(always)] #[must_use] - pub fn fsel26(&mut self) -> FSEL26_W { - FSEL26_W::new(self) + pub fn fsel26(&mut self) -> FSEL26_W { + FSEL26_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 27"] #[inline(always)] #[must_use] - pub fn fsel27(&mut self) -> FSEL27_W { - FSEL27_W::new(self) + pub fn fsel27(&mut self) -> FSEL27_W { + FSEL27_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 28"] #[inline(always)] #[must_use] - pub fn fsel28(&mut self) -> FSEL28_W { - FSEL28_W::new(self) + pub fn fsel28(&mut self) -> FSEL28_W { + FSEL28_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 29"] #[inline(always)] #[must_use] - pub fn fsel29(&mut self) -> FSEL29_W { - FSEL29_W::new(self) + pub fn fsel29(&mut self) -> FSEL29_W { + FSEL29_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfsel3.rs b/crates/bcm2711-lpa/src/gpio/gpfsel3.rs index a666a0b..088ac60 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfsel3.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfsel3.rs @@ -92,8 +92,8 @@ impl FSEL30_R { } } #[doc = "Field `FSEL30` writer - Function Select 30"] -pub type FSEL30_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL30_A>; -impl<'a, REG, const O: u8> FSEL30_W<'a, REG, O> +pub type FSEL30_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL30_A>; +impl<'a, REG> FSEL30_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL31_R { } } #[doc = "Field `FSEL31` writer - Function Select 31"] -pub type FSEL31_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL31_A>; -impl<'a, REG, const O: u8> FSEL31_W<'a, REG, O> +pub type FSEL31_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL31_A>; +impl<'a, REG> FSEL31_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL32_R { } } #[doc = "Field `FSEL32` writer - Function Select 32"] -pub type FSEL32_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL32_A>; -impl<'a, REG, const O: u8> FSEL32_W<'a, REG, O> +pub type FSEL32_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL32_A>; +impl<'a, REG> FSEL32_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL33_R { } } #[doc = "Field `FSEL33` writer - Function Select 33"] -pub type FSEL33_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL33_A>; -impl<'a, REG, const O: u8> FSEL33_W<'a, REG, O> +pub type FSEL33_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL33_A>; +impl<'a, REG> FSEL33_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL34_R { } } #[doc = "Field `FSEL34` writer - Function Select 34"] -pub type FSEL34_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL34_A>; -impl<'a, REG, const O: u8> FSEL34_W<'a, REG, O> +pub type FSEL34_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL34_A>; +impl<'a, REG> FSEL34_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL35_R { } } #[doc = "Field `FSEL35` writer - Function Select 35"] -pub type FSEL35_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL35_A>; -impl<'a, REG, const O: u8> FSEL35_W<'a, REG, O> +pub type FSEL35_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL35_A>; +impl<'a, REG> FSEL35_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL36_R { } } #[doc = "Field `FSEL36` writer - Function Select 36"] -pub type FSEL36_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL36_A>; -impl<'a, REG, const O: u8> FSEL36_W<'a, REG, O> +pub type FSEL36_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL36_A>; +impl<'a, REG> FSEL36_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL37_R { } } #[doc = "Field `FSEL37` writer - Function Select 37"] -pub type FSEL37_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL37_A>; -impl<'a, REG, const O: u8> FSEL37_W<'a, REG, O> +pub type FSEL37_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL37_A>; +impl<'a, REG> FSEL37_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL38_R { } } #[doc = "Field `FSEL38` writer - Function Select 38"] -pub type FSEL38_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL38_A>; -impl<'a, REG, const O: u8> FSEL38_W<'a, REG, O> +pub type FSEL38_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL38_A>; +impl<'a, REG> FSEL38_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL39_R { } } #[doc = "Field `FSEL39` writer - Function Select 39"] -pub type FSEL39_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL39_A>; -impl<'a, REG, const O: u8> FSEL39_W<'a, REG, O> +pub type FSEL39_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL39_A>; +impl<'a, REG> FSEL39_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 30"] #[inline(always)] #[must_use] - pub fn fsel30(&mut self) -> FSEL30_W { - FSEL30_W::new(self) + pub fn fsel30(&mut self) -> FSEL30_W { + FSEL30_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 31"] #[inline(always)] #[must_use] - pub fn fsel31(&mut self) -> FSEL31_W { - FSEL31_W::new(self) + pub fn fsel31(&mut self) -> FSEL31_W { + FSEL31_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 32"] #[inline(always)] #[must_use] - pub fn fsel32(&mut self) -> FSEL32_W { - FSEL32_W::new(self) + pub fn fsel32(&mut self) -> FSEL32_W { + FSEL32_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 33"] #[inline(always)] #[must_use] - pub fn fsel33(&mut self) -> FSEL33_W { - FSEL33_W::new(self) + pub fn fsel33(&mut self) -> FSEL33_W { + FSEL33_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 34"] #[inline(always)] #[must_use] - pub fn fsel34(&mut self) -> FSEL34_W { - FSEL34_W::new(self) + pub fn fsel34(&mut self) -> FSEL34_W { + FSEL34_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 35"] #[inline(always)] #[must_use] - pub fn fsel35(&mut self) -> FSEL35_W { - FSEL35_W::new(self) + pub fn fsel35(&mut self) -> FSEL35_W { + FSEL35_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 36"] #[inline(always)] #[must_use] - pub fn fsel36(&mut self) -> FSEL36_W { - FSEL36_W::new(self) + pub fn fsel36(&mut self) -> FSEL36_W { + FSEL36_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 37"] #[inline(always)] #[must_use] - pub fn fsel37(&mut self) -> FSEL37_W { - FSEL37_W::new(self) + pub fn fsel37(&mut self) -> FSEL37_W { + FSEL37_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 38"] #[inline(always)] #[must_use] - pub fn fsel38(&mut self) -> FSEL38_W { - FSEL38_W::new(self) + pub fn fsel38(&mut self) -> FSEL38_W { + FSEL38_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 39"] #[inline(always)] #[must_use] - pub fn fsel39(&mut self) -> FSEL39_W { - FSEL39_W::new(self) + pub fn fsel39(&mut self) -> FSEL39_W { + FSEL39_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfsel4.rs b/crates/bcm2711-lpa/src/gpio/gpfsel4.rs index e2229db..3583820 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfsel4.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfsel4.rs @@ -92,8 +92,8 @@ impl FSEL40_R { } } #[doc = "Field `FSEL40` writer - Function Select 40"] -pub type FSEL40_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL40_A>; -impl<'a, REG, const O: u8> FSEL40_W<'a, REG, O> +pub type FSEL40_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL40_A>; +impl<'a, REG> FSEL40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL41_R { } } #[doc = "Field `FSEL41` writer - Function Select 41"] -pub type FSEL41_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL41_A>; -impl<'a, REG, const O: u8> FSEL41_W<'a, REG, O> +pub type FSEL41_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL41_A>; +impl<'a, REG> FSEL41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL42_R { } } #[doc = "Field `FSEL42` writer - Function Select 42"] -pub type FSEL42_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL42_A>; -impl<'a, REG, const O: u8> FSEL42_W<'a, REG, O> +pub type FSEL42_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL42_A>; +impl<'a, REG> FSEL42_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL43_R { } } #[doc = "Field `FSEL43` writer - Function Select 43"] -pub type FSEL43_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL43_A>; -impl<'a, REG, const O: u8> FSEL43_W<'a, REG, O> +pub type FSEL43_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL43_A>; +impl<'a, REG> FSEL43_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL44_R { } } #[doc = "Field `FSEL44` writer - Function Select 44"] -pub type FSEL44_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL44_A>; -impl<'a, REG, const O: u8> FSEL44_W<'a, REG, O> +pub type FSEL44_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL44_A>; +impl<'a, REG> FSEL44_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL45_R { } } #[doc = "Field `FSEL45` writer - Function Select 45"] -pub type FSEL45_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL45_A>; -impl<'a, REG, const O: u8> FSEL45_W<'a, REG, O> +pub type FSEL45_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL45_A>; +impl<'a, REG> FSEL45_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL46_R { } } #[doc = "Field `FSEL46` writer - Function Select 46"] -pub type FSEL46_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL46_A>; -impl<'a, REG, const O: u8> FSEL46_W<'a, REG, O> +pub type FSEL46_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL46_A>; +impl<'a, REG> FSEL46_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL47_R { } } #[doc = "Field `FSEL47` writer - Function Select 47"] -pub type FSEL47_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL47_A>; -impl<'a, REG, const O: u8> FSEL47_W<'a, REG, O> +pub type FSEL47_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL47_A>; +impl<'a, REG> FSEL47_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL48_R { } } #[doc = "Field `FSEL48` writer - Function Select 48"] -pub type FSEL48_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL48_A>; -impl<'a, REG, const O: u8> FSEL48_W<'a, REG, O> +pub type FSEL48_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL48_A>; +impl<'a, REG> FSEL48_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL49_R { } } #[doc = "Field `FSEL49` writer - Function Select 49"] -pub type FSEL49_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL49_A>; -impl<'a, REG, const O: u8> FSEL49_W<'a, REG, O> +pub type FSEL49_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL49_A>; +impl<'a, REG> FSEL49_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 40"] #[inline(always)] #[must_use] - pub fn fsel40(&mut self) -> FSEL40_W { - FSEL40_W::new(self) + pub fn fsel40(&mut self) -> FSEL40_W { + FSEL40_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 41"] #[inline(always)] #[must_use] - pub fn fsel41(&mut self) -> FSEL41_W { - FSEL41_W::new(self) + pub fn fsel41(&mut self) -> FSEL41_W { + FSEL41_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 42"] #[inline(always)] #[must_use] - pub fn fsel42(&mut self) -> FSEL42_W { - FSEL42_W::new(self) + pub fn fsel42(&mut self) -> FSEL42_W { + FSEL42_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 43"] #[inline(always)] #[must_use] - pub fn fsel43(&mut self) -> FSEL43_W { - FSEL43_W::new(self) + pub fn fsel43(&mut self) -> FSEL43_W { + FSEL43_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 44"] #[inline(always)] #[must_use] - pub fn fsel44(&mut self) -> FSEL44_W { - FSEL44_W::new(self) + pub fn fsel44(&mut self) -> FSEL44_W { + FSEL44_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 45"] #[inline(always)] #[must_use] - pub fn fsel45(&mut self) -> FSEL45_W { - FSEL45_W::new(self) + pub fn fsel45(&mut self) -> FSEL45_W { + FSEL45_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 46"] #[inline(always)] #[must_use] - pub fn fsel46(&mut self) -> FSEL46_W { - FSEL46_W::new(self) + pub fn fsel46(&mut self) -> FSEL46_W { + FSEL46_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 47"] #[inline(always)] #[must_use] - pub fn fsel47(&mut self) -> FSEL47_W { - FSEL47_W::new(self) + pub fn fsel47(&mut self) -> FSEL47_W { + FSEL47_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 48"] #[inline(always)] #[must_use] - pub fn fsel48(&mut self) -> FSEL48_W { - FSEL48_W::new(self) + pub fn fsel48(&mut self) -> FSEL48_W { + FSEL48_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 49"] #[inline(always)] #[must_use] - pub fn fsel49(&mut self) -> FSEL49_W { - FSEL49_W::new(self) + pub fn fsel49(&mut self) -> FSEL49_W { + FSEL49_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpfsel5.rs b/crates/bcm2711-lpa/src/gpio/gpfsel5.rs index 03170ba..95fed47 100644 --- a/crates/bcm2711-lpa/src/gpio/gpfsel5.rs +++ b/crates/bcm2711-lpa/src/gpio/gpfsel5.rs @@ -92,8 +92,8 @@ impl FSEL50_R { } } #[doc = "Field `FSEL50` writer - Function Select 50"] -pub type FSEL50_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL50_A>; -impl<'a, REG, const O: u8> FSEL50_W<'a, REG, O> +pub type FSEL50_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL50_A>; +impl<'a, REG> FSEL50_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL51_R { } } #[doc = "Field `FSEL51` writer - Function Select 51"] -pub type FSEL51_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL51_A>; -impl<'a, REG, const O: u8> FSEL51_W<'a, REG, O> +pub type FSEL51_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL51_A>; +impl<'a, REG> FSEL51_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL52_R { } } #[doc = "Field `FSEL52` writer - Function Select 52"] -pub type FSEL52_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL52_A>; -impl<'a, REG, const O: u8> FSEL52_W<'a, REG, O> +pub type FSEL52_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL52_A>; +impl<'a, REG> FSEL52_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL53_R { } } #[doc = "Field `FSEL53` writer - Function Select 53"] -pub type FSEL53_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL53_A>; -impl<'a, REG, const O: u8> FSEL53_W<'a, REG, O> +pub type FSEL53_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL53_A>; +impl<'a, REG> FSEL53_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL54_R { } } #[doc = "Field `FSEL54` writer - Function Select 54"] -pub type FSEL54_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL54_A>; -impl<'a, REG, const O: u8> FSEL54_W<'a, REG, O> +pub type FSEL54_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL54_A>; +impl<'a, REG> FSEL54_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL55_R { } } #[doc = "Field `FSEL55` writer - Function Select 55"] -pub type FSEL55_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL55_A>; -impl<'a, REG, const O: u8> FSEL55_W<'a, REG, O> +pub type FSEL55_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL55_A>; +impl<'a, REG> FSEL55_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL56_R { } } #[doc = "Field `FSEL56` writer - Function Select 56"] -pub type FSEL56_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL56_A>; -impl<'a, REG, const O: u8> FSEL56_W<'a, REG, O> +pub type FSEL56_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL56_A>; +impl<'a, REG> FSEL56_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL57_R { } } #[doc = "Field `FSEL57` writer - Function Select 57"] -pub type FSEL57_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL57_A>; -impl<'a, REG, const O: u8> FSEL57_W<'a, REG, O> +pub type FSEL57_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL57_A>; +impl<'a, REG> FSEL57_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1156,57 +1156,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 50"] #[inline(always)] #[must_use] - pub fn fsel50(&mut self) -> FSEL50_W { - FSEL50_W::new(self) + pub fn fsel50(&mut self) -> FSEL50_W { + FSEL50_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 51"] #[inline(always)] #[must_use] - pub fn fsel51(&mut self) -> FSEL51_W { - FSEL51_W::new(self) + pub fn fsel51(&mut self) -> FSEL51_W { + FSEL51_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 52"] #[inline(always)] #[must_use] - pub fn fsel52(&mut self) -> FSEL52_W { - FSEL52_W::new(self) + pub fn fsel52(&mut self) -> FSEL52_W { + FSEL52_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 53"] #[inline(always)] #[must_use] - pub fn fsel53(&mut self) -> FSEL53_W { - FSEL53_W::new(self) + pub fn fsel53(&mut self) -> FSEL53_W { + FSEL53_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 54"] #[inline(always)] #[must_use] - pub fn fsel54(&mut self) -> FSEL54_W { - FSEL54_W::new(self) + pub fn fsel54(&mut self) -> FSEL54_W { + FSEL54_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 55"] #[inline(always)] #[must_use] - pub fn fsel55(&mut self) -> FSEL55_W { - FSEL55_W::new(self) + pub fn fsel55(&mut self) -> FSEL55_W { + FSEL55_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 56"] #[inline(always)] #[must_use] - pub fn fsel56(&mut self) -> FSEL56_W { - FSEL56_W::new(self) + pub fn fsel56(&mut self) -> FSEL56_W { + FSEL56_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 57"] #[inline(always)] #[must_use] - pub fn fsel57(&mut self) -> FSEL57_W { - FSEL57_W::new(self) + pub fn fsel57(&mut self) -> FSEL57_W { + FSEL57_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gphen0.rs b/crates/bcm2711-lpa/src/gpio/gphen0.rs index d788bbf..f8a30dc 100644 --- a/crates/bcm2711-lpa/src/gpio/gphen0.rs +++ b/crates/bcm2711-lpa/src/gpio/gphen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HEN0` reader - High detect enabled 0"] pub type HEN0_R = crate::BitReader; #[doc = "Field `HEN0` writer - High detect enabled 0"] -pub type HEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN1` reader - High detect enabled 1"] pub type HEN1_R = crate::BitReader; #[doc = "Field `HEN1` writer - High detect enabled 1"] -pub type HEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN2` reader - High detect enabled 2"] pub type HEN2_R = crate::BitReader; #[doc = "Field `HEN2` writer - High detect enabled 2"] -pub type HEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN3` reader - High detect enabled 3"] pub type HEN3_R = crate::BitReader; #[doc = "Field `HEN3` writer - High detect enabled 3"] -pub type HEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN4` reader - High detect enabled 4"] pub type HEN4_R = crate::BitReader; #[doc = "Field `HEN4` writer - High detect enabled 4"] -pub type HEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN5` reader - High detect enabled 5"] pub type HEN5_R = crate::BitReader; #[doc = "Field `HEN5` writer - High detect enabled 5"] -pub type HEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN6` reader - High detect enabled 6"] pub type HEN6_R = crate::BitReader; #[doc = "Field `HEN6` writer - High detect enabled 6"] -pub type HEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN7` reader - High detect enabled 7"] pub type HEN7_R = crate::BitReader; #[doc = "Field `HEN7` writer - High detect enabled 7"] -pub type HEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN8` reader - High detect enabled 8"] pub type HEN8_R = crate::BitReader; #[doc = "Field `HEN8` writer - High detect enabled 8"] -pub type HEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN9` reader - High detect enabled 9"] pub type HEN9_R = crate::BitReader; #[doc = "Field `HEN9` writer - High detect enabled 9"] -pub type HEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN10` reader - High detect enabled 10"] pub type HEN10_R = crate::BitReader; #[doc = "Field `HEN10` writer - High detect enabled 10"] -pub type HEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN11` reader - High detect enabled 11"] pub type HEN11_R = crate::BitReader; #[doc = "Field `HEN11` writer - High detect enabled 11"] -pub type HEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN12` reader - High detect enabled 12"] pub type HEN12_R = crate::BitReader; #[doc = "Field `HEN12` writer - High detect enabled 12"] -pub type HEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN13` reader - High detect enabled 13"] pub type HEN13_R = crate::BitReader; #[doc = "Field `HEN13` writer - High detect enabled 13"] -pub type HEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN14` reader - High detect enabled 14"] pub type HEN14_R = crate::BitReader; #[doc = "Field `HEN14` writer - High detect enabled 14"] -pub type HEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN15` reader - High detect enabled 15"] pub type HEN15_R = crate::BitReader; #[doc = "Field `HEN15` writer - High detect enabled 15"] -pub type HEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN16` reader - High detect enabled 16"] pub type HEN16_R = crate::BitReader; #[doc = "Field `HEN16` writer - High detect enabled 16"] -pub type HEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN17` reader - High detect enabled 17"] pub type HEN17_R = crate::BitReader; #[doc = "Field `HEN17` writer - High detect enabled 17"] -pub type HEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN18` reader - High detect enabled 18"] pub type HEN18_R = crate::BitReader; #[doc = "Field `HEN18` writer - High detect enabled 18"] -pub type HEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN19` reader - High detect enabled 19"] pub type HEN19_R = crate::BitReader; #[doc = "Field `HEN19` writer - High detect enabled 19"] -pub type HEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN20` reader - High detect enabled 20"] pub type HEN20_R = crate::BitReader; #[doc = "Field `HEN20` writer - High detect enabled 20"] -pub type HEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN21` reader - High detect enabled 21"] pub type HEN21_R = crate::BitReader; #[doc = "Field `HEN21` writer - High detect enabled 21"] -pub type HEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN22` reader - High detect enabled 22"] pub type HEN22_R = crate::BitReader; #[doc = "Field `HEN22` writer - High detect enabled 22"] -pub type HEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN23` reader - High detect enabled 23"] pub type HEN23_R = crate::BitReader; #[doc = "Field `HEN23` writer - High detect enabled 23"] -pub type HEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN24` reader - High detect enabled 24"] pub type HEN24_R = crate::BitReader; #[doc = "Field `HEN24` writer - High detect enabled 24"] -pub type HEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN25` reader - High detect enabled 25"] pub type HEN25_R = crate::BitReader; #[doc = "Field `HEN25` writer - High detect enabled 25"] -pub type HEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN26` reader - High detect enabled 26"] pub type HEN26_R = crate::BitReader; #[doc = "Field `HEN26` writer - High detect enabled 26"] -pub type HEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN27` reader - High detect enabled 27"] pub type HEN27_R = crate::BitReader; #[doc = "Field `HEN27` writer - High detect enabled 27"] -pub type HEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN28` reader - High detect enabled 28"] pub type HEN28_R = crate::BitReader; #[doc = "Field `HEN28` writer - High detect enabled 28"] -pub type HEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN29` reader - High detect enabled 29"] pub type HEN29_R = crate::BitReader; #[doc = "Field `HEN29` writer - High detect enabled 29"] -pub type HEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN30` reader - High detect enabled 30"] pub type HEN30_R = crate::BitReader; #[doc = "Field `HEN30` writer - High detect enabled 30"] -pub type HEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN31` reader - High detect enabled 31"] pub type HEN31_R = crate::BitReader; #[doc = "Field `HEN31` writer - High detect enabled 31"] -pub type HEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - High detect enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - High detect enabled 0"] #[inline(always)] #[must_use] - pub fn hen0(&mut self) -> HEN0_W { - HEN0_W::new(self) + pub fn hen0(&mut self) -> HEN0_W { + HEN0_W::new(self, 0) } #[doc = "Bit 1 - High detect enabled 1"] #[inline(always)] #[must_use] - pub fn hen1(&mut self) -> HEN1_W { - HEN1_W::new(self) + pub fn hen1(&mut self) -> HEN1_W { + HEN1_W::new(self, 1) } #[doc = "Bit 2 - High detect enabled 2"] #[inline(always)] #[must_use] - pub fn hen2(&mut self) -> HEN2_W { - HEN2_W::new(self) + pub fn hen2(&mut self) -> HEN2_W { + HEN2_W::new(self, 2) } #[doc = "Bit 3 - High detect enabled 3"] #[inline(always)] #[must_use] - pub fn hen3(&mut self) -> HEN3_W { - HEN3_W::new(self) + pub fn hen3(&mut self) -> HEN3_W { + HEN3_W::new(self, 3) } #[doc = "Bit 4 - High detect enabled 4"] #[inline(always)] #[must_use] - pub fn hen4(&mut self) -> HEN4_W { - HEN4_W::new(self) + pub fn hen4(&mut self) -> HEN4_W { + HEN4_W::new(self, 4) } #[doc = "Bit 5 - High detect enabled 5"] #[inline(always)] #[must_use] - pub fn hen5(&mut self) -> HEN5_W { - HEN5_W::new(self) + pub fn hen5(&mut self) -> HEN5_W { + HEN5_W::new(self, 5) } #[doc = "Bit 6 - High detect enabled 6"] #[inline(always)] #[must_use] - pub fn hen6(&mut self) -> HEN6_W { - HEN6_W::new(self) + pub fn hen6(&mut self) -> HEN6_W { + HEN6_W::new(self, 6) } #[doc = "Bit 7 - High detect enabled 7"] #[inline(always)] #[must_use] - pub fn hen7(&mut self) -> HEN7_W { - HEN7_W::new(self) + pub fn hen7(&mut self) -> HEN7_W { + HEN7_W::new(self, 7) } #[doc = "Bit 8 - High detect enabled 8"] #[inline(always)] #[must_use] - pub fn hen8(&mut self) -> HEN8_W { - HEN8_W::new(self) + pub fn hen8(&mut self) -> HEN8_W { + HEN8_W::new(self, 8) } #[doc = "Bit 9 - High detect enabled 9"] #[inline(always)] #[must_use] - pub fn hen9(&mut self) -> HEN9_W { - HEN9_W::new(self) + pub fn hen9(&mut self) -> HEN9_W { + HEN9_W::new(self, 9) } #[doc = "Bit 10 - High detect enabled 10"] #[inline(always)] #[must_use] - pub fn hen10(&mut self) -> HEN10_W { - HEN10_W::new(self) + pub fn hen10(&mut self) -> HEN10_W { + HEN10_W::new(self, 10) } #[doc = "Bit 11 - High detect enabled 11"] #[inline(always)] #[must_use] - pub fn hen11(&mut self) -> HEN11_W { - HEN11_W::new(self) + pub fn hen11(&mut self) -> HEN11_W { + HEN11_W::new(self, 11) } #[doc = "Bit 12 - High detect enabled 12"] #[inline(always)] #[must_use] - pub fn hen12(&mut self) -> HEN12_W { - HEN12_W::new(self) + pub fn hen12(&mut self) -> HEN12_W { + HEN12_W::new(self, 12) } #[doc = "Bit 13 - High detect enabled 13"] #[inline(always)] #[must_use] - pub fn hen13(&mut self) -> HEN13_W { - HEN13_W::new(self) + pub fn hen13(&mut self) -> HEN13_W { + HEN13_W::new(self, 13) } #[doc = "Bit 14 - High detect enabled 14"] #[inline(always)] #[must_use] - pub fn hen14(&mut self) -> HEN14_W { - HEN14_W::new(self) + pub fn hen14(&mut self) -> HEN14_W { + HEN14_W::new(self, 14) } #[doc = "Bit 15 - High detect enabled 15"] #[inline(always)] #[must_use] - pub fn hen15(&mut self) -> HEN15_W { - HEN15_W::new(self) + pub fn hen15(&mut self) -> HEN15_W { + HEN15_W::new(self, 15) } #[doc = "Bit 16 - High detect enabled 16"] #[inline(always)] #[must_use] - pub fn hen16(&mut self) -> HEN16_W { - HEN16_W::new(self) + pub fn hen16(&mut self) -> HEN16_W { + HEN16_W::new(self, 16) } #[doc = "Bit 17 - High detect enabled 17"] #[inline(always)] #[must_use] - pub fn hen17(&mut self) -> HEN17_W { - HEN17_W::new(self) + pub fn hen17(&mut self) -> HEN17_W { + HEN17_W::new(self, 17) } #[doc = "Bit 18 - High detect enabled 18"] #[inline(always)] #[must_use] - pub fn hen18(&mut self) -> HEN18_W { - HEN18_W::new(self) + pub fn hen18(&mut self) -> HEN18_W { + HEN18_W::new(self, 18) } #[doc = "Bit 19 - High detect enabled 19"] #[inline(always)] #[must_use] - pub fn hen19(&mut self) -> HEN19_W { - HEN19_W::new(self) + pub fn hen19(&mut self) -> HEN19_W { + HEN19_W::new(self, 19) } #[doc = "Bit 20 - High detect enabled 20"] #[inline(always)] #[must_use] - pub fn hen20(&mut self) -> HEN20_W { - HEN20_W::new(self) + pub fn hen20(&mut self) -> HEN20_W { + HEN20_W::new(self, 20) } #[doc = "Bit 21 - High detect enabled 21"] #[inline(always)] #[must_use] - pub fn hen21(&mut self) -> HEN21_W { - HEN21_W::new(self) + pub fn hen21(&mut self) -> HEN21_W { + HEN21_W::new(self, 21) } #[doc = "Bit 22 - High detect enabled 22"] #[inline(always)] #[must_use] - pub fn hen22(&mut self) -> HEN22_W { - HEN22_W::new(self) + pub fn hen22(&mut self) -> HEN22_W { + HEN22_W::new(self, 22) } #[doc = "Bit 23 - High detect enabled 23"] #[inline(always)] #[must_use] - pub fn hen23(&mut self) -> HEN23_W { - HEN23_W::new(self) + pub fn hen23(&mut self) -> HEN23_W { + HEN23_W::new(self, 23) } #[doc = "Bit 24 - High detect enabled 24"] #[inline(always)] #[must_use] - pub fn hen24(&mut self) -> HEN24_W { - HEN24_W::new(self) + pub fn hen24(&mut self) -> HEN24_W { + HEN24_W::new(self, 24) } #[doc = "Bit 25 - High detect enabled 25"] #[inline(always)] #[must_use] - pub fn hen25(&mut self) -> HEN25_W { - HEN25_W::new(self) + pub fn hen25(&mut self) -> HEN25_W { + HEN25_W::new(self, 25) } #[doc = "Bit 26 - High detect enabled 26"] #[inline(always)] #[must_use] - pub fn hen26(&mut self) -> HEN26_W { - HEN26_W::new(self) + pub fn hen26(&mut self) -> HEN26_W { + HEN26_W::new(self, 26) } #[doc = "Bit 27 - High detect enabled 27"] #[inline(always)] #[must_use] - pub fn hen27(&mut self) -> HEN27_W { - HEN27_W::new(self) + pub fn hen27(&mut self) -> HEN27_W { + HEN27_W::new(self, 27) } #[doc = "Bit 28 - High detect enabled 28"] #[inline(always)] #[must_use] - pub fn hen28(&mut self) -> HEN28_W { - HEN28_W::new(self) + pub fn hen28(&mut self) -> HEN28_W { + HEN28_W::new(self, 28) } #[doc = "Bit 29 - High detect enabled 29"] #[inline(always)] #[must_use] - pub fn hen29(&mut self) -> HEN29_W { - HEN29_W::new(self) + pub fn hen29(&mut self) -> HEN29_W { + HEN29_W::new(self, 29) } #[doc = "Bit 30 - High detect enabled 30"] #[inline(always)] #[must_use] - pub fn hen30(&mut self) -> HEN30_W { - HEN30_W::new(self) + pub fn hen30(&mut self) -> HEN30_W { + HEN30_W::new(self, 30) } #[doc = "Bit 31 - High detect enabled 31"] #[inline(always)] #[must_use] - pub fn hen31(&mut self) -> HEN31_W { - HEN31_W::new(self) + pub fn hen31(&mut self) -> HEN31_W { + HEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gphen1.rs b/crates/bcm2711-lpa/src/gpio/gphen1.rs index 7c7c2d7..824d9e7 100644 --- a/crates/bcm2711-lpa/src/gpio/gphen1.rs +++ b/crates/bcm2711-lpa/src/gpio/gphen1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `HEN32` reader - High detect enabled 32"] pub type HEN32_R = crate::BitReader; #[doc = "Field `HEN32` writer - High detect enabled 32"] -pub type HEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN33` reader - High detect enabled 33"] pub type HEN33_R = crate::BitReader; #[doc = "Field `HEN33` writer - High detect enabled 33"] -pub type HEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN34` reader - High detect enabled 34"] pub type HEN34_R = crate::BitReader; #[doc = "Field `HEN34` writer - High detect enabled 34"] -pub type HEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN35` reader - High detect enabled 35"] pub type HEN35_R = crate::BitReader; #[doc = "Field `HEN35` writer - High detect enabled 35"] -pub type HEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN36` reader - High detect enabled 36"] pub type HEN36_R = crate::BitReader; #[doc = "Field `HEN36` writer - High detect enabled 36"] -pub type HEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN37` reader - High detect enabled 37"] pub type HEN37_R = crate::BitReader; #[doc = "Field `HEN37` writer - High detect enabled 37"] -pub type HEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN38` reader - High detect enabled 38"] pub type HEN38_R = crate::BitReader; #[doc = "Field `HEN38` writer - High detect enabled 38"] -pub type HEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN39` reader - High detect enabled 39"] pub type HEN39_R = crate::BitReader; #[doc = "Field `HEN39` writer - High detect enabled 39"] -pub type HEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN40` reader - High detect enabled 40"] pub type HEN40_R = crate::BitReader; #[doc = "Field `HEN40` writer - High detect enabled 40"] -pub type HEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN41` reader - High detect enabled 41"] pub type HEN41_R = crate::BitReader; #[doc = "Field `HEN41` writer - High detect enabled 41"] -pub type HEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN42` reader - High detect enabled 42"] pub type HEN42_R = crate::BitReader; #[doc = "Field `HEN42` writer - High detect enabled 42"] -pub type HEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN43` reader - High detect enabled 43"] pub type HEN43_R = crate::BitReader; #[doc = "Field `HEN43` writer - High detect enabled 43"] -pub type HEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN44` reader - High detect enabled 44"] pub type HEN44_R = crate::BitReader; #[doc = "Field `HEN44` writer - High detect enabled 44"] -pub type HEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN45` reader - High detect enabled 45"] pub type HEN45_R = crate::BitReader; #[doc = "Field `HEN45` writer - High detect enabled 45"] -pub type HEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN46` reader - High detect enabled 46"] pub type HEN46_R = crate::BitReader; #[doc = "Field `HEN46` writer - High detect enabled 46"] -pub type HEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN47` reader - High detect enabled 47"] pub type HEN47_R = crate::BitReader; #[doc = "Field `HEN47` writer - High detect enabled 47"] -pub type HEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN48` reader - High detect enabled 48"] pub type HEN48_R = crate::BitReader; #[doc = "Field `HEN48` writer - High detect enabled 48"] -pub type HEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN49` reader - High detect enabled 49"] pub type HEN49_R = crate::BitReader; #[doc = "Field `HEN49` writer - High detect enabled 49"] -pub type HEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN50` reader - High detect enabled 50"] pub type HEN50_R = crate::BitReader; #[doc = "Field `HEN50` writer - High detect enabled 50"] -pub type HEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN51` reader - High detect enabled 51"] pub type HEN51_R = crate::BitReader; #[doc = "Field `HEN51` writer - High detect enabled 51"] -pub type HEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN52` reader - High detect enabled 52"] pub type HEN52_R = crate::BitReader; #[doc = "Field `HEN52` writer - High detect enabled 52"] -pub type HEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN53` reader - High detect enabled 53"] pub type HEN53_R = crate::BitReader; #[doc = "Field `HEN53` writer - High detect enabled 53"] -pub type HEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN54` reader - High detect enabled 54"] pub type HEN54_R = crate::BitReader; #[doc = "Field `HEN54` writer - High detect enabled 54"] -pub type HEN54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN55` reader - High detect enabled 55"] pub type HEN55_R = crate::BitReader; #[doc = "Field `HEN55` writer - High detect enabled 55"] -pub type HEN55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN56` reader - High detect enabled 56"] pub type HEN56_R = crate::BitReader; #[doc = "Field `HEN56` writer - High detect enabled 56"] -pub type HEN56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN57` reader - High detect enabled 57"] pub type HEN57_R = crate::BitReader; #[doc = "Field `HEN57` writer - High detect enabled 57"] -pub type HEN57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN57_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - High detect enabled 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - High detect enabled 32"] #[inline(always)] #[must_use] - pub fn hen32(&mut self) -> HEN32_W { - HEN32_W::new(self) + pub fn hen32(&mut self) -> HEN32_W { + HEN32_W::new(self, 0) } #[doc = "Bit 1 - High detect enabled 33"] #[inline(always)] #[must_use] - pub fn hen33(&mut self) -> HEN33_W { - HEN33_W::new(self) + pub fn hen33(&mut self) -> HEN33_W { + HEN33_W::new(self, 1) } #[doc = "Bit 2 - High detect enabled 34"] #[inline(always)] #[must_use] - pub fn hen34(&mut self) -> HEN34_W { - HEN34_W::new(self) + pub fn hen34(&mut self) -> HEN34_W { + HEN34_W::new(self, 2) } #[doc = "Bit 3 - High detect enabled 35"] #[inline(always)] #[must_use] - pub fn hen35(&mut self) -> HEN35_W { - HEN35_W::new(self) + pub fn hen35(&mut self) -> HEN35_W { + HEN35_W::new(self, 3) } #[doc = "Bit 4 - High detect enabled 36"] #[inline(always)] #[must_use] - pub fn hen36(&mut self) -> HEN36_W { - HEN36_W::new(self) + pub fn hen36(&mut self) -> HEN36_W { + HEN36_W::new(self, 4) } #[doc = "Bit 5 - High detect enabled 37"] #[inline(always)] #[must_use] - pub fn hen37(&mut self) -> HEN37_W { - HEN37_W::new(self) + pub fn hen37(&mut self) -> HEN37_W { + HEN37_W::new(self, 5) } #[doc = "Bit 6 - High detect enabled 38"] #[inline(always)] #[must_use] - pub fn hen38(&mut self) -> HEN38_W { - HEN38_W::new(self) + pub fn hen38(&mut self) -> HEN38_W { + HEN38_W::new(self, 6) } #[doc = "Bit 7 - High detect enabled 39"] #[inline(always)] #[must_use] - pub fn hen39(&mut self) -> HEN39_W { - HEN39_W::new(self) + pub fn hen39(&mut self) -> HEN39_W { + HEN39_W::new(self, 7) } #[doc = "Bit 8 - High detect enabled 40"] #[inline(always)] #[must_use] - pub fn hen40(&mut self) -> HEN40_W { - HEN40_W::new(self) + pub fn hen40(&mut self) -> HEN40_W { + HEN40_W::new(self, 8) } #[doc = "Bit 9 - High detect enabled 41"] #[inline(always)] #[must_use] - pub fn hen41(&mut self) -> HEN41_W { - HEN41_W::new(self) + pub fn hen41(&mut self) -> HEN41_W { + HEN41_W::new(self, 9) } #[doc = "Bit 10 - High detect enabled 42"] #[inline(always)] #[must_use] - pub fn hen42(&mut self) -> HEN42_W { - HEN42_W::new(self) + pub fn hen42(&mut self) -> HEN42_W { + HEN42_W::new(self, 10) } #[doc = "Bit 11 - High detect enabled 43"] #[inline(always)] #[must_use] - pub fn hen43(&mut self) -> HEN43_W { - HEN43_W::new(self) + pub fn hen43(&mut self) -> HEN43_W { + HEN43_W::new(self, 11) } #[doc = "Bit 12 - High detect enabled 44"] #[inline(always)] #[must_use] - pub fn hen44(&mut self) -> HEN44_W { - HEN44_W::new(self) + pub fn hen44(&mut self) -> HEN44_W { + HEN44_W::new(self, 12) } #[doc = "Bit 13 - High detect enabled 45"] #[inline(always)] #[must_use] - pub fn hen45(&mut self) -> HEN45_W { - HEN45_W::new(self) + pub fn hen45(&mut self) -> HEN45_W { + HEN45_W::new(self, 13) } #[doc = "Bit 14 - High detect enabled 46"] #[inline(always)] #[must_use] - pub fn hen46(&mut self) -> HEN46_W { - HEN46_W::new(self) + pub fn hen46(&mut self) -> HEN46_W { + HEN46_W::new(self, 14) } #[doc = "Bit 15 - High detect enabled 47"] #[inline(always)] #[must_use] - pub fn hen47(&mut self) -> HEN47_W { - HEN47_W::new(self) + pub fn hen47(&mut self) -> HEN47_W { + HEN47_W::new(self, 15) } #[doc = "Bit 16 - High detect enabled 48"] #[inline(always)] #[must_use] - pub fn hen48(&mut self) -> HEN48_W { - HEN48_W::new(self) + pub fn hen48(&mut self) -> HEN48_W { + HEN48_W::new(self, 16) } #[doc = "Bit 17 - High detect enabled 49"] #[inline(always)] #[must_use] - pub fn hen49(&mut self) -> HEN49_W { - HEN49_W::new(self) + pub fn hen49(&mut self) -> HEN49_W { + HEN49_W::new(self, 17) } #[doc = "Bit 18 - High detect enabled 50"] #[inline(always)] #[must_use] - pub fn hen50(&mut self) -> HEN50_W { - HEN50_W::new(self) + pub fn hen50(&mut self) -> HEN50_W { + HEN50_W::new(self, 18) } #[doc = "Bit 19 - High detect enabled 51"] #[inline(always)] #[must_use] - pub fn hen51(&mut self) -> HEN51_W { - HEN51_W::new(self) + pub fn hen51(&mut self) -> HEN51_W { + HEN51_W::new(self, 19) } #[doc = "Bit 20 - High detect enabled 52"] #[inline(always)] #[must_use] - pub fn hen52(&mut self) -> HEN52_W { - HEN52_W::new(self) + pub fn hen52(&mut self) -> HEN52_W { + HEN52_W::new(self, 20) } #[doc = "Bit 21 - High detect enabled 53"] #[inline(always)] #[must_use] - pub fn hen53(&mut self) -> HEN53_W { - HEN53_W::new(self) + pub fn hen53(&mut self) -> HEN53_W { + HEN53_W::new(self, 21) } #[doc = "Bit 22 - High detect enabled 54"] #[inline(always)] #[must_use] - pub fn hen54(&mut self) -> HEN54_W { - HEN54_W::new(self) + pub fn hen54(&mut self) -> HEN54_W { + HEN54_W::new(self, 22) } #[doc = "Bit 23 - High detect enabled 55"] #[inline(always)] #[must_use] - pub fn hen55(&mut self) -> HEN55_W { - HEN55_W::new(self) + pub fn hen55(&mut self) -> HEN55_W { + HEN55_W::new(self, 23) } #[doc = "Bit 24 - High detect enabled 56"] #[inline(always)] #[must_use] - pub fn hen56(&mut self) -> HEN56_W { - HEN56_W::new(self) + pub fn hen56(&mut self) -> HEN56_W { + HEN56_W::new(self, 24) } #[doc = "Bit 25 - High detect enabled 57"] #[inline(always)] #[must_use] - pub fn hen57(&mut self) -> HEN57_W { - HEN57_W::new(self) + pub fn hen57(&mut self) -> HEN57_W { + HEN57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs index 507543e..fd43ea1 100644 --- a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs @@ -52,8 +52,8 @@ impl GPIO_PUP_PDN_CNTRL0_R { } } #[doc = "Field `GPIO_PUP_PDN_CNTRL0` writer - Resistor select for 0"] -pub type GPIO_PUP_PDN_CNTRL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, BP_PULL_A>; -impl<'a, REG, const O: u8> GPIO_PUP_PDN_CNTRL0_W<'a, REG, O> +pub type GPIO_PUP_PDN_CNTRL0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BP_PULL_A>; +impl<'a, REG> GPIO_PUP_PDN_CNTRL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -288,137 +288,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 0"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl0( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL0_W { - GPIO_PUP_PDN_CNTRL0_W::new(self) + pub fn gpio_pup_pdn_cntrl0(&mut self) -> GPIO_PUP_PDN_CNTRL0_W { + GPIO_PUP_PDN_CNTRL0_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 1"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl1( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL1_W { - GPIO_PUP_PDN_CNTRL1_W::new(self) + pub fn gpio_pup_pdn_cntrl1(&mut self) -> GPIO_PUP_PDN_CNTRL1_W { + GPIO_PUP_PDN_CNTRL1_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 2"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl2( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL2_W { - GPIO_PUP_PDN_CNTRL2_W::new(self) + pub fn gpio_pup_pdn_cntrl2(&mut self) -> GPIO_PUP_PDN_CNTRL2_W { + GPIO_PUP_PDN_CNTRL2_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 3"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl3( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL3_W { - GPIO_PUP_PDN_CNTRL3_W::new(self) + pub fn gpio_pup_pdn_cntrl3(&mut self) -> GPIO_PUP_PDN_CNTRL3_W { + GPIO_PUP_PDN_CNTRL3_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 4"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl4( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL4_W { - GPIO_PUP_PDN_CNTRL4_W::new(self) + pub fn gpio_pup_pdn_cntrl4(&mut self) -> GPIO_PUP_PDN_CNTRL4_W { + GPIO_PUP_PDN_CNTRL4_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 5"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl5( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL5_W { - GPIO_PUP_PDN_CNTRL5_W::new(self) + pub fn gpio_pup_pdn_cntrl5(&mut self) -> GPIO_PUP_PDN_CNTRL5_W { + GPIO_PUP_PDN_CNTRL5_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 6"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl6( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL6_W { - GPIO_PUP_PDN_CNTRL6_W::new(self) + pub fn gpio_pup_pdn_cntrl6(&mut self) -> GPIO_PUP_PDN_CNTRL6_W { + GPIO_PUP_PDN_CNTRL6_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 7"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl7( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL7_W { - GPIO_PUP_PDN_CNTRL7_W::new(self) + pub fn gpio_pup_pdn_cntrl7(&mut self) -> GPIO_PUP_PDN_CNTRL7_W { + GPIO_PUP_PDN_CNTRL7_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 8"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl8( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL8_W { - GPIO_PUP_PDN_CNTRL8_W::new(self) + pub fn gpio_pup_pdn_cntrl8(&mut self) -> GPIO_PUP_PDN_CNTRL8_W { + GPIO_PUP_PDN_CNTRL8_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 9"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl9( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL9_W { - GPIO_PUP_PDN_CNTRL9_W::new(self) + pub fn gpio_pup_pdn_cntrl9(&mut self) -> GPIO_PUP_PDN_CNTRL9_W { + GPIO_PUP_PDN_CNTRL9_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 10"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl10( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL10_W { - GPIO_PUP_PDN_CNTRL10_W::new(self) + pub fn gpio_pup_pdn_cntrl10(&mut self) -> GPIO_PUP_PDN_CNTRL10_W { + GPIO_PUP_PDN_CNTRL10_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 11"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl11( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL11_W { - GPIO_PUP_PDN_CNTRL11_W::new(self) + pub fn gpio_pup_pdn_cntrl11(&mut self) -> GPIO_PUP_PDN_CNTRL11_W { + GPIO_PUP_PDN_CNTRL11_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 12"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl12( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL12_W { - GPIO_PUP_PDN_CNTRL12_W::new(self) + pub fn gpio_pup_pdn_cntrl12(&mut self) -> GPIO_PUP_PDN_CNTRL12_W { + GPIO_PUP_PDN_CNTRL12_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 13"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl13( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL13_W { - GPIO_PUP_PDN_CNTRL13_W::new(self) + pub fn gpio_pup_pdn_cntrl13(&mut self) -> GPIO_PUP_PDN_CNTRL13_W { + GPIO_PUP_PDN_CNTRL13_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 14"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl14( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL14_W { - GPIO_PUP_PDN_CNTRL14_W::new(self) + pub fn gpio_pup_pdn_cntrl14(&mut self) -> GPIO_PUP_PDN_CNTRL14_W { + GPIO_PUP_PDN_CNTRL14_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 15"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl15( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL15_W { - GPIO_PUP_PDN_CNTRL15_W::new(self) + pub fn gpio_pup_pdn_cntrl15(&mut self) -> GPIO_PUP_PDN_CNTRL15_W { + GPIO_PUP_PDN_CNTRL15_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs index 877b1ae..8d7c93d 100644 --- a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs @@ -222,137 +222,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 16"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl16( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL16_W { - GPIO_PUP_PDN_CNTRL16_W::new(self) + pub fn gpio_pup_pdn_cntrl16(&mut self) -> GPIO_PUP_PDN_CNTRL16_W { + GPIO_PUP_PDN_CNTRL16_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 17"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl17( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL17_W { - GPIO_PUP_PDN_CNTRL17_W::new(self) + pub fn gpio_pup_pdn_cntrl17(&mut self) -> GPIO_PUP_PDN_CNTRL17_W { + GPIO_PUP_PDN_CNTRL17_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 18"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl18( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL18_W { - GPIO_PUP_PDN_CNTRL18_W::new(self) + pub fn gpio_pup_pdn_cntrl18(&mut self) -> GPIO_PUP_PDN_CNTRL18_W { + GPIO_PUP_PDN_CNTRL18_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 19"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl19( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL19_W { - GPIO_PUP_PDN_CNTRL19_W::new(self) + pub fn gpio_pup_pdn_cntrl19(&mut self) -> GPIO_PUP_PDN_CNTRL19_W { + GPIO_PUP_PDN_CNTRL19_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 20"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl20( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL20_W { - GPIO_PUP_PDN_CNTRL20_W::new(self) + pub fn gpio_pup_pdn_cntrl20(&mut self) -> GPIO_PUP_PDN_CNTRL20_W { + GPIO_PUP_PDN_CNTRL20_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 21"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl21( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL21_W { - GPIO_PUP_PDN_CNTRL21_W::new(self) + pub fn gpio_pup_pdn_cntrl21(&mut self) -> GPIO_PUP_PDN_CNTRL21_W { + GPIO_PUP_PDN_CNTRL21_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 22"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl22( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL22_W { - GPIO_PUP_PDN_CNTRL22_W::new(self) + pub fn gpio_pup_pdn_cntrl22(&mut self) -> GPIO_PUP_PDN_CNTRL22_W { + GPIO_PUP_PDN_CNTRL22_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 23"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl23( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL23_W { - GPIO_PUP_PDN_CNTRL23_W::new(self) + pub fn gpio_pup_pdn_cntrl23(&mut self) -> GPIO_PUP_PDN_CNTRL23_W { + GPIO_PUP_PDN_CNTRL23_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 24"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl24( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL24_W { - GPIO_PUP_PDN_CNTRL24_W::new(self) + pub fn gpio_pup_pdn_cntrl24(&mut self) -> GPIO_PUP_PDN_CNTRL24_W { + GPIO_PUP_PDN_CNTRL24_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 25"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl25( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL25_W { - GPIO_PUP_PDN_CNTRL25_W::new(self) + pub fn gpio_pup_pdn_cntrl25(&mut self) -> GPIO_PUP_PDN_CNTRL25_W { + GPIO_PUP_PDN_CNTRL25_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 26"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl26( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL26_W { - GPIO_PUP_PDN_CNTRL26_W::new(self) + pub fn gpio_pup_pdn_cntrl26(&mut self) -> GPIO_PUP_PDN_CNTRL26_W { + GPIO_PUP_PDN_CNTRL26_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 27"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl27( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL27_W { - GPIO_PUP_PDN_CNTRL27_W::new(self) + pub fn gpio_pup_pdn_cntrl27(&mut self) -> GPIO_PUP_PDN_CNTRL27_W { + GPIO_PUP_PDN_CNTRL27_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 28"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl28( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL28_W { - GPIO_PUP_PDN_CNTRL28_W::new(self) + pub fn gpio_pup_pdn_cntrl28(&mut self) -> GPIO_PUP_PDN_CNTRL28_W { + GPIO_PUP_PDN_CNTRL28_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 29"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl29( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL29_W { - GPIO_PUP_PDN_CNTRL29_W::new(self) + pub fn gpio_pup_pdn_cntrl29(&mut self) -> GPIO_PUP_PDN_CNTRL29_W { + GPIO_PUP_PDN_CNTRL29_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 30"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl30( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL30_W { - GPIO_PUP_PDN_CNTRL30_W::new(self) + pub fn gpio_pup_pdn_cntrl30(&mut self) -> GPIO_PUP_PDN_CNTRL30_W { + GPIO_PUP_PDN_CNTRL30_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 31"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl31( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL31_W { - GPIO_PUP_PDN_CNTRL31_W::new(self) + pub fn gpio_pup_pdn_cntrl31(&mut self) -> GPIO_PUP_PDN_CNTRL31_W { + GPIO_PUP_PDN_CNTRL31_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs index dfd838d..3881adc 100644 --- a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs +++ b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs @@ -222,137 +222,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 32"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl32( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL32_W { - GPIO_PUP_PDN_CNTRL32_W::new(self) + pub fn gpio_pup_pdn_cntrl32(&mut self) -> GPIO_PUP_PDN_CNTRL32_W { + GPIO_PUP_PDN_CNTRL32_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 33"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl33( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL33_W { - GPIO_PUP_PDN_CNTRL33_W::new(self) + pub fn gpio_pup_pdn_cntrl33(&mut self) -> GPIO_PUP_PDN_CNTRL33_W { + GPIO_PUP_PDN_CNTRL33_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 34"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl34( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL34_W { - GPIO_PUP_PDN_CNTRL34_W::new(self) + pub fn gpio_pup_pdn_cntrl34(&mut self) -> GPIO_PUP_PDN_CNTRL34_W { + GPIO_PUP_PDN_CNTRL34_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 35"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl35( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL35_W { - GPIO_PUP_PDN_CNTRL35_W::new(self) + pub fn gpio_pup_pdn_cntrl35(&mut self) -> GPIO_PUP_PDN_CNTRL35_W { + GPIO_PUP_PDN_CNTRL35_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 36"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl36( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL36_W { - GPIO_PUP_PDN_CNTRL36_W::new(self) + pub fn gpio_pup_pdn_cntrl36(&mut self) -> GPIO_PUP_PDN_CNTRL36_W { + GPIO_PUP_PDN_CNTRL36_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 37"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl37( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL37_W { - GPIO_PUP_PDN_CNTRL37_W::new(self) + pub fn gpio_pup_pdn_cntrl37(&mut self) -> GPIO_PUP_PDN_CNTRL37_W { + GPIO_PUP_PDN_CNTRL37_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 38"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl38( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL38_W { - GPIO_PUP_PDN_CNTRL38_W::new(self) + pub fn gpio_pup_pdn_cntrl38(&mut self) -> GPIO_PUP_PDN_CNTRL38_W { + GPIO_PUP_PDN_CNTRL38_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 39"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl39( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL39_W { - GPIO_PUP_PDN_CNTRL39_W::new(self) + pub fn gpio_pup_pdn_cntrl39(&mut self) -> GPIO_PUP_PDN_CNTRL39_W { + GPIO_PUP_PDN_CNTRL39_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 40"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl40( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL40_W { - GPIO_PUP_PDN_CNTRL40_W::new(self) + pub fn gpio_pup_pdn_cntrl40(&mut self) -> GPIO_PUP_PDN_CNTRL40_W { + GPIO_PUP_PDN_CNTRL40_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 41"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl41( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL41_W { - GPIO_PUP_PDN_CNTRL41_W::new(self) + pub fn gpio_pup_pdn_cntrl41(&mut self) -> GPIO_PUP_PDN_CNTRL41_W { + GPIO_PUP_PDN_CNTRL41_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 42"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl42( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL42_W { - GPIO_PUP_PDN_CNTRL42_W::new(self) + pub fn gpio_pup_pdn_cntrl42(&mut self) -> GPIO_PUP_PDN_CNTRL42_W { + GPIO_PUP_PDN_CNTRL42_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 43"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl43( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL43_W { - GPIO_PUP_PDN_CNTRL43_W::new(self) + pub fn gpio_pup_pdn_cntrl43(&mut self) -> GPIO_PUP_PDN_CNTRL43_W { + GPIO_PUP_PDN_CNTRL43_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 44"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl44( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL44_W { - GPIO_PUP_PDN_CNTRL44_W::new(self) + pub fn gpio_pup_pdn_cntrl44(&mut self) -> GPIO_PUP_PDN_CNTRL44_W { + GPIO_PUP_PDN_CNTRL44_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 45"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl45( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL45_W { - GPIO_PUP_PDN_CNTRL45_W::new(self) + pub fn gpio_pup_pdn_cntrl45(&mut self) -> GPIO_PUP_PDN_CNTRL45_W { + GPIO_PUP_PDN_CNTRL45_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 46"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl46( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL46_W { - GPIO_PUP_PDN_CNTRL46_W::new(self) + pub fn gpio_pup_pdn_cntrl46(&mut self) -> GPIO_PUP_PDN_CNTRL46_W { + GPIO_PUP_PDN_CNTRL46_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 47"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl47( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL47_W { - GPIO_PUP_PDN_CNTRL47_W::new(self) + pub fn gpio_pup_pdn_cntrl47(&mut self) -> GPIO_PUP_PDN_CNTRL47_W { + GPIO_PUP_PDN_CNTRL47_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs index 77954a0..405cadf 100644 --- a/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs +++ b/crates/bcm2711-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs @@ -144,89 +144,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 48"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl48( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL48_W { - GPIO_PUP_PDN_CNTRL48_W::new(self) + pub fn gpio_pup_pdn_cntrl48(&mut self) -> GPIO_PUP_PDN_CNTRL48_W { + GPIO_PUP_PDN_CNTRL48_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 49"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl49( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL49_W { - GPIO_PUP_PDN_CNTRL49_W::new(self) + pub fn gpio_pup_pdn_cntrl49(&mut self) -> GPIO_PUP_PDN_CNTRL49_W { + GPIO_PUP_PDN_CNTRL49_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 50"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl50( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL50_W { - GPIO_PUP_PDN_CNTRL50_W::new(self) + pub fn gpio_pup_pdn_cntrl50(&mut self) -> GPIO_PUP_PDN_CNTRL50_W { + GPIO_PUP_PDN_CNTRL50_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 51"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl51( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL51_W { - GPIO_PUP_PDN_CNTRL51_W::new(self) + pub fn gpio_pup_pdn_cntrl51(&mut self) -> GPIO_PUP_PDN_CNTRL51_W { + GPIO_PUP_PDN_CNTRL51_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 52"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl52( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL52_W { - GPIO_PUP_PDN_CNTRL52_W::new(self) + pub fn gpio_pup_pdn_cntrl52(&mut self) -> GPIO_PUP_PDN_CNTRL52_W { + GPIO_PUP_PDN_CNTRL52_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 53"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl53( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL53_W { - GPIO_PUP_PDN_CNTRL53_W::new(self) + pub fn gpio_pup_pdn_cntrl53(&mut self) -> GPIO_PUP_PDN_CNTRL53_W { + GPIO_PUP_PDN_CNTRL53_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 54"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl54( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL54_W { - GPIO_PUP_PDN_CNTRL54_W::new(self) + pub fn gpio_pup_pdn_cntrl54(&mut self) -> GPIO_PUP_PDN_CNTRL54_W { + GPIO_PUP_PDN_CNTRL54_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 55"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl55( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL55_W { - GPIO_PUP_PDN_CNTRL55_W::new(self) + pub fn gpio_pup_pdn_cntrl55(&mut self) -> GPIO_PUP_PDN_CNTRL55_W { + GPIO_PUP_PDN_CNTRL55_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 56"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl56( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL56_W { - GPIO_PUP_PDN_CNTRL56_W::new(self) + pub fn gpio_pup_pdn_cntrl56(&mut self) -> GPIO_PUP_PDN_CNTRL56_W { + GPIO_PUP_PDN_CNTRL56_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 57"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl57( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL57_W { - GPIO_PUP_PDN_CNTRL57_W::new(self) + pub fn gpio_pup_pdn_cntrl57(&mut self) -> GPIO_PUP_PDN_CNTRL57_W { + GPIO_PUP_PDN_CNTRL57_W::new(self, 18) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gplen0.rs b/crates/bcm2711-lpa/src/gpio/gplen0.rs index bfac268..2d0f220 100644 --- a/crates/bcm2711-lpa/src/gpio/gplen0.rs +++ b/crates/bcm2711-lpa/src/gpio/gplen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `LEN0` reader - Low detect enabled 0"] pub type LEN0_R = crate::BitReader; #[doc = "Field `LEN0` writer - Low detect enabled 0"] -pub type LEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN1` reader - Low detect enabled 1"] pub type LEN1_R = crate::BitReader; #[doc = "Field `LEN1` writer - Low detect enabled 1"] -pub type LEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN2` reader - Low detect enabled 2"] pub type LEN2_R = crate::BitReader; #[doc = "Field `LEN2` writer - Low detect enabled 2"] -pub type LEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN3` reader - Low detect enabled 3"] pub type LEN3_R = crate::BitReader; #[doc = "Field `LEN3` writer - Low detect enabled 3"] -pub type LEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN4` reader - Low detect enabled 4"] pub type LEN4_R = crate::BitReader; #[doc = "Field `LEN4` writer - Low detect enabled 4"] -pub type LEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN5` reader - Low detect enabled 5"] pub type LEN5_R = crate::BitReader; #[doc = "Field `LEN5` writer - Low detect enabled 5"] -pub type LEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN6` reader - Low detect enabled 6"] pub type LEN6_R = crate::BitReader; #[doc = "Field `LEN6` writer - Low detect enabled 6"] -pub type LEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN7` reader - Low detect enabled 7"] pub type LEN7_R = crate::BitReader; #[doc = "Field `LEN7` writer - Low detect enabled 7"] -pub type LEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN8` reader - Low detect enabled 8"] pub type LEN8_R = crate::BitReader; #[doc = "Field `LEN8` writer - Low detect enabled 8"] -pub type LEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN9` reader - Low detect enabled 9"] pub type LEN9_R = crate::BitReader; #[doc = "Field `LEN9` writer - Low detect enabled 9"] -pub type LEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN10` reader - Low detect enabled 10"] pub type LEN10_R = crate::BitReader; #[doc = "Field `LEN10` writer - Low detect enabled 10"] -pub type LEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN11` reader - Low detect enabled 11"] pub type LEN11_R = crate::BitReader; #[doc = "Field `LEN11` writer - Low detect enabled 11"] -pub type LEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN12` reader - Low detect enabled 12"] pub type LEN12_R = crate::BitReader; #[doc = "Field `LEN12` writer - Low detect enabled 12"] -pub type LEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN13` reader - Low detect enabled 13"] pub type LEN13_R = crate::BitReader; #[doc = "Field `LEN13` writer - Low detect enabled 13"] -pub type LEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN14` reader - Low detect enabled 14"] pub type LEN14_R = crate::BitReader; #[doc = "Field `LEN14` writer - Low detect enabled 14"] -pub type LEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN15` reader - Low detect enabled 15"] pub type LEN15_R = crate::BitReader; #[doc = "Field `LEN15` writer - Low detect enabled 15"] -pub type LEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN16` reader - Low detect enabled 16"] pub type LEN16_R = crate::BitReader; #[doc = "Field `LEN16` writer - Low detect enabled 16"] -pub type LEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN17` reader - Low detect enabled 17"] pub type LEN17_R = crate::BitReader; #[doc = "Field `LEN17` writer - Low detect enabled 17"] -pub type LEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN18` reader - Low detect enabled 18"] pub type LEN18_R = crate::BitReader; #[doc = "Field `LEN18` writer - Low detect enabled 18"] -pub type LEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN19` reader - Low detect enabled 19"] pub type LEN19_R = crate::BitReader; #[doc = "Field `LEN19` writer - Low detect enabled 19"] -pub type LEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN20` reader - Low detect enabled 20"] pub type LEN20_R = crate::BitReader; #[doc = "Field `LEN20` writer - Low detect enabled 20"] -pub type LEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN21` reader - Low detect enabled 21"] pub type LEN21_R = crate::BitReader; #[doc = "Field `LEN21` writer - Low detect enabled 21"] -pub type LEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN22` reader - Low detect enabled 22"] pub type LEN22_R = crate::BitReader; #[doc = "Field `LEN22` writer - Low detect enabled 22"] -pub type LEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN23` reader - Low detect enabled 23"] pub type LEN23_R = crate::BitReader; #[doc = "Field `LEN23` writer - Low detect enabled 23"] -pub type LEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN24` reader - Low detect enabled 24"] pub type LEN24_R = crate::BitReader; #[doc = "Field `LEN24` writer - Low detect enabled 24"] -pub type LEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN25` reader - Low detect enabled 25"] pub type LEN25_R = crate::BitReader; #[doc = "Field `LEN25` writer - Low detect enabled 25"] -pub type LEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN26` reader - Low detect enabled 26"] pub type LEN26_R = crate::BitReader; #[doc = "Field `LEN26` writer - Low detect enabled 26"] -pub type LEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN27` reader - Low detect enabled 27"] pub type LEN27_R = crate::BitReader; #[doc = "Field `LEN27` writer - Low detect enabled 27"] -pub type LEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN28` reader - Low detect enabled 28"] pub type LEN28_R = crate::BitReader; #[doc = "Field `LEN28` writer - Low detect enabled 28"] -pub type LEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN29` reader - Low detect enabled 29"] pub type LEN29_R = crate::BitReader; #[doc = "Field `LEN29` writer - Low detect enabled 29"] -pub type LEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN30` reader - Low detect enabled 30"] pub type LEN30_R = crate::BitReader; #[doc = "Field `LEN30` writer - Low detect enabled 30"] -pub type LEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN31` reader - Low detect enabled 31"] pub type LEN31_R = crate::BitReader; #[doc = "Field `LEN31` writer - Low detect enabled 31"] -pub type LEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Low detect enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Low detect enabled 0"] #[inline(always)] #[must_use] - pub fn len0(&mut self) -> LEN0_W { - LEN0_W::new(self) + pub fn len0(&mut self) -> LEN0_W { + LEN0_W::new(self, 0) } #[doc = "Bit 1 - Low detect enabled 1"] #[inline(always)] #[must_use] - pub fn len1(&mut self) -> LEN1_W { - LEN1_W::new(self) + pub fn len1(&mut self) -> LEN1_W { + LEN1_W::new(self, 1) } #[doc = "Bit 2 - Low detect enabled 2"] #[inline(always)] #[must_use] - pub fn len2(&mut self) -> LEN2_W { - LEN2_W::new(self) + pub fn len2(&mut self) -> LEN2_W { + LEN2_W::new(self, 2) } #[doc = "Bit 3 - Low detect enabled 3"] #[inline(always)] #[must_use] - pub fn len3(&mut self) -> LEN3_W { - LEN3_W::new(self) + pub fn len3(&mut self) -> LEN3_W { + LEN3_W::new(self, 3) } #[doc = "Bit 4 - Low detect enabled 4"] #[inline(always)] #[must_use] - pub fn len4(&mut self) -> LEN4_W { - LEN4_W::new(self) + pub fn len4(&mut self) -> LEN4_W { + LEN4_W::new(self, 4) } #[doc = "Bit 5 - Low detect enabled 5"] #[inline(always)] #[must_use] - pub fn len5(&mut self) -> LEN5_W { - LEN5_W::new(self) + pub fn len5(&mut self) -> LEN5_W { + LEN5_W::new(self, 5) } #[doc = "Bit 6 - Low detect enabled 6"] #[inline(always)] #[must_use] - pub fn len6(&mut self) -> LEN6_W { - LEN6_W::new(self) + pub fn len6(&mut self) -> LEN6_W { + LEN6_W::new(self, 6) } #[doc = "Bit 7 - Low detect enabled 7"] #[inline(always)] #[must_use] - pub fn len7(&mut self) -> LEN7_W { - LEN7_W::new(self) + pub fn len7(&mut self) -> LEN7_W { + LEN7_W::new(self, 7) } #[doc = "Bit 8 - Low detect enabled 8"] #[inline(always)] #[must_use] - pub fn len8(&mut self) -> LEN8_W { - LEN8_W::new(self) + pub fn len8(&mut self) -> LEN8_W { + LEN8_W::new(self, 8) } #[doc = "Bit 9 - Low detect enabled 9"] #[inline(always)] #[must_use] - pub fn len9(&mut self) -> LEN9_W { - LEN9_W::new(self) + pub fn len9(&mut self) -> LEN9_W { + LEN9_W::new(self, 9) } #[doc = "Bit 10 - Low detect enabled 10"] #[inline(always)] #[must_use] - pub fn len10(&mut self) -> LEN10_W { - LEN10_W::new(self) + pub fn len10(&mut self) -> LEN10_W { + LEN10_W::new(self, 10) } #[doc = "Bit 11 - Low detect enabled 11"] #[inline(always)] #[must_use] - pub fn len11(&mut self) -> LEN11_W { - LEN11_W::new(self) + pub fn len11(&mut self) -> LEN11_W { + LEN11_W::new(self, 11) } #[doc = "Bit 12 - Low detect enabled 12"] #[inline(always)] #[must_use] - pub fn len12(&mut self) -> LEN12_W { - LEN12_W::new(self) + pub fn len12(&mut self) -> LEN12_W { + LEN12_W::new(self, 12) } #[doc = "Bit 13 - Low detect enabled 13"] #[inline(always)] #[must_use] - pub fn len13(&mut self) -> LEN13_W { - LEN13_W::new(self) + pub fn len13(&mut self) -> LEN13_W { + LEN13_W::new(self, 13) } #[doc = "Bit 14 - Low detect enabled 14"] #[inline(always)] #[must_use] - pub fn len14(&mut self) -> LEN14_W { - LEN14_W::new(self) + pub fn len14(&mut self) -> LEN14_W { + LEN14_W::new(self, 14) } #[doc = "Bit 15 - Low detect enabled 15"] #[inline(always)] #[must_use] - pub fn len15(&mut self) -> LEN15_W { - LEN15_W::new(self) + pub fn len15(&mut self) -> LEN15_W { + LEN15_W::new(self, 15) } #[doc = "Bit 16 - Low detect enabled 16"] #[inline(always)] #[must_use] - pub fn len16(&mut self) -> LEN16_W { - LEN16_W::new(self) + pub fn len16(&mut self) -> LEN16_W { + LEN16_W::new(self, 16) } #[doc = "Bit 17 - Low detect enabled 17"] #[inline(always)] #[must_use] - pub fn len17(&mut self) -> LEN17_W { - LEN17_W::new(self) + pub fn len17(&mut self) -> LEN17_W { + LEN17_W::new(self, 17) } #[doc = "Bit 18 - Low detect enabled 18"] #[inline(always)] #[must_use] - pub fn len18(&mut self) -> LEN18_W { - LEN18_W::new(self) + pub fn len18(&mut self) -> LEN18_W { + LEN18_W::new(self, 18) } #[doc = "Bit 19 - Low detect enabled 19"] #[inline(always)] #[must_use] - pub fn len19(&mut self) -> LEN19_W { - LEN19_W::new(self) + pub fn len19(&mut self) -> LEN19_W { + LEN19_W::new(self, 19) } #[doc = "Bit 20 - Low detect enabled 20"] #[inline(always)] #[must_use] - pub fn len20(&mut self) -> LEN20_W { - LEN20_W::new(self) + pub fn len20(&mut self) -> LEN20_W { + LEN20_W::new(self, 20) } #[doc = "Bit 21 - Low detect enabled 21"] #[inline(always)] #[must_use] - pub fn len21(&mut self) -> LEN21_W { - LEN21_W::new(self) + pub fn len21(&mut self) -> LEN21_W { + LEN21_W::new(self, 21) } #[doc = "Bit 22 - Low detect enabled 22"] #[inline(always)] #[must_use] - pub fn len22(&mut self) -> LEN22_W { - LEN22_W::new(self) + pub fn len22(&mut self) -> LEN22_W { + LEN22_W::new(self, 22) } #[doc = "Bit 23 - Low detect enabled 23"] #[inline(always)] #[must_use] - pub fn len23(&mut self) -> LEN23_W { - LEN23_W::new(self) + pub fn len23(&mut self) -> LEN23_W { + LEN23_W::new(self, 23) } #[doc = "Bit 24 - Low detect enabled 24"] #[inline(always)] #[must_use] - pub fn len24(&mut self) -> LEN24_W { - LEN24_W::new(self) + pub fn len24(&mut self) -> LEN24_W { + LEN24_W::new(self, 24) } #[doc = "Bit 25 - Low detect enabled 25"] #[inline(always)] #[must_use] - pub fn len25(&mut self) -> LEN25_W { - LEN25_W::new(self) + pub fn len25(&mut self) -> LEN25_W { + LEN25_W::new(self, 25) } #[doc = "Bit 26 - Low detect enabled 26"] #[inline(always)] #[must_use] - pub fn len26(&mut self) -> LEN26_W { - LEN26_W::new(self) + pub fn len26(&mut self) -> LEN26_W { + LEN26_W::new(self, 26) } #[doc = "Bit 27 - Low detect enabled 27"] #[inline(always)] #[must_use] - pub fn len27(&mut self) -> LEN27_W { - LEN27_W::new(self) + pub fn len27(&mut self) -> LEN27_W { + LEN27_W::new(self, 27) } #[doc = "Bit 28 - Low detect enabled 28"] #[inline(always)] #[must_use] - pub fn len28(&mut self) -> LEN28_W { - LEN28_W::new(self) + pub fn len28(&mut self) -> LEN28_W { + LEN28_W::new(self, 28) } #[doc = "Bit 29 - Low detect enabled 29"] #[inline(always)] #[must_use] - pub fn len29(&mut self) -> LEN29_W { - LEN29_W::new(self) + pub fn len29(&mut self) -> LEN29_W { + LEN29_W::new(self, 29) } #[doc = "Bit 30 - Low detect enabled 30"] #[inline(always)] #[must_use] - pub fn len30(&mut self) -> LEN30_W { - LEN30_W::new(self) + pub fn len30(&mut self) -> LEN30_W { + LEN30_W::new(self, 30) } #[doc = "Bit 31 - Low detect enabled 31"] #[inline(always)] #[must_use] - pub fn len31(&mut self) -> LEN31_W { - LEN31_W::new(self) + pub fn len31(&mut self) -> LEN31_W { + LEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gplen1.rs b/crates/bcm2711-lpa/src/gpio/gplen1.rs index 72455bd..8fa6db6 100644 --- a/crates/bcm2711-lpa/src/gpio/gplen1.rs +++ b/crates/bcm2711-lpa/src/gpio/gplen1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `LEN32` reader - Low detect enabled 32"] pub type LEN32_R = crate::BitReader; #[doc = "Field `LEN32` writer - Low detect enabled 32"] -pub type LEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN33` reader - Low detect enabled 33"] pub type LEN33_R = crate::BitReader; #[doc = "Field `LEN33` writer - Low detect enabled 33"] -pub type LEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN34` reader - Low detect enabled 34"] pub type LEN34_R = crate::BitReader; #[doc = "Field `LEN34` writer - Low detect enabled 34"] -pub type LEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN35` reader - Low detect enabled 35"] pub type LEN35_R = crate::BitReader; #[doc = "Field `LEN35` writer - Low detect enabled 35"] -pub type LEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN36` reader - Low detect enabled 36"] pub type LEN36_R = crate::BitReader; #[doc = "Field `LEN36` writer - Low detect enabled 36"] -pub type LEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN37` reader - Low detect enabled 37"] pub type LEN37_R = crate::BitReader; #[doc = "Field `LEN37` writer - Low detect enabled 37"] -pub type LEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN38` reader - Low detect enabled 38"] pub type LEN38_R = crate::BitReader; #[doc = "Field `LEN38` writer - Low detect enabled 38"] -pub type LEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN39` reader - Low detect enabled 39"] pub type LEN39_R = crate::BitReader; #[doc = "Field `LEN39` writer - Low detect enabled 39"] -pub type LEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN40` reader - Low detect enabled 40"] pub type LEN40_R = crate::BitReader; #[doc = "Field `LEN40` writer - Low detect enabled 40"] -pub type LEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN41` reader - Low detect enabled 41"] pub type LEN41_R = crate::BitReader; #[doc = "Field `LEN41` writer - Low detect enabled 41"] -pub type LEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN42` reader - Low detect enabled 42"] pub type LEN42_R = crate::BitReader; #[doc = "Field `LEN42` writer - Low detect enabled 42"] -pub type LEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN43` reader - Low detect enabled 43"] pub type LEN43_R = crate::BitReader; #[doc = "Field `LEN43` writer - Low detect enabled 43"] -pub type LEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN44` reader - Low detect enabled 44"] pub type LEN44_R = crate::BitReader; #[doc = "Field `LEN44` writer - Low detect enabled 44"] -pub type LEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN45` reader - Low detect enabled 45"] pub type LEN45_R = crate::BitReader; #[doc = "Field `LEN45` writer - Low detect enabled 45"] -pub type LEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN46` reader - Low detect enabled 46"] pub type LEN46_R = crate::BitReader; #[doc = "Field `LEN46` writer - Low detect enabled 46"] -pub type LEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN47` reader - Low detect enabled 47"] pub type LEN47_R = crate::BitReader; #[doc = "Field `LEN47` writer - Low detect enabled 47"] -pub type LEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN48` reader - Low detect enabled 48"] pub type LEN48_R = crate::BitReader; #[doc = "Field `LEN48` writer - Low detect enabled 48"] -pub type LEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN49` reader - Low detect enabled 49"] pub type LEN49_R = crate::BitReader; #[doc = "Field `LEN49` writer - Low detect enabled 49"] -pub type LEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN50` reader - Low detect enabled 50"] pub type LEN50_R = crate::BitReader; #[doc = "Field `LEN50` writer - Low detect enabled 50"] -pub type LEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN51` reader - Low detect enabled 51"] pub type LEN51_R = crate::BitReader; #[doc = "Field `LEN51` writer - Low detect enabled 51"] -pub type LEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN52` reader - Low detect enabled 52"] pub type LEN52_R = crate::BitReader; #[doc = "Field `LEN52` writer - Low detect enabled 52"] -pub type LEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN53` reader - Low detect enabled 53"] pub type LEN53_R = crate::BitReader; #[doc = "Field `LEN53` writer - Low detect enabled 53"] -pub type LEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN54` reader - Low detect enabled 54"] pub type LEN54_R = crate::BitReader; #[doc = "Field `LEN54` writer - Low detect enabled 54"] -pub type LEN54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN55` reader - Low detect enabled 55"] pub type LEN55_R = crate::BitReader; #[doc = "Field `LEN55` writer - Low detect enabled 55"] -pub type LEN55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN56` reader - Low detect enabled 56"] pub type LEN56_R = crate::BitReader; #[doc = "Field `LEN56` writer - Low detect enabled 56"] -pub type LEN56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN57` reader - Low detect enabled 57"] pub type LEN57_R = crate::BitReader; #[doc = "Field `LEN57` writer - Low detect enabled 57"] -pub type LEN57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN57_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Low detect enabled 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Low detect enabled 32"] #[inline(always)] #[must_use] - pub fn len32(&mut self) -> LEN32_W { - LEN32_W::new(self) + pub fn len32(&mut self) -> LEN32_W { + LEN32_W::new(self, 0) } #[doc = "Bit 1 - Low detect enabled 33"] #[inline(always)] #[must_use] - pub fn len33(&mut self) -> LEN33_W { - LEN33_W::new(self) + pub fn len33(&mut self) -> LEN33_W { + LEN33_W::new(self, 1) } #[doc = "Bit 2 - Low detect enabled 34"] #[inline(always)] #[must_use] - pub fn len34(&mut self) -> LEN34_W { - LEN34_W::new(self) + pub fn len34(&mut self) -> LEN34_W { + LEN34_W::new(self, 2) } #[doc = "Bit 3 - Low detect enabled 35"] #[inline(always)] #[must_use] - pub fn len35(&mut self) -> LEN35_W { - LEN35_W::new(self) + pub fn len35(&mut self) -> LEN35_W { + LEN35_W::new(self, 3) } #[doc = "Bit 4 - Low detect enabled 36"] #[inline(always)] #[must_use] - pub fn len36(&mut self) -> LEN36_W { - LEN36_W::new(self) + pub fn len36(&mut self) -> LEN36_W { + LEN36_W::new(self, 4) } #[doc = "Bit 5 - Low detect enabled 37"] #[inline(always)] #[must_use] - pub fn len37(&mut self) -> LEN37_W { - LEN37_W::new(self) + pub fn len37(&mut self) -> LEN37_W { + LEN37_W::new(self, 5) } #[doc = "Bit 6 - Low detect enabled 38"] #[inline(always)] #[must_use] - pub fn len38(&mut self) -> LEN38_W { - LEN38_W::new(self) + pub fn len38(&mut self) -> LEN38_W { + LEN38_W::new(self, 6) } #[doc = "Bit 7 - Low detect enabled 39"] #[inline(always)] #[must_use] - pub fn len39(&mut self) -> LEN39_W { - LEN39_W::new(self) + pub fn len39(&mut self) -> LEN39_W { + LEN39_W::new(self, 7) } #[doc = "Bit 8 - Low detect enabled 40"] #[inline(always)] #[must_use] - pub fn len40(&mut self) -> LEN40_W { - LEN40_W::new(self) + pub fn len40(&mut self) -> LEN40_W { + LEN40_W::new(self, 8) } #[doc = "Bit 9 - Low detect enabled 41"] #[inline(always)] #[must_use] - pub fn len41(&mut self) -> LEN41_W { - LEN41_W::new(self) + pub fn len41(&mut self) -> LEN41_W { + LEN41_W::new(self, 9) } #[doc = "Bit 10 - Low detect enabled 42"] #[inline(always)] #[must_use] - pub fn len42(&mut self) -> LEN42_W { - LEN42_W::new(self) + pub fn len42(&mut self) -> LEN42_W { + LEN42_W::new(self, 10) } #[doc = "Bit 11 - Low detect enabled 43"] #[inline(always)] #[must_use] - pub fn len43(&mut self) -> LEN43_W { - LEN43_W::new(self) + pub fn len43(&mut self) -> LEN43_W { + LEN43_W::new(self, 11) } #[doc = "Bit 12 - Low detect enabled 44"] #[inline(always)] #[must_use] - pub fn len44(&mut self) -> LEN44_W { - LEN44_W::new(self) + pub fn len44(&mut self) -> LEN44_W { + LEN44_W::new(self, 12) } #[doc = "Bit 13 - Low detect enabled 45"] #[inline(always)] #[must_use] - pub fn len45(&mut self) -> LEN45_W { - LEN45_W::new(self) + pub fn len45(&mut self) -> LEN45_W { + LEN45_W::new(self, 13) } #[doc = "Bit 14 - Low detect enabled 46"] #[inline(always)] #[must_use] - pub fn len46(&mut self) -> LEN46_W { - LEN46_W::new(self) + pub fn len46(&mut self) -> LEN46_W { + LEN46_W::new(self, 14) } #[doc = "Bit 15 - Low detect enabled 47"] #[inline(always)] #[must_use] - pub fn len47(&mut self) -> LEN47_W { - LEN47_W::new(self) + pub fn len47(&mut self) -> LEN47_W { + LEN47_W::new(self, 15) } #[doc = "Bit 16 - Low detect enabled 48"] #[inline(always)] #[must_use] - pub fn len48(&mut self) -> LEN48_W { - LEN48_W::new(self) + pub fn len48(&mut self) -> LEN48_W { + LEN48_W::new(self, 16) } #[doc = "Bit 17 - Low detect enabled 49"] #[inline(always)] #[must_use] - pub fn len49(&mut self) -> LEN49_W { - LEN49_W::new(self) + pub fn len49(&mut self) -> LEN49_W { + LEN49_W::new(self, 17) } #[doc = "Bit 18 - Low detect enabled 50"] #[inline(always)] #[must_use] - pub fn len50(&mut self) -> LEN50_W { - LEN50_W::new(self) + pub fn len50(&mut self) -> LEN50_W { + LEN50_W::new(self, 18) } #[doc = "Bit 19 - Low detect enabled 51"] #[inline(always)] #[must_use] - pub fn len51(&mut self) -> LEN51_W { - LEN51_W::new(self) + pub fn len51(&mut self) -> LEN51_W { + LEN51_W::new(self, 19) } #[doc = "Bit 20 - Low detect enabled 52"] #[inline(always)] #[must_use] - pub fn len52(&mut self) -> LEN52_W { - LEN52_W::new(self) + pub fn len52(&mut self) -> LEN52_W { + LEN52_W::new(self, 20) } #[doc = "Bit 21 - Low detect enabled 53"] #[inline(always)] #[must_use] - pub fn len53(&mut self) -> LEN53_W { - LEN53_W::new(self) + pub fn len53(&mut self) -> LEN53_W { + LEN53_W::new(self, 21) } #[doc = "Bit 22 - Low detect enabled 54"] #[inline(always)] #[must_use] - pub fn len54(&mut self) -> LEN54_W { - LEN54_W::new(self) + pub fn len54(&mut self) -> LEN54_W { + LEN54_W::new(self, 22) } #[doc = "Bit 23 - Low detect enabled 55"] #[inline(always)] #[must_use] - pub fn len55(&mut self) -> LEN55_W { - LEN55_W::new(self) + pub fn len55(&mut self) -> LEN55_W { + LEN55_W::new(self, 23) } #[doc = "Bit 24 - Low detect enabled 56"] #[inline(always)] #[must_use] - pub fn len56(&mut self) -> LEN56_W { - LEN56_W::new(self) + pub fn len56(&mut self) -> LEN56_W { + LEN56_W::new(self, 24) } #[doc = "Bit 25 - Low detect enabled 57"] #[inline(always)] #[must_use] - pub fn len57(&mut self) -> LEN57_W { - LEN57_W::new(self) + pub fn len57(&mut self) -> LEN57_W { + LEN57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gplev0.rs b/crates/bcm2711-lpa/src/gpio/gplev0.rs index 43e1e5c..3179253 100644 --- a/crates/bcm2711-lpa/src/gpio/gplev0.rs +++ b/crates/bcm2711-lpa/src/gpio/gplev0.rs @@ -266,7 +266,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "GPIO Pin Level 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gplev0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gpio/gplev1.rs b/crates/bcm2711-lpa/src/gpio/gplev1.rs index fc828ee..e8765dc 100644 --- a/crates/bcm2711-lpa/src/gpio/gplev1.rs +++ b/crates/bcm2711-lpa/src/gpio/gplev1.rs @@ -218,7 +218,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "GPIO Pin Level 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gplev1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/gpio/gpren0.rs b/crates/bcm2711-lpa/src/gpio/gpren0.rs index f4dfc2e..59cff0d 100644 --- a/crates/bcm2711-lpa/src/gpio/gpren0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpren0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `REN0` reader - Rising edge enabled 0"] pub type REN0_R = crate::BitReader; #[doc = "Field `REN0` writer - Rising edge enabled 0"] -pub type REN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN1` reader - Rising edge enabled 1"] pub type REN1_R = crate::BitReader; #[doc = "Field `REN1` writer - Rising edge enabled 1"] -pub type REN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN2` reader - Rising edge enabled 2"] pub type REN2_R = crate::BitReader; #[doc = "Field `REN2` writer - Rising edge enabled 2"] -pub type REN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN3` reader - Rising edge enabled 3"] pub type REN3_R = crate::BitReader; #[doc = "Field `REN3` writer - Rising edge enabled 3"] -pub type REN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN4` reader - Rising edge enabled 4"] pub type REN4_R = crate::BitReader; #[doc = "Field `REN4` writer - Rising edge enabled 4"] -pub type REN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN5` reader - Rising edge enabled 5"] pub type REN5_R = crate::BitReader; #[doc = "Field `REN5` writer - Rising edge enabled 5"] -pub type REN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN6` reader - Rising edge enabled 6"] pub type REN6_R = crate::BitReader; #[doc = "Field `REN6` writer - Rising edge enabled 6"] -pub type REN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN7` reader - Rising edge enabled 7"] pub type REN7_R = crate::BitReader; #[doc = "Field `REN7` writer - Rising edge enabled 7"] -pub type REN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN8` reader - Rising edge enabled 8"] pub type REN8_R = crate::BitReader; #[doc = "Field `REN8` writer - Rising edge enabled 8"] -pub type REN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN9` reader - Rising edge enabled 9"] pub type REN9_R = crate::BitReader; #[doc = "Field `REN9` writer - Rising edge enabled 9"] -pub type REN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN10` reader - Rising edge enabled 10"] pub type REN10_R = crate::BitReader; #[doc = "Field `REN10` writer - Rising edge enabled 10"] -pub type REN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN11` reader - Rising edge enabled 11"] pub type REN11_R = crate::BitReader; #[doc = "Field `REN11` writer - Rising edge enabled 11"] -pub type REN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN12` reader - Rising edge enabled 12"] pub type REN12_R = crate::BitReader; #[doc = "Field `REN12` writer - Rising edge enabled 12"] -pub type REN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN13` reader - Rising edge enabled 13"] pub type REN13_R = crate::BitReader; #[doc = "Field `REN13` writer - Rising edge enabled 13"] -pub type REN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN14` reader - Rising edge enabled 14"] pub type REN14_R = crate::BitReader; #[doc = "Field `REN14` writer - Rising edge enabled 14"] -pub type REN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN15` reader - Rising edge enabled 15"] pub type REN15_R = crate::BitReader; #[doc = "Field `REN15` writer - Rising edge enabled 15"] -pub type REN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN16` reader - Rising edge enabled 16"] pub type REN16_R = crate::BitReader; #[doc = "Field `REN16` writer - Rising edge enabled 16"] -pub type REN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN17` reader - Rising edge enabled 17"] pub type REN17_R = crate::BitReader; #[doc = "Field `REN17` writer - Rising edge enabled 17"] -pub type REN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN18` reader - Rising edge enabled 18"] pub type REN18_R = crate::BitReader; #[doc = "Field `REN18` writer - Rising edge enabled 18"] -pub type REN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN19` reader - Rising edge enabled 19"] pub type REN19_R = crate::BitReader; #[doc = "Field `REN19` writer - Rising edge enabled 19"] -pub type REN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN20` reader - Rising edge enabled 20"] pub type REN20_R = crate::BitReader; #[doc = "Field `REN20` writer - Rising edge enabled 20"] -pub type REN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN21` reader - Rising edge enabled 21"] pub type REN21_R = crate::BitReader; #[doc = "Field `REN21` writer - Rising edge enabled 21"] -pub type REN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN22` reader - Rising edge enabled 22"] pub type REN22_R = crate::BitReader; #[doc = "Field `REN22` writer - Rising edge enabled 22"] -pub type REN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN23` reader - Rising edge enabled 23"] pub type REN23_R = crate::BitReader; #[doc = "Field `REN23` writer - Rising edge enabled 23"] -pub type REN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN24` reader - Rising edge enabled 24"] pub type REN24_R = crate::BitReader; #[doc = "Field `REN24` writer - Rising edge enabled 24"] -pub type REN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN25` reader - Rising edge enabled 25"] pub type REN25_R = crate::BitReader; #[doc = "Field `REN25` writer - Rising edge enabled 25"] -pub type REN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN26` reader - Rising edge enabled 26"] pub type REN26_R = crate::BitReader; #[doc = "Field `REN26` writer - Rising edge enabled 26"] -pub type REN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN27` reader - Rising edge enabled 27"] pub type REN27_R = crate::BitReader; #[doc = "Field `REN27` writer - Rising edge enabled 27"] -pub type REN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN28` reader - Rising edge enabled 28"] pub type REN28_R = crate::BitReader; #[doc = "Field `REN28` writer - Rising edge enabled 28"] -pub type REN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN29` reader - Rising edge enabled 29"] pub type REN29_R = crate::BitReader; #[doc = "Field `REN29` writer - Rising edge enabled 29"] -pub type REN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN30` reader - Rising edge enabled 30"] pub type REN30_R = crate::BitReader; #[doc = "Field `REN30` writer - Rising edge enabled 30"] -pub type REN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN31` reader - Rising edge enabled 31"] pub type REN31_R = crate::BitReader; #[doc = "Field `REN31` writer - Rising edge enabled 31"] -pub type REN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Rising edge enabled 0"] #[inline(always)] #[must_use] - pub fn ren0(&mut self) -> REN0_W { - REN0_W::new(self) + pub fn ren0(&mut self) -> REN0_W { + REN0_W::new(self, 0) } #[doc = "Bit 1 - Rising edge enabled 1"] #[inline(always)] #[must_use] - pub fn ren1(&mut self) -> REN1_W { - REN1_W::new(self) + pub fn ren1(&mut self) -> REN1_W { + REN1_W::new(self, 1) } #[doc = "Bit 2 - Rising edge enabled 2"] #[inline(always)] #[must_use] - pub fn ren2(&mut self) -> REN2_W { - REN2_W::new(self) + pub fn ren2(&mut self) -> REN2_W { + REN2_W::new(self, 2) } #[doc = "Bit 3 - Rising edge enabled 3"] #[inline(always)] #[must_use] - pub fn ren3(&mut self) -> REN3_W { - REN3_W::new(self) + pub fn ren3(&mut self) -> REN3_W { + REN3_W::new(self, 3) } #[doc = "Bit 4 - Rising edge enabled 4"] #[inline(always)] #[must_use] - pub fn ren4(&mut self) -> REN4_W { - REN4_W::new(self) + pub fn ren4(&mut self) -> REN4_W { + REN4_W::new(self, 4) } #[doc = "Bit 5 - Rising edge enabled 5"] #[inline(always)] #[must_use] - pub fn ren5(&mut self) -> REN5_W { - REN5_W::new(self) + pub fn ren5(&mut self) -> REN5_W { + REN5_W::new(self, 5) } #[doc = "Bit 6 - Rising edge enabled 6"] #[inline(always)] #[must_use] - pub fn ren6(&mut self) -> REN6_W { - REN6_W::new(self) + pub fn ren6(&mut self) -> REN6_W { + REN6_W::new(self, 6) } #[doc = "Bit 7 - Rising edge enabled 7"] #[inline(always)] #[must_use] - pub fn ren7(&mut self) -> REN7_W { - REN7_W::new(self) + pub fn ren7(&mut self) -> REN7_W { + REN7_W::new(self, 7) } #[doc = "Bit 8 - Rising edge enabled 8"] #[inline(always)] #[must_use] - pub fn ren8(&mut self) -> REN8_W { - REN8_W::new(self) + pub fn ren8(&mut self) -> REN8_W { + REN8_W::new(self, 8) } #[doc = "Bit 9 - Rising edge enabled 9"] #[inline(always)] #[must_use] - pub fn ren9(&mut self) -> REN9_W { - REN9_W::new(self) + pub fn ren9(&mut self) -> REN9_W { + REN9_W::new(self, 9) } #[doc = "Bit 10 - Rising edge enabled 10"] #[inline(always)] #[must_use] - pub fn ren10(&mut self) -> REN10_W { - REN10_W::new(self) + pub fn ren10(&mut self) -> REN10_W { + REN10_W::new(self, 10) } #[doc = "Bit 11 - Rising edge enabled 11"] #[inline(always)] #[must_use] - pub fn ren11(&mut self) -> REN11_W { - REN11_W::new(self) + pub fn ren11(&mut self) -> REN11_W { + REN11_W::new(self, 11) } #[doc = "Bit 12 - Rising edge enabled 12"] #[inline(always)] #[must_use] - pub fn ren12(&mut self) -> REN12_W { - REN12_W::new(self) + pub fn ren12(&mut self) -> REN12_W { + REN12_W::new(self, 12) } #[doc = "Bit 13 - Rising edge enabled 13"] #[inline(always)] #[must_use] - pub fn ren13(&mut self) -> REN13_W { - REN13_W::new(self) + pub fn ren13(&mut self) -> REN13_W { + REN13_W::new(self, 13) } #[doc = "Bit 14 - Rising edge enabled 14"] #[inline(always)] #[must_use] - pub fn ren14(&mut self) -> REN14_W { - REN14_W::new(self) + pub fn ren14(&mut self) -> REN14_W { + REN14_W::new(self, 14) } #[doc = "Bit 15 - Rising edge enabled 15"] #[inline(always)] #[must_use] - pub fn ren15(&mut self) -> REN15_W { - REN15_W::new(self) + pub fn ren15(&mut self) -> REN15_W { + REN15_W::new(self, 15) } #[doc = "Bit 16 - Rising edge enabled 16"] #[inline(always)] #[must_use] - pub fn ren16(&mut self) -> REN16_W { - REN16_W::new(self) + pub fn ren16(&mut self) -> REN16_W { + REN16_W::new(self, 16) } #[doc = "Bit 17 - Rising edge enabled 17"] #[inline(always)] #[must_use] - pub fn ren17(&mut self) -> REN17_W { - REN17_W::new(self) + pub fn ren17(&mut self) -> REN17_W { + REN17_W::new(self, 17) } #[doc = "Bit 18 - Rising edge enabled 18"] #[inline(always)] #[must_use] - pub fn ren18(&mut self) -> REN18_W { - REN18_W::new(self) + pub fn ren18(&mut self) -> REN18_W { + REN18_W::new(self, 18) } #[doc = "Bit 19 - Rising edge enabled 19"] #[inline(always)] #[must_use] - pub fn ren19(&mut self) -> REN19_W { - REN19_W::new(self) + pub fn ren19(&mut self) -> REN19_W { + REN19_W::new(self, 19) } #[doc = "Bit 20 - Rising edge enabled 20"] #[inline(always)] #[must_use] - pub fn ren20(&mut self) -> REN20_W { - REN20_W::new(self) + pub fn ren20(&mut self) -> REN20_W { + REN20_W::new(self, 20) } #[doc = "Bit 21 - Rising edge enabled 21"] #[inline(always)] #[must_use] - pub fn ren21(&mut self) -> REN21_W { - REN21_W::new(self) + pub fn ren21(&mut self) -> REN21_W { + REN21_W::new(self, 21) } #[doc = "Bit 22 - Rising edge enabled 22"] #[inline(always)] #[must_use] - pub fn ren22(&mut self) -> REN22_W { - REN22_W::new(self) + pub fn ren22(&mut self) -> REN22_W { + REN22_W::new(self, 22) } #[doc = "Bit 23 - Rising edge enabled 23"] #[inline(always)] #[must_use] - pub fn ren23(&mut self) -> REN23_W { - REN23_W::new(self) + pub fn ren23(&mut self) -> REN23_W { + REN23_W::new(self, 23) } #[doc = "Bit 24 - Rising edge enabled 24"] #[inline(always)] #[must_use] - pub fn ren24(&mut self) -> REN24_W { - REN24_W::new(self) + pub fn ren24(&mut self) -> REN24_W { + REN24_W::new(self, 24) } #[doc = "Bit 25 - Rising edge enabled 25"] #[inline(always)] #[must_use] - pub fn ren25(&mut self) -> REN25_W { - REN25_W::new(self) + pub fn ren25(&mut self) -> REN25_W { + REN25_W::new(self, 25) } #[doc = "Bit 26 - Rising edge enabled 26"] #[inline(always)] #[must_use] - pub fn ren26(&mut self) -> REN26_W { - REN26_W::new(self) + pub fn ren26(&mut self) -> REN26_W { + REN26_W::new(self, 26) } #[doc = "Bit 27 - Rising edge enabled 27"] #[inline(always)] #[must_use] - pub fn ren27(&mut self) -> REN27_W { - REN27_W::new(self) + pub fn ren27(&mut self) -> REN27_W { + REN27_W::new(self, 27) } #[doc = "Bit 28 - Rising edge enabled 28"] #[inline(always)] #[must_use] - pub fn ren28(&mut self) -> REN28_W { - REN28_W::new(self) + pub fn ren28(&mut self) -> REN28_W { + REN28_W::new(self, 28) } #[doc = "Bit 29 - Rising edge enabled 29"] #[inline(always)] #[must_use] - pub fn ren29(&mut self) -> REN29_W { - REN29_W::new(self) + pub fn ren29(&mut self) -> REN29_W { + REN29_W::new(self, 29) } #[doc = "Bit 30 - Rising edge enabled 30"] #[inline(always)] #[must_use] - pub fn ren30(&mut self) -> REN30_W { - REN30_W::new(self) + pub fn ren30(&mut self) -> REN30_W { + REN30_W::new(self, 30) } #[doc = "Bit 31 - Rising edge enabled 31"] #[inline(always)] #[must_use] - pub fn ren31(&mut self) -> REN31_W { - REN31_W::new(self) + pub fn ren31(&mut self) -> REN31_W { + REN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpren1.rs b/crates/bcm2711-lpa/src/gpio/gpren1.rs index 9710e89..2e0d7c5 100644 --- a/crates/bcm2711-lpa/src/gpio/gpren1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpren1.rs @@ -5,107 +5,107 @@ pub type W = crate::W; #[doc = "Field `REN32` reader - Rising edge enabled 32"] pub type REN32_R = crate::BitReader; #[doc = "Field `REN32` writer - Rising edge enabled 32"] -pub type REN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN33` reader - Rising edge enabled 33"] pub type REN33_R = crate::BitReader; #[doc = "Field `REN33` writer - Rising edge enabled 33"] -pub type REN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN34` reader - Rising edge enabled 34"] pub type REN34_R = crate::BitReader; #[doc = "Field `REN34` writer - Rising edge enabled 34"] -pub type REN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN35` reader - Rising edge enabled 35"] pub type REN35_R = crate::BitReader; #[doc = "Field `REN35` writer - Rising edge enabled 35"] -pub type REN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN36` reader - Rising edge enabled 36"] pub type REN36_R = crate::BitReader; #[doc = "Field `REN36` writer - Rising edge enabled 36"] -pub type REN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN37` reader - Rising edge enabled 37"] pub type REN37_R = crate::BitReader; #[doc = "Field `REN37` writer - Rising edge enabled 37"] -pub type REN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN38` reader - Rising edge enabled 38"] pub type REN38_R = crate::BitReader; #[doc = "Field `REN38` writer - Rising edge enabled 38"] -pub type REN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN39` reader - Rising edge enabled 39"] pub type REN39_R = crate::BitReader; #[doc = "Field `REN39` writer - Rising edge enabled 39"] -pub type REN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN40` reader - Rising edge enabled 40"] pub type REN40_R = crate::BitReader; #[doc = "Field `REN40` writer - Rising edge enabled 40"] -pub type REN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN41` reader - Rising edge enabled 41"] pub type REN41_R = crate::BitReader; #[doc = "Field `REN41` writer - Rising edge enabled 41"] -pub type REN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN42` reader - Rising edge enabled 42"] pub type REN42_R = crate::BitReader; #[doc = "Field `REN42` writer - Rising edge enabled 42"] -pub type REN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN43` reader - Rising edge enabled 43"] pub type REN43_R = crate::BitReader; #[doc = "Field `REN43` writer - Rising edge enabled 43"] -pub type REN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN44` reader - Rising edge enabled 44"] pub type REN44_R = crate::BitReader; #[doc = "Field `REN44` writer - Rising edge enabled 44"] -pub type REN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN45` reader - Rising edge enabled 45"] pub type REN45_R = crate::BitReader; #[doc = "Field `REN45` writer - Rising edge enabled 45"] -pub type REN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN46` reader - Rising edge enabled 46"] pub type REN46_R = crate::BitReader; #[doc = "Field `REN46` writer - Rising edge enabled 46"] -pub type REN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN47` reader - Rising edge enabled 47"] pub type REN47_R = crate::BitReader; #[doc = "Field `REN47` writer - Rising edge enabled 47"] -pub type REN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN48` reader - Rising edge enabled 48"] pub type REN48_R = crate::BitReader; #[doc = "Field `REN48` writer - Rising edge enabled 48"] -pub type REN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN49` reader - Rising edge enabled 49"] pub type REN49_R = crate::BitReader; #[doc = "Field `REN49` writer - Rising edge enabled 49"] -pub type REN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN50` reader - Rising edge enabled 50"] pub type REN50_R = crate::BitReader; #[doc = "Field `REN50` writer - Rising edge enabled 50"] -pub type REN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN51` reader - Rising edge enabled 51"] pub type REN51_R = crate::BitReader; #[doc = "Field `REN51` writer - Rising edge enabled 51"] -pub type REN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN52` reader - Rising edge enabled 52"] pub type REN52_R = crate::BitReader; #[doc = "Field `REN52` writer - Rising edge enabled 52"] -pub type REN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN53` reader - Rising edge enabled 53"] pub type REN53_R = crate::BitReader; #[doc = "Field `REN53` writer - Rising edge enabled 53"] -pub type REN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN53_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN54` reader - Rising edge enabled 54"] pub type REN54_R = crate::BitReader; #[doc = "Field `REN54` writer - Rising edge enabled 54"] -pub type REN54_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN54_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN55` reader - Rising edge enabled 55"] pub type REN55_R = crate::BitReader; #[doc = "Field `REN55` writer - Rising edge enabled 55"] -pub type REN55_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN55_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN56` reader - Rising edge enabled 56"] pub type REN56_R = crate::BitReader; #[doc = "Field `REN56` writer - Rising edge enabled 56"] -pub type REN56_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN56_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN57` reader - Rising edge enabled 57"] pub type REN57_R = crate::BitReader; #[doc = "Field `REN57` writer - Rising edge enabled 57"] -pub type REN57_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN57_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge enabled 32"] #[inline(always)] @@ -272,165 +272,165 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Rising edge enabled 32"] #[inline(always)] #[must_use] - pub fn ren32(&mut self) -> REN32_W { - REN32_W::new(self) + pub fn ren32(&mut self) -> REN32_W { + REN32_W::new(self, 0) } #[doc = "Bit 1 - Rising edge enabled 33"] #[inline(always)] #[must_use] - pub fn ren33(&mut self) -> REN33_W { - REN33_W::new(self) + pub fn ren33(&mut self) -> REN33_W { + REN33_W::new(self, 1) } #[doc = "Bit 2 - Rising edge enabled 34"] #[inline(always)] #[must_use] - pub fn ren34(&mut self) -> REN34_W { - REN34_W::new(self) + pub fn ren34(&mut self) -> REN34_W { + REN34_W::new(self, 2) } #[doc = "Bit 3 - Rising edge enabled 35"] #[inline(always)] #[must_use] - pub fn ren35(&mut self) -> REN35_W { - REN35_W::new(self) + pub fn ren35(&mut self) -> REN35_W { + REN35_W::new(self, 3) } #[doc = "Bit 4 - Rising edge enabled 36"] #[inline(always)] #[must_use] - pub fn ren36(&mut self) -> REN36_W { - REN36_W::new(self) + pub fn ren36(&mut self) -> REN36_W { + REN36_W::new(self, 4) } #[doc = "Bit 5 - Rising edge enabled 37"] #[inline(always)] #[must_use] - pub fn ren37(&mut self) -> REN37_W { - REN37_W::new(self) + pub fn ren37(&mut self) -> REN37_W { + REN37_W::new(self, 5) } #[doc = "Bit 6 - Rising edge enabled 38"] #[inline(always)] #[must_use] - pub fn ren38(&mut self) -> REN38_W { - REN38_W::new(self) + pub fn ren38(&mut self) -> REN38_W { + REN38_W::new(self, 6) } #[doc = "Bit 7 - Rising edge enabled 39"] #[inline(always)] #[must_use] - pub fn ren39(&mut self) -> REN39_W { - REN39_W::new(self) + pub fn ren39(&mut self) -> REN39_W { + REN39_W::new(self, 7) } #[doc = "Bit 8 - Rising edge enabled 40"] #[inline(always)] #[must_use] - pub fn ren40(&mut self) -> REN40_W { - REN40_W::new(self) + pub fn ren40(&mut self) -> REN40_W { + REN40_W::new(self, 8) } #[doc = "Bit 9 - Rising edge enabled 41"] #[inline(always)] #[must_use] - pub fn ren41(&mut self) -> REN41_W { - REN41_W::new(self) + pub fn ren41(&mut self) -> REN41_W { + REN41_W::new(self, 9) } #[doc = "Bit 10 - Rising edge enabled 42"] #[inline(always)] #[must_use] - pub fn ren42(&mut self) -> REN42_W { - REN42_W::new(self) + pub fn ren42(&mut self) -> REN42_W { + REN42_W::new(self, 10) } #[doc = "Bit 11 - Rising edge enabled 43"] #[inline(always)] #[must_use] - pub fn ren43(&mut self) -> REN43_W { - REN43_W::new(self) + pub fn ren43(&mut self) -> REN43_W { + REN43_W::new(self, 11) } #[doc = "Bit 12 - Rising edge enabled 44"] #[inline(always)] #[must_use] - pub fn ren44(&mut self) -> REN44_W { - REN44_W::new(self) + pub fn ren44(&mut self) -> REN44_W { + REN44_W::new(self, 12) } #[doc = "Bit 13 - Rising edge enabled 45"] #[inline(always)] #[must_use] - pub fn ren45(&mut self) -> REN45_W { - REN45_W::new(self) + pub fn ren45(&mut self) -> REN45_W { + REN45_W::new(self, 13) } #[doc = "Bit 14 - Rising edge enabled 46"] #[inline(always)] #[must_use] - pub fn ren46(&mut self) -> REN46_W { - REN46_W::new(self) + pub fn ren46(&mut self) -> REN46_W { + REN46_W::new(self, 14) } #[doc = "Bit 15 - Rising edge enabled 47"] #[inline(always)] #[must_use] - pub fn ren47(&mut self) -> REN47_W { - REN47_W::new(self) + pub fn ren47(&mut self) -> REN47_W { + REN47_W::new(self, 15) } #[doc = "Bit 16 - Rising edge enabled 48"] #[inline(always)] #[must_use] - pub fn ren48(&mut self) -> REN48_W { - REN48_W::new(self) + pub fn ren48(&mut self) -> REN48_W { + REN48_W::new(self, 16) } #[doc = "Bit 17 - Rising edge enabled 49"] #[inline(always)] #[must_use] - pub fn ren49(&mut self) -> REN49_W { - REN49_W::new(self) + pub fn ren49(&mut self) -> REN49_W { + REN49_W::new(self, 17) } #[doc = "Bit 18 - Rising edge enabled 50"] #[inline(always)] #[must_use] - pub fn ren50(&mut self) -> REN50_W { - REN50_W::new(self) + pub fn ren50(&mut self) -> REN50_W { + REN50_W::new(self, 18) } #[doc = "Bit 19 - Rising edge enabled 51"] #[inline(always)] #[must_use] - pub fn ren51(&mut self) -> REN51_W { - REN51_W::new(self) + pub fn ren51(&mut self) -> REN51_W { + REN51_W::new(self, 19) } #[doc = "Bit 20 - Rising edge enabled 52"] #[inline(always)] #[must_use] - pub fn ren52(&mut self) -> REN52_W { - REN52_W::new(self) + pub fn ren52(&mut self) -> REN52_W { + REN52_W::new(self, 20) } #[doc = "Bit 21 - Rising edge enabled 53"] #[inline(always)] #[must_use] - pub fn ren53(&mut self) -> REN53_W { - REN53_W::new(self) + pub fn ren53(&mut self) -> REN53_W { + REN53_W::new(self, 21) } #[doc = "Bit 22 - Rising edge enabled 54"] #[inline(always)] #[must_use] - pub fn ren54(&mut self) -> REN54_W { - REN54_W::new(self) + pub fn ren54(&mut self) -> REN54_W { + REN54_W::new(self, 22) } #[doc = "Bit 23 - Rising edge enabled 55"] #[inline(always)] #[must_use] - pub fn ren55(&mut self) -> REN55_W { - REN55_W::new(self) + pub fn ren55(&mut self) -> REN55_W { + REN55_W::new(self, 23) } #[doc = "Bit 24 - Rising edge enabled 56"] #[inline(always)] #[must_use] - pub fn ren56(&mut self) -> REN56_W { - REN56_W::new(self) + pub fn ren56(&mut self) -> REN56_W { + REN56_W::new(self, 24) } #[doc = "Bit 25 - Rising edge enabled 57"] #[inline(always)] #[must_use] - pub fn ren57(&mut self) -> REN57_W { - REN57_W::new(self) + pub fn ren57(&mut self) -> REN57_W { + REN57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpset0.rs b/crates/bcm2711-lpa/src/gpio/gpset0.rs index 513781b..66cbab6 100644 --- a/crates/bcm2711-lpa/src/gpio/gpset0.rs +++ b/crates/bcm2711-lpa/src/gpio/gpset0.rs @@ -1,69 +1,69 @@ #[doc = "Register `GPSET0` writer"] pub type W = crate::W; #[doc = "Field `SET0` writer - Set 0"] -pub type SET0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET1` writer - Set 1"] -pub type SET1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET2` writer - Set 2"] -pub type SET2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET3` writer - Set 3"] -pub type SET3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET4` writer - Set 4"] -pub type SET4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET5` writer - Set 5"] -pub type SET5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET6` writer - Set 6"] -pub type SET6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET7` writer - Set 7"] -pub type SET7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET8` writer - Set 8"] -pub type SET8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET9` writer - Set 9"] -pub type SET9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET10` writer - Set 10"] -pub type SET10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET11` writer - Set 11"] -pub type SET11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET12` writer - Set 12"] -pub type SET12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET13` writer - Set 13"] -pub type SET13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET14` writer - Set 14"] -pub type SET14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET15` writer - Set 15"] -pub type SET15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET16` writer - Set 16"] -pub type SET16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET17` writer - Set 17"] -pub type SET17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET18` writer - Set 18"] -pub type SET18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET19` writer - Set 19"] -pub type SET19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET20` writer - Set 20"] -pub type SET20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET21` writer - Set 21"] -pub type SET21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET22` writer - Set 22"] -pub type SET22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET23` writer - Set 23"] -pub type SET23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET24` writer - Set 24"] -pub type SET24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET25` writer - Set 25"] -pub type SET25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET26` writer - Set 26"] -pub type SET26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET27` writer - Set 27"] -pub type SET27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET28` writer - Set 28"] -pub type SET28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET29` writer - Set 29"] -pub type SET29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET30` writer - Set 30"] -pub type SET30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET31` writer - Set 31"] -pub type SET31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -73,194 +73,194 @@ impl W { #[doc = "Bit 0 - Set 0"] #[inline(always)] #[must_use] - pub fn set0(&mut self) -> SET0_W { - SET0_W::new(self) + pub fn set0(&mut self) -> SET0_W { + SET0_W::new(self, 0) } #[doc = "Bit 1 - Set 1"] #[inline(always)] #[must_use] - pub fn set1(&mut self) -> SET1_W { - SET1_W::new(self) + pub fn set1(&mut self) -> SET1_W { + SET1_W::new(self, 1) } #[doc = "Bit 2 - Set 2"] #[inline(always)] #[must_use] - pub fn set2(&mut self) -> SET2_W { - SET2_W::new(self) + pub fn set2(&mut self) -> SET2_W { + SET2_W::new(self, 2) } #[doc = "Bit 3 - Set 3"] #[inline(always)] #[must_use] - pub fn set3(&mut self) -> SET3_W { - SET3_W::new(self) + pub fn set3(&mut self) -> SET3_W { + SET3_W::new(self, 3) } #[doc = "Bit 4 - Set 4"] #[inline(always)] #[must_use] - pub fn set4(&mut self) -> SET4_W { - SET4_W::new(self) + pub fn set4(&mut self) -> SET4_W { + SET4_W::new(self, 4) } #[doc = "Bit 5 - Set 5"] #[inline(always)] #[must_use] - pub fn set5(&mut self) -> SET5_W { - SET5_W::new(self) + pub fn set5(&mut self) -> SET5_W { + SET5_W::new(self, 5) } #[doc = "Bit 6 - Set 6"] #[inline(always)] #[must_use] - pub fn set6(&mut self) -> SET6_W { - SET6_W::new(self) + pub fn set6(&mut self) -> SET6_W { + SET6_W::new(self, 6) } #[doc = "Bit 7 - Set 7"] #[inline(always)] #[must_use] - pub fn set7(&mut self) -> SET7_W { - SET7_W::new(self) + pub fn set7(&mut self) -> SET7_W { + SET7_W::new(self, 7) } #[doc = "Bit 8 - Set 8"] #[inline(always)] #[must_use] - pub fn set8(&mut self) -> SET8_W { - SET8_W::new(self) + pub fn set8(&mut self) -> SET8_W { + SET8_W::new(self, 8) } #[doc = "Bit 9 - Set 9"] #[inline(always)] #[must_use] - pub fn set9(&mut self) -> SET9_W { - SET9_W::new(self) + pub fn set9(&mut self) -> SET9_W { + SET9_W::new(self, 9) } #[doc = "Bit 10 - Set 10"] #[inline(always)] #[must_use] - pub fn set10(&mut self) -> SET10_W { - SET10_W::new(self) + pub fn set10(&mut self) -> SET10_W { + SET10_W::new(self, 10) } #[doc = "Bit 11 - Set 11"] #[inline(always)] #[must_use] - pub fn set11(&mut self) -> SET11_W { - SET11_W::new(self) + pub fn set11(&mut self) -> SET11_W { + SET11_W::new(self, 11) } #[doc = "Bit 12 - Set 12"] #[inline(always)] #[must_use] - pub fn set12(&mut self) -> SET12_W { - SET12_W::new(self) + pub fn set12(&mut self) -> SET12_W { + SET12_W::new(self, 12) } #[doc = "Bit 13 - Set 13"] #[inline(always)] #[must_use] - pub fn set13(&mut self) -> SET13_W { - SET13_W::new(self) + pub fn set13(&mut self) -> SET13_W { + SET13_W::new(self, 13) } #[doc = "Bit 14 - Set 14"] #[inline(always)] #[must_use] - pub fn set14(&mut self) -> SET14_W { - SET14_W::new(self) + pub fn set14(&mut self) -> SET14_W { + SET14_W::new(self, 14) } #[doc = "Bit 15 - Set 15"] #[inline(always)] #[must_use] - pub fn set15(&mut self) -> SET15_W { - SET15_W::new(self) + pub fn set15(&mut self) -> SET15_W { + SET15_W::new(self, 15) } #[doc = "Bit 16 - Set 16"] #[inline(always)] #[must_use] - pub fn set16(&mut self) -> SET16_W { - SET16_W::new(self) + pub fn set16(&mut self) -> SET16_W { + SET16_W::new(self, 16) } #[doc = "Bit 17 - Set 17"] #[inline(always)] #[must_use] - pub fn set17(&mut self) -> SET17_W { - SET17_W::new(self) + pub fn set17(&mut self) -> SET17_W { + SET17_W::new(self, 17) } #[doc = "Bit 18 - Set 18"] #[inline(always)] #[must_use] - pub fn set18(&mut self) -> SET18_W { - SET18_W::new(self) + pub fn set18(&mut self) -> SET18_W { + SET18_W::new(self, 18) } #[doc = "Bit 19 - Set 19"] #[inline(always)] #[must_use] - pub fn set19(&mut self) -> SET19_W { - SET19_W::new(self) + pub fn set19(&mut self) -> SET19_W { + SET19_W::new(self, 19) } #[doc = "Bit 20 - Set 20"] #[inline(always)] #[must_use] - pub fn set20(&mut self) -> SET20_W { - SET20_W::new(self) + pub fn set20(&mut self) -> SET20_W { + SET20_W::new(self, 20) } #[doc = "Bit 21 - Set 21"] #[inline(always)] #[must_use] - pub fn set21(&mut self) -> SET21_W { - SET21_W::new(self) + pub fn set21(&mut self) -> SET21_W { + SET21_W::new(self, 21) } #[doc = "Bit 22 - Set 22"] #[inline(always)] #[must_use] - pub fn set22(&mut self) -> SET22_W { - SET22_W::new(self) + pub fn set22(&mut self) -> SET22_W { + SET22_W::new(self, 22) } #[doc = "Bit 23 - Set 23"] #[inline(always)] #[must_use] - pub fn set23(&mut self) -> SET23_W { - SET23_W::new(self) + pub fn set23(&mut self) -> SET23_W { + SET23_W::new(self, 23) } #[doc = "Bit 24 - Set 24"] #[inline(always)] #[must_use] - pub fn set24(&mut self) -> SET24_W { - SET24_W::new(self) + pub fn set24(&mut self) -> SET24_W { + SET24_W::new(self, 24) } #[doc = "Bit 25 - Set 25"] #[inline(always)] #[must_use] - pub fn set25(&mut self) -> SET25_W { - SET25_W::new(self) + pub fn set25(&mut self) -> SET25_W { + SET25_W::new(self, 25) } #[doc = "Bit 26 - Set 26"] #[inline(always)] #[must_use] - pub fn set26(&mut self) -> SET26_W { - SET26_W::new(self) + pub fn set26(&mut self) -> SET26_W { + SET26_W::new(self, 26) } #[doc = "Bit 27 - Set 27"] #[inline(always)] #[must_use] - pub fn set27(&mut self) -> SET27_W { - SET27_W::new(self) + pub fn set27(&mut self) -> SET27_W { + SET27_W::new(self, 27) } #[doc = "Bit 28 - Set 28"] #[inline(always)] #[must_use] - pub fn set28(&mut self) -> SET28_W { - SET28_W::new(self) + pub fn set28(&mut self) -> SET28_W { + SET28_W::new(self, 28) } #[doc = "Bit 29 - Set 29"] #[inline(always)] #[must_use] - pub fn set29(&mut self) -> SET29_W { - SET29_W::new(self) + pub fn set29(&mut self) -> SET29_W { + SET29_W::new(self, 29) } #[doc = "Bit 30 - Set 30"] #[inline(always)] #[must_use] - pub fn set30(&mut self) -> SET30_W { - SET30_W::new(self) + pub fn set30(&mut self) -> SET30_W { + SET30_W::new(self, 30) } #[doc = "Bit 31 - Set 31"] #[inline(always)] #[must_use] - pub fn set31(&mut self) -> SET31_W { - SET31_W::new(self) + pub fn set31(&mut self) -> SET31_W { + SET31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/gpio/gpset1.rs b/crates/bcm2711-lpa/src/gpio/gpset1.rs index 74ceb5b..aa5f497 100644 --- a/crates/bcm2711-lpa/src/gpio/gpset1.rs +++ b/crates/bcm2711-lpa/src/gpio/gpset1.rs @@ -1,57 +1,57 @@ #[doc = "Register `GPSET1` writer"] pub type W = crate::W; #[doc = "Field `SET32` writer - Set 32"] -pub type SET32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET33` writer - Set 33"] -pub type SET33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET34` writer - Set 34"] -pub type SET34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET35` writer - Set 35"] -pub type SET35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET36` writer - Set 36"] -pub type SET36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET37` writer - Set 37"] -pub type SET37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET38` writer - Set 38"] -pub type SET38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET39` writer - Set 39"] -pub type SET39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET40` writer - Set 40"] -pub type SET40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET41` writer - Set 41"] -pub type SET41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET42` writer - Set 42"] -pub type SET42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET43` writer - Set 43"] -pub type SET43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET44` writer - Set 44"] -pub type SET44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET45` writer - Set 45"] -pub type SET45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET46` writer - Set 46"] -pub type SET46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET47` writer - Set 47"] -pub type SET47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET48` writer - Set 48"] -pub type SET48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET49` writer - Set 49"] -pub type SET49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET50` writer - Set 50"] -pub type SET50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET51` writer - Set 51"] -pub type SET51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET52` writer - Set 52"] -pub type SET52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET53` writer - Set 53"] -pub type SET53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET53_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET54` writer - Set 54"] -pub type SET54_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET54_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET55` writer - Set 55"] -pub type SET55_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET55_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET56` writer - Set 56"] -pub type SET56_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET56_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET57` writer - Set 57"] -pub type SET57_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET57_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -61,158 +61,158 @@ impl W { #[doc = "Bit 0 - Set 32"] #[inline(always)] #[must_use] - pub fn set32(&mut self) -> SET32_W { - SET32_W::new(self) + pub fn set32(&mut self) -> SET32_W { + SET32_W::new(self, 0) } #[doc = "Bit 1 - Set 33"] #[inline(always)] #[must_use] - pub fn set33(&mut self) -> SET33_W { - SET33_W::new(self) + pub fn set33(&mut self) -> SET33_W { + SET33_W::new(self, 1) } #[doc = "Bit 2 - Set 34"] #[inline(always)] #[must_use] - pub fn set34(&mut self) -> SET34_W { - SET34_W::new(self) + pub fn set34(&mut self) -> SET34_W { + SET34_W::new(self, 2) } #[doc = "Bit 3 - Set 35"] #[inline(always)] #[must_use] - pub fn set35(&mut self) -> SET35_W { - SET35_W::new(self) + pub fn set35(&mut self) -> SET35_W { + SET35_W::new(self, 3) } #[doc = "Bit 4 - Set 36"] #[inline(always)] #[must_use] - pub fn set36(&mut self) -> SET36_W { - SET36_W::new(self) + pub fn set36(&mut self) -> SET36_W { + SET36_W::new(self, 4) } #[doc = "Bit 5 - Set 37"] #[inline(always)] #[must_use] - pub fn set37(&mut self) -> SET37_W { - SET37_W::new(self) + pub fn set37(&mut self) -> SET37_W { + SET37_W::new(self, 5) } #[doc = "Bit 6 - Set 38"] #[inline(always)] #[must_use] - pub fn set38(&mut self) -> SET38_W { - SET38_W::new(self) + pub fn set38(&mut self) -> SET38_W { + SET38_W::new(self, 6) } #[doc = "Bit 7 - Set 39"] #[inline(always)] #[must_use] - pub fn set39(&mut self) -> SET39_W { - SET39_W::new(self) + pub fn set39(&mut self) -> SET39_W { + SET39_W::new(self, 7) } #[doc = "Bit 8 - Set 40"] #[inline(always)] #[must_use] - pub fn set40(&mut self) -> SET40_W { - SET40_W::new(self) + pub fn set40(&mut self) -> SET40_W { + SET40_W::new(self, 8) } #[doc = "Bit 9 - Set 41"] #[inline(always)] #[must_use] - pub fn set41(&mut self) -> SET41_W { - SET41_W::new(self) + pub fn set41(&mut self) -> SET41_W { + SET41_W::new(self, 9) } #[doc = "Bit 10 - Set 42"] #[inline(always)] #[must_use] - pub fn set42(&mut self) -> SET42_W { - SET42_W::new(self) + pub fn set42(&mut self) -> SET42_W { + SET42_W::new(self, 10) } #[doc = "Bit 11 - Set 43"] #[inline(always)] #[must_use] - pub fn set43(&mut self) -> SET43_W { - SET43_W::new(self) + pub fn set43(&mut self) -> SET43_W { + SET43_W::new(self, 11) } #[doc = "Bit 12 - Set 44"] #[inline(always)] #[must_use] - pub fn set44(&mut self) -> SET44_W { - SET44_W::new(self) + pub fn set44(&mut self) -> SET44_W { + SET44_W::new(self, 12) } #[doc = "Bit 13 - Set 45"] #[inline(always)] #[must_use] - pub fn set45(&mut self) -> SET45_W { - SET45_W::new(self) + pub fn set45(&mut self) -> SET45_W { + SET45_W::new(self, 13) } #[doc = "Bit 14 - Set 46"] #[inline(always)] #[must_use] - pub fn set46(&mut self) -> SET46_W { - SET46_W::new(self) + pub fn set46(&mut self) -> SET46_W { + SET46_W::new(self, 14) } #[doc = "Bit 15 - Set 47"] #[inline(always)] #[must_use] - pub fn set47(&mut self) -> SET47_W { - SET47_W::new(self) + pub fn set47(&mut self) -> SET47_W { + SET47_W::new(self, 15) } #[doc = "Bit 16 - Set 48"] #[inline(always)] #[must_use] - pub fn set48(&mut self) -> SET48_W { - SET48_W::new(self) + pub fn set48(&mut self) -> SET48_W { + SET48_W::new(self, 16) } #[doc = "Bit 17 - Set 49"] #[inline(always)] #[must_use] - pub fn set49(&mut self) -> SET49_W { - SET49_W::new(self) + pub fn set49(&mut self) -> SET49_W { + SET49_W::new(self, 17) } #[doc = "Bit 18 - Set 50"] #[inline(always)] #[must_use] - pub fn set50(&mut self) -> SET50_W { - SET50_W::new(self) + pub fn set50(&mut self) -> SET50_W { + SET50_W::new(self, 18) } #[doc = "Bit 19 - Set 51"] #[inline(always)] #[must_use] - pub fn set51(&mut self) -> SET51_W { - SET51_W::new(self) + pub fn set51(&mut self) -> SET51_W { + SET51_W::new(self, 19) } #[doc = "Bit 20 - Set 52"] #[inline(always)] #[must_use] - pub fn set52(&mut self) -> SET52_W { - SET52_W::new(self) + pub fn set52(&mut self) -> SET52_W { + SET52_W::new(self, 20) } #[doc = "Bit 21 - Set 53"] #[inline(always)] #[must_use] - pub fn set53(&mut self) -> SET53_W { - SET53_W::new(self) + pub fn set53(&mut self) -> SET53_W { + SET53_W::new(self, 21) } #[doc = "Bit 22 - Set 54"] #[inline(always)] #[must_use] - pub fn set54(&mut self) -> SET54_W { - SET54_W::new(self) + pub fn set54(&mut self) -> SET54_W { + SET54_W::new(self, 22) } #[doc = "Bit 23 - Set 55"] #[inline(always)] #[must_use] - pub fn set55(&mut self) -> SET55_W { - SET55_W::new(self) + pub fn set55(&mut self) -> SET55_W { + SET55_W::new(self, 23) } #[doc = "Bit 24 - Set 56"] #[inline(always)] #[must_use] - pub fn set56(&mut self) -> SET56_W { - SET56_W::new(self) + pub fn set56(&mut self) -> SET56_W { + SET56_W::new(self, 24) } #[doc = "Bit 25 - Set 57"] #[inline(always)] #[must_use] - pub fn set57(&mut self) -> SET57_W { - SET57_W::new(self) + pub fn set57(&mut self) -> SET57_W { + SET57_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lib.rs b/crates/bcm2711-lpa/src/lib.rs index 003c7e0..d08e324 100644 --- a/crates/bcm2711-lpa/src/lib.rs +++ b/crates/bcm2711-lpa/src/lib.rs @@ -1,18 +1,5 @@ -#![doc = "Peripheral access API for BCM2711_LPA microcontrollers (generated using svd2rust v0.30.3 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.30.3/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] -#![deny(dead_code)] -#![deny(improper_ctypes)] -#![deny(missing_docs)] -#![deny(no_mangle_generic_items)] -#![deny(non_shorthand_field_patterns)] -#![deny(overflowing_literals)] -#![deny(path_statements)] -#![deny(patterns_in_fns_without_body)] -#![deny(unconditional_recursion)] -#![deny(unused_allocation)] -#![deny(unused_comparisons)] -#![deny(unused_parens)] -#![deny(while_true)] +#![doc = "Peripheral access API for BCM2711_LPA microcontrollers (generated using svd2rust v0.31.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.31.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] diff --git a/crates/bcm2711-lpa/src/lic.rs b/crates/bcm2711-lpa/src/lic.rs index 36d6423..bbb8a85 100644 --- a/crates/bcm2711-lpa/src/lic.rs +++ b/crates/bcm2711-lpa/src/lic.rs @@ -3,26 +3,68 @@ #[derive(Debug)] pub struct RegisterBlock { _reserved0: [u8; 0x0200], + basic_pending: BASIC_PENDING, + pending_1: PENDING_1, + pending_2: PENDING_2, + fiq_control: FIQ_CONTROL, + enable_1: ENABLE_1, + enable_2: ENABLE_2, + enable_basic: ENABLE_BASIC, + disable_1: DISABLE_1, + disable_2: DISABLE_2, + disable_basic: DISABLE_BASIC, +} +impl RegisterBlock { #[doc = "0x200 - Basic pending info"] - pub basic_pending: BASIC_PENDING, + #[inline(always)] + pub const fn basic_pending(&self) -> &BASIC_PENDING { + &self.basic_pending + } #[doc = "0x204 - Pending state for interrupts 1 - 31"] - pub pending_1: PENDING_1, + #[inline(always)] + pub const fn pending_1(&self) -> &PENDING_1 { + &self.pending_1 + } #[doc = "0x208 - Pending state for interrupts 32 - 63"] - pub pending_2: PENDING_2, + #[inline(always)] + pub const fn pending_2(&self) -> &PENDING_2 { + &self.pending_2 + } #[doc = "0x20c - FIQ control"] - pub fiq_control: FIQ_CONTROL, + #[inline(always)] + pub const fn fiq_control(&self) -> &FIQ_CONTROL { + &self.fiq_control + } #[doc = "0x210 - Enable interrupts 1 - 31"] - pub enable_1: ENABLE_1, + #[inline(always)] + pub const fn enable_1(&self) -> &ENABLE_1 { + &self.enable_1 + } #[doc = "0x214 - Enable interrupts 32 - 63"] - pub enable_2: ENABLE_2, + #[inline(always)] + pub const fn enable_2(&self) -> &ENABLE_2 { + &self.enable_2 + } #[doc = "0x218 - Enable basic interrupts"] - pub enable_basic: ENABLE_BASIC, + #[inline(always)] + pub const fn enable_basic(&self) -> &ENABLE_BASIC { + &self.enable_basic + } #[doc = "0x21c - Disable interrupts 1 - 31"] - pub disable_1: DISABLE_1, + #[inline(always)] + pub const fn disable_1(&self) -> &DISABLE_1 { + &self.disable_1 + } #[doc = "0x220 - Disable interrupts 32 - 63"] - pub disable_2: DISABLE_2, + #[inline(always)] + pub const fn disable_2(&self) -> &DISABLE_2 { + &self.disable_2 + } #[doc = "0x224 - Disable basic interrupts"] - pub disable_basic: DISABLE_BASIC, + #[inline(always)] + pub const fn disable_basic(&self) -> &DISABLE_BASIC { + &self.disable_basic + } } #[doc = "BASIC_PENDING (r) register accessor: Basic pending info\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`basic_pending::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@basic_pending`] module"] diff --git a/crates/bcm2711-lpa/src/lic/basic_pending.rs b/crates/bcm2711-lpa/src/lic/basic_pending.rs index 52b9471..1573d4c 100644 --- a/crates/bcm2711-lpa/src/lic/basic_pending.rs +++ b/crates/bcm2711-lpa/src/lic/basic_pending.rs @@ -184,7 +184,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Basic pending info\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`basic_pending::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/lic/disable_1.rs b/crates/bcm2711-lpa/src/lic/disable_1.rs index 65d348a..10dc3b2 100644 --- a/crates/bcm2711-lpa/src/lic/disable_1.rs +++ b/crates/bcm2711-lpa/src/lic/disable_1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/disable_2.rs b/crates/bcm2711-lpa/src/lic/disable_2.rs index a60ad36..c47ef36 100644 --- a/crates/bcm2711-lpa/src/lic/disable_2.rs +++ b/crates/bcm2711-lpa/src/lic/disable_2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/disable_basic.rs b/crates/bcm2711-lpa/src/lic/disable_basic.rs index da28ed6..dfa6828 100644 --- a/crates/bcm2711-lpa/src/lic/disable_basic.rs +++ b/crates/bcm2711-lpa/src/lic/disable_basic.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -98,57 +98,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/enable_1.rs b/crates/bcm2711-lpa/src/lic/enable_1.rs index 061118e..8902815 100644 --- a/crates/bcm2711-lpa/src/lic/enable_1.rs +++ b/crates/bcm2711-lpa/src/lic/enable_1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT0` reader - Interrupt 0"] pub type INT0_R = crate::BitReader; #[doc = "Field `INT0` writer - Interrupt 0"] -pub type INT0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT1` reader - Interrupt 1"] pub type INT1_R = crate::BitReader; #[doc = "Field `INT1` writer - Interrupt 1"] -pub type INT1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT2` reader - Interrupt 2"] pub type INT2_R = crate::BitReader; #[doc = "Field `INT2` writer - Interrupt 2"] -pub type INT2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT3` reader - Interrupt 3"] pub type INT3_R = crate::BitReader; #[doc = "Field `INT3` writer - Interrupt 3"] -pub type INT3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT4` reader - Interrupt 4"] pub type INT4_R = crate::BitReader; #[doc = "Field `INT4` writer - Interrupt 4"] -pub type INT4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT5` reader - Interrupt 5"] pub type INT5_R = crate::BitReader; #[doc = "Field `INT5` writer - Interrupt 5"] -pub type INT5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT6` reader - Interrupt 6"] pub type INT6_R = crate::BitReader; #[doc = "Field `INT6` writer - Interrupt 6"] -pub type INT6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT7` reader - Interrupt 7"] pub type INT7_R = crate::BitReader; #[doc = "Field `INT7` writer - Interrupt 7"] -pub type INT7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT8` reader - Interrupt 8"] pub type INT8_R = crate::BitReader; #[doc = "Field `INT8` writer - Interrupt 8"] -pub type INT8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT9` reader - Interrupt 9"] pub type INT9_R = crate::BitReader; #[doc = "Field `INT9` writer - Interrupt 9"] -pub type INT9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT10` reader - Interrupt 10"] pub type INT10_R = crate::BitReader; #[doc = "Field `INT10` writer - Interrupt 10"] -pub type INT10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT11` reader - Interrupt 11"] pub type INT11_R = crate::BitReader; #[doc = "Field `INT11` writer - Interrupt 11"] -pub type INT11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT12` reader - Interrupt 12"] pub type INT12_R = crate::BitReader; #[doc = "Field `INT12` writer - Interrupt 12"] -pub type INT12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT13` reader - Interrupt 13"] pub type INT13_R = crate::BitReader; #[doc = "Field `INT13` writer - Interrupt 13"] -pub type INT13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT14` reader - Interrupt 14"] pub type INT14_R = crate::BitReader; #[doc = "Field `INT14` writer - Interrupt 14"] -pub type INT14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT15` reader - Interrupt 15"] pub type INT15_R = crate::BitReader; #[doc = "Field `INT15` writer - Interrupt 15"] -pub type INT15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT16` reader - Interrupt 16"] pub type INT16_R = crate::BitReader; #[doc = "Field `INT16` writer - Interrupt 16"] -pub type INT16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT17` reader - Interrupt 17"] pub type INT17_R = crate::BitReader; #[doc = "Field `INT17` writer - Interrupt 17"] -pub type INT17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT18` reader - Interrupt 18"] pub type INT18_R = crate::BitReader; #[doc = "Field `INT18` writer - Interrupt 18"] -pub type INT18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT19` reader - Interrupt 19"] pub type INT19_R = crate::BitReader; #[doc = "Field `INT19` writer - Interrupt 19"] -pub type INT19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT20` reader - Interrupt 20"] pub type INT20_R = crate::BitReader; #[doc = "Field `INT20` writer - Interrupt 20"] -pub type INT20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT21` reader - Interrupt 21"] pub type INT21_R = crate::BitReader; #[doc = "Field `INT21` writer - Interrupt 21"] -pub type INT21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT22` reader - Interrupt 22"] pub type INT22_R = crate::BitReader; #[doc = "Field `INT22` writer - Interrupt 22"] -pub type INT22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT23` reader - Interrupt 23"] pub type INT23_R = crate::BitReader; #[doc = "Field `INT23` writer - Interrupt 23"] -pub type INT23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT24` reader - Interrupt 24"] pub type INT24_R = crate::BitReader; #[doc = "Field `INT24` writer - Interrupt 24"] -pub type INT24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT25` reader - Interrupt 25"] pub type INT25_R = crate::BitReader; #[doc = "Field `INT25` writer - Interrupt 25"] -pub type INT25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT26` reader - Interrupt 26"] pub type INT26_R = crate::BitReader; #[doc = "Field `INT26` writer - Interrupt 26"] -pub type INT26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT27` reader - Interrupt 27"] pub type INT27_R = crate::BitReader; #[doc = "Field `INT27` writer - Interrupt 27"] -pub type INT27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT28` reader - Interrupt 28"] pub type INT28_R = crate::BitReader; #[doc = "Field `INT28` writer - Interrupt 28"] -pub type INT28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT29` reader - Interrupt 29"] pub type INT29_R = crate::BitReader; #[doc = "Field `INT29` writer - Interrupt 29"] -pub type INT29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT30` reader - Interrupt 30"] pub type INT30_R = crate::BitReader; #[doc = "Field `INT30` writer - Interrupt 30"] -pub type INT30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT31` reader - Interrupt 31"] pub type INT31_R = crate::BitReader; #[doc = "Field `INT31` writer - Interrupt 31"] -pub type INT31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 0"] #[inline(always)] #[must_use] - pub fn int0(&mut self) -> INT0_W { - INT0_W::new(self) + pub fn int0(&mut self) -> INT0_W { + INT0_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 1"] #[inline(always)] #[must_use] - pub fn int1(&mut self) -> INT1_W { - INT1_W::new(self) + pub fn int1(&mut self) -> INT1_W { + INT1_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 2"] #[inline(always)] #[must_use] - pub fn int2(&mut self) -> INT2_W { - INT2_W::new(self) + pub fn int2(&mut self) -> INT2_W { + INT2_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 3"] #[inline(always)] #[must_use] - pub fn int3(&mut self) -> INT3_W { - INT3_W::new(self) + pub fn int3(&mut self) -> INT3_W { + INT3_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 4"] #[inline(always)] #[must_use] - pub fn int4(&mut self) -> INT4_W { - INT4_W::new(self) + pub fn int4(&mut self) -> INT4_W { + INT4_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 5"] #[inline(always)] #[must_use] - pub fn int5(&mut self) -> INT5_W { - INT5_W::new(self) + pub fn int5(&mut self) -> INT5_W { + INT5_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 6"] #[inline(always)] #[must_use] - pub fn int6(&mut self) -> INT6_W { - INT6_W::new(self) + pub fn int6(&mut self) -> INT6_W { + INT6_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 7"] #[inline(always)] #[must_use] - pub fn int7(&mut self) -> INT7_W { - INT7_W::new(self) + pub fn int7(&mut self) -> INT7_W { + INT7_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 8"] #[inline(always)] #[must_use] - pub fn int8(&mut self) -> INT8_W { - INT8_W::new(self) + pub fn int8(&mut self) -> INT8_W { + INT8_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 9"] #[inline(always)] #[must_use] - pub fn int9(&mut self) -> INT9_W { - INT9_W::new(self) + pub fn int9(&mut self) -> INT9_W { + INT9_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 10"] #[inline(always)] #[must_use] - pub fn int10(&mut self) -> INT10_W { - INT10_W::new(self) + pub fn int10(&mut self) -> INT10_W { + INT10_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 11"] #[inline(always)] #[must_use] - pub fn int11(&mut self) -> INT11_W { - INT11_W::new(self) + pub fn int11(&mut self) -> INT11_W { + INT11_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 12"] #[inline(always)] #[must_use] - pub fn int12(&mut self) -> INT12_W { - INT12_W::new(self) + pub fn int12(&mut self) -> INT12_W { + INT12_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 13"] #[inline(always)] #[must_use] - pub fn int13(&mut self) -> INT13_W { - INT13_W::new(self) + pub fn int13(&mut self) -> INT13_W { + INT13_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 14"] #[inline(always)] #[must_use] - pub fn int14(&mut self) -> INT14_W { - INT14_W::new(self) + pub fn int14(&mut self) -> INT14_W { + INT14_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 15"] #[inline(always)] #[must_use] - pub fn int15(&mut self) -> INT15_W { - INT15_W::new(self) + pub fn int15(&mut self) -> INT15_W { + INT15_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 16"] #[inline(always)] #[must_use] - pub fn int16(&mut self) -> INT16_W { - INT16_W::new(self) + pub fn int16(&mut self) -> INT16_W { + INT16_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 17"] #[inline(always)] #[must_use] - pub fn int17(&mut self) -> INT17_W { - INT17_W::new(self) + pub fn int17(&mut self) -> INT17_W { + INT17_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 18"] #[inline(always)] #[must_use] - pub fn int18(&mut self) -> INT18_W { - INT18_W::new(self) + pub fn int18(&mut self) -> INT18_W { + INT18_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 19"] #[inline(always)] #[must_use] - pub fn int19(&mut self) -> INT19_W { - INT19_W::new(self) + pub fn int19(&mut self) -> INT19_W { + INT19_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 20"] #[inline(always)] #[must_use] - pub fn int20(&mut self) -> INT20_W { - INT20_W::new(self) + pub fn int20(&mut self) -> INT20_W { + INT20_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 21"] #[inline(always)] #[must_use] - pub fn int21(&mut self) -> INT21_W { - INT21_W::new(self) + pub fn int21(&mut self) -> INT21_W { + INT21_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 22"] #[inline(always)] #[must_use] - pub fn int22(&mut self) -> INT22_W { - INT22_W::new(self) + pub fn int22(&mut self) -> INT22_W { + INT22_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 23"] #[inline(always)] #[must_use] - pub fn int23(&mut self) -> INT23_W { - INT23_W::new(self) + pub fn int23(&mut self) -> INT23_W { + INT23_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 24"] #[inline(always)] #[must_use] - pub fn int24(&mut self) -> INT24_W { - INT24_W::new(self) + pub fn int24(&mut self) -> INT24_W { + INT24_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 25"] #[inline(always)] #[must_use] - pub fn int25(&mut self) -> INT25_W { - INT25_W::new(self) + pub fn int25(&mut self) -> INT25_W { + INT25_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 26"] #[inline(always)] #[must_use] - pub fn int26(&mut self) -> INT26_W { - INT26_W::new(self) + pub fn int26(&mut self) -> INT26_W { + INT26_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 27"] #[inline(always)] #[must_use] - pub fn int27(&mut self) -> INT27_W { - INT27_W::new(self) + pub fn int27(&mut self) -> INT27_W { + INT27_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 28"] #[inline(always)] #[must_use] - pub fn int28(&mut self) -> INT28_W { - INT28_W::new(self) + pub fn int28(&mut self) -> INT28_W { + INT28_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 29"] #[inline(always)] #[must_use] - pub fn int29(&mut self) -> INT29_W { - INT29_W::new(self) + pub fn int29(&mut self) -> INT29_W { + INT29_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 30"] #[inline(always)] #[must_use] - pub fn int30(&mut self) -> INT30_W { - INT30_W::new(self) + pub fn int30(&mut self) -> INT30_W { + INT30_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 31"] #[inline(always)] #[must_use] - pub fn int31(&mut self) -> INT31_W { - INT31_W::new(self) + pub fn int31(&mut self) -> INT31_W { + INT31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/enable_2.rs b/crates/bcm2711-lpa/src/lic/enable_2.rs index f3f9e50..b6af25c 100644 --- a/crates/bcm2711-lpa/src/lic/enable_2.rs +++ b/crates/bcm2711-lpa/src/lic/enable_2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `INT32` reader - Interrupt 32"] pub type INT32_R = crate::BitReader; #[doc = "Field `INT32` writer - Interrupt 32"] -pub type INT32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT33` reader - Interrupt 33"] pub type INT33_R = crate::BitReader; #[doc = "Field `INT33` writer - Interrupt 33"] -pub type INT33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT34` reader - Interrupt 34"] pub type INT34_R = crate::BitReader; #[doc = "Field `INT34` writer - Interrupt 34"] -pub type INT34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT35` reader - Interrupt 35"] pub type INT35_R = crate::BitReader; #[doc = "Field `INT35` writer - Interrupt 35"] -pub type INT35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT36` reader - Interrupt 36"] pub type INT36_R = crate::BitReader; #[doc = "Field `INT36` writer - Interrupt 36"] -pub type INT36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT37` reader - Interrupt 37"] pub type INT37_R = crate::BitReader; #[doc = "Field `INT37` writer - Interrupt 37"] -pub type INT37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT38` reader - Interrupt 38"] pub type INT38_R = crate::BitReader; #[doc = "Field `INT38` writer - Interrupt 38"] -pub type INT38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT39` reader - Interrupt 39"] pub type INT39_R = crate::BitReader; #[doc = "Field `INT39` writer - Interrupt 39"] -pub type INT39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT40` reader - Interrupt 40"] pub type INT40_R = crate::BitReader; #[doc = "Field `INT40` writer - Interrupt 40"] -pub type INT40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT41` reader - Interrupt 41"] pub type INT41_R = crate::BitReader; #[doc = "Field `INT41` writer - Interrupt 41"] -pub type INT41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT42` reader - Interrupt 42"] pub type INT42_R = crate::BitReader; #[doc = "Field `INT42` writer - Interrupt 42"] -pub type INT42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT43` reader - Interrupt 43"] pub type INT43_R = crate::BitReader; #[doc = "Field `INT43` writer - Interrupt 43"] -pub type INT43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT44` reader - Interrupt 44"] pub type INT44_R = crate::BitReader; #[doc = "Field `INT44` writer - Interrupt 44"] -pub type INT44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT45` reader - Interrupt 45"] pub type INT45_R = crate::BitReader; #[doc = "Field `INT45` writer - Interrupt 45"] -pub type INT45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT46` reader - Interrupt 46"] pub type INT46_R = crate::BitReader; #[doc = "Field `INT46` writer - Interrupt 46"] -pub type INT46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT47` reader - Interrupt 47"] pub type INT47_R = crate::BitReader; #[doc = "Field `INT47` writer - Interrupt 47"] -pub type INT47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT48` reader - Interrupt 48"] pub type INT48_R = crate::BitReader; #[doc = "Field `INT48` writer - Interrupt 48"] -pub type INT48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT49` reader - Interrupt 49"] pub type INT49_R = crate::BitReader; #[doc = "Field `INT49` writer - Interrupt 49"] -pub type INT49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT50` reader - Interrupt 50"] pub type INT50_R = crate::BitReader; #[doc = "Field `INT50` writer - Interrupt 50"] -pub type INT50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT51` reader - Interrupt 51"] pub type INT51_R = crate::BitReader; #[doc = "Field `INT51` writer - Interrupt 51"] -pub type INT51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT52` reader - Interrupt 52"] pub type INT52_R = crate::BitReader; #[doc = "Field `INT52` writer - Interrupt 52"] -pub type INT52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT53` reader - Interrupt 53"] pub type INT53_R = crate::BitReader; #[doc = "Field `INT53` writer - Interrupt 53"] -pub type INT53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT53_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT54` reader - Interrupt 54"] pub type INT54_R = crate::BitReader; #[doc = "Field `INT54` writer - Interrupt 54"] -pub type INT54_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT54_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT55` reader - Interrupt 55"] pub type INT55_R = crate::BitReader; #[doc = "Field `INT55` writer - Interrupt 55"] -pub type INT55_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT55_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT56` reader - Interrupt 56"] pub type INT56_R = crate::BitReader; #[doc = "Field `INT56` writer - Interrupt 56"] -pub type INT56_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT56_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT57` reader - Interrupt 57"] pub type INT57_R = crate::BitReader; #[doc = "Field `INT57` writer - Interrupt 57"] -pub type INT57_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT57_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT58` reader - Interrupt 58"] pub type INT58_R = crate::BitReader; #[doc = "Field `INT58` writer - Interrupt 58"] -pub type INT58_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT58_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT59` reader - Interrupt 59"] pub type INT59_R = crate::BitReader; #[doc = "Field `INT59` writer - Interrupt 59"] -pub type INT59_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT59_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT60` reader - Interrupt 60"] pub type INT60_R = crate::BitReader; #[doc = "Field `INT60` writer - Interrupt 60"] -pub type INT60_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT60_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT61` reader - Interrupt 61"] pub type INT61_R = crate::BitReader; #[doc = "Field `INT61` writer - Interrupt 61"] -pub type INT61_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT61_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT62` reader - Interrupt 62"] pub type INT62_R = crate::BitReader; #[doc = "Field `INT62` writer - Interrupt 62"] -pub type INT62_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT62_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `INT63` reader - Interrupt 63"] pub type INT63_R = crate::BitReader; #[doc = "Field `INT63` writer - Interrupt 63"] -pub type INT63_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type INT63_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Interrupt 32"] #[inline(always)] #[must_use] - pub fn int32(&mut self) -> INT32_W { - INT32_W::new(self) + pub fn int32(&mut self) -> INT32_W { + INT32_W::new(self, 0) } #[doc = "Bit 1 - Interrupt 33"] #[inline(always)] #[must_use] - pub fn int33(&mut self) -> INT33_W { - INT33_W::new(self) + pub fn int33(&mut self) -> INT33_W { + INT33_W::new(self, 1) } #[doc = "Bit 2 - Interrupt 34"] #[inline(always)] #[must_use] - pub fn int34(&mut self) -> INT34_W { - INT34_W::new(self) + pub fn int34(&mut self) -> INT34_W { + INT34_W::new(self, 2) } #[doc = "Bit 3 - Interrupt 35"] #[inline(always)] #[must_use] - pub fn int35(&mut self) -> INT35_W { - INT35_W::new(self) + pub fn int35(&mut self) -> INT35_W { + INT35_W::new(self, 3) } #[doc = "Bit 4 - Interrupt 36"] #[inline(always)] #[must_use] - pub fn int36(&mut self) -> INT36_W { - INT36_W::new(self) + pub fn int36(&mut self) -> INT36_W { + INT36_W::new(self, 4) } #[doc = "Bit 5 - Interrupt 37"] #[inline(always)] #[must_use] - pub fn int37(&mut self) -> INT37_W { - INT37_W::new(self) + pub fn int37(&mut self) -> INT37_W { + INT37_W::new(self, 5) } #[doc = "Bit 6 - Interrupt 38"] #[inline(always)] #[must_use] - pub fn int38(&mut self) -> INT38_W { - INT38_W::new(self) + pub fn int38(&mut self) -> INT38_W { + INT38_W::new(self, 6) } #[doc = "Bit 7 - Interrupt 39"] #[inline(always)] #[must_use] - pub fn int39(&mut self) -> INT39_W { - INT39_W::new(self) + pub fn int39(&mut self) -> INT39_W { + INT39_W::new(self, 7) } #[doc = "Bit 8 - Interrupt 40"] #[inline(always)] #[must_use] - pub fn int40(&mut self) -> INT40_W { - INT40_W::new(self) + pub fn int40(&mut self) -> INT40_W { + INT40_W::new(self, 8) } #[doc = "Bit 9 - Interrupt 41"] #[inline(always)] #[must_use] - pub fn int41(&mut self) -> INT41_W { - INT41_W::new(self) + pub fn int41(&mut self) -> INT41_W { + INT41_W::new(self, 9) } #[doc = "Bit 10 - Interrupt 42"] #[inline(always)] #[must_use] - pub fn int42(&mut self) -> INT42_W { - INT42_W::new(self) + pub fn int42(&mut self) -> INT42_W { + INT42_W::new(self, 10) } #[doc = "Bit 11 - Interrupt 43"] #[inline(always)] #[must_use] - pub fn int43(&mut self) -> INT43_W { - INT43_W::new(self) + pub fn int43(&mut self) -> INT43_W { + INT43_W::new(self, 11) } #[doc = "Bit 12 - Interrupt 44"] #[inline(always)] #[must_use] - pub fn int44(&mut self) -> INT44_W { - INT44_W::new(self) + pub fn int44(&mut self) -> INT44_W { + INT44_W::new(self, 12) } #[doc = "Bit 13 - Interrupt 45"] #[inline(always)] #[must_use] - pub fn int45(&mut self) -> INT45_W { - INT45_W::new(self) + pub fn int45(&mut self) -> INT45_W { + INT45_W::new(self, 13) } #[doc = "Bit 14 - Interrupt 46"] #[inline(always)] #[must_use] - pub fn int46(&mut self) -> INT46_W { - INT46_W::new(self) + pub fn int46(&mut self) -> INT46_W { + INT46_W::new(self, 14) } #[doc = "Bit 15 - Interrupt 47"] #[inline(always)] #[must_use] - pub fn int47(&mut self) -> INT47_W { - INT47_W::new(self) + pub fn int47(&mut self) -> INT47_W { + INT47_W::new(self, 15) } #[doc = "Bit 16 - Interrupt 48"] #[inline(always)] #[must_use] - pub fn int48(&mut self) -> INT48_W { - INT48_W::new(self) + pub fn int48(&mut self) -> INT48_W { + INT48_W::new(self, 16) } #[doc = "Bit 17 - Interrupt 49"] #[inline(always)] #[must_use] - pub fn int49(&mut self) -> INT49_W { - INT49_W::new(self) + pub fn int49(&mut self) -> INT49_W { + INT49_W::new(self, 17) } #[doc = "Bit 18 - Interrupt 50"] #[inline(always)] #[must_use] - pub fn int50(&mut self) -> INT50_W { - INT50_W::new(self) + pub fn int50(&mut self) -> INT50_W { + INT50_W::new(self, 18) } #[doc = "Bit 19 - Interrupt 51"] #[inline(always)] #[must_use] - pub fn int51(&mut self) -> INT51_W { - INT51_W::new(self) + pub fn int51(&mut self) -> INT51_W { + INT51_W::new(self, 19) } #[doc = "Bit 20 - Interrupt 52"] #[inline(always)] #[must_use] - pub fn int52(&mut self) -> INT52_W { - INT52_W::new(self) + pub fn int52(&mut self) -> INT52_W { + INT52_W::new(self, 20) } #[doc = "Bit 21 - Interrupt 53"] #[inline(always)] #[must_use] - pub fn int53(&mut self) -> INT53_W { - INT53_W::new(self) + pub fn int53(&mut self) -> INT53_W { + INT53_W::new(self, 21) } #[doc = "Bit 22 - Interrupt 54"] #[inline(always)] #[must_use] - pub fn int54(&mut self) -> INT54_W { - INT54_W::new(self) + pub fn int54(&mut self) -> INT54_W { + INT54_W::new(self, 22) } #[doc = "Bit 23 - Interrupt 55"] #[inline(always)] #[must_use] - pub fn int55(&mut self) -> INT55_W { - INT55_W::new(self) + pub fn int55(&mut self) -> INT55_W { + INT55_W::new(self, 23) } #[doc = "Bit 24 - Interrupt 56"] #[inline(always)] #[must_use] - pub fn int56(&mut self) -> INT56_W { - INT56_W::new(self) + pub fn int56(&mut self) -> INT56_W { + INT56_W::new(self, 24) } #[doc = "Bit 25 - Interrupt 57"] #[inline(always)] #[must_use] - pub fn int57(&mut self) -> INT57_W { - INT57_W::new(self) + pub fn int57(&mut self) -> INT57_W { + INT57_W::new(self, 25) } #[doc = "Bit 26 - Interrupt 58"] #[inline(always)] #[must_use] - pub fn int58(&mut self) -> INT58_W { - INT58_W::new(self) + pub fn int58(&mut self) -> INT58_W { + INT58_W::new(self, 26) } #[doc = "Bit 27 - Interrupt 59"] #[inline(always)] #[must_use] - pub fn int59(&mut self) -> INT59_W { - INT59_W::new(self) + pub fn int59(&mut self) -> INT59_W { + INT59_W::new(self, 27) } #[doc = "Bit 28 - Interrupt 60"] #[inline(always)] #[must_use] - pub fn int60(&mut self) -> INT60_W { - INT60_W::new(self) + pub fn int60(&mut self) -> INT60_W { + INT60_W::new(self, 28) } #[doc = "Bit 29 - Interrupt 61"] #[inline(always)] #[must_use] - pub fn int61(&mut self) -> INT61_W { - INT61_W::new(self) + pub fn int61(&mut self) -> INT61_W { + INT61_W::new(self, 29) } #[doc = "Bit 30 - Interrupt 62"] #[inline(always)] #[must_use] - pub fn int62(&mut self) -> INT62_W { - INT62_W::new(self) + pub fn int62(&mut self) -> INT62_W { + INT62_W::new(self, 30) } #[doc = "Bit 31 - Interrupt 63"] #[inline(always)] #[must_use] - pub fn int63(&mut self) -> INT63_W { - INT63_W::new(self) + pub fn int63(&mut self) -> INT63_W { + INT63_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/enable_basic.rs b/crates/bcm2711-lpa/src/lic/enable_basic.rs index 3533529..86699b8 100644 --- a/crates/bcm2711-lpa/src/lic/enable_basic.rs +++ b/crates/bcm2711-lpa/src/lic/enable_basic.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -98,57 +98,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/fiq_control.rs b/crates/bcm2711-lpa/src/lic/fiq_control.rs index d27183a..7685c31 100644 --- a/crates/bcm2711-lpa/src/lic/fiq_control.rs +++ b/crates/bcm2711-lpa/src/lic/fiq_control.rs @@ -604,8 +604,8 @@ impl SOURCE_R { } } #[doc = "Field `SOURCE` writer - FIQ Source"] -pub type SOURCE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O, SOURCE_A>; -impl<'a, REG, const O: u8> SOURCE_W<'a, REG, O> +pub type SOURCE_W<'a, REG> = crate::FieldWriter<'a, REG, 7, SOURCE_A>; +impl<'a, REG> SOURCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -974,7 +974,7 @@ where #[doc = "Field `ENABLE` reader - FIQ Enable"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - FIQ Enable"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:6 - FIQ Source"] #[inline(always)] @@ -997,21 +997,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - FIQ Source"] #[inline(always)] #[must_use] - pub fn source(&mut self) -> SOURCE_W { - SOURCE_W::new(self) + pub fn source(&mut self) -> SOURCE_W { + SOURCE_W::new(self, 0) } #[doc = "Bit 7 - FIQ Enable"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/lic/pending_1.rs b/crates/bcm2711-lpa/src/lic/pending_1.rs index efe3f18..8d56c62 100644 --- a/crates/bcm2711-lpa/src/lic/pending_1.rs +++ b/crates/bcm2711-lpa/src/lic/pending_1.rs @@ -266,7 +266,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Pending state for interrupts 1 - 31\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pending_1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/lic/pending_2.rs b/crates/bcm2711-lpa/src/lic/pending_2.rs index 44e3573..56da96b 100644 --- a/crates/bcm2711-lpa/src/lic/pending_2.rs +++ b/crates/bcm2711-lpa/src/lic/pending_2.rs @@ -266,7 +266,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Pending state for interrupts 32 - 63\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pending_2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/pactl.rs b/crates/bcm2711-lpa/src/pactl.rs index 197aa4a..23e7f34 100644 --- a/crates/bcm2711-lpa/src/pactl.rs +++ b/crates/bcm2711-lpa/src/pactl.rs @@ -2,8 +2,14 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, +} +impl RegisterBlock { #[doc = "0x00 - Interrupt status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } } #[doc = "CS (rw) register accessor: Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2711-lpa/src/pactl/cs.rs b/crates/bcm2711-lpa/src/pactl/cs.rs index 859135b..d324196 100644 --- a/crates/bcm2711-lpa/src/pactl/cs.rs +++ b/crates/bcm2711-lpa/src/pactl/cs.rs @@ -5,83 +5,83 @@ pub type W = crate::W; #[doc = "Field `SPI_0` reader - SPI0 interrupt active"] pub type SPI_0_R = crate::BitReader; #[doc = "Field `SPI_0` writer - SPI0 interrupt active"] -pub type SPI_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 interrupt active"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 interrupt active"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 interrupt active"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 interrupt active"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_3` reader - SPI3 interrupt active"] pub type SPI_3_R = crate::BitReader; #[doc = "Field `SPI_3` writer - SPI3 interrupt active"] -pub type SPI_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_4` reader - SPI4 interrupt active"] pub type SPI_4_R = crate::BitReader; #[doc = "Field `SPI_4` writer - SPI4 interrupt active"] -pub type SPI_4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_5` reader - SPI5 interrupt active"] pub type SPI_5_R = crate::BitReader; #[doc = "Field `SPI_5` writer - SPI5 interrupt active"] -pub type SPI_5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_6` reader - SPI6 interrupt active"] pub type SPI_6_R = crate::BitReader; #[doc = "Field `SPI_6` writer - SPI6 interrupt active"] -pub type SPI_6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_0` reader - I2C0 interrupt active"] pub type I2C_0_R = crate::BitReader; #[doc = "Field `I2C_0` writer - I2C0 interrupt active"] -pub type I2C_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_1` reader - I2C1 interrupt active"] pub type I2C_1_R = crate::BitReader; #[doc = "Field `I2C_1` writer - I2C1 interrupt active"] -pub type I2C_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_2` reader - I2C2 interrupt active"] pub type I2C_2_R = crate::BitReader; #[doc = "Field `I2C_2` writer - I2C2 interrupt active"] -pub type I2C_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_3` reader - I2C3 interrupt active"] pub type I2C_3_R = crate::BitReader; #[doc = "Field `I2C_3` writer - I2C3 interrupt active"] -pub type I2C_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_4` reader - I2C4 interrupt active"] pub type I2C_4_R = crate::BitReader; #[doc = "Field `I2C_4` writer - I2C4 interrupt active"] -pub type I2C_4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_5` reader - I2C5 interrupt active"] pub type I2C_5_R = crate::BitReader; #[doc = "Field `I2C_5` writer - I2C5 interrupt active"] -pub type I2C_5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_6` reader - I2C6 interrupt active"] pub type I2C_6_R = crate::BitReader; #[doc = "Field `I2C_6` writer - I2C6 interrupt active"] -pub type I2C_6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_7` reader - I2C7 interrupt active"] pub type I2C_7_R = crate::BitReader; #[doc = "Field `I2C_7` writer - I2C7 interrupt active"] -pub type I2C_7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2C_7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART_5` reader - UART5 interrupt active"] pub type UART_5_R = crate::BitReader; #[doc = "Field `UART_5` writer - UART5 interrupt active"] -pub type UART_5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART_4` reader - UART4 interrupt active"] pub type UART_4_R = crate::BitReader; #[doc = "Field `UART_4` writer - UART4 interrupt active"] -pub type UART_4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART_3` reader - UART3 interrupt active"] pub type UART_3_R = crate::BitReader; #[doc = "Field `UART_3` writer - UART3 interrupt active"] -pub type UART_3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART_2` reader - UART2 interrupt active"] pub type UART_2_R = crate::BitReader; #[doc = "Field `UART_2` writer - UART2 interrupt active"] -pub type UART_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART_0` reader - UART0 interrupt active"] pub type UART_0_R = crate::BitReader; #[doc = "Field `UART_0` writer - UART0 interrupt active"] -pub type UART_0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_0_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SPI0 interrupt active"] #[inline(always)] @@ -212,129 +212,129 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - SPI0 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_0(&mut self) -> SPI_0_W { - SPI_0_W::new(self) + pub fn spi_0(&mut self) -> SPI_0_W { + SPI_0_W::new(self, 0) } #[doc = "Bit 1 - SPI1 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = "Bit 3 - SPI3 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_3(&mut self) -> SPI_3_W { - SPI_3_W::new(self) + pub fn spi_3(&mut self) -> SPI_3_W { + SPI_3_W::new(self, 3) } #[doc = "Bit 4 - SPI4 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_4(&mut self) -> SPI_4_W { - SPI_4_W::new(self) + pub fn spi_4(&mut self) -> SPI_4_W { + SPI_4_W::new(self, 4) } #[doc = "Bit 5 - SPI5 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_5(&mut self) -> SPI_5_W { - SPI_5_W::new(self) + pub fn spi_5(&mut self) -> SPI_5_W { + SPI_5_W::new(self, 5) } #[doc = "Bit 6 - SPI6 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_6(&mut self) -> SPI_6_W { - SPI_6_W::new(self) + pub fn spi_6(&mut self) -> SPI_6_W { + SPI_6_W::new(self, 6) } #[doc = "Bit 8 - I2C0 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_0(&mut self) -> I2C_0_W { - I2C_0_W::new(self) + pub fn i2c_0(&mut self) -> I2C_0_W { + I2C_0_W::new(self, 8) } #[doc = "Bit 9 - I2C1 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_1(&mut self) -> I2C_1_W { - I2C_1_W::new(self) + pub fn i2c_1(&mut self) -> I2C_1_W { + I2C_1_W::new(self, 9) } #[doc = "Bit 10 - I2C2 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_2(&mut self) -> I2C_2_W { - I2C_2_W::new(self) + pub fn i2c_2(&mut self) -> I2C_2_W { + I2C_2_W::new(self, 10) } #[doc = "Bit 11 - I2C3 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_3(&mut self) -> I2C_3_W { - I2C_3_W::new(self) + pub fn i2c_3(&mut self) -> I2C_3_W { + I2C_3_W::new(self, 11) } #[doc = "Bit 12 - I2C4 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_4(&mut self) -> I2C_4_W { - I2C_4_W::new(self) + pub fn i2c_4(&mut self) -> I2C_4_W { + I2C_4_W::new(self, 12) } #[doc = "Bit 13 - I2C5 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_5(&mut self) -> I2C_5_W { - I2C_5_W::new(self) + pub fn i2c_5(&mut self) -> I2C_5_W { + I2C_5_W::new(self, 13) } #[doc = "Bit 14 - I2C6 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_6(&mut self) -> I2C_6_W { - I2C_6_W::new(self) + pub fn i2c_6(&mut self) -> I2C_6_W { + I2C_6_W::new(self, 14) } #[doc = "Bit 15 - I2C7 interrupt active"] #[inline(always)] #[must_use] - pub fn i2c_7(&mut self) -> I2C_7_W { - I2C_7_W::new(self) + pub fn i2c_7(&mut self) -> I2C_7_W { + I2C_7_W::new(self, 15) } #[doc = "Bit 16 - UART5 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_5(&mut self) -> UART_5_W { - UART_5_W::new(self) + pub fn uart_5(&mut self) -> UART_5_W { + UART_5_W::new(self, 16) } #[doc = "Bit 17 - UART4 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_4(&mut self) -> UART_4_W { - UART_4_W::new(self) + pub fn uart_4(&mut self) -> UART_4_W { + UART_4_W::new(self, 17) } #[doc = "Bit 18 - UART3 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_3(&mut self) -> UART_3_W { - UART_3_W::new(self) + pub fn uart_3(&mut self) -> UART_3_W { + UART_3_W::new(self, 18) } #[doc = "Bit 19 - UART2 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_2(&mut self) -> UART_2_W { - UART_2_W::new(self) + pub fn uart_2(&mut self) -> UART_2_W { + UART_2_W::new(self, 19) } #[doc = "Bit 20 - UART0 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_0(&mut self) -> UART_0_W { - UART_0_W::new(self) + pub fn uart_0(&mut self) -> UART_0_W { + UART_0_W::new(self, 20) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/pwm0.rs b/crates/bcm2711-lpa/src/pwm0.rs index 4306916..3a98ec3 100644 --- a/crates/bcm2711-lpa/src/pwm0.rs +++ b/crates/bcm2711-lpa/src/pwm0.rs @@ -2,24 +2,58 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + ctl: CTL, + sta: STA, + dmac: DMAC, + _reserved3: [u8; 0x04], + rng1: RNG1, + dat1: DAT1, + fif1: FIF1, + _reserved6: [u8; 0x04], + rng2: RNG2, + dat2: DAT2, +} +impl RegisterBlock { #[doc = "0x00 - Control"] - pub ctl: CTL, + #[inline(always)] + pub const fn ctl(&self) -> &CTL { + &self.ctl + } #[doc = "0x04 - Status"] - pub sta: STA, + #[inline(always)] + pub const fn sta(&self) -> &STA { + &self.sta + } #[doc = "0x08 - DMA control"] - pub dmac: DMAC, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn dmac(&self) -> &DMAC { + &self.dmac + } #[doc = "0x10 - Range for channel 1"] - pub rng1: RNG1, + #[inline(always)] + pub const fn rng1(&self) -> &RNG1 { + &self.rng1 + } #[doc = "0x14 - Channel 1 data"] - pub dat1: DAT1, + #[inline(always)] + pub const fn dat1(&self) -> &DAT1 { + &self.dat1 + } #[doc = "0x18 - FIFO input"] - pub fif1: FIF1, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn fif1(&self) -> &FIF1 { + &self.fif1 + } #[doc = "0x20 - Range for channel 2"] - pub rng2: RNG2, + #[inline(always)] + pub const fn rng2(&self) -> &RNG2 { + &self.rng2 + } #[doc = "0x24 - Channel 2 data"] - pub dat2: DAT2, + #[inline(always)] + pub const fn dat2(&self) -> &DAT2 { + &self.dat2 + } } #[doc = "CTL (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctl`] module"] diff --git a/crates/bcm2711-lpa/src/pwm0/ctl.rs b/crates/bcm2711-lpa/src/pwm0/ctl.rs index d1b9d57..775bd00 100644 --- a/crates/bcm2711-lpa/src/pwm0/ctl.rs +++ b/crates/bcm2711-lpa/src/pwm0/ctl.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PWEN1` reader - Enable channel 1"] pub type PWEN1_R = crate::BitReader; #[doc = "Field `PWEN1` writer - Enable channel 1"] -pub type PWEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MODE1` reader - Channel 1 mode"] pub type MODE1_R = crate::BitReader; #[doc = "Channel 1 mode\n\nValue on reset: 0"] @@ -43,8 +43,8 @@ impl MODE1_R { } } #[doc = "Field `MODE1` writer - Channel 1 mode"] -pub type MODE1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MODE1_A>; -impl<'a, REG, const O: u8> MODE1_W<'a, REG, O> +pub type MODE1_W<'a, REG> = crate::BitWriter<'a, REG, MODE1_A>; +impl<'a, REG> MODE1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -62,31 +62,31 @@ where #[doc = "Field `RPTL1` reader - Repeat last value from FIFO for channel 1"] pub type RPTL1_R = crate::BitReader; #[doc = "Field `RPTL1` writer - Repeat last value from FIFO for channel 1"] -pub type RPTL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPTL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBIT1` reader - State when not transmitting on channel 1"] pub type SBIT1_R = crate::BitReader; #[doc = "Field `SBIT1` writer - State when not transmitting on channel 1"] -pub type SBIT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SBIT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLA1` reader - Channel 1 polarity inverted"] pub type POLA1_R = crate::BitReader; #[doc = "Field `POLA1` writer - Channel 1 polarity inverted"] -pub type POLA1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POLA1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEF1` reader - Use FIFO for channel 1"] pub type USEF1_R = crate::BitReader; #[doc = "Field `USEF1` writer - Use FIFO for channel 1"] -pub type USEF1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USEF1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLRF1` reader - Clear FIFO"] pub type CLRF1_R = crate::BitReader; #[doc = "Field `CLRF1` writer - Clear FIFO"] -pub type CLRF1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLRF1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSEN1` reader - M/S mode for channel 1"] pub type MSEN1_R = crate::BitReader; #[doc = "Field `MSEN1` writer - M/S mode for channel 1"] -pub type MSEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWEN2` reader - Enable channel 2"] pub type PWEN2_R = crate::BitReader; #[doc = "Field `PWEN2` writer - Enable channel 2"] -pub type PWEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MODE2` reader - Channel 2 mode"] pub type MODE2_R = crate::BitReader; #[doc = "Channel 2 mode\n\nValue on reset: 0"] @@ -124,8 +124,8 @@ impl MODE2_R { } } #[doc = "Field `MODE2` writer - Channel 2 mode"] -pub type MODE2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MODE2_A>; -impl<'a, REG, const O: u8> MODE2_W<'a, REG, O> +pub type MODE2_W<'a, REG> = crate::BitWriter<'a, REG, MODE2_A>; +impl<'a, REG> MODE2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -143,23 +143,23 @@ where #[doc = "Field `RPTL2` reader - Repeat last value from FIFO for channel 2"] pub type RPTL2_R = crate::BitReader; #[doc = "Field `RPTL2` writer - Repeat last value from FIFO for channel 2"] -pub type RPTL2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPTL2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBIT2` reader - State when not transmitting on channel 2"] pub type SBIT2_R = crate::BitReader; #[doc = "Field `SBIT2` writer - State when not transmitting on channel 2"] -pub type SBIT2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SBIT2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLA2` reader - Channel 2 polarity inverted"] pub type POLA2_R = crate::BitReader; #[doc = "Field `POLA2` writer - Channel 2 polarity inverted"] -pub type POLA2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POLA2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEF2` reader - Use FIFO for channel 2"] pub type USEF2_R = crate::BitReader; #[doc = "Field `USEF2` writer - Use FIFO for channel 2"] -pub type USEF2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USEF2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSEN2` reader - M/S mode for channel 2"] pub type MSEN2_R = crate::BitReader; #[doc = "Field `MSEN2` writer - M/S mode for channel 2"] -pub type MSEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSEN2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] @@ -260,99 +260,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] #[must_use] - pub fn pwen1(&mut self) -> PWEN1_W { - PWEN1_W::new(self) + pub fn pwen1(&mut self) -> PWEN1_W { + PWEN1_W::new(self, 0) } #[doc = "Bit 1 - Channel 1 mode"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W { - MODE1_W::new(self) + pub fn mode1(&mut self) -> MODE1_W { + MODE1_W::new(self, 1) } #[doc = "Bit 2 - Repeat last value from FIFO for channel 1"] #[inline(always)] #[must_use] - pub fn rptl1(&mut self) -> RPTL1_W { - RPTL1_W::new(self) + pub fn rptl1(&mut self) -> RPTL1_W { + RPTL1_W::new(self, 2) } #[doc = "Bit 3 - State when not transmitting on channel 1"] #[inline(always)] #[must_use] - pub fn sbit1(&mut self) -> SBIT1_W { - SBIT1_W::new(self) + pub fn sbit1(&mut self) -> SBIT1_W { + SBIT1_W::new(self, 3) } #[doc = "Bit 4 - Channel 1 polarity inverted"] #[inline(always)] #[must_use] - pub fn pola1(&mut self) -> POLA1_W { - POLA1_W::new(self) + pub fn pola1(&mut self) -> POLA1_W { + POLA1_W::new(self, 4) } #[doc = "Bit 5 - Use FIFO for channel 1"] #[inline(always)] #[must_use] - pub fn usef1(&mut self) -> USEF1_W { - USEF1_W::new(self) + pub fn usef1(&mut self) -> USEF1_W { + USEF1_W::new(self, 5) } #[doc = "Bit 6 - Clear FIFO"] #[inline(always)] #[must_use] - pub fn clrf1(&mut self) -> CLRF1_W { - CLRF1_W::new(self) + pub fn clrf1(&mut self) -> CLRF1_W { + CLRF1_W::new(self, 6) } #[doc = "Bit 7 - M/S mode for channel 1"] #[inline(always)] #[must_use] - pub fn msen1(&mut self) -> MSEN1_W { - MSEN1_W::new(self) + pub fn msen1(&mut self) -> MSEN1_W { + MSEN1_W::new(self, 7) } #[doc = "Bit 8 - Enable channel 2"] #[inline(always)] #[must_use] - pub fn pwen2(&mut self) -> PWEN2_W { - PWEN2_W::new(self) + pub fn pwen2(&mut self) -> PWEN2_W { + PWEN2_W::new(self, 8) } #[doc = "Bit 9 - Channel 2 mode"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W { - MODE2_W::new(self) + pub fn mode2(&mut self) -> MODE2_W { + MODE2_W::new(self, 9) } #[doc = "Bit 10 - Repeat last value from FIFO for channel 2"] #[inline(always)] #[must_use] - pub fn rptl2(&mut self) -> RPTL2_W { - RPTL2_W::new(self) + pub fn rptl2(&mut self) -> RPTL2_W { + RPTL2_W::new(self, 10) } #[doc = "Bit 11 - State when not transmitting on channel 2"] #[inline(always)] #[must_use] - pub fn sbit2(&mut self) -> SBIT2_W { - SBIT2_W::new(self) + pub fn sbit2(&mut self) -> SBIT2_W { + SBIT2_W::new(self, 11) } #[doc = "Bit 12 - Channel 2 polarity inverted"] #[inline(always)] #[must_use] - pub fn pola2(&mut self) -> POLA2_W { - POLA2_W::new(self) + pub fn pola2(&mut self) -> POLA2_W { + POLA2_W::new(self, 12) } #[doc = "Bit 13 - Use FIFO for channel 2"] #[inline(always)] #[must_use] - pub fn usef2(&mut self) -> USEF2_W { - USEF2_W::new(self) + pub fn usef2(&mut self) -> USEF2_W { + USEF2_W::new(self, 13) } #[doc = "Bit 15 - M/S mode for channel 2"] #[inline(always)] #[must_use] - pub fn msen2(&mut self) -> MSEN2_W { - MSEN2_W::new(self) + pub fn msen2(&mut self) -> MSEN2_W { + MSEN2_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/pwm0/dat1.rs b/crates/bcm2711-lpa/src/pwm0/dat1.rs index b70672a..d7e256f 100644 --- a/crates/bcm2711-lpa/src/pwm0/dat1.rs +++ b/crates/bcm2711-lpa/src/pwm0/dat1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/pwm0/dat2.rs b/crates/bcm2711-lpa/src/pwm0/dat2.rs index 00bb85f..eb9a92e 100644 --- a/crates/bcm2711-lpa/src/pwm0/dat2.rs +++ b/crates/bcm2711-lpa/src/pwm0/dat2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/pwm0/dmac.rs b/crates/bcm2711-lpa/src/pwm0/dmac.rs index d73ccfd..481d414 100644 --- a/crates/bcm2711-lpa/src/pwm0/dmac.rs +++ b/crates/bcm2711-lpa/src/pwm0/dmac.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `DREQ` reader - DMA threshold for DREQ signal"] pub type DREQ_R = crate::FieldReader; #[doc = "Field `DREQ` writer - DMA threshold for DREQ signal"] -pub type DREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PANIC` reader - DMA threshold for panic signal"] pub type PANIC_R = crate::FieldReader; #[doc = "Field `PANIC` writer - DMA threshold for panic signal"] -pub type PANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ENAB` reader - DMA enabled"] pub type ENAB_R = crate::BitReader; #[doc = "Field `ENAB` writer - DMA enabled"] -pub type ENAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENAB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - DMA threshold for DREQ signal"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA threshold for DREQ signal"] #[inline(always)] #[must_use] - pub fn dreq(&mut self) -> DREQ_W { - DREQ_W::new(self) + pub fn dreq(&mut self) -> DREQ_W { + DREQ_W::new(self, 0) } #[doc = "Bits 8:15 - DMA threshold for panic signal"] #[inline(always)] #[must_use] - pub fn panic(&mut self) -> PANIC_W { - PANIC_W::new(self) + pub fn panic(&mut self) -> PANIC_W { + PANIC_W::new(self, 8) } #[doc = "Bit 31 - DMA enabled"] #[inline(always)] #[must_use] - pub fn enab(&mut self) -> ENAB_W { - ENAB_W::new(self) + pub fn enab(&mut self) -> ENAB_W { + ENAB_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/pwm0/rng1.rs b/crates/bcm2711-lpa/src/pwm0/rng1.rs index 2a01d68..2f3996b 100644 --- a/crates/bcm2711-lpa/src/pwm0/rng1.rs +++ b/crates/bcm2711-lpa/src/pwm0/rng1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/pwm0/rng2.rs b/crates/bcm2711-lpa/src/pwm0/rng2.rs index c7a9f74..c1b9401 100644 --- a/crates/bcm2711-lpa/src/pwm0/rng2.rs +++ b/crates/bcm2711-lpa/src/pwm0/rng2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/pwm0/sta.rs b/crates/bcm2711-lpa/src/pwm0/sta.rs index a0076a9..6429987 100644 --- a/crates/bcm2711-lpa/src/pwm0/sta.rs +++ b/crates/bcm2711-lpa/src/pwm0/sta.rs @@ -5,55 +5,55 @@ pub type W = crate::W; #[doc = "Field `FULL1` reader - FIFO full"] pub type FULL1_R = crate::BitReader; #[doc = "Field `FULL1` writer - FIFO full"] -pub type FULL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FULL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMPT1` reader - FIFO empty"] pub type EMPT1_R = crate::BitReader; #[doc = "Field `EMPT1` writer - FIFO empty"] -pub type EMPT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EMPT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WERR1` reader - FIFO write error"] pub type WERR1_R = crate::BitReader; #[doc = "Field `WERR1` writer - FIFO write error"] -pub type WERR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WERR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RERR1` reader - FIFO read error"] pub type RERR1_R = crate::BitReader; #[doc = "Field `RERR1` writer - FIFO read error"] -pub type RERR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RERR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO1` reader - Channel 1 gap occurred"] pub type GAPO1_R = crate::BitReader; #[doc = "Field `GAPO1` writer - Channel 1 gap occurred"] -pub type GAPO1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO2` reader - Channel 2 gap occurred"] pub type GAPO2_R = crate::BitReader; #[doc = "Field `GAPO2` writer - Channel 2 gap occurred"] -pub type GAPO2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO3` reader - Channel 3 gap occurred"] pub type GAPO3_R = crate::BitReader; #[doc = "Field `GAPO3` writer - Channel 3 gap occurred"] -pub type GAPO3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO4` reader - Channel 4 gap occurred"] pub type GAPO4_R = crate::BitReader; #[doc = "Field `GAPO4` writer - Channel 4 gap occurred"] -pub type GAPO4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERR` reader - Bus error"] pub type BERR_R = crate::BitReader; #[doc = "Field `BERR` writer - Bus error"] -pub type BERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA1` reader - Channel 1 state"] pub type STA1_R = crate::BitReader; #[doc = "Field `STA1` writer - Channel 1 state"] -pub type STA1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA2` reader - Channel 2 state"] pub type STA2_R = crate::BitReader; #[doc = "Field `STA2` writer - Channel 2 state"] -pub type STA2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA3` reader - Channel 3 state"] pub type STA3_R = crate::BitReader; #[doc = "Field `STA3` writer - Channel 3 state"] -pub type STA3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA4` reader - Channel 4 state"] pub type STA4_R = crate::BitReader; #[doc = "Field `STA4` writer - Channel 4 state"] -pub type STA4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA4_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - FIFO full"] #[inline(always)] @@ -142,87 +142,87 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - FIFO full"] #[inline(always)] #[must_use] - pub fn full1(&mut self) -> FULL1_W { - FULL1_W::new(self) + pub fn full1(&mut self) -> FULL1_W { + FULL1_W::new(self, 0) } #[doc = "Bit 1 - FIFO empty"] #[inline(always)] #[must_use] - pub fn empt1(&mut self) -> EMPT1_W { - EMPT1_W::new(self) + pub fn empt1(&mut self) -> EMPT1_W { + EMPT1_W::new(self, 1) } #[doc = "Bit 2 - FIFO write error"] #[inline(always)] #[must_use] - pub fn werr1(&mut self) -> WERR1_W { - WERR1_W::new(self) + pub fn werr1(&mut self) -> WERR1_W { + WERR1_W::new(self, 2) } #[doc = "Bit 3 - FIFO read error"] #[inline(always)] #[must_use] - pub fn rerr1(&mut self) -> RERR1_W { - RERR1_W::new(self) + pub fn rerr1(&mut self) -> RERR1_W { + RERR1_W::new(self, 3) } #[doc = "Bit 4 - Channel 1 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo1(&mut self) -> GAPO1_W { - GAPO1_W::new(self) + pub fn gapo1(&mut self) -> GAPO1_W { + GAPO1_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo2(&mut self) -> GAPO2_W { - GAPO2_W::new(self) + pub fn gapo2(&mut self) -> GAPO2_W { + GAPO2_W::new(self, 5) } #[doc = "Bit 6 - Channel 3 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo3(&mut self) -> GAPO3_W { - GAPO3_W::new(self) + pub fn gapo3(&mut self) -> GAPO3_W { + GAPO3_W::new(self, 6) } #[doc = "Bit 7 - Channel 4 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo4(&mut self) -> GAPO4_W { - GAPO4_W::new(self) + pub fn gapo4(&mut self) -> GAPO4_W { + GAPO4_W::new(self, 7) } #[doc = "Bit 8 - Bus error"] #[inline(always)] #[must_use] - pub fn berr(&mut self) -> BERR_W { - BERR_W::new(self) + pub fn berr(&mut self) -> BERR_W { + BERR_W::new(self, 8) } #[doc = "Bit 9 - Channel 1 state"] #[inline(always)] #[must_use] - pub fn sta1(&mut self) -> STA1_W { - STA1_W::new(self) + pub fn sta1(&mut self) -> STA1_W { + STA1_W::new(self, 9) } #[doc = "Bit 10 - Channel 2 state"] #[inline(always)] #[must_use] - pub fn sta2(&mut self) -> STA2_W { - STA2_W::new(self) + pub fn sta2(&mut self) -> STA2_W { + STA2_W::new(self, 10) } #[doc = "Bit 11 - Channel 3 state"] #[inline(always)] #[must_use] - pub fn sta3(&mut self) -> STA3_W { - STA3_W::new(self) + pub fn sta3(&mut self) -> STA3_W { + STA3_W::new(self, 11) } #[doc = "Bit 12 - Channel 4 state"] #[inline(always)] #[must_use] - pub fn sta4(&mut self) -> STA4_W { - STA4_W::new(self) + pub fn sta4(&mut self) -> STA4_W { + STA4_W::new(self, 12) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi0.rs b/crates/bcm2711-lpa/src/spi0.rs index 66be9b6..bcd4b68 100644 --- a/crates/bcm2711-lpa/src/spi0.rs +++ b/crates/bcm2711-lpa/src/spi0.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + fifo: FIFO, + clk: CLK, + dlen: DLEN, + ltoh: LTOH, + dc: DC, +} +impl RegisterBlock { #[doc = "0x00 - Control and Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - FIFO access"] - pub fifo: FIFO, + #[inline(always)] + pub const fn fifo(&self) -> &FIFO { + &self.fifo + } #[doc = "0x08 - Clock divider"] - pub clk: CLK, + #[inline(always)] + pub const fn clk(&self) -> &CLK { + &self.clk + } #[doc = "0x0c - Data length"] - pub dlen: DLEN, + #[inline(always)] + pub const fn dlen(&self) -> &DLEN { + &self.dlen + } #[doc = "0x10 - LoSSI output hold delay"] - pub ltoh: LTOH, + #[inline(always)] + pub const fn ltoh(&self) -> <OH { + &self.ltoh + } #[doc = "0x14 - "] - pub dc: DC, + #[inline(always)] + pub const fn dc(&self) -> &DC { + &self.dc + } } #[doc = "CS (rw) register accessor: Control and Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2711-lpa/src/spi0/clk.rs b/crates/bcm2711-lpa/src/spi0/clk.rs index 54ce877..280645f 100644 --- a/crates/bcm2711-lpa/src/spi0/clk.rs +++ b/crates/bcm2711-lpa/src/spi0/clk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CDIV` reader - Clock divider"] pub type CDIV_R = crate::FieldReader; #[doc = "Field `CDIV` writer - Clock divider"] -pub type CDIV_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type CDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Clock divider"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Clock divider"] #[inline(always)] #[must_use] - pub fn cdiv(&mut self) -> CDIV_W { - CDIV_W::new(self) + pub fn cdiv(&mut self) -> CDIV_W { + CDIV_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi0/cs.rs b/crates/bcm2711-lpa/src/spi0/cs.rs index 06511e6..edf286a 100644 --- a/crates/bcm2711-lpa/src/spi0/cs.rs +++ b/crates/bcm2711-lpa/src/spi0/cs.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `CS` reader - Chip select"] pub type CS_R = crate::FieldReader; #[doc = "Field `CS` writer - Chip select"] -pub type CS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CPHA` reader - Clock phase"] pub type CPHA_R = crate::BitReader; #[doc = "Field `CPHA` writer - Clock phase"] -pub type CPHA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPHA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPOL` reader - Clock polarity"] pub type CPOL_R = crate::BitReader; #[doc = "Field `CPOL` writer - Clock polarity"] -pub type CPOL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPOL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` reader - Clear the FIFO(s)"] pub type CLEAR_R = crate::FieldReader; #[doc = "Clear the FIFO(s)\n\nValue on reset: 0"] @@ -64,8 +64,8 @@ impl CLEAR_R { } } #[doc = "Field `CLEAR` writer - Clear the FIFO(s)"] -pub type CLEAR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, CLEAR_A>; -impl<'a, REG, const O: u8> CLEAR_W<'a, REG, O> +pub type CLEAR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CLEAR_A>; +impl<'a, REG> CLEAR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -89,43 +89,43 @@ where #[doc = "Field `CSPOL` reader - Chip select polarity"] pub type CSPOL_R = crate::BitReader; #[doc = "Field `CSPOL` writer - Chip select polarity"] -pub type CSPOL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TA` reader - Transfer active"] pub type TA_R = crate::BitReader; #[doc = "Field `TA` writer - Transfer active"] -pub type TA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAEN` reader - Enable DMA"] pub type DMAEN_R = crate::BitReader; #[doc = "Field `DMAEN` writer - Enable DMA"] -pub type DMAEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTD` reader - Interrupt on done"] pub type INTD_R = crate::BitReader; #[doc = "Field `INTD` writer - Interrupt on done"] -pub type INTD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTR` reader - Interrupt on RX"] pub type INTR_R = crate::BitReader; #[doc = "Field `INTR` writer - Interrupt on RX"] -pub type INTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADCS` reader - Automatically deassert chip select"] pub type ADCS_R = crate::BitReader; #[doc = "Field `ADCS` writer - Automatically deassert chip select"] -pub type ADCS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ADCS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN` reader - Read enable"] pub type REN_R = crate::BitReader; #[doc = "Field `REN` writer - Read enable"] -pub type REN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN` reader - LoSSI enable"] pub type LEN_R = crate::BitReader; #[doc = "Field `LEN` writer - LoSSI enable"] -pub type LEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LMONO` reader - "] pub type LMONO_R = crate::BitReader; #[doc = "Field `LMONO` writer - "] -pub type LMONO_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LMONO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TE_EN` reader - "] pub type TE_EN_R = crate::BitReader; #[doc = "Field `TE_EN` writer - "] -pub type TE_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TE_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE` reader - Transfer is done"] pub type DONE_R = crate::BitReader; #[doc = "Field `RXD` reader - RX FIFO contains data"] @@ -139,23 +139,23 @@ pub type RXF_R = crate::BitReader; #[doc = "Field `CSPOL0` reader - Chip select 0 polarity"] pub type CSPOL0_R = crate::BitReader; #[doc = "Field `CSPOL0` writer - Chip select 0 polarity"] -pub type CSPOL0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSPOL1` reader - Chip select 1 polarity"] pub type CSPOL1_R = crate::BitReader; #[doc = "Field `CSPOL1` writer - Chip select 1 polarity"] -pub type CSPOL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSPOL2` reader - Chip select 2 polarity"] pub type CSPOL2_R = crate::BitReader; #[doc = "Field `CSPOL2` writer - Chip select 2 polarity"] -pub type CSPOL2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_LEN` reader - Enable DMA in LoSSI mode"] pub type DMA_LEN_R = crate::BitReader; #[doc = "Field `DMA_LEN` writer - Enable DMA in LoSSI mode"] -pub type DMA_LEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_LEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN_LONG` reader - Enable long data word in LoSSI mode"] pub type LEN_LONG_R = crate::BitReader; #[doc = "Field `LEN_LONG` writer - Enable long data word in LoSSI mode"] -pub type LEN_LONG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN_LONG_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Chip select"] #[inline(always)] @@ -310,123 +310,123 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Chip select"] #[inline(always)] #[must_use] - pub fn cs(&mut self) -> CS_W { - CS_W::new(self) + pub fn cs(&mut self) -> CS_W { + CS_W::new(self, 0) } #[doc = "Bit 2 - Clock phase"] #[inline(always)] #[must_use] - pub fn cpha(&mut self) -> CPHA_W { - CPHA_W::new(self) + pub fn cpha(&mut self) -> CPHA_W { + CPHA_W::new(self, 2) } #[doc = "Bit 3 - Clock polarity"] #[inline(always)] #[must_use] - pub fn cpol(&mut self) -> CPOL_W { - CPOL_W::new(self) + pub fn cpol(&mut self) -> CPOL_W { + CPOL_W::new(self, 3) } #[doc = "Bits 4:5 - Clear the FIFO(s)"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W::new(self) + pub fn clear(&mut self) -> CLEAR_W { + CLEAR_W::new(self, 4) } #[doc = "Bit 6 - Chip select polarity"] #[inline(always)] #[must_use] - pub fn cspol(&mut self) -> CSPOL_W { - CSPOL_W::new(self) + pub fn cspol(&mut self) -> CSPOL_W { + CSPOL_W::new(self, 6) } #[doc = "Bit 7 - Transfer active"] #[inline(always)] #[must_use] - pub fn ta(&mut self) -> TA_W { - TA_W::new(self) + pub fn ta(&mut self) -> TA_W { + TA_W::new(self, 7) } #[doc = "Bit 8 - Enable DMA"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 8) } #[doc = "Bit 9 - Interrupt on done"] #[inline(always)] #[must_use] - pub fn intd(&mut self) -> INTD_W { - INTD_W::new(self) + pub fn intd(&mut self) -> INTD_W { + INTD_W::new(self, 9) } #[doc = "Bit 10 - Interrupt on RX"] #[inline(always)] #[must_use] - pub fn intr(&mut self) -> INTR_W { - INTR_W::new(self) + pub fn intr(&mut self) -> INTR_W { + INTR_W::new(self, 10) } #[doc = "Bit 11 - Automatically deassert chip select"] #[inline(always)] #[must_use] - pub fn adcs(&mut self) -> ADCS_W { - ADCS_W::new(self) + pub fn adcs(&mut self) -> ADCS_W { + ADCS_W::new(self, 11) } #[doc = "Bit 12 - Read enable"] #[inline(always)] #[must_use] - pub fn ren(&mut self) -> REN_W { - REN_W::new(self) + pub fn ren(&mut self) -> REN_W { + REN_W::new(self, 12) } #[doc = "Bit 13 - LoSSI enable"] #[inline(always)] #[must_use] - pub fn len(&mut self) -> LEN_W { - LEN_W::new(self) + pub fn len(&mut self) -> LEN_W { + LEN_W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] #[must_use] - pub fn lmono(&mut self) -> LMONO_W { - LMONO_W::new(self) + pub fn lmono(&mut self) -> LMONO_W { + LMONO_W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] #[must_use] - pub fn te_en(&mut self) -> TE_EN_W { - TE_EN_W::new(self) + pub fn te_en(&mut self) -> TE_EN_W { + TE_EN_W::new(self, 15) } #[doc = "Bit 21 - Chip select 0 polarity"] #[inline(always)] #[must_use] - pub fn cspol0(&mut self) -> CSPOL0_W { - CSPOL0_W::new(self) + pub fn cspol0(&mut self) -> CSPOL0_W { + CSPOL0_W::new(self, 21) } #[doc = "Bit 22 - Chip select 1 polarity"] #[inline(always)] #[must_use] - pub fn cspol1(&mut self) -> CSPOL1_W { - CSPOL1_W::new(self) + pub fn cspol1(&mut self) -> CSPOL1_W { + CSPOL1_W::new(self, 22) } #[doc = "Bit 23 - Chip select 2 polarity"] #[inline(always)] #[must_use] - pub fn cspol2(&mut self) -> CSPOL2_W { - CSPOL2_W::new(self) + pub fn cspol2(&mut self) -> CSPOL2_W { + CSPOL2_W::new(self, 23) } #[doc = "Bit 24 - Enable DMA in LoSSI mode"] #[inline(always)] #[must_use] - pub fn dma_len(&mut self) -> DMA_LEN_W { - DMA_LEN_W::new(self) + pub fn dma_len(&mut self) -> DMA_LEN_W { + DMA_LEN_W::new(self, 24) } #[doc = "Bit 25 - Enable long data word in LoSSI mode"] #[inline(always)] #[must_use] - pub fn len_long(&mut self) -> LEN_LONG_W { - LEN_LONG_W::new(self) + pub fn len_long(&mut self) -> LEN_LONG_W { + LEN_LONG_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi0/dc.rs b/crates/bcm2711-lpa/src/spi0/dc.rs index 23813da..a6b1267 100644 --- a/crates/bcm2711-lpa/src/spi0/dc.rs +++ b/crates/bcm2711-lpa/src/spi0/dc.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TDREQ` reader - DMA Write request threshold"] pub type TDREQ_R = crate::FieldReader; #[doc = "Field `TDREQ` writer - DMA Write request threshold"] -pub type TDREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TDREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TPANIC` reader - DMA write panic threshold"] pub type TPANIC_R = crate::FieldReader; #[doc = "Field `TPANIC` writer - DMA write panic threshold"] -pub type TPANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TPANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RDREQ` reader - DMA read request threshold"] pub type RDREQ_R = crate::FieldReader; #[doc = "Field `RDREQ` writer - DMA read request threshold"] -pub type RDREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RDREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RPANIC` reader - DMA read panic threshold"] pub type RPANIC_R = crate::FieldReader; #[doc = "Field `RPANIC` writer - DMA read panic threshold"] -pub type RPANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RPANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Write request threshold"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA Write request threshold"] #[inline(always)] #[must_use] - pub fn tdreq(&mut self) -> TDREQ_W { - TDREQ_W::new(self) + pub fn tdreq(&mut self) -> TDREQ_W { + TDREQ_W::new(self, 0) } #[doc = "Bits 8:15 - DMA write panic threshold"] #[inline(always)] #[must_use] - pub fn tpanic(&mut self) -> TPANIC_W { - TPANIC_W::new(self) + pub fn tpanic(&mut self) -> TPANIC_W { + TPANIC_W::new(self, 8) } #[doc = "Bits 16:23 - DMA read request threshold"] #[inline(always)] #[must_use] - pub fn rdreq(&mut self) -> RDREQ_W { - RDREQ_W::new(self) + pub fn rdreq(&mut self) -> RDREQ_W { + RDREQ_W::new(self, 16) } #[doc = "Bits 24:31 - DMA read panic threshold"] #[inline(always)] #[must_use] - pub fn rpanic(&mut self) -> RPANIC_W { - RPANIC_W::new(self) + pub fn rpanic(&mut self) -> RPANIC_W { + RPANIC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi0/dlen.rs b/crates/bcm2711-lpa/src/spi0/dlen.rs index 5c7bb83..c86b386 100644 --- a/crates/bcm2711-lpa/src/spi0/dlen.rs +++ b/crates/bcm2711-lpa/src/spi0/dlen.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DLEN` reader - Data length"] pub type DLEN_R = crate::FieldReader; #[doc = "Field `DLEN` writer - Data length"] -pub type DLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Data length"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Data length"] #[inline(always)] #[must_use] - pub fn dlen(&mut self) -> DLEN_W { - DLEN_W::new(self) + pub fn dlen(&mut self) -> DLEN_W { + DLEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi0/fifo.rs b/crates/bcm2711-lpa/src/spi0/fifo.rs index 937c27b..e85c975 100644 --- a/crates/bcm2711-lpa/src/spi0/fifo.rs +++ b/crates/bcm2711-lpa/src/spi0/fifo.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi0/ltoh.rs b/crates/bcm2711-lpa/src/spi0/ltoh.rs index 15d66d8..b968dfa 100644 --- a/crates/bcm2711-lpa/src/spi0/ltoh.rs +++ b/crates/bcm2711-lpa/src/spi0/ltoh.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOH` reader - Output hold delay"] pub type TOH_R = crate::FieldReader; #[doc = "Field `TOH` writer - Output hold delay"] -pub type TOH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TOH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Output hold delay"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:3 - Output hold delay"] #[inline(always)] #[must_use] - pub fn toh(&mut self) -> TOH_W { - TOH_W::new(self) + pub fn toh(&mut self) -> TOH_W { + TOH_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi1.rs b/crates/bcm2711-lpa/src/spi1.rs index 0031aa9..2dab98b 100644 --- a/crates/bcm2711-lpa/src/spi1.rs +++ b/crates/bcm2711-lpa/src/spi1.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cntl0: CNTL0, + cntl1: CNTL1, + stat: STAT, + peek: PEEK, + io: [IO; 4], + txhold: [TXHOLD; 4], +} +impl RegisterBlock { #[doc = "0x00 - Control 0"] - pub cntl0: CNTL0, + #[inline(always)] + pub const fn cntl0(&self) -> &CNTL0 { + &self.cntl0 + } #[doc = "0x04 - Control 1"] - pub cntl1: CNTL1, + #[inline(always)] + pub const fn cntl1(&self) -> &CNTL1 { + &self.cntl1 + } #[doc = "0x08 - Status"] - pub stat: STAT, + #[inline(always)] + pub const fn stat(&self) -> &STAT { + &self.stat + } #[doc = "0x0c - Read the RXFIFO without removing an entry"] - pub peek: PEEK, + #[inline(always)] + pub const fn peek(&self) -> &PEEK { + &self.peek + } #[doc = "0x10..0x20 - Writing to the FIFO will deassert CS at the end of the access"] - pub io: [IO; 4], + #[inline(always)] + pub const fn io(&self, n: usize) -> &IO { + &self.io[n] + } #[doc = "0x20..0x30 - Writing to the FIFO will maintain CS at the end of the access"] - pub txhold: [TXHOLD; 4], + #[inline(always)] + pub const fn txhold(&self, n: usize) -> &TXHOLD { + &self.txhold[n] + } } #[doc = "CNTL0 (rw) register accessor: Control 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cntl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cntl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cntl0`] module"] diff --git a/crates/bcm2711-lpa/src/spi1/cntl0.rs b/crates/bcm2711-lpa/src/spi1/cntl0.rs index df7d957..451bebc 100644 --- a/crates/bcm2711-lpa/src/spi1/cntl0.rs +++ b/crates/bcm2711-lpa/src/spi1/cntl0.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `SHIFT_LENGTH` reader - Number of bits to shift"] pub type SHIFT_LENGTH_R = crate::FieldReader; #[doc = "Field `SHIFT_LENGTH` writer - Number of bits to shift"] -pub type SHIFT_LENGTH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type SHIFT_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MSB_FIRST` reader - Shift out the most significant bit (MSB) first"] pub type MSB_FIRST_R = crate::BitReader; #[doc = "Field `MSB_FIRST` writer - Shift out the most significant bit (MSB) first"] -pub type MSB_FIRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSB_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INVERT_CLK` reader - Idle clock high"] pub type INVERT_CLK_R = crate::BitReader; #[doc = "Field `INVERT_CLK` writer - Idle clock high"] -pub type INVERT_CLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INVERT_CLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT_RISING` reader - Data is clocked out on rising edge of CLK"] pub type OUT_RISING_R = crate::BitReader; #[doc = "Field `OUT_RISING` writer - Data is clocked out on rising edge of CLK"] -pub type OUT_RISING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OUT_RISING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR_FIFOS` reader - Clear FIFOs"] pub type CLEAR_FIFOS_R = crate::BitReader; #[doc = "Field `CLEAR_FIFOS` writer - Clear FIFOs"] -pub type CLEAR_FIFOS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLEAR_FIFOS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IN_RISING` reader - Data is clocked in on rising edge of CLK"] pub type IN_RISING_R = crate::BitReader; #[doc = "Field `IN_RISING` writer - Data is clocked in on rising edge of CLK"] -pub type IN_RISING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IN_RISING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE` reader - Enable the interface"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable the interface"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOUT_HOLD_TIME` reader - Controls extra DOUT hold time in system clock cycles"] pub type DOUT_HOLD_TIME_R = crate::FieldReader; #[doc = "Controls extra DOUT hold time in system clock cycles\n\nValue on reset: 0"] @@ -88,9 +88,8 @@ impl DOUT_HOLD_TIME_R { } } #[doc = "Field `DOUT_HOLD_TIME` writer - Controls extra DOUT hold time in system clock cycles"] -pub type DOUT_HOLD_TIME_W<'a, REG, const O: u8> = - crate::FieldWriterSafe<'a, REG, 2, O, DOUT_HOLD_TIME_A>; -impl<'a, REG, const O: u8> DOUT_HOLD_TIME_W<'a, REG, O> +pub type DOUT_HOLD_TIME_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DOUT_HOLD_TIME_A>; +impl<'a, REG> DOUT_HOLD_TIME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -119,23 +118,23 @@ where #[doc = "Field `VARIABLE_WIDTH` reader - Take shift length and data from FIFO"] pub type VARIABLE_WIDTH_R = crate::BitReader; #[doc = "Field `VARIABLE_WIDTH` writer - Take shift length and data from FIFO"] -pub type VARIABLE_WIDTH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VARIABLE_WIDTH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VARIABLE_CS` reader - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] pub type VARIABLE_CS_R = crate::BitReader; #[doc = "Field `VARIABLE_CS` writer - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] -pub type VARIABLE_CS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VARIABLE_CS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POST_INPUT` reader - Post input mode"] pub type POST_INPUT_R = crate::BitReader; #[doc = "Field `POST_INPUT` writer - Post input mode"] -pub type POST_INPUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POST_INPUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIP_SELECTS` reader - The CS pattern when active"] pub type CHIP_SELECTS_R = crate::FieldReader; #[doc = "Field `CHIP_SELECTS` writer - The CS pattern when active"] -pub type CHIP_SELECTS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CHIP_SELECTS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SPEED` reader - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] pub type SPEED_R = crate::FieldReader; #[doc = "Field `SPEED` writer - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] -pub type SPEED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type SPEED_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:5 - Number of bits to shift"] #[inline(always)] @@ -236,87 +235,87 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - Number of bits to shift"] #[inline(always)] #[must_use] - pub fn shift_length(&mut self) -> SHIFT_LENGTH_W { - SHIFT_LENGTH_W::new(self) + pub fn shift_length(&mut self) -> SHIFT_LENGTH_W { + SHIFT_LENGTH_W::new(self, 0) } #[doc = "Bit 6 - Shift out the most significant bit (MSB) first"] #[inline(always)] #[must_use] - pub fn msb_first(&mut self) -> MSB_FIRST_W { - MSB_FIRST_W::new(self) + pub fn msb_first(&mut self) -> MSB_FIRST_W { + MSB_FIRST_W::new(self, 6) } #[doc = "Bit 7 - Idle clock high"] #[inline(always)] #[must_use] - pub fn invert_clk(&mut self) -> INVERT_CLK_W { - INVERT_CLK_W::new(self) + pub fn invert_clk(&mut self) -> INVERT_CLK_W { + INVERT_CLK_W::new(self, 7) } #[doc = "Bit 8 - Data is clocked out on rising edge of CLK"] #[inline(always)] #[must_use] - pub fn out_rising(&mut self) -> OUT_RISING_W { - OUT_RISING_W::new(self) + pub fn out_rising(&mut self) -> OUT_RISING_W { + OUT_RISING_W::new(self, 8) } #[doc = "Bit 9 - Clear FIFOs"] #[inline(always)] #[must_use] - pub fn clear_fifos(&mut self) -> CLEAR_FIFOS_W { - CLEAR_FIFOS_W::new(self) + pub fn clear_fifos(&mut self) -> CLEAR_FIFOS_W { + CLEAR_FIFOS_W::new(self, 9) } #[doc = "Bit 10 - Data is clocked in on rising edge of CLK"] #[inline(always)] #[must_use] - pub fn in_rising(&mut self) -> IN_RISING_W { - IN_RISING_W::new(self) + pub fn in_rising(&mut self) -> IN_RISING_W { + IN_RISING_W::new(self, 10) } #[doc = "Bit 11 - Enable the interface"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 11) } #[doc = "Bits 12:13 - Controls extra DOUT hold time in system clock cycles"] #[inline(always)] #[must_use] - pub fn dout_hold_time(&mut self) -> DOUT_HOLD_TIME_W { - DOUT_HOLD_TIME_W::new(self) + pub fn dout_hold_time(&mut self) -> DOUT_HOLD_TIME_W { + DOUT_HOLD_TIME_W::new(self, 12) } #[doc = "Bit 14 - Take shift length and data from FIFO"] #[inline(always)] #[must_use] - pub fn variable_width(&mut self) -> VARIABLE_WIDTH_W { - VARIABLE_WIDTH_W::new(self) + pub fn variable_width(&mut self) -> VARIABLE_WIDTH_W { + VARIABLE_WIDTH_W::new(self, 14) } #[doc = "Bit 15 - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] #[inline(always)] #[must_use] - pub fn variable_cs(&mut self) -> VARIABLE_CS_W { - VARIABLE_CS_W::new(self) + pub fn variable_cs(&mut self) -> VARIABLE_CS_W { + VARIABLE_CS_W::new(self, 15) } #[doc = "Bit 16 - Post input mode"] #[inline(always)] #[must_use] - pub fn post_input(&mut self) -> POST_INPUT_W { - POST_INPUT_W::new(self) + pub fn post_input(&mut self) -> POST_INPUT_W { + POST_INPUT_W::new(self, 16) } #[doc = "Bits 17:19 - The CS pattern when active"] #[inline(always)] #[must_use] - pub fn chip_selects(&mut self) -> CHIP_SELECTS_W { - CHIP_SELECTS_W::new(self) + pub fn chip_selects(&mut self) -> CHIP_SELECTS_W { + CHIP_SELECTS_W::new(self, 17) } #[doc = "Bits 20:31 - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] #[inline(always)] #[must_use] - pub fn speed(&mut self) -> SPEED_W { - SPEED_W::new(self) + pub fn speed(&mut self) -> SPEED_W { + SPEED_W::new(self, 20) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi1/cntl1.rs b/crates/bcm2711-lpa/src/spi1/cntl1.rs index c1f0228..651e5d8 100644 --- a/crates/bcm2711-lpa/src/spi1/cntl1.rs +++ b/crates/bcm2711-lpa/src/spi1/cntl1.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `KEEP_INPUT` reader - Don't clear the RX shift register before a new transaction"] pub type KEEP_INPUT_R = crate::BitReader; #[doc = "Field `KEEP_INPUT` writer - Don't clear the RX shift register before a new transaction"] -pub type KEEP_INPUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type KEEP_INPUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSB_FIRST` reader - Shift the most significant bit first (MSB)"] pub type MSB_FIRST_R = crate::BitReader; #[doc = "Field `MSB_FIRST` writer - Shift the most significant bit first (MSB)"] -pub type MSB_FIRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSB_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE_ENABLE` reader - Enable DONE interrupt"] pub type DONE_ENABLE_R = crate::BitReader; #[doc = "Field `DONE_ENABLE` writer - Enable DONE interrupt"] -pub type DONE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DONE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXE_ENABLE` reader - Enable TX empty interrupt"] pub type TXE_ENABLE_R = crate::BitReader; #[doc = "Field `TXE_ENABLE` writer - Enable TX empty interrupt"] -pub type TXE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS_HIGH_TIME` reader - Additional SPI clock cycles where CS is high"] pub type CS_HIGH_TIME_R = crate::FieldReader; #[doc = "Field `CS_HIGH_TIME` writer - Additional SPI clock cycles where CS is high"] -pub type CS_HIGH_TIME_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CS_HIGH_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Don't clear the RX shift register before a new transaction"] #[inline(always)] @@ -65,39 +65,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Don't clear the RX shift register before a new transaction"] #[inline(always)] #[must_use] - pub fn keep_input(&mut self) -> KEEP_INPUT_W { - KEEP_INPUT_W::new(self) + pub fn keep_input(&mut self) -> KEEP_INPUT_W { + KEEP_INPUT_W::new(self, 0) } #[doc = "Bit 1 - Shift the most significant bit first (MSB)"] #[inline(always)] #[must_use] - pub fn msb_first(&mut self) -> MSB_FIRST_W { - MSB_FIRST_W::new(self) + pub fn msb_first(&mut self) -> MSB_FIRST_W { + MSB_FIRST_W::new(self, 1) } #[doc = "Bit 6 - Enable DONE interrupt"] #[inline(always)] #[must_use] - pub fn done_enable(&mut self) -> DONE_ENABLE_W { - DONE_ENABLE_W::new(self) + pub fn done_enable(&mut self) -> DONE_ENABLE_W { + DONE_ENABLE_W::new(self, 6) } #[doc = "Bit 7 - Enable TX empty interrupt"] #[inline(always)] #[must_use] - pub fn txe_enable(&mut self) -> TXE_ENABLE_W { - TXE_ENABLE_W::new(self) + pub fn txe_enable(&mut self) -> TXE_ENABLE_W { + TXE_ENABLE_W::new(self, 7) } #[doc = "Bits 8:10 - Additional SPI clock cycles where CS is high"] #[inline(always)] #[must_use] - pub fn cs_high_time(&mut self) -> CS_HIGH_TIME_W { - CS_HIGH_TIME_W::new(self) + pub fn cs_high_time(&mut self) -> CS_HIGH_TIME_W { + CS_HIGH_TIME_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi1/io.rs b/crates/bcm2711-lpa/src/spi1/io.rs index 6564875..684bdc3 100644 --- a/crates/bcm2711-lpa/src/spi1/io.rs +++ b/crates/bcm2711-lpa/src/spi1/io.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO data access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO data access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi1/peek.rs b/crates/bcm2711-lpa/src/spi1/peek.rs index 7ceeb4a..5de5289 100644 --- a/crates/bcm2711-lpa/src/spi1/peek.rs +++ b/crates/bcm2711-lpa/src/spi1/peek.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Read the RXFIFO without removing an entry\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/spi1/stat.rs b/crates/bcm2711-lpa/src/spi1/stat.rs index 9fe3977..ae962a9 100644 --- a/crates/bcm2711-lpa/src/spi1/stat.rs +++ b/crates/bcm2711-lpa/src/spi1/stat.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `BIT_COUNT` reader - Number of bits left to be processed."] pub type BIT_COUNT_R = crate::FieldReader; #[doc = "Field `BIT_COUNT` writer - Number of bits left to be processed."] -pub type BIT_COUNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type BIT_COUNT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `BUSY` reader - Indicates a transfer is ongoing"] pub type BUSY_R = crate::BitReader; #[doc = "Field `BUSY` writer - Indicates a transfer is ongoing"] -pub type BUSY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUSY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_EMPTY` reader - RX FIFO is empty"] pub type RX_EMPTY_R = crate::BitReader; #[doc = "Field `RX_EMPTY` writer - RX FIFO is empty"] -pub type RX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_FULL` reader - RX FIFO is full"] pub type RX_FULL_R = crate::BitReader; #[doc = "Field `RX_FULL` writer - RX FIFO is full"] -pub type RX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - TX FIFO is empty"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - TX FIFO is empty"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_FULL` reader - TX FIFO is full"] pub type TX_FULL_R = crate::BitReader; #[doc = "Field `TX_FULL` writer - TX FIFO is full"] -pub type TX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_LEVEL` reader - Number of entries in RX FIFO"] pub type RX_LEVEL_R = crate::FieldReader; #[doc = "Field `RX_LEVEL` writer - Number of entries in RX FIFO"] -pub type RX_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type RX_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TX_LEVEL` reader - Number of entries in TX FIFO"] pub type TX_LEVEL_R = crate::FieldReader; #[doc = "Field `TX_LEVEL` writer - Number of entries in TX FIFO"] -pub type TX_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TX_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:5 - Number of bits left to be processed."] #[inline(always)] @@ -92,57 +92,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - Number of bits left to be processed."] #[inline(always)] #[must_use] - pub fn bit_count(&mut self) -> BIT_COUNT_W { - BIT_COUNT_W::new(self) + pub fn bit_count(&mut self) -> BIT_COUNT_W { + BIT_COUNT_W::new(self, 0) } #[doc = "Bit 6 - Indicates a transfer is ongoing"] #[inline(always)] #[must_use] - pub fn busy(&mut self) -> BUSY_W { - BUSY_W::new(self) + pub fn busy(&mut self) -> BUSY_W { + BUSY_W::new(self, 6) } #[doc = "Bit 7 - RX FIFO is empty"] #[inline(always)] #[must_use] - pub fn rx_empty(&mut self) -> RX_EMPTY_W { - RX_EMPTY_W::new(self) + pub fn rx_empty(&mut self) -> RX_EMPTY_W { + RX_EMPTY_W::new(self, 7) } #[doc = "Bit 8 - RX FIFO is full"] #[inline(always)] #[must_use] - pub fn rx_full(&mut self) -> RX_FULL_W { - RX_FULL_W::new(self) + pub fn rx_full(&mut self) -> RX_FULL_W { + RX_FULL_W::new(self, 8) } #[doc = "Bit 9 - TX FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 9) } #[doc = "Bit 10 - TX FIFO is full"] #[inline(always)] #[must_use] - pub fn tx_full(&mut self) -> TX_FULL_W { - TX_FULL_W::new(self) + pub fn tx_full(&mut self) -> TX_FULL_W { + TX_FULL_W::new(self, 10) } #[doc = "Bits 16:19 - Number of entries in RX FIFO"] #[inline(always)] #[must_use] - pub fn rx_level(&mut self) -> RX_LEVEL_W { - RX_LEVEL_W::new(self) + pub fn rx_level(&mut self) -> RX_LEVEL_W { + RX_LEVEL_W::new(self, 16) } #[doc = "Bits 24:27 - Number of entries in TX FIFO"] #[inline(always)] #[must_use] - pub fn tx_level(&mut self) -> TX_LEVEL_W { - TX_LEVEL_W::new(self) + pub fn tx_level(&mut self) -> TX_LEVEL_W { + TX_LEVEL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/spi1/txhold.rs b/crates/bcm2711-lpa/src/spi1/txhold.rs index 8c29938..7150eb6 100644 --- a/crates/bcm2711-lpa/src/spi1/txhold.rs +++ b/crates/bcm2711-lpa/src/spi1/txhold.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO data access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO data access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/systmr.rs b/crates/bcm2711-lpa/src/systmr.rs index 31647d3..eb65cff 100644 --- a/crates/bcm2711-lpa/src/systmr.rs +++ b/crates/bcm2711-lpa/src/systmr.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + clo: CLO, + chi: CHI, + c0: C0, + c1: C1, + c2: C2, + c3: C3, +} +impl RegisterBlock { #[doc = "0x00 - Control / Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - Lower 32 bits for the free running counter"] - pub clo: CLO, + #[inline(always)] + pub const fn clo(&self) -> &CLO { + &self.clo + } #[doc = "0x08 - Higher 32 bits for the free running counter"] - pub chi: CHI, + #[inline(always)] + pub const fn chi(&self) -> &CHI { + &self.chi + } #[doc = "0x0c - Compare channel 0"] - pub c0: C0, + #[inline(always)] + pub const fn c0(&self) -> &C0 { + &self.c0 + } #[doc = "0x10 - Compare channel 1"] - pub c1: C1, + #[inline(always)] + pub const fn c1(&self) -> &C1 { + &self.c1 + } #[doc = "0x14 - Compare channel 2"] - pub c2: C2, + #[inline(always)] + pub const fn c2(&self) -> &C2 { + &self.c2 + } #[doc = "0x18 - Compare channel 3"] - pub c3: C3, + #[inline(always)] + pub const fn c3(&self) -> &C3 { + &self.c3 + } } #[doc = "CS (rw) register accessor: Control / Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2711-lpa/src/systmr/c0.rs b/crates/bcm2711-lpa/src/systmr/c0.rs index 18be8a7..9ab12b6 100644 --- a/crates/bcm2711-lpa/src/systmr/c0.rs +++ b/crates/bcm2711-lpa/src/systmr/c0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/systmr/c1.rs b/crates/bcm2711-lpa/src/systmr/c1.rs index bcf565c..166b9b1 100644 --- a/crates/bcm2711-lpa/src/systmr/c1.rs +++ b/crates/bcm2711-lpa/src/systmr/c1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/systmr/c2.rs b/crates/bcm2711-lpa/src/systmr/c2.rs index e91e152..5e445b8 100644 --- a/crates/bcm2711-lpa/src/systmr/c2.rs +++ b/crates/bcm2711-lpa/src/systmr/c2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/systmr/c3.rs b/crates/bcm2711-lpa/src/systmr/c3.rs index a33918f..92faaa4 100644 --- a/crates/bcm2711-lpa/src/systmr/c3.rs +++ b/crates/bcm2711-lpa/src/systmr/c3.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/systmr/chi.rs b/crates/bcm2711-lpa/src/systmr/chi.rs index 7313db2..54d6e6b 100644 --- a/crates/bcm2711-lpa/src/systmr/chi.rs +++ b/crates/bcm2711-lpa/src/systmr/chi.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Higher 32 bits for the free running counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/systmr/clo.rs b/crates/bcm2711-lpa/src/systmr/clo.rs index 43986b1..145765a 100644 --- a/crates/bcm2711-lpa/src/systmr/clo.rs +++ b/crates/bcm2711-lpa/src/systmr/clo.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Lower 32 bits for the free running counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/systmr/cs.rs b/crates/bcm2711-lpa/src/systmr/cs.rs index 3e1660d..1e3978b 100644 --- a/crates/bcm2711-lpa/src/systmr/cs.rs +++ b/crates/bcm2711-lpa/src/systmr/cs.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `M0` reader - System timer match 0"] pub type M0_R = crate::BitReader; #[doc = "Field `M0` writer - System timer match 0"] -pub type M0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M1` reader - System timer match 1"] pub type M1_R = crate::BitReader; #[doc = "Field `M1` writer - System timer match 1"] -pub type M1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M2` reader - System timer match 2"] pub type M2_R = crate::BitReader; #[doc = "Field `M2` writer - System timer match 2"] -pub type M2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M3` reader - System timer match 3"] pub type M3_R = crate::BitReader; #[doc = "Field `M3` writer - System timer match 3"] -pub type M3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M3_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - System timer match 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - System timer match 0"] #[inline(always)] #[must_use] - pub fn m0(&mut self) -> M0_W { - M0_W::new(self) + pub fn m0(&mut self) -> M0_W { + M0_W::new(self, 0) } #[doc = "Bit 1 - System timer match 1"] #[inline(always)] #[must_use] - pub fn m1(&mut self) -> M1_W { - M1_W::new(self) + pub fn m1(&mut self) -> M1_W { + M1_W::new(self, 1) } #[doc = "Bit 2 - System timer match 2"] #[inline(always)] #[must_use] - pub fn m2(&mut self) -> M2_W { - M2_W::new(self) + pub fn m2(&mut self) -> M2_W { + M2_W::new(self, 2) } #[doc = "Bit 3 - System timer match 3"] #[inline(always)] #[must_use] - pub fn m3(&mut self) -> M3_W { - M3_W::new(self) + pub fn m3(&mut self) -> M3_W { + M3_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0.rs b/crates/bcm2711-lpa/src/uart0.rs index a12a501..c46032b 100644 --- a/crates/bcm2711-lpa/src/uart0.rs +++ b/crates/bcm2711-lpa/src/uart0.rs @@ -2,44 +2,92 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - Data Register"] - pub dr: DR, + dr: DR, _reserved_1_ecr: [u8; 0x04], _reserved2: [u8; 0x10], - #[doc = "0x18 - Flag Register"] - pub fr: FR, + fr: FR, _reserved3: [u8; 0x08], + ibrd: IBRD, + fbrd: FBRD, + lcr_h: LCR_H, + cr: CR, + ifls: IFLS, + imsc: IMSC, + ris: RIS, + mis: MIS, + icr: ICR, + dmacr: DMACR, +} +impl RegisterBlock { + #[doc = "0x00 - Data Register"] + #[inline(always)] + pub const fn dr(&self) -> &DR { + &self.dr + } + #[doc = "0x04 - Error Clear Register"] + #[inline(always)] + pub const fn ecr(&self) -> &ECR { + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x04 - Receive Status Register"] + #[inline(always)] + pub const fn rsr(&self) -> &RSR { + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x18 - Flag Register"] + #[inline(always)] + pub const fn fr(&self) -> &FR { + &self.fr + } #[doc = "0x24 - Integer Baud Rate Register"] - pub ibrd: IBRD, + #[inline(always)] + pub const fn ibrd(&self) -> &IBRD { + &self.ibrd + } #[doc = "0x28 - Fractional Baud Rate Register"] - pub fbrd: FBRD, + #[inline(always)] + pub const fn fbrd(&self) -> &FBRD { + &self.fbrd + } #[doc = "0x2c - Line Control Register"] - pub lcr_h: LCR_H, + #[inline(always)] + pub const fn lcr_h(&self) -> &LCR_H { + &self.lcr_h + } #[doc = "0x30 - Control Register"] - pub cr: CR, + #[inline(always)] + pub const fn cr(&self) -> &CR { + &self.cr + } #[doc = "0x34 - Interrupt FIFO Level Select Register"] - pub ifls: IFLS, + #[inline(always)] + pub const fn ifls(&self) -> &IFLS { + &self.ifls + } #[doc = "0x38 - Interrupt Mask set_Clear Register"] - pub imsc: IMSC, + #[inline(always)] + pub const fn imsc(&self) -> &IMSC { + &self.imsc + } #[doc = "0x3c - Raw Interrupt Status Register"] - pub ris: RIS, + #[inline(always)] + pub const fn ris(&self) -> &RIS { + &self.ris + } #[doc = "0x40 - Masked Interrupt Status Register"] - pub mis: MIS, + #[inline(always)] + pub const fn mis(&self) -> &MIS { + &self.mis + } #[doc = "0x44 - Interrupt Clear Register"] - pub icr: ICR, - #[doc = "0x48 - DMA Control Register"] - pub dmacr: DMACR, -} -impl RegisterBlock { - #[doc = "0x04 - Error Clear Register"] #[inline(always)] - pub const fn ecr(&self) -> &ECR { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + pub const fn icr(&self) -> &ICR { + &self.icr } - #[doc = "0x04 - Receive Status Register"] + #[doc = "0x48 - DMA Control Register"] #[inline(always)] - pub const fn rsr(&self) -> &RSR { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + pub const fn dmacr(&self) -> &DMACR { + &self.dmacr } } #[doc = "DR (rw) register accessor: Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dr`] diff --git a/crates/bcm2711-lpa/src/uart0/cr.rs b/crates/bcm2711-lpa/src/uart0/cr.rs index bfbc283..bf3ad6e 100644 --- a/crates/bcm2711-lpa/src/uart0/cr.rs +++ b/crates/bcm2711-lpa/src/uart0/cr.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `UARTEN` reader - UARTEN"] pub type UARTEN_R = crate::BitReader; #[doc = "Field `UARTEN` writer - UARTEN"] -pub type UARTEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UARTEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIREN` reader - SIREN"] pub type SIREN_R = crate::BitReader; #[doc = "Field `SIREN` writer - SIREN"] -pub type SIREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SIREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIRLP` reader - SIRLP"] pub type SIRLP_R = crate::BitReader; #[doc = "Field `SIRLP` writer - SIRLP"] -pub type SIRLP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SIRLP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXE` reader - TXE"] pub type TXE_R = crate::BitReader; #[doc = "Field `TXE` writer - TXE"] -pub type TXE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXE` reader - RXE"] pub type RXE_R = crate::BitReader; #[doc = "Field `RXE` writer - RXE"] -pub type RXE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTR` reader - DTR"] pub type DTR_R = crate::BitReader; #[doc = "Field `DTR` writer - DTR"] -pub type DTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS` reader - RTS"] pub type RTS_R = crate::BitReader; #[doc = "Field `RTS` writer - RTS"] -pub type RTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSEN` reader - RTSEN"] pub type RTSEN_R = crate::BitReader; #[doc = "Field `RTSEN` writer - RTSEN"] -pub type RTSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTSEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSEN` reader - CTSEN"] pub type CTSEN_R = crate::BitReader; #[doc = "Field `CTSEN` writer - CTSEN"] -pub type CTSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UARTEN"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UARTEN"] #[inline(always)] #[must_use] - pub fn uarten(&mut self) -> UARTEN_W { - UARTEN_W::new(self) + pub fn uarten(&mut self) -> UARTEN_W { + UARTEN_W::new(self, 0) } #[doc = "Bit 1 - SIREN"] #[inline(always)] #[must_use] - pub fn siren(&mut self) -> SIREN_W { - SIREN_W::new(self) + pub fn siren(&mut self) -> SIREN_W { + SIREN_W::new(self, 1) } #[doc = "Bit 2 - SIRLP"] #[inline(always)] #[must_use] - pub fn sirlp(&mut self) -> SIRLP_W { - SIRLP_W::new(self) + pub fn sirlp(&mut self) -> SIRLP_W { + SIRLP_W::new(self, 2) } #[doc = "Bit 8 - TXE"] #[inline(always)] #[must_use] - pub fn txe(&mut self) -> TXE_W { - TXE_W::new(self) + pub fn txe(&mut self) -> TXE_W { + TXE_W::new(self, 8) } #[doc = "Bit 9 - RXE"] #[inline(always)] #[must_use] - pub fn rxe(&mut self) -> RXE_W { - RXE_W::new(self) + pub fn rxe(&mut self) -> RXE_W { + RXE_W::new(self, 9) } #[doc = "Bit 10 - DTR"] #[inline(always)] #[must_use] - pub fn dtr(&mut self) -> DTR_W { - DTR_W::new(self) + pub fn dtr(&mut self) -> DTR_W { + DTR_W::new(self, 10) } #[doc = "Bit 11 - RTS"] #[inline(always)] #[must_use] - pub fn rts(&mut self) -> RTS_W { - RTS_W::new(self) + pub fn rts(&mut self) -> RTS_W { + RTS_W::new(self, 11) } #[doc = "Bit 14 - RTSEN"] #[inline(always)] #[must_use] - pub fn rtsen(&mut self) -> RTSEN_W { - RTSEN_W::new(self) + pub fn rtsen(&mut self) -> RTSEN_W { + RTSEN_W::new(self, 14) } #[doc = "Bit 15 - CTSEN"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CTSEN_W { + CTSEN_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/dmacr.rs b/crates/bcm2711-lpa/src/uart0/dmacr.rs index 40efa50..dcdcd2e 100644 --- a/crates/bcm2711-lpa/src/uart0/dmacr.rs +++ b/crates/bcm2711-lpa/src/uart0/dmacr.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `RXDMAE` reader - RXDMAE"] pub type RXDMAE_R = crate::BitReader; #[doc = "Field `RXDMAE` writer - RXDMAE"] -pub type RXDMAE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDMAE` reader - TXDMAE"] pub type TXDMAE_R = crate::BitReader; #[doc = "Field `TXDMAE` writer - TXDMAE"] -pub type TXDMAE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAONERR` reader - DMAONERR"] pub type DMAONERR_R = crate::BitReader; #[doc = "Field `DMAONERR` writer - DMAONERR"] -pub type DMAONERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAONERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RXDMAE"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - RXDMAE"] #[inline(always)] #[must_use] - pub fn rxdmae(&mut self) -> RXDMAE_W { - RXDMAE_W::new(self) + pub fn rxdmae(&mut self) -> RXDMAE_W { + RXDMAE_W::new(self, 0) } #[doc = "Bit 1 - TXDMAE"] #[inline(always)] #[must_use] - pub fn txdmae(&mut self) -> TXDMAE_W { - TXDMAE_W::new(self) + pub fn txdmae(&mut self) -> TXDMAE_W { + TXDMAE_W::new(self, 1) } #[doc = "Bit 2 - DMAONERR"] #[inline(always)] #[must_use] - pub fn dmaonerr(&mut self) -> DMAONERR_W { - DMAONERR_W::new(self) + pub fn dmaonerr(&mut self) -> DMAONERR_W { + DMAONERR_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/dr.rs b/crates/bcm2711-lpa/src/uart0/dr.rs index 3c7f81e..6ac1b23 100644 --- a/crates/bcm2711-lpa/src/uart0/dr.rs +++ b/crates/bcm2711-lpa/src/uart0/dr.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - DATA"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - DATA"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `FE` reader - FE"] pub type FE_R = crate::BitReader; #[doc = "Field `FE` writer - FE"] -pub type FE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PE` reader - PE"] pub type PE_R = crate::BitReader; #[doc = "Field `PE` writer - PE"] -pub type PE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` reader - BE"] pub type BE_R = crate::BitReader; #[doc = "Field `BE` writer - BE"] -pub type BE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OE` reader - OE"] pub type OE_R = crate::BitReader; #[doc = "Field `OE` writer - OE"] -pub type OE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - DATA"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DATA"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = "Bit 8 - FE"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 8) } #[doc = "Bit 9 - PE"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 9) } #[doc = "Bit 10 - BE"] #[inline(always)] #[must_use] - pub fn be(&mut self) -> BE_W { - BE_W::new(self) + pub fn be(&mut self) -> BE_W { + BE_W::new(self, 10) } #[doc = "Bit 11 - OE"] #[inline(always)] #[must_use] - pub fn oe(&mut self) -> OE_W { - OE_W::new(self) + pub fn oe(&mut self) -> OE_W { + OE_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/ecr.rs b/crates/bcm2711-lpa/src/uart0/ecr.rs index 97efb0b..a17d921 100644 --- a/crates/bcm2711-lpa/src/uart0/ecr.rs +++ b/crates/bcm2711-lpa/src/uart0/ecr.rs @@ -1,13 +1,13 @@ #[doc = "Register `ECR` writer"] pub type W = crate::W; #[doc = "Field `FE` writer - FE"] -pub type FE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PE` writer - PE"] -pub type PE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` writer - BE"] -pub type BE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OE` writer - OE"] -pub type OE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OE_W<'a, REG> = crate::BitWriter<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -17,26 +17,26 @@ impl W { #[doc = "Bit 0 - FE"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 0) } #[doc = "Bit 1 - PE"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 1) } #[doc = "Bit 2 - BE"] #[inline(always)] #[must_use] - pub fn be(&mut self) -> BE_W { - BE_W::new(self) + pub fn be(&mut self) -> BE_W { + BE_W::new(self, 2) } #[doc = "Bit 3 - OE"] #[inline(always)] #[must_use] - pub fn oe(&mut self) -> OE_W { - OE_W::new(self) + pub fn oe(&mut self) -> OE_W { + OE_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/fbrd.rs b/crates/bcm2711-lpa/src/uart0/fbrd.rs index e0fe228..12a11b7 100644 --- a/crates/bcm2711-lpa/src/uart0/fbrd.rs +++ b/crates/bcm2711-lpa/src/uart0/fbrd.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BAUDDIVFRAC` reader - BAUDDIVFRAC"] pub type BAUDDIVFRAC_R = crate::FieldReader; #[doc = "Field `BAUDDIVFRAC` writer - BAUDDIVFRAC"] -pub type BAUDDIVFRAC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type BAUDDIVFRAC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - BAUDDIVFRAC"] #[inline(always)] @@ -25,15 +25,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - BAUDDIVFRAC"] #[inline(always)] #[must_use] - pub fn bauddivfrac(&mut self) -> BAUDDIVFRAC_W { - BAUDDIVFRAC_W::new(self) + pub fn bauddivfrac(&mut self) -> BAUDDIVFRAC_W { + BAUDDIVFRAC_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/fr.rs b/crates/bcm2711-lpa/src/uart0/fr.rs index d70703c..7b350ba 100644 --- a/crates/bcm2711-lpa/src/uart0/fr.rs +++ b/crates/bcm2711-lpa/src/uart0/fr.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `CTS` reader - CTS"] pub type CTS_R = crate::BitReader; #[doc = "Field `CTS` writer - CTS"] -pub type CTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSR` reader - DSR"] pub type DSR_R = crate::BitReader; #[doc = "Field `DSR` writer - DSR"] -pub type DSR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCD` reader - DCD"] pub type DCD_R = crate::BitReader; #[doc = "Field `DCD` writer - DCD"] -pub type DCD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSY` reader - BUSY"] pub type BUSY_R = crate::BitReader; #[doc = "Field `BUSY` writer - BUSY"] -pub type BUSY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUSY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFE` reader - RXFE"] pub type RXFE_R = crate::BitReader; #[doc = "Field `RXFE` writer - RXFE"] -pub type RXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFF` reader - TXFF"] pub type TXFF_R = crate::BitReader; #[doc = "Field `TXFF` writer - TXFF"] -pub type TXFF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFF` reader - RXFF"] pub type RXFF_R = crate::BitReader; #[doc = "Field `RXFF` writer - RXFF"] -pub type RXFF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFE` reader - TXFE"] pub type TXFE_R = crate::BitReader; #[doc = "Field `TXFE` writer - TXFE"] -pub type TXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RI` reader - RI"] pub type RI_R = crate::BitReader; #[doc = "Field `RI` writer - RI"] -pub type RI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RI_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CTS"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - CTS"] #[inline(always)] #[must_use] - pub fn cts(&mut self) -> CTS_W { - CTS_W::new(self) + pub fn cts(&mut self) -> CTS_W { + CTS_W::new(self, 0) } #[doc = "Bit 1 - DSR"] #[inline(always)] #[must_use] - pub fn dsr(&mut self) -> DSR_W { - DSR_W::new(self) + pub fn dsr(&mut self) -> DSR_W { + DSR_W::new(self, 1) } #[doc = "Bit 2 - DCD"] #[inline(always)] #[must_use] - pub fn dcd(&mut self) -> DCD_W { - DCD_W::new(self) + pub fn dcd(&mut self) -> DCD_W { + DCD_W::new(self, 2) } #[doc = "Bit 3 - BUSY"] #[inline(always)] #[must_use] - pub fn busy(&mut self) -> BUSY_W { - BUSY_W::new(self) + pub fn busy(&mut self) -> BUSY_W { + BUSY_W::new(self, 3) } #[doc = "Bit 4 - RXFE"] #[inline(always)] #[must_use] - pub fn rxfe(&mut self) -> RXFE_W { - RXFE_W::new(self) + pub fn rxfe(&mut self) -> RXFE_W { + RXFE_W::new(self, 4) } #[doc = "Bit 5 - TXFF"] #[inline(always)] #[must_use] - pub fn txff(&mut self) -> TXFF_W { - TXFF_W::new(self) + pub fn txff(&mut self) -> TXFF_W { + TXFF_W::new(self, 5) } #[doc = "Bit 6 - RXFF"] #[inline(always)] #[must_use] - pub fn rxff(&mut self) -> RXFF_W { - RXFF_W::new(self) + pub fn rxff(&mut self) -> RXFF_W { + RXFF_W::new(self, 6) } #[doc = "Bit 7 - TXFE"] #[inline(always)] #[must_use] - pub fn txfe(&mut self) -> TXFE_W { - TXFE_W::new(self) + pub fn txfe(&mut self) -> TXFE_W { + TXFE_W::new(self, 7) } #[doc = "Bit 8 - RI"] #[inline(always)] #[must_use] - pub fn ri(&mut self) -> RI_W { - RI_W::new(self) + pub fn ri(&mut self) -> RI_W { + RI_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/ibrd.rs b/crates/bcm2711-lpa/src/uart0/ibrd.rs index 07441c8..193f8ca 100644 --- a/crates/bcm2711-lpa/src/uart0/ibrd.rs +++ b/crates/bcm2711-lpa/src/uart0/ibrd.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BAUDDIVINT` reader - BAUDDIVINT"] pub type BAUDDIVINT_R = crate::FieldReader; #[doc = "Field `BAUDDIVINT` writer - BAUDDIVINT"] -pub type BAUDDIVINT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type BAUDDIVINT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - BAUDDIVINT"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - BAUDDIVINT"] #[inline(always)] #[must_use] - pub fn bauddivint(&mut self) -> BAUDDIVINT_W { - BAUDDIVINT_W::new(self) + pub fn bauddivint(&mut self) -> BAUDDIVINT_W { + BAUDDIVINT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/icr.rs b/crates/bcm2711-lpa/src/uart0/icr.rs index e69a3e9..0b0080c 100644 --- a/crates/bcm2711-lpa/src/uart0/icr.rs +++ b/crates/bcm2711-lpa/src/uart0/icr.rs @@ -1,27 +1,27 @@ #[doc = "Register `ICR` writer"] pub type W = crate::W; #[doc = "Field `RIMIC` writer - RIMIC"] -pub type RIMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RIMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSMIC` writer - CTSMIC"] -pub type CTSMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDMIC` writer - DCDMIC"] -pub type DCDMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCDMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSRMIC` writer - DSRMIC"] -pub type DSRMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSRMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIC` writer - RXIC"] -pub type RXIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIC` writer - TXIC"] -pub type TXIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIC` writer - RTIC"] -pub type RTIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEIC` writer - FEIC"] -pub type FEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEIC` writer - PEIC"] -pub type PEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEIC` writer - BEIC"] -pub type BEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEIC` writer - OEIC"] -pub type OEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEIC_W<'a, REG> = crate::BitWriter<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -31,68 +31,68 @@ impl W { #[doc = "Bit 0 - RIMIC"] #[inline(always)] #[must_use] - pub fn rimic(&mut self) -> RIMIC_W { - RIMIC_W::new(self) + pub fn rimic(&mut self) -> RIMIC_W { + RIMIC_W::new(self, 0) } #[doc = "Bit 1 - CTSMIC"] #[inline(always)] #[must_use] - pub fn ctsmic(&mut self) -> CTSMIC_W { - CTSMIC_W::new(self) + pub fn ctsmic(&mut self) -> CTSMIC_W { + CTSMIC_W::new(self, 1) } #[doc = "Bit 2 - DCDMIC"] #[inline(always)] #[must_use] - pub fn dcdmic(&mut self) -> DCDMIC_W { - DCDMIC_W::new(self) + pub fn dcdmic(&mut self) -> DCDMIC_W { + DCDMIC_W::new(self, 2) } #[doc = "Bit 3 - DSRMIC"] #[inline(always)] #[must_use] - pub fn dsrmic(&mut self) -> DSRMIC_W { - DSRMIC_W::new(self) + pub fn dsrmic(&mut self) -> DSRMIC_W { + DSRMIC_W::new(self, 3) } #[doc = "Bit 4 - RXIC"] #[inline(always)] #[must_use] - pub fn rxic(&mut self) -> RXIC_W { - RXIC_W::new(self) + pub fn rxic(&mut self) -> RXIC_W { + RXIC_W::new(self, 4) } #[doc = "Bit 5 - TXIC"] #[inline(always)] #[must_use] - pub fn txic(&mut self) -> TXIC_W { - TXIC_W::new(self) + pub fn txic(&mut self) -> TXIC_W { + TXIC_W::new(self, 5) } #[doc = "Bit 6 - RTIC"] #[inline(always)] #[must_use] - pub fn rtic(&mut self) -> RTIC_W { - RTIC_W::new(self) + pub fn rtic(&mut self) -> RTIC_W { + RTIC_W::new(self, 6) } #[doc = "Bit 7 - FEIC"] #[inline(always)] #[must_use] - pub fn feic(&mut self) -> FEIC_W { - FEIC_W::new(self) + pub fn feic(&mut self) -> FEIC_W { + FEIC_W::new(self, 7) } #[doc = "Bit 8 - PEIC"] #[inline(always)] #[must_use] - pub fn peic(&mut self) -> PEIC_W { - PEIC_W::new(self) + pub fn peic(&mut self) -> PEIC_W { + PEIC_W::new(self, 8) } #[doc = "Bit 9 - BEIC"] #[inline(always)] #[must_use] - pub fn beic(&mut self) -> BEIC_W { - BEIC_W::new(self) + pub fn beic(&mut self) -> BEIC_W { + BEIC_W::new(self, 9) } #[doc = "Bit 10 - OEIC"] #[inline(always)] #[must_use] - pub fn oeic(&mut self) -> OEIC_W { - OEIC_W::new(self) + pub fn oeic(&mut self) -> OEIC_W { + OEIC_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/ifls.rs b/crates/bcm2711-lpa/src/uart0/ifls.rs index 5119af0..3d8257b 100644 --- a/crates/bcm2711-lpa/src/uart0/ifls.rs +++ b/crates/bcm2711-lpa/src/uart0/ifls.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `TXIFLSEL` reader - TXIFLSEL"] pub type TXIFLSEL_R = crate::FieldReader; #[doc = "Field `TXIFLSEL` writer - TXIFLSEL"] -pub type TXIFLSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TXIFLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `RXIFLSEL` reader - RXIFLSEL"] pub type RXIFLSEL_R = crate::FieldReader; #[doc = "Field `RXIFLSEL` writer - RXIFLSEL"] -pub type RXIFLSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type RXIFLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - TXIFLSEL"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - TXIFLSEL"] #[inline(always)] #[must_use] - pub fn txiflsel(&mut self) -> TXIFLSEL_W { - TXIFLSEL_W::new(self) + pub fn txiflsel(&mut self) -> TXIFLSEL_W { + TXIFLSEL_W::new(self, 0) } #[doc = "Bits 3:5 - RXIFLSEL"] #[inline(always)] #[must_use] - pub fn rxiflsel(&mut self) -> RXIFLSEL_W { - RXIFLSEL_W::new(self) + pub fn rxiflsel(&mut self) -> RXIFLSEL_W { + RXIFLSEL_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/imsc.rs b/crates/bcm2711-lpa/src/uart0/imsc.rs index 80b23a4..62b5776 100644 --- a/crates/bcm2711-lpa/src/uart0/imsc.rs +++ b/crates/bcm2711-lpa/src/uart0/imsc.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `RIMIM` reader - RIMIM"] pub type RIMIM_R = crate::BitReader; #[doc = "Field `RIMIM` writer - RIMIM"] -pub type RIMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RIMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSMIM` reader - CTSMIM"] pub type CTSMIM_R = crate::BitReader; #[doc = "Field `CTSMIM` writer - CTSMIM"] -pub type CTSMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDMIM` reader - DCDMIM"] pub type DCDMIM_R = crate::BitReader; #[doc = "Field `DCDMIM` writer - DCDMIM"] -pub type DCDMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCDMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSRMIM` reader - DSRMIM"] pub type DSRMIM_R = crate::BitReader; #[doc = "Field `DSRMIM` writer - DSRMIM"] -pub type DSRMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSRMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIM` reader - RXIM"] pub type RXIM_R = crate::BitReader; #[doc = "Field `RXIM` writer - RXIM"] -pub type RXIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIM` reader - TXIM"] pub type TXIM_R = crate::BitReader; #[doc = "Field `TXIM` writer - TXIM"] -pub type TXIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIM` reader - RTIM"] pub type RTIM_R = crate::BitReader; #[doc = "Field `RTIM` writer - RTIM"] -pub type RTIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEIM` reader - FEIM"] pub type FEIM_R = crate::BitReader; #[doc = "Field `FEIM` writer - FEIM"] -pub type FEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEIM` reader - PEIM"] pub type PEIM_R = crate::BitReader; #[doc = "Field `PEIM` writer - PEIM"] -pub type PEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEIM` reader - BEIM"] pub type BEIM_R = crate::BitReader; #[doc = "Field `BEIM` writer - BEIM"] -pub type BEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEIM` reader - OEIM"] pub type OEIM_R = crate::BitReader; #[doc = "Field `OEIM` writer - OEIM"] -pub type OEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RIMIM"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - RIMIM"] #[inline(always)] #[must_use] - pub fn rimim(&mut self) -> RIMIM_W { - RIMIM_W::new(self) + pub fn rimim(&mut self) -> RIMIM_W { + RIMIM_W::new(self, 0) } #[doc = "Bit 1 - CTSMIM"] #[inline(always)] #[must_use] - pub fn ctsmim(&mut self) -> CTSMIM_W { - CTSMIM_W::new(self) + pub fn ctsmim(&mut self) -> CTSMIM_W { + CTSMIM_W::new(self, 1) } #[doc = "Bit 2 - DCDMIM"] #[inline(always)] #[must_use] - pub fn dcdmim(&mut self) -> DCDMIM_W { - DCDMIM_W::new(self) + pub fn dcdmim(&mut self) -> DCDMIM_W { + DCDMIM_W::new(self, 2) } #[doc = "Bit 3 - DSRMIM"] #[inline(always)] #[must_use] - pub fn dsrmim(&mut self) -> DSRMIM_W { - DSRMIM_W::new(self) + pub fn dsrmim(&mut self) -> DSRMIM_W { + DSRMIM_W::new(self, 3) } #[doc = "Bit 4 - RXIM"] #[inline(always)] #[must_use] - pub fn rxim(&mut self) -> RXIM_W { - RXIM_W::new(self) + pub fn rxim(&mut self) -> RXIM_W { + RXIM_W::new(self, 4) } #[doc = "Bit 5 - TXIM"] #[inline(always)] #[must_use] - pub fn txim(&mut self) -> TXIM_W { - TXIM_W::new(self) + pub fn txim(&mut self) -> TXIM_W { + TXIM_W::new(self, 5) } #[doc = "Bit 6 - RTIM"] #[inline(always)] #[must_use] - pub fn rtim(&mut self) -> RTIM_W { - RTIM_W::new(self) + pub fn rtim(&mut self) -> RTIM_W { + RTIM_W::new(self, 6) } #[doc = "Bit 7 - FEIM"] #[inline(always)] #[must_use] - pub fn feim(&mut self) -> FEIM_W { - FEIM_W::new(self) + pub fn feim(&mut self) -> FEIM_W { + FEIM_W::new(self, 7) } #[doc = "Bit 8 - PEIM"] #[inline(always)] #[must_use] - pub fn peim(&mut self) -> PEIM_W { - PEIM_W::new(self) + pub fn peim(&mut self) -> PEIM_W { + PEIM_W::new(self, 8) } #[doc = "Bit 9 - BEIM"] #[inline(always)] #[must_use] - pub fn beim(&mut self) -> BEIM_W { - BEIM_W::new(self) + pub fn beim(&mut self) -> BEIM_W { + BEIM_W::new(self, 9) } #[doc = "Bit 10 - OEIM"] #[inline(always)] #[must_use] - pub fn oeim(&mut self) -> OEIM_W { - OEIM_W::new(self) + pub fn oeim(&mut self) -> OEIM_W { + OEIM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/lcr_h.rs b/crates/bcm2711-lpa/src/uart0/lcr_h.rs index b6c85cc..6f5ab61 100644 --- a/crates/bcm2711-lpa/src/uart0/lcr_h.rs +++ b/crates/bcm2711-lpa/src/uart0/lcr_h.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `BRK` reader - BRK"] pub type BRK_R = crate::BitReader; #[doc = "Field `BRK` writer - BRK"] -pub type BRK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BRK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEN` reader - PEN"] pub type PEN_R = crate::BitReader; #[doc = "Field `PEN` writer - PEN"] -pub type PEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPS` reader - EPS"] pub type EPS_R = crate::BitReader; #[doc = "Field `EPS` writer - EPS"] -pub type EPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STP2` reader - STP2"] pub type STP2_R = crate::BitReader; #[doc = "Field `STP2` writer - STP2"] -pub type STP2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STP2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN` reader - FEN"] pub type FEN_R = crate::BitReader; #[doc = "Field `FEN` writer - FEN"] -pub type FEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WLEN` reader - WLEN"] pub type WLEN_R = crate::FieldReader; #[doc = "Field `WLEN` writer - WLEN"] -pub type WLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type WLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SPS` reader - SPS"] pub type SPS_R = crate::BitReader; #[doc = "Field `SPS` writer - SPS"] -pub type SPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - BRK"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - BRK"] #[inline(always)] #[must_use] - pub fn brk(&mut self) -> BRK_W { - BRK_W::new(self) + pub fn brk(&mut self) -> BRK_W { + BRK_W::new(self, 0) } #[doc = "Bit 1 - PEN"] #[inline(always)] #[must_use] - pub fn pen(&mut self) -> PEN_W { - PEN_W::new(self) + pub fn pen(&mut self) -> PEN_W { + PEN_W::new(self, 1) } #[doc = "Bit 2 - EPS"] #[inline(always)] #[must_use] - pub fn eps(&mut self) -> EPS_W { - EPS_W::new(self) + pub fn eps(&mut self) -> EPS_W { + EPS_W::new(self, 2) } #[doc = "Bit 3 - STP2"] #[inline(always)] #[must_use] - pub fn stp2(&mut self) -> STP2_W { - STP2_W::new(self) + pub fn stp2(&mut self) -> STP2_W { + STP2_W::new(self, 3) } #[doc = "Bit 4 - FEN"] #[inline(always)] #[must_use] - pub fn fen(&mut self) -> FEN_W { - FEN_W::new(self) + pub fn fen(&mut self) -> FEN_W { + FEN_W::new(self, 4) } #[doc = "Bits 5:6 - WLEN"] #[inline(always)] #[must_use] - pub fn wlen(&mut self) -> WLEN_W { - WLEN_W::new(self) + pub fn wlen(&mut self) -> WLEN_W { + WLEN_W::new(self, 5) } #[doc = "Bit 7 - SPS"] #[inline(always)] #[must_use] - pub fn sps(&mut self) -> SPS_W { - SPS_W::new(self) + pub fn sps(&mut self) -> SPS_W { + SPS_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart0/mis.rs b/crates/bcm2711-lpa/src/uart0/mis.rs index 8ecfc00..acfe63e 100644 --- a/crates/bcm2711-lpa/src/uart0/mis.rs +++ b/crates/bcm2711-lpa/src/uart0/mis.rs @@ -98,7 +98,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Masked Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mis::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/uart0/ris.rs b/crates/bcm2711-lpa/src/uart0/ris.rs index 9da59ba..3d4619d 100644 --- a/crates/bcm2711-lpa/src/uart0/ris.rs +++ b/crates/bcm2711-lpa/src/uart0/ris.rs @@ -98,7 +98,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Raw Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ris::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/uart0/rsr.rs b/crates/bcm2711-lpa/src/uart0/rsr.rs index 524d503..29bc562 100644 --- a/crates/bcm2711-lpa/src/uart0/rsr.rs +++ b/crates/bcm2711-lpa/src/uart0/rsr.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Receive Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/uart1.rs b/crates/bcm2711-lpa/src/uart1.rs index 7cc03cc..943516a 100644 --- a/crates/bcm2711-lpa/src/uart1.rs +++ b/crates/bcm2711-lpa/src/uart1.rs @@ -4,46 +4,82 @@ pub struct RegisterBlock { _reserved_0_io: [u8; 0x04], _reserved_1_ier: [u8; 0x04], - #[doc = "0x08 - Interrupt Identify"] - pub iir: IIR, - #[doc = "0x0c - Line control"] - pub lcr: LCR, - #[doc = "0x10 - Modem Control"] - pub mcr: MCR, - #[doc = "0x14 - Line Status"] - pub lsr: LSR, - #[doc = "0x18 - Modem Status"] - pub msr: MSR, - #[doc = "0x1c - Scratch"] - pub scratch: SCRATCH, + iir: IIR, + lcr: LCR, + mcr: MCR, + lsr: LSR, + msr: MSR, + scratch: SCRATCH, _reserved8: [u8; 0x03], - #[doc = "0x20 - Control"] - pub cntl: CNTL, - #[doc = "0x24 - Status"] - pub stat: STAT, - #[doc = "0x28 - Baudrate"] - pub baud: BAUD, + cntl: CNTL, + stat: STAT, + baud: BAUD, } impl RegisterBlock { #[doc = "0x00 - Lower bits of baudrate when DLAB is set"] #[inline(always)] pub const fn baudl(&self) -> &BAUDL { - unsafe { &*(self as *const Self).cast::().add(0usize).cast() } + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x00 - I/O Data"] #[inline(always)] pub const fn io(&self) -> &IO { - unsafe { &*(self as *const Self).cast::().add(0usize).cast() } + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x04 - High bits of baudrate when DLAB is set"] #[inline(always)] pub const fn baudh(&self) -> &BAUDH { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + unsafe { &*(self as *const Self).cast::().add(4).cast() } } #[doc = "0x04 - Interrupt Enable"] #[inline(always)] pub const fn ier(&self) -> &IER { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x08 - Interrupt Identify"] + #[inline(always)] + pub const fn iir(&self) -> &IIR { + &self.iir + } + #[doc = "0x0c - Line control"] + #[inline(always)] + pub const fn lcr(&self) -> &LCR { + &self.lcr + } + #[doc = "0x10 - Modem Control"] + #[inline(always)] + pub const fn mcr(&self) -> &MCR { + &self.mcr + } + #[doc = "0x14 - Line Status"] + #[inline(always)] + pub const fn lsr(&self) -> &LSR { + &self.lsr + } + #[doc = "0x18 - Modem Status"] + #[inline(always)] + pub const fn msr(&self) -> &MSR { + &self.msr + } + #[doc = "0x1c - Scratch"] + #[inline(always)] + pub const fn scratch(&self) -> &SCRATCH { + &self.scratch + } + #[doc = "0x20 - Control"] + #[inline(always)] + pub const fn cntl(&self) -> &CNTL { + &self.cntl + } + #[doc = "0x24 - Status"] + #[inline(always)] + pub const fn stat(&self) -> &STAT { + &self.stat + } + #[doc = "0x28 - Baudrate"] + #[inline(always)] + pub const fn baud(&self) -> &BAUD { + &self.baud } } #[doc = "IO (rw) register accessor: I/O Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`io::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`io::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@io`] diff --git a/crates/bcm2711-lpa/src/uart1/baud.rs b/crates/bcm2711-lpa/src/uart1/baud.rs index 4cc37c7..1a1fe31 100644 --- a/crates/bcm2711-lpa/src/uart1/baud.rs +++ b/crates/bcm2711-lpa/src/uart1/baud.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/uart1/baudh.rs b/crates/bcm2711-lpa/src/uart1/baudh.rs index aa2fa88..259e873 100644 --- a/crates/bcm2711-lpa/src/uart1/baudh.rs +++ b/crates/bcm2711-lpa/src/uart1/baudh.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/uart1/baudl.rs b/crates/bcm2711-lpa/src/uart1/baudl.rs index a9c9850..966abf8 100644 --- a/crates/bcm2711-lpa/src/uart1/baudl.rs +++ b/crates/bcm2711-lpa/src/uart1/baudl.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/uart1/cntl.rs b/crates/bcm2711-lpa/src/uart1/cntl.rs index ca942f3..5615608 100644 --- a/crates/bcm2711-lpa/src/uart1/cntl.rs +++ b/crates/bcm2711-lpa/src/uart1/cntl.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `RX_ENABLE` reader - Enable receive"] pub type RX_ENABLE_R = crate::BitReader; #[doc = "Field `RX_ENABLE` writer - Enable receive"] -pub type RX_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_ENABLE` reader - Enable transmit"] pub type TX_ENABLE_R = crate::BitReader; #[doc = "Field `TX_ENABLE` writer - Enable transmit"] -pub type TX_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_ENABLE` reader - Enable auto receive flow control with RTS"] pub type RTS_ENABLE_R = crate::BitReader; #[doc = "Field `RTS_ENABLE` writer - Enable auto receive flow control with RTS"] -pub type RTS_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTS_ENABLE` reader - Enable auto transmit flow control with CTS"] pub type CTS_ENABLE_R = crate::BitReader; #[doc = "Field `CTS_ENABLE` writer - Enable auto transmit flow control with CTS"] -pub type CTS_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_FIFO_LEVEL` reader - FIFO level to de-assert RTS"] pub type RTS_FIFO_LEVEL_R = crate::FieldReader; #[doc = "FIFO level to de-assert RTS\n\nValue on reset: 0"] @@ -76,9 +76,8 @@ impl RTS_FIFO_LEVEL_R { } } #[doc = "Field `RTS_FIFO_LEVEL` writer - FIFO level to de-assert RTS"] -pub type RTS_FIFO_LEVEL_W<'a, REG, const O: u8> = - crate::FieldWriterSafe<'a, REG, 2, O, FIFO_LEVEL_A>; -impl<'a, REG, const O: u8> RTS_FIFO_LEVEL_W<'a, REG, O> +pub type RTS_FIFO_LEVEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FIFO_LEVEL_A>; +impl<'a, REG> RTS_FIFO_LEVEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -145,8 +144,8 @@ impl CTS_ASSERT_R { } } #[doc = "Field `CTS_ASSERT` writer - CTS assert level"] -pub type CTS_ASSERT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ASSERT_LEVEL_A>; -impl<'a, REG, const O: u8> CTS_ASSERT_W<'a, REG, O> +pub type CTS_ASSERT_W<'a, REG> = crate::BitWriter<'a, REG, ASSERT_LEVEL_A>; +impl<'a, REG> CTS_ASSERT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -216,51 +215,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable receive"] #[inline(always)] #[must_use] - pub fn rx_enable(&mut self) -> RX_ENABLE_W { - RX_ENABLE_W::new(self) + pub fn rx_enable(&mut self) -> RX_ENABLE_W { + RX_ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Enable transmit"] #[inline(always)] #[must_use] - pub fn tx_enable(&mut self) -> TX_ENABLE_W { - TX_ENABLE_W::new(self) + pub fn tx_enable(&mut self) -> TX_ENABLE_W { + TX_ENABLE_W::new(self, 1) } #[doc = "Bit 2 - Enable auto receive flow control with RTS"] #[inline(always)] #[must_use] - pub fn rts_enable(&mut self) -> RTS_ENABLE_W { - RTS_ENABLE_W::new(self) + pub fn rts_enable(&mut self) -> RTS_ENABLE_W { + RTS_ENABLE_W::new(self, 2) } #[doc = "Bit 3 - Enable auto transmit flow control with CTS"] #[inline(always)] #[must_use] - pub fn cts_enable(&mut self) -> CTS_ENABLE_W { - CTS_ENABLE_W::new(self) + pub fn cts_enable(&mut self) -> CTS_ENABLE_W { + CTS_ENABLE_W::new(self, 3) } #[doc = "Bits 4:5 - FIFO level to de-assert RTS"] #[inline(always)] #[must_use] - pub fn rts_fifo_level(&mut self) -> RTS_FIFO_LEVEL_W { - RTS_FIFO_LEVEL_W::new(self) + pub fn rts_fifo_level(&mut self) -> RTS_FIFO_LEVEL_W { + RTS_FIFO_LEVEL_W::new(self, 4) } #[doc = "Bit 6 - RTS assert level"] #[inline(always)] #[must_use] - pub fn rts_assert(&mut self) -> RTS_ASSERT_W { - RTS_ASSERT_W::new(self) + pub fn rts_assert(&mut self) -> RTS_ASSERT_W { + RTS_ASSERT_W::new(self, 6) } #[doc = "Bit 7 - CTS assert level"] #[inline(always)] #[must_use] - pub fn cts_assert(&mut self) -> CTS_ASSERT_W { - CTS_ASSERT_W::new(self) + pub fn cts_assert(&mut self) -> CTS_ASSERT_W { + CTS_ASSERT_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/ier.rs b/crates/bcm2711-lpa/src/uart1/ier.rs index f3188e7..397be5f 100644 --- a/crates/bcm2711-lpa/src/uart1/ier.rs +++ b/crates/bcm2711-lpa/src/uart1/ier.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least 1 byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least 1 byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO is empty"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO is empty"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive FIFO has at least 1 byte"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least 1 byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Transmit FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/iir.rs b/crates/bcm2711-lpa/src/uart1/iir.rs index b7a876b..68b5ae3 100644 --- a/crates/bcm2711-lpa/src/uart1/iir.rs +++ b/crates/bcm2711-lpa/src/uart1/iir.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `nPENDING` reader - No pending interrupt"] pub type N_PENDING_R = crate::BitReader; #[doc = "Field `nPENDING` writer - No pending interrupt"] -pub type N_PENDING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type N_PENDING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least 1 byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least 1 byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO is empty"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO is empty"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No pending interrupt"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - No pending interrupt"] #[inline(always)] #[must_use] - pub fn n_pending(&mut self) -> N_PENDING_W { - N_PENDING_W::new(self) + pub fn n_pending(&mut self) -> N_PENDING_W { + N_PENDING_W::new(self, 0) } #[doc = "Bit 1 - Receive FIFO has at least 1 byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 1) } #[doc = "Bit 2 - Transmit FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/io.rs b/crates/bcm2711-lpa/src/uart1/io.rs index 1873e08..50a4e82 100644 --- a/crates/bcm2711-lpa/src/uart1/io.rs +++ b/crates/bcm2711-lpa/src/uart1/io.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - FIFO access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - FIFO access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/lcr.rs b/crates/bcm2711-lpa/src/uart1/lcr.rs index 38e7d1e..af3e618 100644 --- a/crates/bcm2711-lpa/src/uart1/lcr.rs +++ b/crates/bcm2711-lpa/src/uart1/lcr.rs @@ -44,8 +44,8 @@ impl DATA_SIZE_R { } } #[doc = "Field `DATA_SIZE` writer - UART word size"] -pub type DATA_SIZE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, MODE_A>; -impl<'a, REG, const O: u8> DATA_SIZE_W<'a, REG, O> +pub type DATA_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE_A>; +impl<'a, REG> DATA_SIZE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -64,11 +64,11 @@ where #[doc = "Field `BREAK` reader - Pull TX low continuously to send break"] pub type BREAK_R = crate::BitReader; #[doc = "Field `BREAK` writer - Pull TX low continuously to send break"] -pub type BREAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BREAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DLAB` reader - First two registers are baudrate"] pub type DLAB_R = crate::BitReader; #[doc = "Field `DLAB` writer - First two registers are baudrate"] -pub type DLAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DLAB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - UART word size"] #[inline(always)] @@ -97,27 +97,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - UART word size"] #[inline(always)] #[must_use] - pub fn data_size(&mut self) -> DATA_SIZE_W { - DATA_SIZE_W::new(self) + pub fn data_size(&mut self) -> DATA_SIZE_W { + DATA_SIZE_W::new(self, 0) } #[doc = "Bit 6 - Pull TX low continuously to send break"] #[inline(always)] #[must_use] - pub fn break_(&mut self) -> BREAK_W { - BREAK_W::new(self) + pub fn break_(&mut self) -> BREAK_W { + BREAK_W::new(self, 6) } #[doc = "Bit 7 - First two registers are baudrate"] #[inline(always)] #[must_use] - pub fn dlab(&mut self) -> DLAB_W { - DLAB_W::new(self) + pub fn dlab(&mut self) -> DLAB_W { + DLAB_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/lsr.rs b/crates/bcm2711-lpa/src/uart1/lsr.rs index 83455e7..c1d3fb3 100644 --- a/crates/bcm2711-lpa/src/uart1/lsr.rs +++ b/crates/bcm2711-lpa/src/uart1/lsr.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least one byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least one byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_OVERRUN` reader - Receive FIFO overrun"] pub type RX_OVERRUN_R = crate::BitReader; #[doc = "Field `RX_OVERRUN` writer - Receive FIFO overrun"] -pub type RX_OVERRUN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - Transmit FIFO has room for at least one byte"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - Transmit FIFO has room for at least one byte"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_IDLE` reader - Transmit FIFO empty and all bits shifted out"] pub type TX_IDLE_R = crate::BitReader; #[doc = "Field `TX_IDLE` writer - Transmit FIFO empty and all bits shifted out"] -pub type TX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive FIFO has at least one byte"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least one byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Receive FIFO overrun"] #[inline(always)] #[must_use] - pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { - RX_OVERRUN_W::new(self) + pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { + RX_OVERRUN_W::new(self, 1) } #[doc = "Bit 5 - Transmit FIFO has room for at least one byte"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 5) } #[doc = "Bit 6 - Transmit FIFO empty and all bits shifted out"] #[inline(always)] #[must_use] - pub fn tx_idle(&mut self) -> TX_IDLE_W { - TX_IDLE_W::new(self) + pub fn tx_idle(&mut self) -> TX_IDLE_W { + TX_IDLE_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/mcr.rs b/crates/bcm2711-lpa/src/uart1/mcr.rs index 26a7cb4..af66534 100644 --- a/crates/bcm2711-lpa/src/uart1/mcr.rs +++ b/crates/bcm2711-lpa/src/uart1/mcr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RTS` reader - RTS is low"] pub type RTS_R = crate::BitReader; #[doc = "Field `RTS` writer - RTS is low"] -pub type RTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - RTS is low"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - RTS is low"] #[inline(always)] #[must_use] - pub fn rts(&mut self) -> RTS_W { - RTS_W::new(self) + pub fn rts(&mut self) -> RTS_W { + RTS_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/msr.rs b/crates/bcm2711-lpa/src/uart1/msr.rs index c6e81af..889b504 100644 --- a/crates/bcm2711-lpa/src/uart1/msr.rs +++ b/crates/bcm2711-lpa/src/uart1/msr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CTS` reader - CTS is low"] pub type CTS_R = crate::BitReader; #[doc = "Field `CTS` writer - CTS is low"] -pub type CTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - CTS is low"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 4 - CTS is low"] #[inline(always)] #[must_use] - pub fn cts(&mut self) -> CTS_W { - CTS_W::new(self) + pub fn cts(&mut self) -> CTS_W { + CTS_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/uart1/scratch.rs b/crates/bcm2711-lpa/src/uart1/scratch.rs index bd73381..e8dcef0 100644 --- a/crates/bcm2711-lpa/src/uart1/scratch.rs +++ b/crates/bcm2711-lpa/src/uart1/scratch.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/uart1/stat.rs b/crates/bcm2711-lpa/src/uart1/stat.rs index b876fef..679c73b 100644 --- a/crates/bcm2711-lpa/src/uart1/stat.rs +++ b/crates/bcm2711-lpa/src/uart1/stat.rs @@ -5,51 +5,51 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least one symbol"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least one symbol"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO has space for at least one symbol"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO has space for at least one symbol"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_IDLE` reader - Receiver is idle"] pub type RX_IDLE_R = crate::BitReader; #[doc = "Field `RX_IDLE` writer - Receiver is idle"] -pub type RX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_IDLE` reader - Transmitter is idle"] pub type TX_IDLE_R = crate::BitReader; #[doc = "Field `TX_IDLE` writer - Transmitter is idle"] -pub type TX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_OVERRUN` reader - Receive FIFO overrun"] pub type RX_OVERRUN_R = crate::BitReader; #[doc = "Field `RX_OVERRUN` writer - Receive FIFO overrun"] -pub type RX_OVERRUN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_FULL` reader - Transmit FIFO is full"] pub type TX_FULL_R = crate::BitReader; #[doc = "Field `TX_FULL` writer - Transmit FIFO is full"] -pub type TX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_STATUS` reader - RTS state"] pub type RTS_STATUS_R = crate::BitReader; #[doc = "Field `RTS_STATUS` writer - RTS state"] -pub type RTS_STATUS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTS_STATUS` reader - CTS state"] pub type CTS_STATUS_R = crate::BitReader; #[doc = "Field `CTS_STATUS` writer - CTS state"] -pub type CTS_STATUS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - Transmit FIFO is completely empty"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - Transmit FIFO is completely empty"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_DONE` reader - Transmit FIFO is empty and transmitter is idle"] pub type TX_DONE_R = crate::BitReader; #[doc = "Field `TX_DONE` writer - Transmit FIFO is empty and transmitter is idle"] -pub type TX_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_FIFO_LEVEL` reader - How many entries are filled in the RX FIFO"] pub type RX_FIFO_LEVEL_R = crate::FieldReader; #[doc = "Field `RX_FIFO_LEVEL` writer - How many entries are filled in the RX FIFO"] -pub type RX_FIFO_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type RX_FIFO_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TX_FIFO_LEVEL` reader - How many entries are filled in the TX FIFO"] pub type TX_FIFO_LEVEL_R = crate::FieldReader; #[doc = "Field `TX_FIFO_LEVEL` writer - How many entries are filled in the TX FIFO"] -pub type TX_FIFO_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TX_FIFO_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Receive FIFO has at least one symbol"] #[inline(always)] @@ -138,81 +138,81 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least one symbol"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Transmit FIFO has space for at least one symbol"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 1) } #[doc = "Bit 2 - Receiver is idle"] #[inline(always)] #[must_use] - pub fn rx_idle(&mut self) -> RX_IDLE_W { - RX_IDLE_W::new(self) + pub fn rx_idle(&mut self) -> RX_IDLE_W { + RX_IDLE_W::new(self, 2) } #[doc = "Bit 3 - Transmitter is idle"] #[inline(always)] #[must_use] - pub fn tx_idle(&mut self) -> TX_IDLE_W { - TX_IDLE_W::new(self) + pub fn tx_idle(&mut self) -> TX_IDLE_W { + TX_IDLE_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO overrun"] #[inline(always)] #[must_use] - pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { - RX_OVERRUN_W::new(self) + pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { + RX_OVERRUN_W::new(self, 4) } #[doc = "Bit 5 - Transmit FIFO is full"] #[inline(always)] #[must_use] - pub fn tx_full(&mut self) -> TX_FULL_W { - TX_FULL_W::new(self) + pub fn tx_full(&mut self) -> TX_FULL_W { + TX_FULL_W::new(self, 5) } #[doc = "Bit 6 - RTS state"] #[inline(always)] #[must_use] - pub fn rts_status(&mut self) -> RTS_STATUS_W { - RTS_STATUS_W::new(self) + pub fn rts_status(&mut self) -> RTS_STATUS_W { + RTS_STATUS_W::new(self, 6) } #[doc = "Bit 7 - CTS state"] #[inline(always)] #[must_use] - pub fn cts_status(&mut self) -> CTS_STATUS_W { - CTS_STATUS_W::new(self) + pub fn cts_status(&mut self) -> CTS_STATUS_W { + CTS_STATUS_W::new(self, 7) } #[doc = "Bit 8 - Transmit FIFO is completely empty"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 8) } #[doc = "Bit 9 - Transmit FIFO is empty and transmitter is idle"] #[inline(always)] #[must_use] - pub fn tx_done(&mut self) -> TX_DONE_W { - TX_DONE_W::new(self) + pub fn tx_done(&mut self) -> TX_DONE_W { + TX_DONE_W::new(self, 9) } #[doc = "Bits 16:19 - How many entries are filled in the RX FIFO"] #[inline(always)] #[must_use] - pub fn rx_fifo_level(&mut self) -> RX_FIFO_LEVEL_W { - RX_FIFO_LEVEL_W::new(self) + pub fn rx_fifo_level(&mut self) -> RX_FIFO_LEVEL_W { + RX_FIFO_LEVEL_W::new(self, 16) } #[doc = "Bits 24:27 - How many entries are filled in the TX FIFO"] #[inline(always)] #[must_use] - pub fn tx_fifo_level(&mut self) -> TX_FIFO_LEVEL_W { - TX_FIFO_LEVEL_W::new(self) + pub fn tx_fifo_level(&mut self) -> TX_FIFO_LEVEL_W { + TX_FIFO_LEVEL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device.rs b/crates/bcm2711-lpa/src/usb_otg_device.rs index 140d7ba..4c4dbc2 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device.rs @@ -2,111 +2,269 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + dcfg: DCFG, + dctl: DCTL, + dsts: DSTS, + _reserved3: [u8; 0x04], + diepmsk: DIEPMSK, + doepmsk: DOEPMSK, + daint: DAINT, + daintmsk: DAINTMSK, + _reserved7: [u8; 0x08], + dvbusdis: DVBUSDIS, + dvbuspulse: DVBUSPULSE, + dthrctl: DTHRCTL, + diepempmsk: DIEPEMPMSK, + deachint: DEACHINT, + deachintmsk: DEACHINTMSK, + diepeachmsk1: DIEPEACHMSK1, + _reserved14: [u8; 0x3c], + doepeachmsk1: DOEPEACHMSK1, + _reserved15: [u8; 0x7c], + in_endpoint0: IN_ENDPOINT, + _reserved16: [u8; 0x04], + in_endpoint1: IN_ENDPOINT, + _reserved17: [u8; 0x04], + in_endpoint2: IN_ENDPOINT, + _reserved18: [u8; 0x04], + in_endpoint3: IN_ENDPOINT, + _reserved19: [u8; 0x04], + in_endpoint4: IN_ENDPOINT, + _reserved20: [u8; 0x04], + in_endpoint5: IN_ENDPOINT, + _reserved21: [u8; 0x04], + in_endpoint6: IN_ENDPOINT, + _reserved22: [u8; 0x04], + in_endpoint7: IN_ENDPOINT, + _reserved23: [u8; 0x04], + in_endpoint8: IN_ENDPOINT, + _reserved24: [u8; 0x04], + in_endpoint9: IN_ENDPOINT, + _reserved25: [u8; 0x04], + in_endpoint10: IN_ENDPOINT, + _reserved26: [u8; 0x04], + in_endpoint11: IN_ENDPOINT, + _reserved27: [u8; 0x84], + out_endpoint0: OUT_ENDPOINT, + _reserved28: [u8; 0x08], + out_endpoint1: OUT_ENDPOINT, + _reserved29: [u8; 0x08], + out_endpoint2: OUT_ENDPOINT, + _reserved30: [u8; 0x08], + out_endpoint3: OUT_ENDPOINT, + _reserved31: [u8; 0x08], + out_endpoint4: OUT_ENDPOINT, + _reserved32: [u8; 0x08], + out_endpoint5: OUT_ENDPOINT, + _reserved33: [u8; 0x08], + out_endpoint6: OUT_ENDPOINT, + _reserved34: [u8; 0x08], + out_endpoint7: OUT_ENDPOINT, + _reserved35: [u8; 0x08], + out_endpoint8: OUT_ENDPOINT, + _reserved36: [u8; 0x08], + out_endpoint9: OUT_ENDPOINT, + _reserved37: [u8; 0x08], + out_endpoint10: OUT_ENDPOINT, + _reserved38: [u8; 0x08], + out_endpoint11: OUT_ENDPOINT, +} +impl RegisterBlock { #[doc = "0x00 - OTG_HS device configuration register"] - pub dcfg: DCFG, + #[inline(always)] + pub const fn dcfg(&self) -> &DCFG { + &self.dcfg + } #[doc = "0x04 - OTG_HS device control register"] - pub dctl: DCTL, + #[inline(always)] + pub const fn dctl(&self) -> &DCTL { + &self.dctl + } #[doc = "0x08 - OTG_HS device status register"] - pub dsts: DSTS, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn dsts(&self) -> &DSTS { + &self.dsts + } #[doc = "0x10 - OTG_HS device IN endpoint common interrupt mask register"] - pub diepmsk: DIEPMSK, + #[inline(always)] + pub const fn diepmsk(&self) -> &DIEPMSK { + &self.diepmsk + } #[doc = "0x14 - OTG_HS device OUT endpoint common interrupt mask register"] - pub doepmsk: DOEPMSK, + #[inline(always)] + pub const fn doepmsk(&self) -> &DOEPMSK { + &self.doepmsk + } #[doc = "0x18 - OTG_HS device all endpoints interrupt register"] - pub daint: DAINT, + #[inline(always)] + pub const fn daint(&self) -> &DAINT { + &self.daint + } #[doc = "0x1c - OTG_HS all endpoints interrupt mask register"] - pub daintmsk: DAINTMSK, - _reserved7: [u8; 0x08], + #[inline(always)] + pub const fn daintmsk(&self) -> &DAINTMSK { + &self.daintmsk + } #[doc = "0x28 - OTG_HS device VBUS discharge time register"] - pub dvbusdis: DVBUSDIS, + #[inline(always)] + pub const fn dvbusdis(&self) -> &DVBUSDIS { + &self.dvbusdis + } #[doc = "0x2c - OTG_HS device VBUS pulsing time register"] - pub dvbuspulse: DVBUSPULSE, + #[inline(always)] + pub const fn dvbuspulse(&self) -> &DVBUSPULSE { + &self.dvbuspulse + } #[doc = "0x30 - OTG_HS Device threshold control register"] - pub dthrctl: DTHRCTL, + #[inline(always)] + pub const fn dthrctl(&self) -> &DTHRCTL { + &self.dthrctl + } #[doc = "0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register"] - pub diepempmsk: DIEPEMPMSK, + #[inline(always)] + pub const fn diepempmsk(&self) -> &DIEPEMPMSK { + &self.diepempmsk + } #[doc = "0x38 - OTG_HS device each endpoint interrupt register"] - pub deachint: DEACHINT, + #[inline(always)] + pub const fn deachint(&self) -> &DEACHINT { + &self.deachint + } #[doc = "0x3c - OTG_HS device each endpoint interrupt register mask"] - pub deachintmsk: DEACHINTMSK, + #[inline(always)] + pub const fn deachintmsk(&self) -> &DEACHINTMSK { + &self.deachintmsk + } #[doc = "0x40 - OTG_HS device each in endpoint-1 interrupt register"] - pub diepeachmsk1: DIEPEACHMSK1, - _reserved14: [u8; 0x3c], + #[inline(always)] + pub const fn diepeachmsk1(&self) -> &DIEPEACHMSK1 { + &self.diepeachmsk1 + } #[doc = "0x80 - OTG_HS device each OUT endpoint-1 interrupt register"] - pub doepeachmsk1: DOEPEACHMSK1, - _reserved15: [u8; 0x7c], + #[inline(always)] + pub const fn doepeachmsk1(&self) -> &DOEPEACHMSK1 { + &self.doepeachmsk1 + } #[doc = "0x100..0x11c - IN Endpoint 0"] - pub in_endpoint0: IN_ENDPOINT, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint0(&self) -> &IN_ENDPOINT { + &self.in_endpoint0 + } #[doc = "0x120..0x13c - IN Endpoint 1"] - pub in_endpoint1: IN_ENDPOINT, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint1(&self) -> &IN_ENDPOINT { + &self.in_endpoint1 + } #[doc = "0x140..0x15c - IN Endpoint 2"] - pub in_endpoint2: IN_ENDPOINT, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint2(&self) -> &IN_ENDPOINT { + &self.in_endpoint2 + } #[doc = "0x160..0x17c - IN Endpoint 3"] - pub in_endpoint3: IN_ENDPOINT, - _reserved19: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint3(&self) -> &IN_ENDPOINT { + &self.in_endpoint3 + } #[doc = "0x180..0x19c - IN Endpoint 4"] - pub in_endpoint4: IN_ENDPOINT, - _reserved20: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint4(&self) -> &IN_ENDPOINT { + &self.in_endpoint4 + } #[doc = "0x1a0..0x1bc - IN Endpoint 5"] - pub in_endpoint5: IN_ENDPOINT, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint5(&self) -> &IN_ENDPOINT { + &self.in_endpoint5 + } #[doc = "0x1c0..0x1dc - IN Endpoint 6"] - pub in_endpoint6: IN_ENDPOINT, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint6(&self) -> &IN_ENDPOINT { + &self.in_endpoint6 + } #[doc = "0x1e0..0x1fc - IN Endpoint 7"] - pub in_endpoint7: IN_ENDPOINT, - _reserved23: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint7(&self) -> &IN_ENDPOINT { + &self.in_endpoint7 + } #[doc = "0x200..0x21c - IN Endpoint 8"] - pub in_endpoint8: IN_ENDPOINT, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint8(&self) -> &IN_ENDPOINT { + &self.in_endpoint8 + } #[doc = "0x220..0x23c - IN Endpoint 9"] - pub in_endpoint9: IN_ENDPOINT, - _reserved25: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint9(&self) -> &IN_ENDPOINT { + &self.in_endpoint9 + } #[doc = "0x240..0x25c - IN Endpoint 10"] - pub in_endpoint10: IN_ENDPOINT, - _reserved26: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint10(&self) -> &IN_ENDPOINT { + &self.in_endpoint10 + } #[doc = "0x260..0x27c - IN Endpoint 11"] - pub in_endpoint11: IN_ENDPOINT, - _reserved27: [u8; 0x84], + #[inline(always)] + pub const fn in_endpoint11(&self) -> &IN_ENDPOINT { + &self.in_endpoint11 + } #[doc = "0x300..0x318 - OUT Endpoint 0"] - pub out_endpoint0: OUT_ENDPOINT, - _reserved28: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint0(&self) -> &OUT_ENDPOINT { + &self.out_endpoint0 + } #[doc = "0x320..0x338 - OUT Endpoint 1"] - pub out_endpoint1: OUT_ENDPOINT, - _reserved29: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint1(&self) -> &OUT_ENDPOINT { + &self.out_endpoint1 + } #[doc = "0x340..0x358 - OUT Endpoint 2"] - pub out_endpoint2: OUT_ENDPOINT, - _reserved30: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint2(&self) -> &OUT_ENDPOINT { + &self.out_endpoint2 + } #[doc = "0x360..0x378 - OUT Endpoint 3"] - pub out_endpoint3: OUT_ENDPOINT, - _reserved31: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint3(&self) -> &OUT_ENDPOINT { + &self.out_endpoint3 + } #[doc = "0x380..0x398 - OUT Endpoint 4"] - pub out_endpoint4: OUT_ENDPOINT, - _reserved32: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint4(&self) -> &OUT_ENDPOINT { + &self.out_endpoint4 + } #[doc = "0x3a0..0x3b8 - OUT Endpoint 5"] - pub out_endpoint5: OUT_ENDPOINT, - _reserved33: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint5(&self) -> &OUT_ENDPOINT { + &self.out_endpoint5 + } #[doc = "0x3c0..0x3d8 - OUT Endpoint 6"] - pub out_endpoint6: OUT_ENDPOINT, - _reserved34: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint6(&self) -> &OUT_ENDPOINT { + &self.out_endpoint6 + } #[doc = "0x3e0..0x3f8 - OUT Endpoint 7"] - pub out_endpoint7: OUT_ENDPOINT, - _reserved35: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint7(&self) -> &OUT_ENDPOINT { + &self.out_endpoint7 + } #[doc = "0x400..0x418 - OUT Endpoint 8"] - pub out_endpoint8: OUT_ENDPOINT, - _reserved36: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint8(&self) -> &OUT_ENDPOINT { + &self.out_endpoint8 + } #[doc = "0x420..0x438 - OUT Endpoint 9"] - pub out_endpoint9: OUT_ENDPOINT, - _reserved37: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint9(&self) -> &OUT_ENDPOINT { + &self.out_endpoint9 + } #[doc = "0x440..0x458 - OUT Endpoint 10"] - pub out_endpoint10: OUT_ENDPOINT, - _reserved38: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint10(&self) -> &OUT_ENDPOINT { + &self.out_endpoint10 + } #[doc = "0x460..0x478 - OUT Endpoint 11"] - pub out_endpoint11: OUT_ENDPOINT, + #[inline(always)] + pub const fn out_endpoint11(&self) -> &OUT_ENDPOINT { + &self.out_endpoint11 + } } #[doc = "DCFG (rw) register accessor: OTG_HS device configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] module"] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/daint.rs b/crates/bcm2711-lpa/src/usb_otg_device/daint.rs index 3210b36..69e661f 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/daint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/daint.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS device all endpoints interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/daintmsk.rs b/crates/bcm2711-lpa/src/usb_otg_device/daintmsk.rs index 44196aa..ddd94d4 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/daintmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/daintmsk.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEPM` reader - IN EP interrupt mask bits"] pub type IEPM_R = crate::FieldReader; #[doc = "Field `IEPM` writer - IN EP interrupt mask bits"] -pub type IEPM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type IEPM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `OEPM` reader - OUT EP interrupt mask bits"] pub type OEPM_R = crate::FieldReader; #[doc = "Field `OEPM` writer - OUT EP interrupt mask bits"] -pub type OEPM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type OEPM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP interrupt mask bits"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN EP interrupt mask bits"] #[inline(always)] #[must_use] - pub fn iepm(&mut self) -> IEPM_W { - IEPM_W::new(self) + pub fn iepm(&mut self) -> IEPM_W { + IEPM_W::new(self, 0) } #[doc = "Bits 16:31 - OUT EP interrupt mask bits"] #[inline(always)] #[must_use] - pub fn oepm(&mut self) -> OEPM_W { - OEPM_W::new(self) + pub fn oepm(&mut self) -> OEPM_W { + OEPM_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/dcfg.rs b/crates/bcm2711-lpa/src/usb_otg_device/dcfg.rs index fc2bbc8..e1c82c1 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/dcfg.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/dcfg.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `DSPD` reader - Device speed"] pub type DSPD_R = crate::FieldReader; #[doc = "Field `DSPD` writer - Device speed"] -pub type DSPD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type DSPD_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `NZLSOHSK` reader - Nonzero-length status OUT handshake"] pub type NZLSOHSK_R = crate::BitReader; #[doc = "Field `NZLSOHSK` writer - Nonzero-length status OUT handshake"] -pub type NZLSOHSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NZLSOHSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAD` reader - Device address"] pub type DAD_R = crate::FieldReader; #[doc = "Field `DAD` writer - Device address"] -pub type DAD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type DAD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PFIVL` reader - Periodic (micro)frame interval"] pub type PFIVL_R = crate::FieldReader; #[doc = "Field `PFIVL` writer - Periodic (micro)frame interval"] -pub type PFIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PFIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PERSCHIVL` reader - Periodic scheduling interval"] pub type PERSCHIVL_R = crate::FieldReader; #[doc = "Field `PERSCHIVL` writer - Periodic scheduling interval"] -pub type PERSCHIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PERSCHIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] #[must_use] - pub fn dspd(&mut self) -> DSPD_W { - DSPD_W::new(self) + pub fn dspd(&mut self) -> DSPD_W { + DSPD_W::new(self, 0) } #[doc = "Bit 2 - Nonzero-length status OUT handshake"] #[inline(always)] #[must_use] - pub fn nzlsohsk(&mut self) -> NZLSOHSK_W { - NZLSOHSK_W::new(self) + pub fn nzlsohsk(&mut self) -> NZLSOHSK_W { + NZLSOHSK_W::new(self, 2) } #[doc = "Bits 4:10 - Device address"] #[inline(always)] #[must_use] - pub fn dad(&mut self) -> DAD_W { - DAD_W::new(self) + pub fn dad(&mut self) -> DAD_W { + DAD_W::new(self, 4) } #[doc = "Bits 11:12 - Periodic (micro)frame interval"] #[inline(always)] #[must_use] - pub fn pfivl(&mut self) -> PFIVL_W { - PFIVL_W::new(self) + pub fn pfivl(&mut self) -> PFIVL_W { + PFIVL_W::new(self, 11) } #[doc = "Bits 24:25 - Periodic scheduling interval"] #[inline(always)] #[must_use] - pub fn perschivl(&mut self) -> PERSCHIVL_W { - PERSCHIVL_W::new(self) + pub fn perschivl(&mut self) -> PERSCHIVL_W { + PERSCHIVL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/dctl.rs b/crates/bcm2711-lpa/src/usb_otg_device/dctl.rs index 42ffebd..cd2765c 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/dctl.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/dctl.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `RWUSIG` reader - Remote wakeup signaling"] pub type RWUSIG_R = crate::BitReader; #[doc = "Field `RWUSIG` writer - Remote wakeup signaling"] -pub type RWUSIG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RWUSIG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIS` reader - Soft disconnect"] pub type SDIS_R = crate::BitReader; #[doc = "Field `SDIS` writer - Soft disconnect"] -pub type SDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINSTS` reader - Global IN NAK status"] pub type GINSTS_R = crate::BitReader; #[doc = "Field `GONSTS` reader - Global OUT NAK status"] @@ -17,19 +17,19 @@ pub type GONSTS_R = crate::BitReader; #[doc = "Field `TCTL` reader - Test control"] pub type TCTL_R = crate::FieldReader; #[doc = "Field `TCTL` writer - Test control"] -pub type TCTL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SGINAK` writer - Set global IN NAK"] -pub type SGINAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SGINAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGINAK` writer - Clear global IN NAK"] -pub type CGINAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CGINAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SGONAK` writer - Set global OUT NAK"] -pub type SGONAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SGONAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGONAK` writer - Clear global OUT NAK"] -pub type CGONAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CGONAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POPRGDNE` reader - Power-on programming done"] pub type POPRGDNE_R = crate::BitReader; #[doc = "Field `POPRGDNE` writer - Power-on programming done"] -pub type POPRGDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POPRGDNE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Remote wakeup signaling"] #[inline(always)] @@ -76,57 +76,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Remote wakeup signaling"] #[inline(always)] #[must_use] - pub fn rwusig(&mut self) -> RWUSIG_W { - RWUSIG_W::new(self) + pub fn rwusig(&mut self) -> RWUSIG_W { + RWUSIG_W::new(self, 0) } #[doc = "Bit 1 - Soft disconnect"] #[inline(always)] #[must_use] - pub fn sdis(&mut self) -> SDIS_W { - SDIS_W::new(self) + pub fn sdis(&mut self) -> SDIS_W { + SDIS_W::new(self, 1) } #[doc = "Bits 4:6 - Test control"] #[inline(always)] #[must_use] - pub fn tctl(&mut self) -> TCTL_W { - TCTL_W::new(self) + pub fn tctl(&mut self) -> TCTL_W { + TCTL_W::new(self, 4) } #[doc = "Bit 7 - Set global IN NAK"] #[inline(always)] #[must_use] - pub fn sginak(&mut self) -> SGINAK_W { - SGINAK_W::new(self) + pub fn sginak(&mut self) -> SGINAK_W { + SGINAK_W::new(self, 7) } #[doc = "Bit 8 - Clear global IN NAK"] #[inline(always)] #[must_use] - pub fn cginak(&mut self) -> CGINAK_W { - CGINAK_W::new(self) + pub fn cginak(&mut self) -> CGINAK_W { + CGINAK_W::new(self, 8) } #[doc = "Bit 9 - Set global OUT NAK"] #[inline(always)] #[must_use] - pub fn sgonak(&mut self) -> SGONAK_W { - SGONAK_W::new(self) + pub fn sgonak(&mut self) -> SGONAK_W { + SGONAK_W::new(self, 9) } #[doc = "Bit 10 - Clear global OUT NAK"] #[inline(always)] #[must_use] - pub fn cgonak(&mut self) -> CGONAK_W { - CGONAK_W::new(self) + pub fn cgonak(&mut self) -> CGONAK_W { + CGONAK_W::new(self, 10) } #[doc = "Bit 11 - Power-on programming done"] #[inline(always)] #[must_use] - pub fn poprgdne(&mut self) -> POPRGDNE_W { - POPRGDNE_W::new(self) + pub fn poprgdne(&mut self) -> POPRGDNE_W { + POPRGDNE_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/deachint.rs b/crates/bcm2711-lpa/src/usb_otg_device/deachint.rs index f8f0c35..7e2e5d4 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/deachint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/deachint.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEP1INT` reader - IN endpoint 1interrupt bit"] pub type IEP1INT_R = crate::BitReader; #[doc = "Field `IEP1INT` writer - IN endpoint 1interrupt bit"] -pub type IEP1INT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEP1INT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEP1INT` reader - OUT endpoint 1 interrupt bit"] pub type OEP1INT_R = crate::BitReader; #[doc = "Field `OEP1INT` writer - OUT endpoint 1 interrupt bit"] -pub type OEP1INT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEP1INT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - IN endpoint 1interrupt bit"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - IN endpoint 1interrupt bit"] #[inline(always)] #[must_use] - pub fn iep1int(&mut self) -> IEP1INT_W { - IEP1INT_W::new(self) + pub fn iep1int(&mut self) -> IEP1INT_W { + IEP1INT_W::new(self, 1) } #[doc = "Bit 17 - OUT endpoint 1 interrupt bit"] #[inline(always)] #[must_use] - pub fn oep1int(&mut self) -> OEP1INT_W { - OEP1INT_W::new(self) + pub fn oep1int(&mut self) -> OEP1INT_W { + OEP1INT_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/deachintmsk.rs b/crates/bcm2711-lpa/src/usb_otg_device/deachintmsk.rs index 8979089..ef76a4e 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/deachintmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/deachintmsk.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEP1INTM` reader - IN Endpoint 1 interrupt mask bit"] pub type IEP1INTM_R = crate::BitReader; #[doc = "Field `IEP1INTM` writer - IN Endpoint 1 interrupt mask bit"] -pub type IEP1INTM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEP1INTM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEP1INTM` reader - OUT Endpoint 1 interrupt mask bit"] pub type OEP1INTM_R = crate::BitReader; #[doc = "Field `OEP1INTM` writer - OUT Endpoint 1 interrupt mask bit"] -pub type OEP1INTM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEP1INTM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - IN Endpoint 1 interrupt mask bit"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - IN Endpoint 1 interrupt mask bit"] #[inline(always)] #[must_use] - pub fn iep1intm(&mut self) -> IEP1INTM_W { - IEP1INTM_W::new(self) + pub fn iep1intm(&mut self) -> IEP1INTM_W { + IEP1INTM_W::new(self, 1) } #[doc = "Bit 17 - OUT Endpoint 1 interrupt mask bit"] #[inline(always)] #[must_use] - pub fn oep1intm(&mut self) -> OEP1INTM_W { - OEP1INTM_W::new(self) + pub fn oep1intm(&mut self) -> OEP1INTM_W { + OEP1INTM_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/diepeachmsk1.rs b/crates/bcm2711-lpa/src/usb_otg_device/diepeachmsk1.rs index b6d85a8..015ca9a 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/diepeachmsk1.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/diepeachmsk1.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask (nonisochronous endpoints)"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask (nonisochronous endpoints)"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - FIFO underrun mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - FIFO underrun mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask (nonisochronous endpoints)"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - FIFO underrun mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = "Bit 13 - NAK interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/diepempmsk.rs b/crates/bcm2711-lpa/src/usb_otg_device/diepempmsk.rs index 89831f3..f81b3f4 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/diepempmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/diepempmsk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `INEPTXFEM` reader - IN EP Tx FIFO empty interrupt mask bits"] pub type INEPTXFEM_R = crate::FieldReader; #[doc = "Field `INEPTXFEM` writer - IN EP Tx FIFO empty interrupt mask bits"] -pub type INEPTXFEM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFEM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits"] #[inline(always)] #[must_use] - pub fn ineptxfem(&mut self) -> INEPTXFEM_W { - INEPTXFEM_W::new(self) + pub fn ineptxfem(&mut self) -> INEPTXFEM_W { + INEPTXFEM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/diepmsk.rs b/crates/bcm2711-lpa/src/usb_otg_device/diepmsk.rs index 8bd397c..da31f73 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/diepmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/diepmsk.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask (nonisochronous endpoints)"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask (nonisochronous endpoints)"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - FIFO underrun mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - FIFO underrun mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -92,57 +92,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask (nonisochronous endpoints)"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - FIFO underrun mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/doepeachmsk1.rs b/crates/bcm2711-lpa/src/usb_otg_device/doepeachmsk1.rs index 7c60dcc..9d7c73d 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/doepeachmsk1.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/doepeachmsk1.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - OUT packet error mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - OUT packet error mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERRM` reader - Bubble error interrupt mask"] pub type BERRM_R = crate::BitReader; #[doc = "Field `BERRM` writer - Bubble error interrupt mask"] -pub type BERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETM` reader - NYET interrupt mask"] pub type NYETM_R = crate::BitReader; #[doc = "Field `NYETM` writer - NYET interrupt mask"] -pub type NYETM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYETM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - OUT packet error mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = "Bit 12 - Bubble error interrupt mask"] #[inline(always)] #[must_use] - pub fn berrm(&mut self) -> BERRM_W { - BERRM_W::new(self) + pub fn berrm(&mut self) -> BERRM_W { + BERRM_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt mask"] #[inline(always)] #[must_use] - pub fn nyetm(&mut self) -> NYETM_W { - NYETM_W::new(self) + pub fn nyetm(&mut self) -> NYETM_W { + NYETM_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/doepmsk.rs b/crates/bcm2711-lpa/src/usb_otg_device/doepmsk.rs index dbed437..5613f52 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/doepmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/doepmsk.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUPM` reader - SETUP phase done mask"] pub type STUPM_R = crate::BitReader; #[doc = "Field `STUPM` writer - SETUP phase done mask"] -pub type STUPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STUPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTEPDM` reader - OUT token received when endpoint disabled mask"] pub type OTEPDM_R = crate::BitReader; #[doc = "Field `OTEPDM` writer - OUT token received when endpoint disabled mask"] -pub type OTEPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTEPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `B2BSTUP` reader - Back-to-back SETUP packets received mask"] pub type B2BSTUP_R = crate::BitReader; #[doc = "Field `B2BSTUP` writer - Back-to-back SETUP packets received mask"] -pub type B2BSTUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type B2BSTUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OPEM` reader - OUT packet error mask"] pub type OPEM_R = crate::BitReader; #[doc = "Field `OPEM` writer - OUT packet error mask"] -pub type OPEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OPEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOIM` reader - BNA interrupt mask"] pub type BOIM_R = crate::BitReader; #[doc = "Field `BOIM` writer - BNA interrupt mask"] -pub type BOIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - SETUP phase done mask"] #[inline(always)] #[must_use] - pub fn stupm(&mut self) -> STUPM_W { - STUPM_W::new(self) + pub fn stupm(&mut self) -> STUPM_W { + STUPM_W::new(self, 3) } #[doc = "Bit 4 - OUT token received when endpoint disabled mask"] #[inline(always)] #[must_use] - pub fn otepdm(&mut self) -> OTEPDM_W { - OTEPDM_W::new(self) + pub fn otepdm(&mut self) -> OTEPDM_W { + OTEPDM_W::new(self, 4) } #[doc = "Bit 6 - Back-to-back SETUP packets received mask"] #[inline(always)] #[must_use] - pub fn b2bstup(&mut self) -> B2BSTUP_W { - B2BSTUP_W::new(self) + pub fn b2bstup(&mut self) -> B2BSTUP_W { + B2BSTUP_W::new(self, 6) } #[doc = "Bit 8 - OUT packet error mask"] #[inline(always)] #[must_use] - pub fn opem(&mut self) -> OPEM_W { - OPEM_W::new(self) + pub fn opem(&mut self) -> OPEM_W { + OPEM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn boim(&mut self) -> BOIM_W { - BOIM_W::new(self) + pub fn boim(&mut self) -> BOIM_W { + BOIM_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/dsts.rs b/crates/bcm2711-lpa/src/usb_otg_device/dsts.rs index 3d4bf4f..b9ba828 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/dsts.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/dsts.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS device status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/dthrctl.rs b/crates/bcm2711-lpa/src/usb_otg_device/dthrctl.rs index 5044505..aeb3156 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/dthrctl.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/dthrctl.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `NONISOTHREN` reader - Nonisochronous IN endpoints threshold enable"] pub type NONISOTHREN_R = crate::BitReader; #[doc = "Field `NONISOTHREN` writer - Nonisochronous IN endpoints threshold enable"] -pub type NONISOTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NONISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOTHREN` reader - ISO IN endpoint threshold enable"] pub type ISOTHREN_R = crate::BitReader; #[doc = "Field `ISOTHREN` writer - ISO IN endpoint threshold enable"] -pub type ISOTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTHRLEN` reader - Transmit threshold length"] pub type TXTHRLEN_R = crate::FieldReader; #[doc = "Field `TXTHRLEN` writer - Transmit threshold length"] -pub type TXTHRLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 9, O, u16>; +pub type TXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `RXTHREN` reader - Receive threshold enable"] pub type RXTHREN_R = crate::BitReader; #[doc = "Field `RXTHREN` writer - Receive threshold enable"] -pub type RXTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTHRLEN` reader - Receive threshold length"] pub type RXTHRLEN_R = crate::FieldReader; #[doc = "Field `RXTHRLEN` writer - Receive threshold length"] -pub type RXTHRLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 9, O, u16>; +pub type RXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `ARPEN` reader - Arbiter parking enable"] pub type ARPEN_R = crate::BitReader; #[doc = "Field `ARPEN` writer - Arbiter parking enable"] -pub type ARPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARPEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Nonisochronous IN endpoints threshold enable"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Nonisochronous IN endpoints threshold enable"] #[inline(always)] #[must_use] - pub fn nonisothren(&mut self) -> NONISOTHREN_W { - NONISOTHREN_W::new(self) + pub fn nonisothren(&mut self) -> NONISOTHREN_W { + NONISOTHREN_W::new(self, 0) } #[doc = "Bit 1 - ISO IN endpoint threshold enable"] #[inline(always)] #[must_use] - pub fn isothren(&mut self) -> ISOTHREN_W { - ISOTHREN_W::new(self) + pub fn isothren(&mut self) -> ISOTHREN_W { + ISOTHREN_W::new(self, 1) } #[doc = "Bits 2:10 - Transmit threshold length"] #[inline(always)] #[must_use] - pub fn txthrlen(&mut self) -> TXTHRLEN_W { - TXTHRLEN_W::new(self) + pub fn txthrlen(&mut self) -> TXTHRLEN_W { + TXTHRLEN_W::new(self, 2) } #[doc = "Bit 16 - Receive threshold enable"] #[inline(always)] #[must_use] - pub fn rxthren(&mut self) -> RXTHREN_W { - RXTHREN_W::new(self) + pub fn rxthren(&mut self) -> RXTHREN_W { + RXTHREN_W::new(self, 16) } #[doc = "Bits 17:25 - Receive threshold length"] #[inline(always)] #[must_use] - pub fn rxthrlen(&mut self) -> RXTHRLEN_W { - RXTHRLEN_W::new(self) + pub fn rxthrlen(&mut self) -> RXTHRLEN_W { + RXTHRLEN_W::new(self, 17) } #[doc = "Bit 27 - Arbiter parking enable"] #[inline(always)] #[must_use] - pub fn arpen(&mut self) -> ARPEN_W { - ARPEN_W::new(self) + pub fn arpen(&mut self) -> ARPEN_W { + ARPEN_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/dvbusdis.rs b/crates/bcm2711-lpa/src/usb_otg_device/dvbusdis.rs index 06b297e..d2f9b3b 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/dvbusdis.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/dvbusdis.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `VBUSDT` reader - Device VBUS discharge time"] pub type VBUSDT_R = crate::FieldReader; #[doc = "Field `VBUSDT` writer - Device VBUS discharge time"] -pub type VBUSDT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type VBUSDT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] #[must_use] - pub fn vbusdt(&mut self) -> VBUSDT_W { - VBUSDT_W::new(self) + pub fn vbusdt(&mut self) -> VBUSDT_W { + VBUSDT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/dvbuspulse.rs b/crates/bcm2711-lpa/src/usb_otg_device/dvbuspulse.rs index 52acecf..ec93af7 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/dvbuspulse.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/dvbuspulse.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DVBUSP` reader - Device VBUS pulsing time"] pub type DVBUSP_R = crate::FieldReader; #[doc = "Field `DVBUSP` writer - Device VBUS pulsing time"] -pub type DVBUSP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DVBUSP_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] #[must_use] - pub fn dvbusp(&mut self) -> DVBUSP_W { - DVBUSP_W::new(self) + pub fn dvbusp(&mut self) -> DVBUSP_W { + DVBUSP_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint.rs b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint.rs index 0e94feb..adf4157 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint.rs @@ -2,18 +2,40 @@ #[repr(C)] #[derive(Debug)] pub struct IN_ENDPOINT { - #[doc = "0x00 - Control"] - pub diepctl0: DIEPCTL0, + diepctl0: DIEPCTL0, _reserved1: [u8; 0x04], - #[doc = "0x08 - Interrupt"] - pub diepint: DIEPINT, + diepint: DIEPINT, _reserved2: [u8; 0x04], + dieptsiz: DIEPTSIZ, + diepdma: DIEPDMA, + dtxfsts: DTXFSTS, +} +impl IN_ENDPOINT { + #[doc = "0x00 - Control"] + #[inline(always)] + pub const fn diepctl0(&self) -> &DIEPCTL0 { + &self.diepctl0 + } + #[doc = "0x08 - Interrupt"] + #[inline(always)] + pub const fn diepint(&self) -> &DIEPINT { + &self.diepint + } #[doc = "0x10 - Transfer size"] - pub dieptsiz: DIEPTSIZ, + #[inline(always)] + pub const fn dieptsiz(&self) -> &DIEPTSIZ { + &self.dieptsiz + } #[doc = "0x14 - DMA address"] - pub diepdma: DIEPDMA, + #[inline(always)] + pub const fn diepdma(&self) -> &DIEPDMA { + &self.diepdma + } #[doc = "0x18 - Transmit FIFO status"] - pub dtxfsts: DTXFSTS, + #[inline(always)] + pub const fn dtxfsts(&self) -> &DTXFSTS { + &self.dtxfsts + } } #[doc = "DIEPCTL0 (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] module"] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs index 899b0d7..95e8ccd 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `MPSIZ` reader - Maximum packet size"] pub type MPSIZ_R = crate::FieldReader; #[doc = "Field `MPSIZ` writer - Maximum packet size"] -pub type MPSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 11, O, u16>; +pub type MPSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBAEP` reader - USB active endpoint"] pub type USBAEP_R = crate::BitReader; #[doc = "Field `USBAEP` writer - USB active endpoint"] -pub type USBAEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBAEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EONUM_DPID` reader - Even/odd frame"] pub type EONUM_DPID_R = crate::BitReader; #[doc = "Field `NAKSTS` reader - NAK status"] @@ -17,31 +17,31 @@ pub type NAKSTS_R = crate::BitReader; #[doc = "Field `EPTYP` reader - Endpoint type"] pub type EPTYP_R = crate::FieldReader; #[doc = "Field `EPTYP` writer - Endpoint type"] -pub type EPTYP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type EPTYP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `Stall` reader - STALL handshake"] pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL handshake"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub type TXFNUM_R = crate::FieldReader; #[doc = "Field `TXFNUM` writer - TxFIFO number"] -pub type TXFNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SD0PID_SEVNFRM` writer - Set DATA0 PID"] -pub type SD0PID_SEVNFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SD0PID_SEVNFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SODDFRM` writer - Set odd frame"] -pub type SODDFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SODDFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDIS` reader - Endpoint disable"] pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDIS` writer - Endpoint disable"] -pub type EPDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPENA` reader - Endpoint enable"] pub type EPENA_R = crate::BitReader; #[doc = "Field `EPENA` writer - Endpoint enable"] -pub type EPENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] @@ -106,75 +106,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] #[must_use] - pub fn mpsiz(&mut self) -> MPSIZ_W { - MPSIZ_W::new(self) + pub fn mpsiz(&mut self) -> MPSIZ_W { + MPSIZ_W::new(self, 0) } #[doc = "Bit 15 - USB active endpoint"] #[inline(always)] #[must_use] - pub fn usbaep(&mut self) -> USBAEP_W { - USBAEP_W::new(self) + pub fn usbaep(&mut self) -> USBAEP_W { + USBAEP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] #[must_use] - pub fn eptyp(&mut self) -> EPTYP_W { - EPTYP_W::new(self) + pub fn eptyp(&mut self) -> EPTYP_W { + EPTYP_W::new(self, 18) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO number"] #[inline(always)] #[must_use] - pub fn txfnum(&mut self) -> TXFNUM_W { - TXFNUM_W::new(self) + pub fn txfnum(&mut self) -> TXFNUM_W { + TXFNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W { - SD0PID_SEVNFRM_W::new(self) + pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W { + SD0PID_SEVNFRM_W::new(self, 28) } #[doc = "Bit 29 - Set odd frame"] #[inline(always)] #[must_use] - pub fn soddfrm(&mut self) -> SODDFRM_W { - SODDFRM_W::new(self) + pub fn soddfrm(&mut self) -> SODDFRM_W { + SODDFRM_W::new(self, 29) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepdma.rs b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepdma.rs index 18f13ad..7dcd1b3 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepdma.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepint.rs b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepint.rs index bd21aa2..8169c15 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/diepint.rs @@ -5,45 +5,45 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed interrupt"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed interrupt"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDISD` reader - Endpoint disabled interrupt"] pub type EPDISD_R = crate::BitReader; #[doc = "Field `EPDISD` writer - Endpoint disabled interrupt"] -pub type EPDISD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDISD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOC` reader - Timeout condition"] pub type TOC_R = crate::BitReader; #[doc = "Field `TOC` writer - Timeout condition"] -pub type TOC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFE` reader - IN token received when TxFIFO is empty"] pub type ITTXFE_R = crate::BitReader; #[doc = "Field `ITTXFE` writer - IN token received when TxFIFO is empty"] -pub type ITTXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNE` reader - IN endpoint NAK effective"] pub type INEPNE_R = crate::BitReader; #[doc = "Field `INEPNE` writer - IN endpoint NAK effective"] -pub type INEPNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub type TXFE_R = crate::BitReader; #[doc = "Field `TXFIFOUDRN` reader - Transmit Fifo Underrun"] pub type TXFIFOUDRN_R = crate::BitReader; #[doc = "Field `TXFIFOUDRN` writer - Transmit Fifo Underrun"] -pub type TXFIFOUDRN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFIFOUDRN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNA` reader - Buffer not available interrupt"] pub type BNA_R = crate::BitReader; #[doc = "Field `BNA` writer - Buffer not available interrupt"] -pub type BNA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BNA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PKTDRPSTS` reader - Packet dropped status"] pub type PKTDRPSTS_R = crate::BitReader; #[doc = "Field `PKTDRPSTS` writer - Packet dropped status"] -pub type PKTDRPSTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PKTDRPSTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERR` reader - Babble error interrupt"] pub type BERR_R = crate::BitReader; #[doc = "Field `BERR` writer - Babble error interrupt"] -pub type BERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK interrupt"] pub type NAK_R = crate::BitReader; #[doc = "Field `NAK` writer - NAK interrupt"] -pub type NAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] @@ -120,69 +120,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt"] #[inline(always)] #[must_use] - pub fn epdisd(&mut self) -> EPDISD_W { - EPDISD_W::new(self) + pub fn epdisd(&mut self) -> EPDISD_W { + EPDISD_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition"] #[inline(always)] #[must_use] - pub fn toc(&mut self) -> TOC_W { - TOC_W::new(self) + pub fn toc(&mut self) -> TOC_W { + TOC_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO is empty"] #[inline(always)] #[must_use] - pub fn ittxfe(&mut self) -> ITTXFE_W { - ITTXFE_W::new(self) + pub fn ittxfe(&mut self) -> ITTXFE_W { + ITTXFE_W::new(self, 4) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] #[must_use] - pub fn inepne(&mut self) -> INEPNE_W { - INEPNE_W::new(self) + pub fn inepne(&mut self) -> INEPNE_W { + INEPNE_W::new(self, 6) } #[doc = "Bit 8 - Transmit Fifo Underrun"] #[inline(always)] #[must_use] - pub fn txfifoudrn(&mut self) -> TXFIFOUDRN_W { - TXFIFOUDRN_W::new(self) + pub fn txfifoudrn(&mut self) -> TXFIFOUDRN_W { + TXFIFOUDRN_W::new(self, 8) } #[doc = "Bit 9 - Buffer not available interrupt"] #[inline(always)] #[must_use] - pub fn bna(&mut self) -> BNA_W { - BNA_W::new(self) + pub fn bna(&mut self) -> BNA_W { + BNA_W::new(self, 9) } #[doc = "Bit 11 - Packet dropped status"] #[inline(always)] #[must_use] - pub fn pktdrpsts(&mut self) -> PKTDRPSTS_W { - PKTDRPSTS_W::new(self) + pub fn pktdrpsts(&mut self) -> PKTDRPSTS_W { + PKTDRPSTS_W::new(self, 11) } #[doc = "Bit 12 - Babble error interrupt"] #[inline(always)] #[must_use] - pub fn berr(&mut self) -> BERR_W { - BERR_W::new(self) + pub fn berr(&mut self) -> BERR_W { + BERR_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self) + pub fn nak(&mut self) -> NAK_W { + NAK_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs index 72226f2..097425e 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::FieldReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PKTCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bits 19:20 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs index abe4eef..9a29e2d 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Transmit FIFO status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint.rs b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint.rs index 360b7f9..4847d95 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint.rs @@ -2,16 +2,34 @@ #[repr(C)] #[derive(Debug)] pub struct OUT_ENDPOINT { - #[doc = "0x00 - Control"] - pub doepctl: DOEPCTL, + doepctl: DOEPCTL, _reserved1: [u8; 0x04], - #[doc = "0x08 - Interrupt"] - pub doepint: DOEPINT, + doepint: DOEPINT, _reserved2: [u8; 0x04], + doeptsiz: DOEPTSIZ, + doepdma: DOEPDMA, +} +impl OUT_ENDPOINT { + #[doc = "0x00 - Control"] + #[inline(always)] + pub const fn doepctl(&self) -> &DOEPCTL { + &self.doepctl + } + #[doc = "0x08 - Interrupt"] + #[inline(always)] + pub const fn doepint(&self) -> &DOEPINT { + &self.doepint + } #[doc = "0x10 - Transfer size"] - pub doeptsiz: DOEPTSIZ, + #[inline(always)] + pub const fn doeptsiz(&self) -> &DOEPTSIZ { + &self.doeptsiz + } #[doc = "0x14 - DMA address"] - pub doepdma: DOEPDMA, + #[inline(always)] + pub const fn doepdma(&self) -> &DOEPDMA { + &self.doepdma + } } #[doc = "DOEPCTL (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl`] module"] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepctl.rs b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepctl.rs index 47f7dd2..074b02c 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepctl.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepctl.rs @@ -13,19 +13,19 @@ pub type EPTYP_R = crate::FieldReader; #[doc = "Field `SNPM` reader - Snoop mode"] pub type SNPM_R = crate::BitReader; #[doc = "Field `SNPM` writer - Snoop mode"] -pub type SNPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL handshake"] pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL handshake"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDIS` reader - Endpoint disable"] pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPENA` writer - Endpoint enable"] -pub type EPENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum packet size"] #[inline(always)] @@ -78,39 +78,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 20 - Snoop mode"] #[inline(always)] #[must_use] - pub fn snpm(&mut self) -> SNPM_W { - SNPM_W::new(self) + pub fn snpm(&mut self) -> SNPM_W { + SNPM_W::new(self, 20) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepdma.rs b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepdma.rs index ab7d95d..70f37e1 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepdma.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepint.rs b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepint.rs index 0552c9b..b756a89 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doepint.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed interrupt"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed interrupt"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDISD` reader - Endpoint disabled interrupt"] pub type EPDISD_R = crate::BitReader; #[doc = "Field `EPDISD` writer - Endpoint disabled interrupt"] -pub type EPDISD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDISD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUP` reader - SETUP phase done"] pub type STUP_R = crate::BitReader; #[doc = "Field `STUP` writer - SETUP phase done"] -pub type STUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTEPDIS` reader - OUT token received when endpoint disabled"] pub type OTEPDIS_R = crate::BitReader; #[doc = "Field `OTEPDIS` writer - OUT token received when endpoint disabled"] -pub type OTEPDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTEPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `B2BSTUP` reader - Back-to-back SETUP packets received"] pub type B2BSTUP_R = crate::BitReader; #[doc = "Field `B2BSTUP` writer - Back-to-back SETUP packets received"] -pub type B2BSTUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type B2BSTUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - NYET interrupt"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - NYET interrupt"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt"] #[inline(always)] #[must_use] - pub fn epdisd(&mut self) -> EPDISD_W { - EPDISD_W::new(self) + pub fn epdisd(&mut self) -> EPDISD_W { + EPDISD_W::new(self, 1) } #[doc = "Bit 3 - SETUP phase done"] #[inline(always)] #[must_use] - pub fn stup(&mut self) -> STUP_W { - STUP_W::new(self) + pub fn stup(&mut self) -> STUP_W { + STUP_W::new(self, 3) } #[doc = "Bit 4 - OUT token received when endpoint disabled"] #[inline(always)] #[must_use] - pub fn otepdis(&mut self) -> OTEPDIS_W { - OTEPDIS_W::new(self) + pub fn otepdis(&mut self) -> OTEPDIS_W { + OTEPDIS_W::new(self, 4) } #[doc = "Bit 6 - Back-to-back SETUP packets received"] #[inline(always)] #[must_use] - pub fn b2bstup(&mut self) -> B2BSTUP_W { - B2BSTUP_W::new(self) + pub fn b2bstup(&mut self) -> B2BSTUP_W { + B2BSTUP_W::new(self, 6) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs index 4606c37..37d01d3 100644 --- a/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs +++ b/crates/bcm2711-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::BitReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PKTCNT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUPCNT` reader - SETUP packet count"] pub type STUPCNT_R = crate::FieldReader; #[doc = "Field `STUPCNT` writer - SETUP packet count"] -pub type STUPCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type STUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bit 19 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP packet count"] #[inline(always)] #[must_use] - pub fn stupcnt(&mut self) -> STUPCNT_W { - STUPCNT_W::new(self) + pub fn stupcnt(&mut self) -> STUPCNT_W { + STUPCNT_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global.rs b/crates/bcm2711-lpa/src/usb_otg_global.rs index d8a5a57..f188fac 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global.rs @@ -2,87 +2,175 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - OTG_HS control and status register"] - pub gotgctl: GOTGCTL, - #[doc = "0x04 - OTG_HS interrupt register"] - pub gotgint: GOTGINT, - #[doc = "0x08 - OTG_HS AHB configuration register"] - pub gahbcfg: GAHBCFG, - #[doc = "0x0c - OTG_HS USB configuration register"] - pub gusbcfg: GUSBCFG, - #[doc = "0x10 - OTG_HS reset register"] - pub grstctl: GRSTCTL, - #[doc = "0x14 - OTG_HS core interrupt register"] - pub gintsts: GINTSTS, - #[doc = "0x18 - OTG_HS interrupt mask register"] - pub gintmsk: GINTMSK, + gotgctl: GOTGCTL, + gotgint: GOTGINT, + gahbcfg: GAHBCFG, + gusbcfg: GUSBCFG, + grstctl: GRSTCTL, + gintsts: GINTSTS, + gintmsk: GINTMSK, _reserved_7_grxstsr: [u8; 0x04], _reserved_8_grxstsp: [u8; 0x04], - #[doc = "0x24 - OTG_HS Receive FIFO size register"] - pub grxfsiz: GRXFSIZ, + grxfsiz: GRXFSIZ, _reserved_10_gnptxfsiz_host: [u8; 0x04], - #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"] - pub gnptxsts: GNPTXSTS, + gnptxsts: GNPTXSTS, _reserved12: [u8; 0x08], - #[doc = "0x38 - OTG_HS general core configuration register"] - pub gccfg: GCCFG, - #[doc = "0x3c - OTG_HS core ID register"] - pub cid: CID, - #[doc = "0x40 - OTG_HS vendor ID register"] - pub vid: VID, - #[doc = "0x44 - Direction"] - pub hw_direction: HW_DIRECTION, - #[doc = "0x48 - Hardware Config 0"] - pub hw_config0: HW_CONFIG0, + gccfg: GCCFG, + cid: CID, + vid: VID, + hw_direction: HW_DIRECTION, + hw_config0: HW_CONFIG0, _reserved17: [u8; 0xb4], - #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"] - pub hptxfsiz: HPTXFSIZ, - #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf1: DIEPTXF1, - #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf2: DIEPTXF2, + hptxfsiz: HPTXFSIZ, + dieptxf1: DIEPTXF1, + dieptxf2: DIEPTXF2, _reserved20: [u8; 0x10], - #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf3: DIEPTXF3, - #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf4: DIEPTXF4, - #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf5: DIEPTXF5, - #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf6: DIEPTXF6, - #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf7: DIEPTXF7, + dieptxf3: DIEPTXF3, + dieptxf4: DIEPTXF4, + dieptxf5: DIEPTXF5, + dieptxf6: DIEPTXF6, + dieptxf7: DIEPTXF7, } impl RegisterBlock { + #[doc = "0x00 - OTG_HS control and status register"] + #[inline(always)] + pub const fn gotgctl(&self) -> &GOTGCTL { + &self.gotgctl + } + #[doc = "0x04 - OTG_HS interrupt register"] + #[inline(always)] + pub const fn gotgint(&self) -> &GOTGINT { + &self.gotgint + } + #[doc = "0x08 - OTG_HS AHB configuration register"] + #[inline(always)] + pub const fn gahbcfg(&self) -> &GAHBCFG { + &self.gahbcfg + } + #[doc = "0x0c - OTG_HS USB configuration register"] + #[inline(always)] + pub const fn gusbcfg(&self) -> &GUSBCFG { + &self.gusbcfg + } + #[doc = "0x10 - OTG_HS reset register"] + #[inline(always)] + pub const fn grstctl(&self) -> &GRSTCTL { + &self.grstctl + } + #[doc = "0x14 - OTG_HS core interrupt register"] + #[inline(always)] + pub const fn gintsts(&self) -> &GINTSTS { + &self.gintsts + } + #[doc = "0x18 - OTG_HS interrupt mask register"] + #[inline(always)] + pub const fn gintmsk(&self) -> &GINTMSK { + &self.gintmsk + } #[doc = "0x1c - OTG_HS Receive status debug read register (peripheral mode mode)"] #[inline(always)] pub const fn grxstsr_peripheral(&self) -> &GRXSTSR_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(28usize).cast() } + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x1c - OTG_HS Receive status debug read register (host mode)"] #[inline(always)] pub const fn grxstsr_host(&self) -> &GRXSTSR_HOST { - unsafe { &*(self as *const Self).cast::().add(28usize).cast() } + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x20 - OTG_HS status read and pop register (peripheral mode)"] #[inline(always)] pub const fn grxstsp_peripheral(&self) -> &GRXSTSP_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(32usize).cast() } + unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x20 - OTG_HS status read and pop register (host mode)"] #[inline(always)] pub const fn grxstsp_host(&self) -> &GRXSTSP_HOST { - unsafe { &*(self as *const Self).cast::().add(32usize).cast() } + unsafe { &*(self as *const Self).cast::().add(32).cast() } + } + #[doc = "0x24 - OTG_HS Receive FIFO size register"] + #[inline(always)] + pub const fn grxfsiz(&self) -> &GRXFSIZ { + &self.grxfsiz } #[doc = "0x28 - Endpoint 0 transmit FIFO size (peripheral mode)"] #[inline(always)] pub const fn tx0fsiz_peripheral(&self) -> &TX0FSIZ_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(40usize).cast() } + unsafe { &*(self as *const Self).cast::().add(40).cast() } } #[doc = "0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)"] #[inline(always)] pub const fn gnptxfsiz_host(&self) -> &GNPTXFSIZ_HOST { - unsafe { &*(self as *const Self).cast::().add(40usize).cast() } + unsafe { &*(self as *const Self).cast::().add(40).cast() } + } + #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"] + #[inline(always)] + pub const fn gnptxsts(&self) -> &GNPTXSTS { + &self.gnptxsts + } + #[doc = "0x38 - OTG_HS general core configuration register"] + #[inline(always)] + pub const fn gccfg(&self) -> &GCCFG { + &self.gccfg + } + #[doc = "0x3c - OTG_HS core ID register"] + #[inline(always)] + pub const fn cid(&self) -> &CID { + &self.cid + } + #[doc = "0x40 - OTG_HS vendor ID register"] + #[inline(always)] + pub const fn vid(&self) -> &VID { + &self.vid + } + #[doc = "0x44 - Direction"] + #[inline(always)] + pub const fn hw_direction(&self) -> &HW_DIRECTION { + &self.hw_direction + } + #[doc = "0x48 - Hardware Config 0"] + #[inline(always)] + pub const fn hw_config0(&self) -> &HW_CONFIG0 { + &self.hw_config0 + } + #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"] + #[inline(always)] + pub const fn hptxfsiz(&self) -> &HPTXFSIZ { + &self.hptxfsiz + } + #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf1(&self) -> &DIEPTXF1 { + &self.dieptxf1 + } + #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf2(&self) -> &DIEPTXF2 { + &self.dieptxf2 + } + #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf3(&self) -> &DIEPTXF3 { + &self.dieptxf3 + } + #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf4(&self) -> &DIEPTXF4 { + &self.dieptxf4 + } + #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf5(&self) -> &DIEPTXF5 { + &self.dieptxf5 + } + #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf6(&self) -> &DIEPTXF6 { + &self.dieptxf6 + } + #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf7(&self) -> &DIEPTXF7 { + &self.dieptxf7 } } #[doc = "GOTGCTL (rw) register accessor: OTG_HS control and status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgctl`] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/cid.rs b/crates/bcm2711-lpa/src/usb_otg_global/cid.rs index c840ab9..4b8e59f 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/cid.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/cid.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PRODUCT_ID` reader - Product ID field"] pub type PRODUCT_ID_R = crate::FieldReader; #[doc = "Field `PRODUCT_ID` writer - Product ID field"] -pub type PRODUCT_ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type PRODUCT_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Product ID field"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - Product ID field"] #[inline(always)] #[must_use] - pub fn product_id(&mut self) -> PRODUCT_ID_W { - PRODUCT_ID_W::new(self) + pub fn product_id(&mut self) -> PRODUCT_ID_W { + PRODUCT_ID_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf1.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf1.rs index 52be8d1..d47b830 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf1.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf1.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf2.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf2.rs index ce63253..4c6ba9e 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf2.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf2.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf3.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf3.rs index 18a518c..67c7e3d 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf3.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf3.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf4.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf4.rs index 9b23f1d..516d2f0 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf4.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf4.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf5.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf5.rs index 03b144c..33964f8 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf5.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf5.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf6.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf6.rs index 57dcb25..783237e 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf6.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf6.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf7.rs b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf7.rs index 7a99ea4..2ae512e 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/dieptxf7.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/dieptxf7.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gahbcfg.rs b/crates/bcm2711-lpa/src/usb_otg_global/gahbcfg.rs index a135db6..b2d3d76 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gahbcfg.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gahbcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `GINT` reader - Global interrupt mask"] pub type GINT_R = crate::BitReader; #[doc = "Field `GINT` writer - Global interrupt mask"] -pub type GINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AXI_BURST` reader - Maximum AXI burst length"] pub type AXI_BURST_R = crate::FieldReader; #[doc = "Maximum AXI burst length\n\nValue on reset: 0"] @@ -64,8 +64,8 @@ impl AXI_BURST_R { } } #[doc = "Field `AXI_BURST` writer - Maximum AXI burst length"] -pub type AXI_BURST_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, BURST_A>; -impl<'a, REG, const O: u8> AXI_BURST_W<'a, REG, O> +pub type AXI_BURST_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, BURST_A>; +impl<'a, REG> AXI_BURST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -94,19 +94,19 @@ where #[doc = "Field `AXI_WAIT` reader - Wait for all AXI writes before signaling DMA"] pub type AXI_WAIT_R = crate::BitReader; #[doc = "Field `AXI_WAIT` writer - Wait for all AXI writes before signaling DMA"] -pub type AXI_WAIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AXI_WAIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAEN` reader - DMA enable"] pub type DMAEN_R = crate::BitReader; #[doc = "Field `DMAEN` writer - DMA enable"] -pub type DMAEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFELVL` reader - TxFIFO empty level"] pub type TXFELVL_R = crate::BitReader; #[doc = "Field `TXFELVL` writer - TxFIFO empty level"] -pub type TXFELVL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFELVL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTXFELVL` reader - Periodic TxFIFO empty level"] pub type PTXFELVL_R = crate::BitReader; #[doc = "Field `PTXFELVL` writer - Periodic TxFIFO empty level"] -pub type PTXFELVL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTXFELVL_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Global interrupt mask"] #[inline(always)] @@ -153,45 +153,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Global interrupt mask"] #[inline(always)] #[must_use] - pub fn gint(&mut self) -> GINT_W { - GINT_W::new(self) + pub fn gint(&mut self) -> GINT_W { + GINT_W::new(self, 0) } #[doc = "Bits 1:2 - Maximum AXI burst length"] #[inline(always)] #[must_use] - pub fn axi_burst(&mut self) -> AXI_BURST_W { - AXI_BURST_W::new(self) + pub fn axi_burst(&mut self) -> AXI_BURST_W { + AXI_BURST_W::new(self, 1) } #[doc = "Bit 4 - Wait for all AXI writes before signaling DMA"] #[inline(always)] #[must_use] - pub fn axi_wait(&mut self) -> AXI_WAIT_W { - AXI_WAIT_W::new(self) + pub fn axi_wait(&mut self) -> AXI_WAIT_W { + AXI_WAIT_W::new(self, 4) } #[doc = "Bit 5 - DMA enable"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 5) } #[doc = "Bit 7 - TxFIFO empty level"] #[inline(always)] #[must_use] - pub fn txfelvl(&mut self) -> TXFELVL_W { - TXFELVL_W::new(self) + pub fn txfelvl(&mut self) -> TXFELVL_W { + TXFELVL_W::new(self, 7) } #[doc = "Bit 8 - Periodic TxFIFO empty level"] #[inline(always)] #[must_use] - pub fn ptxfelvl(&mut self) -> PTXFELVL_W { - PTXFELVL_W::new(self) + pub fn ptxfelvl(&mut self) -> PTXFELVL_W { + PTXFELVL_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gccfg.rs b/crates/bcm2711-lpa/src/usb_otg_global/gccfg.rs index 6612077..462ba59 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gccfg.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gccfg.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `PWRDWN` reader - Power down"] pub type PWRDWN_R = crate::BitReader; #[doc = "Field `PWRDWN` writer - Power down"] -pub type PWRDWN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWRDWN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2CPADEN` reader - Enable I2C bus connection for the external I2C PHY interface"] pub type I2CPADEN_R = crate::BitReader; #[doc = "Field `I2CPADEN` writer - Enable I2C bus connection for the external I2C PHY interface"] -pub type I2CPADEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2CPADEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VBUSASEN` reader - Enable the VBUS sensing device"] pub type VBUSASEN_R = crate::BitReader; #[doc = "Field `VBUSASEN` writer - Enable the VBUS sensing device"] -pub type VBUSASEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VBUSASEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VBUSBSEN` reader - Enable the VBUS sensing device"] pub type VBUSBSEN_R = crate::BitReader; #[doc = "Field `VBUSBSEN` writer - Enable the VBUS sensing device"] -pub type VBUSBSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VBUSBSEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOFOUTEN` reader - SOF output enable"] pub type SOFOUTEN_R = crate::BitReader; #[doc = "Field `SOFOUTEN` writer - SOF output enable"] -pub type SOFOUTEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOFOUTEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NOVBUSSENS` reader - VBUS sensing disable option"] pub type NOVBUSSENS_R = crate::BitReader; #[doc = "Field `NOVBUSSENS` writer - VBUS sensing disable option"] -pub type NOVBUSSENS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NOVBUSSENS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - Power down"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 16 - Power down"] #[inline(always)] #[must_use] - pub fn pwrdwn(&mut self) -> PWRDWN_W { - PWRDWN_W::new(self) + pub fn pwrdwn(&mut self) -> PWRDWN_W { + PWRDWN_W::new(self, 16) } #[doc = "Bit 17 - Enable I2C bus connection for the external I2C PHY interface"] #[inline(always)] #[must_use] - pub fn i2cpaden(&mut self) -> I2CPADEN_W { - I2CPADEN_W::new(self) + pub fn i2cpaden(&mut self) -> I2CPADEN_W { + I2CPADEN_W::new(self, 17) } #[doc = "Bit 18 - Enable the VBUS sensing device"] #[inline(always)] #[must_use] - pub fn vbusasen(&mut self) -> VBUSASEN_W { - VBUSASEN_W::new(self) + pub fn vbusasen(&mut self) -> VBUSASEN_W { + VBUSASEN_W::new(self, 18) } #[doc = "Bit 19 - Enable the VBUS sensing device"] #[inline(always)] #[must_use] - pub fn vbusbsen(&mut self) -> VBUSBSEN_W { - VBUSBSEN_W::new(self) + pub fn vbusbsen(&mut self) -> VBUSBSEN_W { + VBUSBSEN_W::new(self, 19) } #[doc = "Bit 20 - SOF output enable"] #[inline(always)] #[must_use] - pub fn sofouten(&mut self) -> SOFOUTEN_W { - SOFOUTEN_W::new(self) + pub fn sofouten(&mut self) -> SOFOUTEN_W { + SOFOUTEN_W::new(self, 20) } #[doc = "Bit 21 - VBUS sensing disable option"] #[inline(always)] #[must_use] - pub fn novbussens(&mut self) -> NOVBUSSENS_W { - NOVBUSSENS_W::new(self) + pub fn novbussens(&mut self) -> NOVBUSSENS_W { + NOVBUSSENS_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gintmsk.rs b/crates/bcm2711-lpa/src/usb_otg_global/gintmsk.rs index 1a856d7..0402414 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gintmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gintmsk.rs @@ -5,105 +5,105 @@ pub type W = crate::W; #[doc = "Field `MMISM` reader - Mode mismatch interrupt mask"] pub type MMISM_R = crate::BitReader; #[doc = "Field `MMISM` writer - Mode mismatch interrupt mask"] -pub type MMISM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MMISM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGINT` reader - OTG interrupt mask"] pub type OTGINT_R = crate::BitReader; #[doc = "Field `OTGINT` writer - OTG interrupt mask"] -pub type OTGINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTGINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOFM` reader - Start of frame mask"] pub type SOFM_R = crate::BitReader; #[doc = "Field `SOFM` writer - Start of frame mask"] -pub type SOFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFLVLM` reader - Receive FIFO nonempty mask"] pub type RXFLVLM_R = crate::BitReader; #[doc = "Field `RXFLVLM` writer - Receive FIFO nonempty mask"] -pub type RXFLVLM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFLVLM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NPTXFEM` reader - Nonperiodic TxFIFO empty mask"] pub type NPTXFEM_R = crate::BitReader; #[doc = "Field `NPTXFEM` writer - Nonperiodic TxFIFO empty mask"] -pub type NPTXFEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NPTXFEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINAKEFFM` reader - Global nonperiodic IN NAK effective mask"] pub type GINAKEFFM_R = crate::BitReader; #[doc = "Field `GINAKEFFM` writer - Global nonperiodic IN NAK effective mask"] -pub type GINAKEFFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GINAKEFFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GONAKEFFM` reader - Global OUT NAK effective mask"] pub type GONAKEFFM_R = crate::BitReader; #[doc = "Field `GONAKEFFM` writer - Global OUT NAK effective mask"] -pub type GONAKEFFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GONAKEFFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESUSPM` reader - Early suspend mask"] pub type ESUSPM_R = crate::BitReader; #[doc = "Field `ESUSPM` writer - Early suspend mask"] -pub type ESUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSUSPM` reader - USB suspend mask"] pub type USBSUSPM_R = crate::BitReader; #[doc = "Field `USBSUSPM` writer - USB suspend mask"] -pub type USBSUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBSUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRST` reader - USB reset mask"] pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRST` writer - USB reset mask"] -pub type USBRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENUMDNEM` reader - Enumeration done mask"] pub type ENUMDNEM_R = crate::BitReader; #[doc = "Field `ENUMDNEM` writer - Enumeration done mask"] -pub type ENUMDNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENUMDNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOODRPM` reader - Isochronous OUT packet dropped interrupt mask"] pub type ISOODRPM_R = crate::BitReader; #[doc = "Field `ISOODRPM` writer - Isochronous OUT packet dropped interrupt mask"] -pub type ISOODRPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOODRPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPFM` reader - End of periodic frame interrupt mask"] pub type EOPFM_R = crate::BitReader; #[doc = "Field `EOPFM` writer - End of periodic frame interrupt mask"] -pub type EOPFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOPFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPMISM` reader - Endpoint mismatch interrupt mask"] pub type EPMISM_R = crate::BitReader; #[doc = "Field `EPMISM` writer - Endpoint mismatch interrupt mask"] -pub type EPMISM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPMISM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPINT` reader - IN endpoints interrupt mask"] pub type IEPINT_R = crate::BitReader; #[doc = "Field `IEPINT` writer - IN endpoints interrupt mask"] -pub type IEPINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEPINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEPINT` reader - OUT endpoints interrupt mask"] pub type OEPINT_R = crate::BitReader; #[doc = "Field `OEPINT` writer - OUT endpoints interrupt mask"] -pub type OEPINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEPINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IISOIXFRM` reader - Incomplete isochronous IN transfer mask"] pub type IISOIXFRM_R = crate::BitReader; #[doc = "Field `IISOIXFRM` writer - Incomplete isochronous IN transfer mask"] -pub type IISOIXFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IISOIXFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PXFRM_IISOOXFRM` reader - Incomplete periodic transfer mask"] pub type PXFRM_IISOOXFRM_R = crate::BitReader; #[doc = "Field `PXFRM_IISOOXFRM` writer - Incomplete periodic transfer mask"] -pub type PXFRM_IISOOXFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PXFRM_IISOOXFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSUSPM` reader - Data fetch suspended mask"] pub type FSUSPM_R = crate::BitReader; #[doc = "Field `FSUSPM` writer - Data fetch suspended mask"] -pub type FSUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FSUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRTIM` reader - Host port interrupt mask"] pub type PRTIM_R = crate::BitReader; #[doc = "Field `HCIM` reader - Host channels interrupt mask"] pub type HCIM_R = crate::BitReader; #[doc = "Field `HCIM` writer - Host channels interrupt mask"] -pub type HCIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTXFEM` reader - Periodic TxFIFO empty mask"] pub type PTXFEM_R = crate::BitReader; #[doc = "Field `PTXFEM` writer - Periodic TxFIFO empty mask"] -pub type PTXFEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTXFEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CIDSCHGM` reader - Connector ID status change mask"] pub type CIDSCHGM_R = crate::BitReader; #[doc = "Field `CIDSCHGM` writer - Connector ID status change mask"] -pub type CIDSCHGM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CIDSCHGM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCINT` reader - Disconnect detected interrupt mask"] pub type DISCINT_R = crate::BitReader; #[doc = "Field `DISCINT` writer - Disconnect detected interrupt mask"] -pub type DISCINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DISCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRQIM` reader - Session request/new session detected interrupt mask"] pub type SRQIM_R = crate::BitReader; #[doc = "Field `SRQIM` writer - Session request/new session detected interrupt mask"] -pub type SRQIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WUIM` reader - Resume/remote wakeup detected interrupt mask"] pub type WUIM_R = crate::BitReader; #[doc = "Field `WUIM` writer - Resume/remote wakeup detected interrupt mask"] -pub type WUIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WUIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Mode mismatch interrupt mask"] #[inline(always)] @@ -273,159 +273,159 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Mode mismatch interrupt mask"] #[inline(always)] #[must_use] - pub fn mmism(&mut self) -> MMISM_W { - MMISM_W::new(self) + pub fn mmism(&mut self) -> MMISM_W { + MMISM_W::new(self, 1) } #[doc = "Bit 2 - OTG interrupt mask"] #[inline(always)] #[must_use] - pub fn otgint(&mut self) -> OTGINT_W { - OTGINT_W::new(self) + pub fn otgint(&mut self) -> OTGINT_W { + OTGINT_W::new(self, 2) } #[doc = "Bit 3 - Start of frame mask"] #[inline(always)] #[must_use] - pub fn sofm(&mut self) -> SOFM_W { - SOFM_W::new(self) + pub fn sofm(&mut self) -> SOFM_W { + SOFM_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO nonempty mask"] #[inline(always)] #[must_use] - pub fn rxflvlm(&mut self) -> RXFLVLM_W { - RXFLVLM_W::new(self) + pub fn rxflvlm(&mut self) -> RXFLVLM_W { + RXFLVLM_W::new(self, 4) } #[doc = "Bit 5 - Nonperiodic TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn nptxfem(&mut self) -> NPTXFEM_W { - NPTXFEM_W::new(self) + pub fn nptxfem(&mut self) -> NPTXFEM_W { + NPTXFEM_W::new(self, 5) } #[doc = "Bit 6 - Global nonperiodic IN NAK effective mask"] #[inline(always)] #[must_use] - pub fn ginakeffm(&mut self) -> GINAKEFFM_W { - GINAKEFFM_W::new(self) + pub fn ginakeffm(&mut self) -> GINAKEFFM_W { + GINAKEFFM_W::new(self, 6) } #[doc = "Bit 7 - Global OUT NAK effective mask"] #[inline(always)] #[must_use] - pub fn gonakeffm(&mut self) -> GONAKEFFM_W { - GONAKEFFM_W::new(self) + pub fn gonakeffm(&mut self) -> GONAKEFFM_W { + GONAKEFFM_W::new(self, 7) } #[doc = "Bit 10 - Early suspend mask"] #[inline(always)] #[must_use] - pub fn esuspm(&mut self) -> ESUSPM_W { - ESUSPM_W::new(self) + pub fn esuspm(&mut self) -> ESUSPM_W { + ESUSPM_W::new(self, 10) } #[doc = "Bit 11 - USB suspend mask"] #[inline(always)] #[must_use] - pub fn usbsuspm(&mut self) -> USBSUSPM_W { - USBSUSPM_W::new(self) + pub fn usbsuspm(&mut self) -> USBSUSPM_W { + USBSUSPM_W::new(self, 11) } #[doc = "Bit 12 - USB reset mask"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration done mask"] #[inline(always)] #[must_use] - pub fn enumdnem(&mut self) -> ENUMDNEM_W { - ENUMDNEM_W::new(self) + pub fn enumdnem(&mut self) -> ENUMDNEM_W { + ENUMDNEM_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt mask"] #[inline(always)] #[must_use] - pub fn isoodrpm(&mut self) -> ISOODRPM_W { - ISOODRPM_W::new(self) + pub fn isoodrpm(&mut self) -> ISOODRPM_W { + ISOODRPM_W::new(self, 14) } #[doc = "Bit 15 - End of periodic frame interrupt mask"] #[inline(always)] #[must_use] - pub fn eopfm(&mut self) -> EOPFM_W { - EOPFM_W::new(self) + pub fn eopfm(&mut self) -> EOPFM_W { + EOPFM_W::new(self, 15) } #[doc = "Bit 17 - Endpoint mismatch interrupt mask"] #[inline(always)] #[must_use] - pub fn epmism(&mut self) -> EPMISM_W { - EPMISM_W::new(self) + pub fn epmism(&mut self) -> EPMISM_W { + EPMISM_W::new(self, 17) } #[doc = "Bit 18 - IN endpoints interrupt mask"] #[inline(always)] #[must_use] - pub fn iepint(&mut self) -> IEPINT_W { - IEPINT_W::new(self) + pub fn iepint(&mut self) -> IEPINT_W { + IEPINT_W::new(self, 18) } #[doc = "Bit 19 - OUT endpoints interrupt mask"] #[inline(always)] #[must_use] - pub fn oepint(&mut self) -> OEPINT_W { - OEPINT_W::new(self) + pub fn oepint(&mut self) -> OEPINT_W { + OEPINT_W::new(self, 19) } #[doc = "Bit 20 - Incomplete isochronous IN transfer mask"] #[inline(always)] #[must_use] - pub fn iisoixfrm(&mut self) -> IISOIXFRM_W { - IISOIXFRM_W::new(self) + pub fn iisoixfrm(&mut self) -> IISOIXFRM_W { + IISOIXFRM_W::new(self, 20) } #[doc = "Bit 21 - Incomplete periodic transfer mask"] #[inline(always)] #[must_use] - pub fn pxfrm_iisooxfrm(&mut self) -> PXFRM_IISOOXFRM_W { - PXFRM_IISOOXFRM_W::new(self) + pub fn pxfrm_iisooxfrm(&mut self) -> PXFRM_IISOOXFRM_W { + PXFRM_IISOOXFRM_W::new(self, 21) } #[doc = "Bit 22 - Data fetch suspended mask"] #[inline(always)] #[must_use] - pub fn fsuspm(&mut self) -> FSUSPM_W { - FSUSPM_W::new(self) + pub fn fsuspm(&mut self) -> FSUSPM_W { + FSUSPM_W::new(self, 22) } #[doc = "Bit 25 - Host channels interrupt mask"] #[inline(always)] #[must_use] - pub fn hcim(&mut self) -> HCIM_W { - HCIM_W::new(self) + pub fn hcim(&mut self) -> HCIM_W { + HCIM_W::new(self, 25) } #[doc = "Bit 26 - Periodic TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ptxfem(&mut self) -> PTXFEM_W { - PTXFEM_W::new(self) + pub fn ptxfem(&mut self) -> PTXFEM_W { + PTXFEM_W::new(self, 26) } #[doc = "Bit 28 - Connector ID status change mask"] #[inline(always)] #[must_use] - pub fn cidschgm(&mut self) -> CIDSCHGM_W { - CIDSCHGM_W::new(self) + pub fn cidschgm(&mut self) -> CIDSCHGM_W { + CIDSCHGM_W::new(self, 28) } #[doc = "Bit 29 - Disconnect detected interrupt mask"] #[inline(always)] #[must_use] - pub fn discint(&mut self) -> DISCINT_W { - DISCINT_W::new(self) + pub fn discint(&mut self) -> DISCINT_W { + DISCINT_W::new(self, 29) } #[doc = "Bit 30 - Session request/new session detected interrupt mask"] #[inline(always)] #[must_use] - pub fn srqim(&mut self) -> SRQIM_W { - SRQIM_W::new(self) + pub fn srqim(&mut self) -> SRQIM_W { + SRQIM_W::new(self, 30) } #[doc = "Bit 31 - Resume/remote wakeup detected interrupt mask"] #[inline(always)] #[must_use] - pub fn wuim(&mut self) -> WUIM_W { - WUIM_W::new(self) + pub fn wuim(&mut self) -> WUIM_W { + WUIM_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gintsts.rs b/crates/bcm2711-lpa/src/usb_otg_global/gintsts.rs index 513d718..ba0c53b 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gintsts.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gintsts.rs @@ -7,13 +7,13 @@ pub type CMOD_R = crate::BitReader; #[doc = "Field `MMIS` reader - Mode mismatch interrupt"] pub type MMIS_R = crate::BitReader; #[doc = "Field `MMIS` writer - Mode mismatch interrupt"] -pub type MMIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MMIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGINT` reader - OTG interrupt"] pub type OTGINT_R = crate::BitReader; #[doc = "Field `SOF` reader - Start of frame"] pub type SOF_R = crate::BitReader; #[doc = "Field `SOF` writer - Start of frame"] -pub type SOF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFLVL` reader - RxFIFO nonempty"] pub type RXFLVL_R = crate::BitReader; #[doc = "Field `NPTXFE` reader - Nonperiodic TxFIFO empty"] @@ -25,27 +25,27 @@ pub type BOUTNAKEFF_R = crate::BitReader; #[doc = "Field `ESUSP` reader - Early suspend"] pub type ESUSP_R = crate::BitReader; #[doc = "Field `ESUSP` writer - Early suspend"] -pub type ESUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSUSP` reader - USB suspend"] pub type USBSUSP_R = crate::BitReader; #[doc = "Field `USBSUSP` writer - USB suspend"] -pub type USBSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRST` reader - USB reset"] pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRST` writer - USB reset"] -pub type USBRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENUMDNE` reader - Enumeration done"] pub type ENUMDNE_R = crate::BitReader; #[doc = "Field `ENUMDNE` writer - Enumeration done"] -pub type ENUMDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENUMDNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOODRP` reader - Isochronous OUT packet dropped interrupt"] pub type ISOODRP_R = crate::BitReader; #[doc = "Field `ISOODRP` writer - Isochronous OUT packet dropped interrupt"] -pub type ISOODRP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOODRP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPF` reader - End of periodic frame interrupt"] pub type EOPF_R = crate::BitReader; #[doc = "Field `EOPF` writer - End of periodic frame interrupt"] -pub type EOPF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOPF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPINT` reader - IN endpoint interrupt"] pub type IEPINT_R = crate::BitReader; #[doc = "Field `OEPINT` reader - OUT endpoint interrupt"] @@ -53,15 +53,15 @@ pub type OEPINT_R = crate::BitReader; #[doc = "Field `IISOIXFR` reader - Incomplete isochronous IN transfer"] pub type IISOIXFR_R = crate::BitReader; #[doc = "Field `IISOIXFR` writer - Incomplete isochronous IN transfer"] -pub type IISOIXFR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IISOIXFR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PXFR_INCOMPISOOUT` reader - Incomplete periodic transfer"] pub type PXFR_INCOMPISOOUT_R = crate::BitReader; #[doc = "Field `PXFR_INCOMPISOOUT` writer - Incomplete periodic transfer"] -pub type PXFR_INCOMPISOOUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PXFR_INCOMPISOOUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATAFSUSP` reader - Data fetch suspended"] pub type DATAFSUSP_R = crate::BitReader; #[doc = "Field `DATAFSUSP` writer - Data fetch suspended"] -pub type DATAFSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATAFSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HPRTINT` reader - Host port interrupt"] pub type HPRTINT_R = crate::BitReader; #[doc = "Field `HCINT` reader - Host channels interrupt"] @@ -71,19 +71,19 @@ pub type PTXFE_R = crate::BitReader; #[doc = "Field `CIDSCHG` reader - Connector ID status change"] pub type CIDSCHG_R = crate::BitReader; #[doc = "Field `CIDSCHG` writer - Connector ID status change"] -pub type CIDSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CIDSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCINT` reader - Disconnect detected interrupt"] pub type DISCINT_R = crate::BitReader; #[doc = "Field `DISCINT` writer - Disconnect detected interrupt"] -pub type DISCINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DISCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRQINT` reader - Session request/new session detected interrupt"] pub type SRQINT_R = crate::BitReader; #[doc = "Field `SRQINT` writer - Session request/new session detected interrupt"] -pub type SRQINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WKUINT` reader - Resume/remote wakeup detected interrupt"] pub type WKUINT_R = crate::BitReader; #[doc = "Field `WKUINT` writer - Resume/remote wakeup detected interrupt"] -pub type WKUINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WKUINT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Current mode of operation"] #[inline(always)] @@ -253,99 +253,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Mode mismatch interrupt"] #[inline(always)] #[must_use] - pub fn mmis(&mut self) -> MMIS_W { - MMIS_W::new(self) + pub fn mmis(&mut self) -> MMIS_W { + MMIS_W::new(self, 1) } #[doc = "Bit 3 - Start of frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SOF_W { - SOF_W::new(self) + pub fn sof(&mut self) -> SOF_W { + SOF_W::new(self, 3) } #[doc = "Bit 10 - Early suspend"] #[inline(always)] #[must_use] - pub fn esusp(&mut self) -> ESUSP_W { - ESUSP_W::new(self) + pub fn esusp(&mut self) -> ESUSP_W { + ESUSP_W::new(self, 10) } #[doc = "Bit 11 - USB suspend"] #[inline(always)] #[must_use] - pub fn usbsusp(&mut self) -> USBSUSP_W { - USBSUSP_W::new(self) + pub fn usbsusp(&mut self) -> USBSUSP_W { + USBSUSP_W::new(self, 11) } #[doc = "Bit 12 - USB reset"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration done"] #[inline(always)] #[must_use] - pub fn enumdne(&mut self) -> ENUMDNE_W { - ENUMDNE_W::new(self) + pub fn enumdne(&mut self) -> ENUMDNE_W { + ENUMDNE_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt"] #[inline(always)] #[must_use] - pub fn isoodrp(&mut self) -> ISOODRP_W { - ISOODRP_W::new(self) + pub fn isoodrp(&mut self) -> ISOODRP_W { + ISOODRP_W::new(self, 14) } #[doc = "Bit 15 - End of periodic frame interrupt"] #[inline(always)] #[must_use] - pub fn eopf(&mut self) -> EOPF_W { - EOPF_W::new(self) + pub fn eopf(&mut self) -> EOPF_W { + EOPF_W::new(self, 15) } #[doc = "Bit 20 - Incomplete isochronous IN transfer"] #[inline(always)] #[must_use] - pub fn iisoixfr(&mut self) -> IISOIXFR_W { - IISOIXFR_W::new(self) + pub fn iisoixfr(&mut self) -> IISOIXFR_W { + IISOIXFR_W::new(self, 20) } #[doc = "Bit 21 - Incomplete periodic transfer"] #[inline(always)] #[must_use] - pub fn pxfr_incompisoout(&mut self) -> PXFR_INCOMPISOOUT_W { - PXFR_INCOMPISOOUT_W::new(self) + pub fn pxfr_incompisoout(&mut self) -> PXFR_INCOMPISOOUT_W { + PXFR_INCOMPISOOUT_W::new(self, 21) } #[doc = "Bit 22 - Data fetch suspended"] #[inline(always)] #[must_use] - pub fn datafsusp(&mut self) -> DATAFSUSP_W { - DATAFSUSP_W::new(self) + pub fn datafsusp(&mut self) -> DATAFSUSP_W { + DATAFSUSP_W::new(self, 22) } #[doc = "Bit 28 - Connector ID status change"] #[inline(always)] #[must_use] - pub fn cidschg(&mut self) -> CIDSCHG_W { - CIDSCHG_W::new(self) + pub fn cidschg(&mut self) -> CIDSCHG_W { + CIDSCHG_W::new(self, 28) } #[doc = "Bit 29 - Disconnect detected interrupt"] #[inline(always)] #[must_use] - pub fn discint(&mut self) -> DISCINT_W { - DISCINT_W::new(self) + pub fn discint(&mut self) -> DISCINT_W { + DISCINT_W::new(self, 29) } #[doc = "Bit 30 - Session request/new session detected interrupt"] #[inline(always)] #[must_use] - pub fn srqint(&mut self) -> SRQINT_W { - SRQINT_W::new(self) + pub fn srqint(&mut self) -> SRQINT_W { + SRQINT_W::new(self, 30) } #[doc = "Bit 31 - Resume/remote wakeup detected interrupt"] #[inline(always)] #[must_use] - pub fn wkuint(&mut self) -> WKUINT_W { - WKUINT_W::new(self) + pub fn wkuint(&mut self) -> WKUINT_W { + WKUINT_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gnptxfsiz_host.rs b/crates/bcm2711-lpa/src/usb_otg_global/gnptxfsiz_host.rs index b2b7b4e..1f2ce3c 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gnptxfsiz_host.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gnptxfsiz_host.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `NPTXFSA` reader - Nonperiodic transmit RAM start address"] pub type NPTXFSA_R = crate::FieldReader; #[doc = "Field `NPTXFSA` writer - Nonperiodic transmit RAM start address"] -pub type NPTXFSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type NPTXFSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `NPTXFD` reader - Nonperiodic TxFIFO depth"] pub type NPTXFD_R = crate::FieldReader; #[doc = "Field `NPTXFD` writer - Nonperiodic TxFIFO depth"] -pub type NPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type NPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Nonperiodic transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Nonperiodic transmit RAM start address"] #[inline(always)] #[must_use] - pub fn nptxfsa(&mut self) -> NPTXFSA_W { - NPTXFSA_W::new(self) + pub fn nptxfsa(&mut self) -> NPTXFSA_W { + NPTXFSA_W::new(self, 0) } #[doc = "Bits 16:31 - Nonperiodic TxFIFO depth"] #[inline(always)] #[must_use] - pub fn nptxfd(&mut self) -> NPTXFD_W { - NPTXFD_W::new(self) + pub fn nptxfd(&mut self) -> NPTXFD_W { + NPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gnptxsts.rs b/crates/bcm2711-lpa/src/usb_otg_global/gnptxsts.rs index 2b32a6f..297f9ca 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gnptxsts.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gnptxsts.rs @@ -34,7 +34,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS nonperiodic transmit FIFO/queue status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gotgctl.rs b/crates/bcm2711-lpa/src/usb_otg_global/gotgctl.rs index 36b3f21..ad93a29 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gotgctl.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gotgctl.rs @@ -7,21 +7,21 @@ pub type SRQSCS_R = crate::BitReader; #[doc = "Field `SRQ` reader - Session request"] pub type SRQ_R = crate::BitReader; #[doc = "Field `SRQ` writer - Session request"] -pub type SRQ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNGSCS` reader - Host negotiation success"] pub type HNGSCS_R = crate::BitReader; #[doc = "Field `HNPRQ` reader - HNP request"] pub type HNPRQ_R = crate::BitReader; #[doc = "Field `HNPRQ` writer - HNP request"] -pub type HNPRQ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNPRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HSHNPEN` reader - Host set HNP enable"] pub type HSHNPEN_R = crate::BitReader; #[doc = "Field `HSHNPEN` writer - Host set HNP enable"] -pub type HSHNPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HSHNPEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DHNPEN` reader - Device HNP enabled"] pub type DHNPEN_R = crate::BitReader; #[doc = "Field `DHNPEN` writer - Device HNP enabled"] -pub type DHNPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DHNPEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CIDSTS` reader - Connector ID status"] pub type CIDSTS_R = crate::BitReader; #[doc = "Field `DBCT` reader - Long/short debounce time"] @@ -100,33 +100,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Session request"] #[inline(always)] #[must_use] - pub fn srq(&mut self) -> SRQ_W { - SRQ_W::new(self) + pub fn srq(&mut self) -> SRQ_W { + SRQ_W::new(self, 1) } #[doc = "Bit 9 - HNP request"] #[inline(always)] #[must_use] - pub fn hnprq(&mut self) -> HNPRQ_W { - HNPRQ_W::new(self) + pub fn hnprq(&mut self) -> HNPRQ_W { + HNPRQ_W::new(self, 9) } #[doc = "Bit 10 - Host set HNP enable"] #[inline(always)] #[must_use] - pub fn hshnpen(&mut self) -> HSHNPEN_W { - HSHNPEN_W::new(self) + pub fn hshnpen(&mut self) -> HSHNPEN_W { + HSHNPEN_W::new(self, 10) } #[doc = "Bit 11 - Device HNP enabled"] #[inline(always)] #[must_use] - pub fn dhnpen(&mut self) -> DHNPEN_W { - DHNPEN_W::new(self) + pub fn dhnpen(&mut self) -> DHNPEN_W { + DHNPEN_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gotgint.rs b/crates/bcm2711-lpa/src/usb_otg_global/gotgint.rs index a44613f..820fbf5 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gotgint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gotgint.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `SEDET` reader - Session end detected"] pub type SEDET_R = crate::BitReader; #[doc = "Field `SEDET` writer - Session end detected"] -pub type SEDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SEDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRSSCHG` reader - Session request success status change"] pub type SRSSCHG_R = crate::BitReader; #[doc = "Field `SRSSCHG` writer - Session request success status change"] -pub type SRSSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRSSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNSSCHG` reader - Host negotiation success status change"] pub type HNSSCHG_R = crate::BitReader; #[doc = "Field `HNSSCHG` writer - Host negotiation success status change"] -pub type HNSSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNSSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNGDET` reader - Host negotiation detected"] pub type HNGDET_R = crate::BitReader; #[doc = "Field `HNGDET` writer - Host negotiation detected"] -pub type HNGDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNGDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADTOCHG` reader - A-device timeout change"] pub type ADTOCHG_R = crate::BitReader; #[doc = "Field `ADTOCHG` writer - A-device timeout change"] -pub type ADTOCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ADTOCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DBCDNE` reader - Debounce done"] pub type DBCDNE_R = crate::BitReader; #[doc = "Field `DBCDNE` writer - Debounce done"] -pub type DBCDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DBCDNE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - Session end detected"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 2 - Session end detected"] #[inline(always)] #[must_use] - pub fn sedet(&mut self) -> SEDET_W { - SEDET_W::new(self) + pub fn sedet(&mut self) -> SEDET_W { + SEDET_W::new(self, 2) } #[doc = "Bit 8 - Session request success status change"] #[inline(always)] #[must_use] - pub fn srsschg(&mut self) -> SRSSCHG_W { - SRSSCHG_W::new(self) + pub fn srsschg(&mut self) -> SRSSCHG_W { + SRSSCHG_W::new(self, 8) } #[doc = "Bit 9 - Host negotiation success status change"] #[inline(always)] #[must_use] - pub fn hnsschg(&mut self) -> HNSSCHG_W { - HNSSCHG_W::new(self) + pub fn hnsschg(&mut self) -> HNSSCHG_W { + HNSSCHG_W::new(self, 9) } #[doc = "Bit 17 - Host negotiation detected"] #[inline(always)] #[must_use] - pub fn hngdet(&mut self) -> HNGDET_W { - HNGDET_W::new(self) + pub fn hngdet(&mut self) -> HNGDET_W { + HNGDET_W::new(self, 17) } #[doc = "Bit 18 - A-device timeout change"] #[inline(always)] #[must_use] - pub fn adtochg(&mut self) -> ADTOCHG_W { - ADTOCHG_W::new(self) + pub fn adtochg(&mut self) -> ADTOCHG_W { + ADTOCHG_W::new(self, 18) } #[doc = "Bit 19 - Debounce done"] #[inline(always)] #[must_use] - pub fn dbcdne(&mut self) -> DBCDNE_W { - DBCDNE_W::new(self) + pub fn dbcdne(&mut self) -> DBCDNE_W { + DBCDNE_W::new(self, 19) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/grstctl.rs b/crates/bcm2711-lpa/src/usb_otg_global/grstctl.rs index 799d4ca..d12acdf 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/grstctl.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/grstctl.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `CSRST` reader - Core soft reset"] pub type CSRST_R = crate::BitReader; #[doc = "Field `CSRST` writer - Core soft reset"] -pub type CSRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HSRST` reader - HCLK soft reset"] pub type HSRST_R = crate::BitReader; #[doc = "Field `HSRST` writer - HCLK soft reset"] -pub type HSRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HSRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FCRST` reader - Host frame counter reset"] pub type FCRST_R = crate::BitReader; #[doc = "Field `FCRST` writer - Host frame counter reset"] -pub type FCRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FCRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFFLSH` reader - RxFIFO flush"] pub type RXFFLSH_R = crate::BitReader; #[doc = "Field `RXFFLSH` writer - RxFIFO flush"] -pub type RXFFLSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFFLSH` reader - TxFIFO flush"] pub type TXFFLSH_R = crate::BitReader; #[doc = "Field `TXFFLSH` writer - TxFIFO flush"] -pub type TXFFLSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub type TXFNUM_R = crate::FieldReader; #[doc = "Field `TXFNUM` writer - TxFIFO number"] -pub type TXFNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 5, O>; +pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `DMAREQ` reader - DMA request signal"] pub type DMAREQ_R = crate::BitReader; #[doc = "Field `AHBIDL` reader - AHB master idle"] @@ -88,45 +88,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Core soft reset"] #[inline(always)] #[must_use] - pub fn csrst(&mut self) -> CSRST_W { - CSRST_W::new(self) + pub fn csrst(&mut self) -> CSRST_W { + CSRST_W::new(self, 0) } #[doc = "Bit 1 - HCLK soft reset"] #[inline(always)] #[must_use] - pub fn hsrst(&mut self) -> HSRST_W { - HSRST_W::new(self) + pub fn hsrst(&mut self) -> HSRST_W { + HSRST_W::new(self, 1) } #[doc = "Bit 2 - Host frame counter reset"] #[inline(always)] #[must_use] - pub fn fcrst(&mut self) -> FCRST_W { - FCRST_W::new(self) + pub fn fcrst(&mut self) -> FCRST_W { + FCRST_W::new(self, 2) } #[doc = "Bit 4 - RxFIFO flush"] #[inline(always)] #[must_use] - pub fn rxfflsh(&mut self) -> RXFFLSH_W { - RXFFLSH_W::new(self) + pub fn rxfflsh(&mut self) -> RXFFLSH_W { + RXFFLSH_W::new(self, 4) } #[doc = "Bit 5 - TxFIFO flush"] #[inline(always)] #[must_use] - pub fn txfflsh(&mut self) -> TXFFLSH_W { - TXFFLSH_W::new(self) + pub fn txfflsh(&mut self) -> TXFFLSH_W { + TXFFLSH_W::new(self, 5) } #[doc = "Bits 6:10 - TxFIFO number"] #[inline(always)] #[must_use] - pub fn txfnum(&mut self) -> TXFNUM_W { - TXFNUM_W::new(self) + pub fn txfnum(&mut self) -> TXFNUM_W { + TXFNUM_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/grxfsiz.rs b/crates/bcm2711-lpa/src/usb_otg_global/grxfsiz.rs index b243ab8..29425cc 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/grxfsiz.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/grxfsiz.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RXFD` reader - RxFIFO depth"] pub type RXFD_R = crate::FieldReader; #[doc = "Field `RXFD` writer - RxFIFO depth"] -pub type RXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type RXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RxFIFO depth"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - RxFIFO depth"] #[inline(always)] #[must_use] - pub fn rxfd(&mut self) -> RXFD_W { - RXFD_W::new(self) + pub fn rxfd(&mut self) -> RXFD_W { + RXFD_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_host.rs b/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_host.rs index 5e8d3bb..55702c4 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_host.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_host.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS status read and pop register (host mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_host::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_peripheral.rs b/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_peripheral.rs index e28018e..a8c70b6 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_peripheral.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/grxstsp_peripheral.rs @@ -50,7 +50,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS status read and pop register (peripheral mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_peripheral::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_host.rs b/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_host.rs index e9e1ba6..766cd8d 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_host.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_host.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Receive status debug read register (host mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_host::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_peripheral.rs b/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_peripheral.rs index d6f8ca3..7083cf6 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_peripheral.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/grxstsr_peripheral.rs @@ -50,7 +50,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Receive status debug read register (peripheral mode mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_peripheral::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/gusbcfg.rs b/crates/bcm2711-lpa/src/usb_otg_global/gusbcfg.rs index b5f882e..6f9fa6e 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/gusbcfg.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/gusbcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOCAL` reader - FS timeout calibration"] pub type TOCAL_R = crate::FieldReader; #[doc = "Field `TOCAL` writer - FS timeout calibration"] -pub type TOCAL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TOCAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PHYIF` reader - PHY Interface width"] pub type PHYIF_R = crate::BitReader; #[doc = "PHY Interface width\n\nValue on reset: 0"] @@ -43,8 +43,8 @@ impl PHYIF_R { } } #[doc = "Field `PHYIF` writer - PHY Interface width"] -pub type PHYIF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYIF_A>; -impl<'a, REG, const O: u8> PHYIF_W<'a, REG, O> +pub type PHYIF_W<'a, REG> = crate::BitWriter<'a, REG, PHYIF_A>; +impl<'a, REG> PHYIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -96,8 +96,8 @@ impl PHYTYPE_R { } } #[doc = "Field `PHYTYPE` writer - PHY Type"] -pub type PHYTYPE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYTYPE_A>; -impl<'a, REG, const O: u8> PHYTYPE_W<'a, REG, O> +pub type PHYTYPE_W<'a, REG> = crate::BitWriter<'a, REG, PHYTYPE_A>; +impl<'a, REG> PHYTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -149,8 +149,8 @@ impl FSIF_R { } } #[doc = "Field `FSIF` writer - Full speed interface"] -pub type FSIF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, FSIF_A>; -impl<'a, REG, const O: u8> FSIF_W<'a, REG, O> +pub type FSIF_W<'a, REG> = crate::BitWriter<'a, REG, FSIF_A>; +impl<'a, REG> FSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -202,8 +202,8 @@ impl PHYSEL_R { } } #[doc = "Field `PHYSEL` writer - Transceiver select"] -pub type PHYSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYSEL_A>; -impl<'a, REG, const O: u8> PHYSEL_W<'a, REG, O> +pub type PHYSEL_W<'a, REG> = crate::BitWriter<'a, REG, PHYSEL_A>; +impl<'a, REG> PHYSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -255,8 +255,8 @@ impl DDRSEL_R { } } #[doc = "Field `DDRSEL` writer - ULPI data rate"] -pub type DDRSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DDRSEL_A>; -impl<'a, REG, const O: u8> DDRSEL_W<'a, REG, O> +pub type DDRSEL_W<'a, REG> = crate::BitWriter<'a, REG, DDRSEL_A>; +impl<'a, REG> DDRSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -274,67 +274,67 @@ where #[doc = "Field `SRPCAP` reader - SRP-capable"] pub type SRPCAP_R = crate::BitReader; #[doc = "Field `SRPCAP` writer - SRP-capable"] -pub type SRPCAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRPCAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNPCAP` reader - HNP-capable"] pub type HNPCAP_R = crate::BitReader; #[doc = "Field `HNPCAP` writer - HNP-capable"] -pub type HNPCAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNPCAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRDT` reader - USB turnaround time"] pub type TRDT_R = crate::FieldReader; #[doc = "Field `TRDT` writer - USB turnaround time"] -pub type TRDT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TRDT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PHYLPCS` reader - PHY Low-power clock select"] pub type PHYLPCS_R = crate::BitReader; #[doc = "Field `PHYLPCS` writer - PHY Low-power clock select"] -pub type PHYLPCS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYLPCS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIFSLS` reader - ULPI FS/LS select"] pub type ULPIFSLS_R = crate::BitReader; #[doc = "Field `ULPIFSLS` writer - ULPI FS/LS select"] -pub type ULPIFSLS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIFSLS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIAR` reader - ULPI Auto-resume"] pub type ULPIAR_R = crate::BitReader; #[doc = "Field `ULPIAR` writer - ULPI Auto-resume"] -pub type ULPIAR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIAR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPICSM` reader - ULPI Clock SuspendM"] pub type ULPICSM_R = crate::BitReader; #[doc = "Field `ULPICSM` writer - ULPI Clock SuspendM"] -pub type ULPICSM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPICSM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIEVBUSD` reader - ULPI External VBUS Drive"] pub type ULPIEVBUSD_R = crate::BitReader; #[doc = "Field `ULPIEVBUSD` writer - ULPI External VBUS Drive"] -pub type ULPIEVBUSD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIEVBUSD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIEVBUSI` reader - ULPI external VBUS indicator"] pub type ULPIEVBUSI_R = crate::BitReader; #[doc = "Field `ULPIEVBUSI` writer - ULPI external VBUS indicator"] -pub type ULPIEVBUSI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIEVBUSI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSDPS` reader - TermSel DLine pulsing selection"] pub type TSDPS_R = crate::BitReader; #[doc = "Field `TSDPS` writer - TermSel DLine pulsing selection"] -pub type TSDPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TSDPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCCI` reader - Indicator complement"] pub type PCCI_R = crate::BitReader; #[doc = "Field `PCCI` writer - Indicator complement"] -pub type PCCI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCCI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTCI` reader - Indicator pass through"] pub type PTCI_R = crate::BitReader; #[doc = "Field `PTCI` writer - Indicator pass through"] -pub type PTCI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTCI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIIPD` reader - ULPI interface protect disable"] pub type ULPIIPD_R = crate::BitReader; #[doc = "Field `ULPIIPD` writer - ULPI interface protect disable"] -pub type ULPIIPD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIIPD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FHMOD` reader - Forced host mode"] pub type FHMOD_R = crate::BitReader; #[doc = "Field `FHMOD` writer - Forced host mode"] -pub type FHMOD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FHMOD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FDMOD` reader - Forced peripheral mode"] pub type FDMOD_R = crate::BitReader; #[doc = "Field `FDMOD` writer - Forced peripheral mode"] -pub type FDMOD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FDMOD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTXPKT` reader - Corrupt Tx packet"] pub type CTXPKT_R = crate::BitReader; #[doc = "Field `CTXPKT` writer - Corrupt Tx packet"] -pub type CTXPKT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTXPKT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - FS timeout calibration"] #[inline(always)] @@ -477,141 +477,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - FS timeout calibration"] #[inline(always)] #[must_use] - pub fn tocal(&mut self) -> TOCAL_W { - TOCAL_W::new(self) + pub fn tocal(&mut self) -> TOCAL_W { + TOCAL_W::new(self, 0) } #[doc = "Bit 3 - PHY Interface width"] #[inline(always)] #[must_use] - pub fn phyif(&mut self) -> PHYIF_W { - PHYIF_W::new(self) + pub fn phyif(&mut self) -> PHYIF_W { + PHYIF_W::new(self, 3) } #[doc = "Bit 4 - PHY Type"] #[inline(always)] #[must_use] - pub fn phytype(&mut self) -> PHYTYPE_W { - PHYTYPE_W::new(self) + pub fn phytype(&mut self) -> PHYTYPE_W { + PHYTYPE_W::new(self, 4) } #[doc = "Bit 5 - Full speed interface"] #[inline(always)] #[must_use] - pub fn fsif(&mut self) -> FSIF_W { - FSIF_W::new(self) + pub fn fsif(&mut self) -> FSIF_W { + FSIF_W::new(self, 5) } #[doc = "Bit 6 - Transceiver select"] #[inline(always)] #[must_use] - pub fn physel(&mut self) -> PHYSEL_W { - PHYSEL_W::new(self) + pub fn physel(&mut self) -> PHYSEL_W { + PHYSEL_W::new(self, 6) } #[doc = "Bit 7 - ULPI data rate"] #[inline(always)] #[must_use] - pub fn ddrsel(&mut self) -> DDRSEL_W { - DDRSEL_W::new(self) + pub fn ddrsel(&mut self) -> DDRSEL_W { + DDRSEL_W::new(self, 7) } #[doc = "Bit 8 - SRP-capable"] #[inline(always)] #[must_use] - pub fn srpcap(&mut self) -> SRPCAP_W { - SRPCAP_W::new(self) + pub fn srpcap(&mut self) -> SRPCAP_W { + SRPCAP_W::new(self, 8) } #[doc = "Bit 9 - HNP-capable"] #[inline(always)] #[must_use] - pub fn hnpcap(&mut self) -> HNPCAP_W { - HNPCAP_W::new(self) + pub fn hnpcap(&mut self) -> HNPCAP_W { + HNPCAP_W::new(self, 9) } #[doc = "Bits 10:13 - USB turnaround time"] #[inline(always)] #[must_use] - pub fn trdt(&mut self) -> TRDT_W { - TRDT_W::new(self) + pub fn trdt(&mut self) -> TRDT_W { + TRDT_W::new(self, 10) } #[doc = "Bit 15 - PHY Low-power clock select"] #[inline(always)] #[must_use] - pub fn phylpcs(&mut self) -> PHYLPCS_W { - PHYLPCS_W::new(self) + pub fn phylpcs(&mut self) -> PHYLPCS_W { + PHYLPCS_W::new(self, 15) } #[doc = "Bit 17 - ULPI FS/LS select"] #[inline(always)] #[must_use] - pub fn ulpifsls(&mut self) -> ULPIFSLS_W { - ULPIFSLS_W::new(self) + pub fn ulpifsls(&mut self) -> ULPIFSLS_W { + ULPIFSLS_W::new(self, 17) } #[doc = "Bit 18 - ULPI Auto-resume"] #[inline(always)] #[must_use] - pub fn ulpiar(&mut self) -> ULPIAR_W { - ULPIAR_W::new(self) + pub fn ulpiar(&mut self) -> ULPIAR_W { + ULPIAR_W::new(self, 18) } #[doc = "Bit 19 - ULPI Clock SuspendM"] #[inline(always)] #[must_use] - pub fn ulpicsm(&mut self) -> ULPICSM_W { - ULPICSM_W::new(self) + pub fn ulpicsm(&mut self) -> ULPICSM_W { + ULPICSM_W::new(self, 19) } #[doc = "Bit 20 - ULPI External VBUS Drive"] #[inline(always)] #[must_use] - pub fn ulpievbusd(&mut self) -> ULPIEVBUSD_W { - ULPIEVBUSD_W::new(self) + pub fn ulpievbusd(&mut self) -> ULPIEVBUSD_W { + ULPIEVBUSD_W::new(self, 20) } #[doc = "Bit 21 - ULPI external VBUS indicator"] #[inline(always)] #[must_use] - pub fn ulpievbusi(&mut self) -> ULPIEVBUSI_W { - ULPIEVBUSI_W::new(self) + pub fn ulpievbusi(&mut self) -> ULPIEVBUSI_W { + ULPIEVBUSI_W::new(self, 21) } #[doc = "Bit 22 - TermSel DLine pulsing selection"] #[inline(always)] #[must_use] - pub fn tsdps(&mut self) -> TSDPS_W { - TSDPS_W::new(self) + pub fn tsdps(&mut self) -> TSDPS_W { + TSDPS_W::new(self, 22) } #[doc = "Bit 23 - Indicator complement"] #[inline(always)] #[must_use] - pub fn pcci(&mut self) -> PCCI_W { - PCCI_W::new(self) + pub fn pcci(&mut self) -> PCCI_W { + PCCI_W::new(self, 23) } #[doc = "Bit 24 - Indicator pass through"] #[inline(always)] #[must_use] - pub fn ptci(&mut self) -> PTCI_W { - PTCI_W::new(self) + pub fn ptci(&mut self) -> PTCI_W { + PTCI_W::new(self, 24) } #[doc = "Bit 25 - ULPI interface protect disable"] #[inline(always)] #[must_use] - pub fn ulpiipd(&mut self) -> ULPIIPD_W { - ULPIIPD_W::new(self) + pub fn ulpiipd(&mut self) -> ULPIIPD_W { + ULPIIPD_W::new(self, 25) } #[doc = "Bit 29 - Forced host mode"] #[inline(always)] #[must_use] - pub fn fhmod(&mut self) -> FHMOD_W { - FHMOD_W::new(self) + pub fn fhmod(&mut self) -> FHMOD_W { + FHMOD_W::new(self, 29) } #[doc = "Bit 30 - Forced peripheral mode"] #[inline(always)] #[must_use] - pub fn fdmod(&mut self) -> FDMOD_W { - FDMOD_W::new(self) + pub fn fdmod(&mut self) -> FDMOD_W { + FDMOD_W::new(self, 30) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] #[must_use] - pub fn ctxpkt(&mut self) -> CTXPKT_W { - CTXPKT_W::new(self) + pub fn ctxpkt(&mut self) -> CTXPKT_W { + CTXPKT_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/hptxfsiz.rs b/crates/bcm2711-lpa/src/usb_otg_global/hptxfsiz.rs index cd99421..9cf564b 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/hptxfsiz.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/hptxfsiz.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `PTXSA` reader - Host periodic TxFIFO start address"] pub type PTXSA_R = crate::FieldReader; #[doc = "Field `PTXSA` writer - Host periodic TxFIFO start address"] -pub type PTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTXFD` reader - Host periodic TxFIFO depth"] pub type PTXFD_R = crate::FieldReader; #[doc = "Field `PTXFD` writer - Host periodic TxFIFO depth"] -pub type PTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] #[must_use] - pub fn ptxsa(&mut self) -> PTXSA_W { - PTXSA_W::new(self) + pub fn ptxsa(&mut self) -> PTXSA_W { + PTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - Host periodic TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ptxfd(&mut self) -> PTXFD_W { - PTXFD_W::new(self) + pub fn ptxfd(&mut self) -> PTXFD_W { + PTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/hw_config0.rs b/crates/bcm2711-lpa/src/usb_otg_global/hw_config0.rs index 93348b4..1111e93 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/hw_config0.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/hw_config0.rs @@ -400,7 +400,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Hardware Config 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_config0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/hw_direction.rs b/crates/bcm2711-lpa/src/usb_otg_global/hw_direction.rs index 3545475..6428bea 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/hw_direction.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/hw_direction.rs @@ -50,9 +50,11 @@ impl DIRECTION_R { } } impl R { - #[doc = "Direction [0-15]"] + #[doc = "Direction [0-15]\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `DIRECTION0` field"] #[inline(always)] - pub unsafe fn direction(&self, n: u8) -> DIRECTION_R { + pub fn direction(&self, n: u8) -> DIRECTION_R { + #[allow(clippy::no_effect)] + [(); 16][n as usize]; DIRECTION_R::new(((self.bits >> (n * 2)) & 3) as u8) } #[doc = "Bits 0:1 - Direction 0"] @@ -178,7 +180,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Direction\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_direction::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs b/crates/bcm2711-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs index 73658ab..2afe810 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `TX0FSA` reader - Endpoint 0 transmit RAM start address"] pub type TX0FSA_R = crate::FieldReader; #[doc = "Field `TX0FSA` writer - Endpoint 0 transmit RAM start address"] -pub type TX0FSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TX0FSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `TX0FD` reader - Endpoint 0 TxFIFO depth"] pub type TX0FD_R = crate::FieldReader; #[doc = "Field `TX0FD` writer - Endpoint 0 TxFIFO depth"] -pub type TX0FD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TX0FD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Endpoint 0 transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Endpoint 0 transmit RAM start address"] #[inline(always)] #[must_use] - pub fn tx0fsa(&mut self) -> TX0FSA_W { - TX0FSA_W::new(self) + pub fn tx0fsa(&mut self) -> TX0FSA_W { + TX0FSA_W::new(self, 0) } #[doc = "Bits 16:31 - Endpoint 0 TxFIFO depth"] #[inline(always)] #[must_use] - pub fn tx0fd(&mut self) -> TX0FD_W { - TX0FD_W::new(self) + pub fn tx0fd(&mut self) -> TX0FD_W { + TX0FD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_global/vid.rs b/crates/bcm2711-lpa/src/usb_otg_global/vid.rs index 732dd16..05c4fa3 100644 --- a/crates/bcm2711-lpa/src/usb_otg_global/vid.rs +++ b/crates/bcm2711-lpa/src/usb_otg_global/vid.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS vendor ID register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_host.rs b/crates/bcm2711-lpa/src/usb_otg_host.rs index 69899f9..6322c96 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host.rs @@ -2,58 +2,136 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + hcfg: HCFG, + hfir: HFIR, + hfnum: HFNUM, + _reserved3: [u8; 0x04], + hptxsts: HPTXSTS, + haint: HAINT, + haintmsk: HAINTMSK, + _reserved6: [u8; 0x24], + hprt: HPRT, + _reserved7: [u8; 0xbc], + host_channel0: HOST_CHANNEL, + _reserved8: [u8; 0x08], + host_channel1: HOST_CHANNEL, + _reserved9: [u8; 0x08], + host_channel2: HOST_CHANNEL, + _reserved10: [u8; 0x08], + host_channel3: HOST_CHANNEL, + _reserved11: [u8; 0x08], + host_channel4: HOST_CHANNEL, + _reserved12: [u8; 0x08], + host_channel5: HOST_CHANNEL, + _reserved13: [u8; 0x08], + host_channel6: HOST_CHANNEL, + _reserved14: [u8; 0x08], + host_channel7: HOST_CHANNEL, + _reserved15: [u8; 0x08], + host_channel8: HOST_CHANNEL, + _reserved16: [u8; 0x08], + host_channel9: HOST_CHANNEL, + _reserved17: [u8; 0x08], + host_channel10: HOST_CHANNEL, + _reserved18: [u8; 0x08], + host_channel11: HOST_CHANNEL, +} +impl RegisterBlock { #[doc = "0x00 - OTG_HS host configuration register"] - pub hcfg: HCFG, + #[inline(always)] + pub const fn hcfg(&self) -> &HCFG { + &self.hcfg + } #[doc = "0x04 - OTG_HS Host frame interval register"] - pub hfir: HFIR, + #[inline(always)] + pub const fn hfir(&self) -> &HFIR { + &self.hfir + } #[doc = "0x08 - OTG_HS host frame number/frame time remaining register"] - pub hfnum: HFNUM, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn hfnum(&self) -> &HFNUM { + &self.hfnum + } #[doc = "0x10 - Host periodic transmit FIFO/queue status register"] - pub hptxsts: HPTXSTS, + #[inline(always)] + pub const fn hptxsts(&self) -> &HPTXSTS { + &self.hptxsts + } #[doc = "0x14 - OTG_HS Host all channels interrupt register"] - pub haint: HAINT, + #[inline(always)] + pub const fn haint(&self) -> &HAINT { + &self.haint + } #[doc = "0x18 - OTG_HS host all channels interrupt mask register"] - pub haintmsk: HAINTMSK, - _reserved6: [u8; 0x24], + #[inline(always)] + pub const fn haintmsk(&self) -> &HAINTMSK { + &self.haintmsk + } #[doc = "0x40 - OTG_HS host port control and status register"] - pub hprt: HPRT, - _reserved7: [u8; 0xbc], + #[inline(always)] + pub const fn hprt(&self) -> &HPRT { + &self.hprt + } #[doc = "0x100..0x118 - Host channel 0"] - pub host_channel0: HOST_CHANNEL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn host_channel0(&self) -> &HOST_CHANNEL { + &self.host_channel0 + } #[doc = "0x120..0x138 - Host channel 1"] - pub host_channel1: HOST_CHANNEL, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn host_channel1(&self) -> &HOST_CHANNEL { + &self.host_channel1 + } #[doc = "0x140..0x158 - Host channel 2"] - pub host_channel2: HOST_CHANNEL, - _reserved10: [u8; 0x08], + #[inline(always)] + pub const fn host_channel2(&self) -> &HOST_CHANNEL { + &self.host_channel2 + } #[doc = "0x160..0x178 - Host channel 3"] - pub host_channel3: HOST_CHANNEL, - _reserved11: [u8; 0x08], + #[inline(always)] + pub const fn host_channel3(&self) -> &HOST_CHANNEL { + &self.host_channel3 + } #[doc = "0x180..0x198 - Host channel 4"] - pub host_channel4: HOST_CHANNEL, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn host_channel4(&self) -> &HOST_CHANNEL { + &self.host_channel4 + } #[doc = "0x1a0..0x1b8 - Host channel 5"] - pub host_channel5: HOST_CHANNEL, - _reserved13: [u8; 0x08], + #[inline(always)] + pub const fn host_channel5(&self) -> &HOST_CHANNEL { + &self.host_channel5 + } #[doc = "0x1c0..0x1d8 - Host channel 6"] - pub host_channel6: HOST_CHANNEL, - _reserved14: [u8; 0x08], + #[inline(always)] + pub const fn host_channel6(&self) -> &HOST_CHANNEL { + &self.host_channel6 + } #[doc = "0x1e0..0x1f8 - Host channel 7"] - pub host_channel7: HOST_CHANNEL, - _reserved15: [u8; 0x08], + #[inline(always)] + pub const fn host_channel7(&self) -> &HOST_CHANNEL { + &self.host_channel7 + } #[doc = "0x200..0x218 - Host channel 8"] - pub host_channel8: HOST_CHANNEL, - _reserved16: [u8; 0x08], + #[inline(always)] + pub const fn host_channel8(&self) -> &HOST_CHANNEL { + &self.host_channel8 + } #[doc = "0x220..0x238 - Host channel 9"] - pub host_channel9: HOST_CHANNEL, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn host_channel9(&self) -> &HOST_CHANNEL { + &self.host_channel9 + } #[doc = "0x240..0x258 - Host channel 10"] - pub host_channel10: HOST_CHANNEL, - _reserved18: [u8; 0x08], + #[inline(always)] + pub const fn host_channel10(&self) -> &HOST_CHANNEL { + &self.host_channel10 + } #[doc = "0x260..0x278 - Host channel 11"] - pub host_channel11: HOST_CHANNEL, + #[inline(always)] + pub const fn host_channel11(&self) -> &HOST_CHANNEL { + &self.host_channel11 + } } #[doc = "HCFG (rw) register accessor: OTG_HS host configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcfg`] module"] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/haint.rs b/crates/bcm2711-lpa/src/usb_otg_host/haint.rs index fd11584..1dc94d5 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/haint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/haint.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Host all channels interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/haintmsk.rs b/crates/bcm2711-lpa/src/usb_otg_host/haintmsk.rs index f820459..2a95774 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/haintmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/haintmsk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `HAINTM` reader - Channel interrupt mask"] pub type HAINTM_R = crate::FieldReader; #[doc = "Field `HAINTM` writer - Channel interrupt mask"] -pub type HAINTM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type HAINTM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Channel interrupt mask"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Channel interrupt mask"] #[inline(always)] #[must_use] - pub fn haintm(&mut self) -> HAINTM_W { - HAINTM_W::new(self) + pub fn haintm(&mut self) -> HAINTM_W { + HAINTM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/hcfg.rs b/crates/bcm2711-lpa/src/usb_otg_host/hcfg.rs index af6795d..6451fdd 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/hcfg.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/hcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `FSLSPCS` reader - FS/LS PHY clock select"] pub type FSLSPCS_R = crate::FieldReader; #[doc = "Field `FSLSPCS` writer - FS/LS PHY clock select"] -pub type FSLSPCS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type FSLSPCS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FSLSS` reader - FS- and LS-only support"] pub type FSLSS_R = crate::BitReader; impl R { @@ -30,15 +30,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - FS/LS PHY clock select"] #[inline(always)] #[must_use] - pub fn fslspcs(&mut self) -> FSLSPCS_W { - FSLSPCS_W::new(self) + pub fn fslspcs(&mut self) -> FSLSPCS_W { + FSLSPCS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/hfir.rs b/crates/bcm2711-lpa/src/usb_otg_host/hfir.rs index d373916..04d2520 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/hfir.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/hfir.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `FRIVL` reader - Frame interval"] pub type FRIVL_R = crate::FieldReader; #[doc = "Field `FRIVL` writer - Frame interval"] -pub type FRIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type FRIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] #[must_use] - pub fn frivl(&mut self) -> FRIVL_W { - FRIVL_W::new(self) + pub fn frivl(&mut self) -> FRIVL_W { + FRIVL_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/hfnum.rs b/crates/bcm2711-lpa/src/usb_otg_host/hfnum.rs index 5bb48e9..b44cca5 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/hfnum.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/hfnum.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS host frame number/frame time remaining register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel.rs index 54d36d3..1ac62f9 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct HOST_CHANNEL { + hcchar: HCCHAR, + hcsplt: HCSPLT, + hcint: HCINT, + hcintmsk: HCINTMSK, + hctsiz: HCTSIZ, + hcdma: HCDMA, +} +impl HOST_CHANNEL { #[doc = "0x00 - Characteristics register"] - pub hcchar: HCCHAR, + #[inline(always)] + pub const fn hcchar(&self) -> &HCCHAR { + &self.hcchar + } #[doc = "0x04 - Split control register"] - pub hcsplt: HCSPLT, + #[inline(always)] + pub const fn hcsplt(&self) -> &HCSPLT { + &self.hcsplt + } #[doc = "0x08 - Interrupt register"] - pub hcint: HCINT, + #[inline(always)] + pub const fn hcint(&self) -> &HCINT { + &self.hcint + } #[doc = "0x0c - Interrupt mask"] - pub hcintmsk: HCINTMSK, + #[inline(always)] + pub const fn hcintmsk(&self) -> &HCINTMSK { + &self.hcintmsk + } #[doc = "0x10 - Transfer size"] - pub hctsiz: HCTSIZ, + #[inline(always)] + pub const fn hctsiz(&self) -> &HCTSIZ { + &self.hctsiz + } #[doc = "0x14 - DMA address"] - pub hcdma: HCDMA, + #[inline(always)] + pub const fn hcdma(&self) -> &HCDMA { + &self.hcdma + } } #[doc = "HCCHAR (rw) register accessor: Characteristics register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcchar`] module"] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcchar.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcchar.rs index 4bc5c53..1dcb5e3 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcchar.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcchar.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `MPSIZ` reader - Maximum packet size"] pub type MPSIZ_R = crate::FieldReader; #[doc = "Field `MPSIZ` writer - Maximum packet size"] -pub type MPSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 11, O, u16>; +pub type MPSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `EPNUM` reader - Endpoint number"] pub type EPNUM_R = crate::FieldReader; #[doc = "Field `EPNUM` writer - Endpoint number"] -pub type EPNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type EPNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `EPDIR` reader - Endpoint direction"] pub type EPDIR_R = crate::BitReader; #[doc = "Field `EPDIR` writer - Endpoint direction"] -pub type EPDIR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDIR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LSDEV` reader - Low-speed device"] pub type LSDEV_R = crate::BitReader; #[doc = "Field `LSDEV` writer - Low-speed device"] -pub type LSDEV_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LSDEV_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPTYP` reader - Endpoint type"] pub type EPTYP_R = crate::FieldReader; #[doc = "Field `EPTYP` writer - Endpoint type"] -pub type EPTYP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type EPTYP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `MC` reader - Multi Count (MC) / Error Count (EC)"] pub type MC_R = crate::FieldReader; #[doc = "Field `MC` writer - Multi Count (MC) / Error Count (EC)"] -pub type MC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type MC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DAD` reader - Device address"] pub type DAD_R = crate::FieldReader; #[doc = "Field `DAD` writer - Device address"] -pub type DAD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type DAD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `ODDFRM` reader - Odd frame"] pub type ODDFRM_R = crate::BitReader; #[doc = "Field `ODDFRM` writer - Odd frame"] -pub type ODDFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ODDFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDIS` reader - Channel disable"] pub type CHDIS_R = crate::BitReader; #[doc = "Field `CHDIS` writer - Channel disable"] -pub type CHDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHENA` reader - Channel enable"] pub type CHENA_R = crate::BitReader; #[doc = "Field `CHENA` writer - Channel enable"] -pub type CHENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] @@ -112,69 +112,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] #[must_use] - pub fn mpsiz(&mut self) -> MPSIZ_W { - MPSIZ_W::new(self) + pub fn mpsiz(&mut self) -> MPSIZ_W { + MPSIZ_W::new(self, 0) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] #[must_use] - pub fn epnum(&mut self) -> EPNUM_W { - EPNUM_W::new(self) + pub fn epnum(&mut self) -> EPNUM_W { + EPNUM_W::new(self, 11) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] #[must_use] - pub fn epdir(&mut self) -> EPDIR_W { - EPDIR_W::new(self) + pub fn epdir(&mut self) -> EPDIR_W { + EPDIR_W::new(self, 15) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] #[must_use] - pub fn lsdev(&mut self) -> LSDEV_W { - LSDEV_W::new(self) + pub fn lsdev(&mut self) -> LSDEV_W { + LSDEV_W::new(self, 17) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] #[must_use] - pub fn eptyp(&mut self) -> EPTYP_W { - EPTYP_W::new(self) + pub fn eptyp(&mut self) -> EPTYP_W { + EPTYP_W::new(self, 18) } #[doc = "Bits 20:21 - Multi Count (MC) / Error Count (EC)"] #[inline(always)] #[must_use] - pub fn mc(&mut self) -> MC_W { - MC_W::new(self) + pub fn mc(&mut self) -> MC_W { + MC_W::new(self, 20) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] #[must_use] - pub fn dad(&mut self) -> DAD_W { - DAD_W::new(self) + pub fn dad(&mut self) -> DAD_W { + DAD_W::new(self, 22) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] #[must_use] - pub fn oddfrm(&mut self) -> ODDFRM_W { - ODDFRM_W::new(self) + pub fn oddfrm(&mut self) -> ODDFRM_W { + ODDFRM_W::new(self, 29) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] #[must_use] - pub fn chdis(&mut self) -> CHDIS_W { - CHDIS_W::new(self) + pub fn chdis(&mut self) -> CHDIS_W { + CHDIS_W::new(self, 30) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] #[must_use] - pub fn chena(&mut self) -> CHENA_W { - CHENA_W::new(self) + pub fn chena(&mut self) -> CHENA_W { + CHENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcdma.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcdma.rs index 49ce1a2..173d1c7 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcdma.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcint.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcint.rs index 0fd949e..fc9d5e1 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcint.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcint.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHH` reader - Channel halted"] pub type CHH_R = crate::BitReader; #[doc = "Field `CHH` writer - Channel halted"] -pub type CHH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBERR` reader - AHB error"] pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBERR` writer - AHB error"] -pub type AHBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALL` reader - STALL response received interrupt"] pub type STALL_R = crate::BitReader; #[doc = "Field `STALL` writer - STALL response received interrupt"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK response received interrupt"] pub type NAK_R = crate::BitReader; #[doc = "Field `NAK` writer - NAK response received interrupt"] -pub type NAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub type ACK_R = crate::BitReader; #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] -pub type ACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - Response received interrupt"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - Response received interrupt"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXERR` reader - Transaction error"] pub type TXERR_R = crate::BitReader; #[doc = "Field `TXERR` writer - Transaction error"] -pub type TXERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BBERR` reader - Babble error"] pub type BBERR_R = crate::BitReader; #[doc = "Field `BBERR` writer - Babble error"] -pub type BBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRMOR` reader - Frame overrun"] pub type FRMOR_R = crate::BitReader; #[doc = "Field `FRMOR` writer - Frame overrun"] -pub type FRMOR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FRMOR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTERR` reader - Data toggle error"] pub type DTERR_R = crate::BitReader; #[doc = "Field `DTERR` writer - Data toggle error"] -pub type DTERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] #[must_use] - pub fn chh(&mut self) -> CHH_W { - CHH_W::new(self) + pub fn chh(&mut self) -> CHH_W { + CHH_W::new(self, 1) } #[doc = "Bit 2 - AHB error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 3) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self) + pub fn nak(&mut self) -> NAK_W { + NAK_W::new(self, 4) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W { - ACK_W::new(self) + pub fn ack(&mut self) -> ACK_W { + ACK_W::new(self, 5) } #[doc = "Bit 6 - Response received interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction error"] #[inline(always)] #[must_use] - pub fn txerr(&mut self) -> TXERR_W { - TXERR_W::new(self) + pub fn txerr(&mut self) -> TXERR_W { + TXERR_W::new(self, 7) } #[doc = "Bit 8 - Babble error"] #[inline(always)] #[must_use] - pub fn bberr(&mut self) -> BBERR_W { - BBERR_W::new(self) + pub fn bberr(&mut self) -> BBERR_W { + BBERR_W::new(self, 8) } #[doc = "Bit 9 - Frame overrun"] #[inline(always)] #[must_use] - pub fn frmor(&mut self) -> FRMOR_W { - FRMOR_W::new(self) + pub fn frmor(&mut self) -> FRMOR_W { + FRMOR_W::new(self, 9) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] #[must_use] - pub fn dterr(&mut self) -> DTERR_W { - DTERR_W::new(self) + pub fn dterr(&mut self) -> DTERR_W { + DTERR_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcintmsk.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcintmsk.rs index 03aa41c..56e5d7a 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcintmsk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcintmsk.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHHM` reader - Channel halted mask"] pub type CHHM_R = crate::BitReader; #[doc = "Field `CHHM` writer - Channel halted mask"] -pub type CHHM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHHM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBERR` reader - AHB error"] pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBERR` writer - AHB error"] -pub type AHBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALLM` reader - STALL response received interrupt mask"] pub type STALLM_R = crate::BitReader; #[doc = "Field `STALLM` writer - STALL response received interrupt mask"] -pub type STALLM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALLM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK response received interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK response received interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACKM` reader - ACK response received/transmitted interrupt mask"] pub type ACKM_R = crate::BitReader; #[doc = "Field `ACKM` writer - ACK response received/transmitted interrupt mask"] -pub type ACKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - response received interrupt mask"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - response received interrupt mask"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXERRM` reader - Transaction error mask"] pub type TXERRM_R = crate::BitReader; #[doc = "Field `TXERRM` writer - Transaction error mask"] -pub type TXERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BBERRM` reader - Babble error mask"] pub type BBERRM_R = crate::BitReader; #[doc = "Field `BBERRM` writer - Babble error mask"] -pub type BBERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BBERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRMORM` reader - Frame overrun mask"] pub type FRMORM_R = crate::BitReader; #[doc = "Field `FRMORM` writer - Frame overrun mask"] -pub type FRMORM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FRMORM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTERRM` reader - Data toggle error mask"] pub type DTERRM_R = crate::BitReader; #[doc = "Field `DTERRM` writer - Data toggle error mask"] -pub type DTERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTERRM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed mask"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Channel halted mask"] #[inline(always)] #[must_use] - pub fn chhm(&mut self) -> CHHM_W { - CHHM_W::new(self) + pub fn chhm(&mut self) -> CHHM_W { + CHHM_W::new(self, 1) } #[doc = "Bit 2 - AHB error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL response received interrupt mask"] #[inline(always)] #[must_use] - pub fn stallm(&mut self) -> STALLM_W { - STALLM_W::new(self) + pub fn stallm(&mut self) -> STALLM_W { + STALLM_W::new(self, 3) } #[doc = "Bit 4 - NAK response received interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 4) } #[doc = "Bit 5 - ACK response received/transmitted interrupt mask"] #[inline(always)] #[must_use] - pub fn ackm(&mut self) -> ACKM_W { - ACKM_W::new(self) + pub fn ackm(&mut self) -> ACKM_W { + ACKM_W::new(self, 5) } #[doc = "Bit 6 - response received interrupt mask"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction error mask"] #[inline(always)] #[must_use] - pub fn txerrm(&mut self) -> TXERRM_W { - TXERRM_W::new(self) + pub fn txerrm(&mut self) -> TXERRM_W { + TXERRM_W::new(self, 7) } #[doc = "Bit 8 - Babble error mask"] #[inline(always)] #[must_use] - pub fn bberrm(&mut self) -> BBERRM_W { - BBERRM_W::new(self) + pub fn bberrm(&mut self) -> BBERRM_W { + BBERRM_W::new(self, 8) } #[doc = "Bit 9 - Frame overrun mask"] #[inline(always)] #[must_use] - pub fn frmorm(&mut self) -> FRMORM_W { - FRMORM_W::new(self) + pub fn frmorm(&mut self) -> FRMORM_W { + FRMORM_W::new(self, 9) } #[doc = "Bit 10 - Data toggle error mask"] #[inline(always)] #[must_use] - pub fn dterrm(&mut self) -> DTERRM_W { - DTERRM_W::new(self) + pub fn dterrm(&mut self) -> DTERRM_W { + DTERRM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcsplt.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcsplt.rs index dfc4fa0..881e2ba 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcsplt.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hcsplt.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `PRTADDR` reader - Port address"] pub type PRTADDR_R = crate::FieldReader; #[doc = "Field `PRTADDR` writer - Port address"] -pub type PRTADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type PRTADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `HUBADDR` reader - Hub address"] pub type HUBADDR_R = crate::FieldReader; #[doc = "Field `HUBADDR` writer - Hub address"] -pub type HUBADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type HUBADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `XACTPOS` reader - XACTPOS"] pub type XACTPOS_R = crate::FieldReader; #[doc = "Field `XACTPOS` writer - XACTPOS"] -pub type XACTPOS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type XACTPOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `COMPLSPLT` reader - Do complete split"] pub type COMPLSPLT_R = crate::BitReader; #[doc = "Field `COMPLSPLT` writer - Do complete split"] -pub type COMPLSPLT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type COMPLSPLT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPLITEN` reader - Split enable"] pub type SPLITEN_R = crate::BitReader; #[doc = "Field `SPLITEN` writer - Split enable"] -pub type SPLITEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPLITEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:6 - Port address"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Port address"] #[inline(always)] #[must_use] - pub fn prtaddr(&mut self) -> PRTADDR_W { - PRTADDR_W::new(self) + pub fn prtaddr(&mut self) -> PRTADDR_W { + PRTADDR_W::new(self, 0) } #[doc = "Bits 7:13 - Hub address"] #[inline(always)] #[must_use] - pub fn hubaddr(&mut self) -> HUBADDR_W { - HUBADDR_W::new(self) + pub fn hubaddr(&mut self) -> HUBADDR_W { + HUBADDR_W::new(self, 7) } #[doc = "Bits 14:15 - XACTPOS"] #[inline(always)] #[must_use] - pub fn xactpos(&mut self) -> XACTPOS_W { - XACTPOS_W::new(self) + pub fn xactpos(&mut self) -> XACTPOS_W { + XACTPOS_W::new(self, 14) } #[doc = "Bit 16 - Do complete split"] #[inline(always)] #[must_use] - pub fn complsplt(&mut self) -> COMPLSPLT_W { - COMPLSPLT_W::new(self) + pub fn complsplt(&mut self) -> COMPLSPLT_W { + COMPLSPLT_W::new(self, 16) } #[doc = "Bit 31 - Split enable"] #[inline(always)] #[must_use] - pub fn spliten(&mut self) -> SPLITEN_W { - SPLITEN_W::new(self) + pub fn spliten(&mut self) -> SPLITEN_W { + SPLITEN_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hctsiz.rs b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hctsiz.rs index ebfe51b..57a9475 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hctsiz.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/host_channel/hctsiz.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 19, O, u32>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::FieldReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type PKTCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DPID` reader - Data PID"] pub type DPID_R = crate::FieldReader; #[doc = "Field `DPID` writer - Data PID"] -pub type DPID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type DPID_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:18 - Transfer size"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:18 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] #[must_use] - pub fn dpid(&mut self) -> DPID_W { - DPID_W::new(self) + pub fn dpid(&mut self) -> DPID_W { + DPID_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/hprt.rs b/crates/bcm2711-lpa/src/usb_otg_host/hprt.rs index ca27b6f..ccff5b5 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/hprt.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/hprt.rs @@ -7,43 +7,43 @@ pub type PCSTS_R = crate::BitReader; #[doc = "Field `PCDET` reader - Port connect detected"] pub type PCDET_R = crate::BitReader; #[doc = "Field `PCDET` writer - Port connect detected"] -pub type PCDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENA` reader - Port enable"] pub type PENA_R = crate::BitReader; #[doc = "Field `PENA` writer - Port enable"] -pub type PENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PENA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENCHNG` reader - Port enable/disable change"] pub type PENCHNG_R = crate::BitReader; #[doc = "Field `PENCHNG` writer - Port enable/disable change"] -pub type PENCHNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PENCHNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POCA` reader - Port overcurrent active"] pub type POCA_R = crate::BitReader; #[doc = "Field `POCCHNG` reader - Port overcurrent change"] pub type POCCHNG_R = crate::BitReader; #[doc = "Field `POCCHNG` writer - Port overcurrent change"] -pub type POCCHNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POCCHNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRES` reader - Port resume"] pub type PRES_R = crate::BitReader; #[doc = "Field `PRES` writer - Port resume"] -pub type PRES_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PRES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSUSP` reader - Port suspend"] pub type PSUSP_R = crate::BitReader; #[doc = "Field `PSUSP` writer - Port suspend"] -pub type PSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRST` reader - Port reset"] pub type PRST_R = crate::BitReader; #[doc = "Field `PRST` writer - Port reset"] -pub type PRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PLSTS` reader - Port line status"] pub type PLSTS_R = crate::FieldReader; #[doc = "Field `PPWR` reader - Port power"] pub type PPWR_R = crate::BitReader; #[doc = "Field `PPWR` writer - Port power"] -pub type PPWR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PPWR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTCTL` reader - Port test control"] pub type PTCTL_R = crate::FieldReader; #[doc = "Field `PTCTL` writer - Port test control"] -pub type PTCTL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type PTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PSPD` reader - Port speed"] pub type PSPD_R = crate::FieldReader; impl R { @@ -134,63 +134,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Port connect detected"] #[inline(always)] #[must_use] - pub fn pcdet(&mut self) -> PCDET_W { - PCDET_W::new(self) + pub fn pcdet(&mut self) -> PCDET_W { + PCDET_W::new(self, 1) } #[doc = "Bit 2 - Port enable"] #[inline(always)] #[must_use] - pub fn pena(&mut self) -> PENA_W { - PENA_W::new(self) + pub fn pena(&mut self) -> PENA_W { + PENA_W::new(self, 2) } #[doc = "Bit 3 - Port enable/disable change"] #[inline(always)] #[must_use] - pub fn penchng(&mut self) -> PENCHNG_W { - PENCHNG_W::new(self) + pub fn penchng(&mut self) -> PENCHNG_W { + PENCHNG_W::new(self, 3) } #[doc = "Bit 5 - Port overcurrent change"] #[inline(always)] #[must_use] - pub fn pocchng(&mut self) -> POCCHNG_W { - POCCHNG_W::new(self) + pub fn pocchng(&mut self) -> POCCHNG_W { + POCCHNG_W::new(self, 5) } #[doc = "Bit 6 - Port resume"] #[inline(always)] #[must_use] - pub fn pres(&mut self) -> PRES_W { - PRES_W::new(self) + pub fn pres(&mut self) -> PRES_W { + PRES_W::new(self, 6) } #[doc = "Bit 7 - Port suspend"] #[inline(always)] #[must_use] - pub fn psusp(&mut self) -> PSUSP_W { - PSUSP_W::new(self) + pub fn psusp(&mut self) -> PSUSP_W { + PSUSP_W::new(self, 7) } #[doc = "Bit 8 - Port reset"] #[inline(always)] #[must_use] - pub fn prst(&mut self) -> PRST_W { - PRST_W::new(self) + pub fn prst(&mut self) -> PRST_W { + PRST_W::new(self, 8) } #[doc = "Bit 12 - Port power"] #[inline(always)] #[must_use] - pub fn ppwr(&mut self) -> PPWR_W { - PPWR_W::new(self) + pub fn ppwr(&mut self) -> PPWR_W { + PPWR_W::new(self, 12) } #[doc = "Bits 13:16 - Port test control"] #[inline(always)] #[must_use] - pub fn ptctl(&mut self) -> PTCTL_W { - PTCTL_W::new(self) + pub fn ptctl(&mut self) -> PTCTL_W { + PTCTL_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_host/hptxsts.rs b/crates/bcm2711-lpa/src/usb_otg_host/hptxsts.rs index ffb1b12..41663c6 100644 --- a/crates/bcm2711-lpa/src/usb_otg_host/hptxsts.rs +++ b/crates/bcm2711-lpa/src/usb_otg_host/hptxsts.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PTXFSAVL` reader - Periodic transmit data FIFO space available"] pub type PTXFSAVL_R = crate::FieldReader; #[doc = "Field `PTXFSAVL` writer - Periodic transmit data FIFO space available"] -pub type PTXFSAVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXFSAVL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTXQSAV` reader - Periodic transmit request queue space available"] pub type PTXQSAV_R = crate::FieldReader; #[doc = "Field `PTXQTOP` reader - Top of the periodic transmit request queue"] @@ -38,15 +38,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Periodic transmit data FIFO space available"] #[inline(always)] #[must_use] - pub fn ptxfsavl(&mut self) -> PTXFSAVL_W { - PTXFSAVL_W::new(self) + pub fn ptxfsavl(&mut self) -> PTXFSAVL_W { + PTXFSAVL_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/usb_otg_pwrclk.rs b/crates/bcm2711-lpa/src/usb_otg_pwrclk.rs index 242f3b2..17de0ae 100644 --- a/crates/bcm2711-lpa/src/usb_otg_pwrclk.rs +++ b/crates/bcm2711-lpa/src/usb_otg_pwrclk.rs @@ -2,8 +2,14 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + pcgcctl: PCGCCTL, +} +impl RegisterBlock { #[doc = "0x00 - power and clock gating control"] - pub pcgcctl: PCGCCTL, + #[inline(always)] + pub const fn pcgcctl(&self) -> &PCGCCTL { + &self.pcgcctl + } } #[doc = "PCGCCTL (rw) register accessor: power and clock gating control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] module"] diff --git a/crates/bcm2711-lpa/src/usb_otg_pwrclk/pcgcctl.rs b/crates/bcm2711-lpa/src/usb_otg_pwrclk/pcgcctl.rs index 97a2598..7a3322c 100644 --- a/crates/bcm2711-lpa/src/usb_otg_pwrclk/pcgcctl.rs +++ b/crates/bcm2711-lpa/src/usb_otg_pwrclk/pcgcctl.rs @@ -5,63 +5,63 @@ pub type W = crate::W; #[doc = "Field `STPPCLK` reader - Stop PHY clock"] pub type STPPCLK_R = crate::BitReader; #[doc = "Field `STPPCLK` writer - Stop PHY clock"] -pub type STPPCLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STPPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GATEHCLK` reader - Gate HCLK"] pub type GATEHCLK_R = crate::BitReader; #[doc = "Field `GATEHCLK` writer - Gate HCLK"] -pub type GATEHCLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GATEHCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRCLMP` reader - Power clamp"] pub type PWRCLMP_R = crate::BitReader; #[doc = "Field `PWRCLMP` writer - Power clamp"] -pub type PWRCLMP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWRCLMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTPDWNMODULE` reader - Power down modules"] pub type RSTPDWNMODULE_R = crate::BitReader; #[doc = "Field `RSTPDWNMODULE` writer - Power down modules"] -pub type RSTPDWNMODULE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RSTPDWNMODULE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PHYSUSP` reader - PHY Suspended"] pub type PHYSUSP_R = crate::BitReader; #[doc = "Field `PHYSUSP` writer - PHY Suspended"] -pub type PHYSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE_L1GATING` reader - Enable sleep clock gating"] pub type ENABLE_L1GATING_R = crate::BitReader; #[doc = "Field `ENABLE_L1GATING` writer - Enable sleep clock gating"] -pub type ENABLE_L1GATING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_L1GATING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PHYSLEEP` reader - PHY is in sleep mode"] pub type PHYSLEEP_R = crate::BitReader; #[doc = "Field `PHYSLEEP` writer - PHY is in sleep mode"] -pub type PHYSLEEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYSLEEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEEPSLEEP` reader - PHY is in deep sleep"] pub type DEEPSLEEP_R = crate::BitReader; #[doc = "Field `DEEPSLEEP` writer - PHY is in deep sleep"] -pub type DEEPSLEEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEEPSLEEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETAFTERSUSP` reader - Reset after suspend"] pub type RESETAFTERSUSP_R = crate::BitReader; #[doc = "Field `RESETAFTERSUSP` writer - Reset after suspend"] -pub type RESETAFTERSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RESETAFTERSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTOREMODE` reader - Restore mode"] pub type RESTOREMODE_R = crate::BitReader; #[doc = "Field `RESTOREMODE` writer - Restore mode"] -pub type RESTOREMODE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RESTOREMODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENEXTNDEDHIBER` reader - Enable extended hibernation"] pub type ENEXTNDEDHIBER_R = crate::BitReader; #[doc = "Field `ENEXTNDEDHIBER` writer - Enable extended hibernation"] -pub type ENEXTNDEDHIBER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENEXTNDEDHIBER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTNDEDHIBERNATIONCLAMP` reader - Extended hibernation clamp"] pub type EXTNDEDHIBERNATIONCLAMP_R = crate::BitReader; #[doc = "Field `EXTNDEDHIBERNATIONCLAMP` writer - Extended hibernation clamp"] -pub type EXTNDEDHIBERNATIONCLAMP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EXTNDEDHIBERNATIONCLAMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTNDEDHIBERNATIONSWITCH` reader - Extended hibernation switch"] pub type EXTNDEDHIBERNATIONSWITCH_R = crate::BitReader; #[doc = "Field `EXTNDEDHIBERNATIONSWITCH` writer - Extended hibernation switch"] -pub type EXTNDEDHIBERNATIONSWITCH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EXTNDEDHIBERNATIONSWITCH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESSREGRESTORED` reader - Essential register values restored"] pub type ESSREGRESTORED_R = crate::BitReader; #[doc = "Field `ESSREGRESTORED` writer - Essential register values restored"] -pub type ESSREGRESTORED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESSREGRESTORED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTORE_VALUE` reader - Restore value"] pub type RESTORE_VALUE_R = crate::FieldReader; #[doc = "Field `RESTORE_VALUE` writer - Restore value"] -pub type RESTORE_VALUE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 18, O, u32>; +pub type RESTORE_VALUE_W<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; impl R { #[doc = "Bit 0 - Stop PHY clock"] #[inline(always)] @@ -186,99 +186,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Stop PHY clock"] #[inline(always)] #[must_use] - pub fn stppclk(&mut self) -> STPPCLK_W { - STPPCLK_W::new(self) + pub fn stppclk(&mut self) -> STPPCLK_W { + STPPCLK_W::new(self, 0) } #[doc = "Bit 1 - Gate HCLK"] #[inline(always)] #[must_use] - pub fn gatehclk(&mut self) -> GATEHCLK_W { - GATEHCLK_W::new(self) + pub fn gatehclk(&mut self) -> GATEHCLK_W { + GATEHCLK_W::new(self, 1) } #[doc = "Bit 2 - Power clamp"] #[inline(always)] #[must_use] - pub fn pwrclmp(&mut self) -> PWRCLMP_W { - PWRCLMP_W::new(self) + pub fn pwrclmp(&mut self) -> PWRCLMP_W { + PWRCLMP_W::new(self, 2) } #[doc = "Bit 3 - Power down modules"] #[inline(always)] #[must_use] - pub fn rstpdwnmodule(&mut self) -> RSTPDWNMODULE_W { - RSTPDWNMODULE_W::new(self) + pub fn rstpdwnmodule(&mut self) -> RSTPDWNMODULE_W { + RSTPDWNMODULE_W::new(self, 3) } #[doc = "Bit 4 - PHY Suspended"] #[inline(always)] #[must_use] - pub fn physusp(&mut self) -> PHYSUSP_W { - PHYSUSP_W::new(self) + pub fn physusp(&mut self) -> PHYSUSP_W { + PHYSUSP_W::new(self, 4) } #[doc = "Bit 5 - Enable sleep clock gating"] #[inline(always)] #[must_use] - pub fn enable_l1gating(&mut self) -> ENABLE_L1GATING_W { - ENABLE_L1GATING_W::new(self) + pub fn enable_l1gating(&mut self) -> ENABLE_L1GATING_W { + ENABLE_L1GATING_W::new(self, 5) } #[doc = "Bit 6 - PHY is in sleep mode"] #[inline(always)] #[must_use] - pub fn physleep(&mut self) -> PHYSLEEP_W { - PHYSLEEP_W::new(self) + pub fn physleep(&mut self) -> PHYSLEEP_W { + PHYSLEEP_W::new(self, 6) } #[doc = "Bit 7 - PHY is in deep sleep"] #[inline(always)] #[must_use] - pub fn deepsleep(&mut self) -> DEEPSLEEP_W { - DEEPSLEEP_W::new(self) + pub fn deepsleep(&mut self) -> DEEPSLEEP_W { + DEEPSLEEP_W::new(self, 7) } #[doc = "Bit 8 - Reset after suspend"] #[inline(always)] #[must_use] - pub fn resetaftersusp(&mut self) -> RESETAFTERSUSP_W { - RESETAFTERSUSP_W::new(self) + pub fn resetaftersusp(&mut self) -> RESETAFTERSUSP_W { + RESETAFTERSUSP_W::new(self, 8) } #[doc = "Bit 9 - Restore mode"] #[inline(always)] #[must_use] - pub fn restoremode(&mut self) -> RESTOREMODE_W { - RESTOREMODE_W::new(self) + pub fn restoremode(&mut self) -> RESTOREMODE_W { + RESTOREMODE_W::new(self, 9) } #[doc = "Bit 10 - Enable extended hibernation"] #[inline(always)] #[must_use] - pub fn enextndedhiber(&mut self) -> ENEXTNDEDHIBER_W { - ENEXTNDEDHIBER_W::new(self) + pub fn enextndedhiber(&mut self) -> ENEXTNDEDHIBER_W { + ENEXTNDEDHIBER_W::new(self, 10) } #[doc = "Bit 11 - Extended hibernation clamp"] #[inline(always)] #[must_use] - pub fn extndedhibernationclamp(&mut self) -> EXTNDEDHIBERNATIONCLAMP_W { - EXTNDEDHIBERNATIONCLAMP_W::new(self) + pub fn extndedhibernationclamp(&mut self) -> EXTNDEDHIBERNATIONCLAMP_W { + EXTNDEDHIBERNATIONCLAMP_W::new(self, 11) } #[doc = "Bit 12 - Extended hibernation switch"] #[inline(always)] #[must_use] - pub fn extndedhibernationswitch(&mut self) -> EXTNDEDHIBERNATIONSWITCH_W { - EXTNDEDHIBERNATIONSWITCH_W::new(self) + pub fn extndedhibernationswitch(&mut self) -> EXTNDEDHIBERNATIONSWITCH_W { + EXTNDEDHIBERNATIONSWITCH_W::new(self, 12) } #[doc = "Bit 13 - Essential register values restored"] #[inline(always)] #[must_use] - pub fn essregrestored(&mut self) -> ESSREGRESTORED_W { - ESSREGRESTORED_W::new(self) + pub fn essregrestored(&mut self) -> ESSREGRESTORED_W { + ESSREGRESTORED_W::new(self, 13) } #[doc = "Bits 14:31 - Restore value"] #[inline(always)] #[must_use] - pub fn restore_value(&mut self) -> RESTORE_VALUE_W { - RESTORE_VALUE_W::new(self) + pub fn restore_value(&mut self) -> RESTORE_VALUE_W { + RESTORE_VALUE_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/vcmailbox.rs b/crates/bcm2711-lpa/src/vcmailbox.rs index f3d9184..7faef45 100644 --- a/crates/bcm2711-lpa/src/vcmailbox.rs +++ b/crates/bcm2711-lpa/src/vcmailbox.rs @@ -2,28 +2,70 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - Read messages from the VideoCore"] - pub read: READ, + read: READ, _reserved1: [u8; 0x0c], + peek0: PEEK0, + sender0: SENDER0, + status0: STATUS0, + config0: CONFIG0, + write: WRITE, + _reserved6: [u8; 0x0c], + peek1: PEEK1, + sender1: SENDER1, + status1: STATUS1, + config1: CONFIG1, +} +impl RegisterBlock { + #[doc = "0x00 - Read messages from the VideoCore"] + #[inline(always)] + pub const fn read(&self) -> &READ { + &self.read + } #[doc = "0x10 - "] - pub peek0: PEEK0, + #[inline(always)] + pub const fn peek0(&self) -> &PEEK0 { + &self.peek0 + } #[doc = "0x14 - "] - pub sender0: SENDER0, + #[inline(always)] + pub const fn sender0(&self) -> &SENDER0 { + &self.sender0 + } #[doc = "0x18 - "] - pub status0: STATUS0, + #[inline(always)] + pub const fn status0(&self) -> &STATUS0 { + &self.status0 + } #[doc = "0x1c - "] - pub config0: CONFIG0, + #[inline(always)] + pub const fn config0(&self) -> &CONFIG0 { + &self.config0 + } #[doc = "0x20 - Write messages to the VideoCore"] - pub write: WRITE, - _reserved6: [u8; 0x0c], + #[inline(always)] + pub const fn write(&self) -> &WRITE { + &self.write + } #[doc = "0x30 - "] - pub peek1: PEEK1, + #[inline(always)] + pub const fn peek1(&self) -> &PEEK1 { + &self.peek1 + } #[doc = "0x34 - "] - pub sender1: SENDER1, + #[inline(always)] + pub const fn sender1(&self) -> &SENDER1 { + &self.sender1 + } #[doc = "0x38 - "] - pub status1: STATUS1, + #[inline(always)] + pub const fn status1(&self) -> &STATUS1 { + &self.status1 + } #[doc = "0x3c - "] - pub config1: CONFIG1, + #[inline(always)] + pub const fn config1(&self) -> &CONFIG1 { + &self.config1 + } } #[doc = "READ (r) register accessor: Read messages from the VideoCore\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`read::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@read`] module"] diff --git a/crates/bcm2711-lpa/src/vcmailbox/config0.rs b/crates/bcm2711-lpa/src/vcmailbox/config0.rs index b90c56d..eedd705 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/config0.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/config0.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `IRQEN` reader - Enable the interrupt when data is available"] pub type IRQEN_R = crate::BitReader; #[doc = "Field `IRQEN` writer - Enable the interrupt when data is available"] -pub type IRQEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IRQEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable the interrupt when data is available"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable the interrupt when data is available"] #[inline(always)] #[must_use] - pub fn irqen(&mut self) -> IRQEN_W { - IRQEN_W::new(self) + pub fn irqen(&mut self) -> IRQEN_W { + IRQEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2711-lpa/src/vcmailbox/config1.rs b/crates/bcm2711-lpa/src/vcmailbox/config1.rs index 8a50eee..349f301 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/config1.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/config1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/vcmailbox/peek0.rs b/crates/bcm2711-lpa/src/vcmailbox/peek0.rs index 9119a22..84b4901 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/peek0.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/peek0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/vcmailbox/peek1.rs b/crates/bcm2711-lpa/src/vcmailbox/peek1.rs index 221331c..cd5f491 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/peek1.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/peek1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/vcmailbox/read.rs b/crates/bcm2711-lpa/src/vcmailbox/read.rs index 7328372..42a55f5 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/read.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/read.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Read messages from the VideoCore\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`read::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/vcmailbox/sender0.rs b/crates/bcm2711-lpa/src/vcmailbox/sender0.rs index 4b8ec27..8e2da52 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/sender0.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/sender0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/vcmailbox/sender1.rs b/crates/bcm2711-lpa/src/vcmailbox/sender1.rs index f787ecb..f76a754 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/sender1.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/sender1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2711-lpa/src/vcmailbox/status0.rs b/crates/bcm2711-lpa/src/vcmailbox/status0.rs index 92a12f6..080d718 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/status0.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/status0.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2711-lpa/src/vcmailbox/status1.rs b/crates/bcm2711-lpa/src/vcmailbox/status1.rs index 64ad85f..4403a52 100644 --- a/crates/bcm2711-lpa/src/vcmailbox/status1.rs +++ b/crates/bcm2711-lpa/src/vcmailbox/status1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/Cargo.toml b/crates/bcm2835-lpa/Cargo.toml index 851d6ab..b901f26 100644 --- a/crates/bcm2835-lpa/Cargo.toml +++ b/crates/bcm2835-lpa/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "bcm2835-lpa" -version = "0.2.2" +version = "0.3.0" authors = ["Po-Yi Tsai "] edition = "2021" rust-version = "1.65.0" diff --git a/crates/bcm2835-lpa/src/aux_.rs b/crates/bcm2835-lpa/src/aux_.rs index e442ed8..bb4bdb6 100644 --- a/crates/bcm2835-lpa/src/aux_.rs +++ b/crates/bcm2835-lpa/src/aux_.rs @@ -2,10 +2,20 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + irq: IRQ, + enables: ENABLES, +} +impl RegisterBlock { #[doc = "0x00 - Interrupt status"] - pub irq: IRQ, + #[inline(always)] + pub const fn irq(&self) -> &IRQ { + &self.irq + } #[doc = "0x04 - Enable sub-peripherals"] - pub enables: ENABLES, + #[inline(always)] + pub const fn enables(&self) -> &ENABLES { + &self.enables + } } #[doc = "IRQ (rw) register accessor: Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq`] module"] diff --git a/crates/bcm2835-lpa/src/aux_/enables.rs b/crates/bcm2835-lpa/src/aux_/enables.rs index c84adb4..129a624 100644 --- a/crates/bcm2835-lpa/src/aux_/enables.rs +++ b/crates/bcm2835-lpa/src/aux_/enables.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `UART_1` reader - UART1 enabled"] pub type UART_1_R = crate::BitReader; #[doc = "Field `UART_1` writer - UART1 enabled"] -pub type UART_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 enabled"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 enabled"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 enabled"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 enabled"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UART1 enabled"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UART1 enabled"] #[inline(always)] #[must_use] - pub fn uart_1(&mut self) -> UART_1_W { - UART_1_W::new(self) + pub fn uart_1(&mut self) -> UART_1_W { + UART_1_W::new(self, 0) } #[doc = "Bit 1 - SPI1 enabled"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 enabled"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/aux_/irq.rs b/crates/bcm2835-lpa/src/aux_/irq.rs index 785d02a..1d1c42b 100644 --- a/crates/bcm2835-lpa/src/aux_/irq.rs +++ b/crates/bcm2835-lpa/src/aux_/irq.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `UART_1` reader - UART1 interrupt active"] pub type UART_1_R = crate::BitReader; #[doc = "Field `UART_1` writer - UART1 interrupt active"] -pub type UART_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 interrupt active"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 interrupt active"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 interrupt active"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 interrupt active"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UART1 interrupt active"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UART1 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_1(&mut self) -> UART_1_W { - UART_1_W::new(self) + pub fn uart_1(&mut self) -> UART_1_W { + UART_1_W::new(self, 0) } #[doc = "Bit 1 - SPI1 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0.rs b/crates/bcm2835-lpa/src/bsc0.rs index 0d1c120..0e6821a 100644 --- a/crates/bcm2835-lpa/src/bsc0.rs +++ b/crates/bcm2835-lpa/src/bsc0.rs @@ -2,22 +2,56 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + c: C, + s: S, + dlen: DLEN, + a: A, + fifo: FIFO, + div: DIV, + del: DEL, + clkt: CLKT, +} +impl RegisterBlock { #[doc = "0x00 - Control"] - pub c: C, + #[inline(always)] + pub const fn c(&self) -> &C { + &self.c + } #[doc = "0x04 - Status"] - pub s: S, + #[inline(always)] + pub const fn s(&self) -> &S { + &self.s + } #[doc = "0x08 - Data length"] - pub dlen: DLEN, + #[inline(always)] + pub const fn dlen(&self) -> &DLEN { + &self.dlen + } #[doc = "0x0c - Slave address"] - pub a: A, + #[inline(always)] + pub const fn a(&self) -> &A { + &self.a + } #[doc = "0x10 - Data FIFO"] - pub fifo: FIFO, + #[inline(always)] + pub const fn fifo(&self) -> &FIFO { + &self.fifo + } #[doc = "0x14 - Clock divider"] - pub div: DIV, + #[inline(always)] + pub const fn div(&self) -> &DIV { + &self.div + } #[doc = "0x18 - Data delay (Values must be under CDIV / 2)"] - pub del: DEL, + #[inline(always)] + pub const fn del(&self) -> &DEL { + &self.del + } #[doc = "0x1c - Clock stretch timeout (broken on 283x)"] - pub clkt: CLKT, + #[inline(always)] + pub const fn clkt(&self) -> &CLKT { + &self.clkt + } } #[doc = "C (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`c::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c`] module"] diff --git a/crates/bcm2835-lpa/src/bsc0/a.rs b/crates/bcm2835-lpa/src/bsc0/a.rs index e9669f3..7baa776 100644 --- a/crates/bcm2835-lpa/src/bsc0/a.rs +++ b/crates/bcm2835-lpa/src/bsc0/a.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `ADDR` reader - Slave address"] pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Slave address"] -pub type ADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - Slave address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Slave address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/c.rs b/crates/bcm2835-lpa/src/bsc0/c.rs index 85f86f7..bf50f99 100644 --- a/crates/bcm2835-lpa/src/bsc0/c.rs +++ b/crates/bcm2835-lpa/src/bsc0/c.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `READ` reader - Transfer is read"] pub type READ_R = crate::BitReader; #[doc = "Field `READ` writer - Transfer is read"] -pub type READ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` reader - Clear the FIFO"] pub type CLEAR_R = crate::FieldReader; #[doc = "Field `CLEAR` writer - Clear the FIFO"] -pub type CLEAR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CLEAR_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `ST` reader - Start transfer"] pub type ST_R = crate::BitReader; #[doc = "Field `ST` writer - Start transfer"] -pub type ST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTD` reader - Interrupt on done"] pub type INTD_R = crate::BitReader; #[doc = "Field `INTD` writer - Interrupt on done"] -pub type INTD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTT` reader - Interrupt on TX"] pub type INTT_R = crate::BitReader; #[doc = "Field `INTT` writer - Interrupt on TX"] -pub type INTT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTR` reader - Interrupt on RX"] pub type INTR_R = crate::BitReader; #[doc = "Field `INTR` writer - Interrupt on RX"] -pub type INTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2CEN` reader - I2C Enable"] pub type I2CEN_R = crate::BitReader; #[doc = "Field `I2CEN` writer - I2C Enable"] -pub type I2CEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2CEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer is read"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer is read"] #[inline(always)] #[must_use] - pub fn read(&mut self) -> READ_W { - READ_W::new(self) + pub fn read(&mut self) -> READ_W { + READ_W::new(self, 0) } #[doc = "Bits 4:5 - Clear the FIFO"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W::new(self) + pub fn clear(&mut self) -> CLEAR_W { + CLEAR_W::new(self, 4) } #[doc = "Bit 7 - Start transfer"] #[inline(always)] #[must_use] - pub fn st(&mut self) -> ST_W { - ST_W::new(self) + pub fn st(&mut self) -> ST_W { + ST_W::new(self, 7) } #[doc = "Bit 8 - Interrupt on done"] #[inline(always)] #[must_use] - pub fn intd(&mut self) -> INTD_W { - INTD_W::new(self) + pub fn intd(&mut self) -> INTD_W { + INTD_W::new(self, 8) } #[doc = "Bit 9 - Interrupt on TX"] #[inline(always)] #[must_use] - pub fn intt(&mut self) -> INTT_W { - INTT_W::new(self) + pub fn intt(&mut self) -> INTT_W { + INTT_W::new(self, 9) } #[doc = "Bit 10 - Interrupt on RX"] #[inline(always)] #[must_use] - pub fn intr(&mut self) -> INTR_W { - INTR_W::new(self) + pub fn intr(&mut self) -> INTR_W { + INTR_W::new(self, 10) } #[doc = "Bit 15 - I2C Enable"] #[inline(always)] #[must_use] - pub fn i2cen(&mut self) -> I2CEN_W { - I2CEN_W::new(self) + pub fn i2cen(&mut self) -> I2CEN_W { + I2CEN_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/clkt.rs b/crates/bcm2835-lpa/src/bsc0/clkt.rs index 103f923..52b4821 100644 --- a/crates/bcm2835-lpa/src/bsc0/clkt.rs +++ b/crates/bcm2835-lpa/src/bsc0/clkt.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOUT` reader - Number of SCL clock cycles to wait"] pub type TOUT_R = crate::FieldReader; #[doc = "Field `TOUT` writer - Number of SCL clock cycles to wait"] -pub type TOUT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Number of SCL clock cycles to wait"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Number of SCL clock cycles to wait"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W { - TOUT_W::new(self) + pub fn tout(&mut self) -> TOUT_W { + TOUT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/del.rs b/crates/bcm2835-lpa/src/bsc0/del.rs index 4c0e876..2068915 100644 --- a/crates/bcm2835-lpa/src/bsc0/del.rs +++ b/crates/bcm2835-lpa/src/bsc0/del.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `REDL` reader - Delay before reading after a rising edge"] pub type REDL_R = crate::FieldReader; #[doc = "Field `REDL` writer - Delay before reading after a rising edge"] -pub type REDL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type REDL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `FEDL` reader - Delay before reading after a falling edge"] pub type FEDL_R = crate::FieldReader; #[doc = "Field `FEDL` writer - Delay before reading after a falling edge"] -pub type FEDL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type FEDL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Delay before reading after a rising edge"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Delay before reading after a rising edge"] #[inline(always)] #[must_use] - pub fn redl(&mut self) -> REDL_W { - REDL_W::new(self) + pub fn redl(&mut self) -> REDL_W { + REDL_W::new(self, 0) } #[doc = "Bits 16:31 - Delay before reading after a falling edge"] #[inline(always)] #[must_use] - pub fn fedl(&mut self) -> FEDL_W { - FEDL_W::new(self) + pub fn fedl(&mut self) -> FEDL_W { + FEDL_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/div.rs b/crates/bcm2835-lpa/src/bsc0/div.rs index 9ffd801..b2baf3f 100644 --- a/crates/bcm2835-lpa/src/bsc0/div.rs +++ b/crates/bcm2835-lpa/src/bsc0/div.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CDIV` reader - Divide the source clock"] pub type CDIV_R = crate::FieldReader; #[doc = "Field `CDIV` writer - Divide the source clock"] -pub type CDIV_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type CDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Divide the source clock"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Divide the source clock"] #[inline(always)] #[must_use] - pub fn cdiv(&mut self) -> CDIV_W { - CDIV_W::new(self) + pub fn cdiv(&mut self) -> CDIV_W { + CDIV_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/dlen.rs b/crates/bcm2835-lpa/src/bsc0/dlen.rs index 5c7bb83..c86b386 100644 --- a/crates/bcm2835-lpa/src/bsc0/dlen.rs +++ b/crates/bcm2835-lpa/src/bsc0/dlen.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DLEN` reader - Data length"] pub type DLEN_R = crate::FieldReader; #[doc = "Field `DLEN` writer - Data length"] -pub type DLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Data length"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Data length"] #[inline(always)] #[must_use] - pub fn dlen(&mut self) -> DLEN_W { - DLEN_W::new(self) + pub fn dlen(&mut self) -> DLEN_W { + DLEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/fifo.rs b/crates/bcm2835-lpa/src/bsc0/fifo.rs index 0536908..acea4b1 100644 --- a/crates/bcm2835-lpa/src/bsc0/fifo.rs +++ b/crates/bcm2835-lpa/src/bsc0/fifo.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - Access the FIFO"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Access the FIFO"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Access the FIFO"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Access the FIFO"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/bsc0/s.rs b/crates/bcm2835-lpa/src/bsc0/s.rs index 56cb006..3bbf05a 100644 --- a/crates/bcm2835-lpa/src/bsc0/s.rs +++ b/crates/bcm2835-lpa/src/bsc0/s.rs @@ -7,7 +7,7 @@ pub type TA_R = crate::BitReader; #[doc = "Field `DONE` reader - Transfer done"] pub type DONE_R = crate::BitReader; #[doc = "Field `DONE` writer - Transfer done"] -pub type DONE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TXW` reader - FIFO needs to be written"] pub type TXW_R = crate::BitReader; #[doc = "Field `RXR` reader - FIFO needs to be read"] @@ -23,11 +23,11 @@ pub type RXF_R = crate::BitReader; #[doc = "Field `ERR` reader - Error: No ack"] pub type ERR_R = crate::BitReader; #[doc = "Field `ERR` writer - Error: No ack"] -pub type ERR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLKT` reader - Clock stretch timeout"] pub type CLKT_R = crate::BitReader; #[doc = "Field `CLKT` writer - Clock stretch timeout"] -pub type CLKT_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLKT_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Transfer active"] #[inline(always)] @@ -98,27 +98,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Transfer done"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DONE_W { - DONE_W::new(self) + pub fn done(&mut self) -> DONE_W { + DONE_W::new(self, 1) } #[doc = "Bit 8 - Error: No ack"] #[inline(always)] #[must_use] - pub fn err(&mut self) -> ERR_W { - ERR_W::new(self) + pub fn err(&mut self) -> ERR_W { + ERR_W::new(self, 8) } #[doc = "Bit 9 - Clock stretch timeout"] #[inline(always)] #[must_use] - pub fn clkt(&mut self) -> CLKT_W { - CLKT_W::new(self) + pub fn clkt(&mut self) -> CLKT_W { + CLKT_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/cm_pcm.rs b/crates/bcm2835-lpa/src/cm_pcm.rs index 855e1b0..eafffb7 100644 --- a/crates/bcm2835-lpa/src/cm_pcm.rs +++ b/crates/bcm2835-lpa/src/cm_pcm.rs @@ -2,10 +2,20 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + div: DIV, +} +impl RegisterBlock { #[doc = "0x00 - Control / Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - Clock divisor"] - pub div: DIV, + #[inline(always)] + pub const fn div(&self) -> &DIV { + &self.div + } } #[doc = "CS (rw) register accessor: Control / Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2835-lpa/src/cm_pcm/cs.rs b/crates/bcm2835-lpa/src/cm_pcm/cs.rs index 036729f..753af77 100644 --- a/crates/bcm2835-lpa/src/cm_pcm/cs.rs +++ b/crates/bcm2835-lpa/src/cm_pcm/cs.rs @@ -22,6 +22,8 @@ pub enum SRC_A { PLLC = 6, #[doc = "7: `111`"] HDMI = 7, + #[doc = "0: `0`"] + GND = 0, } impl From for u8 { #[inline(always)] @@ -35,16 +37,16 @@ impl crate::FieldSpec for SRC_A { impl SRC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> SRC_A { match self.bits { - 1 => Some(SRC_A::XOSC), - 2 => Some(SRC_A::TEST0), - 3 => Some(SRC_A::TEST1), - 4 => Some(SRC_A::PLLA), - 5 => Some(SRC_A::PLLB), - 6 => Some(SRC_A::PLLC), - 7 => Some(SRC_A::HDMI), - _ => None, + 1 => SRC_A::XOSC, + 2 => SRC_A::TEST0, + 3 => SRC_A::TEST1, + 4 => SRC_A::PLLA, + 5 => SRC_A::PLLB, + 6 => SRC_A::PLLC, + 7 => SRC_A::HDMI, + _ => SRC_A::GND, } } #[doc = "`1`"] @@ -82,10 +84,15 @@ impl SRC_R { pub fn is_hdmi(&self) -> bool { *self == SRC_A::HDMI } + #[doc = "`0`"] + #[inline(always)] + pub fn is_gnd(&self) -> bool { + matches!(self.variant(), SRC_A::GND) + } } #[doc = "Field `SRC` writer - Clock source"] -pub type SRC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O, SRC_A>; -impl<'a, REG, const O: u8> SRC_W<'a, REG, O> +pub type SRC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, SRC_A>; +impl<'a, REG> SRC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -125,25 +132,30 @@ where pub fn hdmi(self) -> &'a mut crate::W { self.variant(SRC_A::HDMI) } + #[doc = "`0`"] + #[inline(always)] + pub fn gnd(self) -> &'a mut crate::W { + self.variant(SRC_A::GND) + } } #[doc = "Field `ENAB` reader - Enable the clock generator. (Switch SRC first.)"] pub type ENAB_R = crate::BitReader; #[doc = "Field `ENAB` writer - Enable the clock generator. (Switch SRC first.)"] -pub type ENAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENAB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KILL` reader - Stop and reset the generator"] pub type KILL_R = crate::BitReader; #[doc = "Field `KILL` writer - Stop and reset the generator"] -pub type KILL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type KILL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSY` reader - Indicates the clock generator is running"] pub type BUSY_R = crate::BitReader; #[doc = "Field `FLIP` reader - Generate an edge on output. (For testing)"] pub type FLIP_R = crate::BitReader; #[doc = "Field `FLIP` writer - Generate an edge on output. (For testing)"] -pub type FLIP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FLIP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASH` reader - MASH control, stage count"] pub type MASH_R = crate::FieldReader; #[doc = "Field `MASH` writer - MASH control, stage count"] -pub type MASH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type MASH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -161,8 +173,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -219,45 +231,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:3 - Clock source"] #[inline(always)] #[must_use] - pub fn src(&mut self) -> SRC_W { - SRC_W::new(self) + pub fn src(&mut self) -> SRC_W { + SRC_W::new(self, 0) } #[doc = "Bit 4 - Enable the clock generator. (Switch SRC first.)"] #[inline(always)] #[must_use] - pub fn enab(&mut self) -> ENAB_W { - ENAB_W::new(self) + pub fn enab(&mut self) -> ENAB_W { + ENAB_W::new(self, 4) } #[doc = "Bit 5 - Stop and reset the generator"] #[inline(always)] #[must_use] - pub fn kill(&mut self) -> KILL_W { - KILL_W::new(self) + pub fn kill(&mut self) -> KILL_W { + KILL_W::new(self, 5) } #[doc = "Bit 8 - Generate an edge on output. (For testing)"] #[inline(always)] #[must_use] - pub fn flip(&mut self) -> FLIP_W { - FLIP_W::new(self) + pub fn flip(&mut self) -> FLIP_W { + FLIP_W::new(self, 8) } #[doc = "Bits 9:10 - MASH control, stage count"] #[inline(always)] #[must_use] - pub fn mash(&mut self) -> MASH_W { - MASH_W::new(self) + pub fn mash(&mut self) -> MASH_W { + MASH_W::new(self, 9) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/cm_pcm/div.rs b/crates/bcm2835-lpa/src/cm_pcm/div.rs index 825974e..4ded814 100644 --- a/crates/bcm2835-lpa/src/cm_pcm/div.rs +++ b/crates/bcm2835-lpa/src/cm_pcm/div.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `DIVF` reader - Fractional part of divisor"] pub type DIVF_R = crate::FieldReader; #[doc = "Field `DIVF` writer - Fractional part of divisor"] -pub type DIVF_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DIVF_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DIVI` reader - Integer part of divisor"] pub type DIVI_R = crate::FieldReader; #[doc = "Field `DIVI` writer - Integer part of divisor"] -pub type DIVI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DIVI_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -27,8 +27,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,27 +61,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:11 - Fractional part of divisor"] #[inline(always)] #[must_use] - pub fn divf(&mut self) -> DIVF_W { - DIVF_W::new(self) + pub fn divf(&mut self) -> DIVF_W { + DIVF_W::new(self, 0) } #[doc = "Bits 12:23 - Integer part of divisor"] #[inline(always)] #[must_use] - pub fn divi(&mut self) -> DIVI_W { - DIVI_W::new(self) + pub fn divi(&mut self) -> DIVI_W { + DIVI_W::new(self, 12) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc.rs b/crates/bcm2835-lpa/src/emmc.rs index 597a27a..d3fd4a7 100644 --- a/crates/bcm2835-lpa/src/emmc.rs +++ b/crates/bcm2835-lpa/src/emmc.rs @@ -2,63 +2,169 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + arg2: ARG2, + blksizecnt: BLKSIZECNT, + arg1: ARG1, + cmdtm: CMDTM, + resp0: RESP0, + resp1: RESP1, + resp2: RESP2, + resp3: RESP3, + data: DATA, + status: STATUS, + control0: CONTROL0, + control1: CONTROL1, + interrupt: INTERRUPT, + irpt_mask: IRPT_MASK, + irpt_en: IRPT_EN, + control2: CONTROL2, + _reserved16: [u8; 0x10], + force_irpt: FORCE_IRPT, + _reserved17: [u8; 0x1c], + boot_timeout: BOOT_TIMEOUT, + dbg_sel: DBG_SEL, + _reserved19: [u8; 0x08], + exrdfifo_cfg: EXRDFIFO_CFG, + exrdfifo_en: EXRDFIFO_EN, + tune_step: TUNE_STEP, + tune_steps_std: TUNE_STEPS_STD, + tune_steps_ddr: TUNE_STEPS_DDR, + _reserved24: [u8; 0x5c], + spi_int_spt: SPI_INT_SPT, + _reserved25: [u8; 0x08], + slotisr_ver: SLOTISR_VER, +} +impl RegisterBlock { #[doc = "0x00 - Argument for ACMD23 command"] - pub arg2: ARG2, + #[inline(always)] + pub const fn arg2(&self) -> &ARG2 { + &self.arg2 + } #[doc = "0x04 - Numer and size in bytes for data block to be transferred"] - pub blksizecnt: BLKSIZECNT, + #[inline(always)] + pub const fn blksizecnt(&self) -> &BLKSIZECNT { + &self.blksizecnt + } #[doc = "0x08 - Argument for everything but ACMD23"] - pub arg1: ARG1, + #[inline(always)] + pub const fn arg1(&self) -> &ARG1 { + &self.arg1 + } #[doc = "0x0c - Issue commands to the card"] - pub cmdtm: CMDTM, + #[inline(always)] + pub const fn cmdtm(&self) -> &CMDTM { + &self.cmdtm + } #[doc = "0x10 - Status bits of the response"] - pub resp0: RESP0, + #[inline(always)] + pub const fn resp0(&self) -> &RESP0 { + &self.resp0 + } #[doc = "0x14 - Bits 63:32 of CMD2 and CMD10 responses"] - pub resp1: RESP1, + #[inline(always)] + pub const fn resp1(&self) -> &RESP1 { + &self.resp1 + } #[doc = "0x18 - Bits 95:64 of CMD2 and CMD10 responses"] - pub resp2: RESP2, + #[inline(always)] + pub const fn resp2(&self) -> &RESP2 { + &self.resp2 + } #[doc = "0x1c - Bits 127:96 of CMD2 and CMD10 responses"] - pub resp3: RESP3, + #[inline(always)] + pub const fn resp3(&self) -> &RESP3 { + &self.resp3 + } #[doc = "0x20 - Data to/from the card"] - pub data: DATA, + #[inline(always)] + pub const fn data(&self) -> &DATA { + &self.data + } #[doc = "0x24 - Status info for debugging"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &STATUS { + &self.status + } #[doc = "0x28 - Control"] - pub control0: CONTROL0, + #[inline(always)] + pub const fn control0(&self) -> &CONTROL0 { + &self.control0 + } #[doc = "0x2c - Configure"] - pub control1: CONTROL1, + #[inline(always)] + pub const fn control1(&self) -> &CONTROL1 { + &self.control1 + } #[doc = "0x30 - Interrupt flags"] - pub interrupt: INTERRUPT, + #[inline(always)] + pub const fn interrupt(&self) -> &INTERRUPT { + &self.interrupt + } #[doc = "0x34 - Mask interrupts that change in INTERRUPT"] - pub irpt_mask: IRPT_MASK, + #[inline(always)] + pub const fn irpt_mask(&self) -> &IRPT_MASK { + &self.irpt_mask + } #[doc = "0x38 - Enable interrupt to core"] - pub irpt_en: IRPT_EN, + #[inline(always)] + pub const fn irpt_en(&self) -> &IRPT_EN { + &self.irpt_en + } #[doc = "0x3c - Control 2"] - pub control2: CONTROL2, - _reserved16: [u8; 0x10], + #[inline(always)] + pub const fn control2(&self) -> &CONTROL2 { + &self.control2 + } #[doc = "0x50 - Force an interrupt"] - pub force_irpt: FORCE_IRPT, - _reserved17: [u8; 0x1c], + #[inline(always)] + pub const fn force_irpt(&self) -> &FORCE_IRPT { + &self.force_irpt + } #[doc = "0x70 - Number of SD clock cycles to wait for boot"] - pub boot_timeout: BOOT_TIMEOUT, + #[inline(always)] + pub const fn boot_timeout(&self) -> &BOOT_TIMEOUT { + &self.boot_timeout + } #[doc = "0x74 - What submodules are accessed by the debug bus"] - pub dbg_sel: DBG_SEL, - _reserved19: [u8; 0x08], + #[inline(always)] + pub const fn dbg_sel(&self) -> &DBG_SEL { + &self.dbg_sel + } #[doc = "0x80 - Fine tune DMA request generation"] - pub exrdfifo_cfg: EXRDFIFO_CFG, + #[inline(always)] + pub const fn exrdfifo_cfg(&self) -> &EXRDFIFO_CFG { + &self.exrdfifo_cfg + } #[doc = "0x84 - Enable the extension data register"] - pub exrdfifo_en: EXRDFIFO_EN, + #[inline(always)] + pub const fn exrdfifo_en(&self) -> &EXRDFIFO_EN { + &self.exrdfifo_en + } #[doc = "0x88 - Sample clock delay step duration"] - pub tune_step: TUNE_STEP, + #[inline(always)] + pub const fn tune_step(&self) -> &TUNE_STEP { + &self.tune_step + } #[doc = "0x8c - Sample clock delay step count for SDR"] - pub tune_steps_std: TUNE_STEPS_STD, + #[inline(always)] + pub const fn tune_steps_std(&self) -> &TUNE_STEPS_STD { + &self.tune_steps_std + } #[doc = "0x90 - Sample clock delay step count for DDR"] - pub tune_steps_ddr: TUNE_STEPS_DDR, - _reserved24: [u8; 0x5c], + #[inline(always)] + pub const fn tune_steps_ddr(&self) -> &TUNE_STEPS_DDR { + &self.tune_steps_ddr + } #[doc = "0xf0 - Interrupts in SPI mode depend on CS"] - pub spi_int_spt: SPI_INT_SPT, - _reserved25: [u8; 0x08], + #[inline(always)] + pub const fn spi_int_spt(&self) -> &SPI_INT_SPT { + &self.spi_int_spt + } #[doc = "0xfc - Version information and slot interrupt status"] - pub slotisr_ver: SLOTISR_VER, + #[inline(always)] + pub const fn slotisr_ver(&self) -> &SLOTISR_VER { + &self.slotisr_ver + } } #[doc = "ARG2 (rw) register accessor: Argument for ACMD23 command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arg2`] module"] diff --git a/crates/bcm2835-lpa/src/emmc/arg1.rs b/crates/bcm2835-lpa/src/emmc/arg1.rs index 491f890..4dd4150 100644 --- a/crates/bcm2835-lpa/src/emmc/arg1.rs +++ b/crates/bcm2835-lpa/src/emmc/arg1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/arg2.rs b/crates/bcm2835-lpa/src/emmc/arg2.rs index 90678c2..915f1c7 100644 --- a/crates/bcm2835-lpa/src/emmc/arg2.rs +++ b/crates/bcm2835-lpa/src/emmc/arg2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/blksizecnt.rs b/crates/bcm2835-lpa/src/emmc/blksizecnt.rs index c6eec15..1f432bc 100644 --- a/crates/bcm2835-lpa/src/emmc/blksizecnt.rs +++ b/crates/bcm2835-lpa/src/emmc/blksizecnt.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `BLKSIZE` reader - Block size in bytes"] pub type BLKSIZE_R = crate::FieldReader; #[doc = "Field `BLKSIZE` writer - Block size in bytes"] -pub type BLKSIZE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type BLKSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `BLKCNT` reader - Number of blocks to be transferred"] pub type BLKCNT_R = crate::FieldReader; #[doc = "Field `BLKCNT` writer - Number of blocks to be transferred"] -pub type BLKCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type BLKCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:9 - Block size in bytes"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:9 - Block size in bytes"] #[inline(always)] #[must_use] - pub fn blksize(&mut self) -> BLKSIZE_W { - BLKSIZE_W::new(self) + pub fn blksize(&mut self) -> BLKSIZE_W { + BLKSIZE_W::new(self, 0) } #[doc = "Bits 16:31 - Number of blocks to be transferred"] #[inline(always)] #[must_use] - pub fn blkcnt(&mut self) -> BLKCNT_W { - BLKCNT_W::new(self) + pub fn blkcnt(&mut self) -> BLKCNT_W { + BLKCNT_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/boot_timeout.rs b/crates/bcm2835-lpa/src/emmc/boot_timeout.rs index 41d8ff1..1931547 100644 --- a/crates/bcm2835-lpa/src/emmc/boot_timeout.rs +++ b/crates/bcm2835-lpa/src/emmc/boot_timeout.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/cmdtm.rs b/crates/bcm2835-lpa/src/emmc/cmdtm.rs index 6ff28c8..2388784 100644 --- a/crates/bcm2835-lpa/src/emmc/cmdtm.rs +++ b/crates/bcm2835-lpa/src/emmc/cmdtm.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TM_BLKCNT_EN` reader - Enable block counter"] pub type TM_BLKCNT_EN_R = crate::BitReader; #[doc = "Field `TM_BLKCNT_EN` writer - Enable block counter"] -pub type TM_BLKCNT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TM_BLKCNT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TM_AUTO_CMD_EN` reader - Command after completion"] pub type TM_AUTO_CMD_EN_R = crate::FieldReader; #[doc = "Command after completion\n\nValue on reset: 0"] @@ -56,9 +56,8 @@ impl TM_AUTO_CMD_EN_R { } } #[doc = "Field `TM_AUTO_CMD_EN` writer - Command after completion"] -pub type TM_AUTO_CMD_EN_W<'a, REG, const O: u8> = - crate::FieldWriter<'a, REG, 2, O, TM_AUTO_CMD_EN_A>; -impl<'a, REG, const O: u8> TM_AUTO_CMD_EN_W<'a, REG, O> +pub type TM_AUTO_CMD_EN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TM_AUTO_CMD_EN_A>; +impl<'a, REG> TM_AUTO_CMD_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -116,8 +115,8 @@ impl TM_DAT_DIR_R { } } #[doc = "Field `TM_DAT_DIR` writer - Direction of data transfer"] -pub type TM_DAT_DIR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TM_DAT_DIR_A>; -impl<'a, REG, const O: u8> TM_DAT_DIR_W<'a, REG, O> +pub type TM_DAT_DIR_W<'a, REG> = crate::BitWriter<'a, REG, TM_DAT_DIR_A>; +impl<'a, REG> TM_DAT_DIR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -169,8 +168,8 @@ impl TM_MULTI_BLOCK_R { } } #[doc = "Field `TM_MULTI_BLOCK` writer - Type of data transfer"] -pub type TM_MULTI_BLOCK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TM_MULTI_BLOCK_A>; -impl<'a, REG, const O: u8> TM_MULTI_BLOCK_W<'a, REG, O> +pub type TM_MULTI_BLOCK_W<'a, REG> = crate::BitWriter<'a, REG, TM_MULTI_BLOCK_A>; +impl<'a, REG> TM_MULTI_BLOCK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -243,8 +242,8 @@ impl CMD_RSPNS_TYPE_R { } } #[doc = "Field `CMD_RSPNS_TYPE` writer - Type of expected response"] -pub type CMD_RSPNS_TYPE_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, RESPONSE_A>; -impl<'a, REG, const O: u8> CMD_RSPNS_TYPE_W<'a, REG, O> +pub type CMD_RSPNS_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RESPONSE_A>; +impl<'a, REG> CMD_RSPNS_TYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,15 +272,15 @@ where #[doc = "Field `CMD_CRCCHK_EN` reader - Check the responses CRC"] pub type CMD_CRCCHK_EN_R = crate::BitReader; #[doc = "Field `CMD_CRCCHK_EN` writer - Check the responses CRC"] -pub type CMD_CRCCHK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_CRCCHK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_IXCHK_EN` reader - Check that the response has the same command index"] pub type CMD_IXCHK_EN_R = crate::BitReader; #[doc = "Field `CMD_IXCHK_EN` writer - Check that the response has the same command index"] -pub type CMD_IXCHK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_IXCHK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_ISDATA` reader - Command involves data"] pub type CMD_ISDATA_R = crate::BitReader; #[doc = "Field `CMD_ISDATA` writer - Command involves data"] -pub type CMD_ISDATA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_ISDATA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_TYPE` reader - Type of command to be issued"] pub type CMD_TYPE_R = crate::FieldReader; #[doc = "Type of command to be issued\n\nValue on reset: 0"] @@ -340,8 +339,8 @@ impl CMD_TYPE_R { } } #[doc = "Field `CMD_TYPE` writer - Type of command to be issued"] -pub type CMD_TYPE_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, CMD_TYPE_A>; -impl<'a, REG, const O: u8> CMD_TYPE_W<'a, REG, O> +pub type CMD_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CMD_TYPE_A>; +impl<'a, REG> CMD_TYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -370,7 +369,7 @@ where #[doc = "Field `CMD_INDEX` reader - Command index to be issued"] pub type CMD_INDEX_R = crate::FieldReader; #[doc = "Field `CMD_INDEX` writer - Command index to be issued"] -pub type CMD_INDEX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type CMD_INDEX_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bit 1 - Enable block counter"] #[inline(always)] @@ -459,69 +458,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Enable block counter"] #[inline(always)] #[must_use] - pub fn tm_blkcnt_en(&mut self) -> TM_BLKCNT_EN_W { - TM_BLKCNT_EN_W::new(self) + pub fn tm_blkcnt_en(&mut self) -> TM_BLKCNT_EN_W { + TM_BLKCNT_EN_W::new(self, 1) } #[doc = "Bits 2:3 - Command after completion"] #[inline(always)] #[must_use] - pub fn tm_auto_cmd_en(&mut self) -> TM_AUTO_CMD_EN_W { - TM_AUTO_CMD_EN_W::new(self) + pub fn tm_auto_cmd_en(&mut self) -> TM_AUTO_CMD_EN_W { + TM_AUTO_CMD_EN_W::new(self, 2) } #[doc = "Bit 4 - Direction of data transfer"] #[inline(always)] #[must_use] - pub fn tm_dat_dir(&mut self) -> TM_DAT_DIR_W { - TM_DAT_DIR_W::new(self) + pub fn tm_dat_dir(&mut self) -> TM_DAT_DIR_W { + TM_DAT_DIR_W::new(self, 4) } #[doc = "Bit 5 - Type of data transfer"] #[inline(always)] #[must_use] - pub fn tm_multi_block(&mut self) -> TM_MULTI_BLOCK_W { - TM_MULTI_BLOCK_W::new(self) + pub fn tm_multi_block(&mut self) -> TM_MULTI_BLOCK_W { + TM_MULTI_BLOCK_W::new(self, 5) } #[doc = "Bits 16:17 - Type of expected response"] #[inline(always)] #[must_use] - pub fn cmd_rspns_type(&mut self) -> CMD_RSPNS_TYPE_W { - CMD_RSPNS_TYPE_W::new(self) + pub fn cmd_rspns_type(&mut self) -> CMD_RSPNS_TYPE_W { + CMD_RSPNS_TYPE_W::new(self, 16) } #[doc = "Bit 19 - Check the responses CRC"] #[inline(always)] #[must_use] - pub fn cmd_crcchk_en(&mut self) -> CMD_CRCCHK_EN_W { - CMD_CRCCHK_EN_W::new(self) + pub fn cmd_crcchk_en(&mut self) -> CMD_CRCCHK_EN_W { + CMD_CRCCHK_EN_W::new(self, 19) } #[doc = "Bit 20 - Check that the response has the same command index"] #[inline(always)] #[must_use] - pub fn cmd_ixchk_en(&mut self) -> CMD_IXCHK_EN_W { - CMD_IXCHK_EN_W::new(self) + pub fn cmd_ixchk_en(&mut self) -> CMD_IXCHK_EN_W { + CMD_IXCHK_EN_W::new(self, 20) } #[doc = "Bit 21 - Command involves data"] #[inline(always)] #[must_use] - pub fn cmd_isdata(&mut self) -> CMD_ISDATA_W { - CMD_ISDATA_W::new(self) + pub fn cmd_isdata(&mut self) -> CMD_ISDATA_W { + CMD_ISDATA_W::new(self, 21) } #[doc = "Bits 22:23 - Type of command to be issued"] #[inline(always)] #[must_use] - pub fn cmd_type(&mut self) -> CMD_TYPE_W { - CMD_TYPE_W::new(self) + pub fn cmd_type(&mut self) -> CMD_TYPE_W { + CMD_TYPE_W::new(self, 22) } #[doc = "Bits 24:29 - Command index to be issued"] #[inline(always)] #[must_use] - pub fn cmd_index(&mut self) -> CMD_INDEX_W { - CMD_INDEX_W::new(self) + pub fn cmd_index(&mut self) -> CMD_INDEX_W { + CMD_INDEX_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/control0.rs b/crates/bcm2835-lpa/src/emmc/control0.rs index 47fb08f..bb95bf4 100644 --- a/crates/bcm2835-lpa/src/emmc/control0.rs +++ b/crates/bcm2835-lpa/src/emmc/control0.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `HCTL_DWIDTH` reader - Use 4 data lines"] pub type HCTL_DWIDTH_R = crate::BitReader; #[doc = "Field `HCTL_DWIDTH` writer - Use 4 data lines"] -pub type HCTL_DWIDTH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_DWIDTH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HCTL_HS_EN` reader - Enable high speed mode"] pub type HCTL_HS_EN_R = crate::BitReader; #[doc = "Field `HCTL_HS_EN` writer - Enable high speed mode"] -pub type HCTL_HS_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_HS_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HCTL_8BIT` reader - Use 8 data lines"] pub type HCTL_8BIT_R = crate::BitReader; #[doc = "Field `HCTL_8BIT` writer - Use 8 data lines"] -pub type HCTL_8BIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_8BIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_STOP` reader - Stop the current transaction at the next block gap"] pub type GAP_STOP_R = crate::BitReader; #[doc = "Field `GAP_STOP` writer - Stop the current transaction at the next block gap"] -pub type GAP_STOP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_STOP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_RESTART` reader - Restart a transaction stopped by GAP_STOP"] pub type GAP_RESTART_R = crate::BitReader; #[doc = "Field `GAP_RESTART` writer - Restart a transaction stopped by GAP_STOP"] -pub type GAP_RESTART_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_RESTART_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READWAIT_EN` reader - Use DAT2 read/wait protocol"] pub type READWAIT_EN_R = crate::BitReader; #[doc = "Field `READWAIT_EN` writer - Use DAT2 read/wait protocol"] -pub type READWAIT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READWAIT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_IEN` reader - Enable interrupt on block gap"] pub type GAP_IEN_R = crate::BitReader; #[doc = "Field `GAP_IEN` writer - Enable interrupt on block gap"] -pub type GAP_IEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_IEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_MODE` reader - Enable SPI mode"] pub type SPI_MODE_R = crate::BitReader; #[doc = "Field `SPI_MODE` writer - Enable SPI mode"] -pub type SPI_MODE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOT_EN` reader - Boot mode enabled"] pub type BOOT_EN_R = crate::BitReader; #[doc = "Field `BOOT_EN` writer - Boot mode enabled"] -pub type BOOT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ALT_BOOT_EN` reader - Enable alternate boot mode"] pub type ALT_BOOT_EN_R = crate::BitReader; #[doc = "Field `ALT_BOOT_EN` writer - Enable alternate boot mode"] -pub type ALT_BOOT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ALT_BOOT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Use 4 data lines"] #[inline(always)] @@ -112,69 +112,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Use 4 data lines"] #[inline(always)] #[must_use] - pub fn hctl_dwidth(&mut self) -> HCTL_DWIDTH_W { - HCTL_DWIDTH_W::new(self) + pub fn hctl_dwidth(&mut self) -> HCTL_DWIDTH_W { + HCTL_DWIDTH_W::new(self, 1) } #[doc = "Bit 2 - Enable high speed mode"] #[inline(always)] #[must_use] - pub fn hctl_hs_en(&mut self) -> HCTL_HS_EN_W { - HCTL_HS_EN_W::new(self) + pub fn hctl_hs_en(&mut self) -> HCTL_HS_EN_W { + HCTL_HS_EN_W::new(self, 2) } #[doc = "Bit 5 - Use 8 data lines"] #[inline(always)] #[must_use] - pub fn hctl_8bit(&mut self) -> HCTL_8BIT_W { - HCTL_8BIT_W::new(self) + pub fn hctl_8bit(&mut self) -> HCTL_8BIT_W { + HCTL_8BIT_W::new(self, 5) } #[doc = "Bit 16 - Stop the current transaction at the next block gap"] #[inline(always)] #[must_use] - pub fn gap_stop(&mut self) -> GAP_STOP_W { - GAP_STOP_W::new(self) + pub fn gap_stop(&mut self) -> GAP_STOP_W { + GAP_STOP_W::new(self, 16) } #[doc = "Bit 17 - Restart a transaction stopped by GAP_STOP"] #[inline(always)] #[must_use] - pub fn gap_restart(&mut self) -> GAP_RESTART_W { - GAP_RESTART_W::new(self) + pub fn gap_restart(&mut self) -> GAP_RESTART_W { + GAP_RESTART_W::new(self, 17) } #[doc = "Bit 18 - Use DAT2 read/wait protocol"] #[inline(always)] #[must_use] - pub fn readwait_en(&mut self) -> READWAIT_EN_W { - READWAIT_EN_W::new(self) + pub fn readwait_en(&mut self) -> READWAIT_EN_W { + READWAIT_EN_W::new(self, 18) } #[doc = "Bit 19 - Enable interrupt on block gap"] #[inline(always)] #[must_use] - pub fn gap_ien(&mut self) -> GAP_IEN_W { - GAP_IEN_W::new(self) + pub fn gap_ien(&mut self) -> GAP_IEN_W { + GAP_IEN_W::new(self, 19) } #[doc = "Bit 20 - Enable SPI mode"] #[inline(always)] #[must_use] - pub fn spi_mode(&mut self) -> SPI_MODE_W { - SPI_MODE_W::new(self) + pub fn spi_mode(&mut self) -> SPI_MODE_W { + SPI_MODE_W::new(self, 20) } #[doc = "Bit 21 - Boot mode enabled"] #[inline(always)] #[must_use] - pub fn boot_en(&mut self) -> BOOT_EN_W { - BOOT_EN_W::new(self) + pub fn boot_en(&mut self) -> BOOT_EN_W { + BOOT_EN_W::new(self, 21) } #[doc = "Bit 22 - Enable alternate boot mode"] #[inline(always)] #[must_use] - pub fn alt_boot_en(&mut self) -> ALT_BOOT_EN_W { - ALT_BOOT_EN_W::new(self) + pub fn alt_boot_en(&mut self) -> ALT_BOOT_EN_W { + ALT_BOOT_EN_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/control1.rs b/crates/bcm2835-lpa/src/emmc/control1.rs index 40a8765..2171ae4 100644 --- a/crates/bcm2835-lpa/src/emmc/control1.rs +++ b/crates/bcm2835-lpa/src/emmc/control1.rs @@ -5,13 +5,13 @@ pub type W = crate::W; #[doc = "Field `CLK_INTLEN` reader - Enable internal clock"] pub type CLK_INTLEN_R = crate::BitReader; #[doc = "Field `CLK_INTLEN` writer - Enable internal clock"] -pub type CLK_INTLEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLK_INTLEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLK_STABLE` reader - SD Clock stable"] pub type CLK_STABLE_R = crate::BitReader; #[doc = "Field `CLK_EN` reader - SD Clock enable"] pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - SD Clock enable"] -pub type CLK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLK_GENSEL` reader - Mode of clock generation"] pub type CLK_GENSEL_R = crate::BitReader; #[doc = "Mode of clock generation\n\nValue on reset: 0"] @@ -49,8 +49,8 @@ impl CLK_GENSEL_R { } } #[doc = "Field `CLK_GENSEL` writer - Mode of clock generation"] -pub type CLK_GENSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CLK_GENSEL_A>; -impl<'a, REG, const O: u8> CLK_GENSEL_W<'a, REG, O> +pub type CLK_GENSEL_W<'a, REG> = crate::BitWriter<'a, REG, CLK_GENSEL_A>; +impl<'a, REG> CLK_GENSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -68,27 +68,27 @@ where #[doc = "Field `CLK_FREQ_MS2` reader - Clock base divider MSBs"] pub type CLK_FREQ_MS2_R = crate::FieldReader; #[doc = "Field `CLK_FREQ_MS2` writer - Clock base divider MSBs"] -pub type CLK_FREQ_MS2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CLK_FREQ_MS2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CLK_FREQ8` reader - Clock base divider LSB"] pub type CLK_FREQ8_R = crate::FieldReader; #[doc = "Field `CLK_FREQ8` writer - Clock base divider LSB"] -pub type CLK_FREQ8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CLK_FREQ8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DATA_TOUNIT` reader - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] pub type DATA_TOUNIT_R = crate::FieldReader; #[doc = "Field `DATA_TOUNIT` writer - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] -pub type DATA_TOUNIT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DATA_TOUNIT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SRST_HC` reader - Reset the complete host circuit"] pub type SRST_HC_R = crate::BitReader; #[doc = "Field `SRST_HC` writer - Reset the complete host circuit"] -pub type SRST_HC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_HC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRST_CMD` reader - Reset the command handling circuit"] pub type SRST_CMD_R = crate::BitReader; #[doc = "Field `SRST_CMD` writer - Reset the command handling circuit"] -pub type SRST_CMD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_CMD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRST_DATA` reader - Reset the data handling circuit"] pub type SRST_DATA_R = crate::BitReader; #[doc = "Field `SRST_DATA` writer - Reset the data handling circuit"] -pub type SRST_DATA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_DATA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable internal clock"] #[inline(always)] @@ -165,63 +165,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable internal clock"] #[inline(always)] #[must_use] - pub fn clk_intlen(&mut self) -> CLK_INTLEN_W { - CLK_INTLEN_W::new(self) + pub fn clk_intlen(&mut self) -> CLK_INTLEN_W { + CLK_INTLEN_W::new(self, 0) } #[doc = "Bit 2 - SD Clock enable"] #[inline(always)] #[must_use] - pub fn clk_en(&mut self) -> CLK_EN_W { - CLK_EN_W::new(self) + pub fn clk_en(&mut self) -> CLK_EN_W { + CLK_EN_W::new(self, 2) } #[doc = "Bit 5 - Mode of clock generation"] #[inline(always)] #[must_use] - pub fn clk_gensel(&mut self) -> CLK_GENSEL_W { - CLK_GENSEL_W::new(self) + pub fn clk_gensel(&mut self) -> CLK_GENSEL_W { + CLK_GENSEL_W::new(self, 5) } #[doc = "Bits 6:7 - Clock base divider MSBs"] #[inline(always)] #[must_use] - pub fn clk_freq_ms2(&mut self) -> CLK_FREQ_MS2_W { - CLK_FREQ_MS2_W::new(self) + pub fn clk_freq_ms2(&mut self) -> CLK_FREQ_MS2_W { + CLK_FREQ_MS2_W::new(self, 6) } #[doc = "Bits 8:15 - Clock base divider LSB"] #[inline(always)] #[must_use] - pub fn clk_freq8(&mut self) -> CLK_FREQ8_W { - CLK_FREQ8_W::new(self) + pub fn clk_freq8(&mut self) -> CLK_FREQ8_W { + CLK_FREQ8_W::new(self, 8) } #[doc = "Bits 16:19 - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] #[inline(always)] #[must_use] - pub fn data_tounit(&mut self) -> DATA_TOUNIT_W { - DATA_TOUNIT_W::new(self) + pub fn data_tounit(&mut self) -> DATA_TOUNIT_W { + DATA_TOUNIT_W::new(self, 16) } #[doc = "Bit 24 - Reset the complete host circuit"] #[inline(always)] #[must_use] - pub fn srst_hc(&mut self) -> SRST_HC_W { - SRST_HC_W::new(self) + pub fn srst_hc(&mut self) -> SRST_HC_W { + SRST_HC_W::new(self, 24) } #[doc = "Bit 25 - Reset the command handling circuit"] #[inline(always)] #[must_use] - pub fn srst_cmd(&mut self) -> SRST_CMD_W { - SRST_CMD_W::new(self) + pub fn srst_cmd(&mut self) -> SRST_CMD_W { + SRST_CMD_W::new(self, 25) } #[doc = "Bit 26 - Reset the data handling circuit"] #[inline(always)] #[must_use] - pub fn srst_data(&mut self) -> SRST_DATA_W { - SRST_DATA_W::new(self) + pub fn srst_data(&mut self) -> SRST_DATA_W { + SRST_DATA_W::new(self, 26) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/control2.rs b/crates/bcm2835-lpa/src/emmc/control2.rs index bb052fc..0e5ab02 100644 --- a/crates/bcm2835-lpa/src/emmc/control2.rs +++ b/crates/bcm2835-lpa/src/emmc/control2.rs @@ -80,8 +80,8 @@ impl UHSMODE_R { } } #[doc = "Field `UHSMODE` writer - Select the speed of the SD card"] -pub type UHSMODE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O, UHSMODE_A>; -impl<'a, REG, const O: u8> UHSMODE_W<'a, REG, O> +pub type UHSMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, UHSMODE_A>; +impl<'a, REG> UHSMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -115,11 +115,11 @@ where #[doc = "Field `TUNEON` reader - SD Clock tune in progress"] pub type TUNEON_R = crate::BitReader; #[doc = "Field `TUNEON` writer - SD Clock tune in progress"] -pub type TUNEON_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TUNEON_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TUNED` reader - Tuned clock is used for sampling data"] pub type TUNED_R = crate::BitReader; #[doc = "Field `TUNED` writer - Tuned clock is used for sampling data"] -pub type TUNED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TUNED_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Auto command not executed due to an error"] #[inline(always)] @@ -184,27 +184,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 16:18 - Select the speed of the SD card"] #[inline(always)] #[must_use] - pub fn uhsmode(&mut self) -> UHSMODE_W { - UHSMODE_W::new(self) + pub fn uhsmode(&mut self) -> UHSMODE_W { + UHSMODE_W::new(self, 16) } #[doc = "Bit 22 - SD Clock tune in progress"] #[inline(always)] #[must_use] - pub fn tuneon(&mut self) -> TUNEON_W { - TUNEON_W::new(self) + pub fn tuneon(&mut self) -> TUNEON_W { + TUNEON_W::new(self, 22) } #[doc = "Bit 23 - Tuned clock is used for sampling data"] #[inline(always)] #[must_use] - pub fn tuned(&mut self) -> TUNED_W { - TUNED_W::new(self) + pub fn tuned(&mut self) -> TUNED_W { + TUNED_W::new(self, 23) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/data.rs b/crates/bcm2835-lpa/src/emmc/data.rs index ac2280f..2f5aef2 100644 --- a/crates/bcm2835-lpa/src/emmc/data.rs +++ b/crates/bcm2835-lpa/src/emmc/data.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/dbg_sel.rs b/crates/bcm2835-lpa/src/emmc/dbg_sel.rs index 343a4db..a308d75 100644 --- a/crates/bcm2835-lpa/src/emmc/dbg_sel.rs +++ b/crates/bcm2835-lpa/src/emmc/dbg_sel.rs @@ -39,8 +39,8 @@ impl SELECT_R { } } #[doc = "Field `SELECT` writer - "] -pub type SELECT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SELECT_A>; -impl<'a, REG, const O: u8> SELECT_W<'a, REG, O> +pub type SELECT_W<'a, REG> = crate::BitWriter<'a, REG, SELECT_A>; +impl<'a, REG> SELECT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -71,15 +71,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0"] #[inline(always)] #[must_use] - pub fn select(&mut self) -> SELECT_W { - SELECT_W::new(self) + pub fn select(&mut self) -> SELECT_W { + SELECT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/exrdfifo_cfg.rs b/crates/bcm2835-lpa/src/emmc/exrdfifo_cfg.rs index 13440a1..ba96a18 100644 --- a/crates/bcm2835-lpa/src/emmc/exrdfifo_cfg.rs +++ b/crates/bcm2835-lpa/src/emmc/exrdfifo_cfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RD_THRSH` reader - Read threshold in 32 bit words"] pub type RD_THRSH_R = crate::FieldReader; #[doc = "Field `RD_THRSH` writer - Read threshold in 32 bit words"] -pub type RD_THRSH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type RD_THRSH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Read threshold in 32 bit words"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Read threshold in 32 bit words"] #[inline(always)] #[must_use] - pub fn rd_thrsh(&mut self) -> RD_THRSH_W { - RD_THRSH_W::new(self) + pub fn rd_thrsh(&mut self) -> RD_THRSH_W { + RD_THRSH_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/exrdfifo_en.rs b/crates/bcm2835-lpa/src/emmc/exrdfifo_en.rs index e6b6583..464a5fe 100644 --- a/crates/bcm2835-lpa/src/emmc/exrdfifo_en.rs +++ b/crates/bcm2835-lpa/src/emmc/exrdfifo_en.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `ENABLE` reader - Enable the extension FIFO"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable the extension FIFO"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable the extension FIFO"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable the extension FIFO"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/force_irpt.rs b/crates/bcm2835-lpa/src/emmc/force_irpt.rs index 682b8fe..2404f46 100644 --- a/crates/bcm2835-lpa/src/emmc/force_irpt.rs +++ b/crates/bcm2835-lpa/src/emmc/force_irpt.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/interrupt.rs b/crates/bcm2835-lpa/src/emmc/interrupt.rs index c28598f..46231a7 100644 --- a/crates/bcm2835-lpa/src/emmc/interrupt.rs +++ b/crates/bcm2835-lpa/src/emmc/interrupt.rs @@ -5,73 +5,73 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERR` reader - An error has occured"] pub type ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -190,111 +190,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/irpt_en.rs b/crates/bcm2835-lpa/src/emmc/irpt_en.rs index af7bc80..143dd3b 100644 --- a/crates/bcm2835-lpa/src/emmc/irpt_en.rs +++ b/crates/bcm2835-lpa/src/emmc/irpt_en.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/irpt_mask.rs b/crates/bcm2835-lpa/src/emmc/irpt_mask.rs index e8dc746..e3281ca 100644 --- a/crates/bcm2835-lpa/src/emmc/irpt_mask.rs +++ b/crates/bcm2835-lpa/src/emmc/irpt_mask.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/resp0.rs b/crates/bcm2835-lpa/src/emmc/resp0.rs index 79ea5ca..e14de29 100644 --- a/crates/bcm2835-lpa/src/emmc/resp0.rs +++ b/crates/bcm2835-lpa/src/emmc/resp0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/resp1.rs b/crates/bcm2835-lpa/src/emmc/resp1.rs index 12a2f9a..9c6a866 100644 --- a/crates/bcm2835-lpa/src/emmc/resp1.rs +++ b/crates/bcm2835-lpa/src/emmc/resp1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/resp2.rs b/crates/bcm2835-lpa/src/emmc/resp2.rs index 5a51d34..273382e 100644 --- a/crates/bcm2835-lpa/src/emmc/resp2.rs +++ b/crates/bcm2835-lpa/src/emmc/resp2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/resp3.rs b/crates/bcm2835-lpa/src/emmc/resp3.rs index 65ef18f..3f290da 100644 --- a/crates/bcm2835-lpa/src/emmc/resp3.rs +++ b/crates/bcm2835-lpa/src/emmc/resp3.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/emmc/slotisr_ver.rs b/crates/bcm2835-lpa/src/emmc/slotisr_ver.rs index 0db90df..eb34fd8 100644 --- a/crates/bcm2835-lpa/src/emmc/slotisr_ver.rs +++ b/crates/bcm2835-lpa/src/emmc/slotisr_ver.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `SLOT_STATUS` reader - OR of interrupt and wakeup signals for each slot"] pub type SLOT_STATUS_R = crate::FieldReader; #[doc = "Field `SLOT_STATUS` writer - OR of interrupt and wakeup signals for each slot"] -pub type SLOT_STATUS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SLOT_STATUS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SDVERSION` reader - Host controller specification version"] pub type SDVERSION_R = crate::FieldReader; #[doc = "Field `SDVERSION` writer - Host controller specification version"] -pub type SDVERSION_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDVERSION_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VENDOR` reader - Vendor version number"] pub type VENDOR_R = crate::FieldReader; #[doc = "Field `VENDOR` writer - Vendor version number"] -pub type VENDOR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VENDOR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - OR of interrupt and wakeup signals for each slot"] #[inline(always)] @@ -45,27 +45,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - OR of interrupt and wakeup signals for each slot"] #[inline(always)] #[must_use] - pub fn slot_status(&mut self) -> SLOT_STATUS_W { - SLOT_STATUS_W::new(self) + pub fn slot_status(&mut self) -> SLOT_STATUS_W { + SLOT_STATUS_W::new(self, 0) } #[doc = "Bits 16:23 - Host controller specification version"] #[inline(always)] #[must_use] - pub fn sdversion(&mut self) -> SDVERSION_W { - SDVERSION_W::new(self) + pub fn sdversion(&mut self) -> SDVERSION_W { + SDVERSION_W::new(self, 16) } #[doc = "Bits 24:31 - Vendor version number"] #[inline(always)] #[must_use] - pub fn vendor(&mut self) -> VENDOR_W { - VENDOR_W::new(self) + pub fn vendor(&mut self) -> VENDOR_W { + VENDOR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/spi_int_spt.rs b/crates/bcm2835-lpa/src/emmc/spi_int_spt.rs index ba304fe..7c4c0ae 100644 --- a/crates/bcm2835-lpa/src/emmc/spi_int_spt.rs +++ b/crates/bcm2835-lpa/src/emmc/spi_int_spt.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `SELECT` reader - "] pub type SELECT_R = crate::FieldReader; #[doc = "Field `SELECT` writer - "] -pub type SELECT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SELECT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7"] #[inline(always)] #[must_use] - pub fn select(&mut self) -> SELECT_W { - SELECT_W::new(self) + pub fn select(&mut self) -> SELECT_W { + SELECT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/status.rs b/crates/bcm2835-lpa/src/emmc/status.rs index 2b07e21..c4dbd6d 100644 --- a/crates/bcm2835-lpa/src/emmc/status.rs +++ b/crates/bcm2835-lpa/src/emmc/status.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `CMD_INHIBIT` reader - Command line still in use"] pub type CMD_INHIBIT_R = crate::BitReader; #[doc = "Field `CMD_INHIBIT` writer - Command line still in use"] -pub type CMD_INHIBIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_INHIBIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_INHIBIT` reader - Data lines still in use"] pub type DAT_INHIBIT_R = crate::BitReader; #[doc = "Field `DAT_INHIBIT` writer - Data lines still in use"] -pub type DAT_INHIBIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DAT_INHIBIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_ACTIVE` reader - At least one data line is active"] pub type DAT_ACTIVE_R = crate::BitReader; #[doc = "Field `DAT_ACTIVE` writer - At least one data line is active"] -pub type DAT_ACTIVE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DAT_ACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_TRANSFER` reader - Write transfer is active"] pub type WRITE_TRANSFER_R = crate::BitReader; #[doc = "Field `WRITE_TRANSFER` writer - Write transfer is active"] -pub type WRITE_TRANSFER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_TRANSFER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_TRANSFER` reader - Read transfer is active"] pub type READ_TRANSFER_R = crate::BitReader; #[doc = "Field `READ_TRANSFER` writer - Read transfer is active"] -pub type READ_TRANSFER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_TRANSFER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFFER_WRITE_ENABLE` reader - The buffer has space for new data"] pub type BUFFER_WRITE_ENABLE_R = crate::BitReader; #[doc = "Field `BUFFER_WRITE_ENABLE` writer - The buffer has space for new data"] -pub type BUFFER_WRITE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUFFER_WRITE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFFER_READ_ENABLE` reader - New data is available to read"] pub type BUFFER_READ_ENABLE_R = crate::BitReader; #[doc = "Field `BUFFER_READ_ENABLE` writer - New data is available to read"] -pub type BUFFER_READ_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUFFER_READ_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_LEVEL0` reader - Value of DAT\\[3:0\\]"] pub type DAT_LEVEL0_R = crate::FieldReader; #[doc = "Field `DAT_LEVEL0` writer - Value of DAT\\[3:0\\]"] -pub type DAT_LEVEL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DAT_LEVEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CMD_LEVEL` reader - Value of CMD"] pub type CMD_LEVEL_R = crate::BitReader; #[doc = "Field `CMD_LEVEL` writer - Value of CMD"] -pub type CMD_LEVEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_LEVEL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_LEVEL1` reader - Value of DAT\\[7:4\\]"] pub type DAT_LEVEL1_R = crate::FieldReader; #[doc = "Field `DAT_LEVEL1` writer - Value of DAT\\[7:4\\]"] -pub type DAT_LEVEL1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DAT_LEVEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Command line still in use"] #[inline(always)] @@ -124,69 +124,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command line still in use"] #[inline(always)] #[must_use] - pub fn cmd_inhibit(&mut self) -> CMD_INHIBIT_W { - CMD_INHIBIT_W::new(self) + pub fn cmd_inhibit(&mut self) -> CMD_INHIBIT_W { + CMD_INHIBIT_W::new(self, 0) } #[doc = "Bit 1 - Data lines still in use"] #[inline(always)] #[must_use] - pub fn dat_inhibit(&mut self) -> DAT_INHIBIT_W { - DAT_INHIBIT_W::new(self) + pub fn dat_inhibit(&mut self) -> DAT_INHIBIT_W { + DAT_INHIBIT_W::new(self, 1) } #[doc = "Bit 2 - At least one data line is active"] #[inline(always)] #[must_use] - pub fn dat_active(&mut self) -> DAT_ACTIVE_W { - DAT_ACTIVE_W::new(self) + pub fn dat_active(&mut self) -> DAT_ACTIVE_W { + DAT_ACTIVE_W::new(self, 2) } #[doc = "Bit 8 - Write transfer is active"] #[inline(always)] #[must_use] - pub fn write_transfer(&mut self) -> WRITE_TRANSFER_W { - WRITE_TRANSFER_W::new(self) + pub fn write_transfer(&mut self) -> WRITE_TRANSFER_W { + WRITE_TRANSFER_W::new(self, 8) } #[doc = "Bit 9 - Read transfer is active"] #[inline(always)] #[must_use] - pub fn read_transfer(&mut self) -> READ_TRANSFER_W { - READ_TRANSFER_W::new(self) + pub fn read_transfer(&mut self) -> READ_TRANSFER_W { + READ_TRANSFER_W::new(self, 9) } #[doc = "Bit 10 - The buffer has space for new data"] #[inline(always)] #[must_use] - pub fn buffer_write_enable(&mut self) -> BUFFER_WRITE_ENABLE_W { - BUFFER_WRITE_ENABLE_W::new(self) + pub fn buffer_write_enable(&mut self) -> BUFFER_WRITE_ENABLE_W { + BUFFER_WRITE_ENABLE_W::new(self, 10) } #[doc = "Bit 11 - New data is available to read"] #[inline(always)] #[must_use] - pub fn buffer_read_enable(&mut self) -> BUFFER_READ_ENABLE_W { - BUFFER_READ_ENABLE_W::new(self) + pub fn buffer_read_enable(&mut self) -> BUFFER_READ_ENABLE_W { + BUFFER_READ_ENABLE_W::new(self, 11) } #[doc = "Bits 20:23 - Value of DAT\\[3:0\\]"] #[inline(always)] #[must_use] - pub fn dat_level0(&mut self) -> DAT_LEVEL0_W { - DAT_LEVEL0_W::new(self) + pub fn dat_level0(&mut self) -> DAT_LEVEL0_W { + DAT_LEVEL0_W::new(self, 20) } #[doc = "Bit 24 - Value of CMD"] #[inline(always)] #[must_use] - pub fn cmd_level(&mut self) -> CMD_LEVEL_W { - CMD_LEVEL_W::new(self) + pub fn cmd_level(&mut self) -> CMD_LEVEL_W { + CMD_LEVEL_W::new(self, 24) } #[doc = "Bits 25:28 - Value of DAT\\[7:4\\]"] #[inline(always)] #[must_use] - pub fn dat_level1(&mut self) -> DAT_LEVEL1_W { - DAT_LEVEL1_W::new(self) + pub fn dat_level1(&mut self) -> DAT_LEVEL1_W { + DAT_LEVEL1_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/tune_step.rs b/crates/bcm2835-lpa/src/emmc/tune_step.rs index aa0dd84..50aaa04 100644 --- a/crates/bcm2835-lpa/src/emmc/tune_step.rs +++ b/crates/bcm2835-lpa/src/emmc/tune_step.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DELAY` reader - "] pub type DELAY_R = crate::FieldReader; #[doc = "Field `DELAY` writer - "] -pub type DELAY_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2"] #[inline(always)] #[must_use] - pub fn delay(&mut self) -> DELAY_W { - DELAY_W::new(self) + pub fn delay(&mut self) -> DELAY_W { + DELAY_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/tune_steps_ddr.rs b/crates/bcm2835-lpa/src/emmc/tune_steps_ddr.rs index c4f1dd8..e1e156e 100644 --- a/crates/bcm2835-lpa/src/emmc/tune_steps_ddr.rs +++ b/crates/bcm2835-lpa/src/emmc/tune_steps_ddr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `STEPS` reader - "] pub type STEPS_R = crate::FieldReader; #[doc = "Field `STEPS` writer - "] -pub type STEPS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type STEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5"] #[inline(always)] #[must_use] - pub fn steps(&mut self) -> STEPS_W { - STEPS_W::new(self) + pub fn steps(&mut self) -> STEPS_W { + STEPS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/emmc/tune_steps_std.rs b/crates/bcm2835-lpa/src/emmc/tune_steps_std.rs index cf65897..6eb3de0 100644 --- a/crates/bcm2835-lpa/src/emmc/tune_steps_std.rs +++ b/crates/bcm2835-lpa/src/emmc/tune_steps_std.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `STEPS` reader - "] pub type STEPS_R = crate::FieldReader; #[doc = "Field `STEPS` writer - "] -pub type STEPS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type STEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5"] #[inline(always)] #[must_use] - pub fn steps(&mut self) -> STEPS_W { - STEPS_W::new(self) + pub fn steps(&mut self) -> STEPS_W { + STEPS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/generic.rs b/crates/bcm2835-lpa/src/generic.rs index a34573a..453ce21 100644 --- a/crates/bcm2835-lpa/src/generic.rs +++ b/crates/bcm2835-lpa/src/generic.rs @@ -316,12 +316,10 @@ pub struct Safe; #[doc(hidden)] pub struct Unsafe; #[doc = " Write field Proxy with unsafe `bits`"] -pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Unsafe>; +pub type FieldWriter<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Unsafe>; #[doc = " Write field Proxy with safe `bits`"] -pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Safe>; -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> +pub type FieldWriterSafe<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Safe>; +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -329,6 +327,16 @@ where { #[doc = " Field width"] pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes raw bits to the field"] #[doc = ""] #[doc = " # Safety"] @@ -336,8 +344,8 @@ where #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] #[inline(always)] pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -346,7 +354,7 @@ where unsafe { self.bits(FI::Ux::from(variant)) } } } -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> +impl<'a, REG, const WI: u8, FI> FieldWriterSafe<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -354,11 +362,21 @@ where { #[doc = " Field width"] pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -372,19 +390,29 @@ macro_rules! bit_proxy { #[doc(hidden)] pub struct $mwv; #[doc = " Bit-wise write field proxy"] - pub type $writer<'a, REG, const O: u8, FI = bool> = raw::BitWriter<'a, REG, O, FI, $mwv>; - impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> + pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>; + impl<'a, REG, FI> $writer<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, { #[doc = " Field width"] pub const WIDTH: u8 = 1; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + Self::WIDTH + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes bit to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF; + self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -402,7 +430,7 @@ bit_proxy!(BitWriter1C, Bit1C); bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -410,17 +438,17 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -428,11 +456,11 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -440,11 +468,11 @@ where #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -452,11 +480,11 @@ where #[doc = "Clears the field bit by passing one"] #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -464,11 +492,11 @@ where #[doc = "Sets the field bit by passing zero"] #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -476,11 +504,11 @@ where #[doc = "Toggle the field bit by passing one"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -488,7 +516,7 @@ where #[doc = "Toggle the field bit by passing zero"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } diff --git a/crates/bcm2835-lpa/src/generic/raw.rs b/crates/bcm2835-lpa/src/generic/raw.rs index 4ab1635..81f5779 100644 --- a/crates/bcm2835-lpa/src/generic/raw.rs +++ b/crates/bcm2835-lpa/src/generic/raw.rs @@ -41,15 +41,16 @@ impl BitReader { } } } -pub struct FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> +pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, FI: FieldSpec, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, Safety)>, } -impl<'a, REG, const WI: u8, const O: u8, FI, Safety> FieldWriter<'a, REG, WI, O, FI, Safety> +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -57,22 +58,24 @@ where #[doc = " Creates a new instance of the writer"] #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } } -pub struct BitWriter<'a, REG, const O: u8, FI = bool, M = BitM> +pub struct BitWriter<'a, REG, FI = bool, M = BitM> where REG: Writable + RegisterSpec, bool: From, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, M)>, } -impl<'a, REG, const O: u8, FI, M> BitWriter<'a, REG, O, FI, M> +impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M> where REG: Writable + RegisterSpec, bool: From, @@ -80,9 +83,10 @@ where #[doc = " Creates a new instance of the writer"] #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } diff --git a/crates/bcm2835-lpa/src/gpio.rs b/crates/bcm2835-lpa/src/gpio.rs index 270dc41..9526818 100644 --- a/crates/bcm2835-lpa/src/gpio.rs +++ b/crates/bcm2835-lpa/src/gpio.rs @@ -2,80 +2,206 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + gpfsel0: GPFSEL0, + gpfsel1: GPFSEL1, + gpfsel2: GPFSEL2, + gpfsel3: GPFSEL3, + gpfsel4: GPFSEL4, + gpfsel5: GPFSEL5, + _reserved6: [u8; 0x04], + gpset0: GPSET0, + gpset1: GPSET1, + _reserved8: [u8; 0x04], + gpclr0: GPCLR0, + gpclr1: GPCLR1, + _reserved10: [u8; 0x04], + gplev0: GPLEV0, + gplev1: GPLEV1, + _reserved12: [u8; 0x04], + gpeds0: GPEDS0, + gpeds1: GPEDS1, + _reserved14: [u8; 0x04], + gpren0: GPREN0, + gpren1: GPREN1, + _reserved16: [u8; 0x04], + gpfen0: GPFEN0, + gpfen1: GPFEN1, + _reserved18: [u8; 0x04], + gphen0: GPHEN0, + gphen1: GPHEN1, + _reserved20: [u8; 0x04], + gplen0: GPLEN0, + gplen1: GPLEN1, + _reserved22: [u8; 0x04], + gparen0: GPAREN0, + gparen1: GPAREN1, + _reserved24: [u8; 0x04], + gpafen0: GPAFEN0, + gpafen1: GPAFEN1, + _reserved26: [u8; 0x40], + extra_mux: EXTRA_MUX, + _reserved27: [u8; 0x10], + gpio_pup_pdn_cntrl_reg0: GPIO_PUP_PDN_CNTRL_REG0, + gpio_pup_pdn_cntrl_reg1: GPIO_PUP_PDN_CNTRL_REG1, + gpio_pup_pdn_cntrl_reg2: GPIO_PUP_PDN_CNTRL_REG2, + gpio_pup_pdn_cntrl_reg3: GPIO_PUP_PDN_CNTRL_REG3, +} +impl RegisterBlock { #[doc = "0x00 - GPIO Function Select 0"] - pub gpfsel0: GPFSEL0, + #[inline(always)] + pub const fn gpfsel0(&self) -> &GPFSEL0 { + &self.gpfsel0 + } #[doc = "0x04 - GPIO Function Select 1"] - pub gpfsel1: GPFSEL1, + #[inline(always)] + pub const fn gpfsel1(&self) -> &GPFSEL1 { + &self.gpfsel1 + } #[doc = "0x08 - GPIO Function Select 2"] - pub gpfsel2: GPFSEL2, + #[inline(always)] + pub const fn gpfsel2(&self) -> &GPFSEL2 { + &self.gpfsel2 + } #[doc = "0x0c - GPIO Function Select 3"] - pub gpfsel3: GPFSEL3, + #[inline(always)] + pub const fn gpfsel3(&self) -> &GPFSEL3 { + &self.gpfsel3 + } #[doc = "0x10 - GPIO Function Select 4"] - pub gpfsel4: GPFSEL4, + #[inline(always)] + pub const fn gpfsel4(&self) -> &GPFSEL4 { + &self.gpfsel4 + } #[doc = "0x14 - GPIO Function Select 5"] - pub gpfsel5: GPFSEL5, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn gpfsel5(&self) -> &GPFSEL5 { + &self.gpfsel5 + } #[doc = "0x1c - GPIO Pin Output Set 0"] - pub gpset0: GPSET0, + #[inline(always)] + pub const fn gpset0(&self) -> &GPSET0 { + &self.gpset0 + } #[doc = "0x20 - GPIO Pin Output Set 1"] - pub gpset1: GPSET1, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn gpset1(&self) -> &GPSET1 { + &self.gpset1 + } #[doc = "0x28 - GPIO Pin Output Clear 0"] - pub gpclr0: GPCLR0, + #[inline(always)] + pub const fn gpclr0(&self) -> &GPCLR0 { + &self.gpclr0 + } #[doc = "0x2c - GPIO Pin Output Clear 1"] - pub gpclr1: GPCLR1, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn gpclr1(&self) -> &GPCLR1 { + &self.gpclr1 + } #[doc = "0x34 - GPIO Pin Level 0"] - pub gplev0: GPLEV0, + #[inline(always)] + pub const fn gplev0(&self) -> &GPLEV0 { + &self.gplev0 + } #[doc = "0x38 - GPIO Pin Level 1"] - pub gplev1: GPLEV1, - _reserved12: [u8; 0x04], + #[inline(always)] + pub const fn gplev1(&self) -> &GPLEV1 { + &self.gplev1 + } #[doc = "0x40 - GPIO Pin Event Detect Status 0"] - pub gpeds0: GPEDS0, + #[inline(always)] + pub const fn gpeds0(&self) -> &GPEDS0 { + &self.gpeds0 + } #[doc = "0x44 - GPIO Pin Event Detect Status 1"] - pub gpeds1: GPEDS1, - _reserved14: [u8; 0x04], + #[inline(always)] + pub const fn gpeds1(&self) -> &GPEDS1 { + &self.gpeds1 + } #[doc = "0x4c - GPIO Pin Rising Edge Detect Enable 0"] - pub gpren0: GPREN0, + #[inline(always)] + pub const fn gpren0(&self) -> &GPREN0 { + &self.gpren0 + } #[doc = "0x50 - GPIO Pin Rising Edge Detect Enable 1"] - pub gpren1: GPREN1, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn gpren1(&self) -> &GPREN1 { + &self.gpren1 + } #[doc = "0x58 - GPIO Pin Falling Edge Detect Enable 0"] - pub gpfen0: GPFEN0, + #[inline(always)] + pub const fn gpfen0(&self) -> &GPFEN0 { + &self.gpfen0 + } #[doc = "0x5c - GPIO Pin Falling Edge Detect Enable 1"] - pub gpfen1: GPFEN1, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn gpfen1(&self) -> &GPFEN1 { + &self.gpfen1 + } #[doc = "0x64 - GPIO Pin High Detect Enable 0"] - pub gphen0: GPHEN0, + #[inline(always)] + pub const fn gphen0(&self) -> &GPHEN0 { + &self.gphen0 + } #[doc = "0x68 - GPIO Pin High Detect Enable 1"] - pub gphen1: GPHEN1, - _reserved20: [u8; 0x04], + #[inline(always)] + pub const fn gphen1(&self) -> &GPHEN1 { + &self.gphen1 + } #[doc = "0x70 - GPIO Pin Low Detect Enable 0"] - pub gplen0: GPLEN0, + #[inline(always)] + pub const fn gplen0(&self) -> &GPLEN0 { + &self.gplen0 + } #[doc = "0x74 - GPIO Pin Low Detect Enable 1"] - pub gplen1: GPLEN1, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn gplen1(&self) -> &GPLEN1 { + &self.gplen1 + } #[doc = "0x7c - GPIO Pin Async. Rising Edge Detect 0"] - pub gparen0: GPAREN0, + #[inline(always)] + pub const fn gparen0(&self) -> &GPAREN0 { + &self.gparen0 + } #[doc = "0x80 - GPIO Pin Async. Rising Edge Detect 1"] - pub gparen1: GPAREN1, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn gparen1(&self) -> &GPAREN1 { + &self.gparen1 + } #[doc = "0x88 - GPIO Pin Async. Falling Edge Detect 0"] - pub gpafen0: GPAFEN0, + #[inline(always)] + pub const fn gpafen0(&self) -> &GPAFEN0 { + &self.gpafen0 + } #[doc = "0x8c - GPIO Pin Async. Falling Edge Detect 1"] - pub gpafen1: GPAFEN1, - _reserved26: [u8; 0x40], + #[inline(always)] + pub const fn gpafen1(&self) -> &GPAFEN1 { + &self.gpafen1 + } #[doc = "0xd0 - Undocumented multiplexing bits"] - pub extra_mux: EXTRA_MUX, - _reserved27: [u8; 0x10], + #[inline(always)] + pub const fn extra_mux(&self) -> &EXTRA_MUX { + &self.extra_mux + } #[doc = "0xe4 - GPIO Pull-up / Pull-down Register 0"] - pub gpio_pup_pdn_cntrl_reg0: GPIO_PUP_PDN_CNTRL_REG0, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg0(&self) -> &GPIO_PUP_PDN_CNTRL_REG0 { + &self.gpio_pup_pdn_cntrl_reg0 + } #[doc = "0xe8 - GPIO Pull-up / Pull-down Register 1"] - pub gpio_pup_pdn_cntrl_reg1: GPIO_PUP_PDN_CNTRL_REG1, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg1(&self) -> &GPIO_PUP_PDN_CNTRL_REG1 { + &self.gpio_pup_pdn_cntrl_reg1 + } #[doc = "0xec - GPIO Pull-up / Pull-down Register 2"] - pub gpio_pup_pdn_cntrl_reg2: GPIO_PUP_PDN_CNTRL_REG2, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg2(&self) -> &GPIO_PUP_PDN_CNTRL_REG2 { + &self.gpio_pup_pdn_cntrl_reg2 + } #[doc = "0xf0 - GPIO Pull-up / Pull-down Register 3"] - pub gpio_pup_pdn_cntrl_reg3: GPIO_PUP_PDN_CNTRL_REG3, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg3(&self) -> &GPIO_PUP_PDN_CNTRL_REG3 { + &self.gpio_pup_pdn_cntrl_reg3 + } } #[doc = "GPFSEL0 (rw) register accessor: GPIO Function Select 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpfsel0::R`]. You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpfsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpfsel0`] module"] diff --git a/crates/bcm2835-lpa/src/gpio/extra_mux.rs b/crates/bcm2835-lpa/src/gpio/extra_mux.rs index bac06d5..f5c8939 100644 --- a/crates/bcm2835-lpa/src/gpio/extra_mux.rs +++ b/crates/bcm2835-lpa/src/gpio/extra_mux.rs @@ -39,8 +39,8 @@ impl SDIO_R { } } #[doc = "Field `SDIO` writer - Switch peripheral connection to undocumented SDIO pins used on Pi 4"] -pub type SDIO_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SDIO_A>; -impl<'a, REG, const O: u8> SDIO_W<'a, REG, O> +pub type SDIO_W<'a, REG> = crate::BitWriter<'a, REG, SDIO_A>; +impl<'a, REG> SDIO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -71,15 +71,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Switch peripheral connection to undocumented SDIO pins used on Pi 4"] #[inline(always)] #[must_use] - pub fn sdio(&mut self) -> SDIO_W { - SDIO_W::new(self) + pub fn sdio(&mut self) -> SDIO_W { + SDIO_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpafen0.rs b/crates/bcm2835-lpa/src/gpio/gpafen0.rs index 44bf785..539e1b8 100644 --- a/crates/bcm2835-lpa/src/gpio/gpafen0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpafen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `AFEN0` reader - Async falling enabled 0"] pub type AFEN0_R = crate::BitReader; #[doc = "Field `AFEN0` writer - Async falling enabled 0"] -pub type AFEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN1` reader - Async falling enabled 1"] pub type AFEN1_R = crate::BitReader; #[doc = "Field `AFEN1` writer - Async falling enabled 1"] -pub type AFEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN2` reader - Async falling enabled 2"] pub type AFEN2_R = crate::BitReader; #[doc = "Field `AFEN2` writer - Async falling enabled 2"] -pub type AFEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN3` reader - Async falling enabled 3"] pub type AFEN3_R = crate::BitReader; #[doc = "Field `AFEN3` writer - Async falling enabled 3"] -pub type AFEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN4` reader - Async falling enabled 4"] pub type AFEN4_R = crate::BitReader; #[doc = "Field `AFEN4` writer - Async falling enabled 4"] -pub type AFEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN5` reader - Async falling enabled 5"] pub type AFEN5_R = crate::BitReader; #[doc = "Field `AFEN5` writer - Async falling enabled 5"] -pub type AFEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN6` reader - Async falling enabled 6"] pub type AFEN6_R = crate::BitReader; #[doc = "Field `AFEN6` writer - Async falling enabled 6"] -pub type AFEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN7` reader - Async falling enabled 7"] pub type AFEN7_R = crate::BitReader; #[doc = "Field `AFEN7` writer - Async falling enabled 7"] -pub type AFEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN8` reader - Async falling enabled 8"] pub type AFEN8_R = crate::BitReader; #[doc = "Field `AFEN8` writer - Async falling enabled 8"] -pub type AFEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN9` reader - Async falling enabled 9"] pub type AFEN9_R = crate::BitReader; #[doc = "Field `AFEN9` writer - Async falling enabled 9"] -pub type AFEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN10` reader - Async falling enabled 10"] pub type AFEN10_R = crate::BitReader; #[doc = "Field `AFEN10` writer - Async falling enabled 10"] -pub type AFEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN11` reader - Async falling enabled 11"] pub type AFEN11_R = crate::BitReader; #[doc = "Field `AFEN11` writer - Async falling enabled 11"] -pub type AFEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN12` reader - Async falling enabled 12"] pub type AFEN12_R = crate::BitReader; #[doc = "Field `AFEN12` writer - Async falling enabled 12"] -pub type AFEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN13` reader - Async falling enabled 13"] pub type AFEN13_R = crate::BitReader; #[doc = "Field `AFEN13` writer - Async falling enabled 13"] -pub type AFEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN14` reader - Async falling enabled 14"] pub type AFEN14_R = crate::BitReader; #[doc = "Field `AFEN14` writer - Async falling enabled 14"] -pub type AFEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN15` reader - Async falling enabled 15"] pub type AFEN15_R = crate::BitReader; #[doc = "Field `AFEN15` writer - Async falling enabled 15"] -pub type AFEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN16` reader - Async falling enabled 16"] pub type AFEN16_R = crate::BitReader; #[doc = "Field `AFEN16` writer - Async falling enabled 16"] -pub type AFEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN17` reader - Async falling enabled 17"] pub type AFEN17_R = crate::BitReader; #[doc = "Field `AFEN17` writer - Async falling enabled 17"] -pub type AFEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN18` reader - Async falling enabled 18"] pub type AFEN18_R = crate::BitReader; #[doc = "Field `AFEN18` writer - Async falling enabled 18"] -pub type AFEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN19` reader - Async falling enabled 19"] pub type AFEN19_R = crate::BitReader; #[doc = "Field `AFEN19` writer - Async falling enabled 19"] -pub type AFEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN20` reader - Async falling enabled 20"] pub type AFEN20_R = crate::BitReader; #[doc = "Field `AFEN20` writer - Async falling enabled 20"] -pub type AFEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN21` reader - Async falling enabled 21"] pub type AFEN21_R = crate::BitReader; #[doc = "Field `AFEN21` writer - Async falling enabled 21"] -pub type AFEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN22` reader - Async falling enabled 22"] pub type AFEN22_R = crate::BitReader; #[doc = "Field `AFEN22` writer - Async falling enabled 22"] -pub type AFEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN23` reader - Async falling enabled 23"] pub type AFEN23_R = crate::BitReader; #[doc = "Field `AFEN23` writer - Async falling enabled 23"] -pub type AFEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN24` reader - Async falling enabled 24"] pub type AFEN24_R = crate::BitReader; #[doc = "Field `AFEN24` writer - Async falling enabled 24"] -pub type AFEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN25` reader - Async falling enabled 25"] pub type AFEN25_R = crate::BitReader; #[doc = "Field `AFEN25` writer - Async falling enabled 25"] -pub type AFEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN26` reader - Async falling enabled 26"] pub type AFEN26_R = crate::BitReader; #[doc = "Field `AFEN26` writer - Async falling enabled 26"] -pub type AFEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN27` reader - Async falling enabled 27"] pub type AFEN27_R = crate::BitReader; #[doc = "Field `AFEN27` writer - Async falling enabled 27"] -pub type AFEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN28` reader - Async falling enabled 28"] pub type AFEN28_R = crate::BitReader; #[doc = "Field `AFEN28` writer - Async falling enabled 28"] -pub type AFEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN29` reader - Async falling enabled 29"] pub type AFEN29_R = crate::BitReader; #[doc = "Field `AFEN29` writer - Async falling enabled 29"] -pub type AFEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN30` reader - Async falling enabled 30"] pub type AFEN30_R = crate::BitReader; #[doc = "Field `AFEN30` writer - Async falling enabled 30"] -pub type AFEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN31` reader - Async falling enabled 31"] pub type AFEN31_R = crate::BitReader; #[doc = "Field `AFEN31` writer - Async falling enabled 31"] -pub type AFEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async falling enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async falling enabled 0"] #[inline(always)] #[must_use] - pub fn afen0(&mut self) -> AFEN0_W { - AFEN0_W::new(self) + pub fn afen0(&mut self) -> AFEN0_W { + AFEN0_W::new(self, 0) } #[doc = "Bit 1 - Async falling enabled 1"] #[inline(always)] #[must_use] - pub fn afen1(&mut self) -> AFEN1_W { - AFEN1_W::new(self) + pub fn afen1(&mut self) -> AFEN1_W { + AFEN1_W::new(self, 1) } #[doc = "Bit 2 - Async falling enabled 2"] #[inline(always)] #[must_use] - pub fn afen2(&mut self) -> AFEN2_W { - AFEN2_W::new(self) + pub fn afen2(&mut self) -> AFEN2_W { + AFEN2_W::new(self, 2) } #[doc = "Bit 3 - Async falling enabled 3"] #[inline(always)] #[must_use] - pub fn afen3(&mut self) -> AFEN3_W { - AFEN3_W::new(self) + pub fn afen3(&mut self) -> AFEN3_W { + AFEN3_W::new(self, 3) } #[doc = "Bit 4 - Async falling enabled 4"] #[inline(always)] #[must_use] - pub fn afen4(&mut self) -> AFEN4_W { - AFEN4_W::new(self) + pub fn afen4(&mut self) -> AFEN4_W { + AFEN4_W::new(self, 4) } #[doc = "Bit 5 - Async falling enabled 5"] #[inline(always)] #[must_use] - pub fn afen5(&mut self) -> AFEN5_W { - AFEN5_W::new(self) + pub fn afen5(&mut self) -> AFEN5_W { + AFEN5_W::new(self, 5) } #[doc = "Bit 6 - Async falling enabled 6"] #[inline(always)] #[must_use] - pub fn afen6(&mut self) -> AFEN6_W { - AFEN6_W::new(self) + pub fn afen6(&mut self) -> AFEN6_W { + AFEN6_W::new(self, 6) } #[doc = "Bit 7 - Async falling enabled 7"] #[inline(always)] #[must_use] - pub fn afen7(&mut self) -> AFEN7_W { - AFEN7_W::new(self) + pub fn afen7(&mut self) -> AFEN7_W { + AFEN7_W::new(self, 7) } #[doc = "Bit 8 - Async falling enabled 8"] #[inline(always)] #[must_use] - pub fn afen8(&mut self) -> AFEN8_W { - AFEN8_W::new(self) + pub fn afen8(&mut self) -> AFEN8_W { + AFEN8_W::new(self, 8) } #[doc = "Bit 9 - Async falling enabled 9"] #[inline(always)] #[must_use] - pub fn afen9(&mut self) -> AFEN9_W { - AFEN9_W::new(self) + pub fn afen9(&mut self) -> AFEN9_W { + AFEN9_W::new(self, 9) } #[doc = "Bit 10 - Async falling enabled 10"] #[inline(always)] #[must_use] - pub fn afen10(&mut self) -> AFEN10_W { - AFEN10_W::new(self) + pub fn afen10(&mut self) -> AFEN10_W { + AFEN10_W::new(self, 10) } #[doc = "Bit 11 - Async falling enabled 11"] #[inline(always)] #[must_use] - pub fn afen11(&mut self) -> AFEN11_W { - AFEN11_W::new(self) + pub fn afen11(&mut self) -> AFEN11_W { + AFEN11_W::new(self, 11) } #[doc = "Bit 12 - Async falling enabled 12"] #[inline(always)] #[must_use] - pub fn afen12(&mut self) -> AFEN12_W { - AFEN12_W::new(self) + pub fn afen12(&mut self) -> AFEN12_W { + AFEN12_W::new(self, 12) } #[doc = "Bit 13 - Async falling enabled 13"] #[inline(always)] #[must_use] - pub fn afen13(&mut self) -> AFEN13_W { - AFEN13_W::new(self) + pub fn afen13(&mut self) -> AFEN13_W { + AFEN13_W::new(self, 13) } #[doc = "Bit 14 - Async falling enabled 14"] #[inline(always)] #[must_use] - pub fn afen14(&mut self) -> AFEN14_W { - AFEN14_W::new(self) + pub fn afen14(&mut self) -> AFEN14_W { + AFEN14_W::new(self, 14) } #[doc = "Bit 15 - Async falling enabled 15"] #[inline(always)] #[must_use] - pub fn afen15(&mut self) -> AFEN15_W { - AFEN15_W::new(self) + pub fn afen15(&mut self) -> AFEN15_W { + AFEN15_W::new(self, 15) } #[doc = "Bit 16 - Async falling enabled 16"] #[inline(always)] #[must_use] - pub fn afen16(&mut self) -> AFEN16_W { - AFEN16_W::new(self) + pub fn afen16(&mut self) -> AFEN16_W { + AFEN16_W::new(self, 16) } #[doc = "Bit 17 - Async falling enabled 17"] #[inline(always)] #[must_use] - pub fn afen17(&mut self) -> AFEN17_W { - AFEN17_W::new(self) + pub fn afen17(&mut self) -> AFEN17_W { + AFEN17_W::new(self, 17) } #[doc = "Bit 18 - Async falling enabled 18"] #[inline(always)] #[must_use] - pub fn afen18(&mut self) -> AFEN18_W { - AFEN18_W::new(self) + pub fn afen18(&mut self) -> AFEN18_W { + AFEN18_W::new(self, 18) } #[doc = "Bit 19 - Async falling enabled 19"] #[inline(always)] #[must_use] - pub fn afen19(&mut self) -> AFEN19_W { - AFEN19_W::new(self) + pub fn afen19(&mut self) -> AFEN19_W { + AFEN19_W::new(self, 19) } #[doc = "Bit 20 - Async falling enabled 20"] #[inline(always)] #[must_use] - pub fn afen20(&mut self) -> AFEN20_W { - AFEN20_W::new(self) + pub fn afen20(&mut self) -> AFEN20_W { + AFEN20_W::new(self, 20) } #[doc = "Bit 21 - Async falling enabled 21"] #[inline(always)] #[must_use] - pub fn afen21(&mut self) -> AFEN21_W { - AFEN21_W::new(self) + pub fn afen21(&mut self) -> AFEN21_W { + AFEN21_W::new(self, 21) } #[doc = "Bit 22 - Async falling enabled 22"] #[inline(always)] #[must_use] - pub fn afen22(&mut self) -> AFEN22_W { - AFEN22_W::new(self) + pub fn afen22(&mut self) -> AFEN22_W { + AFEN22_W::new(self, 22) } #[doc = "Bit 23 - Async falling enabled 23"] #[inline(always)] #[must_use] - pub fn afen23(&mut self) -> AFEN23_W { - AFEN23_W::new(self) + pub fn afen23(&mut self) -> AFEN23_W { + AFEN23_W::new(self, 23) } #[doc = "Bit 24 - Async falling enabled 24"] #[inline(always)] #[must_use] - pub fn afen24(&mut self) -> AFEN24_W { - AFEN24_W::new(self) + pub fn afen24(&mut self) -> AFEN24_W { + AFEN24_W::new(self, 24) } #[doc = "Bit 25 - Async falling enabled 25"] #[inline(always)] #[must_use] - pub fn afen25(&mut self) -> AFEN25_W { - AFEN25_W::new(self) + pub fn afen25(&mut self) -> AFEN25_W { + AFEN25_W::new(self, 25) } #[doc = "Bit 26 - Async falling enabled 26"] #[inline(always)] #[must_use] - pub fn afen26(&mut self) -> AFEN26_W { - AFEN26_W::new(self) + pub fn afen26(&mut self) -> AFEN26_W { + AFEN26_W::new(self, 26) } #[doc = "Bit 27 - Async falling enabled 27"] #[inline(always)] #[must_use] - pub fn afen27(&mut self) -> AFEN27_W { - AFEN27_W::new(self) + pub fn afen27(&mut self) -> AFEN27_W { + AFEN27_W::new(self, 27) } #[doc = "Bit 28 - Async falling enabled 28"] #[inline(always)] #[must_use] - pub fn afen28(&mut self) -> AFEN28_W { - AFEN28_W::new(self) + pub fn afen28(&mut self) -> AFEN28_W { + AFEN28_W::new(self, 28) } #[doc = "Bit 29 - Async falling enabled 29"] #[inline(always)] #[must_use] - pub fn afen29(&mut self) -> AFEN29_W { - AFEN29_W::new(self) + pub fn afen29(&mut self) -> AFEN29_W { + AFEN29_W::new(self, 29) } #[doc = "Bit 30 - Async falling enabled 30"] #[inline(always)] #[must_use] - pub fn afen30(&mut self) -> AFEN30_W { - AFEN30_W::new(self) + pub fn afen30(&mut self) -> AFEN30_W { + AFEN30_W::new(self, 30) } #[doc = "Bit 31 - Async falling enabled 31"] #[inline(always)] #[must_use] - pub fn afen31(&mut self) -> AFEN31_W { - AFEN31_W::new(self) + pub fn afen31(&mut self) -> AFEN31_W { + AFEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpafen1.rs b/crates/bcm2835-lpa/src/gpio/gpafen1.rs index 83ed52d..a8c6a36 100644 --- a/crates/bcm2835-lpa/src/gpio/gpafen1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpafen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `AFEN32` reader - Async falling enabled 32"] pub type AFEN32_R = crate::BitReader; #[doc = "Field `AFEN32` writer - Async falling enabled 32"] -pub type AFEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN33` reader - Async falling enabled 33"] pub type AFEN33_R = crate::BitReader; #[doc = "Field `AFEN33` writer - Async falling enabled 33"] -pub type AFEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN34` reader - Async falling enabled 34"] pub type AFEN34_R = crate::BitReader; #[doc = "Field `AFEN34` writer - Async falling enabled 34"] -pub type AFEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN35` reader - Async falling enabled 35"] pub type AFEN35_R = crate::BitReader; #[doc = "Field `AFEN35` writer - Async falling enabled 35"] -pub type AFEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN36` reader - Async falling enabled 36"] pub type AFEN36_R = crate::BitReader; #[doc = "Field `AFEN36` writer - Async falling enabled 36"] -pub type AFEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN37` reader - Async falling enabled 37"] pub type AFEN37_R = crate::BitReader; #[doc = "Field `AFEN37` writer - Async falling enabled 37"] -pub type AFEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN38` reader - Async falling enabled 38"] pub type AFEN38_R = crate::BitReader; #[doc = "Field `AFEN38` writer - Async falling enabled 38"] -pub type AFEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN39` reader - Async falling enabled 39"] pub type AFEN39_R = crate::BitReader; #[doc = "Field `AFEN39` writer - Async falling enabled 39"] -pub type AFEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN40` reader - Async falling enabled 40"] pub type AFEN40_R = crate::BitReader; #[doc = "Field `AFEN40` writer - Async falling enabled 40"] -pub type AFEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN41` reader - Async falling enabled 41"] pub type AFEN41_R = crate::BitReader; #[doc = "Field `AFEN41` writer - Async falling enabled 41"] -pub type AFEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN42` reader - Async falling enabled 42"] pub type AFEN42_R = crate::BitReader; #[doc = "Field `AFEN42` writer - Async falling enabled 42"] -pub type AFEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN43` reader - Async falling enabled 43"] pub type AFEN43_R = crate::BitReader; #[doc = "Field `AFEN43` writer - Async falling enabled 43"] -pub type AFEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN44` reader - Async falling enabled 44"] pub type AFEN44_R = crate::BitReader; #[doc = "Field `AFEN44` writer - Async falling enabled 44"] -pub type AFEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN45` reader - Async falling enabled 45"] pub type AFEN45_R = crate::BitReader; #[doc = "Field `AFEN45` writer - Async falling enabled 45"] -pub type AFEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN46` reader - Async falling enabled 46"] pub type AFEN46_R = crate::BitReader; #[doc = "Field `AFEN46` writer - Async falling enabled 46"] -pub type AFEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN47` reader - Async falling enabled 47"] pub type AFEN47_R = crate::BitReader; #[doc = "Field `AFEN47` writer - Async falling enabled 47"] -pub type AFEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN48` reader - Async falling enabled 48"] pub type AFEN48_R = crate::BitReader; #[doc = "Field `AFEN48` writer - Async falling enabled 48"] -pub type AFEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN49` reader - Async falling enabled 49"] pub type AFEN49_R = crate::BitReader; #[doc = "Field `AFEN49` writer - Async falling enabled 49"] -pub type AFEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN50` reader - Async falling enabled 50"] pub type AFEN50_R = crate::BitReader; #[doc = "Field `AFEN50` writer - Async falling enabled 50"] -pub type AFEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN51` reader - Async falling enabled 51"] pub type AFEN51_R = crate::BitReader; #[doc = "Field `AFEN51` writer - Async falling enabled 51"] -pub type AFEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN52` reader - Async falling enabled 52"] pub type AFEN52_R = crate::BitReader; #[doc = "Field `AFEN52` writer - Async falling enabled 52"] -pub type AFEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN53` reader - Async falling enabled 53"] pub type AFEN53_R = crate::BitReader; #[doc = "Field `AFEN53` writer - Async falling enabled 53"] -pub type AFEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async falling enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async falling enabled 32"] #[inline(always)] #[must_use] - pub fn afen32(&mut self) -> AFEN32_W { - AFEN32_W::new(self) + pub fn afen32(&mut self) -> AFEN32_W { + AFEN32_W::new(self, 0) } #[doc = "Bit 1 - Async falling enabled 33"] #[inline(always)] #[must_use] - pub fn afen33(&mut self) -> AFEN33_W { - AFEN33_W::new(self) + pub fn afen33(&mut self) -> AFEN33_W { + AFEN33_W::new(self, 1) } #[doc = "Bit 2 - Async falling enabled 34"] #[inline(always)] #[must_use] - pub fn afen34(&mut self) -> AFEN34_W { - AFEN34_W::new(self) + pub fn afen34(&mut self) -> AFEN34_W { + AFEN34_W::new(self, 2) } #[doc = "Bit 3 - Async falling enabled 35"] #[inline(always)] #[must_use] - pub fn afen35(&mut self) -> AFEN35_W { - AFEN35_W::new(self) + pub fn afen35(&mut self) -> AFEN35_W { + AFEN35_W::new(self, 3) } #[doc = "Bit 4 - Async falling enabled 36"] #[inline(always)] #[must_use] - pub fn afen36(&mut self) -> AFEN36_W { - AFEN36_W::new(self) + pub fn afen36(&mut self) -> AFEN36_W { + AFEN36_W::new(self, 4) } #[doc = "Bit 5 - Async falling enabled 37"] #[inline(always)] #[must_use] - pub fn afen37(&mut self) -> AFEN37_W { - AFEN37_W::new(self) + pub fn afen37(&mut self) -> AFEN37_W { + AFEN37_W::new(self, 5) } #[doc = "Bit 6 - Async falling enabled 38"] #[inline(always)] #[must_use] - pub fn afen38(&mut self) -> AFEN38_W { - AFEN38_W::new(self) + pub fn afen38(&mut self) -> AFEN38_W { + AFEN38_W::new(self, 6) } #[doc = "Bit 7 - Async falling enabled 39"] #[inline(always)] #[must_use] - pub fn afen39(&mut self) -> AFEN39_W { - AFEN39_W::new(self) + pub fn afen39(&mut self) -> AFEN39_W { + AFEN39_W::new(self, 7) } #[doc = "Bit 8 - Async falling enabled 40"] #[inline(always)] #[must_use] - pub fn afen40(&mut self) -> AFEN40_W { - AFEN40_W::new(self) + pub fn afen40(&mut self) -> AFEN40_W { + AFEN40_W::new(self, 8) } #[doc = "Bit 9 - Async falling enabled 41"] #[inline(always)] #[must_use] - pub fn afen41(&mut self) -> AFEN41_W { - AFEN41_W::new(self) + pub fn afen41(&mut self) -> AFEN41_W { + AFEN41_W::new(self, 9) } #[doc = "Bit 10 - Async falling enabled 42"] #[inline(always)] #[must_use] - pub fn afen42(&mut self) -> AFEN42_W { - AFEN42_W::new(self) + pub fn afen42(&mut self) -> AFEN42_W { + AFEN42_W::new(self, 10) } #[doc = "Bit 11 - Async falling enabled 43"] #[inline(always)] #[must_use] - pub fn afen43(&mut self) -> AFEN43_W { - AFEN43_W::new(self) + pub fn afen43(&mut self) -> AFEN43_W { + AFEN43_W::new(self, 11) } #[doc = "Bit 12 - Async falling enabled 44"] #[inline(always)] #[must_use] - pub fn afen44(&mut self) -> AFEN44_W { - AFEN44_W::new(self) + pub fn afen44(&mut self) -> AFEN44_W { + AFEN44_W::new(self, 12) } #[doc = "Bit 13 - Async falling enabled 45"] #[inline(always)] #[must_use] - pub fn afen45(&mut self) -> AFEN45_W { - AFEN45_W::new(self) + pub fn afen45(&mut self) -> AFEN45_W { + AFEN45_W::new(self, 13) } #[doc = "Bit 14 - Async falling enabled 46"] #[inline(always)] #[must_use] - pub fn afen46(&mut self) -> AFEN46_W { - AFEN46_W::new(self) + pub fn afen46(&mut self) -> AFEN46_W { + AFEN46_W::new(self, 14) } #[doc = "Bit 15 - Async falling enabled 47"] #[inline(always)] #[must_use] - pub fn afen47(&mut self) -> AFEN47_W { - AFEN47_W::new(self) + pub fn afen47(&mut self) -> AFEN47_W { + AFEN47_W::new(self, 15) } #[doc = "Bit 16 - Async falling enabled 48"] #[inline(always)] #[must_use] - pub fn afen48(&mut self) -> AFEN48_W { - AFEN48_W::new(self) + pub fn afen48(&mut self) -> AFEN48_W { + AFEN48_W::new(self, 16) } #[doc = "Bit 17 - Async falling enabled 49"] #[inline(always)] #[must_use] - pub fn afen49(&mut self) -> AFEN49_W { - AFEN49_W::new(self) + pub fn afen49(&mut self) -> AFEN49_W { + AFEN49_W::new(self, 17) } #[doc = "Bit 18 - Async falling enabled 50"] #[inline(always)] #[must_use] - pub fn afen50(&mut self) -> AFEN50_W { - AFEN50_W::new(self) + pub fn afen50(&mut self) -> AFEN50_W { + AFEN50_W::new(self, 18) } #[doc = "Bit 19 - Async falling enabled 51"] #[inline(always)] #[must_use] - pub fn afen51(&mut self) -> AFEN51_W { - AFEN51_W::new(self) + pub fn afen51(&mut self) -> AFEN51_W { + AFEN51_W::new(self, 19) } #[doc = "Bit 20 - Async falling enabled 52"] #[inline(always)] #[must_use] - pub fn afen52(&mut self) -> AFEN52_W { - AFEN52_W::new(self) + pub fn afen52(&mut self) -> AFEN52_W { + AFEN52_W::new(self, 20) } #[doc = "Bit 21 - Async falling enabled 53"] #[inline(always)] #[must_use] - pub fn afen53(&mut self) -> AFEN53_W { - AFEN53_W::new(self) + pub fn afen53(&mut self) -> AFEN53_W { + AFEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gparen0.rs b/crates/bcm2835-lpa/src/gpio/gparen0.rs index ac719d0..38a09c9 100644 --- a/crates/bcm2835-lpa/src/gpio/gparen0.rs +++ b/crates/bcm2835-lpa/src/gpio/gparen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `AREN0` reader - Async rising enabled 0"] pub type AREN0_R = crate::BitReader; #[doc = "Field `AREN0` writer - Async rising enabled 0"] -pub type AREN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN1` reader - Async rising enabled 1"] pub type AREN1_R = crate::BitReader; #[doc = "Field `AREN1` writer - Async rising enabled 1"] -pub type AREN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN2` reader - Async rising enabled 2"] pub type AREN2_R = crate::BitReader; #[doc = "Field `AREN2` writer - Async rising enabled 2"] -pub type AREN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN3` reader - Async rising enabled 3"] pub type AREN3_R = crate::BitReader; #[doc = "Field `AREN3` writer - Async rising enabled 3"] -pub type AREN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN4` reader - Async rising enabled 4"] pub type AREN4_R = crate::BitReader; #[doc = "Field `AREN4` writer - Async rising enabled 4"] -pub type AREN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN5` reader - Async rising enabled 5"] pub type AREN5_R = crate::BitReader; #[doc = "Field `AREN5` writer - Async rising enabled 5"] -pub type AREN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN6` reader - Async rising enabled 6"] pub type AREN6_R = crate::BitReader; #[doc = "Field `AREN6` writer - Async rising enabled 6"] -pub type AREN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN7` reader - Async rising enabled 7"] pub type AREN7_R = crate::BitReader; #[doc = "Field `AREN7` writer - Async rising enabled 7"] -pub type AREN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN8` reader - Async rising enabled 8"] pub type AREN8_R = crate::BitReader; #[doc = "Field `AREN8` writer - Async rising enabled 8"] -pub type AREN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN9` reader - Async rising enabled 9"] pub type AREN9_R = crate::BitReader; #[doc = "Field `AREN9` writer - Async rising enabled 9"] -pub type AREN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN10` reader - Async rising enabled 10"] pub type AREN10_R = crate::BitReader; #[doc = "Field `AREN10` writer - Async rising enabled 10"] -pub type AREN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN11` reader - Async rising enabled 11"] pub type AREN11_R = crate::BitReader; #[doc = "Field `AREN11` writer - Async rising enabled 11"] -pub type AREN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN12` reader - Async rising enabled 12"] pub type AREN12_R = crate::BitReader; #[doc = "Field `AREN12` writer - Async rising enabled 12"] -pub type AREN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN13` reader - Async rising enabled 13"] pub type AREN13_R = crate::BitReader; #[doc = "Field `AREN13` writer - Async rising enabled 13"] -pub type AREN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN14` reader - Async rising enabled 14"] pub type AREN14_R = crate::BitReader; #[doc = "Field `AREN14` writer - Async rising enabled 14"] -pub type AREN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN15` reader - Async rising enabled 15"] pub type AREN15_R = crate::BitReader; #[doc = "Field `AREN15` writer - Async rising enabled 15"] -pub type AREN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN16` reader - Async rising enabled 16"] pub type AREN16_R = crate::BitReader; #[doc = "Field `AREN16` writer - Async rising enabled 16"] -pub type AREN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN17` reader - Async rising enabled 17"] pub type AREN17_R = crate::BitReader; #[doc = "Field `AREN17` writer - Async rising enabled 17"] -pub type AREN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN18` reader - Async rising enabled 18"] pub type AREN18_R = crate::BitReader; #[doc = "Field `AREN18` writer - Async rising enabled 18"] -pub type AREN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN19` reader - Async rising enabled 19"] pub type AREN19_R = crate::BitReader; #[doc = "Field `AREN19` writer - Async rising enabled 19"] -pub type AREN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN20` reader - Async rising enabled 20"] pub type AREN20_R = crate::BitReader; #[doc = "Field `AREN20` writer - Async rising enabled 20"] -pub type AREN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN21` reader - Async rising enabled 21"] pub type AREN21_R = crate::BitReader; #[doc = "Field `AREN21` writer - Async rising enabled 21"] -pub type AREN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN22` reader - Async rising enabled 22"] pub type AREN22_R = crate::BitReader; #[doc = "Field `AREN22` writer - Async rising enabled 22"] -pub type AREN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN23` reader - Async rising enabled 23"] pub type AREN23_R = crate::BitReader; #[doc = "Field `AREN23` writer - Async rising enabled 23"] -pub type AREN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN24` reader - Async rising enabled 24"] pub type AREN24_R = crate::BitReader; #[doc = "Field `AREN24` writer - Async rising enabled 24"] -pub type AREN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN25` reader - Async rising enabled 25"] pub type AREN25_R = crate::BitReader; #[doc = "Field `AREN25` writer - Async rising enabled 25"] -pub type AREN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN26` reader - Async rising enabled 26"] pub type AREN26_R = crate::BitReader; #[doc = "Field `AREN26` writer - Async rising enabled 26"] -pub type AREN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN27` reader - Async rising enabled 27"] pub type AREN27_R = crate::BitReader; #[doc = "Field `AREN27` writer - Async rising enabled 27"] -pub type AREN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN28` reader - Async rising enabled 28"] pub type AREN28_R = crate::BitReader; #[doc = "Field `AREN28` writer - Async rising enabled 28"] -pub type AREN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN29` reader - Async rising enabled 29"] pub type AREN29_R = crate::BitReader; #[doc = "Field `AREN29` writer - Async rising enabled 29"] -pub type AREN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN30` reader - Async rising enabled 30"] pub type AREN30_R = crate::BitReader; #[doc = "Field `AREN30` writer - Async rising enabled 30"] -pub type AREN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN31` reader - Async rising enabled 31"] pub type AREN31_R = crate::BitReader; #[doc = "Field `AREN31` writer - Async rising enabled 31"] -pub type AREN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async rising enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async rising enabled 0"] #[inline(always)] #[must_use] - pub fn aren0(&mut self) -> AREN0_W { - AREN0_W::new(self) + pub fn aren0(&mut self) -> AREN0_W { + AREN0_W::new(self, 0) } #[doc = "Bit 1 - Async rising enabled 1"] #[inline(always)] #[must_use] - pub fn aren1(&mut self) -> AREN1_W { - AREN1_W::new(self) + pub fn aren1(&mut self) -> AREN1_W { + AREN1_W::new(self, 1) } #[doc = "Bit 2 - Async rising enabled 2"] #[inline(always)] #[must_use] - pub fn aren2(&mut self) -> AREN2_W { - AREN2_W::new(self) + pub fn aren2(&mut self) -> AREN2_W { + AREN2_W::new(self, 2) } #[doc = "Bit 3 - Async rising enabled 3"] #[inline(always)] #[must_use] - pub fn aren3(&mut self) -> AREN3_W { - AREN3_W::new(self) + pub fn aren3(&mut self) -> AREN3_W { + AREN3_W::new(self, 3) } #[doc = "Bit 4 - Async rising enabled 4"] #[inline(always)] #[must_use] - pub fn aren4(&mut self) -> AREN4_W { - AREN4_W::new(self) + pub fn aren4(&mut self) -> AREN4_W { + AREN4_W::new(self, 4) } #[doc = "Bit 5 - Async rising enabled 5"] #[inline(always)] #[must_use] - pub fn aren5(&mut self) -> AREN5_W { - AREN5_W::new(self) + pub fn aren5(&mut self) -> AREN5_W { + AREN5_W::new(self, 5) } #[doc = "Bit 6 - Async rising enabled 6"] #[inline(always)] #[must_use] - pub fn aren6(&mut self) -> AREN6_W { - AREN6_W::new(self) + pub fn aren6(&mut self) -> AREN6_W { + AREN6_W::new(self, 6) } #[doc = "Bit 7 - Async rising enabled 7"] #[inline(always)] #[must_use] - pub fn aren7(&mut self) -> AREN7_W { - AREN7_W::new(self) + pub fn aren7(&mut self) -> AREN7_W { + AREN7_W::new(self, 7) } #[doc = "Bit 8 - Async rising enabled 8"] #[inline(always)] #[must_use] - pub fn aren8(&mut self) -> AREN8_W { - AREN8_W::new(self) + pub fn aren8(&mut self) -> AREN8_W { + AREN8_W::new(self, 8) } #[doc = "Bit 9 - Async rising enabled 9"] #[inline(always)] #[must_use] - pub fn aren9(&mut self) -> AREN9_W { - AREN9_W::new(self) + pub fn aren9(&mut self) -> AREN9_W { + AREN9_W::new(self, 9) } #[doc = "Bit 10 - Async rising enabled 10"] #[inline(always)] #[must_use] - pub fn aren10(&mut self) -> AREN10_W { - AREN10_W::new(self) + pub fn aren10(&mut self) -> AREN10_W { + AREN10_W::new(self, 10) } #[doc = "Bit 11 - Async rising enabled 11"] #[inline(always)] #[must_use] - pub fn aren11(&mut self) -> AREN11_W { - AREN11_W::new(self) + pub fn aren11(&mut self) -> AREN11_W { + AREN11_W::new(self, 11) } #[doc = "Bit 12 - Async rising enabled 12"] #[inline(always)] #[must_use] - pub fn aren12(&mut self) -> AREN12_W { - AREN12_W::new(self) + pub fn aren12(&mut self) -> AREN12_W { + AREN12_W::new(self, 12) } #[doc = "Bit 13 - Async rising enabled 13"] #[inline(always)] #[must_use] - pub fn aren13(&mut self) -> AREN13_W { - AREN13_W::new(self) + pub fn aren13(&mut self) -> AREN13_W { + AREN13_W::new(self, 13) } #[doc = "Bit 14 - Async rising enabled 14"] #[inline(always)] #[must_use] - pub fn aren14(&mut self) -> AREN14_W { - AREN14_W::new(self) + pub fn aren14(&mut self) -> AREN14_W { + AREN14_W::new(self, 14) } #[doc = "Bit 15 - Async rising enabled 15"] #[inline(always)] #[must_use] - pub fn aren15(&mut self) -> AREN15_W { - AREN15_W::new(self) + pub fn aren15(&mut self) -> AREN15_W { + AREN15_W::new(self, 15) } #[doc = "Bit 16 - Async rising enabled 16"] #[inline(always)] #[must_use] - pub fn aren16(&mut self) -> AREN16_W { - AREN16_W::new(self) + pub fn aren16(&mut self) -> AREN16_W { + AREN16_W::new(self, 16) } #[doc = "Bit 17 - Async rising enabled 17"] #[inline(always)] #[must_use] - pub fn aren17(&mut self) -> AREN17_W { - AREN17_W::new(self) + pub fn aren17(&mut self) -> AREN17_W { + AREN17_W::new(self, 17) } #[doc = "Bit 18 - Async rising enabled 18"] #[inline(always)] #[must_use] - pub fn aren18(&mut self) -> AREN18_W { - AREN18_W::new(self) + pub fn aren18(&mut self) -> AREN18_W { + AREN18_W::new(self, 18) } #[doc = "Bit 19 - Async rising enabled 19"] #[inline(always)] #[must_use] - pub fn aren19(&mut self) -> AREN19_W { - AREN19_W::new(self) + pub fn aren19(&mut self) -> AREN19_W { + AREN19_W::new(self, 19) } #[doc = "Bit 20 - Async rising enabled 20"] #[inline(always)] #[must_use] - pub fn aren20(&mut self) -> AREN20_W { - AREN20_W::new(self) + pub fn aren20(&mut self) -> AREN20_W { + AREN20_W::new(self, 20) } #[doc = "Bit 21 - Async rising enabled 21"] #[inline(always)] #[must_use] - pub fn aren21(&mut self) -> AREN21_W { - AREN21_W::new(self) + pub fn aren21(&mut self) -> AREN21_W { + AREN21_W::new(self, 21) } #[doc = "Bit 22 - Async rising enabled 22"] #[inline(always)] #[must_use] - pub fn aren22(&mut self) -> AREN22_W { - AREN22_W::new(self) + pub fn aren22(&mut self) -> AREN22_W { + AREN22_W::new(self, 22) } #[doc = "Bit 23 - Async rising enabled 23"] #[inline(always)] #[must_use] - pub fn aren23(&mut self) -> AREN23_W { - AREN23_W::new(self) + pub fn aren23(&mut self) -> AREN23_W { + AREN23_W::new(self, 23) } #[doc = "Bit 24 - Async rising enabled 24"] #[inline(always)] #[must_use] - pub fn aren24(&mut self) -> AREN24_W { - AREN24_W::new(self) + pub fn aren24(&mut self) -> AREN24_W { + AREN24_W::new(self, 24) } #[doc = "Bit 25 - Async rising enabled 25"] #[inline(always)] #[must_use] - pub fn aren25(&mut self) -> AREN25_W { - AREN25_W::new(self) + pub fn aren25(&mut self) -> AREN25_W { + AREN25_W::new(self, 25) } #[doc = "Bit 26 - Async rising enabled 26"] #[inline(always)] #[must_use] - pub fn aren26(&mut self) -> AREN26_W { - AREN26_W::new(self) + pub fn aren26(&mut self) -> AREN26_W { + AREN26_W::new(self, 26) } #[doc = "Bit 27 - Async rising enabled 27"] #[inline(always)] #[must_use] - pub fn aren27(&mut self) -> AREN27_W { - AREN27_W::new(self) + pub fn aren27(&mut self) -> AREN27_W { + AREN27_W::new(self, 27) } #[doc = "Bit 28 - Async rising enabled 28"] #[inline(always)] #[must_use] - pub fn aren28(&mut self) -> AREN28_W { - AREN28_W::new(self) + pub fn aren28(&mut self) -> AREN28_W { + AREN28_W::new(self, 28) } #[doc = "Bit 29 - Async rising enabled 29"] #[inline(always)] #[must_use] - pub fn aren29(&mut self) -> AREN29_W { - AREN29_W::new(self) + pub fn aren29(&mut self) -> AREN29_W { + AREN29_W::new(self, 29) } #[doc = "Bit 30 - Async rising enabled 30"] #[inline(always)] #[must_use] - pub fn aren30(&mut self) -> AREN30_W { - AREN30_W::new(self) + pub fn aren30(&mut self) -> AREN30_W { + AREN30_W::new(self, 30) } #[doc = "Bit 31 - Async rising enabled 31"] #[inline(always)] #[must_use] - pub fn aren31(&mut self) -> AREN31_W { - AREN31_W::new(self) + pub fn aren31(&mut self) -> AREN31_W { + AREN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gparen1.rs b/crates/bcm2835-lpa/src/gpio/gparen1.rs index f4a64ad..2e15a27 100644 --- a/crates/bcm2835-lpa/src/gpio/gparen1.rs +++ b/crates/bcm2835-lpa/src/gpio/gparen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `AREN32` reader - Async rising enabled 32"] pub type AREN32_R = crate::BitReader; #[doc = "Field `AREN32` writer - Async rising enabled 32"] -pub type AREN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN33` reader - Async rising enabled 33"] pub type AREN33_R = crate::BitReader; #[doc = "Field `AREN33` writer - Async rising enabled 33"] -pub type AREN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN34` reader - Async rising enabled 34"] pub type AREN34_R = crate::BitReader; #[doc = "Field `AREN34` writer - Async rising enabled 34"] -pub type AREN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN35` reader - Async rising enabled 35"] pub type AREN35_R = crate::BitReader; #[doc = "Field `AREN35` writer - Async rising enabled 35"] -pub type AREN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN36` reader - Async rising enabled 36"] pub type AREN36_R = crate::BitReader; #[doc = "Field `AREN36` writer - Async rising enabled 36"] -pub type AREN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN37` reader - Async rising enabled 37"] pub type AREN37_R = crate::BitReader; #[doc = "Field `AREN37` writer - Async rising enabled 37"] -pub type AREN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN38` reader - Async rising enabled 38"] pub type AREN38_R = crate::BitReader; #[doc = "Field `AREN38` writer - Async rising enabled 38"] -pub type AREN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN39` reader - Async rising enabled 39"] pub type AREN39_R = crate::BitReader; #[doc = "Field `AREN39` writer - Async rising enabled 39"] -pub type AREN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN40` reader - Async rising enabled 40"] pub type AREN40_R = crate::BitReader; #[doc = "Field `AREN40` writer - Async rising enabled 40"] -pub type AREN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN41` reader - Async rising enabled 41"] pub type AREN41_R = crate::BitReader; #[doc = "Field `AREN41` writer - Async rising enabled 41"] -pub type AREN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN42` reader - Async rising enabled 42"] pub type AREN42_R = crate::BitReader; #[doc = "Field `AREN42` writer - Async rising enabled 42"] -pub type AREN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN43` reader - Async rising enabled 43"] pub type AREN43_R = crate::BitReader; #[doc = "Field `AREN43` writer - Async rising enabled 43"] -pub type AREN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN44` reader - Async rising enabled 44"] pub type AREN44_R = crate::BitReader; #[doc = "Field `AREN44` writer - Async rising enabled 44"] -pub type AREN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN45` reader - Async rising enabled 45"] pub type AREN45_R = crate::BitReader; #[doc = "Field `AREN45` writer - Async rising enabled 45"] -pub type AREN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN46` reader - Async rising enabled 46"] pub type AREN46_R = crate::BitReader; #[doc = "Field `AREN46` writer - Async rising enabled 46"] -pub type AREN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN47` reader - Async rising enabled 47"] pub type AREN47_R = crate::BitReader; #[doc = "Field `AREN47` writer - Async rising enabled 47"] -pub type AREN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN48` reader - Async rising enabled 48"] pub type AREN48_R = crate::BitReader; #[doc = "Field `AREN48` writer - Async rising enabled 48"] -pub type AREN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN49` reader - Async rising enabled 49"] pub type AREN49_R = crate::BitReader; #[doc = "Field `AREN49` writer - Async rising enabled 49"] -pub type AREN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN50` reader - Async rising enabled 50"] pub type AREN50_R = crate::BitReader; #[doc = "Field `AREN50` writer - Async rising enabled 50"] -pub type AREN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN51` reader - Async rising enabled 51"] pub type AREN51_R = crate::BitReader; #[doc = "Field `AREN51` writer - Async rising enabled 51"] -pub type AREN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN52` reader - Async rising enabled 52"] pub type AREN52_R = crate::BitReader; #[doc = "Field `AREN52` writer - Async rising enabled 52"] -pub type AREN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN53` reader - Async rising enabled 53"] pub type AREN53_R = crate::BitReader; #[doc = "Field `AREN53` writer - Async rising enabled 53"] -pub type AREN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async rising enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async rising enabled 32"] #[inline(always)] #[must_use] - pub fn aren32(&mut self) -> AREN32_W { - AREN32_W::new(self) + pub fn aren32(&mut self) -> AREN32_W { + AREN32_W::new(self, 0) } #[doc = "Bit 1 - Async rising enabled 33"] #[inline(always)] #[must_use] - pub fn aren33(&mut self) -> AREN33_W { - AREN33_W::new(self) + pub fn aren33(&mut self) -> AREN33_W { + AREN33_W::new(self, 1) } #[doc = "Bit 2 - Async rising enabled 34"] #[inline(always)] #[must_use] - pub fn aren34(&mut self) -> AREN34_W { - AREN34_W::new(self) + pub fn aren34(&mut self) -> AREN34_W { + AREN34_W::new(self, 2) } #[doc = "Bit 3 - Async rising enabled 35"] #[inline(always)] #[must_use] - pub fn aren35(&mut self) -> AREN35_W { - AREN35_W::new(self) + pub fn aren35(&mut self) -> AREN35_W { + AREN35_W::new(self, 3) } #[doc = "Bit 4 - Async rising enabled 36"] #[inline(always)] #[must_use] - pub fn aren36(&mut self) -> AREN36_W { - AREN36_W::new(self) + pub fn aren36(&mut self) -> AREN36_W { + AREN36_W::new(self, 4) } #[doc = "Bit 5 - Async rising enabled 37"] #[inline(always)] #[must_use] - pub fn aren37(&mut self) -> AREN37_W { - AREN37_W::new(self) + pub fn aren37(&mut self) -> AREN37_W { + AREN37_W::new(self, 5) } #[doc = "Bit 6 - Async rising enabled 38"] #[inline(always)] #[must_use] - pub fn aren38(&mut self) -> AREN38_W { - AREN38_W::new(self) + pub fn aren38(&mut self) -> AREN38_W { + AREN38_W::new(self, 6) } #[doc = "Bit 7 - Async rising enabled 39"] #[inline(always)] #[must_use] - pub fn aren39(&mut self) -> AREN39_W { - AREN39_W::new(self) + pub fn aren39(&mut self) -> AREN39_W { + AREN39_W::new(self, 7) } #[doc = "Bit 8 - Async rising enabled 40"] #[inline(always)] #[must_use] - pub fn aren40(&mut self) -> AREN40_W { - AREN40_W::new(self) + pub fn aren40(&mut self) -> AREN40_W { + AREN40_W::new(self, 8) } #[doc = "Bit 9 - Async rising enabled 41"] #[inline(always)] #[must_use] - pub fn aren41(&mut self) -> AREN41_W { - AREN41_W::new(self) + pub fn aren41(&mut self) -> AREN41_W { + AREN41_W::new(self, 9) } #[doc = "Bit 10 - Async rising enabled 42"] #[inline(always)] #[must_use] - pub fn aren42(&mut self) -> AREN42_W { - AREN42_W::new(self) + pub fn aren42(&mut self) -> AREN42_W { + AREN42_W::new(self, 10) } #[doc = "Bit 11 - Async rising enabled 43"] #[inline(always)] #[must_use] - pub fn aren43(&mut self) -> AREN43_W { - AREN43_W::new(self) + pub fn aren43(&mut self) -> AREN43_W { + AREN43_W::new(self, 11) } #[doc = "Bit 12 - Async rising enabled 44"] #[inline(always)] #[must_use] - pub fn aren44(&mut self) -> AREN44_W { - AREN44_W::new(self) + pub fn aren44(&mut self) -> AREN44_W { + AREN44_W::new(self, 12) } #[doc = "Bit 13 - Async rising enabled 45"] #[inline(always)] #[must_use] - pub fn aren45(&mut self) -> AREN45_W { - AREN45_W::new(self) + pub fn aren45(&mut self) -> AREN45_W { + AREN45_W::new(self, 13) } #[doc = "Bit 14 - Async rising enabled 46"] #[inline(always)] #[must_use] - pub fn aren46(&mut self) -> AREN46_W { - AREN46_W::new(self) + pub fn aren46(&mut self) -> AREN46_W { + AREN46_W::new(self, 14) } #[doc = "Bit 15 - Async rising enabled 47"] #[inline(always)] #[must_use] - pub fn aren47(&mut self) -> AREN47_W { - AREN47_W::new(self) + pub fn aren47(&mut self) -> AREN47_W { + AREN47_W::new(self, 15) } #[doc = "Bit 16 - Async rising enabled 48"] #[inline(always)] #[must_use] - pub fn aren48(&mut self) -> AREN48_W { - AREN48_W::new(self) + pub fn aren48(&mut self) -> AREN48_W { + AREN48_W::new(self, 16) } #[doc = "Bit 17 - Async rising enabled 49"] #[inline(always)] #[must_use] - pub fn aren49(&mut self) -> AREN49_W { - AREN49_W::new(self) + pub fn aren49(&mut self) -> AREN49_W { + AREN49_W::new(self, 17) } #[doc = "Bit 18 - Async rising enabled 50"] #[inline(always)] #[must_use] - pub fn aren50(&mut self) -> AREN50_W { - AREN50_W::new(self) + pub fn aren50(&mut self) -> AREN50_W { + AREN50_W::new(self, 18) } #[doc = "Bit 19 - Async rising enabled 51"] #[inline(always)] #[must_use] - pub fn aren51(&mut self) -> AREN51_W { - AREN51_W::new(self) + pub fn aren51(&mut self) -> AREN51_W { + AREN51_W::new(self, 19) } #[doc = "Bit 20 - Async rising enabled 52"] #[inline(always)] #[must_use] - pub fn aren52(&mut self) -> AREN52_W { - AREN52_W::new(self) + pub fn aren52(&mut self) -> AREN52_W { + AREN52_W::new(self, 20) } #[doc = "Bit 21 - Async rising enabled 53"] #[inline(always)] #[must_use] - pub fn aren53(&mut self) -> AREN53_W { - AREN53_W::new(self) + pub fn aren53(&mut self) -> AREN53_W { + AREN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpclr0.rs b/crates/bcm2835-lpa/src/gpio/gpclr0.rs index 210af7f..d25acb3 100644 --- a/crates/bcm2835-lpa/src/gpio/gpclr0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpclr0.rs @@ -1,69 +1,69 @@ #[doc = "Register `GPCLR0` writer"] pub type W = crate::W; #[doc = "Field `CLR0` writer - Clear 0"] -pub type CLR0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR1` writer - Clear 1"] -pub type CLR1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR2` writer - Clear 2"] -pub type CLR2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR3` writer - Clear 3"] -pub type CLR3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR4` writer - Clear 4"] -pub type CLR4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR5` writer - Clear 5"] -pub type CLR5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR6` writer - Clear 6"] -pub type CLR6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR7` writer - Clear 7"] -pub type CLR7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR8` writer - Clear 8"] -pub type CLR8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR9` writer - Clear 9"] -pub type CLR9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR10` writer - Clear 10"] -pub type CLR10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR11` writer - Clear 11"] -pub type CLR11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR12` writer - Clear 12"] -pub type CLR12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR13` writer - Clear 13"] -pub type CLR13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR14` writer - Clear 14"] -pub type CLR14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR15` writer - Clear 15"] -pub type CLR15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR16` writer - Clear 16"] -pub type CLR16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR17` writer - Clear 17"] -pub type CLR17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR18` writer - Clear 18"] -pub type CLR18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR19` writer - Clear 19"] -pub type CLR19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR20` writer - Clear 20"] -pub type CLR20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR21` writer - Clear 21"] -pub type CLR21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR22` writer - Clear 22"] -pub type CLR22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR23` writer - Clear 23"] -pub type CLR23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR24` writer - Clear 24"] -pub type CLR24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR25` writer - Clear 25"] -pub type CLR25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR26` writer - Clear 26"] -pub type CLR26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR27` writer - Clear 27"] -pub type CLR27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR28` writer - Clear 28"] -pub type CLR28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR29` writer - Clear 29"] -pub type CLR29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR30` writer - Clear 30"] -pub type CLR30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR31` writer - Clear 31"] -pub type CLR31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -73,194 +73,194 @@ impl W { #[doc = "Bit 0 - Clear 0"] #[inline(always)] #[must_use] - pub fn clr0(&mut self) -> CLR0_W { - CLR0_W::new(self) + pub fn clr0(&mut self) -> CLR0_W { + CLR0_W::new(self, 0) } #[doc = "Bit 1 - Clear 1"] #[inline(always)] #[must_use] - pub fn clr1(&mut self) -> CLR1_W { - CLR1_W::new(self) + pub fn clr1(&mut self) -> CLR1_W { + CLR1_W::new(self, 1) } #[doc = "Bit 2 - Clear 2"] #[inline(always)] #[must_use] - pub fn clr2(&mut self) -> CLR2_W { - CLR2_W::new(self) + pub fn clr2(&mut self) -> CLR2_W { + CLR2_W::new(self, 2) } #[doc = "Bit 3 - Clear 3"] #[inline(always)] #[must_use] - pub fn clr3(&mut self) -> CLR3_W { - CLR3_W::new(self) + pub fn clr3(&mut self) -> CLR3_W { + CLR3_W::new(self, 3) } #[doc = "Bit 4 - Clear 4"] #[inline(always)] #[must_use] - pub fn clr4(&mut self) -> CLR4_W { - CLR4_W::new(self) + pub fn clr4(&mut self) -> CLR4_W { + CLR4_W::new(self, 4) } #[doc = "Bit 5 - Clear 5"] #[inline(always)] #[must_use] - pub fn clr5(&mut self) -> CLR5_W { - CLR5_W::new(self) + pub fn clr5(&mut self) -> CLR5_W { + CLR5_W::new(self, 5) } #[doc = "Bit 6 - Clear 6"] #[inline(always)] #[must_use] - pub fn clr6(&mut self) -> CLR6_W { - CLR6_W::new(self) + pub fn clr6(&mut self) -> CLR6_W { + CLR6_W::new(self, 6) } #[doc = "Bit 7 - Clear 7"] #[inline(always)] #[must_use] - pub fn clr7(&mut self) -> CLR7_W { - CLR7_W::new(self) + pub fn clr7(&mut self) -> CLR7_W { + CLR7_W::new(self, 7) } #[doc = "Bit 8 - Clear 8"] #[inline(always)] #[must_use] - pub fn clr8(&mut self) -> CLR8_W { - CLR8_W::new(self) + pub fn clr8(&mut self) -> CLR8_W { + CLR8_W::new(self, 8) } #[doc = "Bit 9 - Clear 9"] #[inline(always)] #[must_use] - pub fn clr9(&mut self) -> CLR9_W { - CLR9_W::new(self) + pub fn clr9(&mut self) -> CLR9_W { + CLR9_W::new(self, 9) } #[doc = "Bit 10 - Clear 10"] #[inline(always)] #[must_use] - pub fn clr10(&mut self) -> CLR10_W { - CLR10_W::new(self) + pub fn clr10(&mut self) -> CLR10_W { + CLR10_W::new(self, 10) } #[doc = "Bit 11 - Clear 11"] #[inline(always)] #[must_use] - pub fn clr11(&mut self) -> CLR11_W { - CLR11_W::new(self) + pub fn clr11(&mut self) -> CLR11_W { + CLR11_W::new(self, 11) } #[doc = "Bit 12 - Clear 12"] #[inline(always)] #[must_use] - pub fn clr12(&mut self) -> CLR12_W { - CLR12_W::new(self) + pub fn clr12(&mut self) -> CLR12_W { + CLR12_W::new(self, 12) } #[doc = "Bit 13 - Clear 13"] #[inline(always)] #[must_use] - pub fn clr13(&mut self) -> CLR13_W { - CLR13_W::new(self) + pub fn clr13(&mut self) -> CLR13_W { + CLR13_W::new(self, 13) } #[doc = "Bit 14 - Clear 14"] #[inline(always)] #[must_use] - pub fn clr14(&mut self) -> CLR14_W { - CLR14_W::new(self) + pub fn clr14(&mut self) -> CLR14_W { + CLR14_W::new(self, 14) } #[doc = "Bit 15 - Clear 15"] #[inline(always)] #[must_use] - pub fn clr15(&mut self) -> CLR15_W { - CLR15_W::new(self) + pub fn clr15(&mut self) -> CLR15_W { + CLR15_W::new(self, 15) } #[doc = "Bit 16 - Clear 16"] #[inline(always)] #[must_use] - pub fn clr16(&mut self) -> CLR16_W { - CLR16_W::new(self) + pub fn clr16(&mut self) -> CLR16_W { + CLR16_W::new(self, 16) } #[doc = "Bit 17 - Clear 17"] #[inline(always)] #[must_use] - pub fn clr17(&mut self) -> CLR17_W { - CLR17_W::new(self) + pub fn clr17(&mut self) -> CLR17_W { + CLR17_W::new(self, 17) } #[doc = "Bit 18 - Clear 18"] #[inline(always)] #[must_use] - pub fn clr18(&mut self) -> CLR18_W { - CLR18_W::new(self) + pub fn clr18(&mut self) -> CLR18_W { + CLR18_W::new(self, 18) } #[doc = "Bit 19 - Clear 19"] #[inline(always)] #[must_use] - pub fn clr19(&mut self) -> CLR19_W { - CLR19_W::new(self) + pub fn clr19(&mut self) -> CLR19_W { + CLR19_W::new(self, 19) } #[doc = "Bit 20 - Clear 20"] #[inline(always)] #[must_use] - pub fn clr20(&mut self) -> CLR20_W { - CLR20_W::new(self) + pub fn clr20(&mut self) -> CLR20_W { + CLR20_W::new(self, 20) } #[doc = "Bit 21 - Clear 21"] #[inline(always)] #[must_use] - pub fn clr21(&mut self) -> CLR21_W { - CLR21_W::new(self) + pub fn clr21(&mut self) -> CLR21_W { + CLR21_W::new(self, 21) } #[doc = "Bit 22 - Clear 22"] #[inline(always)] #[must_use] - pub fn clr22(&mut self) -> CLR22_W { - CLR22_W::new(self) + pub fn clr22(&mut self) -> CLR22_W { + CLR22_W::new(self, 22) } #[doc = "Bit 23 - Clear 23"] #[inline(always)] #[must_use] - pub fn clr23(&mut self) -> CLR23_W { - CLR23_W::new(self) + pub fn clr23(&mut self) -> CLR23_W { + CLR23_W::new(self, 23) } #[doc = "Bit 24 - Clear 24"] #[inline(always)] #[must_use] - pub fn clr24(&mut self) -> CLR24_W { - CLR24_W::new(self) + pub fn clr24(&mut self) -> CLR24_W { + CLR24_W::new(self, 24) } #[doc = "Bit 25 - Clear 25"] #[inline(always)] #[must_use] - pub fn clr25(&mut self) -> CLR25_W { - CLR25_W::new(self) + pub fn clr25(&mut self) -> CLR25_W { + CLR25_W::new(self, 25) } #[doc = "Bit 26 - Clear 26"] #[inline(always)] #[must_use] - pub fn clr26(&mut self) -> CLR26_W { - CLR26_W::new(self) + pub fn clr26(&mut self) -> CLR26_W { + CLR26_W::new(self, 26) } #[doc = "Bit 27 - Clear 27"] #[inline(always)] #[must_use] - pub fn clr27(&mut self) -> CLR27_W { - CLR27_W::new(self) + pub fn clr27(&mut self) -> CLR27_W { + CLR27_W::new(self, 27) } #[doc = "Bit 28 - Clear 28"] #[inline(always)] #[must_use] - pub fn clr28(&mut self) -> CLR28_W { - CLR28_W::new(self) + pub fn clr28(&mut self) -> CLR28_W { + CLR28_W::new(self, 28) } #[doc = "Bit 29 - Clear 29"] #[inline(always)] #[must_use] - pub fn clr29(&mut self) -> CLR29_W { - CLR29_W::new(self) + pub fn clr29(&mut self) -> CLR29_W { + CLR29_W::new(self, 29) } #[doc = "Bit 30 - Clear 30"] #[inline(always)] #[must_use] - pub fn clr30(&mut self) -> CLR30_W { - CLR30_W::new(self) + pub fn clr30(&mut self) -> CLR30_W { + CLR30_W::new(self, 30) } #[doc = "Bit 31 - Clear 31"] #[inline(always)] #[must_use] - pub fn clr31(&mut self) -> CLR31_W { - CLR31_W::new(self) + pub fn clr31(&mut self) -> CLR31_W { + CLR31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpclr1.rs b/crates/bcm2835-lpa/src/gpio/gpclr1.rs index 21e8c12..911b7c7 100644 --- a/crates/bcm2835-lpa/src/gpio/gpclr1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpclr1.rs @@ -1,49 +1,49 @@ #[doc = "Register `GPCLR1` writer"] pub type W = crate::W; #[doc = "Field `CLR32` writer - Clear 32"] -pub type CLR32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR33` writer - Clear 33"] -pub type CLR33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR34` writer - Clear 34"] -pub type CLR34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR35` writer - Clear 35"] -pub type CLR35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR36` writer - Clear 36"] -pub type CLR36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR37` writer - Clear 37"] -pub type CLR37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR38` writer - Clear 38"] -pub type CLR38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR39` writer - Clear 39"] -pub type CLR39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR40` writer - Clear 40"] -pub type CLR40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR41` writer - Clear 41"] -pub type CLR41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR42` writer - Clear 42"] -pub type CLR42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR43` writer - Clear 43"] -pub type CLR43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR44` writer - Clear 44"] -pub type CLR44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR45` writer - Clear 45"] -pub type CLR45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR46` writer - Clear 46"] -pub type CLR46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR47` writer - Clear 47"] -pub type CLR47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR48` writer - Clear 48"] -pub type CLR48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR49` writer - Clear 49"] -pub type CLR49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR50` writer - Clear 50"] -pub type CLR50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR51` writer - Clear 51"] -pub type CLR51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR52` writer - Clear 52"] -pub type CLR52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR53` writer - Clear 53"] -pub type CLR53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR53_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -53,134 +53,134 @@ impl W { #[doc = "Bit 0 - Clear 32"] #[inline(always)] #[must_use] - pub fn clr32(&mut self) -> CLR32_W { - CLR32_W::new(self) + pub fn clr32(&mut self) -> CLR32_W { + CLR32_W::new(self, 0) } #[doc = "Bit 1 - Clear 33"] #[inline(always)] #[must_use] - pub fn clr33(&mut self) -> CLR33_W { - CLR33_W::new(self) + pub fn clr33(&mut self) -> CLR33_W { + CLR33_W::new(self, 1) } #[doc = "Bit 2 - Clear 34"] #[inline(always)] #[must_use] - pub fn clr34(&mut self) -> CLR34_W { - CLR34_W::new(self) + pub fn clr34(&mut self) -> CLR34_W { + CLR34_W::new(self, 2) } #[doc = "Bit 3 - Clear 35"] #[inline(always)] #[must_use] - pub fn clr35(&mut self) -> CLR35_W { - CLR35_W::new(self) + pub fn clr35(&mut self) -> CLR35_W { + CLR35_W::new(self, 3) } #[doc = "Bit 4 - Clear 36"] #[inline(always)] #[must_use] - pub fn clr36(&mut self) -> CLR36_W { - CLR36_W::new(self) + pub fn clr36(&mut self) -> CLR36_W { + CLR36_W::new(self, 4) } #[doc = "Bit 5 - Clear 37"] #[inline(always)] #[must_use] - pub fn clr37(&mut self) -> CLR37_W { - CLR37_W::new(self) + pub fn clr37(&mut self) -> CLR37_W { + CLR37_W::new(self, 5) } #[doc = "Bit 6 - Clear 38"] #[inline(always)] #[must_use] - pub fn clr38(&mut self) -> CLR38_W { - CLR38_W::new(self) + pub fn clr38(&mut self) -> CLR38_W { + CLR38_W::new(self, 6) } #[doc = "Bit 7 - Clear 39"] #[inline(always)] #[must_use] - pub fn clr39(&mut self) -> CLR39_W { - CLR39_W::new(self) + pub fn clr39(&mut self) -> CLR39_W { + CLR39_W::new(self, 7) } #[doc = "Bit 8 - Clear 40"] #[inline(always)] #[must_use] - pub fn clr40(&mut self) -> CLR40_W { - CLR40_W::new(self) + pub fn clr40(&mut self) -> CLR40_W { + CLR40_W::new(self, 8) } #[doc = "Bit 9 - Clear 41"] #[inline(always)] #[must_use] - pub fn clr41(&mut self) -> CLR41_W { - CLR41_W::new(self) + pub fn clr41(&mut self) -> CLR41_W { + CLR41_W::new(self, 9) } #[doc = "Bit 10 - Clear 42"] #[inline(always)] #[must_use] - pub fn clr42(&mut self) -> CLR42_W { - CLR42_W::new(self) + pub fn clr42(&mut self) -> CLR42_W { + CLR42_W::new(self, 10) } #[doc = "Bit 11 - Clear 43"] #[inline(always)] #[must_use] - pub fn clr43(&mut self) -> CLR43_W { - CLR43_W::new(self) + pub fn clr43(&mut self) -> CLR43_W { + CLR43_W::new(self, 11) } #[doc = "Bit 12 - Clear 44"] #[inline(always)] #[must_use] - pub fn clr44(&mut self) -> CLR44_W { - CLR44_W::new(self) + pub fn clr44(&mut self) -> CLR44_W { + CLR44_W::new(self, 12) } #[doc = "Bit 13 - Clear 45"] #[inline(always)] #[must_use] - pub fn clr45(&mut self) -> CLR45_W { - CLR45_W::new(self) + pub fn clr45(&mut self) -> CLR45_W { + CLR45_W::new(self, 13) } #[doc = "Bit 14 - Clear 46"] #[inline(always)] #[must_use] - pub fn clr46(&mut self) -> CLR46_W { - CLR46_W::new(self) + pub fn clr46(&mut self) -> CLR46_W { + CLR46_W::new(self, 14) } #[doc = "Bit 15 - Clear 47"] #[inline(always)] #[must_use] - pub fn clr47(&mut self) -> CLR47_W { - CLR47_W::new(self) + pub fn clr47(&mut self) -> CLR47_W { + CLR47_W::new(self, 15) } #[doc = "Bit 16 - Clear 48"] #[inline(always)] #[must_use] - pub fn clr48(&mut self) -> CLR48_W { - CLR48_W::new(self) + pub fn clr48(&mut self) -> CLR48_W { + CLR48_W::new(self, 16) } #[doc = "Bit 17 - Clear 49"] #[inline(always)] #[must_use] - pub fn clr49(&mut self) -> CLR49_W { - CLR49_W::new(self) + pub fn clr49(&mut self) -> CLR49_W { + CLR49_W::new(self, 17) } #[doc = "Bit 18 - Clear 50"] #[inline(always)] #[must_use] - pub fn clr50(&mut self) -> CLR50_W { - CLR50_W::new(self) + pub fn clr50(&mut self) -> CLR50_W { + CLR50_W::new(self, 18) } #[doc = "Bit 19 - Clear 51"] #[inline(always)] #[must_use] - pub fn clr51(&mut self) -> CLR51_W { - CLR51_W::new(self) + pub fn clr51(&mut self) -> CLR51_W { + CLR51_W::new(self, 19) } #[doc = "Bit 20 - Clear 52"] #[inline(always)] #[must_use] - pub fn clr52(&mut self) -> CLR52_W { - CLR52_W::new(self) + pub fn clr52(&mut self) -> CLR52_W { + CLR52_W::new(self, 20) } #[doc = "Bit 21 - Clear 53"] #[inline(always)] #[must_use] - pub fn clr53(&mut self) -> CLR53_W { - CLR53_W::new(self) + pub fn clr53(&mut self) -> CLR53_W { + CLR53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpeds0.rs b/crates/bcm2835-lpa/src/gpio/gpeds0.rs index caa11e1..f89e12d 100644 --- a/crates/bcm2835-lpa/src/gpio/gpeds0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpeds0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `EDS0` reader - Event detected 0"] pub type EDS0_R = crate::BitReader; #[doc = "Field `EDS0` writer - Event detected 0"] -pub type EDS0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS1` reader - Event detected 1"] pub type EDS1_R = crate::BitReader; #[doc = "Field `EDS1` writer - Event detected 1"] -pub type EDS1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS2` reader - Event detected 2"] pub type EDS2_R = crate::BitReader; #[doc = "Field `EDS2` writer - Event detected 2"] -pub type EDS2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS3` reader - Event detected 3"] pub type EDS3_R = crate::BitReader; #[doc = "Field `EDS3` writer - Event detected 3"] -pub type EDS3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS4` reader - Event detected 4"] pub type EDS4_R = crate::BitReader; #[doc = "Field `EDS4` writer - Event detected 4"] -pub type EDS4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS5` reader - Event detected 5"] pub type EDS5_R = crate::BitReader; #[doc = "Field `EDS5` writer - Event detected 5"] -pub type EDS5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS6` reader - Event detected 6"] pub type EDS6_R = crate::BitReader; #[doc = "Field `EDS6` writer - Event detected 6"] -pub type EDS6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS7` reader - Event detected 7"] pub type EDS7_R = crate::BitReader; #[doc = "Field `EDS7` writer - Event detected 7"] -pub type EDS7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS8` reader - Event detected 8"] pub type EDS8_R = crate::BitReader; #[doc = "Field `EDS8` writer - Event detected 8"] -pub type EDS8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS9` reader - Event detected 9"] pub type EDS9_R = crate::BitReader; #[doc = "Field `EDS9` writer - Event detected 9"] -pub type EDS9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS10` reader - Event detected 10"] pub type EDS10_R = crate::BitReader; #[doc = "Field `EDS10` writer - Event detected 10"] -pub type EDS10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS11` reader - Event detected 11"] pub type EDS11_R = crate::BitReader; #[doc = "Field `EDS11` writer - Event detected 11"] -pub type EDS11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS12` reader - Event detected 12"] pub type EDS12_R = crate::BitReader; #[doc = "Field `EDS12` writer - Event detected 12"] -pub type EDS12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS13` reader - Event detected 13"] pub type EDS13_R = crate::BitReader; #[doc = "Field `EDS13` writer - Event detected 13"] -pub type EDS13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS14` reader - Event detected 14"] pub type EDS14_R = crate::BitReader; #[doc = "Field `EDS14` writer - Event detected 14"] -pub type EDS14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS15` reader - Event detected 15"] pub type EDS15_R = crate::BitReader; #[doc = "Field `EDS15` writer - Event detected 15"] -pub type EDS15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS16` reader - Event detected 16"] pub type EDS16_R = crate::BitReader; #[doc = "Field `EDS16` writer - Event detected 16"] -pub type EDS16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS17` reader - Event detected 17"] pub type EDS17_R = crate::BitReader; #[doc = "Field `EDS17` writer - Event detected 17"] -pub type EDS17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS18` reader - Event detected 18"] pub type EDS18_R = crate::BitReader; #[doc = "Field `EDS18` writer - Event detected 18"] -pub type EDS18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS19` reader - Event detected 19"] pub type EDS19_R = crate::BitReader; #[doc = "Field `EDS19` writer - Event detected 19"] -pub type EDS19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS20` reader - Event detected 20"] pub type EDS20_R = crate::BitReader; #[doc = "Field `EDS20` writer - Event detected 20"] -pub type EDS20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS21` reader - Event detected 21"] pub type EDS21_R = crate::BitReader; #[doc = "Field `EDS21` writer - Event detected 21"] -pub type EDS21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS22` reader - Event detected 22"] pub type EDS22_R = crate::BitReader; #[doc = "Field `EDS22` writer - Event detected 22"] -pub type EDS22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS23` reader - Event detected 23"] pub type EDS23_R = crate::BitReader; #[doc = "Field `EDS23` writer - Event detected 23"] -pub type EDS23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS24` reader - Event detected 24"] pub type EDS24_R = crate::BitReader; #[doc = "Field `EDS24` writer - Event detected 24"] -pub type EDS24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS25` reader - Event detected 25"] pub type EDS25_R = crate::BitReader; #[doc = "Field `EDS25` writer - Event detected 25"] -pub type EDS25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS26` reader - Event detected 26"] pub type EDS26_R = crate::BitReader; #[doc = "Field `EDS26` writer - Event detected 26"] -pub type EDS26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS27` reader - Event detected 27"] pub type EDS27_R = crate::BitReader; #[doc = "Field `EDS27` writer - Event detected 27"] -pub type EDS27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS28` reader - Event detected 28"] pub type EDS28_R = crate::BitReader; #[doc = "Field `EDS28` writer - Event detected 28"] -pub type EDS28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS29` reader - Event detected 29"] pub type EDS29_R = crate::BitReader; #[doc = "Field `EDS29` writer - Event detected 29"] -pub type EDS29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS30` reader - Event detected 30"] pub type EDS30_R = crate::BitReader; #[doc = "Field `EDS30` writer - Event detected 30"] -pub type EDS30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS31` reader - Event detected 31"] pub type EDS31_R = crate::BitReader; #[doc = "Field `EDS31` writer - Event detected 31"] -pub type EDS31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Event detected 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Event detected 0"] #[inline(always)] #[must_use] - pub fn eds0(&mut self) -> EDS0_W { - EDS0_W::new(self) + pub fn eds0(&mut self) -> EDS0_W { + EDS0_W::new(self, 0) } #[doc = "Bit 1 - Event detected 1"] #[inline(always)] #[must_use] - pub fn eds1(&mut self) -> EDS1_W { - EDS1_W::new(self) + pub fn eds1(&mut self) -> EDS1_W { + EDS1_W::new(self, 1) } #[doc = "Bit 2 - Event detected 2"] #[inline(always)] #[must_use] - pub fn eds2(&mut self) -> EDS2_W { - EDS2_W::new(self) + pub fn eds2(&mut self) -> EDS2_W { + EDS2_W::new(self, 2) } #[doc = "Bit 3 - Event detected 3"] #[inline(always)] #[must_use] - pub fn eds3(&mut self) -> EDS3_W { - EDS3_W::new(self) + pub fn eds3(&mut self) -> EDS3_W { + EDS3_W::new(self, 3) } #[doc = "Bit 4 - Event detected 4"] #[inline(always)] #[must_use] - pub fn eds4(&mut self) -> EDS4_W { - EDS4_W::new(self) + pub fn eds4(&mut self) -> EDS4_W { + EDS4_W::new(self, 4) } #[doc = "Bit 5 - Event detected 5"] #[inline(always)] #[must_use] - pub fn eds5(&mut self) -> EDS5_W { - EDS5_W::new(self) + pub fn eds5(&mut self) -> EDS5_W { + EDS5_W::new(self, 5) } #[doc = "Bit 6 - Event detected 6"] #[inline(always)] #[must_use] - pub fn eds6(&mut self) -> EDS6_W { - EDS6_W::new(self) + pub fn eds6(&mut self) -> EDS6_W { + EDS6_W::new(self, 6) } #[doc = "Bit 7 - Event detected 7"] #[inline(always)] #[must_use] - pub fn eds7(&mut self) -> EDS7_W { - EDS7_W::new(self) + pub fn eds7(&mut self) -> EDS7_W { + EDS7_W::new(self, 7) } #[doc = "Bit 8 - Event detected 8"] #[inline(always)] #[must_use] - pub fn eds8(&mut self) -> EDS8_W { - EDS8_W::new(self) + pub fn eds8(&mut self) -> EDS8_W { + EDS8_W::new(self, 8) } #[doc = "Bit 9 - Event detected 9"] #[inline(always)] #[must_use] - pub fn eds9(&mut self) -> EDS9_W { - EDS9_W::new(self) + pub fn eds9(&mut self) -> EDS9_W { + EDS9_W::new(self, 9) } #[doc = "Bit 10 - Event detected 10"] #[inline(always)] #[must_use] - pub fn eds10(&mut self) -> EDS10_W { - EDS10_W::new(self) + pub fn eds10(&mut self) -> EDS10_W { + EDS10_W::new(self, 10) } #[doc = "Bit 11 - Event detected 11"] #[inline(always)] #[must_use] - pub fn eds11(&mut self) -> EDS11_W { - EDS11_W::new(self) + pub fn eds11(&mut self) -> EDS11_W { + EDS11_W::new(self, 11) } #[doc = "Bit 12 - Event detected 12"] #[inline(always)] #[must_use] - pub fn eds12(&mut self) -> EDS12_W { - EDS12_W::new(self) + pub fn eds12(&mut self) -> EDS12_W { + EDS12_W::new(self, 12) } #[doc = "Bit 13 - Event detected 13"] #[inline(always)] #[must_use] - pub fn eds13(&mut self) -> EDS13_W { - EDS13_W::new(self) + pub fn eds13(&mut self) -> EDS13_W { + EDS13_W::new(self, 13) } #[doc = "Bit 14 - Event detected 14"] #[inline(always)] #[must_use] - pub fn eds14(&mut self) -> EDS14_W { - EDS14_W::new(self) + pub fn eds14(&mut self) -> EDS14_W { + EDS14_W::new(self, 14) } #[doc = "Bit 15 - Event detected 15"] #[inline(always)] #[must_use] - pub fn eds15(&mut self) -> EDS15_W { - EDS15_W::new(self) + pub fn eds15(&mut self) -> EDS15_W { + EDS15_W::new(self, 15) } #[doc = "Bit 16 - Event detected 16"] #[inline(always)] #[must_use] - pub fn eds16(&mut self) -> EDS16_W { - EDS16_W::new(self) + pub fn eds16(&mut self) -> EDS16_W { + EDS16_W::new(self, 16) } #[doc = "Bit 17 - Event detected 17"] #[inline(always)] #[must_use] - pub fn eds17(&mut self) -> EDS17_W { - EDS17_W::new(self) + pub fn eds17(&mut self) -> EDS17_W { + EDS17_W::new(self, 17) } #[doc = "Bit 18 - Event detected 18"] #[inline(always)] #[must_use] - pub fn eds18(&mut self) -> EDS18_W { - EDS18_W::new(self) + pub fn eds18(&mut self) -> EDS18_W { + EDS18_W::new(self, 18) } #[doc = "Bit 19 - Event detected 19"] #[inline(always)] #[must_use] - pub fn eds19(&mut self) -> EDS19_W { - EDS19_W::new(self) + pub fn eds19(&mut self) -> EDS19_W { + EDS19_W::new(self, 19) } #[doc = "Bit 20 - Event detected 20"] #[inline(always)] #[must_use] - pub fn eds20(&mut self) -> EDS20_W { - EDS20_W::new(self) + pub fn eds20(&mut self) -> EDS20_W { + EDS20_W::new(self, 20) } #[doc = "Bit 21 - Event detected 21"] #[inline(always)] #[must_use] - pub fn eds21(&mut self) -> EDS21_W { - EDS21_W::new(self) + pub fn eds21(&mut self) -> EDS21_W { + EDS21_W::new(self, 21) } #[doc = "Bit 22 - Event detected 22"] #[inline(always)] #[must_use] - pub fn eds22(&mut self) -> EDS22_W { - EDS22_W::new(self) + pub fn eds22(&mut self) -> EDS22_W { + EDS22_W::new(self, 22) } #[doc = "Bit 23 - Event detected 23"] #[inline(always)] #[must_use] - pub fn eds23(&mut self) -> EDS23_W { - EDS23_W::new(self) + pub fn eds23(&mut self) -> EDS23_W { + EDS23_W::new(self, 23) } #[doc = "Bit 24 - Event detected 24"] #[inline(always)] #[must_use] - pub fn eds24(&mut self) -> EDS24_W { - EDS24_W::new(self) + pub fn eds24(&mut self) -> EDS24_W { + EDS24_W::new(self, 24) } #[doc = "Bit 25 - Event detected 25"] #[inline(always)] #[must_use] - pub fn eds25(&mut self) -> EDS25_W { - EDS25_W::new(self) + pub fn eds25(&mut self) -> EDS25_W { + EDS25_W::new(self, 25) } #[doc = "Bit 26 - Event detected 26"] #[inline(always)] #[must_use] - pub fn eds26(&mut self) -> EDS26_W { - EDS26_W::new(self) + pub fn eds26(&mut self) -> EDS26_W { + EDS26_W::new(self, 26) } #[doc = "Bit 27 - Event detected 27"] #[inline(always)] #[must_use] - pub fn eds27(&mut self) -> EDS27_W { - EDS27_W::new(self) + pub fn eds27(&mut self) -> EDS27_W { + EDS27_W::new(self, 27) } #[doc = "Bit 28 - Event detected 28"] #[inline(always)] #[must_use] - pub fn eds28(&mut self) -> EDS28_W { - EDS28_W::new(self) + pub fn eds28(&mut self) -> EDS28_W { + EDS28_W::new(self, 28) } #[doc = "Bit 29 - Event detected 29"] #[inline(always)] #[must_use] - pub fn eds29(&mut self) -> EDS29_W { - EDS29_W::new(self) + pub fn eds29(&mut self) -> EDS29_W { + EDS29_W::new(self, 29) } #[doc = "Bit 30 - Event detected 30"] #[inline(always)] #[must_use] - pub fn eds30(&mut self) -> EDS30_W { - EDS30_W::new(self) + pub fn eds30(&mut self) -> EDS30_W { + EDS30_W::new(self, 30) } #[doc = "Bit 31 - Event detected 31"] #[inline(always)] #[must_use] - pub fn eds31(&mut self) -> EDS31_W { - EDS31_W::new(self) + pub fn eds31(&mut self) -> EDS31_W { + EDS31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpeds1.rs b/crates/bcm2835-lpa/src/gpio/gpeds1.rs index ac728c0..b6ca4fd 100644 --- a/crates/bcm2835-lpa/src/gpio/gpeds1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpeds1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `EDS32` reader - Event detected 32"] pub type EDS32_R = crate::BitReader; #[doc = "Field `EDS32` writer - Event detected 32"] -pub type EDS32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS33` reader - Event detected 33"] pub type EDS33_R = crate::BitReader; #[doc = "Field `EDS33` writer - Event detected 33"] -pub type EDS33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS34` reader - Event detected 34"] pub type EDS34_R = crate::BitReader; #[doc = "Field `EDS34` writer - Event detected 34"] -pub type EDS34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS35` reader - Event detected 35"] pub type EDS35_R = crate::BitReader; #[doc = "Field `EDS35` writer - Event detected 35"] -pub type EDS35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS36` reader - Event detected 36"] pub type EDS36_R = crate::BitReader; #[doc = "Field `EDS36` writer - Event detected 36"] -pub type EDS36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS37` reader - Event detected 37"] pub type EDS37_R = crate::BitReader; #[doc = "Field `EDS37` writer - Event detected 37"] -pub type EDS37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS38` reader - Event detected 38"] pub type EDS38_R = crate::BitReader; #[doc = "Field `EDS38` writer - Event detected 38"] -pub type EDS38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS39` reader - Event detected 39"] pub type EDS39_R = crate::BitReader; #[doc = "Field `EDS39` writer - Event detected 39"] -pub type EDS39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS40` reader - Event detected 40"] pub type EDS40_R = crate::BitReader; #[doc = "Field `EDS40` writer - Event detected 40"] -pub type EDS40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS41` reader - Event detected 41"] pub type EDS41_R = crate::BitReader; #[doc = "Field `EDS41` writer - Event detected 41"] -pub type EDS41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS42` reader - Event detected 42"] pub type EDS42_R = crate::BitReader; #[doc = "Field `EDS42` writer - Event detected 42"] -pub type EDS42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS43` reader - Event detected 43"] pub type EDS43_R = crate::BitReader; #[doc = "Field `EDS43` writer - Event detected 43"] -pub type EDS43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS44` reader - Event detected 44"] pub type EDS44_R = crate::BitReader; #[doc = "Field `EDS44` writer - Event detected 44"] -pub type EDS44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS45` reader - Event detected 45"] pub type EDS45_R = crate::BitReader; #[doc = "Field `EDS45` writer - Event detected 45"] -pub type EDS45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS46` reader - Event detected 46"] pub type EDS46_R = crate::BitReader; #[doc = "Field `EDS46` writer - Event detected 46"] -pub type EDS46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS47` reader - Event detected 47"] pub type EDS47_R = crate::BitReader; #[doc = "Field `EDS47` writer - Event detected 47"] -pub type EDS47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS48` reader - Event detected 48"] pub type EDS48_R = crate::BitReader; #[doc = "Field `EDS48` writer - Event detected 48"] -pub type EDS48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS49` reader - Event detected 49"] pub type EDS49_R = crate::BitReader; #[doc = "Field `EDS49` writer - Event detected 49"] -pub type EDS49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS50` reader - Event detected 50"] pub type EDS50_R = crate::BitReader; #[doc = "Field `EDS50` writer - Event detected 50"] -pub type EDS50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS51` reader - Event detected 51"] pub type EDS51_R = crate::BitReader; #[doc = "Field `EDS51` writer - Event detected 51"] -pub type EDS51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS52` reader - Event detected 52"] pub type EDS52_R = crate::BitReader; #[doc = "Field `EDS52` writer - Event detected 52"] -pub type EDS52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS53` reader - Event detected 53"] pub type EDS53_R = crate::BitReader; #[doc = "Field `EDS53` writer - Event detected 53"] -pub type EDS53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS53_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Event detected 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Event detected 32"] #[inline(always)] #[must_use] - pub fn eds32(&mut self) -> EDS32_W { - EDS32_W::new(self) + pub fn eds32(&mut self) -> EDS32_W { + EDS32_W::new(self, 0) } #[doc = "Bit 1 - Event detected 33"] #[inline(always)] #[must_use] - pub fn eds33(&mut self) -> EDS33_W { - EDS33_W::new(self) + pub fn eds33(&mut self) -> EDS33_W { + EDS33_W::new(self, 1) } #[doc = "Bit 2 - Event detected 34"] #[inline(always)] #[must_use] - pub fn eds34(&mut self) -> EDS34_W { - EDS34_W::new(self) + pub fn eds34(&mut self) -> EDS34_W { + EDS34_W::new(self, 2) } #[doc = "Bit 3 - Event detected 35"] #[inline(always)] #[must_use] - pub fn eds35(&mut self) -> EDS35_W { - EDS35_W::new(self) + pub fn eds35(&mut self) -> EDS35_W { + EDS35_W::new(self, 3) } #[doc = "Bit 4 - Event detected 36"] #[inline(always)] #[must_use] - pub fn eds36(&mut self) -> EDS36_W { - EDS36_W::new(self) + pub fn eds36(&mut self) -> EDS36_W { + EDS36_W::new(self, 4) } #[doc = "Bit 5 - Event detected 37"] #[inline(always)] #[must_use] - pub fn eds37(&mut self) -> EDS37_W { - EDS37_W::new(self) + pub fn eds37(&mut self) -> EDS37_W { + EDS37_W::new(self, 5) } #[doc = "Bit 6 - Event detected 38"] #[inline(always)] #[must_use] - pub fn eds38(&mut self) -> EDS38_W { - EDS38_W::new(self) + pub fn eds38(&mut self) -> EDS38_W { + EDS38_W::new(self, 6) } #[doc = "Bit 7 - Event detected 39"] #[inline(always)] #[must_use] - pub fn eds39(&mut self) -> EDS39_W { - EDS39_W::new(self) + pub fn eds39(&mut self) -> EDS39_W { + EDS39_W::new(self, 7) } #[doc = "Bit 8 - Event detected 40"] #[inline(always)] #[must_use] - pub fn eds40(&mut self) -> EDS40_W { - EDS40_W::new(self) + pub fn eds40(&mut self) -> EDS40_W { + EDS40_W::new(self, 8) } #[doc = "Bit 9 - Event detected 41"] #[inline(always)] #[must_use] - pub fn eds41(&mut self) -> EDS41_W { - EDS41_W::new(self) + pub fn eds41(&mut self) -> EDS41_W { + EDS41_W::new(self, 9) } #[doc = "Bit 10 - Event detected 42"] #[inline(always)] #[must_use] - pub fn eds42(&mut self) -> EDS42_W { - EDS42_W::new(self) + pub fn eds42(&mut self) -> EDS42_W { + EDS42_W::new(self, 10) } #[doc = "Bit 11 - Event detected 43"] #[inline(always)] #[must_use] - pub fn eds43(&mut self) -> EDS43_W { - EDS43_W::new(self) + pub fn eds43(&mut self) -> EDS43_W { + EDS43_W::new(self, 11) } #[doc = "Bit 12 - Event detected 44"] #[inline(always)] #[must_use] - pub fn eds44(&mut self) -> EDS44_W { - EDS44_W::new(self) + pub fn eds44(&mut self) -> EDS44_W { + EDS44_W::new(self, 12) } #[doc = "Bit 13 - Event detected 45"] #[inline(always)] #[must_use] - pub fn eds45(&mut self) -> EDS45_W { - EDS45_W::new(self) + pub fn eds45(&mut self) -> EDS45_W { + EDS45_W::new(self, 13) } #[doc = "Bit 14 - Event detected 46"] #[inline(always)] #[must_use] - pub fn eds46(&mut self) -> EDS46_W { - EDS46_W::new(self) + pub fn eds46(&mut self) -> EDS46_W { + EDS46_W::new(self, 14) } #[doc = "Bit 15 - Event detected 47"] #[inline(always)] #[must_use] - pub fn eds47(&mut self) -> EDS47_W { - EDS47_W::new(self) + pub fn eds47(&mut self) -> EDS47_W { + EDS47_W::new(self, 15) } #[doc = "Bit 16 - Event detected 48"] #[inline(always)] #[must_use] - pub fn eds48(&mut self) -> EDS48_W { - EDS48_W::new(self) + pub fn eds48(&mut self) -> EDS48_W { + EDS48_W::new(self, 16) } #[doc = "Bit 17 - Event detected 49"] #[inline(always)] #[must_use] - pub fn eds49(&mut self) -> EDS49_W { - EDS49_W::new(self) + pub fn eds49(&mut self) -> EDS49_W { + EDS49_W::new(self, 17) } #[doc = "Bit 18 - Event detected 50"] #[inline(always)] #[must_use] - pub fn eds50(&mut self) -> EDS50_W { - EDS50_W::new(self) + pub fn eds50(&mut self) -> EDS50_W { + EDS50_W::new(self, 18) } #[doc = "Bit 19 - Event detected 51"] #[inline(always)] #[must_use] - pub fn eds51(&mut self) -> EDS51_W { - EDS51_W::new(self) + pub fn eds51(&mut self) -> EDS51_W { + EDS51_W::new(self, 19) } #[doc = "Bit 20 - Event detected 52"] #[inline(always)] #[must_use] - pub fn eds52(&mut self) -> EDS52_W { - EDS52_W::new(self) + pub fn eds52(&mut self) -> EDS52_W { + EDS52_W::new(self, 20) } #[doc = "Bit 21 - Event detected 53"] #[inline(always)] #[must_use] - pub fn eds53(&mut self) -> EDS53_W { - EDS53_W::new(self) + pub fn eds53(&mut self) -> EDS53_W { + EDS53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfen0.rs b/crates/bcm2835-lpa/src/gpio/gpfen0.rs index abcf609..511158e 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfen0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `FEN0` reader - Falling edge enabled 0"] pub type FEN0_R = crate::BitReader; #[doc = "Field `FEN0` writer - Falling edge enabled 0"] -pub type FEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN1` reader - Falling edge enabled 1"] pub type FEN1_R = crate::BitReader; #[doc = "Field `FEN1` writer - Falling edge enabled 1"] -pub type FEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN2` reader - Falling edge enabled 2"] pub type FEN2_R = crate::BitReader; #[doc = "Field `FEN2` writer - Falling edge enabled 2"] -pub type FEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN3` reader - Falling edge enabled 3"] pub type FEN3_R = crate::BitReader; #[doc = "Field `FEN3` writer - Falling edge enabled 3"] -pub type FEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN4` reader - Falling edge enabled 4"] pub type FEN4_R = crate::BitReader; #[doc = "Field `FEN4` writer - Falling edge enabled 4"] -pub type FEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN5` reader - Falling edge enabled 5"] pub type FEN5_R = crate::BitReader; #[doc = "Field `FEN5` writer - Falling edge enabled 5"] -pub type FEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN6` reader - Falling edge enabled 6"] pub type FEN6_R = crate::BitReader; #[doc = "Field `FEN6` writer - Falling edge enabled 6"] -pub type FEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN7` reader - Falling edge enabled 7"] pub type FEN7_R = crate::BitReader; #[doc = "Field `FEN7` writer - Falling edge enabled 7"] -pub type FEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN8` reader - Falling edge enabled 8"] pub type FEN8_R = crate::BitReader; #[doc = "Field `FEN8` writer - Falling edge enabled 8"] -pub type FEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN9` reader - Falling edge enabled 9"] pub type FEN9_R = crate::BitReader; #[doc = "Field `FEN9` writer - Falling edge enabled 9"] -pub type FEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN10` reader - Falling edge enabled 10"] pub type FEN10_R = crate::BitReader; #[doc = "Field `FEN10` writer - Falling edge enabled 10"] -pub type FEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN11` reader - Falling edge enabled 11"] pub type FEN11_R = crate::BitReader; #[doc = "Field `FEN11` writer - Falling edge enabled 11"] -pub type FEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN12` reader - Falling edge enabled 12"] pub type FEN12_R = crate::BitReader; #[doc = "Field `FEN12` writer - Falling edge enabled 12"] -pub type FEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN13` reader - Falling edge enabled 13"] pub type FEN13_R = crate::BitReader; #[doc = "Field `FEN13` writer - Falling edge enabled 13"] -pub type FEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN14` reader - Falling edge enabled 14"] pub type FEN14_R = crate::BitReader; #[doc = "Field `FEN14` writer - Falling edge enabled 14"] -pub type FEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN15` reader - Falling edge enabled 15"] pub type FEN15_R = crate::BitReader; #[doc = "Field `FEN15` writer - Falling edge enabled 15"] -pub type FEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN16` reader - Falling edge enabled 16"] pub type FEN16_R = crate::BitReader; #[doc = "Field `FEN16` writer - Falling edge enabled 16"] -pub type FEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN17` reader - Falling edge enabled 17"] pub type FEN17_R = crate::BitReader; #[doc = "Field `FEN17` writer - Falling edge enabled 17"] -pub type FEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN18` reader - Falling edge enabled 18"] pub type FEN18_R = crate::BitReader; #[doc = "Field `FEN18` writer - Falling edge enabled 18"] -pub type FEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN19` reader - Falling edge enabled 19"] pub type FEN19_R = crate::BitReader; #[doc = "Field `FEN19` writer - Falling edge enabled 19"] -pub type FEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN20` reader - Falling edge enabled 20"] pub type FEN20_R = crate::BitReader; #[doc = "Field `FEN20` writer - Falling edge enabled 20"] -pub type FEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN21` reader - Falling edge enabled 21"] pub type FEN21_R = crate::BitReader; #[doc = "Field `FEN21` writer - Falling edge enabled 21"] -pub type FEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN22` reader - Falling edge enabled 22"] pub type FEN22_R = crate::BitReader; #[doc = "Field `FEN22` writer - Falling edge enabled 22"] -pub type FEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN23` reader - Falling edge enabled 23"] pub type FEN23_R = crate::BitReader; #[doc = "Field `FEN23` writer - Falling edge enabled 23"] -pub type FEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN24` reader - Falling edge enabled 24"] pub type FEN24_R = crate::BitReader; #[doc = "Field `FEN24` writer - Falling edge enabled 24"] -pub type FEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN25` reader - Falling edge enabled 25"] pub type FEN25_R = crate::BitReader; #[doc = "Field `FEN25` writer - Falling edge enabled 25"] -pub type FEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN26` reader - Falling edge enabled 26"] pub type FEN26_R = crate::BitReader; #[doc = "Field `FEN26` writer - Falling edge enabled 26"] -pub type FEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN27` reader - Falling edge enabled 27"] pub type FEN27_R = crate::BitReader; #[doc = "Field `FEN27` writer - Falling edge enabled 27"] -pub type FEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN28` reader - Falling edge enabled 28"] pub type FEN28_R = crate::BitReader; #[doc = "Field `FEN28` writer - Falling edge enabled 28"] -pub type FEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN29` reader - Falling edge enabled 29"] pub type FEN29_R = crate::BitReader; #[doc = "Field `FEN29` writer - Falling edge enabled 29"] -pub type FEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN30` reader - Falling edge enabled 30"] pub type FEN30_R = crate::BitReader; #[doc = "Field `FEN30` writer - Falling edge enabled 30"] -pub type FEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN31` reader - Falling edge enabled 31"] pub type FEN31_R = crate::BitReader; #[doc = "Field `FEN31` writer - Falling edge enabled 31"] -pub type FEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Falling edge enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Falling edge enabled 0"] #[inline(always)] #[must_use] - pub fn fen0(&mut self) -> FEN0_W { - FEN0_W::new(self) + pub fn fen0(&mut self) -> FEN0_W { + FEN0_W::new(self, 0) } #[doc = "Bit 1 - Falling edge enabled 1"] #[inline(always)] #[must_use] - pub fn fen1(&mut self) -> FEN1_W { - FEN1_W::new(self) + pub fn fen1(&mut self) -> FEN1_W { + FEN1_W::new(self, 1) } #[doc = "Bit 2 - Falling edge enabled 2"] #[inline(always)] #[must_use] - pub fn fen2(&mut self) -> FEN2_W { - FEN2_W::new(self) + pub fn fen2(&mut self) -> FEN2_W { + FEN2_W::new(self, 2) } #[doc = "Bit 3 - Falling edge enabled 3"] #[inline(always)] #[must_use] - pub fn fen3(&mut self) -> FEN3_W { - FEN3_W::new(self) + pub fn fen3(&mut self) -> FEN3_W { + FEN3_W::new(self, 3) } #[doc = "Bit 4 - Falling edge enabled 4"] #[inline(always)] #[must_use] - pub fn fen4(&mut self) -> FEN4_W { - FEN4_W::new(self) + pub fn fen4(&mut self) -> FEN4_W { + FEN4_W::new(self, 4) } #[doc = "Bit 5 - Falling edge enabled 5"] #[inline(always)] #[must_use] - pub fn fen5(&mut self) -> FEN5_W { - FEN5_W::new(self) + pub fn fen5(&mut self) -> FEN5_W { + FEN5_W::new(self, 5) } #[doc = "Bit 6 - Falling edge enabled 6"] #[inline(always)] #[must_use] - pub fn fen6(&mut self) -> FEN6_W { - FEN6_W::new(self) + pub fn fen6(&mut self) -> FEN6_W { + FEN6_W::new(self, 6) } #[doc = "Bit 7 - Falling edge enabled 7"] #[inline(always)] #[must_use] - pub fn fen7(&mut self) -> FEN7_W { - FEN7_W::new(self) + pub fn fen7(&mut self) -> FEN7_W { + FEN7_W::new(self, 7) } #[doc = "Bit 8 - Falling edge enabled 8"] #[inline(always)] #[must_use] - pub fn fen8(&mut self) -> FEN8_W { - FEN8_W::new(self) + pub fn fen8(&mut self) -> FEN8_W { + FEN8_W::new(self, 8) } #[doc = "Bit 9 - Falling edge enabled 9"] #[inline(always)] #[must_use] - pub fn fen9(&mut self) -> FEN9_W { - FEN9_W::new(self) + pub fn fen9(&mut self) -> FEN9_W { + FEN9_W::new(self, 9) } #[doc = "Bit 10 - Falling edge enabled 10"] #[inline(always)] #[must_use] - pub fn fen10(&mut self) -> FEN10_W { - FEN10_W::new(self) + pub fn fen10(&mut self) -> FEN10_W { + FEN10_W::new(self, 10) } #[doc = "Bit 11 - Falling edge enabled 11"] #[inline(always)] #[must_use] - pub fn fen11(&mut self) -> FEN11_W { - FEN11_W::new(self) + pub fn fen11(&mut self) -> FEN11_W { + FEN11_W::new(self, 11) } #[doc = "Bit 12 - Falling edge enabled 12"] #[inline(always)] #[must_use] - pub fn fen12(&mut self) -> FEN12_W { - FEN12_W::new(self) + pub fn fen12(&mut self) -> FEN12_W { + FEN12_W::new(self, 12) } #[doc = "Bit 13 - Falling edge enabled 13"] #[inline(always)] #[must_use] - pub fn fen13(&mut self) -> FEN13_W { - FEN13_W::new(self) + pub fn fen13(&mut self) -> FEN13_W { + FEN13_W::new(self, 13) } #[doc = "Bit 14 - Falling edge enabled 14"] #[inline(always)] #[must_use] - pub fn fen14(&mut self) -> FEN14_W { - FEN14_W::new(self) + pub fn fen14(&mut self) -> FEN14_W { + FEN14_W::new(self, 14) } #[doc = "Bit 15 - Falling edge enabled 15"] #[inline(always)] #[must_use] - pub fn fen15(&mut self) -> FEN15_W { - FEN15_W::new(self) + pub fn fen15(&mut self) -> FEN15_W { + FEN15_W::new(self, 15) } #[doc = "Bit 16 - Falling edge enabled 16"] #[inline(always)] #[must_use] - pub fn fen16(&mut self) -> FEN16_W { - FEN16_W::new(self) + pub fn fen16(&mut self) -> FEN16_W { + FEN16_W::new(self, 16) } #[doc = "Bit 17 - Falling edge enabled 17"] #[inline(always)] #[must_use] - pub fn fen17(&mut self) -> FEN17_W { - FEN17_W::new(self) + pub fn fen17(&mut self) -> FEN17_W { + FEN17_W::new(self, 17) } #[doc = "Bit 18 - Falling edge enabled 18"] #[inline(always)] #[must_use] - pub fn fen18(&mut self) -> FEN18_W { - FEN18_W::new(self) + pub fn fen18(&mut self) -> FEN18_W { + FEN18_W::new(self, 18) } #[doc = "Bit 19 - Falling edge enabled 19"] #[inline(always)] #[must_use] - pub fn fen19(&mut self) -> FEN19_W { - FEN19_W::new(self) + pub fn fen19(&mut self) -> FEN19_W { + FEN19_W::new(self, 19) } #[doc = "Bit 20 - Falling edge enabled 20"] #[inline(always)] #[must_use] - pub fn fen20(&mut self) -> FEN20_W { - FEN20_W::new(self) + pub fn fen20(&mut self) -> FEN20_W { + FEN20_W::new(self, 20) } #[doc = "Bit 21 - Falling edge enabled 21"] #[inline(always)] #[must_use] - pub fn fen21(&mut self) -> FEN21_W { - FEN21_W::new(self) + pub fn fen21(&mut self) -> FEN21_W { + FEN21_W::new(self, 21) } #[doc = "Bit 22 - Falling edge enabled 22"] #[inline(always)] #[must_use] - pub fn fen22(&mut self) -> FEN22_W { - FEN22_W::new(self) + pub fn fen22(&mut self) -> FEN22_W { + FEN22_W::new(self, 22) } #[doc = "Bit 23 - Falling edge enabled 23"] #[inline(always)] #[must_use] - pub fn fen23(&mut self) -> FEN23_W { - FEN23_W::new(self) + pub fn fen23(&mut self) -> FEN23_W { + FEN23_W::new(self, 23) } #[doc = "Bit 24 - Falling edge enabled 24"] #[inline(always)] #[must_use] - pub fn fen24(&mut self) -> FEN24_W { - FEN24_W::new(self) + pub fn fen24(&mut self) -> FEN24_W { + FEN24_W::new(self, 24) } #[doc = "Bit 25 - Falling edge enabled 25"] #[inline(always)] #[must_use] - pub fn fen25(&mut self) -> FEN25_W { - FEN25_W::new(self) + pub fn fen25(&mut self) -> FEN25_W { + FEN25_W::new(self, 25) } #[doc = "Bit 26 - Falling edge enabled 26"] #[inline(always)] #[must_use] - pub fn fen26(&mut self) -> FEN26_W { - FEN26_W::new(self) + pub fn fen26(&mut self) -> FEN26_W { + FEN26_W::new(self, 26) } #[doc = "Bit 27 - Falling edge enabled 27"] #[inline(always)] #[must_use] - pub fn fen27(&mut self) -> FEN27_W { - FEN27_W::new(self) + pub fn fen27(&mut self) -> FEN27_W { + FEN27_W::new(self, 27) } #[doc = "Bit 28 - Falling edge enabled 28"] #[inline(always)] #[must_use] - pub fn fen28(&mut self) -> FEN28_W { - FEN28_W::new(self) + pub fn fen28(&mut self) -> FEN28_W { + FEN28_W::new(self, 28) } #[doc = "Bit 29 - Falling edge enabled 29"] #[inline(always)] #[must_use] - pub fn fen29(&mut self) -> FEN29_W { - FEN29_W::new(self) + pub fn fen29(&mut self) -> FEN29_W { + FEN29_W::new(self, 29) } #[doc = "Bit 30 - Falling edge enabled 30"] #[inline(always)] #[must_use] - pub fn fen30(&mut self) -> FEN30_W { - FEN30_W::new(self) + pub fn fen30(&mut self) -> FEN30_W { + FEN30_W::new(self, 30) } #[doc = "Bit 31 - Falling edge enabled 31"] #[inline(always)] #[must_use] - pub fn fen31(&mut self) -> FEN31_W { - FEN31_W::new(self) + pub fn fen31(&mut self) -> FEN31_W { + FEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfen1.rs b/crates/bcm2835-lpa/src/gpio/gpfen1.rs index d0e94e8..285d880 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfen1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `FEN32` reader - Falling edge enabled 32"] pub type FEN32_R = crate::BitReader; #[doc = "Field `FEN32` writer - Falling edge enabled 32"] -pub type FEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN33` reader - Falling edge enabled 33"] pub type FEN33_R = crate::BitReader; #[doc = "Field `FEN33` writer - Falling edge enabled 33"] -pub type FEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN34` reader - Falling edge enabled 34"] pub type FEN34_R = crate::BitReader; #[doc = "Field `FEN34` writer - Falling edge enabled 34"] -pub type FEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN35` reader - Falling edge enabled 35"] pub type FEN35_R = crate::BitReader; #[doc = "Field `FEN35` writer - Falling edge enabled 35"] -pub type FEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN36` reader - Falling edge enabled 36"] pub type FEN36_R = crate::BitReader; #[doc = "Field `FEN36` writer - Falling edge enabled 36"] -pub type FEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN37` reader - Falling edge enabled 37"] pub type FEN37_R = crate::BitReader; #[doc = "Field `FEN37` writer - Falling edge enabled 37"] -pub type FEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN38` reader - Falling edge enabled 38"] pub type FEN38_R = crate::BitReader; #[doc = "Field `FEN38` writer - Falling edge enabled 38"] -pub type FEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN39` reader - Falling edge enabled 39"] pub type FEN39_R = crate::BitReader; #[doc = "Field `FEN39` writer - Falling edge enabled 39"] -pub type FEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN40` reader - Falling edge enabled 40"] pub type FEN40_R = crate::BitReader; #[doc = "Field `FEN40` writer - Falling edge enabled 40"] -pub type FEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN41` reader - Falling edge enabled 41"] pub type FEN41_R = crate::BitReader; #[doc = "Field `FEN41` writer - Falling edge enabled 41"] -pub type FEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN42` reader - Falling edge enabled 42"] pub type FEN42_R = crate::BitReader; #[doc = "Field `FEN42` writer - Falling edge enabled 42"] -pub type FEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN43` reader - Falling edge enabled 43"] pub type FEN43_R = crate::BitReader; #[doc = "Field `FEN43` writer - Falling edge enabled 43"] -pub type FEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN44` reader - Falling edge enabled 44"] pub type FEN44_R = crate::BitReader; #[doc = "Field `FEN44` writer - Falling edge enabled 44"] -pub type FEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN45` reader - Falling edge enabled 45"] pub type FEN45_R = crate::BitReader; #[doc = "Field `FEN45` writer - Falling edge enabled 45"] -pub type FEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN46` reader - Falling edge enabled 46"] pub type FEN46_R = crate::BitReader; #[doc = "Field `FEN46` writer - Falling edge enabled 46"] -pub type FEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN47` reader - Falling edge enabled 47"] pub type FEN47_R = crate::BitReader; #[doc = "Field `FEN47` writer - Falling edge enabled 47"] -pub type FEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN48` reader - Falling edge enabled 48"] pub type FEN48_R = crate::BitReader; #[doc = "Field `FEN48` writer - Falling edge enabled 48"] -pub type FEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN49` reader - Falling edge enabled 49"] pub type FEN49_R = crate::BitReader; #[doc = "Field `FEN49` writer - Falling edge enabled 49"] -pub type FEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN50` reader - Falling edge enabled 50"] pub type FEN50_R = crate::BitReader; #[doc = "Field `FEN50` writer - Falling edge enabled 50"] -pub type FEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN51` reader - Falling edge enabled 51"] pub type FEN51_R = crate::BitReader; #[doc = "Field `FEN51` writer - Falling edge enabled 51"] -pub type FEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN52` reader - Falling edge enabled 52"] pub type FEN52_R = crate::BitReader; #[doc = "Field `FEN52` writer - Falling edge enabled 52"] -pub type FEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN53` reader - Falling edge enabled 53"] pub type FEN53_R = crate::BitReader; #[doc = "Field `FEN53` writer - Falling edge enabled 53"] -pub type FEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Falling edge enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Falling edge enabled 32"] #[inline(always)] #[must_use] - pub fn fen32(&mut self) -> FEN32_W { - FEN32_W::new(self) + pub fn fen32(&mut self) -> FEN32_W { + FEN32_W::new(self, 0) } #[doc = "Bit 1 - Falling edge enabled 33"] #[inline(always)] #[must_use] - pub fn fen33(&mut self) -> FEN33_W { - FEN33_W::new(self) + pub fn fen33(&mut self) -> FEN33_W { + FEN33_W::new(self, 1) } #[doc = "Bit 2 - Falling edge enabled 34"] #[inline(always)] #[must_use] - pub fn fen34(&mut self) -> FEN34_W { - FEN34_W::new(self) + pub fn fen34(&mut self) -> FEN34_W { + FEN34_W::new(self, 2) } #[doc = "Bit 3 - Falling edge enabled 35"] #[inline(always)] #[must_use] - pub fn fen35(&mut self) -> FEN35_W { - FEN35_W::new(self) + pub fn fen35(&mut self) -> FEN35_W { + FEN35_W::new(self, 3) } #[doc = "Bit 4 - Falling edge enabled 36"] #[inline(always)] #[must_use] - pub fn fen36(&mut self) -> FEN36_W { - FEN36_W::new(self) + pub fn fen36(&mut self) -> FEN36_W { + FEN36_W::new(self, 4) } #[doc = "Bit 5 - Falling edge enabled 37"] #[inline(always)] #[must_use] - pub fn fen37(&mut self) -> FEN37_W { - FEN37_W::new(self) + pub fn fen37(&mut self) -> FEN37_W { + FEN37_W::new(self, 5) } #[doc = "Bit 6 - Falling edge enabled 38"] #[inline(always)] #[must_use] - pub fn fen38(&mut self) -> FEN38_W { - FEN38_W::new(self) + pub fn fen38(&mut self) -> FEN38_W { + FEN38_W::new(self, 6) } #[doc = "Bit 7 - Falling edge enabled 39"] #[inline(always)] #[must_use] - pub fn fen39(&mut self) -> FEN39_W { - FEN39_W::new(self) + pub fn fen39(&mut self) -> FEN39_W { + FEN39_W::new(self, 7) } #[doc = "Bit 8 - Falling edge enabled 40"] #[inline(always)] #[must_use] - pub fn fen40(&mut self) -> FEN40_W { - FEN40_W::new(self) + pub fn fen40(&mut self) -> FEN40_W { + FEN40_W::new(self, 8) } #[doc = "Bit 9 - Falling edge enabled 41"] #[inline(always)] #[must_use] - pub fn fen41(&mut self) -> FEN41_W { - FEN41_W::new(self) + pub fn fen41(&mut self) -> FEN41_W { + FEN41_W::new(self, 9) } #[doc = "Bit 10 - Falling edge enabled 42"] #[inline(always)] #[must_use] - pub fn fen42(&mut self) -> FEN42_W { - FEN42_W::new(self) + pub fn fen42(&mut self) -> FEN42_W { + FEN42_W::new(self, 10) } #[doc = "Bit 11 - Falling edge enabled 43"] #[inline(always)] #[must_use] - pub fn fen43(&mut self) -> FEN43_W { - FEN43_W::new(self) + pub fn fen43(&mut self) -> FEN43_W { + FEN43_W::new(self, 11) } #[doc = "Bit 12 - Falling edge enabled 44"] #[inline(always)] #[must_use] - pub fn fen44(&mut self) -> FEN44_W { - FEN44_W::new(self) + pub fn fen44(&mut self) -> FEN44_W { + FEN44_W::new(self, 12) } #[doc = "Bit 13 - Falling edge enabled 45"] #[inline(always)] #[must_use] - pub fn fen45(&mut self) -> FEN45_W { - FEN45_W::new(self) + pub fn fen45(&mut self) -> FEN45_W { + FEN45_W::new(self, 13) } #[doc = "Bit 14 - Falling edge enabled 46"] #[inline(always)] #[must_use] - pub fn fen46(&mut self) -> FEN46_W { - FEN46_W::new(self) + pub fn fen46(&mut self) -> FEN46_W { + FEN46_W::new(self, 14) } #[doc = "Bit 15 - Falling edge enabled 47"] #[inline(always)] #[must_use] - pub fn fen47(&mut self) -> FEN47_W { - FEN47_W::new(self) + pub fn fen47(&mut self) -> FEN47_W { + FEN47_W::new(self, 15) } #[doc = "Bit 16 - Falling edge enabled 48"] #[inline(always)] #[must_use] - pub fn fen48(&mut self) -> FEN48_W { - FEN48_W::new(self) + pub fn fen48(&mut self) -> FEN48_W { + FEN48_W::new(self, 16) } #[doc = "Bit 17 - Falling edge enabled 49"] #[inline(always)] #[must_use] - pub fn fen49(&mut self) -> FEN49_W { - FEN49_W::new(self) + pub fn fen49(&mut self) -> FEN49_W { + FEN49_W::new(self, 17) } #[doc = "Bit 18 - Falling edge enabled 50"] #[inline(always)] #[must_use] - pub fn fen50(&mut self) -> FEN50_W { - FEN50_W::new(self) + pub fn fen50(&mut self) -> FEN50_W { + FEN50_W::new(self, 18) } #[doc = "Bit 19 - Falling edge enabled 51"] #[inline(always)] #[must_use] - pub fn fen51(&mut self) -> FEN51_W { - FEN51_W::new(self) + pub fn fen51(&mut self) -> FEN51_W { + FEN51_W::new(self, 19) } #[doc = "Bit 20 - Falling edge enabled 52"] #[inline(always)] #[must_use] - pub fn fen52(&mut self) -> FEN52_W { - FEN52_W::new(self) + pub fn fen52(&mut self) -> FEN52_W { + FEN52_W::new(self, 20) } #[doc = "Bit 21 - Falling edge enabled 53"] #[inline(always)] #[must_use] - pub fn fen53(&mut self) -> FEN53_W { - FEN53_W::new(self) + pub fn fen53(&mut self) -> FEN53_W { + FEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfsel0.rs b/crates/bcm2835-lpa/src/gpio/gpfsel0.rs index dcdf15a..1fe49c7 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfsel0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfsel0.rs @@ -92,8 +92,8 @@ impl FSEL0_R { } } #[doc = "Field `FSEL0` writer - Function Select 0"] -pub type FSEL0_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL0_A>; -impl<'a, REG, const O: u8> FSEL0_W<'a, REG, O> +pub type FSEL0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL0_A>; +impl<'a, REG> FSEL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL1_R { } } #[doc = "Field `FSEL1` writer - Function Select 1"] -pub type FSEL1_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL1_A>; -impl<'a, REG, const O: u8> FSEL1_W<'a, REG, O> +pub type FSEL1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL1_A>; +impl<'a, REG> FSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL2_R { } } #[doc = "Field `FSEL2` writer - Function Select 2"] -pub type FSEL2_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL2_A>; -impl<'a, REG, const O: u8> FSEL2_W<'a, REG, O> +pub type FSEL2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL2_A>; +impl<'a, REG> FSEL2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL3_R { } } #[doc = "Field `FSEL3` writer - Function Select 3"] -pub type FSEL3_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL3_A>; -impl<'a, REG, const O: u8> FSEL3_W<'a, REG, O> +pub type FSEL3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL3_A>; +impl<'a, REG> FSEL3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL4_R { } } #[doc = "Field `FSEL4` writer - Function Select 4"] -pub type FSEL4_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL4_A>; -impl<'a, REG, const O: u8> FSEL4_W<'a, REG, O> +pub type FSEL4_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL4_A>; +impl<'a, REG> FSEL4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL5_R { } } #[doc = "Field `FSEL5` writer - Function Select 5"] -pub type FSEL5_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL5_A>; -impl<'a, REG, const O: u8> FSEL5_W<'a, REG, O> +pub type FSEL5_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL5_A>; +impl<'a, REG> FSEL5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL6_R { } } #[doc = "Field `FSEL6` writer - Function Select 6"] -pub type FSEL6_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL6_A>; -impl<'a, REG, const O: u8> FSEL6_W<'a, REG, O> +pub type FSEL6_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL6_A>; +impl<'a, REG> FSEL6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL7_R { } } #[doc = "Field `FSEL7` writer - Function Select 7"] -pub type FSEL7_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL7_A>; -impl<'a, REG, const O: u8> FSEL7_W<'a, REG, O> +pub type FSEL7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL7_A>; +impl<'a, REG> FSEL7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL8_R { } } #[doc = "Field `FSEL8` writer - Function Select 8"] -pub type FSEL8_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL8_A>; -impl<'a, REG, const O: u8> FSEL8_W<'a, REG, O> +pub type FSEL8_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL8_A>; +impl<'a, REG> FSEL8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL9_R { } } #[doc = "Field `FSEL9` writer - Function Select 9"] -pub type FSEL9_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL9_A>; -impl<'a, REG, const O: u8> FSEL9_W<'a, REG, O> +pub type FSEL9_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL9_A>; +impl<'a, REG> FSEL9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 0"] #[inline(always)] #[must_use] - pub fn fsel0(&mut self) -> FSEL0_W { - FSEL0_W::new(self) + pub fn fsel0(&mut self) -> FSEL0_W { + FSEL0_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 1"] #[inline(always)] #[must_use] - pub fn fsel1(&mut self) -> FSEL1_W { - FSEL1_W::new(self) + pub fn fsel1(&mut self) -> FSEL1_W { + FSEL1_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 2"] #[inline(always)] #[must_use] - pub fn fsel2(&mut self) -> FSEL2_W { - FSEL2_W::new(self) + pub fn fsel2(&mut self) -> FSEL2_W { + FSEL2_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 3"] #[inline(always)] #[must_use] - pub fn fsel3(&mut self) -> FSEL3_W { - FSEL3_W::new(self) + pub fn fsel3(&mut self) -> FSEL3_W { + FSEL3_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 4"] #[inline(always)] #[must_use] - pub fn fsel4(&mut self) -> FSEL4_W { - FSEL4_W::new(self) + pub fn fsel4(&mut self) -> FSEL4_W { + FSEL4_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 5"] #[inline(always)] #[must_use] - pub fn fsel5(&mut self) -> FSEL5_W { - FSEL5_W::new(self) + pub fn fsel5(&mut self) -> FSEL5_W { + FSEL5_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 6"] #[inline(always)] #[must_use] - pub fn fsel6(&mut self) -> FSEL6_W { - FSEL6_W::new(self) + pub fn fsel6(&mut self) -> FSEL6_W { + FSEL6_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 7"] #[inline(always)] #[must_use] - pub fn fsel7(&mut self) -> FSEL7_W { - FSEL7_W::new(self) + pub fn fsel7(&mut self) -> FSEL7_W { + FSEL7_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 8"] #[inline(always)] #[must_use] - pub fn fsel8(&mut self) -> FSEL8_W { - FSEL8_W::new(self) + pub fn fsel8(&mut self) -> FSEL8_W { + FSEL8_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 9"] #[inline(always)] #[must_use] - pub fn fsel9(&mut self) -> FSEL9_W { - FSEL9_W::new(self) + pub fn fsel9(&mut self) -> FSEL9_W { + FSEL9_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfsel1.rs b/crates/bcm2835-lpa/src/gpio/gpfsel1.rs index acb33a1..028c9cf 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfsel1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfsel1.rs @@ -92,8 +92,8 @@ impl FSEL10_R { } } #[doc = "Field `FSEL10` writer - Function Select 10"] -pub type FSEL10_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL10_A>; -impl<'a, REG, const O: u8> FSEL10_W<'a, REG, O> +pub type FSEL10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL10_A>; +impl<'a, REG> FSEL10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL11_R { } } #[doc = "Field `FSEL11` writer - Function Select 11"] -pub type FSEL11_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL11_A>; -impl<'a, REG, const O: u8> FSEL11_W<'a, REG, O> +pub type FSEL11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL11_A>; +impl<'a, REG> FSEL11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL12_R { } } #[doc = "Field `FSEL12` writer - Function Select 12"] -pub type FSEL12_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL12_A>; -impl<'a, REG, const O: u8> FSEL12_W<'a, REG, O> +pub type FSEL12_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL12_A>; +impl<'a, REG> FSEL12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL13_R { } } #[doc = "Field `FSEL13` writer - Function Select 13"] -pub type FSEL13_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL13_A>; -impl<'a, REG, const O: u8> FSEL13_W<'a, REG, O> +pub type FSEL13_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL13_A>; +impl<'a, REG> FSEL13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL14_R { } } #[doc = "Field `FSEL14` writer - Function Select 14"] -pub type FSEL14_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL14_A>; -impl<'a, REG, const O: u8> FSEL14_W<'a, REG, O> +pub type FSEL14_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL14_A>; +impl<'a, REG> FSEL14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL15_R { } } #[doc = "Field `FSEL15` writer - Function Select 15"] -pub type FSEL15_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL15_A>; -impl<'a, REG, const O: u8> FSEL15_W<'a, REG, O> +pub type FSEL15_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL15_A>; +impl<'a, REG> FSEL15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL16_R { } } #[doc = "Field `FSEL16` writer - Function Select 16"] -pub type FSEL16_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL16_A>; -impl<'a, REG, const O: u8> FSEL16_W<'a, REG, O> +pub type FSEL16_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL16_A>; +impl<'a, REG> FSEL16_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL17_R { } } #[doc = "Field `FSEL17` writer - Function Select 17"] -pub type FSEL17_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL17_A>; -impl<'a, REG, const O: u8> FSEL17_W<'a, REG, O> +pub type FSEL17_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL17_A>; +impl<'a, REG> FSEL17_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL18_R { } } #[doc = "Field `FSEL18` writer - Function Select 18"] -pub type FSEL18_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL18_A>; -impl<'a, REG, const O: u8> FSEL18_W<'a, REG, O> +pub type FSEL18_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL18_A>; +impl<'a, REG> FSEL18_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL19_R { } } #[doc = "Field `FSEL19` writer - Function Select 19"] -pub type FSEL19_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL19_A>; -impl<'a, REG, const O: u8> FSEL19_W<'a, REG, O> +pub type FSEL19_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL19_A>; +impl<'a, REG> FSEL19_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 10"] #[inline(always)] #[must_use] - pub fn fsel10(&mut self) -> FSEL10_W { - FSEL10_W::new(self) + pub fn fsel10(&mut self) -> FSEL10_W { + FSEL10_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 11"] #[inline(always)] #[must_use] - pub fn fsel11(&mut self) -> FSEL11_W { - FSEL11_W::new(self) + pub fn fsel11(&mut self) -> FSEL11_W { + FSEL11_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 12"] #[inline(always)] #[must_use] - pub fn fsel12(&mut self) -> FSEL12_W { - FSEL12_W::new(self) + pub fn fsel12(&mut self) -> FSEL12_W { + FSEL12_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 13"] #[inline(always)] #[must_use] - pub fn fsel13(&mut self) -> FSEL13_W { - FSEL13_W::new(self) + pub fn fsel13(&mut self) -> FSEL13_W { + FSEL13_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 14"] #[inline(always)] #[must_use] - pub fn fsel14(&mut self) -> FSEL14_W { - FSEL14_W::new(self) + pub fn fsel14(&mut self) -> FSEL14_W { + FSEL14_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 15"] #[inline(always)] #[must_use] - pub fn fsel15(&mut self) -> FSEL15_W { - FSEL15_W::new(self) + pub fn fsel15(&mut self) -> FSEL15_W { + FSEL15_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 16"] #[inline(always)] #[must_use] - pub fn fsel16(&mut self) -> FSEL16_W { - FSEL16_W::new(self) + pub fn fsel16(&mut self) -> FSEL16_W { + FSEL16_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 17"] #[inline(always)] #[must_use] - pub fn fsel17(&mut self) -> FSEL17_W { - FSEL17_W::new(self) + pub fn fsel17(&mut self) -> FSEL17_W { + FSEL17_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 18"] #[inline(always)] #[must_use] - pub fn fsel18(&mut self) -> FSEL18_W { - FSEL18_W::new(self) + pub fn fsel18(&mut self) -> FSEL18_W { + FSEL18_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 19"] #[inline(always)] #[must_use] - pub fn fsel19(&mut self) -> FSEL19_W { - FSEL19_W::new(self) + pub fn fsel19(&mut self) -> FSEL19_W { + FSEL19_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfsel2.rs b/crates/bcm2835-lpa/src/gpio/gpfsel2.rs index 5704f8e..cf09bee 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfsel2.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfsel2.rs @@ -92,8 +92,8 @@ impl FSEL20_R { } } #[doc = "Field `FSEL20` writer - Function Select 20"] -pub type FSEL20_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL20_A>; -impl<'a, REG, const O: u8> FSEL20_W<'a, REG, O> +pub type FSEL20_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL20_A>; +impl<'a, REG> FSEL20_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL21_R { } } #[doc = "Field `FSEL21` writer - Function Select 21"] -pub type FSEL21_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL21_A>; -impl<'a, REG, const O: u8> FSEL21_W<'a, REG, O> +pub type FSEL21_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL21_A>; +impl<'a, REG> FSEL21_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL22_R { } } #[doc = "Field `FSEL22` writer - Function Select 22"] -pub type FSEL22_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL22_A>; -impl<'a, REG, const O: u8> FSEL22_W<'a, REG, O> +pub type FSEL22_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL22_A>; +impl<'a, REG> FSEL22_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL23_R { } } #[doc = "Field `FSEL23` writer - Function Select 23"] -pub type FSEL23_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL23_A>; -impl<'a, REG, const O: u8> FSEL23_W<'a, REG, O> +pub type FSEL23_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL23_A>; +impl<'a, REG> FSEL23_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL24_R { } } #[doc = "Field `FSEL24` writer - Function Select 24"] -pub type FSEL24_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL24_A>; -impl<'a, REG, const O: u8> FSEL24_W<'a, REG, O> +pub type FSEL24_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL24_A>; +impl<'a, REG> FSEL24_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL25_R { } } #[doc = "Field `FSEL25` writer - Function Select 25"] -pub type FSEL25_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL25_A>; -impl<'a, REG, const O: u8> FSEL25_W<'a, REG, O> +pub type FSEL25_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL25_A>; +impl<'a, REG> FSEL25_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL26_R { } } #[doc = "Field `FSEL26` writer - Function Select 26"] -pub type FSEL26_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL26_A>; -impl<'a, REG, const O: u8> FSEL26_W<'a, REG, O> +pub type FSEL26_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL26_A>; +impl<'a, REG> FSEL26_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL27_R { } } #[doc = "Field `FSEL27` writer - Function Select 27"] -pub type FSEL27_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL27_A>; -impl<'a, REG, const O: u8> FSEL27_W<'a, REG, O> +pub type FSEL27_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL27_A>; +impl<'a, REG> FSEL27_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL28_R { } } #[doc = "Field `FSEL28` writer - Function Select 28"] -pub type FSEL28_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL28_A>; -impl<'a, REG, const O: u8> FSEL28_W<'a, REG, O> +pub type FSEL28_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL28_A>; +impl<'a, REG> FSEL28_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL29_R { } } #[doc = "Field `FSEL29` writer - Function Select 29"] -pub type FSEL29_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL29_A>; -impl<'a, REG, const O: u8> FSEL29_W<'a, REG, O> +pub type FSEL29_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL29_A>; +impl<'a, REG> FSEL29_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 20"] #[inline(always)] #[must_use] - pub fn fsel20(&mut self) -> FSEL20_W { - FSEL20_W::new(self) + pub fn fsel20(&mut self) -> FSEL20_W { + FSEL20_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 21"] #[inline(always)] #[must_use] - pub fn fsel21(&mut self) -> FSEL21_W { - FSEL21_W::new(self) + pub fn fsel21(&mut self) -> FSEL21_W { + FSEL21_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 22"] #[inline(always)] #[must_use] - pub fn fsel22(&mut self) -> FSEL22_W { - FSEL22_W::new(self) + pub fn fsel22(&mut self) -> FSEL22_W { + FSEL22_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 23"] #[inline(always)] #[must_use] - pub fn fsel23(&mut self) -> FSEL23_W { - FSEL23_W::new(self) + pub fn fsel23(&mut self) -> FSEL23_W { + FSEL23_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 24"] #[inline(always)] #[must_use] - pub fn fsel24(&mut self) -> FSEL24_W { - FSEL24_W::new(self) + pub fn fsel24(&mut self) -> FSEL24_W { + FSEL24_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 25"] #[inline(always)] #[must_use] - pub fn fsel25(&mut self) -> FSEL25_W { - FSEL25_W::new(self) + pub fn fsel25(&mut self) -> FSEL25_W { + FSEL25_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 26"] #[inline(always)] #[must_use] - pub fn fsel26(&mut self) -> FSEL26_W { - FSEL26_W::new(self) + pub fn fsel26(&mut self) -> FSEL26_W { + FSEL26_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 27"] #[inline(always)] #[must_use] - pub fn fsel27(&mut self) -> FSEL27_W { - FSEL27_W::new(self) + pub fn fsel27(&mut self) -> FSEL27_W { + FSEL27_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 28"] #[inline(always)] #[must_use] - pub fn fsel28(&mut self) -> FSEL28_W { - FSEL28_W::new(self) + pub fn fsel28(&mut self) -> FSEL28_W { + FSEL28_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 29"] #[inline(always)] #[must_use] - pub fn fsel29(&mut self) -> FSEL29_W { - FSEL29_W::new(self) + pub fn fsel29(&mut self) -> FSEL29_W { + FSEL29_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfsel3.rs b/crates/bcm2835-lpa/src/gpio/gpfsel3.rs index ce2ef3a..a9fc0c7 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfsel3.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfsel3.rs @@ -92,8 +92,8 @@ impl FSEL30_R { } } #[doc = "Field `FSEL30` writer - Function Select 30"] -pub type FSEL30_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL30_A>; -impl<'a, REG, const O: u8> FSEL30_W<'a, REG, O> +pub type FSEL30_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL30_A>; +impl<'a, REG> FSEL30_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL31_R { } } #[doc = "Field `FSEL31` writer - Function Select 31"] -pub type FSEL31_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL31_A>; -impl<'a, REG, const O: u8> FSEL31_W<'a, REG, O> +pub type FSEL31_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL31_A>; +impl<'a, REG> FSEL31_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL32_R { } } #[doc = "Field `FSEL32` writer - Function Select 32"] -pub type FSEL32_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL32_A>; -impl<'a, REG, const O: u8> FSEL32_W<'a, REG, O> +pub type FSEL32_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL32_A>; +impl<'a, REG> FSEL32_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL33_R { } } #[doc = "Field `FSEL33` writer - Function Select 33"] -pub type FSEL33_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL33_A>; -impl<'a, REG, const O: u8> FSEL33_W<'a, REG, O> +pub type FSEL33_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL33_A>; +impl<'a, REG> FSEL33_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL34_R { } } #[doc = "Field `FSEL34` writer - Function Select 34"] -pub type FSEL34_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL34_A>; -impl<'a, REG, const O: u8> FSEL34_W<'a, REG, O> +pub type FSEL34_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL34_A>; +impl<'a, REG> FSEL34_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL35_R { } } #[doc = "Field `FSEL35` writer - Function Select 35"] -pub type FSEL35_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL35_A>; -impl<'a, REG, const O: u8> FSEL35_W<'a, REG, O> +pub type FSEL35_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL35_A>; +impl<'a, REG> FSEL35_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL36_R { } } #[doc = "Field `FSEL36` writer - Function Select 36"] -pub type FSEL36_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL36_A>; -impl<'a, REG, const O: u8> FSEL36_W<'a, REG, O> +pub type FSEL36_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL36_A>; +impl<'a, REG> FSEL36_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL37_R { } } #[doc = "Field `FSEL37` writer - Function Select 37"] -pub type FSEL37_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL37_A>; -impl<'a, REG, const O: u8> FSEL37_W<'a, REG, O> +pub type FSEL37_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL37_A>; +impl<'a, REG> FSEL37_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL38_R { } } #[doc = "Field `FSEL38` writer - Function Select 38"] -pub type FSEL38_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL38_A>; -impl<'a, REG, const O: u8> FSEL38_W<'a, REG, O> +pub type FSEL38_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL38_A>; +impl<'a, REG> FSEL38_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL39_R { } } #[doc = "Field `FSEL39` writer - Function Select 39"] -pub type FSEL39_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL39_A>; -impl<'a, REG, const O: u8> FSEL39_W<'a, REG, O> +pub type FSEL39_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL39_A>; +impl<'a, REG> FSEL39_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 30"] #[inline(always)] #[must_use] - pub fn fsel30(&mut self) -> FSEL30_W { - FSEL30_W::new(self) + pub fn fsel30(&mut self) -> FSEL30_W { + FSEL30_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 31"] #[inline(always)] #[must_use] - pub fn fsel31(&mut self) -> FSEL31_W { - FSEL31_W::new(self) + pub fn fsel31(&mut self) -> FSEL31_W { + FSEL31_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 32"] #[inline(always)] #[must_use] - pub fn fsel32(&mut self) -> FSEL32_W { - FSEL32_W::new(self) + pub fn fsel32(&mut self) -> FSEL32_W { + FSEL32_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 33"] #[inline(always)] #[must_use] - pub fn fsel33(&mut self) -> FSEL33_W { - FSEL33_W::new(self) + pub fn fsel33(&mut self) -> FSEL33_W { + FSEL33_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 34"] #[inline(always)] #[must_use] - pub fn fsel34(&mut self) -> FSEL34_W { - FSEL34_W::new(self) + pub fn fsel34(&mut self) -> FSEL34_W { + FSEL34_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 35"] #[inline(always)] #[must_use] - pub fn fsel35(&mut self) -> FSEL35_W { - FSEL35_W::new(self) + pub fn fsel35(&mut self) -> FSEL35_W { + FSEL35_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 36"] #[inline(always)] #[must_use] - pub fn fsel36(&mut self) -> FSEL36_W { - FSEL36_W::new(self) + pub fn fsel36(&mut self) -> FSEL36_W { + FSEL36_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 37"] #[inline(always)] #[must_use] - pub fn fsel37(&mut self) -> FSEL37_W { - FSEL37_W::new(self) + pub fn fsel37(&mut self) -> FSEL37_W { + FSEL37_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 38"] #[inline(always)] #[must_use] - pub fn fsel38(&mut self) -> FSEL38_W { - FSEL38_W::new(self) + pub fn fsel38(&mut self) -> FSEL38_W { + FSEL38_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 39"] #[inline(always)] #[must_use] - pub fn fsel39(&mut self) -> FSEL39_W { - FSEL39_W::new(self) + pub fn fsel39(&mut self) -> FSEL39_W { + FSEL39_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfsel4.rs b/crates/bcm2835-lpa/src/gpio/gpfsel4.rs index 50a568f..b5dc959 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfsel4.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfsel4.rs @@ -92,8 +92,8 @@ impl FSEL40_R { } } #[doc = "Field `FSEL40` writer - Function Select 40"] -pub type FSEL40_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL40_A>; -impl<'a, REG, const O: u8> FSEL40_W<'a, REG, O> +pub type FSEL40_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL40_A>; +impl<'a, REG> FSEL40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL41_R { } } #[doc = "Field `FSEL41` writer - Function Select 41"] -pub type FSEL41_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL41_A>; -impl<'a, REG, const O: u8> FSEL41_W<'a, REG, O> +pub type FSEL41_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL41_A>; +impl<'a, REG> FSEL41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL42_R { } } #[doc = "Field `FSEL42` writer - Function Select 42"] -pub type FSEL42_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL42_A>; -impl<'a, REG, const O: u8> FSEL42_W<'a, REG, O> +pub type FSEL42_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL42_A>; +impl<'a, REG> FSEL42_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL43_R { } } #[doc = "Field `FSEL43` writer - Function Select 43"] -pub type FSEL43_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL43_A>; -impl<'a, REG, const O: u8> FSEL43_W<'a, REG, O> +pub type FSEL43_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL43_A>; +impl<'a, REG> FSEL43_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL44_R { } } #[doc = "Field `FSEL44` writer - Function Select 44"] -pub type FSEL44_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL44_A>; -impl<'a, REG, const O: u8> FSEL44_W<'a, REG, O> +pub type FSEL44_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL44_A>; +impl<'a, REG> FSEL44_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL45_R { } } #[doc = "Field `FSEL45` writer - Function Select 45"] -pub type FSEL45_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL45_A>; -impl<'a, REG, const O: u8> FSEL45_W<'a, REG, O> +pub type FSEL45_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL45_A>; +impl<'a, REG> FSEL45_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL46_R { } } #[doc = "Field `FSEL46` writer - Function Select 46"] -pub type FSEL46_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL46_A>; -impl<'a, REG, const O: u8> FSEL46_W<'a, REG, O> +pub type FSEL46_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL46_A>; +impl<'a, REG> FSEL46_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL47_R { } } #[doc = "Field `FSEL47` writer - Function Select 47"] -pub type FSEL47_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL47_A>; -impl<'a, REG, const O: u8> FSEL47_W<'a, REG, O> +pub type FSEL47_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL47_A>; +impl<'a, REG> FSEL47_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL48_R { } } #[doc = "Field `FSEL48` writer - Function Select 48"] -pub type FSEL48_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL48_A>; -impl<'a, REG, const O: u8> FSEL48_W<'a, REG, O> +pub type FSEL48_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL48_A>; +impl<'a, REG> FSEL48_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL49_R { } } #[doc = "Field `FSEL49` writer - Function Select 49"] -pub type FSEL49_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL49_A>; -impl<'a, REG, const O: u8> FSEL49_W<'a, REG, O> +pub type FSEL49_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL49_A>; +impl<'a, REG> FSEL49_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 40"] #[inline(always)] #[must_use] - pub fn fsel40(&mut self) -> FSEL40_W { - FSEL40_W::new(self) + pub fn fsel40(&mut self) -> FSEL40_W { + FSEL40_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 41"] #[inline(always)] #[must_use] - pub fn fsel41(&mut self) -> FSEL41_W { - FSEL41_W::new(self) + pub fn fsel41(&mut self) -> FSEL41_W { + FSEL41_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 42"] #[inline(always)] #[must_use] - pub fn fsel42(&mut self) -> FSEL42_W { - FSEL42_W::new(self) + pub fn fsel42(&mut self) -> FSEL42_W { + FSEL42_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 43"] #[inline(always)] #[must_use] - pub fn fsel43(&mut self) -> FSEL43_W { - FSEL43_W::new(self) + pub fn fsel43(&mut self) -> FSEL43_W { + FSEL43_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 44"] #[inline(always)] #[must_use] - pub fn fsel44(&mut self) -> FSEL44_W { - FSEL44_W::new(self) + pub fn fsel44(&mut self) -> FSEL44_W { + FSEL44_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 45"] #[inline(always)] #[must_use] - pub fn fsel45(&mut self) -> FSEL45_W { - FSEL45_W::new(self) + pub fn fsel45(&mut self) -> FSEL45_W { + FSEL45_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 46"] #[inline(always)] #[must_use] - pub fn fsel46(&mut self) -> FSEL46_W { - FSEL46_W::new(self) + pub fn fsel46(&mut self) -> FSEL46_W { + FSEL46_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 47"] #[inline(always)] #[must_use] - pub fn fsel47(&mut self) -> FSEL47_W { - FSEL47_W::new(self) + pub fn fsel47(&mut self) -> FSEL47_W { + FSEL47_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 48"] #[inline(always)] #[must_use] - pub fn fsel48(&mut self) -> FSEL48_W { - FSEL48_W::new(self) + pub fn fsel48(&mut self) -> FSEL48_W { + FSEL48_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 49"] #[inline(always)] #[must_use] - pub fn fsel49(&mut self) -> FSEL49_W { - FSEL49_W::new(self) + pub fn fsel49(&mut self) -> FSEL49_W { + FSEL49_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpfsel5.rs b/crates/bcm2835-lpa/src/gpio/gpfsel5.rs index bb2d446..e78258c 100644 --- a/crates/bcm2835-lpa/src/gpio/gpfsel5.rs +++ b/crates/bcm2835-lpa/src/gpio/gpfsel5.rs @@ -92,8 +92,8 @@ impl FSEL50_R { } } #[doc = "Field `FSEL50` writer - Function Select 50"] -pub type FSEL50_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL50_A>; -impl<'a, REG, const O: u8> FSEL50_W<'a, REG, O> +pub type FSEL50_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL50_A>; +impl<'a, REG> FSEL50_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL51_R { } } #[doc = "Field `FSEL51` writer - Function Select 51"] -pub type FSEL51_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL51_A>; -impl<'a, REG, const O: u8> FSEL51_W<'a, REG, O> +pub type FSEL51_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL51_A>; +impl<'a, REG> FSEL51_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL52_R { } } #[doc = "Field `FSEL52` writer - Function Select 52"] -pub type FSEL52_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL52_A>; -impl<'a, REG, const O: u8> FSEL52_W<'a, REG, O> +pub type FSEL52_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL52_A>; +impl<'a, REG> FSEL52_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL53_R { } } #[doc = "Field `FSEL53` writer - Function Select 53"] -pub type FSEL53_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL53_A>; -impl<'a, REG, const O: u8> FSEL53_W<'a, REG, O> +pub type FSEL53_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL53_A>; +impl<'a, REG> FSEL53_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -584,33 +584,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 50"] #[inline(always)] #[must_use] - pub fn fsel50(&mut self) -> FSEL50_W { - FSEL50_W::new(self) + pub fn fsel50(&mut self) -> FSEL50_W { + FSEL50_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 51"] #[inline(always)] #[must_use] - pub fn fsel51(&mut self) -> FSEL51_W { - FSEL51_W::new(self) + pub fn fsel51(&mut self) -> FSEL51_W { + FSEL51_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 52"] #[inline(always)] #[must_use] - pub fn fsel52(&mut self) -> FSEL52_W { - FSEL52_W::new(self) + pub fn fsel52(&mut self) -> FSEL52_W { + FSEL52_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 53"] #[inline(always)] #[must_use] - pub fn fsel53(&mut self) -> FSEL53_W { - FSEL53_W::new(self) + pub fn fsel53(&mut self) -> FSEL53_W { + FSEL53_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gphen0.rs b/crates/bcm2835-lpa/src/gpio/gphen0.rs index d788bbf..f8a30dc 100644 --- a/crates/bcm2835-lpa/src/gpio/gphen0.rs +++ b/crates/bcm2835-lpa/src/gpio/gphen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HEN0` reader - High detect enabled 0"] pub type HEN0_R = crate::BitReader; #[doc = "Field `HEN0` writer - High detect enabled 0"] -pub type HEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN1` reader - High detect enabled 1"] pub type HEN1_R = crate::BitReader; #[doc = "Field `HEN1` writer - High detect enabled 1"] -pub type HEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN2` reader - High detect enabled 2"] pub type HEN2_R = crate::BitReader; #[doc = "Field `HEN2` writer - High detect enabled 2"] -pub type HEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN3` reader - High detect enabled 3"] pub type HEN3_R = crate::BitReader; #[doc = "Field `HEN3` writer - High detect enabled 3"] -pub type HEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN4` reader - High detect enabled 4"] pub type HEN4_R = crate::BitReader; #[doc = "Field `HEN4` writer - High detect enabled 4"] -pub type HEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN5` reader - High detect enabled 5"] pub type HEN5_R = crate::BitReader; #[doc = "Field `HEN5` writer - High detect enabled 5"] -pub type HEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN6` reader - High detect enabled 6"] pub type HEN6_R = crate::BitReader; #[doc = "Field `HEN6` writer - High detect enabled 6"] -pub type HEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN7` reader - High detect enabled 7"] pub type HEN7_R = crate::BitReader; #[doc = "Field `HEN7` writer - High detect enabled 7"] -pub type HEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN8` reader - High detect enabled 8"] pub type HEN8_R = crate::BitReader; #[doc = "Field `HEN8` writer - High detect enabled 8"] -pub type HEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN9` reader - High detect enabled 9"] pub type HEN9_R = crate::BitReader; #[doc = "Field `HEN9` writer - High detect enabled 9"] -pub type HEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN10` reader - High detect enabled 10"] pub type HEN10_R = crate::BitReader; #[doc = "Field `HEN10` writer - High detect enabled 10"] -pub type HEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN11` reader - High detect enabled 11"] pub type HEN11_R = crate::BitReader; #[doc = "Field `HEN11` writer - High detect enabled 11"] -pub type HEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN12` reader - High detect enabled 12"] pub type HEN12_R = crate::BitReader; #[doc = "Field `HEN12` writer - High detect enabled 12"] -pub type HEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN13` reader - High detect enabled 13"] pub type HEN13_R = crate::BitReader; #[doc = "Field `HEN13` writer - High detect enabled 13"] -pub type HEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN14` reader - High detect enabled 14"] pub type HEN14_R = crate::BitReader; #[doc = "Field `HEN14` writer - High detect enabled 14"] -pub type HEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN15` reader - High detect enabled 15"] pub type HEN15_R = crate::BitReader; #[doc = "Field `HEN15` writer - High detect enabled 15"] -pub type HEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN16` reader - High detect enabled 16"] pub type HEN16_R = crate::BitReader; #[doc = "Field `HEN16` writer - High detect enabled 16"] -pub type HEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN17` reader - High detect enabled 17"] pub type HEN17_R = crate::BitReader; #[doc = "Field `HEN17` writer - High detect enabled 17"] -pub type HEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN18` reader - High detect enabled 18"] pub type HEN18_R = crate::BitReader; #[doc = "Field `HEN18` writer - High detect enabled 18"] -pub type HEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN19` reader - High detect enabled 19"] pub type HEN19_R = crate::BitReader; #[doc = "Field `HEN19` writer - High detect enabled 19"] -pub type HEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN20` reader - High detect enabled 20"] pub type HEN20_R = crate::BitReader; #[doc = "Field `HEN20` writer - High detect enabled 20"] -pub type HEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN21` reader - High detect enabled 21"] pub type HEN21_R = crate::BitReader; #[doc = "Field `HEN21` writer - High detect enabled 21"] -pub type HEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN22` reader - High detect enabled 22"] pub type HEN22_R = crate::BitReader; #[doc = "Field `HEN22` writer - High detect enabled 22"] -pub type HEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN23` reader - High detect enabled 23"] pub type HEN23_R = crate::BitReader; #[doc = "Field `HEN23` writer - High detect enabled 23"] -pub type HEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN24` reader - High detect enabled 24"] pub type HEN24_R = crate::BitReader; #[doc = "Field `HEN24` writer - High detect enabled 24"] -pub type HEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN25` reader - High detect enabled 25"] pub type HEN25_R = crate::BitReader; #[doc = "Field `HEN25` writer - High detect enabled 25"] -pub type HEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN26` reader - High detect enabled 26"] pub type HEN26_R = crate::BitReader; #[doc = "Field `HEN26` writer - High detect enabled 26"] -pub type HEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN27` reader - High detect enabled 27"] pub type HEN27_R = crate::BitReader; #[doc = "Field `HEN27` writer - High detect enabled 27"] -pub type HEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN28` reader - High detect enabled 28"] pub type HEN28_R = crate::BitReader; #[doc = "Field `HEN28` writer - High detect enabled 28"] -pub type HEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN29` reader - High detect enabled 29"] pub type HEN29_R = crate::BitReader; #[doc = "Field `HEN29` writer - High detect enabled 29"] -pub type HEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN30` reader - High detect enabled 30"] pub type HEN30_R = crate::BitReader; #[doc = "Field `HEN30` writer - High detect enabled 30"] -pub type HEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN31` reader - High detect enabled 31"] pub type HEN31_R = crate::BitReader; #[doc = "Field `HEN31` writer - High detect enabled 31"] -pub type HEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - High detect enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - High detect enabled 0"] #[inline(always)] #[must_use] - pub fn hen0(&mut self) -> HEN0_W { - HEN0_W::new(self) + pub fn hen0(&mut self) -> HEN0_W { + HEN0_W::new(self, 0) } #[doc = "Bit 1 - High detect enabled 1"] #[inline(always)] #[must_use] - pub fn hen1(&mut self) -> HEN1_W { - HEN1_W::new(self) + pub fn hen1(&mut self) -> HEN1_W { + HEN1_W::new(self, 1) } #[doc = "Bit 2 - High detect enabled 2"] #[inline(always)] #[must_use] - pub fn hen2(&mut self) -> HEN2_W { - HEN2_W::new(self) + pub fn hen2(&mut self) -> HEN2_W { + HEN2_W::new(self, 2) } #[doc = "Bit 3 - High detect enabled 3"] #[inline(always)] #[must_use] - pub fn hen3(&mut self) -> HEN3_W { - HEN3_W::new(self) + pub fn hen3(&mut self) -> HEN3_W { + HEN3_W::new(self, 3) } #[doc = "Bit 4 - High detect enabled 4"] #[inline(always)] #[must_use] - pub fn hen4(&mut self) -> HEN4_W { - HEN4_W::new(self) + pub fn hen4(&mut self) -> HEN4_W { + HEN4_W::new(self, 4) } #[doc = "Bit 5 - High detect enabled 5"] #[inline(always)] #[must_use] - pub fn hen5(&mut self) -> HEN5_W { - HEN5_W::new(self) + pub fn hen5(&mut self) -> HEN5_W { + HEN5_W::new(self, 5) } #[doc = "Bit 6 - High detect enabled 6"] #[inline(always)] #[must_use] - pub fn hen6(&mut self) -> HEN6_W { - HEN6_W::new(self) + pub fn hen6(&mut self) -> HEN6_W { + HEN6_W::new(self, 6) } #[doc = "Bit 7 - High detect enabled 7"] #[inline(always)] #[must_use] - pub fn hen7(&mut self) -> HEN7_W { - HEN7_W::new(self) + pub fn hen7(&mut self) -> HEN7_W { + HEN7_W::new(self, 7) } #[doc = "Bit 8 - High detect enabled 8"] #[inline(always)] #[must_use] - pub fn hen8(&mut self) -> HEN8_W { - HEN8_W::new(self) + pub fn hen8(&mut self) -> HEN8_W { + HEN8_W::new(self, 8) } #[doc = "Bit 9 - High detect enabled 9"] #[inline(always)] #[must_use] - pub fn hen9(&mut self) -> HEN9_W { - HEN9_W::new(self) + pub fn hen9(&mut self) -> HEN9_W { + HEN9_W::new(self, 9) } #[doc = "Bit 10 - High detect enabled 10"] #[inline(always)] #[must_use] - pub fn hen10(&mut self) -> HEN10_W { - HEN10_W::new(self) + pub fn hen10(&mut self) -> HEN10_W { + HEN10_W::new(self, 10) } #[doc = "Bit 11 - High detect enabled 11"] #[inline(always)] #[must_use] - pub fn hen11(&mut self) -> HEN11_W { - HEN11_W::new(self) + pub fn hen11(&mut self) -> HEN11_W { + HEN11_W::new(self, 11) } #[doc = "Bit 12 - High detect enabled 12"] #[inline(always)] #[must_use] - pub fn hen12(&mut self) -> HEN12_W { - HEN12_W::new(self) + pub fn hen12(&mut self) -> HEN12_W { + HEN12_W::new(self, 12) } #[doc = "Bit 13 - High detect enabled 13"] #[inline(always)] #[must_use] - pub fn hen13(&mut self) -> HEN13_W { - HEN13_W::new(self) + pub fn hen13(&mut self) -> HEN13_W { + HEN13_W::new(self, 13) } #[doc = "Bit 14 - High detect enabled 14"] #[inline(always)] #[must_use] - pub fn hen14(&mut self) -> HEN14_W { - HEN14_W::new(self) + pub fn hen14(&mut self) -> HEN14_W { + HEN14_W::new(self, 14) } #[doc = "Bit 15 - High detect enabled 15"] #[inline(always)] #[must_use] - pub fn hen15(&mut self) -> HEN15_W { - HEN15_W::new(self) + pub fn hen15(&mut self) -> HEN15_W { + HEN15_W::new(self, 15) } #[doc = "Bit 16 - High detect enabled 16"] #[inline(always)] #[must_use] - pub fn hen16(&mut self) -> HEN16_W { - HEN16_W::new(self) + pub fn hen16(&mut self) -> HEN16_W { + HEN16_W::new(self, 16) } #[doc = "Bit 17 - High detect enabled 17"] #[inline(always)] #[must_use] - pub fn hen17(&mut self) -> HEN17_W { - HEN17_W::new(self) + pub fn hen17(&mut self) -> HEN17_W { + HEN17_W::new(self, 17) } #[doc = "Bit 18 - High detect enabled 18"] #[inline(always)] #[must_use] - pub fn hen18(&mut self) -> HEN18_W { - HEN18_W::new(self) + pub fn hen18(&mut self) -> HEN18_W { + HEN18_W::new(self, 18) } #[doc = "Bit 19 - High detect enabled 19"] #[inline(always)] #[must_use] - pub fn hen19(&mut self) -> HEN19_W { - HEN19_W::new(self) + pub fn hen19(&mut self) -> HEN19_W { + HEN19_W::new(self, 19) } #[doc = "Bit 20 - High detect enabled 20"] #[inline(always)] #[must_use] - pub fn hen20(&mut self) -> HEN20_W { - HEN20_W::new(self) + pub fn hen20(&mut self) -> HEN20_W { + HEN20_W::new(self, 20) } #[doc = "Bit 21 - High detect enabled 21"] #[inline(always)] #[must_use] - pub fn hen21(&mut self) -> HEN21_W { - HEN21_W::new(self) + pub fn hen21(&mut self) -> HEN21_W { + HEN21_W::new(self, 21) } #[doc = "Bit 22 - High detect enabled 22"] #[inline(always)] #[must_use] - pub fn hen22(&mut self) -> HEN22_W { - HEN22_W::new(self) + pub fn hen22(&mut self) -> HEN22_W { + HEN22_W::new(self, 22) } #[doc = "Bit 23 - High detect enabled 23"] #[inline(always)] #[must_use] - pub fn hen23(&mut self) -> HEN23_W { - HEN23_W::new(self) + pub fn hen23(&mut self) -> HEN23_W { + HEN23_W::new(self, 23) } #[doc = "Bit 24 - High detect enabled 24"] #[inline(always)] #[must_use] - pub fn hen24(&mut self) -> HEN24_W { - HEN24_W::new(self) + pub fn hen24(&mut self) -> HEN24_W { + HEN24_W::new(self, 24) } #[doc = "Bit 25 - High detect enabled 25"] #[inline(always)] #[must_use] - pub fn hen25(&mut self) -> HEN25_W { - HEN25_W::new(self) + pub fn hen25(&mut self) -> HEN25_W { + HEN25_W::new(self, 25) } #[doc = "Bit 26 - High detect enabled 26"] #[inline(always)] #[must_use] - pub fn hen26(&mut self) -> HEN26_W { - HEN26_W::new(self) + pub fn hen26(&mut self) -> HEN26_W { + HEN26_W::new(self, 26) } #[doc = "Bit 27 - High detect enabled 27"] #[inline(always)] #[must_use] - pub fn hen27(&mut self) -> HEN27_W { - HEN27_W::new(self) + pub fn hen27(&mut self) -> HEN27_W { + HEN27_W::new(self, 27) } #[doc = "Bit 28 - High detect enabled 28"] #[inline(always)] #[must_use] - pub fn hen28(&mut self) -> HEN28_W { - HEN28_W::new(self) + pub fn hen28(&mut self) -> HEN28_W { + HEN28_W::new(self, 28) } #[doc = "Bit 29 - High detect enabled 29"] #[inline(always)] #[must_use] - pub fn hen29(&mut self) -> HEN29_W { - HEN29_W::new(self) + pub fn hen29(&mut self) -> HEN29_W { + HEN29_W::new(self, 29) } #[doc = "Bit 30 - High detect enabled 30"] #[inline(always)] #[must_use] - pub fn hen30(&mut self) -> HEN30_W { - HEN30_W::new(self) + pub fn hen30(&mut self) -> HEN30_W { + HEN30_W::new(self, 30) } #[doc = "Bit 31 - High detect enabled 31"] #[inline(always)] #[must_use] - pub fn hen31(&mut self) -> HEN31_W { - HEN31_W::new(self) + pub fn hen31(&mut self) -> HEN31_W { + HEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gphen1.rs b/crates/bcm2835-lpa/src/gpio/gphen1.rs index 3d0aa21..0b33d39 100644 --- a/crates/bcm2835-lpa/src/gpio/gphen1.rs +++ b/crates/bcm2835-lpa/src/gpio/gphen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `HEN32` reader - High detect enabled 32"] pub type HEN32_R = crate::BitReader; #[doc = "Field `HEN32` writer - High detect enabled 32"] -pub type HEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN33` reader - High detect enabled 33"] pub type HEN33_R = crate::BitReader; #[doc = "Field `HEN33` writer - High detect enabled 33"] -pub type HEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN34` reader - High detect enabled 34"] pub type HEN34_R = crate::BitReader; #[doc = "Field `HEN34` writer - High detect enabled 34"] -pub type HEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN35` reader - High detect enabled 35"] pub type HEN35_R = crate::BitReader; #[doc = "Field `HEN35` writer - High detect enabled 35"] -pub type HEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN36` reader - High detect enabled 36"] pub type HEN36_R = crate::BitReader; #[doc = "Field `HEN36` writer - High detect enabled 36"] -pub type HEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN37` reader - High detect enabled 37"] pub type HEN37_R = crate::BitReader; #[doc = "Field `HEN37` writer - High detect enabled 37"] -pub type HEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN38` reader - High detect enabled 38"] pub type HEN38_R = crate::BitReader; #[doc = "Field `HEN38` writer - High detect enabled 38"] -pub type HEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN39` reader - High detect enabled 39"] pub type HEN39_R = crate::BitReader; #[doc = "Field `HEN39` writer - High detect enabled 39"] -pub type HEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN40` reader - High detect enabled 40"] pub type HEN40_R = crate::BitReader; #[doc = "Field `HEN40` writer - High detect enabled 40"] -pub type HEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN41` reader - High detect enabled 41"] pub type HEN41_R = crate::BitReader; #[doc = "Field `HEN41` writer - High detect enabled 41"] -pub type HEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN42` reader - High detect enabled 42"] pub type HEN42_R = crate::BitReader; #[doc = "Field `HEN42` writer - High detect enabled 42"] -pub type HEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN43` reader - High detect enabled 43"] pub type HEN43_R = crate::BitReader; #[doc = "Field `HEN43` writer - High detect enabled 43"] -pub type HEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN44` reader - High detect enabled 44"] pub type HEN44_R = crate::BitReader; #[doc = "Field `HEN44` writer - High detect enabled 44"] -pub type HEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN45` reader - High detect enabled 45"] pub type HEN45_R = crate::BitReader; #[doc = "Field `HEN45` writer - High detect enabled 45"] -pub type HEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN46` reader - High detect enabled 46"] pub type HEN46_R = crate::BitReader; #[doc = "Field `HEN46` writer - High detect enabled 46"] -pub type HEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN47` reader - High detect enabled 47"] pub type HEN47_R = crate::BitReader; #[doc = "Field `HEN47` writer - High detect enabled 47"] -pub type HEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN48` reader - High detect enabled 48"] pub type HEN48_R = crate::BitReader; #[doc = "Field `HEN48` writer - High detect enabled 48"] -pub type HEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN49` reader - High detect enabled 49"] pub type HEN49_R = crate::BitReader; #[doc = "Field `HEN49` writer - High detect enabled 49"] -pub type HEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN50` reader - High detect enabled 50"] pub type HEN50_R = crate::BitReader; #[doc = "Field `HEN50` writer - High detect enabled 50"] -pub type HEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN51` reader - High detect enabled 51"] pub type HEN51_R = crate::BitReader; #[doc = "Field `HEN51` writer - High detect enabled 51"] -pub type HEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN52` reader - High detect enabled 52"] pub type HEN52_R = crate::BitReader; #[doc = "Field `HEN52` writer - High detect enabled 52"] -pub type HEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN53` reader - High detect enabled 53"] pub type HEN53_R = crate::BitReader; #[doc = "Field `HEN53` writer - High detect enabled 53"] -pub type HEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - High detect enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - High detect enabled 32"] #[inline(always)] #[must_use] - pub fn hen32(&mut self) -> HEN32_W { - HEN32_W::new(self) + pub fn hen32(&mut self) -> HEN32_W { + HEN32_W::new(self, 0) } #[doc = "Bit 1 - High detect enabled 33"] #[inline(always)] #[must_use] - pub fn hen33(&mut self) -> HEN33_W { - HEN33_W::new(self) + pub fn hen33(&mut self) -> HEN33_W { + HEN33_W::new(self, 1) } #[doc = "Bit 2 - High detect enabled 34"] #[inline(always)] #[must_use] - pub fn hen34(&mut self) -> HEN34_W { - HEN34_W::new(self) + pub fn hen34(&mut self) -> HEN34_W { + HEN34_W::new(self, 2) } #[doc = "Bit 3 - High detect enabled 35"] #[inline(always)] #[must_use] - pub fn hen35(&mut self) -> HEN35_W { - HEN35_W::new(self) + pub fn hen35(&mut self) -> HEN35_W { + HEN35_W::new(self, 3) } #[doc = "Bit 4 - High detect enabled 36"] #[inline(always)] #[must_use] - pub fn hen36(&mut self) -> HEN36_W { - HEN36_W::new(self) + pub fn hen36(&mut self) -> HEN36_W { + HEN36_W::new(self, 4) } #[doc = "Bit 5 - High detect enabled 37"] #[inline(always)] #[must_use] - pub fn hen37(&mut self) -> HEN37_W { - HEN37_W::new(self) + pub fn hen37(&mut self) -> HEN37_W { + HEN37_W::new(self, 5) } #[doc = "Bit 6 - High detect enabled 38"] #[inline(always)] #[must_use] - pub fn hen38(&mut self) -> HEN38_W { - HEN38_W::new(self) + pub fn hen38(&mut self) -> HEN38_W { + HEN38_W::new(self, 6) } #[doc = "Bit 7 - High detect enabled 39"] #[inline(always)] #[must_use] - pub fn hen39(&mut self) -> HEN39_W { - HEN39_W::new(self) + pub fn hen39(&mut self) -> HEN39_W { + HEN39_W::new(self, 7) } #[doc = "Bit 8 - High detect enabled 40"] #[inline(always)] #[must_use] - pub fn hen40(&mut self) -> HEN40_W { - HEN40_W::new(self) + pub fn hen40(&mut self) -> HEN40_W { + HEN40_W::new(self, 8) } #[doc = "Bit 9 - High detect enabled 41"] #[inline(always)] #[must_use] - pub fn hen41(&mut self) -> HEN41_W { - HEN41_W::new(self) + pub fn hen41(&mut self) -> HEN41_W { + HEN41_W::new(self, 9) } #[doc = "Bit 10 - High detect enabled 42"] #[inline(always)] #[must_use] - pub fn hen42(&mut self) -> HEN42_W { - HEN42_W::new(self) + pub fn hen42(&mut self) -> HEN42_W { + HEN42_W::new(self, 10) } #[doc = "Bit 11 - High detect enabled 43"] #[inline(always)] #[must_use] - pub fn hen43(&mut self) -> HEN43_W { - HEN43_W::new(self) + pub fn hen43(&mut self) -> HEN43_W { + HEN43_W::new(self, 11) } #[doc = "Bit 12 - High detect enabled 44"] #[inline(always)] #[must_use] - pub fn hen44(&mut self) -> HEN44_W { - HEN44_W::new(self) + pub fn hen44(&mut self) -> HEN44_W { + HEN44_W::new(self, 12) } #[doc = "Bit 13 - High detect enabled 45"] #[inline(always)] #[must_use] - pub fn hen45(&mut self) -> HEN45_W { - HEN45_W::new(self) + pub fn hen45(&mut self) -> HEN45_W { + HEN45_W::new(self, 13) } #[doc = "Bit 14 - High detect enabled 46"] #[inline(always)] #[must_use] - pub fn hen46(&mut self) -> HEN46_W { - HEN46_W::new(self) + pub fn hen46(&mut self) -> HEN46_W { + HEN46_W::new(self, 14) } #[doc = "Bit 15 - High detect enabled 47"] #[inline(always)] #[must_use] - pub fn hen47(&mut self) -> HEN47_W { - HEN47_W::new(self) + pub fn hen47(&mut self) -> HEN47_W { + HEN47_W::new(self, 15) } #[doc = "Bit 16 - High detect enabled 48"] #[inline(always)] #[must_use] - pub fn hen48(&mut self) -> HEN48_W { - HEN48_W::new(self) + pub fn hen48(&mut self) -> HEN48_W { + HEN48_W::new(self, 16) } #[doc = "Bit 17 - High detect enabled 49"] #[inline(always)] #[must_use] - pub fn hen49(&mut self) -> HEN49_W { - HEN49_W::new(self) + pub fn hen49(&mut self) -> HEN49_W { + HEN49_W::new(self, 17) } #[doc = "Bit 18 - High detect enabled 50"] #[inline(always)] #[must_use] - pub fn hen50(&mut self) -> HEN50_W { - HEN50_W::new(self) + pub fn hen50(&mut self) -> HEN50_W { + HEN50_W::new(self, 18) } #[doc = "Bit 19 - High detect enabled 51"] #[inline(always)] #[must_use] - pub fn hen51(&mut self) -> HEN51_W { - HEN51_W::new(self) + pub fn hen51(&mut self) -> HEN51_W { + HEN51_W::new(self, 19) } #[doc = "Bit 20 - High detect enabled 52"] #[inline(always)] #[must_use] - pub fn hen52(&mut self) -> HEN52_W { - HEN52_W::new(self) + pub fn hen52(&mut self) -> HEN52_W { + HEN52_W::new(self, 20) } #[doc = "Bit 21 - High detect enabled 53"] #[inline(always)] #[must_use] - pub fn hen53(&mut self) -> HEN53_W { - HEN53_W::new(self) + pub fn hen53(&mut self) -> HEN53_W { + HEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs index 507543e..fd43ea1 100644 --- a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs @@ -52,8 +52,8 @@ impl GPIO_PUP_PDN_CNTRL0_R { } } #[doc = "Field `GPIO_PUP_PDN_CNTRL0` writer - Resistor select for 0"] -pub type GPIO_PUP_PDN_CNTRL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, BP_PULL_A>; -impl<'a, REG, const O: u8> GPIO_PUP_PDN_CNTRL0_W<'a, REG, O> +pub type GPIO_PUP_PDN_CNTRL0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BP_PULL_A>; +impl<'a, REG> GPIO_PUP_PDN_CNTRL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -288,137 +288,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 0"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl0( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL0_W { - GPIO_PUP_PDN_CNTRL0_W::new(self) + pub fn gpio_pup_pdn_cntrl0(&mut self) -> GPIO_PUP_PDN_CNTRL0_W { + GPIO_PUP_PDN_CNTRL0_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 1"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl1( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL1_W { - GPIO_PUP_PDN_CNTRL1_W::new(self) + pub fn gpio_pup_pdn_cntrl1(&mut self) -> GPIO_PUP_PDN_CNTRL1_W { + GPIO_PUP_PDN_CNTRL1_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 2"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl2( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL2_W { - GPIO_PUP_PDN_CNTRL2_W::new(self) + pub fn gpio_pup_pdn_cntrl2(&mut self) -> GPIO_PUP_PDN_CNTRL2_W { + GPIO_PUP_PDN_CNTRL2_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 3"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl3( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL3_W { - GPIO_PUP_PDN_CNTRL3_W::new(self) + pub fn gpio_pup_pdn_cntrl3(&mut self) -> GPIO_PUP_PDN_CNTRL3_W { + GPIO_PUP_PDN_CNTRL3_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 4"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl4( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL4_W { - GPIO_PUP_PDN_CNTRL4_W::new(self) + pub fn gpio_pup_pdn_cntrl4(&mut self) -> GPIO_PUP_PDN_CNTRL4_W { + GPIO_PUP_PDN_CNTRL4_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 5"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl5( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL5_W { - GPIO_PUP_PDN_CNTRL5_W::new(self) + pub fn gpio_pup_pdn_cntrl5(&mut self) -> GPIO_PUP_PDN_CNTRL5_W { + GPIO_PUP_PDN_CNTRL5_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 6"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl6( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL6_W { - GPIO_PUP_PDN_CNTRL6_W::new(self) + pub fn gpio_pup_pdn_cntrl6(&mut self) -> GPIO_PUP_PDN_CNTRL6_W { + GPIO_PUP_PDN_CNTRL6_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 7"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl7( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL7_W { - GPIO_PUP_PDN_CNTRL7_W::new(self) + pub fn gpio_pup_pdn_cntrl7(&mut self) -> GPIO_PUP_PDN_CNTRL7_W { + GPIO_PUP_PDN_CNTRL7_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 8"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl8( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL8_W { - GPIO_PUP_PDN_CNTRL8_W::new(self) + pub fn gpio_pup_pdn_cntrl8(&mut self) -> GPIO_PUP_PDN_CNTRL8_W { + GPIO_PUP_PDN_CNTRL8_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 9"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl9( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL9_W { - GPIO_PUP_PDN_CNTRL9_W::new(self) + pub fn gpio_pup_pdn_cntrl9(&mut self) -> GPIO_PUP_PDN_CNTRL9_W { + GPIO_PUP_PDN_CNTRL9_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 10"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl10( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL10_W { - GPIO_PUP_PDN_CNTRL10_W::new(self) + pub fn gpio_pup_pdn_cntrl10(&mut self) -> GPIO_PUP_PDN_CNTRL10_W { + GPIO_PUP_PDN_CNTRL10_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 11"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl11( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL11_W { - GPIO_PUP_PDN_CNTRL11_W::new(self) + pub fn gpio_pup_pdn_cntrl11(&mut self) -> GPIO_PUP_PDN_CNTRL11_W { + GPIO_PUP_PDN_CNTRL11_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 12"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl12( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL12_W { - GPIO_PUP_PDN_CNTRL12_W::new(self) + pub fn gpio_pup_pdn_cntrl12(&mut self) -> GPIO_PUP_PDN_CNTRL12_W { + GPIO_PUP_PDN_CNTRL12_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 13"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl13( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL13_W { - GPIO_PUP_PDN_CNTRL13_W::new(self) + pub fn gpio_pup_pdn_cntrl13(&mut self) -> GPIO_PUP_PDN_CNTRL13_W { + GPIO_PUP_PDN_CNTRL13_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 14"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl14( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL14_W { - GPIO_PUP_PDN_CNTRL14_W::new(self) + pub fn gpio_pup_pdn_cntrl14(&mut self) -> GPIO_PUP_PDN_CNTRL14_W { + GPIO_PUP_PDN_CNTRL14_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 15"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl15( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL15_W { - GPIO_PUP_PDN_CNTRL15_W::new(self) + pub fn gpio_pup_pdn_cntrl15(&mut self) -> GPIO_PUP_PDN_CNTRL15_W { + GPIO_PUP_PDN_CNTRL15_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs index 877b1ae..8d7c93d 100644 --- a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs @@ -222,137 +222,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 16"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl16( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL16_W { - GPIO_PUP_PDN_CNTRL16_W::new(self) + pub fn gpio_pup_pdn_cntrl16(&mut self) -> GPIO_PUP_PDN_CNTRL16_W { + GPIO_PUP_PDN_CNTRL16_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 17"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl17( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL17_W { - GPIO_PUP_PDN_CNTRL17_W::new(self) + pub fn gpio_pup_pdn_cntrl17(&mut self) -> GPIO_PUP_PDN_CNTRL17_W { + GPIO_PUP_PDN_CNTRL17_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 18"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl18( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL18_W { - GPIO_PUP_PDN_CNTRL18_W::new(self) + pub fn gpio_pup_pdn_cntrl18(&mut self) -> GPIO_PUP_PDN_CNTRL18_W { + GPIO_PUP_PDN_CNTRL18_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 19"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl19( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL19_W { - GPIO_PUP_PDN_CNTRL19_W::new(self) + pub fn gpio_pup_pdn_cntrl19(&mut self) -> GPIO_PUP_PDN_CNTRL19_W { + GPIO_PUP_PDN_CNTRL19_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 20"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl20( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL20_W { - GPIO_PUP_PDN_CNTRL20_W::new(self) + pub fn gpio_pup_pdn_cntrl20(&mut self) -> GPIO_PUP_PDN_CNTRL20_W { + GPIO_PUP_PDN_CNTRL20_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 21"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl21( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL21_W { - GPIO_PUP_PDN_CNTRL21_W::new(self) + pub fn gpio_pup_pdn_cntrl21(&mut self) -> GPIO_PUP_PDN_CNTRL21_W { + GPIO_PUP_PDN_CNTRL21_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 22"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl22( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL22_W { - GPIO_PUP_PDN_CNTRL22_W::new(self) + pub fn gpio_pup_pdn_cntrl22(&mut self) -> GPIO_PUP_PDN_CNTRL22_W { + GPIO_PUP_PDN_CNTRL22_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 23"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl23( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL23_W { - GPIO_PUP_PDN_CNTRL23_W::new(self) + pub fn gpio_pup_pdn_cntrl23(&mut self) -> GPIO_PUP_PDN_CNTRL23_W { + GPIO_PUP_PDN_CNTRL23_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 24"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl24( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL24_W { - GPIO_PUP_PDN_CNTRL24_W::new(self) + pub fn gpio_pup_pdn_cntrl24(&mut self) -> GPIO_PUP_PDN_CNTRL24_W { + GPIO_PUP_PDN_CNTRL24_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 25"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl25( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL25_W { - GPIO_PUP_PDN_CNTRL25_W::new(self) + pub fn gpio_pup_pdn_cntrl25(&mut self) -> GPIO_PUP_PDN_CNTRL25_W { + GPIO_PUP_PDN_CNTRL25_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 26"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl26( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL26_W { - GPIO_PUP_PDN_CNTRL26_W::new(self) + pub fn gpio_pup_pdn_cntrl26(&mut self) -> GPIO_PUP_PDN_CNTRL26_W { + GPIO_PUP_PDN_CNTRL26_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 27"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl27( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL27_W { - GPIO_PUP_PDN_CNTRL27_W::new(self) + pub fn gpio_pup_pdn_cntrl27(&mut self) -> GPIO_PUP_PDN_CNTRL27_W { + GPIO_PUP_PDN_CNTRL27_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 28"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl28( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL28_W { - GPIO_PUP_PDN_CNTRL28_W::new(self) + pub fn gpio_pup_pdn_cntrl28(&mut self) -> GPIO_PUP_PDN_CNTRL28_W { + GPIO_PUP_PDN_CNTRL28_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 29"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl29( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL29_W { - GPIO_PUP_PDN_CNTRL29_W::new(self) + pub fn gpio_pup_pdn_cntrl29(&mut self) -> GPIO_PUP_PDN_CNTRL29_W { + GPIO_PUP_PDN_CNTRL29_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 30"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl30( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL30_W { - GPIO_PUP_PDN_CNTRL30_W::new(self) + pub fn gpio_pup_pdn_cntrl30(&mut self) -> GPIO_PUP_PDN_CNTRL30_W { + GPIO_PUP_PDN_CNTRL30_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 31"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl31( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL31_W { - GPIO_PUP_PDN_CNTRL31_W::new(self) + pub fn gpio_pup_pdn_cntrl31(&mut self) -> GPIO_PUP_PDN_CNTRL31_W { + GPIO_PUP_PDN_CNTRL31_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs index dfd838d..3881adc 100644 --- a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs +++ b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs @@ -222,137 +222,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 32"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl32( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL32_W { - GPIO_PUP_PDN_CNTRL32_W::new(self) + pub fn gpio_pup_pdn_cntrl32(&mut self) -> GPIO_PUP_PDN_CNTRL32_W { + GPIO_PUP_PDN_CNTRL32_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 33"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl33( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL33_W { - GPIO_PUP_PDN_CNTRL33_W::new(self) + pub fn gpio_pup_pdn_cntrl33(&mut self) -> GPIO_PUP_PDN_CNTRL33_W { + GPIO_PUP_PDN_CNTRL33_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 34"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl34( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL34_W { - GPIO_PUP_PDN_CNTRL34_W::new(self) + pub fn gpio_pup_pdn_cntrl34(&mut self) -> GPIO_PUP_PDN_CNTRL34_W { + GPIO_PUP_PDN_CNTRL34_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 35"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl35( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL35_W { - GPIO_PUP_PDN_CNTRL35_W::new(self) + pub fn gpio_pup_pdn_cntrl35(&mut self) -> GPIO_PUP_PDN_CNTRL35_W { + GPIO_PUP_PDN_CNTRL35_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 36"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl36( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL36_W { - GPIO_PUP_PDN_CNTRL36_W::new(self) + pub fn gpio_pup_pdn_cntrl36(&mut self) -> GPIO_PUP_PDN_CNTRL36_W { + GPIO_PUP_PDN_CNTRL36_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 37"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl37( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL37_W { - GPIO_PUP_PDN_CNTRL37_W::new(self) + pub fn gpio_pup_pdn_cntrl37(&mut self) -> GPIO_PUP_PDN_CNTRL37_W { + GPIO_PUP_PDN_CNTRL37_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 38"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl38( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL38_W { - GPIO_PUP_PDN_CNTRL38_W::new(self) + pub fn gpio_pup_pdn_cntrl38(&mut self) -> GPIO_PUP_PDN_CNTRL38_W { + GPIO_PUP_PDN_CNTRL38_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 39"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl39( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL39_W { - GPIO_PUP_PDN_CNTRL39_W::new(self) + pub fn gpio_pup_pdn_cntrl39(&mut self) -> GPIO_PUP_PDN_CNTRL39_W { + GPIO_PUP_PDN_CNTRL39_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 40"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl40( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL40_W { - GPIO_PUP_PDN_CNTRL40_W::new(self) + pub fn gpio_pup_pdn_cntrl40(&mut self) -> GPIO_PUP_PDN_CNTRL40_W { + GPIO_PUP_PDN_CNTRL40_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 41"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl41( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL41_W { - GPIO_PUP_PDN_CNTRL41_W::new(self) + pub fn gpio_pup_pdn_cntrl41(&mut self) -> GPIO_PUP_PDN_CNTRL41_W { + GPIO_PUP_PDN_CNTRL41_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 42"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl42( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL42_W { - GPIO_PUP_PDN_CNTRL42_W::new(self) + pub fn gpio_pup_pdn_cntrl42(&mut self) -> GPIO_PUP_PDN_CNTRL42_W { + GPIO_PUP_PDN_CNTRL42_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 43"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl43( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL43_W { - GPIO_PUP_PDN_CNTRL43_W::new(self) + pub fn gpio_pup_pdn_cntrl43(&mut self) -> GPIO_PUP_PDN_CNTRL43_W { + GPIO_PUP_PDN_CNTRL43_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 44"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl44( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL44_W { - GPIO_PUP_PDN_CNTRL44_W::new(self) + pub fn gpio_pup_pdn_cntrl44(&mut self) -> GPIO_PUP_PDN_CNTRL44_W { + GPIO_PUP_PDN_CNTRL44_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 45"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl45( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL45_W { - GPIO_PUP_PDN_CNTRL45_W::new(self) + pub fn gpio_pup_pdn_cntrl45(&mut self) -> GPIO_PUP_PDN_CNTRL45_W { + GPIO_PUP_PDN_CNTRL45_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 46"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl46( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL46_W { - GPIO_PUP_PDN_CNTRL46_W::new(self) + pub fn gpio_pup_pdn_cntrl46(&mut self) -> GPIO_PUP_PDN_CNTRL46_W { + GPIO_PUP_PDN_CNTRL46_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 47"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl47( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL47_W { - GPIO_PUP_PDN_CNTRL47_W::new(self) + pub fn gpio_pup_pdn_cntrl47(&mut self) -> GPIO_PUP_PDN_CNTRL47_W { + GPIO_PUP_PDN_CNTRL47_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs index 52b564a..d8c1f24 100644 --- a/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs +++ b/crates/bcm2835-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs @@ -92,57 +92,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 48"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl48( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL48_W { - GPIO_PUP_PDN_CNTRL48_W::new(self) + pub fn gpio_pup_pdn_cntrl48(&mut self) -> GPIO_PUP_PDN_CNTRL48_W { + GPIO_PUP_PDN_CNTRL48_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 49"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl49( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL49_W { - GPIO_PUP_PDN_CNTRL49_W::new(self) + pub fn gpio_pup_pdn_cntrl49(&mut self) -> GPIO_PUP_PDN_CNTRL49_W { + GPIO_PUP_PDN_CNTRL49_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 50"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl50( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL50_W { - GPIO_PUP_PDN_CNTRL50_W::new(self) + pub fn gpio_pup_pdn_cntrl50(&mut self) -> GPIO_PUP_PDN_CNTRL50_W { + GPIO_PUP_PDN_CNTRL50_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 51"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl51( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL51_W { - GPIO_PUP_PDN_CNTRL51_W::new(self) + pub fn gpio_pup_pdn_cntrl51(&mut self) -> GPIO_PUP_PDN_CNTRL51_W { + GPIO_PUP_PDN_CNTRL51_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 52"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl52( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL52_W { - GPIO_PUP_PDN_CNTRL52_W::new(self) + pub fn gpio_pup_pdn_cntrl52(&mut self) -> GPIO_PUP_PDN_CNTRL52_W { + GPIO_PUP_PDN_CNTRL52_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 53"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl53( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL53_W { - GPIO_PUP_PDN_CNTRL53_W::new(self) + pub fn gpio_pup_pdn_cntrl53(&mut self) -> GPIO_PUP_PDN_CNTRL53_W { + GPIO_PUP_PDN_CNTRL53_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gplen0.rs b/crates/bcm2835-lpa/src/gpio/gplen0.rs index bfac268..2d0f220 100644 --- a/crates/bcm2835-lpa/src/gpio/gplen0.rs +++ b/crates/bcm2835-lpa/src/gpio/gplen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `LEN0` reader - Low detect enabled 0"] pub type LEN0_R = crate::BitReader; #[doc = "Field `LEN0` writer - Low detect enabled 0"] -pub type LEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN1` reader - Low detect enabled 1"] pub type LEN1_R = crate::BitReader; #[doc = "Field `LEN1` writer - Low detect enabled 1"] -pub type LEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN2` reader - Low detect enabled 2"] pub type LEN2_R = crate::BitReader; #[doc = "Field `LEN2` writer - Low detect enabled 2"] -pub type LEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN3` reader - Low detect enabled 3"] pub type LEN3_R = crate::BitReader; #[doc = "Field `LEN3` writer - Low detect enabled 3"] -pub type LEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN4` reader - Low detect enabled 4"] pub type LEN4_R = crate::BitReader; #[doc = "Field `LEN4` writer - Low detect enabled 4"] -pub type LEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN5` reader - Low detect enabled 5"] pub type LEN5_R = crate::BitReader; #[doc = "Field `LEN5` writer - Low detect enabled 5"] -pub type LEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN6` reader - Low detect enabled 6"] pub type LEN6_R = crate::BitReader; #[doc = "Field `LEN6` writer - Low detect enabled 6"] -pub type LEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN7` reader - Low detect enabled 7"] pub type LEN7_R = crate::BitReader; #[doc = "Field `LEN7` writer - Low detect enabled 7"] -pub type LEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN8` reader - Low detect enabled 8"] pub type LEN8_R = crate::BitReader; #[doc = "Field `LEN8` writer - Low detect enabled 8"] -pub type LEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN9` reader - Low detect enabled 9"] pub type LEN9_R = crate::BitReader; #[doc = "Field `LEN9` writer - Low detect enabled 9"] -pub type LEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN10` reader - Low detect enabled 10"] pub type LEN10_R = crate::BitReader; #[doc = "Field `LEN10` writer - Low detect enabled 10"] -pub type LEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN11` reader - Low detect enabled 11"] pub type LEN11_R = crate::BitReader; #[doc = "Field `LEN11` writer - Low detect enabled 11"] -pub type LEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN12` reader - Low detect enabled 12"] pub type LEN12_R = crate::BitReader; #[doc = "Field `LEN12` writer - Low detect enabled 12"] -pub type LEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN13` reader - Low detect enabled 13"] pub type LEN13_R = crate::BitReader; #[doc = "Field `LEN13` writer - Low detect enabled 13"] -pub type LEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN14` reader - Low detect enabled 14"] pub type LEN14_R = crate::BitReader; #[doc = "Field `LEN14` writer - Low detect enabled 14"] -pub type LEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN15` reader - Low detect enabled 15"] pub type LEN15_R = crate::BitReader; #[doc = "Field `LEN15` writer - Low detect enabled 15"] -pub type LEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN16` reader - Low detect enabled 16"] pub type LEN16_R = crate::BitReader; #[doc = "Field `LEN16` writer - Low detect enabled 16"] -pub type LEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN17` reader - Low detect enabled 17"] pub type LEN17_R = crate::BitReader; #[doc = "Field `LEN17` writer - Low detect enabled 17"] -pub type LEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN18` reader - Low detect enabled 18"] pub type LEN18_R = crate::BitReader; #[doc = "Field `LEN18` writer - Low detect enabled 18"] -pub type LEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN19` reader - Low detect enabled 19"] pub type LEN19_R = crate::BitReader; #[doc = "Field `LEN19` writer - Low detect enabled 19"] -pub type LEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN20` reader - Low detect enabled 20"] pub type LEN20_R = crate::BitReader; #[doc = "Field `LEN20` writer - Low detect enabled 20"] -pub type LEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN21` reader - Low detect enabled 21"] pub type LEN21_R = crate::BitReader; #[doc = "Field `LEN21` writer - Low detect enabled 21"] -pub type LEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN22` reader - Low detect enabled 22"] pub type LEN22_R = crate::BitReader; #[doc = "Field `LEN22` writer - Low detect enabled 22"] -pub type LEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN23` reader - Low detect enabled 23"] pub type LEN23_R = crate::BitReader; #[doc = "Field `LEN23` writer - Low detect enabled 23"] -pub type LEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN24` reader - Low detect enabled 24"] pub type LEN24_R = crate::BitReader; #[doc = "Field `LEN24` writer - Low detect enabled 24"] -pub type LEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN25` reader - Low detect enabled 25"] pub type LEN25_R = crate::BitReader; #[doc = "Field `LEN25` writer - Low detect enabled 25"] -pub type LEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN26` reader - Low detect enabled 26"] pub type LEN26_R = crate::BitReader; #[doc = "Field `LEN26` writer - Low detect enabled 26"] -pub type LEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN27` reader - Low detect enabled 27"] pub type LEN27_R = crate::BitReader; #[doc = "Field `LEN27` writer - Low detect enabled 27"] -pub type LEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN28` reader - Low detect enabled 28"] pub type LEN28_R = crate::BitReader; #[doc = "Field `LEN28` writer - Low detect enabled 28"] -pub type LEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN29` reader - Low detect enabled 29"] pub type LEN29_R = crate::BitReader; #[doc = "Field `LEN29` writer - Low detect enabled 29"] -pub type LEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN30` reader - Low detect enabled 30"] pub type LEN30_R = crate::BitReader; #[doc = "Field `LEN30` writer - Low detect enabled 30"] -pub type LEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN31` reader - Low detect enabled 31"] pub type LEN31_R = crate::BitReader; #[doc = "Field `LEN31` writer - Low detect enabled 31"] -pub type LEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Low detect enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Low detect enabled 0"] #[inline(always)] #[must_use] - pub fn len0(&mut self) -> LEN0_W { - LEN0_W::new(self) + pub fn len0(&mut self) -> LEN0_W { + LEN0_W::new(self, 0) } #[doc = "Bit 1 - Low detect enabled 1"] #[inline(always)] #[must_use] - pub fn len1(&mut self) -> LEN1_W { - LEN1_W::new(self) + pub fn len1(&mut self) -> LEN1_W { + LEN1_W::new(self, 1) } #[doc = "Bit 2 - Low detect enabled 2"] #[inline(always)] #[must_use] - pub fn len2(&mut self) -> LEN2_W { - LEN2_W::new(self) + pub fn len2(&mut self) -> LEN2_W { + LEN2_W::new(self, 2) } #[doc = "Bit 3 - Low detect enabled 3"] #[inline(always)] #[must_use] - pub fn len3(&mut self) -> LEN3_W { - LEN3_W::new(self) + pub fn len3(&mut self) -> LEN3_W { + LEN3_W::new(self, 3) } #[doc = "Bit 4 - Low detect enabled 4"] #[inline(always)] #[must_use] - pub fn len4(&mut self) -> LEN4_W { - LEN4_W::new(self) + pub fn len4(&mut self) -> LEN4_W { + LEN4_W::new(self, 4) } #[doc = "Bit 5 - Low detect enabled 5"] #[inline(always)] #[must_use] - pub fn len5(&mut self) -> LEN5_W { - LEN5_W::new(self) + pub fn len5(&mut self) -> LEN5_W { + LEN5_W::new(self, 5) } #[doc = "Bit 6 - Low detect enabled 6"] #[inline(always)] #[must_use] - pub fn len6(&mut self) -> LEN6_W { - LEN6_W::new(self) + pub fn len6(&mut self) -> LEN6_W { + LEN6_W::new(self, 6) } #[doc = "Bit 7 - Low detect enabled 7"] #[inline(always)] #[must_use] - pub fn len7(&mut self) -> LEN7_W { - LEN7_W::new(self) + pub fn len7(&mut self) -> LEN7_W { + LEN7_W::new(self, 7) } #[doc = "Bit 8 - Low detect enabled 8"] #[inline(always)] #[must_use] - pub fn len8(&mut self) -> LEN8_W { - LEN8_W::new(self) + pub fn len8(&mut self) -> LEN8_W { + LEN8_W::new(self, 8) } #[doc = "Bit 9 - Low detect enabled 9"] #[inline(always)] #[must_use] - pub fn len9(&mut self) -> LEN9_W { - LEN9_W::new(self) + pub fn len9(&mut self) -> LEN9_W { + LEN9_W::new(self, 9) } #[doc = "Bit 10 - Low detect enabled 10"] #[inline(always)] #[must_use] - pub fn len10(&mut self) -> LEN10_W { - LEN10_W::new(self) + pub fn len10(&mut self) -> LEN10_W { + LEN10_W::new(self, 10) } #[doc = "Bit 11 - Low detect enabled 11"] #[inline(always)] #[must_use] - pub fn len11(&mut self) -> LEN11_W { - LEN11_W::new(self) + pub fn len11(&mut self) -> LEN11_W { + LEN11_W::new(self, 11) } #[doc = "Bit 12 - Low detect enabled 12"] #[inline(always)] #[must_use] - pub fn len12(&mut self) -> LEN12_W { - LEN12_W::new(self) + pub fn len12(&mut self) -> LEN12_W { + LEN12_W::new(self, 12) } #[doc = "Bit 13 - Low detect enabled 13"] #[inline(always)] #[must_use] - pub fn len13(&mut self) -> LEN13_W { - LEN13_W::new(self) + pub fn len13(&mut self) -> LEN13_W { + LEN13_W::new(self, 13) } #[doc = "Bit 14 - Low detect enabled 14"] #[inline(always)] #[must_use] - pub fn len14(&mut self) -> LEN14_W { - LEN14_W::new(self) + pub fn len14(&mut self) -> LEN14_W { + LEN14_W::new(self, 14) } #[doc = "Bit 15 - Low detect enabled 15"] #[inline(always)] #[must_use] - pub fn len15(&mut self) -> LEN15_W { - LEN15_W::new(self) + pub fn len15(&mut self) -> LEN15_W { + LEN15_W::new(self, 15) } #[doc = "Bit 16 - Low detect enabled 16"] #[inline(always)] #[must_use] - pub fn len16(&mut self) -> LEN16_W { - LEN16_W::new(self) + pub fn len16(&mut self) -> LEN16_W { + LEN16_W::new(self, 16) } #[doc = "Bit 17 - Low detect enabled 17"] #[inline(always)] #[must_use] - pub fn len17(&mut self) -> LEN17_W { - LEN17_W::new(self) + pub fn len17(&mut self) -> LEN17_W { + LEN17_W::new(self, 17) } #[doc = "Bit 18 - Low detect enabled 18"] #[inline(always)] #[must_use] - pub fn len18(&mut self) -> LEN18_W { - LEN18_W::new(self) + pub fn len18(&mut self) -> LEN18_W { + LEN18_W::new(self, 18) } #[doc = "Bit 19 - Low detect enabled 19"] #[inline(always)] #[must_use] - pub fn len19(&mut self) -> LEN19_W { - LEN19_W::new(self) + pub fn len19(&mut self) -> LEN19_W { + LEN19_W::new(self, 19) } #[doc = "Bit 20 - Low detect enabled 20"] #[inline(always)] #[must_use] - pub fn len20(&mut self) -> LEN20_W { - LEN20_W::new(self) + pub fn len20(&mut self) -> LEN20_W { + LEN20_W::new(self, 20) } #[doc = "Bit 21 - Low detect enabled 21"] #[inline(always)] #[must_use] - pub fn len21(&mut self) -> LEN21_W { - LEN21_W::new(self) + pub fn len21(&mut self) -> LEN21_W { + LEN21_W::new(self, 21) } #[doc = "Bit 22 - Low detect enabled 22"] #[inline(always)] #[must_use] - pub fn len22(&mut self) -> LEN22_W { - LEN22_W::new(self) + pub fn len22(&mut self) -> LEN22_W { + LEN22_W::new(self, 22) } #[doc = "Bit 23 - Low detect enabled 23"] #[inline(always)] #[must_use] - pub fn len23(&mut self) -> LEN23_W { - LEN23_W::new(self) + pub fn len23(&mut self) -> LEN23_W { + LEN23_W::new(self, 23) } #[doc = "Bit 24 - Low detect enabled 24"] #[inline(always)] #[must_use] - pub fn len24(&mut self) -> LEN24_W { - LEN24_W::new(self) + pub fn len24(&mut self) -> LEN24_W { + LEN24_W::new(self, 24) } #[doc = "Bit 25 - Low detect enabled 25"] #[inline(always)] #[must_use] - pub fn len25(&mut self) -> LEN25_W { - LEN25_W::new(self) + pub fn len25(&mut self) -> LEN25_W { + LEN25_W::new(self, 25) } #[doc = "Bit 26 - Low detect enabled 26"] #[inline(always)] #[must_use] - pub fn len26(&mut self) -> LEN26_W { - LEN26_W::new(self) + pub fn len26(&mut self) -> LEN26_W { + LEN26_W::new(self, 26) } #[doc = "Bit 27 - Low detect enabled 27"] #[inline(always)] #[must_use] - pub fn len27(&mut self) -> LEN27_W { - LEN27_W::new(self) + pub fn len27(&mut self) -> LEN27_W { + LEN27_W::new(self, 27) } #[doc = "Bit 28 - Low detect enabled 28"] #[inline(always)] #[must_use] - pub fn len28(&mut self) -> LEN28_W { - LEN28_W::new(self) + pub fn len28(&mut self) -> LEN28_W { + LEN28_W::new(self, 28) } #[doc = "Bit 29 - Low detect enabled 29"] #[inline(always)] #[must_use] - pub fn len29(&mut self) -> LEN29_W { - LEN29_W::new(self) + pub fn len29(&mut self) -> LEN29_W { + LEN29_W::new(self, 29) } #[doc = "Bit 30 - Low detect enabled 30"] #[inline(always)] #[must_use] - pub fn len30(&mut self) -> LEN30_W { - LEN30_W::new(self) + pub fn len30(&mut self) -> LEN30_W { + LEN30_W::new(self, 30) } #[doc = "Bit 31 - Low detect enabled 31"] #[inline(always)] #[must_use] - pub fn len31(&mut self) -> LEN31_W { - LEN31_W::new(self) + pub fn len31(&mut self) -> LEN31_W { + LEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gplen1.rs b/crates/bcm2835-lpa/src/gpio/gplen1.rs index bcf3f46..e199d0b 100644 --- a/crates/bcm2835-lpa/src/gpio/gplen1.rs +++ b/crates/bcm2835-lpa/src/gpio/gplen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `LEN32` reader - Low detect enabled 32"] pub type LEN32_R = crate::BitReader; #[doc = "Field `LEN32` writer - Low detect enabled 32"] -pub type LEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN33` reader - Low detect enabled 33"] pub type LEN33_R = crate::BitReader; #[doc = "Field `LEN33` writer - Low detect enabled 33"] -pub type LEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN34` reader - Low detect enabled 34"] pub type LEN34_R = crate::BitReader; #[doc = "Field `LEN34` writer - Low detect enabled 34"] -pub type LEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN35` reader - Low detect enabled 35"] pub type LEN35_R = crate::BitReader; #[doc = "Field `LEN35` writer - Low detect enabled 35"] -pub type LEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN36` reader - Low detect enabled 36"] pub type LEN36_R = crate::BitReader; #[doc = "Field `LEN36` writer - Low detect enabled 36"] -pub type LEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN37` reader - Low detect enabled 37"] pub type LEN37_R = crate::BitReader; #[doc = "Field `LEN37` writer - Low detect enabled 37"] -pub type LEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN38` reader - Low detect enabled 38"] pub type LEN38_R = crate::BitReader; #[doc = "Field `LEN38` writer - Low detect enabled 38"] -pub type LEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN39` reader - Low detect enabled 39"] pub type LEN39_R = crate::BitReader; #[doc = "Field `LEN39` writer - Low detect enabled 39"] -pub type LEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN40` reader - Low detect enabled 40"] pub type LEN40_R = crate::BitReader; #[doc = "Field `LEN40` writer - Low detect enabled 40"] -pub type LEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN41` reader - Low detect enabled 41"] pub type LEN41_R = crate::BitReader; #[doc = "Field `LEN41` writer - Low detect enabled 41"] -pub type LEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN42` reader - Low detect enabled 42"] pub type LEN42_R = crate::BitReader; #[doc = "Field `LEN42` writer - Low detect enabled 42"] -pub type LEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN43` reader - Low detect enabled 43"] pub type LEN43_R = crate::BitReader; #[doc = "Field `LEN43` writer - Low detect enabled 43"] -pub type LEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN44` reader - Low detect enabled 44"] pub type LEN44_R = crate::BitReader; #[doc = "Field `LEN44` writer - Low detect enabled 44"] -pub type LEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN45` reader - Low detect enabled 45"] pub type LEN45_R = crate::BitReader; #[doc = "Field `LEN45` writer - Low detect enabled 45"] -pub type LEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN46` reader - Low detect enabled 46"] pub type LEN46_R = crate::BitReader; #[doc = "Field `LEN46` writer - Low detect enabled 46"] -pub type LEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN47` reader - Low detect enabled 47"] pub type LEN47_R = crate::BitReader; #[doc = "Field `LEN47` writer - Low detect enabled 47"] -pub type LEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN48` reader - Low detect enabled 48"] pub type LEN48_R = crate::BitReader; #[doc = "Field `LEN48` writer - Low detect enabled 48"] -pub type LEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN49` reader - Low detect enabled 49"] pub type LEN49_R = crate::BitReader; #[doc = "Field `LEN49` writer - Low detect enabled 49"] -pub type LEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN50` reader - Low detect enabled 50"] pub type LEN50_R = crate::BitReader; #[doc = "Field `LEN50` writer - Low detect enabled 50"] -pub type LEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN51` reader - Low detect enabled 51"] pub type LEN51_R = crate::BitReader; #[doc = "Field `LEN51` writer - Low detect enabled 51"] -pub type LEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN52` reader - Low detect enabled 52"] pub type LEN52_R = crate::BitReader; #[doc = "Field `LEN52` writer - Low detect enabled 52"] -pub type LEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN53` reader - Low detect enabled 53"] pub type LEN53_R = crate::BitReader; #[doc = "Field `LEN53` writer - Low detect enabled 53"] -pub type LEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Low detect enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Low detect enabled 32"] #[inline(always)] #[must_use] - pub fn len32(&mut self) -> LEN32_W { - LEN32_W::new(self) + pub fn len32(&mut self) -> LEN32_W { + LEN32_W::new(self, 0) } #[doc = "Bit 1 - Low detect enabled 33"] #[inline(always)] #[must_use] - pub fn len33(&mut self) -> LEN33_W { - LEN33_W::new(self) + pub fn len33(&mut self) -> LEN33_W { + LEN33_W::new(self, 1) } #[doc = "Bit 2 - Low detect enabled 34"] #[inline(always)] #[must_use] - pub fn len34(&mut self) -> LEN34_W { - LEN34_W::new(self) + pub fn len34(&mut self) -> LEN34_W { + LEN34_W::new(self, 2) } #[doc = "Bit 3 - Low detect enabled 35"] #[inline(always)] #[must_use] - pub fn len35(&mut self) -> LEN35_W { - LEN35_W::new(self) + pub fn len35(&mut self) -> LEN35_W { + LEN35_W::new(self, 3) } #[doc = "Bit 4 - Low detect enabled 36"] #[inline(always)] #[must_use] - pub fn len36(&mut self) -> LEN36_W { - LEN36_W::new(self) + pub fn len36(&mut self) -> LEN36_W { + LEN36_W::new(self, 4) } #[doc = "Bit 5 - Low detect enabled 37"] #[inline(always)] #[must_use] - pub fn len37(&mut self) -> LEN37_W { - LEN37_W::new(self) + pub fn len37(&mut self) -> LEN37_W { + LEN37_W::new(self, 5) } #[doc = "Bit 6 - Low detect enabled 38"] #[inline(always)] #[must_use] - pub fn len38(&mut self) -> LEN38_W { - LEN38_W::new(self) + pub fn len38(&mut self) -> LEN38_W { + LEN38_W::new(self, 6) } #[doc = "Bit 7 - Low detect enabled 39"] #[inline(always)] #[must_use] - pub fn len39(&mut self) -> LEN39_W { - LEN39_W::new(self) + pub fn len39(&mut self) -> LEN39_W { + LEN39_W::new(self, 7) } #[doc = "Bit 8 - Low detect enabled 40"] #[inline(always)] #[must_use] - pub fn len40(&mut self) -> LEN40_W { - LEN40_W::new(self) + pub fn len40(&mut self) -> LEN40_W { + LEN40_W::new(self, 8) } #[doc = "Bit 9 - Low detect enabled 41"] #[inline(always)] #[must_use] - pub fn len41(&mut self) -> LEN41_W { - LEN41_W::new(self) + pub fn len41(&mut self) -> LEN41_W { + LEN41_W::new(self, 9) } #[doc = "Bit 10 - Low detect enabled 42"] #[inline(always)] #[must_use] - pub fn len42(&mut self) -> LEN42_W { - LEN42_W::new(self) + pub fn len42(&mut self) -> LEN42_W { + LEN42_W::new(self, 10) } #[doc = "Bit 11 - Low detect enabled 43"] #[inline(always)] #[must_use] - pub fn len43(&mut self) -> LEN43_W { - LEN43_W::new(self) + pub fn len43(&mut self) -> LEN43_W { + LEN43_W::new(self, 11) } #[doc = "Bit 12 - Low detect enabled 44"] #[inline(always)] #[must_use] - pub fn len44(&mut self) -> LEN44_W { - LEN44_W::new(self) + pub fn len44(&mut self) -> LEN44_W { + LEN44_W::new(self, 12) } #[doc = "Bit 13 - Low detect enabled 45"] #[inline(always)] #[must_use] - pub fn len45(&mut self) -> LEN45_W { - LEN45_W::new(self) + pub fn len45(&mut self) -> LEN45_W { + LEN45_W::new(self, 13) } #[doc = "Bit 14 - Low detect enabled 46"] #[inline(always)] #[must_use] - pub fn len46(&mut self) -> LEN46_W { - LEN46_W::new(self) + pub fn len46(&mut self) -> LEN46_W { + LEN46_W::new(self, 14) } #[doc = "Bit 15 - Low detect enabled 47"] #[inline(always)] #[must_use] - pub fn len47(&mut self) -> LEN47_W { - LEN47_W::new(self) + pub fn len47(&mut self) -> LEN47_W { + LEN47_W::new(self, 15) } #[doc = "Bit 16 - Low detect enabled 48"] #[inline(always)] #[must_use] - pub fn len48(&mut self) -> LEN48_W { - LEN48_W::new(self) + pub fn len48(&mut self) -> LEN48_W { + LEN48_W::new(self, 16) } #[doc = "Bit 17 - Low detect enabled 49"] #[inline(always)] #[must_use] - pub fn len49(&mut self) -> LEN49_W { - LEN49_W::new(self) + pub fn len49(&mut self) -> LEN49_W { + LEN49_W::new(self, 17) } #[doc = "Bit 18 - Low detect enabled 50"] #[inline(always)] #[must_use] - pub fn len50(&mut self) -> LEN50_W { - LEN50_W::new(self) + pub fn len50(&mut self) -> LEN50_W { + LEN50_W::new(self, 18) } #[doc = "Bit 19 - Low detect enabled 51"] #[inline(always)] #[must_use] - pub fn len51(&mut self) -> LEN51_W { - LEN51_W::new(self) + pub fn len51(&mut self) -> LEN51_W { + LEN51_W::new(self, 19) } #[doc = "Bit 20 - Low detect enabled 52"] #[inline(always)] #[must_use] - pub fn len52(&mut self) -> LEN52_W { - LEN52_W::new(self) + pub fn len52(&mut self) -> LEN52_W { + LEN52_W::new(self, 20) } #[doc = "Bit 21 - Low detect enabled 53"] #[inline(always)] #[must_use] - pub fn len53(&mut self) -> LEN53_W { - LEN53_W::new(self) + pub fn len53(&mut self) -> LEN53_W { + LEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gplev0.rs b/crates/bcm2835-lpa/src/gpio/gplev0.rs index 43e1e5c..3179253 100644 --- a/crates/bcm2835-lpa/src/gpio/gplev0.rs +++ b/crates/bcm2835-lpa/src/gpio/gplev0.rs @@ -266,7 +266,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "GPIO Pin Level 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gplev0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/gpio/gplev1.rs b/crates/bcm2835-lpa/src/gpio/gplev1.rs index e881649..7648da2 100644 --- a/crates/bcm2835-lpa/src/gpio/gplev1.rs +++ b/crates/bcm2835-lpa/src/gpio/gplev1.rs @@ -186,7 +186,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "GPIO Pin Level 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gplev1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/gpio/gpren0.rs b/crates/bcm2835-lpa/src/gpio/gpren0.rs index f4dfc2e..59cff0d 100644 --- a/crates/bcm2835-lpa/src/gpio/gpren0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpren0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `REN0` reader - Rising edge enabled 0"] pub type REN0_R = crate::BitReader; #[doc = "Field `REN0` writer - Rising edge enabled 0"] -pub type REN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN1` reader - Rising edge enabled 1"] pub type REN1_R = crate::BitReader; #[doc = "Field `REN1` writer - Rising edge enabled 1"] -pub type REN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN2` reader - Rising edge enabled 2"] pub type REN2_R = crate::BitReader; #[doc = "Field `REN2` writer - Rising edge enabled 2"] -pub type REN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN3` reader - Rising edge enabled 3"] pub type REN3_R = crate::BitReader; #[doc = "Field `REN3` writer - Rising edge enabled 3"] -pub type REN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN4` reader - Rising edge enabled 4"] pub type REN4_R = crate::BitReader; #[doc = "Field `REN4` writer - Rising edge enabled 4"] -pub type REN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN5` reader - Rising edge enabled 5"] pub type REN5_R = crate::BitReader; #[doc = "Field `REN5` writer - Rising edge enabled 5"] -pub type REN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN6` reader - Rising edge enabled 6"] pub type REN6_R = crate::BitReader; #[doc = "Field `REN6` writer - Rising edge enabled 6"] -pub type REN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN7` reader - Rising edge enabled 7"] pub type REN7_R = crate::BitReader; #[doc = "Field `REN7` writer - Rising edge enabled 7"] -pub type REN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN8` reader - Rising edge enabled 8"] pub type REN8_R = crate::BitReader; #[doc = "Field `REN8` writer - Rising edge enabled 8"] -pub type REN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN9` reader - Rising edge enabled 9"] pub type REN9_R = crate::BitReader; #[doc = "Field `REN9` writer - Rising edge enabled 9"] -pub type REN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN10` reader - Rising edge enabled 10"] pub type REN10_R = crate::BitReader; #[doc = "Field `REN10` writer - Rising edge enabled 10"] -pub type REN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN11` reader - Rising edge enabled 11"] pub type REN11_R = crate::BitReader; #[doc = "Field `REN11` writer - Rising edge enabled 11"] -pub type REN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN12` reader - Rising edge enabled 12"] pub type REN12_R = crate::BitReader; #[doc = "Field `REN12` writer - Rising edge enabled 12"] -pub type REN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN13` reader - Rising edge enabled 13"] pub type REN13_R = crate::BitReader; #[doc = "Field `REN13` writer - Rising edge enabled 13"] -pub type REN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN14` reader - Rising edge enabled 14"] pub type REN14_R = crate::BitReader; #[doc = "Field `REN14` writer - Rising edge enabled 14"] -pub type REN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN15` reader - Rising edge enabled 15"] pub type REN15_R = crate::BitReader; #[doc = "Field `REN15` writer - Rising edge enabled 15"] -pub type REN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN16` reader - Rising edge enabled 16"] pub type REN16_R = crate::BitReader; #[doc = "Field `REN16` writer - Rising edge enabled 16"] -pub type REN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN17` reader - Rising edge enabled 17"] pub type REN17_R = crate::BitReader; #[doc = "Field `REN17` writer - Rising edge enabled 17"] -pub type REN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN18` reader - Rising edge enabled 18"] pub type REN18_R = crate::BitReader; #[doc = "Field `REN18` writer - Rising edge enabled 18"] -pub type REN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN19` reader - Rising edge enabled 19"] pub type REN19_R = crate::BitReader; #[doc = "Field `REN19` writer - Rising edge enabled 19"] -pub type REN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN20` reader - Rising edge enabled 20"] pub type REN20_R = crate::BitReader; #[doc = "Field `REN20` writer - Rising edge enabled 20"] -pub type REN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN21` reader - Rising edge enabled 21"] pub type REN21_R = crate::BitReader; #[doc = "Field `REN21` writer - Rising edge enabled 21"] -pub type REN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN22` reader - Rising edge enabled 22"] pub type REN22_R = crate::BitReader; #[doc = "Field `REN22` writer - Rising edge enabled 22"] -pub type REN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN23` reader - Rising edge enabled 23"] pub type REN23_R = crate::BitReader; #[doc = "Field `REN23` writer - Rising edge enabled 23"] -pub type REN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN24` reader - Rising edge enabled 24"] pub type REN24_R = crate::BitReader; #[doc = "Field `REN24` writer - Rising edge enabled 24"] -pub type REN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN25` reader - Rising edge enabled 25"] pub type REN25_R = crate::BitReader; #[doc = "Field `REN25` writer - Rising edge enabled 25"] -pub type REN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN26` reader - Rising edge enabled 26"] pub type REN26_R = crate::BitReader; #[doc = "Field `REN26` writer - Rising edge enabled 26"] -pub type REN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN27` reader - Rising edge enabled 27"] pub type REN27_R = crate::BitReader; #[doc = "Field `REN27` writer - Rising edge enabled 27"] -pub type REN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN28` reader - Rising edge enabled 28"] pub type REN28_R = crate::BitReader; #[doc = "Field `REN28` writer - Rising edge enabled 28"] -pub type REN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN29` reader - Rising edge enabled 29"] pub type REN29_R = crate::BitReader; #[doc = "Field `REN29` writer - Rising edge enabled 29"] -pub type REN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN30` reader - Rising edge enabled 30"] pub type REN30_R = crate::BitReader; #[doc = "Field `REN30` writer - Rising edge enabled 30"] -pub type REN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN31` reader - Rising edge enabled 31"] pub type REN31_R = crate::BitReader; #[doc = "Field `REN31` writer - Rising edge enabled 31"] -pub type REN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Rising edge enabled 0"] #[inline(always)] #[must_use] - pub fn ren0(&mut self) -> REN0_W { - REN0_W::new(self) + pub fn ren0(&mut self) -> REN0_W { + REN0_W::new(self, 0) } #[doc = "Bit 1 - Rising edge enabled 1"] #[inline(always)] #[must_use] - pub fn ren1(&mut self) -> REN1_W { - REN1_W::new(self) + pub fn ren1(&mut self) -> REN1_W { + REN1_W::new(self, 1) } #[doc = "Bit 2 - Rising edge enabled 2"] #[inline(always)] #[must_use] - pub fn ren2(&mut self) -> REN2_W { - REN2_W::new(self) + pub fn ren2(&mut self) -> REN2_W { + REN2_W::new(self, 2) } #[doc = "Bit 3 - Rising edge enabled 3"] #[inline(always)] #[must_use] - pub fn ren3(&mut self) -> REN3_W { - REN3_W::new(self) + pub fn ren3(&mut self) -> REN3_W { + REN3_W::new(self, 3) } #[doc = "Bit 4 - Rising edge enabled 4"] #[inline(always)] #[must_use] - pub fn ren4(&mut self) -> REN4_W { - REN4_W::new(self) + pub fn ren4(&mut self) -> REN4_W { + REN4_W::new(self, 4) } #[doc = "Bit 5 - Rising edge enabled 5"] #[inline(always)] #[must_use] - pub fn ren5(&mut self) -> REN5_W { - REN5_W::new(self) + pub fn ren5(&mut self) -> REN5_W { + REN5_W::new(self, 5) } #[doc = "Bit 6 - Rising edge enabled 6"] #[inline(always)] #[must_use] - pub fn ren6(&mut self) -> REN6_W { - REN6_W::new(self) + pub fn ren6(&mut self) -> REN6_W { + REN6_W::new(self, 6) } #[doc = "Bit 7 - Rising edge enabled 7"] #[inline(always)] #[must_use] - pub fn ren7(&mut self) -> REN7_W { - REN7_W::new(self) + pub fn ren7(&mut self) -> REN7_W { + REN7_W::new(self, 7) } #[doc = "Bit 8 - Rising edge enabled 8"] #[inline(always)] #[must_use] - pub fn ren8(&mut self) -> REN8_W { - REN8_W::new(self) + pub fn ren8(&mut self) -> REN8_W { + REN8_W::new(self, 8) } #[doc = "Bit 9 - Rising edge enabled 9"] #[inline(always)] #[must_use] - pub fn ren9(&mut self) -> REN9_W { - REN9_W::new(self) + pub fn ren9(&mut self) -> REN9_W { + REN9_W::new(self, 9) } #[doc = "Bit 10 - Rising edge enabled 10"] #[inline(always)] #[must_use] - pub fn ren10(&mut self) -> REN10_W { - REN10_W::new(self) + pub fn ren10(&mut self) -> REN10_W { + REN10_W::new(self, 10) } #[doc = "Bit 11 - Rising edge enabled 11"] #[inline(always)] #[must_use] - pub fn ren11(&mut self) -> REN11_W { - REN11_W::new(self) + pub fn ren11(&mut self) -> REN11_W { + REN11_W::new(self, 11) } #[doc = "Bit 12 - Rising edge enabled 12"] #[inline(always)] #[must_use] - pub fn ren12(&mut self) -> REN12_W { - REN12_W::new(self) + pub fn ren12(&mut self) -> REN12_W { + REN12_W::new(self, 12) } #[doc = "Bit 13 - Rising edge enabled 13"] #[inline(always)] #[must_use] - pub fn ren13(&mut self) -> REN13_W { - REN13_W::new(self) + pub fn ren13(&mut self) -> REN13_W { + REN13_W::new(self, 13) } #[doc = "Bit 14 - Rising edge enabled 14"] #[inline(always)] #[must_use] - pub fn ren14(&mut self) -> REN14_W { - REN14_W::new(self) + pub fn ren14(&mut self) -> REN14_W { + REN14_W::new(self, 14) } #[doc = "Bit 15 - Rising edge enabled 15"] #[inline(always)] #[must_use] - pub fn ren15(&mut self) -> REN15_W { - REN15_W::new(self) + pub fn ren15(&mut self) -> REN15_W { + REN15_W::new(self, 15) } #[doc = "Bit 16 - Rising edge enabled 16"] #[inline(always)] #[must_use] - pub fn ren16(&mut self) -> REN16_W { - REN16_W::new(self) + pub fn ren16(&mut self) -> REN16_W { + REN16_W::new(self, 16) } #[doc = "Bit 17 - Rising edge enabled 17"] #[inline(always)] #[must_use] - pub fn ren17(&mut self) -> REN17_W { - REN17_W::new(self) + pub fn ren17(&mut self) -> REN17_W { + REN17_W::new(self, 17) } #[doc = "Bit 18 - Rising edge enabled 18"] #[inline(always)] #[must_use] - pub fn ren18(&mut self) -> REN18_W { - REN18_W::new(self) + pub fn ren18(&mut self) -> REN18_W { + REN18_W::new(self, 18) } #[doc = "Bit 19 - Rising edge enabled 19"] #[inline(always)] #[must_use] - pub fn ren19(&mut self) -> REN19_W { - REN19_W::new(self) + pub fn ren19(&mut self) -> REN19_W { + REN19_W::new(self, 19) } #[doc = "Bit 20 - Rising edge enabled 20"] #[inline(always)] #[must_use] - pub fn ren20(&mut self) -> REN20_W { - REN20_W::new(self) + pub fn ren20(&mut self) -> REN20_W { + REN20_W::new(self, 20) } #[doc = "Bit 21 - Rising edge enabled 21"] #[inline(always)] #[must_use] - pub fn ren21(&mut self) -> REN21_W { - REN21_W::new(self) + pub fn ren21(&mut self) -> REN21_W { + REN21_W::new(self, 21) } #[doc = "Bit 22 - Rising edge enabled 22"] #[inline(always)] #[must_use] - pub fn ren22(&mut self) -> REN22_W { - REN22_W::new(self) + pub fn ren22(&mut self) -> REN22_W { + REN22_W::new(self, 22) } #[doc = "Bit 23 - Rising edge enabled 23"] #[inline(always)] #[must_use] - pub fn ren23(&mut self) -> REN23_W { - REN23_W::new(self) + pub fn ren23(&mut self) -> REN23_W { + REN23_W::new(self, 23) } #[doc = "Bit 24 - Rising edge enabled 24"] #[inline(always)] #[must_use] - pub fn ren24(&mut self) -> REN24_W { - REN24_W::new(self) + pub fn ren24(&mut self) -> REN24_W { + REN24_W::new(self, 24) } #[doc = "Bit 25 - Rising edge enabled 25"] #[inline(always)] #[must_use] - pub fn ren25(&mut self) -> REN25_W { - REN25_W::new(self) + pub fn ren25(&mut self) -> REN25_W { + REN25_W::new(self, 25) } #[doc = "Bit 26 - Rising edge enabled 26"] #[inline(always)] #[must_use] - pub fn ren26(&mut self) -> REN26_W { - REN26_W::new(self) + pub fn ren26(&mut self) -> REN26_W { + REN26_W::new(self, 26) } #[doc = "Bit 27 - Rising edge enabled 27"] #[inline(always)] #[must_use] - pub fn ren27(&mut self) -> REN27_W { - REN27_W::new(self) + pub fn ren27(&mut self) -> REN27_W { + REN27_W::new(self, 27) } #[doc = "Bit 28 - Rising edge enabled 28"] #[inline(always)] #[must_use] - pub fn ren28(&mut self) -> REN28_W { - REN28_W::new(self) + pub fn ren28(&mut self) -> REN28_W { + REN28_W::new(self, 28) } #[doc = "Bit 29 - Rising edge enabled 29"] #[inline(always)] #[must_use] - pub fn ren29(&mut self) -> REN29_W { - REN29_W::new(self) + pub fn ren29(&mut self) -> REN29_W { + REN29_W::new(self, 29) } #[doc = "Bit 30 - Rising edge enabled 30"] #[inline(always)] #[must_use] - pub fn ren30(&mut self) -> REN30_W { - REN30_W::new(self) + pub fn ren30(&mut self) -> REN30_W { + REN30_W::new(self, 30) } #[doc = "Bit 31 - Rising edge enabled 31"] #[inline(always)] #[must_use] - pub fn ren31(&mut self) -> REN31_W { - REN31_W::new(self) + pub fn ren31(&mut self) -> REN31_W { + REN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpren1.rs b/crates/bcm2835-lpa/src/gpio/gpren1.rs index 9f78a23..05e9477 100644 --- a/crates/bcm2835-lpa/src/gpio/gpren1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpren1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `REN32` reader - Rising edge enabled 32"] pub type REN32_R = crate::BitReader; #[doc = "Field `REN32` writer - Rising edge enabled 32"] -pub type REN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN33` reader - Rising edge enabled 33"] pub type REN33_R = crate::BitReader; #[doc = "Field `REN33` writer - Rising edge enabled 33"] -pub type REN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN34` reader - Rising edge enabled 34"] pub type REN34_R = crate::BitReader; #[doc = "Field `REN34` writer - Rising edge enabled 34"] -pub type REN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN35` reader - Rising edge enabled 35"] pub type REN35_R = crate::BitReader; #[doc = "Field `REN35` writer - Rising edge enabled 35"] -pub type REN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN36` reader - Rising edge enabled 36"] pub type REN36_R = crate::BitReader; #[doc = "Field `REN36` writer - Rising edge enabled 36"] -pub type REN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN37` reader - Rising edge enabled 37"] pub type REN37_R = crate::BitReader; #[doc = "Field `REN37` writer - Rising edge enabled 37"] -pub type REN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN38` reader - Rising edge enabled 38"] pub type REN38_R = crate::BitReader; #[doc = "Field `REN38` writer - Rising edge enabled 38"] -pub type REN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN39` reader - Rising edge enabled 39"] pub type REN39_R = crate::BitReader; #[doc = "Field `REN39` writer - Rising edge enabled 39"] -pub type REN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN40` reader - Rising edge enabled 40"] pub type REN40_R = crate::BitReader; #[doc = "Field `REN40` writer - Rising edge enabled 40"] -pub type REN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN41` reader - Rising edge enabled 41"] pub type REN41_R = crate::BitReader; #[doc = "Field `REN41` writer - Rising edge enabled 41"] -pub type REN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN42` reader - Rising edge enabled 42"] pub type REN42_R = crate::BitReader; #[doc = "Field `REN42` writer - Rising edge enabled 42"] -pub type REN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN43` reader - Rising edge enabled 43"] pub type REN43_R = crate::BitReader; #[doc = "Field `REN43` writer - Rising edge enabled 43"] -pub type REN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN44` reader - Rising edge enabled 44"] pub type REN44_R = crate::BitReader; #[doc = "Field `REN44` writer - Rising edge enabled 44"] -pub type REN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN45` reader - Rising edge enabled 45"] pub type REN45_R = crate::BitReader; #[doc = "Field `REN45` writer - Rising edge enabled 45"] -pub type REN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN46` reader - Rising edge enabled 46"] pub type REN46_R = crate::BitReader; #[doc = "Field `REN46` writer - Rising edge enabled 46"] -pub type REN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN47` reader - Rising edge enabled 47"] pub type REN47_R = crate::BitReader; #[doc = "Field `REN47` writer - Rising edge enabled 47"] -pub type REN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN48` reader - Rising edge enabled 48"] pub type REN48_R = crate::BitReader; #[doc = "Field `REN48` writer - Rising edge enabled 48"] -pub type REN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN49` reader - Rising edge enabled 49"] pub type REN49_R = crate::BitReader; #[doc = "Field `REN49` writer - Rising edge enabled 49"] -pub type REN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN50` reader - Rising edge enabled 50"] pub type REN50_R = crate::BitReader; #[doc = "Field `REN50` writer - Rising edge enabled 50"] -pub type REN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN51` reader - Rising edge enabled 51"] pub type REN51_R = crate::BitReader; #[doc = "Field `REN51` writer - Rising edge enabled 51"] -pub type REN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN52` reader - Rising edge enabled 52"] pub type REN52_R = crate::BitReader; #[doc = "Field `REN52` writer - Rising edge enabled 52"] -pub type REN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN53` reader - Rising edge enabled 53"] pub type REN53_R = crate::BitReader; #[doc = "Field `REN53` writer - Rising edge enabled 53"] -pub type REN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Rising edge enabled 32"] #[inline(always)] #[must_use] - pub fn ren32(&mut self) -> REN32_W { - REN32_W::new(self) + pub fn ren32(&mut self) -> REN32_W { + REN32_W::new(self, 0) } #[doc = "Bit 1 - Rising edge enabled 33"] #[inline(always)] #[must_use] - pub fn ren33(&mut self) -> REN33_W { - REN33_W::new(self) + pub fn ren33(&mut self) -> REN33_W { + REN33_W::new(self, 1) } #[doc = "Bit 2 - Rising edge enabled 34"] #[inline(always)] #[must_use] - pub fn ren34(&mut self) -> REN34_W { - REN34_W::new(self) + pub fn ren34(&mut self) -> REN34_W { + REN34_W::new(self, 2) } #[doc = "Bit 3 - Rising edge enabled 35"] #[inline(always)] #[must_use] - pub fn ren35(&mut self) -> REN35_W { - REN35_W::new(self) + pub fn ren35(&mut self) -> REN35_W { + REN35_W::new(self, 3) } #[doc = "Bit 4 - Rising edge enabled 36"] #[inline(always)] #[must_use] - pub fn ren36(&mut self) -> REN36_W { - REN36_W::new(self) + pub fn ren36(&mut self) -> REN36_W { + REN36_W::new(self, 4) } #[doc = "Bit 5 - Rising edge enabled 37"] #[inline(always)] #[must_use] - pub fn ren37(&mut self) -> REN37_W { - REN37_W::new(self) + pub fn ren37(&mut self) -> REN37_W { + REN37_W::new(self, 5) } #[doc = "Bit 6 - Rising edge enabled 38"] #[inline(always)] #[must_use] - pub fn ren38(&mut self) -> REN38_W { - REN38_W::new(self) + pub fn ren38(&mut self) -> REN38_W { + REN38_W::new(self, 6) } #[doc = "Bit 7 - Rising edge enabled 39"] #[inline(always)] #[must_use] - pub fn ren39(&mut self) -> REN39_W { - REN39_W::new(self) + pub fn ren39(&mut self) -> REN39_W { + REN39_W::new(self, 7) } #[doc = "Bit 8 - Rising edge enabled 40"] #[inline(always)] #[must_use] - pub fn ren40(&mut self) -> REN40_W { - REN40_W::new(self) + pub fn ren40(&mut self) -> REN40_W { + REN40_W::new(self, 8) } #[doc = "Bit 9 - Rising edge enabled 41"] #[inline(always)] #[must_use] - pub fn ren41(&mut self) -> REN41_W { - REN41_W::new(self) + pub fn ren41(&mut self) -> REN41_W { + REN41_W::new(self, 9) } #[doc = "Bit 10 - Rising edge enabled 42"] #[inline(always)] #[must_use] - pub fn ren42(&mut self) -> REN42_W { - REN42_W::new(self) + pub fn ren42(&mut self) -> REN42_W { + REN42_W::new(self, 10) } #[doc = "Bit 11 - Rising edge enabled 43"] #[inline(always)] #[must_use] - pub fn ren43(&mut self) -> REN43_W { - REN43_W::new(self) + pub fn ren43(&mut self) -> REN43_W { + REN43_W::new(self, 11) } #[doc = "Bit 12 - Rising edge enabled 44"] #[inline(always)] #[must_use] - pub fn ren44(&mut self) -> REN44_W { - REN44_W::new(self) + pub fn ren44(&mut self) -> REN44_W { + REN44_W::new(self, 12) } #[doc = "Bit 13 - Rising edge enabled 45"] #[inline(always)] #[must_use] - pub fn ren45(&mut self) -> REN45_W { - REN45_W::new(self) + pub fn ren45(&mut self) -> REN45_W { + REN45_W::new(self, 13) } #[doc = "Bit 14 - Rising edge enabled 46"] #[inline(always)] #[must_use] - pub fn ren46(&mut self) -> REN46_W { - REN46_W::new(self) + pub fn ren46(&mut self) -> REN46_W { + REN46_W::new(self, 14) } #[doc = "Bit 15 - Rising edge enabled 47"] #[inline(always)] #[must_use] - pub fn ren47(&mut self) -> REN47_W { - REN47_W::new(self) + pub fn ren47(&mut self) -> REN47_W { + REN47_W::new(self, 15) } #[doc = "Bit 16 - Rising edge enabled 48"] #[inline(always)] #[must_use] - pub fn ren48(&mut self) -> REN48_W { - REN48_W::new(self) + pub fn ren48(&mut self) -> REN48_W { + REN48_W::new(self, 16) } #[doc = "Bit 17 - Rising edge enabled 49"] #[inline(always)] #[must_use] - pub fn ren49(&mut self) -> REN49_W { - REN49_W::new(self) + pub fn ren49(&mut self) -> REN49_W { + REN49_W::new(self, 17) } #[doc = "Bit 18 - Rising edge enabled 50"] #[inline(always)] #[must_use] - pub fn ren50(&mut self) -> REN50_W { - REN50_W::new(self) + pub fn ren50(&mut self) -> REN50_W { + REN50_W::new(self, 18) } #[doc = "Bit 19 - Rising edge enabled 51"] #[inline(always)] #[must_use] - pub fn ren51(&mut self) -> REN51_W { - REN51_W::new(self) + pub fn ren51(&mut self) -> REN51_W { + REN51_W::new(self, 19) } #[doc = "Bit 20 - Rising edge enabled 52"] #[inline(always)] #[must_use] - pub fn ren52(&mut self) -> REN52_W { - REN52_W::new(self) + pub fn ren52(&mut self) -> REN52_W { + REN52_W::new(self, 20) } #[doc = "Bit 21 - Rising edge enabled 53"] #[inline(always)] #[must_use] - pub fn ren53(&mut self) -> REN53_W { - REN53_W::new(self) + pub fn ren53(&mut self) -> REN53_W { + REN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpset0.rs b/crates/bcm2835-lpa/src/gpio/gpset0.rs index 513781b..66cbab6 100644 --- a/crates/bcm2835-lpa/src/gpio/gpset0.rs +++ b/crates/bcm2835-lpa/src/gpio/gpset0.rs @@ -1,69 +1,69 @@ #[doc = "Register `GPSET0` writer"] pub type W = crate::W; #[doc = "Field `SET0` writer - Set 0"] -pub type SET0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET1` writer - Set 1"] -pub type SET1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET2` writer - Set 2"] -pub type SET2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET3` writer - Set 3"] -pub type SET3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET4` writer - Set 4"] -pub type SET4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET5` writer - Set 5"] -pub type SET5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET6` writer - Set 6"] -pub type SET6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET7` writer - Set 7"] -pub type SET7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET8` writer - Set 8"] -pub type SET8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET9` writer - Set 9"] -pub type SET9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET10` writer - Set 10"] -pub type SET10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET11` writer - Set 11"] -pub type SET11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET12` writer - Set 12"] -pub type SET12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET13` writer - Set 13"] -pub type SET13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET14` writer - Set 14"] -pub type SET14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET15` writer - Set 15"] -pub type SET15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET16` writer - Set 16"] -pub type SET16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET17` writer - Set 17"] -pub type SET17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET18` writer - Set 18"] -pub type SET18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET19` writer - Set 19"] -pub type SET19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET20` writer - Set 20"] -pub type SET20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET21` writer - Set 21"] -pub type SET21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET22` writer - Set 22"] -pub type SET22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET23` writer - Set 23"] -pub type SET23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET24` writer - Set 24"] -pub type SET24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET25` writer - Set 25"] -pub type SET25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET26` writer - Set 26"] -pub type SET26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET27` writer - Set 27"] -pub type SET27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET28` writer - Set 28"] -pub type SET28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET29` writer - Set 29"] -pub type SET29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET30` writer - Set 30"] -pub type SET30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET31` writer - Set 31"] -pub type SET31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -73,194 +73,194 @@ impl W { #[doc = "Bit 0 - Set 0"] #[inline(always)] #[must_use] - pub fn set0(&mut self) -> SET0_W { - SET0_W::new(self) + pub fn set0(&mut self) -> SET0_W { + SET0_W::new(self, 0) } #[doc = "Bit 1 - Set 1"] #[inline(always)] #[must_use] - pub fn set1(&mut self) -> SET1_W { - SET1_W::new(self) + pub fn set1(&mut self) -> SET1_W { + SET1_W::new(self, 1) } #[doc = "Bit 2 - Set 2"] #[inline(always)] #[must_use] - pub fn set2(&mut self) -> SET2_W { - SET2_W::new(self) + pub fn set2(&mut self) -> SET2_W { + SET2_W::new(self, 2) } #[doc = "Bit 3 - Set 3"] #[inline(always)] #[must_use] - pub fn set3(&mut self) -> SET3_W { - SET3_W::new(self) + pub fn set3(&mut self) -> SET3_W { + SET3_W::new(self, 3) } #[doc = "Bit 4 - Set 4"] #[inline(always)] #[must_use] - pub fn set4(&mut self) -> SET4_W { - SET4_W::new(self) + pub fn set4(&mut self) -> SET4_W { + SET4_W::new(self, 4) } #[doc = "Bit 5 - Set 5"] #[inline(always)] #[must_use] - pub fn set5(&mut self) -> SET5_W { - SET5_W::new(self) + pub fn set5(&mut self) -> SET5_W { + SET5_W::new(self, 5) } #[doc = "Bit 6 - Set 6"] #[inline(always)] #[must_use] - pub fn set6(&mut self) -> SET6_W { - SET6_W::new(self) + pub fn set6(&mut self) -> SET6_W { + SET6_W::new(self, 6) } #[doc = "Bit 7 - Set 7"] #[inline(always)] #[must_use] - pub fn set7(&mut self) -> SET7_W { - SET7_W::new(self) + pub fn set7(&mut self) -> SET7_W { + SET7_W::new(self, 7) } #[doc = "Bit 8 - Set 8"] #[inline(always)] #[must_use] - pub fn set8(&mut self) -> SET8_W { - SET8_W::new(self) + pub fn set8(&mut self) -> SET8_W { + SET8_W::new(self, 8) } #[doc = "Bit 9 - Set 9"] #[inline(always)] #[must_use] - pub fn set9(&mut self) -> SET9_W { - SET9_W::new(self) + pub fn set9(&mut self) -> SET9_W { + SET9_W::new(self, 9) } #[doc = "Bit 10 - Set 10"] #[inline(always)] #[must_use] - pub fn set10(&mut self) -> SET10_W { - SET10_W::new(self) + pub fn set10(&mut self) -> SET10_W { + SET10_W::new(self, 10) } #[doc = "Bit 11 - Set 11"] #[inline(always)] #[must_use] - pub fn set11(&mut self) -> SET11_W { - SET11_W::new(self) + pub fn set11(&mut self) -> SET11_W { + SET11_W::new(self, 11) } #[doc = "Bit 12 - Set 12"] #[inline(always)] #[must_use] - pub fn set12(&mut self) -> SET12_W { - SET12_W::new(self) + pub fn set12(&mut self) -> SET12_W { + SET12_W::new(self, 12) } #[doc = "Bit 13 - Set 13"] #[inline(always)] #[must_use] - pub fn set13(&mut self) -> SET13_W { - SET13_W::new(self) + pub fn set13(&mut self) -> SET13_W { + SET13_W::new(self, 13) } #[doc = "Bit 14 - Set 14"] #[inline(always)] #[must_use] - pub fn set14(&mut self) -> SET14_W { - SET14_W::new(self) + pub fn set14(&mut self) -> SET14_W { + SET14_W::new(self, 14) } #[doc = "Bit 15 - Set 15"] #[inline(always)] #[must_use] - pub fn set15(&mut self) -> SET15_W { - SET15_W::new(self) + pub fn set15(&mut self) -> SET15_W { + SET15_W::new(self, 15) } #[doc = "Bit 16 - Set 16"] #[inline(always)] #[must_use] - pub fn set16(&mut self) -> SET16_W { - SET16_W::new(self) + pub fn set16(&mut self) -> SET16_W { + SET16_W::new(self, 16) } #[doc = "Bit 17 - Set 17"] #[inline(always)] #[must_use] - pub fn set17(&mut self) -> SET17_W { - SET17_W::new(self) + pub fn set17(&mut self) -> SET17_W { + SET17_W::new(self, 17) } #[doc = "Bit 18 - Set 18"] #[inline(always)] #[must_use] - pub fn set18(&mut self) -> SET18_W { - SET18_W::new(self) + pub fn set18(&mut self) -> SET18_W { + SET18_W::new(self, 18) } #[doc = "Bit 19 - Set 19"] #[inline(always)] #[must_use] - pub fn set19(&mut self) -> SET19_W { - SET19_W::new(self) + pub fn set19(&mut self) -> SET19_W { + SET19_W::new(self, 19) } #[doc = "Bit 20 - Set 20"] #[inline(always)] #[must_use] - pub fn set20(&mut self) -> SET20_W { - SET20_W::new(self) + pub fn set20(&mut self) -> SET20_W { + SET20_W::new(self, 20) } #[doc = "Bit 21 - Set 21"] #[inline(always)] #[must_use] - pub fn set21(&mut self) -> SET21_W { - SET21_W::new(self) + pub fn set21(&mut self) -> SET21_W { + SET21_W::new(self, 21) } #[doc = "Bit 22 - Set 22"] #[inline(always)] #[must_use] - pub fn set22(&mut self) -> SET22_W { - SET22_W::new(self) + pub fn set22(&mut self) -> SET22_W { + SET22_W::new(self, 22) } #[doc = "Bit 23 - Set 23"] #[inline(always)] #[must_use] - pub fn set23(&mut self) -> SET23_W { - SET23_W::new(self) + pub fn set23(&mut self) -> SET23_W { + SET23_W::new(self, 23) } #[doc = "Bit 24 - Set 24"] #[inline(always)] #[must_use] - pub fn set24(&mut self) -> SET24_W { - SET24_W::new(self) + pub fn set24(&mut self) -> SET24_W { + SET24_W::new(self, 24) } #[doc = "Bit 25 - Set 25"] #[inline(always)] #[must_use] - pub fn set25(&mut self) -> SET25_W { - SET25_W::new(self) + pub fn set25(&mut self) -> SET25_W { + SET25_W::new(self, 25) } #[doc = "Bit 26 - Set 26"] #[inline(always)] #[must_use] - pub fn set26(&mut self) -> SET26_W { - SET26_W::new(self) + pub fn set26(&mut self) -> SET26_W { + SET26_W::new(self, 26) } #[doc = "Bit 27 - Set 27"] #[inline(always)] #[must_use] - pub fn set27(&mut self) -> SET27_W { - SET27_W::new(self) + pub fn set27(&mut self) -> SET27_W { + SET27_W::new(self, 27) } #[doc = "Bit 28 - Set 28"] #[inline(always)] #[must_use] - pub fn set28(&mut self) -> SET28_W { - SET28_W::new(self) + pub fn set28(&mut self) -> SET28_W { + SET28_W::new(self, 28) } #[doc = "Bit 29 - Set 29"] #[inline(always)] #[must_use] - pub fn set29(&mut self) -> SET29_W { - SET29_W::new(self) + pub fn set29(&mut self) -> SET29_W { + SET29_W::new(self, 29) } #[doc = "Bit 30 - Set 30"] #[inline(always)] #[must_use] - pub fn set30(&mut self) -> SET30_W { - SET30_W::new(self) + pub fn set30(&mut self) -> SET30_W { + SET30_W::new(self, 30) } #[doc = "Bit 31 - Set 31"] #[inline(always)] #[must_use] - pub fn set31(&mut self) -> SET31_W { - SET31_W::new(self) + pub fn set31(&mut self) -> SET31_W { + SET31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/gpio/gpset1.rs b/crates/bcm2835-lpa/src/gpio/gpset1.rs index b6b4b3f..fc6bbc0 100644 --- a/crates/bcm2835-lpa/src/gpio/gpset1.rs +++ b/crates/bcm2835-lpa/src/gpio/gpset1.rs @@ -1,49 +1,49 @@ #[doc = "Register `GPSET1` writer"] pub type W = crate::W; #[doc = "Field `SET32` writer - Set 32"] -pub type SET32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET33` writer - Set 33"] -pub type SET33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET34` writer - Set 34"] -pub type SET34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET35` writer - Set 35"] -pub type SET35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET36` writer - Set 36"] -pub type SET36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET37` writer - Set 37"] -pub type SET37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET38` writer - Set 38"] -pub type SET38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET39` writer - Set 39"] -pub type SET39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET40` writer - Set 40"] -pub type SET40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET41` writer - Set 41"] -pub type SET41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET42` writer - Set 42"] -pub type SET42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET43` writer - Set 43"] -pub type SET43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET44` writer - Set 44"] -pub type SET44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET45` writer - Set 45"] -pub type SET45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET46` writer - Set 46"] -pub type SET46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET47` writer - Set 47"] -pub type SET47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET48` writer - Set 48"] -pub type SET48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET49` writer - Set 49"] -pub type SET49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET50` writer - Set 50"] -pub type SET50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET51` writer - Set 51"] -pub type SET51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET52` writer - Set 52"] -pub type SET52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET53` writer - Set 53"] -pub type SET53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET53_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -53,134 +53,134 @@ impl W { #[doc = "Bit 0 - Set 32"] #[inline(always)] #[must_use] - pub fn set32(&mut self) -> SET32_W { - SET32_W::new(self) + pub fn set32(&mut self) -> SET32_W { + SET32_W::new(self, 0) } #[doc = "Bit 1 - Set 33"] #[inline(always)] #[must_use] - pub fn set33(&mut self) -> SET33_W { - SET33_W::new(self) + pub fn set33(&mut self) -> SET33_W { + SET33_W::new(self, 1) } #[doc = "Bit 2 - Set 34"] #[inline(always)] #[must_use] - pub fn set34(&mut self) -> SET34_W { - SET34_W::new(self) + pub fn set34(&mut self) -> SET34_W { + SET34_W::new(self, 2) } #[doc = "Bit 3 - Set 35"] #[inline(always)] #[must_use] - pub fn set35(&mut self) -> SET35_W { - SET35_W::new(self) + pub fn set35(&mut self) -> SET35_W { + SET35_W::new(self, 3) } #[doc = "Bit 4 - Set 36"] #[inline(always)] #[must_use] - pub fn set36(&mut self) -> SET36_W { - SET36_W::new(self) + pub fn set36(&mut self) -> SET36_W { + SET36_W::new(self, 4) } #[doc = "Bit 5 - Set 37"] #[inline(always)] #[must_use] - pub fn set37(&mut self) -> SET37_W { - SET37_W::new(self) + pub fn set37(&mut self) -> SET37_W { + SET37_W::new(self, 5) } #[doc = "Bit 6 - Set 38"] #[inline(always)] #[must_use] - pub fn set38(&mut self) -> SET38_W { - SET38_W::new(self) + pub fn set38(&mut self) -> SET38_W { + SET38_W::new(self, 6) } #[doc = "Bit 7 - Set 39"] #[inline(always)] #[must_use] - pub fn set39(&mut self) -> SET39_W { - SET39_W::new(self) + pub fn set39(&mut self) -> SET39_W { + SET39_W::new(self, 7) } #[doc = "Bit 8 - Set 40"] #[inline(always)] #[must_use] - pub fn set40(&mut self) -> SET40_W { - SET40_W::new(self) + pub fn set40(&mut self) -> SET40_W { + SET40_W::new(self, 8) } #[doc = "Bit 9 - Set 41"] #[inline(always)] #[must_use] - pub fn set41(&mut self) -> SET41_W { - SET41_W::new(self) + pub fn set41(&mut self) -> SET41_W { + SET41_W::new(self, 9) } #[doc = "Bit 10 - Set 42"] #[inline(always)] #[must_use] - pub fn set42(&mut self) -> SET42_W { - SET42_W::new(self) + pub fn set42(&mut self) -> SET42_W { + SET42_W::new(self, 10) } #[doc = "Bit 11 - Set 43"] #[inline(always)] #[must_use] - pub fn set43(&mut self) -> SET43_W { - SET43_W::new(self) + pub fn set43(&mut self) -> SET43_W { + SET43_W::new(self, 11) } #[doc = "Bit 12 - Set 44"] #[inline(always)] #[must_use] - pub fn set44(&mut self) -> SET44_W { - SET44_W::new(self) + pub fn set44(&mut self) -> SET44_W { + SET44_W::new(self, 12) } #[doc = "Bit 13 - Set 45"] #[inline(always)] #[must_use] - pub fn set45(&mut self) -> SET45_W { - SET45_W::new(self) + pub fn set45(&mut self) -> SET45_W { + SET45_W::new(self, 13) } #[doc = "Bit 14 - Set 46"] #[inline(always)] #[must_use] - pub fn set46(&mut self) -> SET46_W { - SET46_W::new(self) + pub fn set46(&mut self) -> SET46_W { + SET46_W::new(self, 14) } #[doc = "Bit 15 - Set 47"] #[inline(always)] #[must_use] - pub fn set47(&mut self) -> SET47_W { - SET47_W::new(self) + pub fn set47(&mut self) -> SET47_W { + SET47_W::new(self, 15) } #[doc = "Bit 16 - Set 48"] #[inline(always)] #[must_use] - pub fn set48(&mut self) -> SET48_W { - SET48_W::new(self) + pub fn set48(&mut self) -> SET48_W { + SET48_W::new(self, 16) } #[doc = "Bit 17 - Set 49"] #[inline(always)] #[must_use] - pub fn set49(&mut self) -> SET49_W { - SET49_W::new(self) + pub fn set49(&mut self) -> SET49_W { + SET49_W::new(self, 17) } #[doc = "Bit 18 - Set 50"] #[inline(always)] #[must_use] - pub fn set50(&mut self) -> SET50_W { - SET50_W::new(self) + pub fn set50(&mut self) -> SET50_W { + SET50_W::new(self, 18) } #[doc = "Bit 19 - Set 51"] #[inline(always)] #[must_use] - pub fn set51(&mut self) -> SET51_W { - SET51_W::new(self) + pub fn set51(&mut self) -> SET51_W { + SET51_W::new(self, 19) } #[doc = "Bit 20 - Set 52"] #[inline(always)] #[must_use] - pub fn set52(&mut self) -> SET52_W { - SET52_W::new(self) + pub fn set52(&mut self) -> SET52_W { + SET52_W::new(self, 20) } #[doc = "Bit 21 - Set 53"] #[inline(always)] #[must_use] - pub fn set53(&mut self) -> SET53_W { - SET53_W::new(self) + pub fn set53(&mut self) -> SET53_W { + SET53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lib.rs b/crates/bcm2835-lpa/src/lib.rs index 61a46f0..0fea6fe 100644 --- a/crates/bcm2835-lpa/src/lib.rs +++ b/crates/bcm2835-lpa/src/lib.rs @@ -1,18 +1,5 @@ -#![doc = "Peripheral access API for BCM2835_LPA microcontrollers (generated using svd2rust v0.30.3 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.30.3/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] -#![deny(dead_code)] -#![deny(improper_ctypes)] -#![deny(missing_docs)] -#![deny(no_mangle_generic_items)] -#![deny(non_shorthand_field_patterns)] -#![deny(overflowing_literals)] -#![deny(path_statements)] -#![deny(patterns_in_fns_without_body)] -#![deny(unconditional_recursion)] -#![deny(unused_allocation)] -#![deny(unused_comparisons)] -#![deny(unused_parens)] -#![deny(while_true)] +#![doc = "Peripheral access API for BCM2835_LPA microcontrollers (generated using svd2rust v0.31.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.31.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] diff --git a/crates/bcm2835-lpa/src/lic.rs b/crates/bcm2835-lpa/src/lic.rs index 36d6423..bbb8a85 100644 --- a/crates/bcm2835-lpa/src/lic.rs +++ b/crates/bcm2835-lpa/src/lic.rs @@ -3,26 +3,68 @@ #[derive(Debug)] pub struct RegisterBlock { _reserved0: [u8; 0x0200], + basic_pending: BASIC_PENDING, + pending_1: PENDING_1, + pending_2: PENDING_2, + fiq_control: FIQ_CONTROL, + enable_1: ENABLE_1, + enable_2: ENABLE_2, + enable_basic: ENABLE_BASIC, + disable_1: DISABLE_1, + disable_2: DISABLE_2, + disable_basic: DISABLE_BASIC, +} +impl RegisterBlock { #[doc = "0x200 - Basic pending info"] - pub basic_pending: BASIC_PENDING, + #[inline(always)] + pub const fn basic_pending(&self) -> &BASIC_PENDING { + &self.basic_pending + } #[doc = "0x204 - Pending state for interrupts 1 - 31"] - pub pending_1: PENDING_1, + #[inline(always)] + pub const fn pending_1(&self) -> &PENDING_1 { + &self.pending_1 + } #[doc = "0x208 - Pending state for interrupts 32 - 63"] - pub pending_2: PENDING_2, + #[inline(always)] + pub const fn pending_2(&self) -> &PENDING_2 { + &self.pending_2 + } #[doc = "0x20c - FIQ control"] - pub fiq_control: FIQ_CONTROL, + #[inline(always)] + pub const fn fiq_control(&self) -> &FIQ_CONTROL { + &self.fiq_control + } #[doc = "0x210 - Enable interrupts 1 - 31"] - pub enable_1: ENABLE_1, + #[inline(always)] + pub const fn enable_1(&self) -> &ENABLE_1 { + &self.enable_1 + } #[doc = "0x214 - Enable interrupts 32 - 63"] - pub enable_2: ENABLE_2, + #[inline(always)] + pub const fn enable_2(&self) -> &ENABLE_2 { + &self.enable_2 + } #[doc = "0x218 - Enable basic interrupts"] - pub enable_basic: ENABLE_BASIC, + #[inline(always)] + pub const fn enable_basic(&self) -> &ENABLE_BASIC { + &self.enable_basic + } #[doc = "0x21c - Disable interrupts 1 - 31"] - pub disable_1: DISABLE_1, + #[inline(always)] + pub const fn disable_1(&self) -> &DISABLE_1 { + &self.disable_1 + } #[doc = "0x220 - Disable interrupts 32 - 63"] - pub disable_2: DISABLE_2, + #[inline(always)] + pub const fn disable_2(&self) -> &DISABLE_2 { + &self.disable_2 + } #[doc = "0x224 - Disable basic interrupts"] - pub disable_basic: DISABLE_BASIC, + #[inline(always)] + pub const fn disable_basic(&self) -> &DISABLE_BASIC { + &self.disable_basic + } } #[doc = "BASIC_PENDING (r) register accessor: Basic pending info\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`basic_pending::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@basic_pending`] module"] diff --git a/crates/bcm2835-lpa/src/lic/basic_pending.rs b/crates/bcm2835-lpa/src/lic/basic_pending.rs index a88fcb1..e36bb67 100644 --- a/crates/bcm2835-lpa/src/lic/basic_pending.rs +++ b/crates/bcm2835-lpa/src/lic/basic_pending.rs @@ -184,7 +184,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Basic pending info\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`basic_pending::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/lic/disable_1.rs b/crates/bcm2835-lpa/src/lic/disable_1.rs index efd5fcf..d126710 100644 --- a/crates/bcm2835-lpa/src/lic/disable_1.rs +++ b/crates/bcm2835-lpa/src/lic/disable_1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/disable_2.rs b/crates/bcm2835-lpa/src/lic/disable_2.rs index 05263c3..6b92e00 100644 --- a/crates/bcm2835-lpa/src/lic/disable_2.rs +++ b/crates/bcm2835-lpa/src/lic/disable_2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/disable_basic.rs b/crates/bcm2835-lpa/src/lic/disable_basic.rs index da28ed6..dfa6828 100644 --- a/crates/bcm2835-lpa/src/lic/disable_basic.rs +++ b/crates/bcm2835-lpa/src/lic/disable_basic.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -98,57 +98,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/enable_1.rs b/crates/bcm2835-lpa/src/lic/enable_1.rs index d55fb6e..d3032f6 100644 --- a/crates/bcm2835-lpa/src/lic/enable_1.rs +++ b/crates/bcm2835-lpa/src/lic/enable_1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/enable_2.rs b/crates/bcm2835-lpa/src/lic/enable_2.rs index 43769aa..76ba424 100644 --- a/crates/bcm2835-lpa/src/lic/enable_2.rs +++ b/crates/bcm2835-lpa/src/lic/enable_2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/enable_basic.rs b/crates/bcm2835-lpa/src/lic/enable_basic.rs index 3533529..86699b8 100644 --- a/crates/bcm2835-lpa/src/lic/enable_basic.rs +++ b/crates/bcm2835-lpa/src/lic/enable_basic.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -98,57 +98,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/fiq_control.rs b/crates/bcm2835-lpa/src/lic/fiq_control.rs index e7bc947..303b1fd 100644 --- a/crates/bcm2835-lpa/src/lic/fiq_control.rs +++ b/crates/bcm2835-lpa/src/lic/fiq_control.rs @@ -604,8 +604,8 @@ impl SOURCE_R { } } #[doc = "Field `SOURCE` writer - FIQ Source"] -pub type SOURCE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O, SOURCE_A>; -impl<'a, REG, const O: u8> SOURCE_W<'a, REG, O> +pub type SOURCE_W<'a, REG> = crate::FieldWriter<'a, REG, 7, SOURCE_A>; +impl<'a, REG> SOURCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -974,7 +974,7 @@ where #[doc = "Field `ENABLE` reader - FIQ Enable"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - FIQ Enable"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:6 - FIQ Source"] #[inline(always)] @@ -997,21 +997,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - FIQ Source"] #[inline(always)] #[must_use] - pub fn source(&mut self) -> SOURCE_W { - SOURCE_W::new(self) + pub fn source(&mut self) -> SOURCE_W { + SOURCE_W::new(self, 0) } #[doc = "Bit 7 - FIQ Enable"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/lic/pending_1.rs b/crates/bcm2835-lpa/src/lic/pending_1.rs index 8c9286e..fc9091b 100644 --- a/crates/bcm2835-lpa/src/lic/pending_1.rs +++ b/crates/bcm2835-lpa/src/lic/pending_1.rs @@ -278,7 +278,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Pending state for interrupts 1 - 31\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pending_1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/lic/pending_2.rs b/crates/bcm2835-lpa/src/lic/pending_2.rs index fcd18af..df23755 100644 --- a/crates/bcm2835-lpa/src/lic/pending_2.rs +++ b/crates/bcm2835-lpa/src/lic/pending_2.rs @@ -284,7 +284,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Pending state for interrupts 32 - 63\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pending_2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/pm.rs b/crates/bcm2835-lpa/src/pm.rs index 2666514..92c399b 100644 --- a/crates/bcm2835-lpa/src/pm.rs +++ b/crates/bcm2835-lpa/src/pm.rs @@ -3,11 +3,21 @@ #[derive(Debug)] pub struct RegisterBlock { _reserved0: [u8; 0x1c], - #[doc = "0x1c - Reset Control"] - pub rstc: RSTC, + rstc: RSTC, _reserved1: [u8; 0x04], + wdog: WDOG, +} +impl RegisterBlock { + #[doc = "0x1c - Reset Control"] + #[inline(always)] + pub const fn rstc(&self) -> &RSTC { + &self.rstc + } #[doc = "0x24 - Watchdog control"] - pub wdog: WDOG, + #[inline(always)] + pub const fn wdog(&self) -> &WDOG { + &self.wdog + } } #[doc = "RSTC (rw) register accessor: Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rstc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstc`] module"] diff --git a/crates/bcm2835-lpa/src/pm/rstc.rs b/crates/bcm2835-lpa/src/pm/rstc.rs index ffd81ba..d8edcee 100644 --- a/crates/bcm2835-lpa/src/pm/rstc.rs +++ b/crates/bcm2835-lpa/src/pm/rstc.rs @@ -36,8 +36,8 @@ impl WRCFG_R { } } #[doc = "Field `WRCFG` writer - Watchdog reset config"] -pub type WRCFG_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, WRCFG_A>; -impl<'a, REG, const O: u8> WRCFG_W<'a, REG, O> +pub type WRCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WRCFG_A>; +impl<'a, REG> WRCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -65,8 +65,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -93,21 +93,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 4:5 - Watchdog reset config"] #[inline(always)] #[must_use] - pub fn wrcfg(&mut self) -> WRCFG_W { - WRCFG_W::new(self) + pub fn wrcfg(&mut self) -> WRCFG_W { + WRCFG_W::new(self, 4) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/pm/wdog.rs b/crates/bcm2835-lpa/src/pm/wdog.rs index ff92afc..8abd535 100644 --- a/crates/bcm2835-lpa/src/pm/wdog.rs +++ b/crates/bcm2835-lpa/src/pm/wdog.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TIME` reader - Time until watchdog alarm"] pub type TIME_R = crate::FieldReader; #[doc = "Field `TIME` writer - Time until watchdog alarm"] -pub type TIME_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 20, O, u32>; +pub type TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -23,8 +23,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -51,21 +51,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:19 - Time until watchdog alarm"] #[inline(always)] #[must_use] - pub fn time(&mut self) -> TIME_W { - TIME_W::new(self) + pub fn time(&mut self) -> TIME_W { + TIME_W::new(self, 0) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/pwm0.rs b/crates/bcm2835-lpa/src/pwm0.rs index 4306916..3a98ec3 100644 --- a/crates/bcm2835-lpa/src/pwm0.rs +++ b/crates/bcm2835-lpa/src/pwm0.rs @@ -2,24 +2,58 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + ctl: CTL, + sta: STA, + dmac: DMAC, + _reserved3: [u8; 0x04], + rng1: RNG1, + dat1: DAT1, + fif1: FIF1, + _reserved6: [u8; 0x04], + rng2: RNG2, + dat2: DAT2, +} +impl RegisterBlock { #[doc = "0x00 - Control"] - pub ctl: CTL, + #[inline(always)] + pub const fn ctl(&self) -> &CTL { + &self.ctl + } #[doc = "0x04 - Status"] - pub sta: STA, + #[inline(always)] + pub const fn sta(&self) -> &STA { + &self.sta + } #[doc = "0x08 - DMA control"] - pub dmac: DMAC, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn dmac(&self) -> &DMAC { + &self.dmac + } #[doc = "0x10 - Range for channel 1"] - pub rng1: RNG1, + #[inline(always)] + pub const fn rng1(&self) -> &RNG1 { + &self.rng1 + } #[doc = "0x14 - Channel 1 data"] - pub dat1: DAT1, + #[inline(always)] + pub const fn dat1(&self) -> &DAT1 { + &self.dat1 + } #[doc = "0x18 - FIFO input"] - pub fif1: FIF1, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn fif1(&self) -> &FIF1 { + &self.fif1 + } #[doc = "0x20 - Range for channel 2"] - pub rng2: RNG2, + #[inline(always)] + pub const fn rng2(&self) -> &RNG2 { + &self.rng2 + } #[doc = "0x24 - Channel 2 data"] - pub dat2: DAT2, + #[inline(always)] + pub const fn dat2(&self) -> &DAT2 { + &self.dat2 + } } #[doc = "CTL (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctl`] module"] diff --git a/crates/bcm2835-lpa/src/pwm0/ctl.rs b/crates/bcm2835-lpa/src/pwm0/ctl.rs index d1b9d57..775bd00 100644 --- a/crates/bcm2835-lpa/src/pwm0/ctl.rs +++ b/crates/bcm2835-lpa/src/pwm0/ctl.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PWEN1` reader - Enable channel 1"] pub type PWEN1_R = crate::BitReader; #[doc = "Field `PWEN1` writer - Enable channel 1"] -pub type PWEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MODE1` reader - Channel 1 mode"] pub type MODE1_R = crate::BitReader; #[doc = "Channel 1 mode\n\nValue on reset: 0"] @@ -43,8 +43,8 @@ impl MODE1_R { } } #[doc = "Field `MODE1` writer - Channel 1 mode"] -pub type MODE1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MODE1_A>; -impl<'a, REG, const O: u8> MODE1_W<'a, REG, O> +pub type MODE1_W<'a, REG> = crate::BitWriter<'a, REG, MODE1_A>; +impl<'a, REG> MODE1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -62,31 +62,31 @@ where #[doc = "Field `RPTL1` reader - Repeat last value from FIFO for channel 1"] pub type RPTL1_R = crate::BitReader; #[doc = "Field `RPTL1` writer - Repeat last value from FIFO for channel 1"] -pub type RPTL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPTL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBIT1` reader - State when not transmitting on channel 1"] pub type SBIT1_R = crate::BitReader; #[doc = "Field `SBIT1` writer - State when not transmitting on channel 1"] -pub type SBIT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SBIT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLA1` reader - Channel 1 polarity inverted"] pub type POLA1_R = crate::BitReader; #[doc = "Field `POLA1` writer - Channel 1 polarity inverted"] -pub type POLA1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POLA1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEF1` reader - Use FIFO for channel 1"] pub type USEF1_R = crate::BitReader; #[doc = "Field `USEF1` writer - Use FIFO for channel 1"] -pub type USEF1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USEF1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLRF1` reader - Clear FIFO"] pub type CLRF1_R = crate::BitReader; #[doc = "Field `CLRF1` writer - Clear FIFO"] -pub type CLRF1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLRF1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSEN1` reader - M/S mode for channel 1"] pub type MSEN1_R = crate::BitReader; #[doc = "Field `MSEN1` writer - M/S mode for channel 1"] -pub type MSEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWEN2` reader - Enable channel 2"] pub type PWEN2_R = crate::BitReader; #[doc = "Field `PWEN2` writer - Enable channel 2"] -pub type PWEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MODE2` reader - Channel 2 mode"] pub type MODE2_R = crate::BitReader; #[doc = "Channel 2 mode\n\nValue on reset: 0"] @@ -124,8 +124,8 @@ impl MODE2_R { } } #[doc = "Field `MODE2` writer - Channel 2 mode"] -pub type MODE2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MODE2_A>; -impl<'a, REG, const O: u8> MODE2_W<'a, REG, O> +pub type MODE2_W<'a, REG> = crate::BitWriter<'a, REG, MODE2_A>; +impl<'a, REG> MODE2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -143,23 +143,23 @@ where #[doc = "Field `RPTL2` reader - Repeat last value from FIFO for channel 2"] pub type RPTL2_R = crate::BitReader; #[doc = "Field `RPTL2` writer - Repeat last value from FIFO for channel 2"] -pub type RPTL2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPTL2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBIT2` reader - State when not transmitting on channel 2"] pub type SBIT2_R = crate::BitReader; #[doc = "Field `SBIT2` writer - State when not transmitting on channel 2"] -pub type SBIT2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SBIT2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLA2` reader - Channel 2 polarity inverted"] pub type POLA2_R = crate::BitReader; #[doc = "Field `POLA2` writer - Channel 2 polarity inverted"] -pub type POLA2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POLA2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEF2` reader - Use FIFO for channel 2"] pub type USEF2_R = crate::BitReader; #[doc = "Field `USEF2` writer - Use FIFO for channel 2"] -pub type USEF2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USEF2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSEN2` reader - M/S mode for channel 2"] pub type MSEN2_R = crate::BitReader; #[doc = "Field `MSEN2` writer - M/S mode for channel 2"] -pub type MSEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSEN2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] @@ -260,99 +260,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] #[must_use] - pub fn pwen1(&mut self) -> PWEN1_W { - PWEN1_W::new(self) + pub fn pwen1(&mut self) -> PWEN1_W { + PWEN1_W::new(self, 0) } #[doc = "Bit 1 - Channel 1 mode"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W { - MODE1_W::new(self) + pub fn mode1(&mut self) -> MODE1_W { + MODE1_W::new(self, 1) } #[doc = "Bit 2 - Repeat last value from FIFO for channel 1"] #[inline(always)] #[must_use] - pub fn rptl1(&mut self) -> RPTL1_W { - RPTL1_W::new(self) + pub fn rptl1(&mut self) -> RPTL1_W { + RPTL1_W::new(self, 2) } #[doc = "Bit 3 - State when not transmitting on channel 1"] #[inline(always)] #[must_use] - pub fn sbit1(&mut self) -> SBIT1_W { - SBIT1_W::new(self) + pub fn sbit1(&mut self) -> SBIT1_W { + SBIT1_W::new(self, 3) } #[doc = "Bit 4 - Channel 1 polarity inverted"] #[inline(always)] #[must_use] - pub fn pola1(&mut self) -> POLA1_W { - POLA1_W::new(self) + pub fn pola1(&mut self) -> POLA1_W { + POLA1_W::new(self, 4) } #[doc = "Bit 5 - Use FIFO for channel 1"] #[inline(always)] #[must_use] - pub fn usef1(&mut self) -> USEF1_W { - USEF1_W::new(self) + pub fn usef1(&mut self) -> USEF1_W { + USEF1_W::new(self, 5) } #[doc = "Bit 6 - Clear FIFO"] #[inline(always)] #[must_use] - pub fn clrf1(&mut self) -> CLRF1_W { - CLRF1_W::new(self) + pub fn clrf1(&mut self) -> CLRF1_W { + CLRF1_W::new(self, 6) } #[doc = "Bit 7 - M/S mode for channel 1"] #[inline(always)] #[must_use] - pub fn msen1(&mut self) -> MSEN1_W { - MSEN1_W::new(self) + pub fn msen1(&mut self) -> MSEN1_W { + MSEN1_W::new(self, 7) } #[doc = "Bit 8 - Enable channel 2"] #[inline(always)] #[must_use] - pub fn pwen2(&mut self) -> PWEN2_W { - PWEN2_W::new(self) + pub fn pwen2(&mut self) -> PWEN2_W { + PWEN2_W::new(self, 8) } #[doc = "Bit 9 - Channel 2 mode"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W { - MODE2_W::new(self) + pub fn mode2(&mut self) -> MODE2_W { + MODE2_W::new(self, 9) } #[doc = "Bit 10 - Repeat last value from FIFO for channel 2"] #[inline(always)] #[must_use] - pub fn rptl2(&mut self) -> RPTL2_W { - RPTL2_W::new(self) + pub fn rptl2(&mut self) -> RPTL2_W { + RPTL2_W::new(self, 10) } #[doc = "Bit 11 - State when not transmitting on channel 2"] #[inline(always)] #[must_use] - pub fn sbit2(&mut self) -> SBIT2_W { - SBIT2_W::new(self) + pub fn sbit2(&mut self) -> SBIT2_W { + SBIT2_W::new(self, 11) } #[doc = "Bit 12 - Channel 2 polarity inverted"] #[inline(always)] #[must_use] - pub fn pola2(&mut self) -> POLA2_W { - POLA2_W::new(self) + pub fn pola2(&mut self) -> POLA2_W { + POLA2_W::new(self, 12) } #[doc = "Bit 13 - Use FIFO for channel 2"] #[inline(always)] #[must_use] - pub fn usef2(&mut self) -> USEF2_W { - USEF2_W::new(self) + pub fn usef2(&mut self) -> USEF2_W { + USEF2_W::new(self, 13) } #[doc = "Bit 15 - M/S mode for channel 2"] #[inline(always)] #[must_use] - pub fn msen2(&mut self) -> MSEN2_W { - MSEN2_W::new(self) + pub fn msen2(&mut self) -> MSEN2_W { + MSEN2_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/pwm0/dat1.rs b/crates/bcm2835-lpa/src/pwm0/dat1.rs index b70672a..d7e256f 100644 --- a/crates/bcm2835-lpa/src/pwm0/dat1.rs +++ b/crates/bcm2835-lpa/src/pwm0/dat1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/pwm0/dat2.rs b/crates/bcm2835-lpa/src/pwm0/dat2.rs index 00bb85f..eb9a92e 100644 --- a/crates/bcm2835-lpa/src/pwm0/dat2.rs +++ b/crates/bcm2835-lpa/src/pwm0/dat2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/pwm0/dmac.rs b/crates/bcm2835-lpa/src/pwm0/dmac.rs index d73ccfd..481d414 100644 --- a/crates/bcm2835-lpa/src/pwm0/dmac.rs +++ b/crates/bcm2835-lpa/src/pwm0/dmac.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `DREQ` reader - DMA threshold for DREQ signal"] pub type DREQ_R = crate::FieldReader; #[doc = "Field `DREQ` writer - DMA threshold for DREQ signal"] -pub type DREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PANIC` reader - DMA threshold for panic signal"] pub type PANIC_R = crate::FieldReader; #[doc = "Field `PANIC` writer - DMA threshold for panic signal"] -pub type PANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ENAB` reader - DMA enabled"] pub type ENAB_R = crate::BitReader; #[doc = "Field `ENAB` writer - DMA enabled"] -pub type ENAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENAB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - DMA threshold for DREQ signal"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA threshold for DREQ signal"] #[inline(always)] #[must_use] - pub fn dreq(&mut self) -> DREQ_W { - DREQ_W::new(self) + pub fn dreq(&mut self) -> DREQ_W { + DREQ_W::new(self, 0) } #[doc = "Bits 8:15 - DMA threshold for panic signal"] #[inline(always)] #[must_use] - pub fn panic(&mut self) -> PANIC_W { - PANIC_W::new(self) + pub fn panic(&mut self) -> PANIC_W { + PANIC_W::new(self, 8) } #[doc = "Bit 31 - DMA enabled"] #[inline(always)] #[must_use] - pub fn enab(&mut self) -> ENAB_W { - ENAB_W::new(self) + pub fn enab(&mut self) -> ENAB_W { + ENAB_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/pwm0/rng1.rs b/crates/bcm2835-lpa/src/pwm0/rng1.rs index 2a01d68..2f3996b 100644 --- a/crates/bcm2835-lpa/src/pwm0/rng1.rs +++ b/crates/bcm2835-lpa/src/pwm0/rng1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/pwm0/rng2.rs b/crates/bcm2835-lpa/src/pwm0/rng2.rs index c7a9f74..c1b9401 100644 --- a/crates/bcm2835-lpa/src/pwm0/rng2.rs +++ b/crates/bcm2835-lpa/src/pwm0/rng2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/pwm0/sta.rs b/crates/bcm2835-lpa/src/pwm0/sta.rs index a0076a9..6429987 100644 --- a/crates/bcm2835-lpa/src/pwm0/sta.rs +++ b/crates/bcm2835-lpa/src/pwm0/sta.rs @@ -5,55 +5,55 @@ pub type W = crate::W; #[doc = "Field `FULL1` reader - FIFO full"] pub type FULL1_R = crate::BitReader; #[doc = "Field `FULL1` writer - FIFO full"] -pub type FULL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FULL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMPT1` reader - FIFO empty"] pub type EMPT1_R = crate::BitReader; #[doc = "Field `EMPT1` writer - FIFO empty"] -pub type EMPT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EMPT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WERR1` reader - FIFO write error"] pub type WERR1_R = crate::BitReader; #[doc = "Field `WERR1` writer - FIFO write error"] -pub type WERR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WERR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RERR1` reader - FIFO read error"] pub type RERR1_R = crate::BitReader; #[doc = "Field `RERR1` writer - FIFO read error"] -pub type RERR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RERR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO1` reader - Channel 1 gap occurred"] pub type GAPO1_R = crate::BitReader; #[doc = "Field `GAPO1` writer - Channel 1 gap occurred"] -pub type GAPO1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO2` reader - Channel 2 gap occurred"] pub type GAPO2_R = crate::BitReader; #[doc = "Field `GAPO2` writer - Channel 2 gap occurred"] -pub type GAPO2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO3` reader - Channel 3 gap occurred"] pub type GAPO3_R = crate::BitReader; #[doc = "Field `GAPO3` writer - Channel 3 gap occurred"] -pub type GAPO3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO4` reader - Channel 4 gap occurred"] pub type GAPO4_R = crate::BitReader; #[doc = "Field `GAPO4` writer - Channel 4 gap occurred"] -pub type GAPO4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERR` reader - Bus error"] pub type BERR_R = crate::BitReader; #[doc = "Field `BERR` writer - Bus error"] -pub type BERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA1` reader - Channel 1 state"] pub type STA1_R = crate::BitReader; #[doc = "Field `STA1` writer - Channel 1 state"] -pub type STA1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA2` reader - Channel 2 state"] pub type STA2_R = crate::BitReader; #[doc = "Field `STA2` writer - Channel 2 state"] -pub type STA2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA3` reader - Channel 3 state"] pub type STA3_R = crate::BitReader; #[doc = "Field `STA3` writer - Channel 3 state"] -pub type STA3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA4` reader - Channel 4 state"] pub type STA4_R = crate::BitReader; #[doc = "Field `STA4` writer - Channel 4 state"] -pub type STA4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA4_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - FIFO full"] #[inline(always)] @@ -142,87 +142,87 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - FIFO full"] #[inline(always)] #[must_use] - pub fn full1(&mut self) -> FULL1_W { - FULL1_W::new(self) + pub fn full1(&mut self) -> FULL1_W { + FULL1_W::new(self, 0) } #[doc = "Bit 1 - FIFO empty"] #[inline(always)] #[must_use] - pub fn empt1(&mut self) -> EMPT1_W { - EMPT1_W::new(self) + pub fn empt1(&mut self) -> EMPT1_W { + EMPT1_W::new(self, 1) } #[doc = "Bit 2 - FIFO write error"] #[inline(always)] #[must_use] - pub fn werr1(&mut self) -> WERR1_W { - WERR1_W::new(self) + pub fn werr1(&mut self) -> WERR1_W { + WERR1_W::new(self, 2) } #[doc = "Bit 3 - FIFO read error"] #[inline(always)] #[must_use] - pub fn rerr1(&mut self) -> RERR1_W { - RERR1_W::new(self) + pub fn rerr1(&mut self) -> RERR1_W { + RERR1_W::new(self, 3) } #[doc = "Bit 4 - Channel 1 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo1(&mut self) -> GAPO1_W { - GAPO1_W::new(self) + pub fn gapo1(&mut self) -> GAPO1_W { + GAPO1_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo2(&mut self) -> GAPO2_W { - GAPO2_W::new(self) + pub fn gapo2(&mut self) -> GAPO2_W { + GAPO2_W::new(self, 5) } #[doc = "Bit 6 - Channel 3 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo3(&mut self) -> GAPO3_W { - GAPO3_W::new(self) + pub fn gapo3(&mut self) -> GAPO3_W { + GAPO3_W::new(self, 6) } #[doc = "Bit 7 - Channel 4 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo4(&mut self) -> GAPO4_W { - GAPO4_W::new(self) + pub fn gapo4(&mut self) -> GAPO4_W { + GAPO4_W::new(self, 7) } #[doc = "Bit 8 - Bus error"] #[inline(always)] #[must_use] - pub fn berr(&mut self) -> BERR_W { - BERR_W::new(self) + pub fn berr(&mut self) -> BERR_W { + BERR_W::new(self, 8) } #[doc = "Bit 9 - Channel 1 state"] #[inline(always)] #[must_use] - pub fn sta1(&mut self) -> STA1_W { - STA1_W::new(self) + pub fn sta1(&mut self) -> STA1_W { + STA1_W::new(self, 9) } #[doc = "Bit 10 - Channel 2 state"] #[inline(always)] #[must_use] - pub fn sta2(&mut self) -> STA2_W { - STA2_W::new(self) + pub fn sta2(&mut self) -> STA2_W { + STA2_W::new(self, 10) } #[doc = "Bit 11 - Channel 3 state"] #[inline(always)] #[must_use] - pub fn sta3(&mut self) -> STA3_W { - STA3_W::new(self) + pub fn sta3(&mut self) -> STA3_W { + STA3_W::new(self, 11) } #[doc = "Bit 12 - Channel 4 state"] #[inline(always)] #[must_use] - pub fn sta4(&mut self) -> STA4_W { - STA4_W::new(self) + pub fn sta4(&mut self) -> STA4_W { + STA4_W::new(self, 12) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi0.rs b/crates/bcm2835-lpa/src/spi0.rs index 66be9b6..bcd4b68 100644 --- a/crates/bcm2835-lpa/src/spi0.rs +++ b/crates/bcm2835-lpa/src/spi0.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + fifo: FIFO, + clk: CLK, + dlen: DLEN, + ltoh: LTOH, + dc: DC, +} +impl RegisterBlock { #[doc = "0x00 - Control and Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - FIFO access"] - pub fifo: FIFO, + #[inline(always)] + pub const fn fifo(&self) -> &FIFO { + &self.fifo + } #[doc = "0x08 - Clock divider"] - pub clk: CLK, + #[inline(always)] + pub const fn clk(&self) -> &CLK { + &self.clk + } #[doc = "0x0c - Data length"] - pub dlen: DLEN, + #[inline(always)] + pub const fn dlen(&self) -> &DLEN { + &self.dlen + } #[doc = "0x10 - LoSSI output hold delay"] - pub ltoh: LTOH, + #[inline(always)] + pub const fn ltoh(&self) -> <OH { + &self.ltoh + } #[doc = "0x14 - "] - pub dc: DC, + #[inline(always)] + pub const fn dc(&self) -> &DC { + &self.dc + } } #[doc = "CS (rw) register accessor: Control and Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2835-lpa/src/spi0/clk.rs b/crates/bcm2835-lpa/src/spi0/clk.rs index 54ce877..280645f 100644 --- a/crates/bcm2835-lpa/src/spi0/clk.rs +++ b/crates/bcm2835-lpa/src/spi0/clk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CDIV` reader - Clock divider"] pub type CDIV_R = crate::FieldReader; #[doc = "Field `CDIV` writer - Clock divider"] -pub type CDIV_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type CDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Clock divider"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Clock divider"] #[inline(always)] #[must_use] - pub fn cdiv(&mut self) -> CDIV_W { - CDIV_W::new(self) + pub fn cdiv(&mut self) -> CDIV_W { + CDIV_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi0/cs.rs b/crates/bcm2835-lpa/src/spi0/cs.rs index 06511e6..edf286a 100644 --- a/crates/bcm2835-lpa/src/spi0/cs.rs +++ b/crates/bcm2835-lpa/src/spi0/cs.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `CS` reader - Chip select"] pub type CS_R = crate::FieldReader; #[doc = "Field `CS` writer - Chip select"] -pub type CS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CPHA` reader - Clock phase"] pub type CPHA_R = crate::BitReader; #[doc = "Field `CPHA` writer - Clock phase"] -pub type CPHA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPHA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPOL` reader - Clock polarity"] pub type CPOL_R = crate::BitReader; #[doc = "Field `CPOL` writer - Clock polarity"] -pub type CPOL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPOL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` reader - Clear the FIFO(s)"] pub type CLEAR_R = crate::FieldReader; #[doc = "Clear the FIFO(s)\n\nValue on reset: 0"] @@ -64,8 +64,8 @@ impl CLEAR_R { } } #[doc = "Field `CLEAR` writer - Clear the FIFO(s)"] -pub type CLEAR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, CLEAR_A>; -impl<'a, REG, const O: u8> CLEAR_W<'a, REG, O> +pub type CLEAR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CLEAR_A>; +impl<'a, REG> CLEAR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -89,43 +89,43 @@ where #[doc = "Field `CSPOL` reader - Chip select polarity"] pub type CSPOL_R = crate::BitReader; #[doc = "Field `CSPOL` writer - Chip select polarity"] -pub type CSPOL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TA` reader - Transfer active"] pub type TA_R = crate::BitReader; #[doc = "Field `TA` writer - Transfer active"] -pub type TA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAEN` reader - Enable DMA"] pub type DMAEN_R = crate::BitReader; #[doc = "Field `DMAEN` writer - Enable DMA"] -pub type DMAEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTD` reader - Interrupt on done"] pub type INTD_R = crate::BitReader; #[doc = "Field `INTD` writer - Interrupt on done"] -pub type INTD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTR` reader - Interrupt on RX"] pub type INTR_R = crate::BitReader; #[doc = "Field `INTR` writer - Interrupt on RX"] -pub type INTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADCS` reader - Automatically deassert chip select"] pub type ADCS_R = crate::BitReader; #[doc = "Field `ADCS` writer - Automatically deassert chip select"] -pub type ADCS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ADCS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN` reader - Read enable"] pub type REN_R = crate::BitReader; #[doc = "Field `REN` writer - Read enable"] -pub type REN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN` reader - LoSSI enable"] pub type LEN_R = crate::BitReader; #[doc = "Field `LEN` writer - LoSSI enable"] -pub type LEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LMONO` reader - "] pub type LMONO_R = crate::BitReader; #[doc = "Field `LMONO` writer - "] -pub type LMONO_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LMONO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TE_EN` reader - "] pub type TE_EN_R = crate::BitReader; #[doc = "Field `TE_EN` writer - "] -pub type TE_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TE_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE` reader - Transfer is done"] pub type DONE_R = crate::BitReader; #[doc = "Field `RXD` reader - RX FIFO contains data"] @@ -139,23 +139,23 @@ pub type RXF_R = crate::BitReader; #[doc = "Field `CSPOL0` reader - Chip select 0 polarity"] pub type CSPOL0_R = crate::BitReader; #[doc = "Field `CSPOL0` writer - Chip select 0 polarity"] -pub type CSPOL0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSPOL1` reader - Chip select 1 polarity"] pub type CSPOL1_R = crate::BitReader; #[doc = "Field `CSPOL1` writer - Chip select 1 polarity"] -pub type CSPOL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSPOL2` reader - Chip select 2 polarity"] pub type CSPOL2_R = crate::BitReader; #[doc = "Field `CSPOL2` writer - Chip select 2 polarity"] -pub type CSPOL2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_LEN` reader - Enable DMA in LoSSI mode"] pub type DMA_LEN_R = crate::BitReader; #[doc = "Field `DMA_LEN` writer - Enable DMA in LoSSI mode"] -pub type DMA_LEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_LEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN_LONG` reader - Enable long data word in LoSSI mode"] pub type LEN_LONG_R = crate::BitReader; #[doc = "Field `LEN_LONG` writer - Enable long data word in LoSSI mode"] -pub type LEN_LONG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN_LONG_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Chip select"] #[inline(always)] @@ -310,123 +310,123 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Chip select"] #[inline(always)] #[must_use] - pub fn cs(&mut self) -> CS_W { - CS_W::new(self) + pub fn cs(&mut self) -> CS_W { + CS_W::new(self, 0) } #[doc = "Bit 2 - Clock phase"] #[inline(always)] #[must_use] - pub fn cpha(&mut self) -> CPHA_W { - CPHA_W::new(self) + pub fn cpha(&mut self) -> CPHA_W { + CPHA_W::new(self, 2) } #[doc = "Bit 3 - Clock polarity"] #[inline(always)] #[must_use] - pub fn cpol(&mut self) -> CPOL_W { - CPOL_W::new(self) + pub fn cpol(&mut self) -> CPOL_W { + CPOL_W::new(self, 3) } #[doc = "Bits 4:5 - Clear the FIFO(s)"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W::new(self) + pub fn clear(&mut self) -> CLEAR_W { + CLEAR_W::new(self, 4) } #[doc = "Bit 6 - Chip select polarity"] #[inline(always)] #[must_use] - pub fn cspol(&mut self) -> CSPOL_W { - CSPOL_W::new(self) + pub fn cspol(&mut self) -> CSPOL_W { + CSPOL_W::new(self, 6) } #[doc = "Bit 7 - Transfer active"] #[inline(always)] #[must_use] - pub fn ta(&mut self) -> TA_W { - TA_W::new(self) + pub fn ta(&mut self) -> TA_W { + TA_W::new(self, 7) } #[doc = "Bit 8 - Enable DMA"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 8) } #[doc = "Bit 9 - Interrupt on done"] #[inline(always)] #[must_use] - pub fn intd(&mut self) -> INTD_W { - INTD_W::new(self) + pub fn intd(&mut self) -> INTD_W { + INTD_W::new(self, 9) } #[doc = "Bit 10 - Interrupt on RX"] #[inline(always)] #[must_use] - pub fn intr(&mut self) -> INTR_W { - INTR_W::new(self) + pub fn intr(&mut self) -> INTR_W { + INTR_W::new(self, 10) } #[doc = "Bit 11 - Automatically deassert chip select"] #[inline(always)] #[must_use] - pub fn adcs(&mut self) -> ADCS_W { - ADCS_W::new(self) + pub fn adcs(&mut self) -> ADCS_W { + ADCS_W::new(self, 11) } #[doc = "Bit 12 - Read enable"] #[inline(always)] #[must_use] - pub fn ren(&mut self) -> REN_W { - REN_W::new(self) + pub fn ren(&mut self) -> REN_W { + REN_W::new(self, 12) } #[doc = "Bit 13 - LoSSI enable"] #[inline(always)] #[must_use] - pub fn len(&mut self) -> LEN_W { - LEN_W::new(self) + pub fn len(&mut self) -> LEN_W { + LEN_W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] #[must_use] - pub fn lmono(&mut self) -> LMONO_W { - LMONO_W::new(self) + pub fn lmono(&mut self) -> LMONO_W { + LMONO_W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] #[must_use] - pub fn te_en(&mut self) -> TE_EN_W { - TE_EN_W::new(self) + pub fn te_en(&mut self) -> TE_EN_W { + TE_EN_W::new(self, 15) } #[doc = "Bit 21 - Chip select 0 polarity"] #[inline(always)] #[must_use] - pub fn cspol0(&mut self) -> CSPOL0_W { - CSPOL0_W::new(self) + pub fn cspol0(&mut self) -> CSPOL0_W { + CSPOL0_W::new(self, 21) } #[doc = "Bit 22 - Chip select 1 polarity"] #[inline(always)] #[must_use] - pub fn cspol1(&mut self) -> CSPOL1_W { - CSPOL1_W::new(self) + pub fn cspol1(&mut self) -> CSPOL1_W { + CSPOL1_W::new(self, 22) } #[doc = "Bit 23 - Chip select 2 polarity"] #[inline(always)] #[must_use] - pub fn cspol2(&mut self) -> CSPOL2_W { - CSPOL2_W::new(self) + pub fn cspol2(&mut self) -> CSPOL2_W { + CSPOL2_W::new(self, 23) } #[doc = "Bit 24 - Enable DMA in LoSSI mode"] #[inline(always)] #[must_use] - pub fn dma_len(&mut self) -> DMA_LEN_W { - DMA_LEN_W::new(self) + pub fn dma_len(&mut self) -> DMA_LEN_W { + DMA_LEN_W::new(self, 24) } #[doc = "Bit 25 - Enable long data word in LoSSI mode"] #[inline(always)] #[must_use] - pub fn len_long(&mut self) -> LEN_LONG_W { - LEN_LONG_W::new(self) + pub fn len_long(&mut self) -> LEN_LONG_W { + LEN_LONG_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi0/dc.rs b/crates/bcm2835-lpa/src/spi0/dc.rs index 23813da..a6b1267 100644 --- a/crates/bcm2835-lpa/src/spi0/dc.rs +++ b/crates/bcm2835-lpa/src/spi0/dc.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TDREQ` reader - DMA Write request threshold"] pub type TDREQ_R = crate::FieldReader; #[doc = "Field `TDREQ` writer - DMA Write request threshold"] -pub type TDREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TDREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TPANIC` reader - DMA write panic threshold"] pub type TPANIC_R = crate::FieldReader; #[doc = "Field `TPANIC` writer - DMA write panic threshold"] -pub type TPANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TPANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RDREQ` reader - DMA read request threshold"] pub type RDREQ_R = crate::FieldReader; #[doc = "Field `RDREQ` writer - DMA read request threshold"] -pub type RDREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RDREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RPANIC` reader - DMA read panic threshold"] pub type RPANIC_R = crate::FieldReader; #[doc = "Field `RPANIC` writer - DMA read panic threshold"] -pub type RPANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RPANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Write request threshold"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA Write request threshold"] #[inline(always)] #[must_use] - pub fn tdreq(&mut self) -> TDREQ_W { - TDREQ_W::new(self) + pub fn tdreq(&mut self) -> TDREQ_W { + TDREQ_W::new(self, 0) } #[doc = "Bits 8:15 - DMA write panic threshold"] #[inline(always)] #[must_use] - pub fn tpanic(&mut self) -> TPANIC_W { - TPANIC_W::new(self) + pub fn tpanic(&mut self) -> TPANIC_W { + TPANIC_W::new(self, 8) } #[doc = "Bits 16:23 - DMA read request threshold"] #[inline(always)] #[must_use] - pub fn rdreq(&mut self) -> RDREQ_W { - RDREQ_W::new(self) + pub fn rdreq(&mut self) -> RDREQ_W { + RDREQ_W::new(self, 16) } #[doc = "Bits 24:31 - DMA read panic threshold"] #[inline(always)] #[must_use] - pub fn rpanic(&mut self) -> RPANIC_W { - RPANIC_W::new(self) + pub fn rpanic(&mut self) -> RPANIC_W { + RPANIC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi0/dlen.rs b/crates/bcm2835-lpa/src/spi0/dlen.rs index 5c7bb83..c86b386 100644 --- a/crates/bcm2835-lpa/src/spi0/dlen.rs +++ b/crates/bcm2835-lpa/src/spi0/dlen.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DLEN` reader - Data length"] pub type DLEN_R = crate::FieldReader; #[doc = "Field `DLEN` writer - Data length"] -pub type DLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Data length"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Data length"] #[inline(always)] #[must_use] - pub fn dlen(&mut self) -> DLEN_W { - DLEN_W::new(self) + pub fn dlen(&mut self) -> DLEN_W { + DLEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi0/fifo.rs b/crates/bcm2835-lpa/src/spi0/fifo.rs index 937c27b..e85c975 100644 --- a/crates/bcm2835-lpa/src/spi0/fifo.rs +++ b/crates/bcm2835-lpa/src/spi0/fifo.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi0/ltoh.rs b/crates/bcm2835-lpa/src/spi0/ltoh.rs index 15d66d8..b968dfa 100644 --- a/crates/bcm2835-lpa/src/spi0/ltoh.rs +++ b/crates/bcm2835-lpa/src/spi0/ltoh.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOH` reader - Output hold delay"] pub type TOH_R = crate::FieldReader; #[doc = "Field `TOH` writer - Output hold delay"] -pub type TOH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TOH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Output hold delay"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:3 - Output hold delay"] #[inline(always)] #[must_use] - pub fn toh(&mut self) -> TOH_W { - TOH_W::new(self) + pub fn toh(&mut self) -> TOH_W { + TOH_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi1.rs b/crates/bcm2835-lpa/src/spi1.rs index 0031aa9..2dab98b 100644 --- a/crates/bcm2835-lpa/src/spi1.rs +++ b/crates/bcm2835-lpa/src/spi1.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cntl0: CNTL0, + cntl1: CNTL1, + stat: STAT, + peek: PEEK, + io: [IO; 4], + txhold: [TXHOLD; 4], +} +impl RegisterBlock { #[doc = "0x00 - Control 0"] - pub cntl0: CNTL0, + #[inline(always)] + pub const fn cntl0(&self) -> &CNTL0 { + &self.cntl0 + } #[doc = "0x04 - Control 1"] - pub cntl1: CNTL1, + #[inline(always)] + pub const fn cntl1(&self) -> &CNTL1 { + &self.cntl1 + } #[doc = "0x08 - Status"] - pub stat: STAT, + #[inline(always)] + pub const fn stat(&self) -> &STAT { + &self.stat + } #[doc = "0x0c - Read the RXFIFO without removing an entry"] - pub peek: PEEK, + #[inline(always)] + pub const fn peek(&self) -> &PEEK { + &self.peek + } #[doc = "0x10..0x20 - Writing to the FIFO will deassert CS at the end of the access"] - pub io: [IO; 4], + #[inline(always)] + pub const fn io(&self, n: usize) -> &IO { + &self.io[n] + } #[doc = "0x20..0x30 - Writing to the FIFO will maintain CS at the end of the access"] - pub txhold: [TXHOLD; 4], + #[inline(always)] + pub const fn txhold(&self, n: usize) -> &TXHOLD { + &self.txhold[n] + } } #[doc = "CNTL0 (rw) register accessor: Control 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cntl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cntl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cntl0`] module"] diff --git a/crates/bcm2835-lpa/src/spi1/cntl0.rs b/crates/bcm2835-lpa/src/spi1/cntl0.rs index df7d957..451bebc 100644 --- a/crates/bcm2835-lpa/src/spi1/cntl0.rs +++ b/crates/bcm2835-lpa/src/spi1/cntl0.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `SHIFT_LENGTH` reader - Number of bits to shift"] pub type SHIFT_LENGTH_R = crate::FieldReader; #[doc = "Field `SHIFT_LENGTH` writer - Number of bits to shift"] -pub type SHIFT_LENGTH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type SHIFT_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MSB_FIRST` reader - Shift out the most significant bit (MSB) first"] pub type MSB_FIRST_R = crate::BitReader; #[doc = "Field `MSB_FIRST` writer - Shift out the most significant bit (MSB) first"] -pub type MSB_FIRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSB_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INVERT_CLK` reader - Idle clock high"] pub type INVERT_CLK_R = crate::BitReader; #[doc = "Field `INVERT_CLK` writer - Idle clock high"] -pub type INVERT_CLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INVERT_CLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT_RISING` reader - Data is clocked out on rising edge of CLK"] pub type OUT_RISING_R = crate::BitReader; #[doc = "Field `OUT_RISING` writer - Data is clocked out on rising edge of CLK"] -pub type OUT_RISING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OUT_RISING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR_FIFOS` reader - Clear FIFOs"] pub type CLEAR_FIFOS_R = crate::BitReader; #[doc = "Field `CLEAR_FIFOS` writer - Clear FIFOs"] -pub type CLEAR_FIFOS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLEAR_FIFOS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IN_RISING` reader - Data is clocked in on rising edge of CLK"] pub type IN_RISING_R = crate::BitReader; #[doc = "Field `IN_RISING` writer - Data is clocked in on rising edge of CLK"] -pub type IN_RISING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IN_RISING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE` reader - Enable the interface"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable the interface"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOUT_HOLD_TIME` reader - Controls extra DOUT hold time in system clock cycles"] pub type DOUT_HOLD_TIME_R = crate::FieldReader; #[doc = "Controls extra DOUT hold time in system clock cycles\n\nValue on reset: 0"] @@ -88,9 +88,8 @@ impl DOUT_HOLD_TIME_R { } } #[doc = "Field `DOUT_HOLD_TIME` writer - Controls extra DOUT hold time in system clock cycles"] -pub type DOUT_HOLD_TIME_W<'a, REG, const O: u8> = - crate::FieldWriterSafe<'a, REG, 2, O, DOUT_HOLD_TIME_A>; -impl<'a, REG, const O: u8> DOUT_HOLD_TIME_W<'a, REG, O> +pub type DOUT_HOLD_TIME_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DOUT_HOLD_TIME_A>; +impl<'a, REG> DOUT_HOLD_TIME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -119,23 +118,23 @@ where #[doc = "Field `VARIABLE_WIDTH` reader - Take shift length and data from FIFO"] pub type VARIABLE_WIDTH_R = crate::BitReader; #[doc = "Field `VARIABLE_WIDTH` writer - Take shift length and data from FIFO"] -pub type VARIABLE_WIDTH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VARIABLE_WIDTH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VARIABLE_CS` reader - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] pub type VARIABLE_CS_R = crate::BitReader; #[doc = "Field `VARIABLE_CS` writer - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] -pub type VARIABLE_CS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VARIABLE_CS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POST_INPUT` reader - Post input mode"] pub type POST_INPUT_R = crate::BitReader; #[doc = "Field `POST_INPUT` writer - Post input mode"] -pub type POST_INPUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POST_INPUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIP_SELECTS` reader - The CS pattern when active"] pub type CHIP_SELECTS_R = crate::FieldReader; #[doc = "Field `CHIP_SELECTS` writer - The CS pattern when active"] -pub type CHIP_SELECTS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CHIP_SELECTS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SPEED` reader - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] pub type SPEED_R = crate::FieldReader; #[doc = "Field `SPEED` writer - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] -pub type SPEED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type SPEED_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:5 - Number of bits to shift"] #[inline(always)] @@ -236,87 +235,87 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - Number of bits to shift"] #[inline(always)] #[must_use] - pub fn shift_length(&mut self) -> SHIFT_LENGTH_W { - SHIFT_LENGTH_W::new(self) + pub fn shift_length(&mut self) -> SHIFT_LENGTH_W { + SHIFT_LENGTH_W::new(self, 0) } #[doc = "Bit 6 - Shift out the most significant bit (MSB) first"] #[inline(always)] #[must_use] - pub fn msb_first(&mut self) -> MSB_FIRST_W { - MSB_FIRST_W::new(self) + pub fn msb_first(&mut self) -> MSB_FIRST_W { + MSB_FIRST_W::new(self, 6) } #[doc = "Bit 7 - Idle clock high"] #[inline(always)] #[must_use] - pub fn invert_clk(&mut self) -> INVERT_CLK_W { - INVERT_CLK_W::new(self) + pub fn invert_clk(&mut self) -> INVERT_CLK_W { + INVERT_CLK_W::new(self, 7) } #[doc = "Bit 8 - Data is clocked out on rising edge of CLK"] #[inline(always)] #[must_use] - pub fn out_rising(&mut self) -> OUT_RISING_W { - OUT_RISING_W::new(self) + pub fn out_rising(&mut self) -> OUT_RISING_W { + OUT_RISING_W::new(self, 8) } #[doc = "Bit 9 - Clear FIFOs"] #[inline(always)] #[must_use] - pub fn clear_fifos(&mut self) -> CLEAR_FIFOS_W { - CLEAR_FIFOS_W::new(self) + pub fn clear_fifos(&mut self) -> CLEAR_FIFOS_W { + CLEAR_FIFOS_W::new(self, 9) } #[doc = "Bit 10 - Data is clocked in on rising edge of CLK"] #[inline(always)] #[must_use] - pub fn in_rising(&mut self) -> IN_RISING_W { - IN_RISING_W::new(self) + pub fn in_rising(&mut self) -> IN_RISING_W { + IN_RISING_W::new(self, 10) } #[doc = "Bit 11 - Enable the interface"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 11) } #[doc = "Bits 12:13 - Controls extra DOUT hold time in system clock cycles"] #[inline(always)] #[must_use] - pub fn dout_hold_time(&mut self) -> DOUT_HOLD_TIME_W { - DOUT_HOLD_TIME_W::new(self) + pub fn dout_hold_time(&mut self) -> DOUT_HOLD_TIME_W { + DOUT_HOLD_TIME_W::new(self, 12) } #[doc = "Bit 14 - Take shift length and data from FIFO"] #[inline(always)] #[must_use] - pub fn variable_width(&mut self) -> VARIABLE_WIDTH_W { - VARIABLE_WIDTH_W::new(self) + pub fn variable_width(&mut self) -> VARIABLE_WIDTH_W { + VARIABLE_WIDTH_W::new(self, 14) } #[doc = "Bit 15 - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] #[inline(always)] #[must_use] - pub fn variable_cs(&mut self) -> VARIABLE_CS_W { - VARIABLE_CS_W::new(self) + pub fn variable_cs(&mut self) -> VARIABLE_CS_W { + VARIABLE_CS_W::new(self, 15) } #[doc = "Bit 16 - Post input mode"] #[inline(always)] #[must_use] - pub fn post_input(&mut self) -> POST_INPUT_W { - POST_INPUT_W::new(self) + pub fn post_input(&mut self) -> POST_INPUT_W { + POST_INPUT_W::new(self, 16) } #[doc = "Bits 17:19 - The CS pattern when active"] #[inline(always)] #[must_use] - pub fn chip_selects(&mut self) -> CHIP_SELECTS_W { - CHIP_SELECTS_W::new(self) + pub fn chip_selects(&mut self) -> CHIP_SELECTS_W { + CHIP_SELECTS_W::new(self, 17) } #[doc = "Bits 20:31 - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] #[inline(always)] #[must_use] - pub fn speed(&mut self) -> SPEED_W { - SPEED_W::new(self) + pub fn speed(&mut self) -> SPEED_W { + SPEED_W::new(self, 20) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi1/cntl1.rs b/crates/bcm2835-lpa/src/spi1/cntl1.rs index c1f0228..651e5d8 100644 --- a/crates/bcm2835-lpa/src/spi1/cntl1.rs +++ b/crates/bcm2835-lpa/src/spi1/cntl1.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `KEEP_INPUT` reader - Don't clear the RX shift register before a new transaction"] pub type KEEP_INPUT_R = crate::BitReader; #[doc = "Field `KEEP_INPUT` writer - Don't clear the RX shift register before a new transaction"] -pub type KEEP_INPUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type KEEP_INPUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSB_FIRST` reader - Shift the most significant bit first (MSB)"] pub type MSB_FIRST_R = crate::BitReader; #[doc = "Field `MSB_FIRST` writer - Shift the most significant bit first (MSB)"] -pub type MSB_FIRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSB_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE_ENABLE` reader - Enable DONE interrupt"] pub type DONE_ENABLE_R = crate::BitReader; #[doc = "Field `DONE_ENABLE` writer - Enable DONE interrupt"] -pub type DONE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DONE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXE_ENABLE` reader - Enable TX empty interrupt"] pub type TXE_ENABLE_R = crate::BitReader; #[doc = "Field `TXE_ENABLE` writer - Enable TX empty interrupt"] -pub type TXE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS_HIGH_TIME` reader - Additional SPI clock cycles where CS is high"] pub type CS_HIGH_TIME_R = crate::FieldReader; #[doc = "Field `CS_HIGH_TIME` writer - Additional SPI clock cycles where CS is high"] -pub type CS_HIGH_TIME_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CS_HIGH_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Don't clear the RX shift register before a new transaction"] #[inline(always)] @@ -65,39 +65,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Don't clear the RX shift register before a new transaction"] #[inline(always)] #[must_use] - pub fn keep_input(&mut self) -> KEEP_INPUT_W { - KEEP_INPUT_W::new(self) + pub fn keep_input(&mut self) -> KEEP_INPUT_W { + KEEP_INPUT_W::new(self, 0) } #[doc = "Bit 1 - Shift the most significant bit first (MSB)"] #[inline(always)] #[must_use] - pub fn msb_first(&mut self) -> MSB_FIRST_W { - MSB_FIRST_W::new(self) + pub fn msb_first(&mut self) -> MSB_FIRST_W { + MSB_FIRST_W::new(self, 1) } #[doc = "Bit 6 - Enable DONE interrupt"] #[inline(always)] #[must_use] - pub fn done_enable(&mut self) -> DONE_ENABLE_W { - DONE_ENABLE_W::new(self) + pub fn done_enable(&mut self) -> DONE_ENABLE_W { + DONE_ENABLE_W::new(self, 6) } #[doc = "Bit 7 - Enable TX empty interrupt"] #[inline(always)] #[must_use] - pub fn txe_enable(&mut self) -> TXE_ENABLE_W { - TXE_ENABLE_W::new(self) + pub fn txe_enable(&mut self) -> TXE_ENABLE_W { + TXE_ENABLE_W::new(self, 7) } #[doc = "Bits 8:10 - Additional SPI clock cycles where CS is high"] #[inline(always)] #[must_use] - pub fn cs_high_time(&mut self) -> CS_HIGH_TIME_W { - CS_HIGH_TIME_W::new(self) + pub fn cs_high_time(&mut self) -> CS_HIGH_TIME_W { + CS_HIGH_TIME_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi1/io.rs b/crates/bcm2835-lpa/src/spi1/io.rs index 6564875..684bdc3 100644 --- a/crates/bcm2835-lpa/src/spi1/io.rs +++ b/crates/bcm2835-lpa/src/spi1/io.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO data access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO data access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi1/peek.rs b/crates/bcm2835-lpa/src/spi1/peek.rs index 7ceeb4a..5de5289 100644 --- a/crates/bcm2835-lpa/src/spi1/peek.rs +++ b/crates/bcm2835-lpa/src/spi1/peek.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Read the RXFIFO without removing an entry\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/spi1/stat.rs b/crates/bcm2835-lpa/src/spi1/stat.rs index 9fe3977..ae962a9 100644 --- a/crates/bcm2835-lpa/src/spi1/stat.rs +++ b/crates/bcm2835-lpa/src/spi1/stat.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `BIT_COUNT` reader - Number of bits left to be processed."] pub type BIT_COUNT_R = crate::FieldReader; #[doc = "Field `BIT_COUNT` writer - Number of bits left to be processed."] -pub type BIT_COUNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type BIT_COUNT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `BUSY` reader - Indicates a transfer is ongoing"] pub type BUSY_R = crate::BitReader; #[doc = "Field `BUSY` writer - Indicates a transfer is ongoing"] -pub type BUSY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUSY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_EMPTY` reader - RX FIFO is empty"] pub type RX_EMPTY_R = crate::BitReader; #[doc = "Field `RX_EMPTY` writer - RX FIFO is empty"] -pub type RX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_FULL` reader - RX FIFO is full"] pub type RX_FULL_R = crate::BitReader; #[doc = "Field `RX_FULL` writer - RX FIFO is full"] -pub type RX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - TX FIFO is empty"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - TX FIFO is empty"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_FULL` reader - TX FIFO is full"] pub type TX_FULL_R = crate::BitReader; #[doc = "Field `TX_FULL` writer - TX FIFO is full"] -pub type TX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_LEVEL` reader - Number of entries in RX FIFO"] pub type RX_LEVEL_R = crate::FieldReader; #[doc = "Field `RX_LEVEL` writer - Number of entries in RX FIFO"] -pub type RX_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type RX_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TX_LEVEL` reader - Number of entries in TX FIFO"] pub type TX_LEVEL_R = crate::FieldReader; #[doc = "Field `TX_LEVEL` writer - Number of entries in TX FIFO"] -pub type TX_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TX_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:5 - Number of bits left to be processed."] #[inline(always)] @@ -92,57 +92,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - Number of bits left to be processed."] #[inline(always)] #[must_use] - pub fn bit_count(&mut self) -> BIT_COUNT_W { - BIT_COUNT_W::new(self) + pub fn bit_count(&mut self) -> BIT_COUNT_W { + BIT_COUNT_W::new(self, 0) } #[doc = "Bit 6 - Indicates a transfer is ongoing"] #[inline(always)] #[must_use] - pub fn busy(&mut self) -> BUSY_W { - BUSY_W::new(self) + pub fn busy(&mut self) -> BUSY_W { + BUSY_W::new(self, 6) } #[doc = "Bit 7 - RX FIFO is empty"] #[inline(always)] #[must_use] - pub fn rx_empty(&mut self) -> RX_EMPTY_W { - RX_EMPTY_W::new(self) + pub fn rx_empty(&mut self) -> RX_EMPTY_W { + RX_EMPTY_W::new(self, 7) } #[doc = "Bit 8 - RX FIFO is full"] #[inline(always)] #[must_use] - pub fn rx_full(&mut self) -> RX_FULL_W { - RX_FULL_W::new(self) + pub fn rx_full(&mut self) -> RX_FULL_W { + RX_FULL_W::new(self, 8) } #[doc = "Bit 9 - TX FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 9) } #[doc = "Bit 10 - TX FIFO is full"] #[inline(always)] #[must_use] - pub fn tx_full(&mut self) -> TX_FULL_W { - TX_FULL_W::new(self) + pub fn tx_full(&mut self) -> TX_FULL_W { + TX_FULL_W::new(self, 10) } #[doc = "Bits 16:19 - Number of entries in RX FIFO"] #[inline(always)] #[must_use] - pub fn rx_level(&mut self) -> RX_LEVEL_W { - RX_LEVEL_W::new(self) + pub fn rx_level(&mut self) -> RX_LEVEL_W { + RX_LEVEL_W::new(self, 16) } #[doc = "Bits 24:27 - Number of entries in TX FIFO"] #[inline(always)] #[must_use] - pub fn tx_level(&mut self) -> TX_LEVEL_W { - TX_LEVEL_W::new(self) + pub fn tx_level(&mut self) -> TX_LEVEL_W { + TX_LEVEL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/spi1/txhold.rs b/crates/bcm2835-lpa/src/spi1/txhold.rs index 8c29938..7150eb6 100644 --- a/crates/bcm2835-lpa/src/spi1/txhold.rs +++ b/crates/bcm2835-lpa/src/spi1/txhold.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO data access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO data access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/systmr.rs b/crates/bcm2835-lpa/src/systmr.rs index 31647d3..eb65cff 100644 --- a/crates/bcm2835-lpa/src/systmr.rs +++ b/crates/bcm2835-lpa/src/systmr.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + clo: CLO, + chi: CHI, + c0: C0, + c1: C1, + c2: C2, + c3: C3, +} +impl RegisterBlock { #[doc = "0x00 - Control / Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - Lower 32 bits for the free running counter"] - pub clo: CLO, + #[inline(always)] + pub const fn clo(&self) -> &CLO { + &self.clo + } #[doc = "0x08 - Higher 32 bits for the free running counter"] - pub chi: CHI, + #[inline(always)] + pub const fn chi(&self) -> &CHI { + &self.chi + } #[doc = "0x0c - Compare channel 0"] - pub c0: C0, + #[inline(always)] + pub const fn c0(&self) -> &C0 { + &self.c0 + } #[doc = "0x10 - Compare channel 1"] - pub c1: C1, + #[inline(always)] + pub const fn c1(&self) -> &C1 { + &self.c1 + } #[doc = "0x14 - Compare channel 2"] - pub c2: C2, + #[inline(always)] + pub const fn c2(&self) -> &C2 { + &self.c2 + } #[doc = "0x18 - Compare channel 3"] - pub c3: C3, + #[inline(always)] + pub const fn c3(&self) -> &C3 { + &self.c3 + } } #[doc = "CS (rw) register accessor: Control / Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2835-lpa/src/systmr/c0.rs b/crates/bcm2835-lpa/src/systmr/c0.rs index 18be8a7..9ab12b6 100644 --- a/crates/bcm2835-lpa/src/systmr/c0.rs +++ b/crates/bcm2835-lpa/src/systmr/c0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/systmr/c1.rs b/crates/bcm2835-lpa/src/systmr/c1.rs index bcf565c..166b9b1 100644 --- a/crates/bcm2835-lpa/src/systmr/c1.rs +++ b/crates/bcm2835-lpa/src/systmr/c1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/systmr/c2.rs b/crates/bcm2835-lpa/src/systmr/c2.rs index e91e152..5e445b8 100644 --- a/crates/bcm2835-lpa/src/systmr/c2.rs +++ b/crates/bcm2835-lpa/src/systmr/c2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/systmr/c3.rs b/crates/bcm2835-lpa/src/systmr/c3.rs index a33918f..92faaa4 100644 --- a/crates/bcm2835-lpa/src/systmr/c3.rs +++ b/crates/bcm2835-lpa/src/systmr/c3.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/systmr/chi.rs b/crates/bcm2835-lpa/src/systmr/chi.rs index 7313db2..54d6e6b 100644 --- a/crates/bcm2835-lpa/src/systmr/chi.rs +++ b/crates/bcm2835-lpa/src/systmr/chi.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Higher 32 bits for the free running counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/systmr/clo.rs b/crates/bcm2835-lpa/src/systmr/clo.rs index 43986b1..145765a 100644 --- a/crates/bcm2835-lpa/src/systmr/clo.rs +++ b/crates/bcm2835-lpa/src/systmr/clo.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Lower 32 bits for the free running counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/systmr/cs.rs b/crates/bcm2835-lpa/src/systmr/cs.rs index 3e1660d..1e3978b 100644 --- a/crates/bcm2835-lpa/src/systmr/cs.rs +++ b/crates/bcm2835-lpa/src/systmr/cs.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `M0` reader - System timer match 0"] pub type M0_R = crate::BitReader; #[doc = "Field `M0` writer - System timer match 0"] -pub type M0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M1` reader - System timer match 1"] pub type M1_R = crate::BitReader; #[doc = "Field `M1` writer - System timer match 1"] -pub type M1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M2` reader - System timer match 2"] pub type M2_R = crate::BitReader; #[doc = "Field `M2` writer - System timer match 2"] -pub type M2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M3` reader - System timer match 3"] pub type M3_R = crate::BitReader; #[doc = "Field `M3` writer - System timer match 3"] -pub type M3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M3_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - System timer match 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - System timer match 0"] #[inline(always)] #[must_use] - pub fn m0(&mut self) -> M0_W { - M0_W::new(self) + pub fn m0(&mut self) -> M0_W { + M0_W::new(self, 0) } #[doc = "Bit 1 - System timer match 1"] #[inline(always)] #[must_use] - pub fn m1(&mut self) -> M1_W { - M1_W::new(self) + pub fn m1(&mut self) -> M1_W { + M1_W::new(self, 1) } #[doc = "Bit 2 - System timer match 2"] #[inline(always)] #[must_use] - pub fn m2(&mut self) -> M2_W { - M2_W::new(self) + pub fn m2(&mut self) -> M2_W { + M2_W::new(self, 2) } #[doc = "Bit 3 - System timer match 3"] #[inline(always)] #[must_use] - pub fn m3(&mut self) -> M3_W { - M3_W::new(self) + pub fn m3(&mut self) -> M3_W { + M3_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0.rs b/crates/bcm2835-lpa/src/uart0.rs index a12a501..c46032b 100644 --- a/crates/bcm2835-lpa/src/uart0.rs +++ b/crates/bcm2835-lpa/src/uart0.rs @@ -2,44 +2,92 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - Data Register"] - pub dr: DR, + dr: DR, _reserved_1_ecr: [u8; 0x04], _reserved2: [u8; 0x10], - #[doc = "0x18 - Flag Register"] - pub fr: FR, + fr: FR, _reserved3: [u8; 0x08], + ibrd: IBRD, + fbrd: FBRD, + lcr_h: LCR_H, + cr: CR, + ifls: IFLS, + imsc: IMSC, + ris: RIS, + mis: MIS, + icr: ICR, + dmacr: DMACR, +} +impl RegisterBlock { + #[doc = "0x00 - Data Register"] + #[inline(always)] + pub const fn dr(&self) -> &DR { + &self.dr + } + #[doc = "0x04 - Error Clear Register"] + #[inline(always)] + pub const fn ecr(&self) -> &ECR { + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x04 - Receive Status Register"] + #[inline(always)] + pub const fn rsr(&self) -> &RSR { + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x18 - Flag Register"] + #[inline(always)] + pub const fn fr(&self) -> &FR { + &self.fr + } #[doc = "0x24 - Integer Baud Rate Register"] - pub ibrd: IBRD, + #[inline(always)] + pub const fn ibrd(&self) -> &IBRD { + &self.ibrd + } #[doc = "0x28 - Fractional Baud Rate Register"] - pub fbrd: FBRD, + #[inline(always)] + pub const fn fbrd(&self) -> &FBRD { + &self.fbrd + } #[doc = "0x2c - Line Control Register"] - pub lcr_h: LCR_H, + #[inline(always)] + pub const fn lcr_h(&self) -> &LCR_H { + &self.lcr_h + } #[doc = "0x30 - Control Register"] - pub cr: CR, + #[inline(always)] + pub const fn cr(&self) -> &CR { + &self.cr + } #[doc = "0x34 - Interrupt FIFO Level Select Register"] - pub ifls: IFLS, + #[inline(always)] + pub const fn ifls(&self) -> &IFLS { + &self.ifls + } #[doc = "0x38 - Interrupt Mask set_Clear Register"] - pub imsc: IMSC, + #[inline(always)] + pub const fn imsc(&self) -> &IMSC { + &self.imsc + } #[doc = "0x3c - Raw Interrupt Status Register"] - pub ris: RIS, + #[inline(always)] + pub const fn ris(&self) -> &RIS { + &self.ris + } #[doc = "0x40 - Masked Interrupt Status Register"] - pub mis: MIS, + #[inline(always)] + pub const fn mis(&self) -> &MIS { + &self.mis + } #[doc = "0x44 - Interrupt Clear Register"] - pub icr: ICR, - #[doc = "0x48 - DMA Control Register"] - pub dmacr: DMACR, -} -impl RegisterBlock { - #[doc = "0x04 - Error Clear Register"] #[inline(always)] - pub const fn ecr(&self) -> &ECR { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + pub const fn icr(&self) -> &ICR { + &self.icr } - #[doc = "0x04 - Receive Status Register"] + #[doc = "0x48 - DMA Control Register"] #[inline(always)] - pub const fn rsr(&self) -> &RSR { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + pub const fn dmacr(&self) -> &DMACR { + &self.dmacr } } #[doc = "DR (rw) register accessor: Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dr`] diff --git a/crates/bcm2835-lpa/src/uart0/cr.rs b/crates/bcm2835-lpa/src/uart0/cr.rs index bfbc283..bf3ad6e 100644 --- a/crates/bcm2835-lpa/src/uart0/cr.rs +++ b/crates/bcm2835-lpa/src/uart0/cr.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `UARTEN` reader - UARTEN"] pub type UARTEN_R = crate::BitReader; #[doc = "Field `UARTEN` writer - UARTEN"] -pub type UARTEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UARTEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIREN` reader - SIREN"] pub type SIREN_R = crate::BitReader; #[doc = "Field `SIREN` writer - SIREN"] -pub type SIREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SIREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIRLP` reader - SIRLP"] pub type SIRLP_R = crate::BitReader; #[doc = "Field `SIRLP` writer - SIRLP"] -pub type SIRLP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SIRLP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXE` reader - TXE"] pub type TXE_R = crate::BitReader; #[doc = "Field `TXE` writer - TXE"] -pub type TXE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXE` reader - RXE"] pub type RXE_R = crate::BitReader; #[doc = "Field `RXE` writer - RXE"] -pub type RXE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTR` reader - DTR"] pub type DTR_R = crate::BitReader; #[doc = "Field `DTR` writer - DTR"] -pub type DTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS` reader - RTS"] pub type RTS_R = crate::BitReader; #[doc = "Field `RTS` writer - RTS"] -pub type RTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSEN` reader - RTSEN"] pub type RTSEN_R = crate::BitReader; #[doc = "Field `RTSEN` writer - RTSEN"] -pub type RTSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTSEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSEN` reader - CTSEN"] pub type CTSEN_R = crate::BitReader; #[doc = "Field `CTSEN` writer - CTSEN"] -pub type CTSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UARTEN"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UARTEN"] #[inline(always)] #[must_use] - pub fn uarten(&mut self) -> UARTEN_W { - UARTEN_W::new(self) + pub fn uarten(&mut self) -> UARTEN_W { + UARTEN_W::new(self, 0) } #[doc = "Bit 1 - SIREN"] #[inline(always)] #[must_use] - pub fn siren(&mut self) -> SIREN_W { - SIREN_W::new(self) + pub fn siren(&mut self) -> SIREN_W { + SIREN_W::new(self, 1) } #[doc = "Bit 2 - SIRLP"] #[inline(always)] #[must_use] - pub fn sirlp(&mut self) -> SIRLP_W { - SIRLP_W::new(self) + pub fn sirlp(&mut self) -> SIRLP_W { + SIRLP_W::new(self, 2) } #[doc = "Bit 8 - TXE"] #[inline(always)] #[must_use] - pub fn txe(&mut self) -> TXE_W { - TXE_W::new(self) + pub fn txe(&mut self) -> TXE_W { + TXE_W::new(self, 8) } #[doc = "Bit 9 - RXE"] #[inline(always)] #[must_use] - pub fn rxe(&mut self) -> RXE_W { - RXE_W::new(self) + pub fn rxe(&mut self) -> RXE_W { + RXE_W::new(self, 9) } #[doc = "Bit 10 - DTR"] #[inline(always)] #[must_use] - pub fn dtr(&mut self) -> DTR_W { - DTR_W::new(self) + pub fn dtr(&mut self) -> DTR_W { + DTR_W::new(self, 10) } #[doc = "Bit 11 - RTS"] #[inline(always)] #[must_use] - pub fn rts(&mut self) -> RTS_W { - RTS_W::new(self) + pub fn rts(&mut self) -> RTS_W { + RTS_W::new(self, 11) } #[doc = "Bit 14 - RTSEN"] #[inline(always)] #[must_use] - pub fn rtsen(&mut self) -> RTSEN_W { - RTSEN_W::new(self) + pub fn rtsen(&mut self) -> RTSEN_W { + RTSEN_W::new(self, 14) } #[doc = "Bit 15 - CTSEN"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CTSEN_W { + CTSEN_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/dmacr.rs b/crates/bcm2835-lpa/src/uart0/dmacr.rs index 40efa50..dcdcd2e 100644 --- a/crates/bcm2835-lpa/src/uart0/dmacr.rs +++ b/crates/bcm2835-lpa/src/uart0/dmacr.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `RXDMAE` reader - RXDMAE"] pub type RXDMAE_R = crate::BitReader; #[doc = "Field `RXDMAE` writer - RXDMAE"] -pub type RXDMAE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDMAE` reader - TXDMAE"] pub type TXDMAE_R = crate::BitReader; #[doc = "Field `TXDMAE` writer - TXDMAE"] -pub type TXDMAE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAONERR` reader - DMAONERR"] pub type DMAONERR_R = crate::BitReader; #[doc = "Field `DMAONERR` writer - DMAONERR"] -pub type DMAONERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAONERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RXDMAE"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - RXDMAE"] #[inline(always)] #[must_use] - pub fn rxdmae(&mut self) -> RXDMAE_W { - RXDMAE_W::new(self) + pub fn rxdmae(&mut self) -> RXDMAE_W { + RXDMAE_W::new(self, 0) } #[doc = "Bit 1 - TXDMAE"] #[inline(always)] #[must_use] - pub fn txdmae(&mut self) -> TXDMAE_W { - TXDMAE_W::new(self) + pub fn txdmae(&mut self) -> TXDMAE_W { + TXDMAE_W::new(self, 1) } #[doc = "Bit 2 - DMAONERR"] #[inline(always)] #[must_use] - pub fn dmaonerr(&mut self) -> DMAONERR_W { - DMAONERR_W::new(self) + pub fn dmaonerr(&mut self) -> DMAONERR_W { + DMAONERR_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/dr.rs b/crates/bcm2835-lpa/src/uart0/dr.rs index 3c7f81e..6ac1b23 100644 --- a/crates/bcm2835-lpa/src/uart0/dr.rs +++ b/crates/bcm2835-lpa/src/uart0/dr.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - DATA"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - DATA"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `FE` reader - FE"] pub type FE_R = crate::BitReader; #[doc = "Field `FE` writer - FE"] -pub type FE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PE` reader - PE"] pub type PE_R = crate::BitReader; #[doc = "Field `PE` writer - PE"] -pub type PE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` reader - BE"] pub type BE_R = crate::BitReader; #[doc = "Field `BE` writer - BE"] -pub type BE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OE` reader - OE"] pub type OE_R = crate::BitReader; #[doc = "Field `OE` writer - OE"] -pub type OE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - DATA"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DATA"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = "Bit 8 - FE"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 8) } #[doc = "Bit 9 - PE"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 9) } #[doc = "Bit 10 - BE"] #[inline(always)] #[must_use] - pub fn be(&mut self) -> BE_W { - BE_W::new(self) + pub fn be(&mut self) -> BE_W { + BE_W::new(self, 10) } #[doc = "Bit 11 - OE"] #[inline(always)] #[must_use] - pub fn oe(&mut self) -> OE_W { - OE_W::new(self) + pub fn oe(&mut self) -> OE_W { + OE_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/ecr.rs b/crates/bcm2835-lpa/src/uart0/ecr.rs index 97efb0b..a17d921 100644 --- a/crates/bcm2835-lpa/src/uart0/ecr.rs +++ b/crates/bcm2835-lpa/src/uart0/ecr.rs @@ -1,13 +1,13 @@ #[doc = "Register `ECR` writer"] pub type W = crate::W; #[doc = "Field `FE` writer - FE"] -pub type FE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PE` writer - PE"] -pub type PE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` writer - BE"] -pub type BE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OE` writer - OE"] -pub type OE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OE_W<'a, REG> = crate::BitWriter<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -17,26 +17,26 @@ impl W { #[doc = "Bit 0 - FE"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 0) } #[doc = "Bit 1 - PE"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 1) } #[doc = "Bit 2 - BE"] #[inline(always)] #[must_use] - pub fn be(&mut self) -> BE_W { - BE_W::new(self) + pub fn be(&mut self) -> BE_W { + BE_W::new(self, 2) } #[doc = "Bit 3 - OE"] #[inline(always)] #[must_use] - pub fn oe(&mut self) -> OE_W { - OE_W::new(self) + pub fn oe(&mut self) -> OE_W { + OE_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/fbrd.rs b/crates/bcm2835-lpa/src/uart0/fbrd.rs index e0fe228..12a11b7 100644 --- a/crates/bcm2835-lpa/src/uart0/fbrd.rs +++ b/crates/bcm2835-lpa/src/uart0/fbrd.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BAUDDIVFRAC` reader - BAUDDIVFRAC"] pub type BAUDDIVFRAC_R = crate::FieldReader; #[doc = "Field `BAUDDIVFRAC` writer - BAUDDIVFRAC"] -pub type BAUDDIVFRAC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type BAUDDIVFRAC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - BAUDDIVFRAC"] #[inline(always)] @@ -25,15 +25,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - BAUDDIVFRAC"] #[inline(always)] #[must_use] - pub fn bauddivfrac(&mut self) -> BAUDDIVFRAC_W { - BAUDDIVFRAC_W::new(self) + pub fn bauddivfrac(&mut self) -> BAUDDIVFRAC_W { + BAUDDIVFRAC_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/fr.rs b/crates/bcm2835-lpa/src/uart0/fr.rs index d70703c..7b350ba 100644 --- a/crates/bcm2835-lpa/src/uart0/fr.rs +++ b/crates/bcm2835-lpa/src/uart0/fr.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `CTS` reader - CTS"] pub type CTS_R = crate::BitReader; #[doc = "Field `CTS` writer - CTS"] -pub type CTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSR` reader - DSR"] pub type DSR_R = crate::BitReader; #[doc = "Field `DSR` writer - DSR"] -pub type DSR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCD` reader - DCD"] pub type DCD_R = crate::BitReader; #[doc = "Field `DCD` writer - DCD"] -pub type DCD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSY` reader - BUSY"] pub type BUSY_R = crate::BitReader; #[doc = "Field `BUSY` writer - BUSY"] -pub type BUSY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUSY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFE` reader - RXFE"] pub type RXFE_R = crate::BitReader; #[doc = "Field `RXFE` writer - RXFE"] -pub type RXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFF` reader - TXFF"] pub type TXFF_R = crate::BitReader; #[doc = "Field `TXFF` writer - TXFF"] -pub type TXFF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFF` reader - RXFF"] pub type RXFF_R = crate::BitReader; #[doc = "Field `RXFF` writer - RXFF"] -pub type RXFF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFE` reader - TXFE"] pub type TXFE_R = crate::BitReader; #[doc = "Field `TXFE` writer - TXFE"] -pub type TXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RI` reader - RI"] pub type RI_R = crate::BitReader; #[doc = "Field `RI` writer - RI"] -pub type RI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RI_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CTS"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - CTS"] #[inline(always)] #[must_use] - pub fn cts(&mut self) -> CTS_W { - CTS_W::new(self) + pub fn cts(&mut self) -> CTS_W { + CTS_W::new(self, 0) } #[doc = "Bit 1 - DSR"] #[inline(always)] #[must_use] - pub fn dsr(&mut self) -> DSR_W { - DSR_W::new(self) + pub fn dsr(&mut self) -> DSR_W { + DSR_W::new(self, 1) } #[doc = "Bit 2 - DCD"] #[inline(always)] #[must_use] - pub fn dcd(&mut self) -> DCD_W { - DCD_W::new(self) + pub fn dcd(&mut self) -> DCD_W { + DCD_W::new(self, 2) } #[doc = "Bit 3 - BUSY"] #[inline(always)] #[must_use] - pub fn busy(&mut self) -> BUSY_W { - BUSY_W::new(self) + pub fn busy(&mut self) -> BUSY_W { + BUSY_W::new(self, 3) } #[doc = "Bit 4 - RXFE"] #[inline(always)] #[must_use] - pub fn rxfe(&mut self) -> RXFE_W { - RXFE_W::new(self) + pub fn rxfe(&mut self) -> RXFE_W { + RXFE_W::new(self, 4) } #[doc = "Bit 5 - TXFF"] #[inline(always)] #[must_use] - pub fn txff(&mut self) -> TXFF_W { - TXFF_W::new(self) + pub fn txff(&mut self) -> TXFF_W { + TXFF_W::new(self, 5) } #[doc = "Bit 6 - RXFF"] #[inline(always)] #[must_use] - pub fn rxff(&mut self) -> RXFF_W { - RXFF_W::new(self) + pub fn rxff(&mut self) -> RXFF_W { + RXFF_W::new(self, 6) } #[doc = "Bit 7 - TXFE"] #[inline(always)] #[must_use] - pub fn txfe(&mut self) -> TXFE_W { - TXFE_W::new(self) + pub fn txfe(&mut self) -> TXFE_W { + TXFE_W::new(self, 7) } #[doc = "Bit 8 - RI"] #[inline(always)] #[must_use] - pub fn ri(&mut self) -> RI_W { - RI_W::new(self) + pub fn ri(&mut self) -> RI_W { + RI_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/ibrd.rs b/crates/bcm2835-lpa/src/uart0/ibrd.rs index 07441c8..193f8ca 100644 --- a/crates/bcm2835-lpa/src/uart0/ibrd.rs +++ b/crates/bcm2835-lpa/src/uart0/ibrd.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BAUDDIVINT` reader - BAUDDIVINT"] pub type BAUDDIVINT_R = crate::FieldReader; #[doc = "Field `BAUDDIVINT` writer - BAUDDIVINT"] -pub type BAUDDIVINT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type BAUDDIVINT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - BAUDDIVINT"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - BAUDDIVINT"] #[inline(always)] #[must_use] - pub fn bauddivint(&mut self) -> BAUDDIVINT_W { - BAUDDIVINT_W::new(self) + pub fn bauddivint(&mut self) -> BAUDDIVINT_W { + BAUDDIVINT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/icr.rs b/crates/bcm2835-lpa/src/uart0/icr.rs index e69a3e9..0b0080c 100644 --- a/crates/bcm2835-lpa/src/uart0/icr.rs +++ b/crates/bcm2835-lpa/src/uart0/icr.rs @@ -1,27 +1,27 @@ #[doc = "Register `ICR` writer"] pub type W = crate::W; #[doc = "Field `RIMIC` writer - RIMIC"] -pub type RIMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RIMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSMIC` writer - CTSMIC"] -pub type CTSMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDMIC` writer - DCDMIC"] -pub type DCDMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCDMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSRMIC` writer - DSRMIC"] -pub type DSRMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSRMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIC` writer - RXIC"] -pub type RXIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIC` writer - TXIC"] -pub type TXIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIC` writer - RTIC"] -pub type RTIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEIC` writer - FEIC"] -pub type FEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEIC` writer - PEIC"] -pub type PEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEIC` writer - BEIC"] -pub type BEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEIC` writer - OEIC"] -pub type OEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEIC_W<'a, REG> = crate::BitWriter<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -31,68 +31,68 @@ impl W { #[doc = "Bit 0 - RIMIC"] #[inline(always)] #[must_use] - pub fn rimic(&mut self) -> RIMIC_W { - RIMIC_W::new(self) + pub fn rimic(&mut self) -> RIMIC_W { + RIMIC_W::new(self, 0) } #[doc = "Bit 1 - CTSMIC"] #[inline(always)] #[must_use] - pub fn ctsmic(&mut self) -> CTSMIC_W { - CTSMIC_W::new(self) + pub fn ctsmic(&mut self) -> CTSMIC_W { + CTSMIC_W::new(self, 1) } #[doc = "Bit 2 - DCDMIC"] #[inline(always)] #[must_use] - pub fn dcdmic(&mut self) -> DCDMIC_W { - DCDMIC_W::new(self) + pub fn dcdmic(&mut self) -> DCDMIC_W { + DCDMIC_W::new(self, 2) } #[doc = "Bit 3 - DSRMIC"] #[inline(always)] #[must_use] - pub fn dsrmic(&mut self) -> DSRMIC_W { - DSRMIC_W::new(self) + pub fn dsrmic(&mut self) -> DSRMIC_W { + DSRMIC_W::new(self, 3) } #[doc = "Bit 4 - RXIC"] #[inline(always)] #[must_use] - pub fn rxic(&mut self) -> RXIC_W { - RXIC_W::new(self) + pub fn rxic(&mut self) -> RXIC_W { + RXIC_W::new(self, 4) } #[doc = "Bit 5 - TXIC"] #[inline(always)] #[must_use] - pub fn txic(&mut self) -> TXIC_W { - TXIC_W::new(self) + pub fn txic(&mut self) -> TXIC_W { + TXIC_W::new(self, 5) } #[doc = "Bit 6 - RTIC"] #[inline(always)] #[must_use] - pub fn rtic(&mut self) -> RTIC_W { - RTIC_W::new(self) + pub fn rtic(&mut self) -> RTIC_W { + RTIC_W::new(self, 6) } #[doc = "Bit 7 - FEIC"] #[inline(always)] #[must_use] - pub fn feic(&mut self) -> FEIC_W { - FEIC_W::new(self) + pub fn feic(&mut self) -> FEIC_W { + FEIC_W::new(self, 7) } #[doc = "Bit 8 - PEIC"] #[inline(always)] #[must_use] - pub fn peic(&mut self) -> PEIC_W { - PEIC_W::new(self) + pub fn peic(&mut self) -> PEIC_W { + PEIC_W::new(self, 8) } #[doc = "Bit 9 - BEIC"] #[inline(always)] #[must_use] - pub fn beic(&mut self) -> BEIC_W { - BEIC_W::new(self) + pub fn beic(&mut self) -> BEIC_W { + BEIC_W::new(self, 9) } #[doc = "Bit 10 - OEIC"] #[inline(always)] #[must_use] - pub fn oeic(&mut self) -> OEIC_W { - OEIC_W::new(self) + pub fn oeic(&mut self) -> OEIC_W { + OEIC_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/ifls.rs b/crates/bcm2835-lpa/src/uart0/ifls.rs index 5119af0..3d8257b 100644 --- a/crates/bcm2835-lpa/src/uart0/ifls.rs +++ b/crates/bcm2835-lpa/src/uart0/ifls.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `TXIFLSEL` reader - TXIFLSEL"] pub type TXIFLSEL_R = crate::FieldReader; #[doc = "Field `TXIFLSEL` writer - TXIFLSEL"] -pub type TXIFLSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TXIFLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `RXIFLSEL` reader - RXIFLSEL"] pub type RXIFLSEL_R = crate::FieldReader; #[doc = "Field `RXIFLSEL` writer - RXIFLSEL"] -pub type RXIFLSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type RXIFLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - TXIFLSEL"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - TXIFLSEL"] #[inline(always)] #[must_use] - pub fn txiflsel(&mut self) -> TXIFLSEL_W { - TXIFLSEL_W::new(self) + pub fn txiflsel(&mut self) -> TXIFLSEL_W { + TXIFLSEL_W::new(self, 0) } #[doc = "Bits 3:5 - RXIFLSEL"] #[inline(always)] #[must_use] - pub fn rxiflsel(&mut self) -> RXIFLSEL_W { - RXIFLSEL_W::new(self) + pub fn rxiflsel(&mut self) -> RXIFLSEL_W { + RXIFLSEL_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/imsc.rs b/crates/bcm2835-lpa/src/uart0/imsc.rs index 80b23a4..62b5776 100644 --- a/crates/bcm2835-lpa/src/uart0/imsc.rs +++ b/crates/bcm2835-lpa/src/uart0/imsc.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `RIMIM` reader - RIMIM"] pub type RIMIM_R = crate::BitReader; #[doc = "Field `RIMIM` writer - RIMIM"] -pub type RIMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RIMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSMIM` reader - CTSMIM"] pub type CTSMIM_R = crate::BitReader; #[doc = "Field `CTSMIM` writer - CTSMIM"] -pub type CTSMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDMIM` reader - DCDMIM"] pub type DCDMIM_R = crate::BitReader; #[doc = "Field `DCDMIM` writer - DCDMIM"] -pub type DCDMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCDMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSRMIM` reader - DSRMIM"] pub type DSRMIM_R = crate::BitReader; #[doc = "Field `DSRMIM` writer - DSRMIM"] -pub type DSRMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSRMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIM` reader - RXIM"] pub type RXIM_R = crate::BitReader; #[doc = "Field `RXIM` writer - RXIM"] -pub type RXIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIM` reader - TXIM"] pub type TXIM_R = crate::BitReader; #[doc = "Field `TXIM` writer - TXIM"] -pub type TXIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIM` reader - RTIM"] pub type RTIM_R = crate::BitReader; #[doc = "Field `RTIM` writer - RTIM"] -pub type RTIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEIM` reader - FEIM"] pub type FEIM_R = crate::BitReader; #[doc = "Field `FEIM` writer - FEIM"] -pub type FEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEIM` reader - PEIM"] pub type PEIM_R = crate::BitReader; #[doc = "Field `PEIM` writer - PEIM"] -pub type PEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEIM` reader - BEIM"] pub type BEIM_R = crate::BitReader; #[doc = "Field `BEIM` writer - BEIM"] -pub type BEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEIM` reader - OEIM"] pub type OEIM_R = crate::BitReader; #[doc = "Field `OEIM` writer - OEIM"] -pub type OEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RIMIM"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - RIMIM"] #[inline(always)] #[must_use] - pub fn rimim(&mut self) -> RIMIM_W { - RIMIM_W::new(self) + pub fn rimim(&mut self) -> RIMIM_W { + RIMIM_W::new(self, 0) } #[doc = "Bit 1 - CTSMIM"] #[inline(always)] #[must_use] - pub fn ctsmim(&mut self) -> CTSMIM_W { - CTSMIM_W::new(self) + pub fn ctsmim(&mut self) -> CTSMIM_W { + CTSMIM_W::new(self, 1) } #[doc = "Bit 2 - DCDMIM"] #[inline(always)] #[must_use] - pub fn dcdmim(&mut self) -> DCDMIM_W { - DCDMIM_W::new(self) + pub fn dcdmim(&mut self) -> DCDMIM_W { + DCDMIM_W::new(self, 2) } #[doc = "Bit 3 - DSRMIM"] #[inline(always)] #[must_use] - pub fn dsrmim(&mut self) -> DSRMIM_W { - DSRMIM_W::new(self) + pub fn dsrmim(&mut self) -> DSRMIM_W { + DSRMIM_W::new(self, 3) } #[doc = "Bit 4 - RXIM"] #[inline(always)] #[must_use] - pub fn rxim(&mut self) -> RXIM_W { - RXIM_W::new(self) + pub fn rxim(&mut self) -> RXIM_W { + RXIM_W::new(self, 4) } #[doc = "Bit 5 - TXIM"] #[inline(always)] #[must_use] - pub fn txim(&mut self) -> TXIM_W { - TXIM_W::new(self) + pub fn txim(&mut self) -> TXIM_W { + TXIM_W::new(self, 5) } #[doc = "Bit 6 - RTIM"] #[inline(always)] #[must_use] - pub fn rtim(&mut self) -> RTIM_W { - RTIM_W::new(self) + pub fn rtim(&mut self) -> RTIM_W { + RTIM_W::new(self, 6) } #[doc = "Bit 7 - FEIM"] #[inline(always)] #[must_use] - pub fn feim(&mut self) -> FEIM_W { - FEIM_W::new(self) + pub fn feim(&mut self) -> FEIM_W { + FEIM_W::new(self, 7) } #[doc = "Bit 8 - PEIM"] #[inline(always)] #[must_use] - pub fn peim(&mut self) -> PEIM_W { - PEIM_W::new(self) + pub fn peim(&mut self) -> PEIM_W { + PEIM_W::new(self, 8) } #[doc = "Bit 9 - BEIM"] #[inline(always)] #[must_use] - pub fn beim(&mut self) -> BEIM_W { - BEIM_W::new(self) + pub fn beim(&mut self) -> BEIM_W { + BEIM_W::new(self, 9) } #[doc = "Bit 10 - OEIM"] #[inline(always)] #[must_use] - pub fn oeim(&mut self) -> OEIM_W { - OEIM_W::new(self) + pub fn oeim(&mut self) -> OEIM_W { + OEIM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/lcr_h.rs b/crates/bcm2835-lpa/src/uart0/lcr_h.rs index b6c85cc..6f5ab61 100644 --- a/crates/bcm2835-lpa/src/uart0/lcr_h.rs +++ b/crates/bcm2835-lpa/src/uart0/lcr_h.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `BRK` reader - BRK"] pub type BRK_R = crate::BitReader; #[doc = "Field `BRK` writer - BRK"] -pub type BRK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BRK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEN` reader - PEN"] pub type PEN_R = crate::BitReader; #[doc = "Field `PEN` writer - PEN"] -pub type PEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPS` reader - EPS"] pub type EPS_R = crate::BitReader; #[doc = "Field `EPS` writer - EPS"] -pub type EPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STP2` reader - STP2"] pub type STP2_R = crate::BitReader; #[doc = "Field `STP2` writer - STP2"] -pub type STP2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STP2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN` reader - FEN"] pub type FEN_R = crate::BitReader; #[doc = "Field `FEN` writer - FEN"] -pub type FEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WLEN` reader - WLEN"] pub type WLEN_R = crate::FieldReader; #[doc = "Field `WLEN` writer - WLEN"] -pub type WLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type WLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SPS` reader - SPS"] pub type SPS_R = crate::BitReader; #[doc = "Field `SPS` writer - SPS"] -pub type SPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - BRK"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - BRK"] #[inline(always)] #[must_use] - pub fn brk(&mut self) -> BRK_W { - BRK_W::new(self) + pub fn brk(&mut self) -> BRK_W { + BRK_W::new(self, 0) } #[doc = "Bit 1 - PEN"] #[inline(always)] #[must_use] - pub fn pen(&mut self) -> PEN_W { - PEN_W::new(self) + pub fn pen(&mut self) -> PEN_W { + PEN_W::new(self, 1) } #[doc = "Bit 2 - EPS"] #[inline(always)] #[must_use] - pub fn eps(&mut self) -> EPS_W { - EPS_W::new(self) + pub fn eps(&mut self) -> EPS_W { + EPS_W::new(self, 2) } #[doc = "Bit 3 - STP2"] #[inline(always)] #[must_use] - pub fn stp2(&mut self) -> STP2_W { - STP2_W::new(self) + pub fn stp2(&mut self) -> STP2_W { + STP2_W::new(self, 3) } #[doc = "Bit 4 - FEN"] #[inline(always)] #[must_use] - pub fn fen(&mut self) -> FEN_W { - FEN_W::new(self) + pub fn fen(&mut self) -> FEN_W { + FEN_W::new(self, 4) } #[doc = "Bits 5:6 - WLEN"] #[inline(always)] #[must_use] - pub fn wlen(&mut self) -> WLEN_W { - WLEN_W::new(self) + pub fn wlen(&mut self) -> WLEN_W { + WLEN_W::new(self, 5) } #[doc = "Bit 7 - SPS"] #[inline(always)] #[must_use] - pub fn sps(&mut self) -> SPS_W { - SPS_W::new(self) + pub fn sps(&mut self) -> SPS_W { + SPS_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart0/mis.rs b/crates/bcm2835-lpa/src/uart0/mis.rs index 8ecfc00..acfe63e 100644 --- a/crates/bcm2835-lpa/src/uart0/mis.rs +++ b/crates/bcm2835-lpa/src/uart0/mis.rs @@ -98,7 +98,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Masked Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mis::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/uart0/ris.rs b/crates/bcm2835-lpa/src/uart0/ris.rs index 9da59ba..3d4619d 100644 --- a/crates/bcm2835-lpa/src/uart0/ris.rs +++ b/crates/bcm2835-lpa/src/uart0/ris.rs @@ -98,7 +98,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Raw Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ris::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/uart0/rsr.rs b/crates/bcm2835-lpa/src/uart0/rsr.rs index 524d503..29bc562 100644 --- a/crates/bcm2835-lpa/src/uart0/rsr.rs +++ b/crates/bcm2835-lpa/src/uart0/rsr.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Receive Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/uart1.rs b/crates/bcm2835-lpa/src/uart1.rs index 7cc03cc..943516a 100644 --- a/crates/bcm2835-lpa/src/uart1.rs +++ b/crates/bcm2835-lpa/src/uart1.rs @@ -4,46 +4,82 @@ pub struct RegisterBlock { _reserved_0_io: [u8; 0x04], _reserved_1_ier: [u8; 0x04], - #[doc = "0x08 - Interrupt Identify"] - pub iir: IIR, - #[doc = "0x0c - Line control"] - pub lcr: LCR, - #[doc = "0x10 - Modem Control"] - pub mcr: MCR, - #[doc = "0x14 - Line Status"] - pub lsr: LSR, - #[doc = "0x18 - Modem Status"] - pub msr: MSR, - #[doc = "0x1c - Scratch"] - pub scratch: SCRATCH, + iir: IIR, + lcr: LCR, + mcr: MCR, + lsr: LSR, + msr: MSR, + scratch: SCRATCH, _reserved8: [u8; 0x03], - #[doc = "0x20 - Control"] - pub cntl: CNTL, - #[doc = "0x24 - Status"] - pub stat: STAT, - #[doc = "0x28 - Baudrate"] - pub baud: BAUD, + cntl: CNTL, + stat: STAT, + baud: BAUD, } impl RegisterBlock { #[doc = "0x00 - Lower bits of baudrate when DLAB is set"] #[inline(always)] pub const fn baudl(&self) -> &BAUDL { - unsafe { &*(self as *const Self).cast::().add(0usize).cast() } + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x00 - I/O Data"] #[inline(always)] pub const fn io(&self) -> &IO { - unsafe { &*(self as *const Self).cast::().add(0usize).cast() } + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x04 - High bits of baudrate when DLAB is set"] #[inline(always)] pub const fn baudh(&self) -> &BAUDH { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + unsafe { &*(self as *const Self).cast::().add(4).cast() } } #[doc = "0x04 - Interrupt Enable"] #[inline(always)] pub const fn ier(&self) -> &IER { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x08 - Interrupt Identify"] + #[inline(always)] + pub const fn iir(&self) -> &IIR { + &self.iir + } + #[doc = "0x0c - Line control"] + #[inline(always)] + pub const fn lcr(&self) -> &LCR { + &self.lcr + } + #[doc = "0x10 - Modem Control"] + #[inline(always)] + pub const fn mcr(&self) -> &MCR { + &self.mcr + } + #[doc = "0x14 - Line Status"] + #[inline(always)] + pub const fn lsr(&self) -> &LSR { + &self.lsr + } + #[doc = "0x18 - Modem Status"] + #[inline(always)] + pub const fn msr(&self) -> &MSR { + &self.msr + } + #[doc = "0x1c - Scratch"] + #[inline(always)] + pub const fn scratch(&self) -> &SCRATCH { + &self.scratch + } + #[doc = "0x20 - Control"] + #[inline(always)] + pub const fn cntl(&self) -> &CNTL { + &self.cntl + } + #[doc = "0x24 - Status"] + #[inline(always)] + pub const fn stat(&self) -> &STAT { + &self.stat + } + #[doc = "0x28 - Baudrate"] + #[inline(always)] + pub const fn baud(&self) -> &BAUD { + &self.baud } } #[doc = "IO (rw) register accessor: I/O Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`io::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`io::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@io`] diff --git a/crates/bcm2835-lpa/src/uart1/baud.rs b/crates/bcm2835-lpa/src/uart1/baud.rs index 4cc37c7..1a1fe31 100644 --- a/crates/bcm2835-lpa/src/uart1/baud.rs +++ b/crates/bcm2835-lpa/src/uart1/baud.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/uart1/baudh.rs b/crates/bcm2835-lpa/src/uart1/baudh.rs index aa2fa88..259e873 100644 --- a/crates/bcm2835-lpa/src/uart1/baudh.rs +++ b/crates/bcm2835-lpa/src/uart1/baudh.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/uart1/baudl.rs b/crates/bcm2835-lpa/src/uart1/baudl.rs index a9c9850..966abf8 100644 --- a/crates/bcm2835-lpa/src/uart1/baudl.rs +++ b/crates/bcm2835-lpa/src/uart1/baudl.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/uart1/cntl.rs b/crates/bcm2835-lpa/src/uart1/cntl.rs index ca942f3..5615608 100644 --- a/crates/bcm2835-lpa/src/uart1/cntl.rs +++ b/crates/bcm2835-lpa/src/uart1/cntl.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `RX_ENABLE` reader - Enable receive"] pub type RX_ENABLE_R = crate::BitReader; #[doc = "Field `RX_ENABLE` writer - Enable receive"] -pub type RX_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_ENABLE` reader - Enable transmit"] pub type TX_ENABLE_R = crate::BitReader; #[doc = "Field `TX_ENABLE` writer - Enable transmit"] -pub type TX_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_ENABLE` reader - Enable auto receive flow control with RTS"] pub type RTS_ENABLE_R = crate::BitReader; #[doc = "Field `RTS_ENABLE` writer - Enable auto receive flow control with RTS"] -pub type RTS_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTS_ENABLE` reader - Enable auto transmit flow control with CTS"] pub type CTS_ENABLE_R = crate::BitReader; #[doc = "Field `CTS_ENABLE` writer - Enable auto transmit flow control with CTS"] -pub type CTS_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_FIFO_LEVEL` reader - FIFO level to de-assert RTS"] pub type RTS_FIFO_LEVEL_R = crate::FieldReader; #[doc = "FIFO level to de-assert RTS\n\nValue on reset: 0"] @@ -76,9 +76,8 @@ impl RTS_FIFO_LEVEL_R { } } #[doc = "Field `RTS_FIFO_LEVEL` writer - FIFO level to de-assert RTS"] -pub type RTS_FIFO_LEVEL_W<'a, REG, const O: u8> = - crate::FieldWriterSafe<'a, REG, 2, O, FIFO_LEVEL_A>; -impl<'a, REG, const O: u8> RTS_FIFO_LEVEL_W<'a, REG, O> +pub type RTS_FIFO_LEVEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FIFO_LEVEL_A>; +impl<'a, REG> RTS_FIFO_LEVEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -145,8 +144,8 @@ impl CTS_ASSERT_R { } } #[doc = "Field `CTS_ASSERT` writer - CTS assert level"] -pub type CTS_ASSERT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ASSERT_LEVEL_A>; -impl<'a, REG, const O: u8> CTS_ASSERT_W<'a, REG, O> +pub type CTS_ASSERT_W<'a, REG> = crate::BitWriter<'a, REG, ASSERT_LEVEL_A>; +impl<'a, REG> CTS_ASSERT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -216,51 +215,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable receive"] #[inline(always)] #[must_use] - pub fn rx_enable(&mut self) -> RX_ENABLE_W { - RX_ENABLE_W::new(self) + pub fn rx_enable(&mut self) -> RX_ENABLE_W { + RX_ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Enable transmit"] #[inline(always)] #[must_use] - pub fn tx_enable(&mut self) -> TX_ENABLE_W { - TX_ENABLE_W::new(self) + pub fn tx_enable(&mut self) -> TX_ENABLE_W { + TX_ENABLE_W::new(self, 1) } #[doc = "Bit 2 - Enable auto receive flow control with RTS"] #[inline(always)] #[must_use] - pub fn rts_enable(&mut self) -> RTS_ENABLE_W { - RTS_ENABLE_W::new(self) + pub fn rts_enable(&mut self) -> RTS_ENABLE_W { + RTS_ENABLE_W::new(self, 2) } #[doc = "Bit 3 - Enable auto transmit flow control with CTS"] #[inline(always)] #[must_use] - pub fn cts_enable(&mut self) -> CTS_ENABLE_W { - CTS_ENABLE_W::new(self) + pub fn cts_enable(&mut self) -> CTS_ENABLE_W { + CTS_ENABLE_W::new(self, 3) } #[doc = "Bits 4:5 - FIFO level to de-assert RTS"] #[inline(always)] #[must_use] - pub fn rts_fifo_level(&mut self) -> RTS_FIFO_LEVEL_W { - RTS_FIFO_LEVEL_W::new(self) + pub fn rts_fifo_level(&mut self) -> RTS_FIFO_LEVEL_W { + RTS_FIFO_LEVEL_W::new(self, 4) } #[doc = "Bit 6 - RTS assert level"] #[inline(always)] #[must_use] - pub fn rts_assert(&mut self) -> RTS_ASSERT_W { - RTS_ASSERT_W::new(self) + pub fn rts_assert(&mut self) -> RTS_ASSERT_W { + RTS_ASSERT_W::new(self, 6) } #[doc = "Bit 7 - CTS assert level"] #[inline(always)] #[must_use] - pub fn cts_assert(&mut self) -> CTS_ASSERT_W { - CTS_ASSERT_W::new(self) + pub fn cts_assert(&mut self) -> CTS_ASSERT_W { + CTS_ASSERT_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/ier.rs b/crates/bcm2835-lpa/src/uart1/ier.rs index f3188e7..397be5f 100644 --- a/crates/bcm2835-lpa/src/uart1/ier.rs +++ b/crates/bcm2835-lpa/src/uart1/ier.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least 1 byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least 1 byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO is empty"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO is empty"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive FIFO has at least 1 byte"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least 1 byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Transmit FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/iir.rs b/crates/bcm2835-lpa/src/uart1/iir.rs index b7a876b..68b5ae3 100644 --- a/crates/bcm2835-lpa/src/uart1/iir.rs +++ b/crates/bcm2835-lpa/src/uart1/iir.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `nPENDING` reader - No pending interrupt"] pub type N_PENDING_R = crate::BitReader; #[doc = "Field `nPENDING` writer - No pending interrupt"] -pub type N_PENDING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type N_PENDING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least 1 byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least 1 byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO is empty"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO is empty"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No pending interrupt"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - No pending interrupt"] #[inline(always)] #[must_use] - pub fn n_pending(&mut self) -> N_PENDING_W { - N_PENDING_W::new(self) + pub fn n_pending(&mut self) -> N_PENDING_W { + N_PENDING_W::new(self, 0) } #[doc = "Bit 1 - Receive FIFO has at least 1 byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 1) } #[doc = "Bit 2 - Transmit FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/io.rs b/crates/bcm2835-lpa/src/uart1/io.rs index 1873e08..50a4e82 100644 --- a/crates/bcm2835-lpa/src/uart1/io.rs +++ b/crates/bcm2835-lpa/src/uart1/io.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - FIFO access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - FIFO access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/lcr.rs b/crates/bcm2835-lpa/src/uart1/lcr.rs index 38e7d1e..af3e618 100644 --- a/crates/bcm2835-lpa/src/uart1/lcr.rs +++ b/crates/bcm2835-lpa/src/uart1/lcr.rs @@ -44,8 +44,8 @@ impl DATA_SIZE_R { } } #[doc = "Field `DATA_SIZE` writer - UART word size"] -pub type DATA_SIZE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, MODE_A>; -impl<'a, REG, const O: u8> DATA_SIZE_W<'a, REG, O> +pub type DATA_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE_A>; +impl<'a, REG> DATA_SIZE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -64,11 +64,11 @@ where #[doc = "Field `BREAK` reader - Pull TX low continuously to send break"] pub type BREAK_R = crate::BitReader; #[doc = "Field `BREAK` writer - Pull TX low continuously to send break"] -pub type BREAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BREAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DLAB` reader - First two registers are baudrate"] pub type DLAB_R = crate::BitReader; #[doc = "Field `DLAB` writer - First two registers are baudrate"] -pub type DLAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DLAB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - UART word size"] #[inline(always)] @@ -97,27 +97,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - UART word size"] #[inline(always)] #[must_use] - pub fn data_size(&mut self) -> DATA_SIZE_W { - DATA_SIZE_W::new(self) + pub fn data_size(&mut self) -> DATA_SIZE_W { + DATA_SIZE_W::new(self, 0) } #[doc = "Bit 6 - Pull TX low continuously to send break"] #[inline(always)] #[must_use] - pub fn break_(&mut self) -> BREAK_W { - BREAK_W::new(self) + pub fn break_(&mut self) -> BREAK_W { + BREAK_W::new(self, 6) } #[doc = "Bit 7 - First two registers are baudrate"] #[inline(always)] #[must_use] - pub fn dlab(&mut self) -> DLAB_W { - DLAB_W::new(self) + pub fn dlab(&mut self) -> DLAB_W { + DLAB_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/lsr.rs b/crates/bcm2835-lpa/src/uart1/lsr.rs index 83455e7..c1d3fb3 100644 --- a/crates/bcm2835-lpa/src/uart1/lsr.rs +++ b/crates/bcm2835-lpa/src/uart1/lsr.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least one byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least one byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_OVERRUN` reader - Receive FIFO overrun"] pub type RX_OVERRUN_R = crate::BitReader; #[doc = "Field `RX_OVERRUN` writer - Receive FIFO overrun"] -pub type RX_OVERRUN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - Transmit FIFO has room for at least one byte"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - Transmit FIFO has room for at least one byte"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_IDLE` reader - Transmit FIFO empty and all bits shifted out"] pub type TX_IDLE_R = crate::BitReader; #[doc = "Field `TX_IDLE` writer - Transmit FIFO empty and all bits shifted out"] -pub type TX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive FIFO has at least one byte"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least one byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Receive FIFO overrun"] #[inline(always)] #[must_use] - pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { - RX_OVERRUN_W::new(self) + pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { + RX_OVERRUN_W::new(self, 1) } #[doc = "Bit 5 - Transmit FIFO has room for at least one byte"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 5) } #[doc = "Bit 6 - Transmit FIFO empty and all bits shifted out"] #[inline(always)] #[must_use] - pub fn tx_idle(&mut self) -> TX_IDLE_W { - TX_IDLE_W::new(self) + pub fn tx_idle(&mut self) -> TX_IDLE_W { + TX_IDLE_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/mcr.rs b/crates/bcm2835-lpa/src/uart1/mcr.rs index 26a7cb4..af66534 100644 --- a/crates/bcm2835-lpa/src/uart1/mcr.rs +++ b/crates/bcm2835-lpa/src/uart1/mcr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RTS` reader - RTS is low"] pub type RTS_R = crate::BitReader; #[doc = "Field `RTS` writer - RTS is low"] -pub type RTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - RTS is low"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - RTS is low"] #[inline(always)] #[must_use] - pub fn rts(&mut self) -> RTS_W { - RTS_W::new(self) + pub fn rts(&mut self) -> RTS_W { + RTS_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/msr.rs b/crates/bcm2835-lpa/src/uart1/msr.rs index c6e81af..889b504 100644 --- a/crates/bcm2835-lpa/src/uart1/msr.rs +++ b/crates/bcm2835-lpa/src/uart1/msr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CTS` reader - CTS is low"] pub type CTS_R = crate::BitReader; #[doc = "Field `CTS` writer - CTS is low"] -pub type CTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - CTS is low"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 4 - CTS is low"] #[inline(always)] #[must_use] - pub fn cts(&mut self) -> CTS_W { - CTS_W::new(self) + pub fn cts(&mut self) -> CTS_W { + CTS_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/uart1/scratch.rs b/crates/bcm2835-lpa/src/uart1/scratch.rs index bd73381..e8dcef0 100644 --- a/crates/bcm2835-lpa/src/uart1/scratch.rs +++ b/crates/bcm2835-lpa/src/uart1/scratch.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/uart1/stat.rs b/crates/bcm2835-lpa/src/uart1/stat.rs index b876fef..679c73b 100644 --- a/crates/bcm2835-lpa/src/uart1/stat.rs +++ b/crates/bcm2835-lpa/src/uart1/stat.rs @@ -5,51 +5,51 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least one symbol"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least one symbol"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO has space for at least one symbol"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO has space for at least one symbol"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_IDLE` reader - Receiver is idle"] pub type RX_IDLE_R = crate::BitReader; #[doc = "Field `RX_IDLE` writer - Receiver is idle"] -pub type RX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_IDLE` reader - Transmitter is idle"] pub type TX_IDLE_R = crate::BitReader; #[doc = "Field `TX_IDLE` writer - Transmitter is idle"] -pub type TX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_OVERRUN` reader - Receive FIFO overrun"] pub type RX_OVERRUN_R = crate::BitReader; #[doc = "Field `RX_OVERRUN` writer - Receive FIFO overrun"] -pub type RX_OVERRUN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_FULL` reader - Transmit FIFO is full"] pub type TX_FULL_R = crate::BitReader; #[doc = "Field `TX_FULL` writer - Transmit FIFO is full"] -pub type TX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_STATUS` reader - RTS state"] pub type RTS_STATUS_R = crate::BitReader; #[doc = "Field `RTS_STATUS` writer - RTS state"] -pub type RTS_STATUS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTS_STATUS` reader - CTS state"] pub type CTS_STATUS_R = crate::BitReader; #[doc = "Field `CTS_STATUS` writer - CTS state"] -pub type CTS_STATUS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - Transmit FIFO is completely empty"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - Transmit FIFO is completely empty"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_DONE` reader - Transmit FIFO is empty and transmitter is idle"] pub type TX_DONE_R = crate::BitReader; #[doc = "Field `TX_DONE` writer - Transmit FIFO is empty and transmitter is idle"] -pub type TX_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_FIFO_LEVEL` reader - How many entries are filled in the RX FIFO"] pub type RX_FIFO_LEVEL_R = crate::FieldReader; #[doc = "Field `RX_FIFO_LEVEL` writer - How many entries are filled in the RX FIFO"] -pub type RX_FIFO_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type RX_FIFO_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TX_FIFO_LEVEL` reader - How many entries are filled in the TX FIFO"] pub type TX_FIFO_LEVEL_R = crate::FieldReader; #[doc = "Field `TX_FIFO_LEVEL` writer - How many entries are filled in the TX FIFO"] -pub type TX_FIFO_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TX_FIFO_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Receive FIFO has at least one symbol"] #[inline(always)] @@ -138,81 +138,81 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least one symbol"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Transmit FIFO has space for at least one symbol"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 1) } #[doc = "Bit 2 - Receiver is idle"] #[inline(always)] #[must_use] - pub fn rx_idle(&mut self) -> RX_IDLE_W { - RX_IDLE_W::new(self) + pub fn rx_idle(&mut self) -> RX_IDLE_W { + RX_IDLE_W::new(self, 2) } #[doc = "Bit 3 - Transmitter is idle"] #[inline(always)] #[must_use] - pub fn tx_idle(&mut self) -> TX_IDLE_W { - TX_IDLE_W::new(self) + pub fn tx_idle(&mut self) -> TX_IDLE_W { + TX_IDLE_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO overrun"] #[inline(always)] #[must_use] - pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { - RX_OVERRUN_W::new(self) + pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { + RX_OVERRUN_W::new(self, 4) } #[doc = "Bit 5 - Transmit FIFO is full"] #[inline(always)] #[must_use] - pub fn tx_full(&mut self) -> TX_FULL_W { - TX_FULL_W::new(self) + pub fn tx_full(&mut self) -> TX_FULL_W { + TX_FULL_W::new(self, 5) } #[doc = "Bit 6 - RTS state"] #[inline(always)] #[must_use] - pub fn rts_status(&mut self) -> RTS_STATUS_W { - RTS_STATUS_W::new(self) + pub fn rts_status(&mut self) -> RTS_STATUS_W { + RTS_STATUS_W::new(self, 6) } #[doc = "Bit 7 - CTS state"] #[inline(always)] #[must_use] - pub fn cts_status(&mut self) -> CTS_STATUS_W { - CTS_STATUS_W::new(self) + pub fn cts_status(&mut self) -> CTS_STATUS_W { + CTS_STATUS_W::new(self, 7) } #[doc = "Bit 8 - Transmit FIFO is completely empty"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 8) } #[doc = "Bit 9 - Transmit FIFO is empty and transmitter is idle"] #[inline(always)] #[must_use] - pub fn tx_done(&mut self) -> TX_DONE_W { - TX_DONE_W::new(self) + pub fn tx_done(&mut self) -> TX_DONE_W { + TX_DONE_W::new(self, 9) } #[doc = "Bits 16:19 - How many entries are filled in the RX FIFO"] #[inline(always)] #[must_use] - pub fn rx_fifo_level(&mut self) -> RX_FIFO_LEVEL_W { - RX_FIFO_LEVEL_W::new(self) + pub fn rx_fifo_level(&mut self) -> RX_FIFO_LEVEL_W { + RX_FIFO_LEVEL_W::new(self, 16) } #[doc = "Bits 24:27 - How many entries are filled in the TX FIFO"] #[inline(always)] #[must_use] - pub fn tx_fifo_level(&mut self) -> TX_FIFO_LEVEL_W { - TX_FIFO_LEVEL_W::new(self) + pub fn tx_fifo_level(&mut self) -> TX_FIFO_LEVEL_W { + TX_FIFO_LEVEL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device.rs b/crates/bcm2835-lpa/src/usb_otg_device.rs index 140d7ba..4c4dbc2 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device.rs @@ -2,111 +2,269 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + dcfg: DCFG, + dctl: DCTL, + dsts: DSTS, + _reserved3: [u8; 0x04], + diepmsk: DIEPMSK, + doepmsk: DOEPMSK, + daint: DAINT, + daintmsk: DAINTMSK, + _reserved7: [u8; 0x08], + dvbusdis: DVBUSDIS, + dvbuspulse: DVBUSPULSE, + dthrctl: DTHRCTL, + diepempmsk: DIEPEMPMSK, + deachint: DEACHINT, + deachintmsk: DEACHINTMSK, + diepeachmsk1: DIEPEACHMSK1, + _reserved14: [u8; 0x3c], + doepeachmsk1: DOEPEACHMSK1, + _reserved15: [u8; 0x7c], + in_endpoint0: IN_ENDPOINT, + _reserved16: [u8; 0x04], + in_endpoint1: IN_ENDPOINT, + _reserved17: [u8; 0x04], + in_endpoint2: IN_ENDPOINT, + _reserved18: [u8; 0x04], + in_endpoint3: IN_ENDPOINT, + _reserved19: [u8; 0x04], + in_endpoint4: IN_ENDPOINT, + _reserved20: [u8; 0x04], + in_endpoint5: IN_ENDPOINT, + _reserved21: [u8; 0x04], + in_endpoint6: IN_ENDPOINT, + _reserved22: [u8; 0x04], + in_endpoint7: IN_ENDPOINT, + _reserved23: [u8; 0x04], + in_endpoint8: IN_ENDPOINT, + _reserved24: [u8; 0x04], + in_endpoint9: IN_ENDPOINT, + _reserved25: [u8; 0x04], + in_endpoint10: IN_ENDPOINT, + _reserved26: [u8; 0x04], + in_endpoint11: IN_ENDPOINT, + _reserved27: [u8; 0x84], + out_endpoint0: OUT_ENDPOINT, + _reserved28: [u8; 0x08], + out_endpoint1: OUT_ENDPOINT, + _reserved29: [u8; 0x08], + out_endpoint2: OUT_ENDPOINT, + _reserved30: [u8; 0x08], + out_endpoint3: OUT_ENDPOINT, + _reserved31: [u8; 0x08], + out_endpoint4: OUT_ENDPOINT, + _reserved32: [u8; 0x08], + out_endpoint5: OUT_ENDPOINT, + _reserved33: [u8; 0x08], + out_endpoint6: OUT_ENDPOINT, + _reserved34: [u8; 0x08], + out_endpoint7: OUT_ENDPOINT, + _reserved35: [u8; 0x08], + out_endpoint8: OUT_ENDPOINT, + _reserved36: [u8; 0x08], + out_endpoint9: OUT_ENDPOINT, + _reserved37: [u8; 0x08], + out_endpoint10: OUT_ENDPOINT, + _reserved38: [u8; 0x08], + out_endpoint11: OUT_ENDPOINT, +} +impl RegisterBlock { #[doc = "0x00 - OTG_HS device configuration register"] - pub dcfg: DCFG, + #[inline(always)] + pub const fn dcfg(&self) -> &DCFG { + &self.dcfg + } #[doc = "0x04 - OTG_HS device control register"] - pub dctl: DCTL, + #[inline(always)] + pub const fn dctl(&self) -> &DCTL { + &self.dctl + } #[doc = "0x08 - OTG_HS device status register"] - pub dsts: DSTS, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn dsts(&self) -> &DSTS { + &self.dsts + } #[doc = "0x10 - OTG_HS device IN endpoint common interrupt mask register"] - pub diepmsk: DIEPMSK, + #[inline(always)] + pub const fn diepmsk(&self) -> &DIEPMSK { + &self.diepmsk + } #[doc = "0x14 - OTG_HS device OUT endpoint common interrupt mask register"] - pub doepmsk: DOEPMSK, + #[inline(always)] + pub const fn doepmsk(&self) -> &DOEPMSK { + &self.doepmsk + } #[doc = "0x18 - OTG_HS device all endpoints interrupt register"] - pub daint: DAINT, + #[inline(always)] + pub const fn daint(&self) -> &DAINT { + &self.daint + } #[doc = "0x1c - OTG_HS all endpoints interrupt mask register"] - pub daintmsk: DAINTMSK, - _reserved7: [u8; 0x08], + #[inline(always)] + pub const fn daintmsk(&self) -> &DAINTMSK { + &self.daintmsk + } #[doc = "0x28 - OTG_HS device VBUS discharge time register"] - pub dvbusdis: DVBUSDIS, + #[inline(always)] + pub const fn dvbusdis(&self) -> &DVBUSDIS { + &self.dvbusdis + } #[doc = "0x2c - OTG_HS device VBUS pulsing time register"] - pub dvbuspulse: DVBUSPULSE, + #[inline(always)] + pub const fn dvbuspulse(&self) -> &DVBUSPULSE { + &self.dvbuspulse + } #[doc = "0x30 - OTG_HS Device threshold control register"] - pub dthrctl: DTHRCTL, + #[inline(always)] + pub const fn dthrctl(&self) -> &DTHRCTL { + &self.dthrctl + } #[doc = "0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register"] - pub diepempmsk: DIEPEMPMSK, + #[inline(always)] + pub const fn diepempmsk(&self) -> &DIEPEMPMSK { + &self.diepempmsk + } #[doc = "0x38 - OTG_HS device each endpoint interrupt register"] - pub deachint: DEACHINT, + #[inline(always)] + pub const fn deachint(&self) -> &DEACHINT { + &self.deachint + } #[doc = "0x3c - OTG_HS device each endpoint interrupt register mask"] - pub deachintmsk: DEACHINTMSK, + #[inline(always)] + pub const fn deachintmsk(&self) -> &DEACHINTMSK { + &self.deachintmsk + } #[doc = "0x40 - OTG_HS device each in endpoint-1 interrupt register"] - pub diepeachmsk1: DIEPEACHMSK1, - _reserved14: [u8; 0x3c], + #[inline(always)] + pub const fn diepeachmsk1(&self) -> &DIEPEACHMSK1 { + &self.diepeachmsk1 + } #[doc = "0x80 - OTG_HS device each OUT endpoint-1 interrupt register"] - pub doepeachmsk1: DOEPEACHMSK1, - _reserved15: [u8; 0x7c], + #[inline(always)] + pub const fn doepeachmsk1(&self) -> &DOEPEACHMSK1 { + &self.doepeachmsk1 + } #[doc = "0x100..0x11c - IN Endpoint 0"] - pub in_endpoint0: IN_ENDPOINT, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint0(&self) -> &IN_ENDPOINT { + &self.in_endpoint0 + } #[doc = "0x120..0x13c - IN Endpoint 1"] - pub in_endpoint1: IN_ENDPOINT, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint1(&self) -> &IN_ENDPOINT { + &self.in_endpoint1 + } #[doc = "0x140..0x15c - IN Endpoint 2"] - pub in_endpoint2: IN_ENDPOINT, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint2(&self) -> &IN_ENDPOINT { + &self.in_endpoint2 + } #[doc = "0x160..0x17c - IN Endpoint 3"] - pub in_endpoint3: IN_ENDPOINT, - _reserved19: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint3(&self) -> &IN_ENDPOINT { + &self.in_endpoint3 + } #[doc = "0x180..0x19c - IN Endpoint 4"] - pub in_endpoint4: IN_ENDPOINT, - _reserved20: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint4(&self) -> &IN_ENDPOINT { + &self.in_endpoint4 + } #[doc = "0x1a0..0x1bc - IN Endpoint 5"] - pub in_endpoint5: IN_ENDPOINT, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint5(&self) -> &IN_ENDPOINT { + &self.in_endpoint5 + } #[doc = "0x1c0..0x1dc - IN Endpoint 6"] - pub in_endpoint6: IN_ENDPOINT, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint6(&self) -> &IN_ENDPOINT { + &self.in_endpoint6 + } #[doc = "0x1e0..0x1fc - IN Endpoint 7"] - pub in_endpoint7: IN_ENDPOINT, - _reserved23: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint7(&self) -> &IN_ENDPOINT { + &self.in_endpoint7 + } #[doc = "0x200..0x21c - IN Endpoint 8"] - pub in_endpoint8: IN_ENDPOINT, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint8(&self) -> &IN_ENDPOINT { + &self.in_endpoint8 + } #[doc = "0x220..0x23c - IN Endpoint 9"] - pub in_endpoint9: IN_ENDPOINT, - _reserved25: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint9(&self) -> &IN_ENDPOINT { + &self.in_endpoint9 + } #[doc = "0x240..0x25c - IN Endpoint 10"] - pub in_endpoint10: IN_ENDPOINT, - _reserved26: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint10(&self) -> &IN_ENDPOINT { + &self.in_endpoint10 + } #[doc = "0x260..0x27c - IN Endpoint 11"] - pub in_endpoint11: IN_ENDPOINT, - _reserved27: [u8; 0x84], + #[inline(always)] + pub const fn in_endpoint11(&self) -> &IN_ENDPOINT { + &self.in_endpoint11 + } #[doc = "0x300..0x318 - OUT Endpoint 0"] - pub out_endpoint0: OUT_ENDPOINT, - _reserved28: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint0(&self) -> &OUT_ENDPOINT { + &self.out_endpoint0 + } #[doc = "0x320..0x338 - OUT Endpoint 1"] - pub out_endpoint1: OUT_ENDPOINT, - _reserved29: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint1(&self) -> &OUT_ENDPOINT { + &self.out_endpoint1 + } #[doc = "0x340..0x358 - OUT Endpoint 2"] - pub out_endpoint2: OUT_ENDPOINT, - _reserved30: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint2(&self) -> &OUT_ENDPOINT { + &self.out_endpoint2 + } #[doc = "0x360..0x378 - OUT Endpoint 3"] - pub out_endpoint3: OUT_ENDPOINT, - _reserved31: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint3(&self) -> &OUT_ENDPOINT { + &self.out_endpoint3 + } #[doc = "0x380..0x398 - OUT Endpoint 4"] - pub out_endpoint4: OUT_ENDPOINT, - _reserved32: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint4(&self) -> &OUT_ENDPOINT { + &self.out_endpoint4 + } #[doc = "0x3a0..0x3b8 - OUT Endpoint 5"] - pub out_endpoint5: OUT_ENDPOINT, - _reserved33: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint5(&self) -> &OUT_ENDPOINT { + &self.out_endpoint5 + } #[doc = "0x3c0..0x3d8 - OUT Endpoint 6"] - pub out_endpoint6: OUT_ENDPOINT, - _reserved34: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint6(&self) -> &OUT_ENDPOINT { + &self.out_endpoint6 + } #[doc = "0x3e0..0x3f8 - OUT Endpoint 7"] - pub out_endpoint7: OUT_ENDPOINT, - _reserved35: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint7(&self) -> &OUT_ENDPOINT { + &self.out_endpoint7 + } #[doc = "0x400..0x418 - OUT Endpoint 8"] - pub out_endpoint8: OUT_ENDPOINT, - _reserved36: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint8(&self) -> &OUT_ENDPOINT { + &self.out_endpoint8 + } #[doc = "0x420..0x438 - OUT Endpoint 9"] - pub out_endpoint9: OUT_ENDPOINT, - _reserved37: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint9(&self) -> &OUT_ENDPOINT { + &self.out_endpoint9 + } #[doc = "0x440..0x458 - OUT Endpoint 10"] - pub out_endpoint10: OUT_ENDPOINT, - _reserved38: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint10(&self) -> &OUT_ENDPOINT { + &self.out_endpoint10 + } #[doc = "0x460..0x478 - OUT Endpoint 11"] - pub out_endpoint11: OUT_ENDPOINT, + #[inline(always)] + pub const fn out_endpoint11(&self) -> &OUT_ENDPOINT { + &self.out_endpoint11 + } } #[doc = "DCFG (rw) register accessor: OTG_HS device configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] module"] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/daint.rs b/crates/bcm2835-lpa/src/usb_otg_device/daint.rs index 3210b36..69e661f 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/daint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/daint.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS device all endpoints interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/daintmsk.rs b/crates/bcm2835-lpa/src/usb_otg_device/daintmsk.rs index 44196aa..ddd94d4 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/daintmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/daintmsk.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEPM` reader - IN EP interrupt mask bits"] pub type IEPM_R = crate::FieldReader; #[doc = "Field `IEPM` writer - IN EP interrupt mask bits"] -pub type IEPM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type IEPM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `OEPM` reader - OUT EP interrupt mask bits"] pub type OEPM_R = crate::FieldReader; #[doc = "Field `OEPM` writer - OUT EP interrupt mask bits"] -pub type OEPM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type OEPM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP interrupt mask bits"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN EP interrupt mask bits"] #[inline(always)] #[must_use] - pub fn iepm(&mut self) -> IEPM_W { - IEPM_W::new(self) + pub fn iepm(&mut self) -> IEPM_W { + IEPM_W::new(self, 0) } #[doc = "Bits 16:31 - OUT EP interrupt mask bits"] #[inline(always)] #[must_use] - pub fn oepm(&mut self) -> OEPM_W { - OEPM_W::new(self) + pub fn oepm(&mut self) -> OEPM_W { + OEPM_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/dcfg.rs b/crates/bcm2835-lpa/src/usb_otg_device/dcfg.rs index fc2bbc8..e1c82c1 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/dcfg.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/dcfg.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `DSPD` reader - Device speed"] pub type DSPD_R = crate::FieldReader; #[doc = "Field `DSPD` writer - Device speed"] -pub type DSPD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type DSPD_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `NZLSOHSK` reader - Nonzero-length status OUT handshake"] pub type NZLSOHSK_R = crate::BitReader; #[doc = "Field `NZLSOHSK` writer - Nonzero-length status OUT handshake"] -pub type NZLSOHSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NZLSOHSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAD` reader - Device address"] pub type DAD_R = crate::FieldReader; #[doc = "Field `DAD` writer - Device address"] -pub type DAD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type DAD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PFIVL` reader - Periodic (micro)frame interval"] pub type PFIVL_R = crate::FieldReader; #[doc = "Field `PFIVL` writer - Periodic (micro)frame interval"] -pub type PFIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PFIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PERSCHIVL` reader - Periodic scheduling interval"] pub type PERSCHIVL_R = crate::FieldReader; #[doc = "Field `PERSCHIVL` writer - Periodic scheduling interval"] -pub type PERSCHIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PERSCHIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] #[must_use] - pub fn dspd(&mut self) -> DSPD_W { - DSPD_W::new(self) + pub fn dspd(&mut self) -> DSPD_W { + DSPD_W::new(self, 0) } #[doc = "Bit 2 - Nonzero-length status OUT handshake"] #[inline(always)] #[must_use] - pub fn nzlsohsk(&mut self) -> NZLSOHSK_W { - NZLSOHSK_W::new(self) + pub fn nzlsohsk(&mut self) -> NZLSOHSK_W { + NZLSOHSK_W::new(self, 2) } #[doc = "Bits 4:10 - Device address"] #[inline(always)] #[must_use] - pub fn dad(&mut self) -> DAD_W { - DAD_W::new(self) + pub fn dad(&mut self) -> DAD_W { + DAD_W::new(self, 4) } #[doc = "Bits 11:12 - Periodic (micro)frame interval"] #[inline(always)] #[must_use] - pub fn pfivl(&mut self) -> PFIVL_W { - PFIVL_W::new(self) + pub fn pfivl(&mut self) -> PFIVL_W { + PFIVL_W::new(self, 11) } #[doc = "Bits 24:25 - Periodic scheduling interval"] #[inline(always)] #[must_use] - pub fn perschivl(&mut self) -> PERSCHIVL_W { - PERSCHIVL_W::new(self) + pub fn perschivl(&mut self) -> PERSCHIVL_W { + PERSCHIVL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/dctl.rs b/crates/bcm2835-lpa/src/usb_otg_device/dctl.rs index 42ffebd..cd2765c 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/dctl.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/dctl.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `RWUSIG` reader - Remote wakeup signaling"] pub type RWUSIG_R = crate::BitReader; #[doc = "Field `RWUSIG` writer - Remote wakeup signaling"] -pub type RWUSIG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RWUSIG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIS` reader - Soft disconnect"] pub type SDIS_R = crate::BitReader; #[doc = "Field `SDIS` writer - Soft disconnect"] -pub type SDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINSTS` reader - Global IN NAK status"] pub type GINSTS_R = crate::BitReader; #[doc = "Field `GONSTS` reader - Global OUT NAK status"] @@ -17,19 +17,19 @@ pub type GONSTS_R = crate::BitReader; #[doc = "Field `TCTL` reader - Test control"] pub type TCTL_R = crate::FieldReader; #[doc = "Field `TCTL` writer - Test control"] -pub type TCTL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SGINAK` writer - Set global IN NAK"] -pub type SGINAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SGINAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGINAK` writer - Clear global IN NAK"] -pub type CGINAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CGINAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SGONAK` writer - Set global OUT NAK"] -pub type SGONAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SGONAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGONAK` writer - Clear global OUT NAK"] -pub type CGONAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CGONAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POPRGDNE` reader - Power-on programming done"] pub type POPRGDNE_R = crate::BitReader; #[doc = "Field `POPRGDNE` writer - Power-on programming done"] -pub type POPRGDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POPRGDNE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Remote wakeup signaling"] #[inline(always)] @@ -76,57 +76,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Remote wakeup signaling"] #[inline(always)] #[must_use] - pub fn rwusig(&mut self) -> RWUSIG_W { - RWUSIG_W::new(self) + pub fn rwusig(&mut self) -> RWUSIG_W { + RWUSIG_W::new(self, 0) } #[doc = "Bit 1 - Soft disconnect"] #[inline(always)] #[must_use] - pub fn sdis(&mut self) -> SDIS_W { - SDIS_W::new(self) + pub fn sdis(&mut self) -> SDIS_W { + SDIS_W::new(self, 1) } #[doc = "Bits 4:6 - Test control"] #[inline(always)] #[must_use] - pub fn tctl(&mut self) -> TCTL_W { - TCTL_W::new(self) + pub fn tctl(&mut self) -> TCTL_W { + TCTL_W::new(self, 4) } #[doc = "Bit 7 - Set global IN NAK"] #[inline(always)] #[must_use] - pub fn sginak(&mut self) -> SGINAK_W { - SGINAK_W::new(self) + pub fn sginak(&mut self) -> SGINAK_W { + SGINAK_W::new(self, 7) } #[doc = "Bit 8 - Clear global IN NAK"] #[inline(always)] #[must_use] - pub fn cginak(&mut self) -> CGINAK_W { - CGINAK_W::new(self) + pub fn cginak(&mut self) -> CGINAK_W { + CGINAK_W::new(self, 8) } #[doc = "Bit 9 - Set global OUT NAK"] #[inline(always)] #[must_use] - pub fn sgonak(&mut self) -> SGONAK_W { - SGONAK_W::new(self) + pub fn sgonak(&mut self) -> SGONAK_W { + SGONAK_W::new(self, 9) } #[doc = "Bit 10 - Clear global OUT NAK"] #[inline(always)] #[must_use] - pub fn cgonak(&mut self) -> CGONAK_W { - CGONAK_W::new(self) + pub fn cgonak(&mut self) -> CGONAK_W { + CGONAK_W::new(self, 10) } #[doc = "Bit 11 - Power-on programming done"] #[inline(always)] #[must_use] - pub fn poprgdne(&mut self) -> POPRGDNE_W { - POPRGDNE_W::new(self) + pub fn poprgdne(&mut self) -> POPRGDNE_W { + POPRGDNE_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/deachint.rs b/crates/bcm2835-lpa/src/usb_otg_device/deachint.rs index f8f0c35..7e2e5d4 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/deachint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/deachint.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEP1INT` reader - IN endpoint 1interrupt bit"] pub type IEP1INT_R = crate::BitReader; #[doc = "Field `IEP1INT` writer - IN endpoint 1interrupt bit"] -pub type IEP1INT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEP1INT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEP1INT` reader - OUT endpoint 1 interrupt bit"] pub type OEP1INT_R = crate::BitReader; #[doc = "Field `OEP1INT` writer - OUT endpoint 1 interrupt bit"] -pub type OEP1INT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEP1INT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - IN endpoint 1interrupt bit"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - IN endpoint 1interrupt bit"] #[inline(always)] #[must_use] - pub fn iep1int(&mut self) -> IEP1INT_W { - IEP1INT_W::new(self) + pub fn iep1int(&mut self) -> IEP1INT_W { + IEP1INT_W::new(self, 1) } #[doc = "Bit 17 - OUT endpoint 1 interrupt bit"] #[inline(always)] #[must_use] - pub fn oep1int(&mut self) -> OEP1INT_W { - OEP1INT_W::new(self) + pub fn oep1int(&mut self) -> OEP1INT_W { + OEP1INT_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/deachintmsk.rs b/crates/bcm2835-lpa/src/usb_otg_device/deachintmsk.rs index 8979089..ef76a4e 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/deachintmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/deachintmsk.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEP1INTM` reader - IN Endpoint 1 interrupt mask bit"] pub type IEP1INTM_R = crate::BitReader; #[doc = "Field `IEP1INTM` writer - IN Endpoint 1 interrupt mask bit"] -pub type IEP1INTM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEP1INTM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEP1INTM` reader - OUT Endpoint 1 interrupt mask bit"] pub type OEP1INTM_R = crate::BitReader; #[doc = "Field `OEP1INTM` writer - OUT Endpoint 1 interrupt mask bit"] -pub type OEP1INTM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEP1INTM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - IN Endpoint 1 interrupt mask bit"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - IN Endpoint 1 interrupt mask bit"] #[inline(always)] #[must_use] - pub fn iep1intm(&mut self) -> IEP1INTM_W { - IEP1INTM_W::new(self) + pub fn iep1intm(&mut self) -> IEP1INTM_W { + IEP1INTM_W::new(self, 1) } #[doc = "Bit 17 - OUT Endpoint 1 interrupt mask bit"] #[inline(always)] #[must_use] - pub fn oep1intm(&mut self) -> OEP1INTM_W { - OEP1INTM_W::new(self) + pub fn oep1intm(&mut self) -> OEP1INTM_W { + OEP1INTM_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/diepeachmsk1.rs b/crates/bcm2835-lpa/src/usb_otg_device/diepeachmsk1.rs index b6d85a8..015ca9a 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/diepeachmsk1.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/diepeachmsk1.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask (nonisochronous endpoints)"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask (nonisochronous endpoints)"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - FIFO underrun mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - FIFO underrun mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask (nonisochronous endpoints)"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - FIFO underrun mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = "Bit 13 - NAK interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/diepempmsk.rs b/crates/bcm2835-lpa/src/usb_otg_device/diepempmsk.rs index 89831f3..f81b3f4 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/diepempmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/diepempmsk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `INEPTXFEM` reader - IN EP Tx FIFO empty interrupt mask bits"] pub type INEPTXFEM_R = crate::FieldReader; #[doc = "Field `INEPTXFEM` writer - IN EP Tx FIFO empty interrupt mask bits"] -pub type INEPTXFEM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFEM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits"] #[inline(always)] #[must_use] - pub fn ineptxfem(&mut self) -> INEPTXFEM_W { - INEPTXFEM_W::new(self) + pub fn ineptxfem(&mut self) -> INEPTXFEM_W { + INEPTXFEM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/diepmsk.rs b/crates/bcm2835-lpa/src/usb_otg_device/diepmsk.rs index 8bd397c..da31f73 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/diepmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/diepmsk.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask (nonisochronous endpoints)"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask (nonisochronous endpoints)"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - FIFO underrun mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - FIFO underrun mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -92,57 +92,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask (nonisochronous endpoints)"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - FIFO underrun mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/doepeachmsk1.rs b/crates/bcm2835-lpa/src/usb_otg_device/doepeachmsk1.rs index 7c60dcc..9d7c73d 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/doepeachmsk1.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/doepeachmsk1.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - OUT packet error mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - OUT packet error mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERRM` reader - Bubble error interrupt mask"] pub type BERRM_R = crate::BitReader; #[doc = "Field `BERRM` writer - Bubble error interrupt mask"] -pub type BERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETM` reader - NYET interrupt mask"] pub type NYETM_R = crate::BitReader; #[doc = "Field `NYETM` writer - NYET interrupt mask"] -pub type NYETM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYETM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - OUT packet error mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = "Bit 12 - Bubble error interrupt mask"] #[inline(always)] #[must_use] - pub fn berrm(&mut self) -> BERRM_W { - BERRM_W::new(self) + pub fn berrm(&mut self) -> BERRM_W { + BERRM_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt mask"] #[inline(always)] #[must_use] - pub fn nyetm(&mut self) -> NYETM_W { - NYETM_W::new(self) + pub fn nyetm(&mut self) -> NYETM_W { + NYETM_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/doepmsk.rs b/crates/bcm2835-lpa/src/usb_otg_device/doepmsk.rs index dbed437..5613f52 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/doepmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/doepmsk.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUPM` reader - SETUP phase done mask"] pub type STUPM_R = crate::BitReader; #[doc = "Field `STUPM` writer - SETUP phase done mask"] -pub type STUPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STUPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTEPDM` reader - OUT token received when endpoint disabled mask"] pub type OTEPDM_R = crate::BitReader; #[doc = "Field `OTEPDM` writer - OUT token received when endpoint disabled mask"] -pub type OTEPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTEPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `B2BSTUP` reader - Back-to-back SETUP packets received mask"] pub type B2BSTUP_R = crate::BitReader; #[doc = "Field `B2BSTUP` writer - Back-to-back SETUP packets received mask"] -pub type B2BSTUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type B2BSTUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OPEM` reader - OUT packet error mask"] pub type OPEM_R = crate::BitReader; #[doc = "Field `OPEM` writer - OUT packet error mask"] -pub type OPEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OPEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOIM` reader - BNA interrupt mask"] pub type BOIM_R = crate::BitReader; #[doc = "Field `BOIM` writer - BNA interrupt mask"] -pub type BOIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - SETUP phase done mask"] #[inline(always)] #[must_use] - pub fn stupm(&mut self) -> STUPM_W { - STUPM_W::new(self) + pub fn stupm(&mut self) -> STUPM_W { + STUPM_W::new(self, 3) } #[doc = "Bit 4 - OUT token received when endpoint disabled mask"] #[inline(always)] #[must_use] - pub fn otepdm(&mut self) -> OTEPDM_W { - OTEPDM_W::new(self) + pub fn otepdm(&mut self) -> OTEPDM_W { + OTEPDM_W::new(self, 4) } #[doc = "Bit 6 - Back-to-back SETUP packets received mask"] #[inline(always)] #[must_use] - pub fn b2bstup(&mut self) -> B2BSTUP_W { - B2BSTUP_W::new(self) + pub fn b2bstup(&mut self) -> B2BSTUP_W { + B2BSTUP_W::new(self, 6) } #[doc = "Bit 8 - OUT packet error mask"] #[inline(always)] #[must_use] - pub fn opem(&mut self) -> OPEM_W { - OPEM_W::new(self) + pub fn opem(&mut self) -> OPEM_W { + OPEM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn boim(&mut self) -> BOIM_W { - BOIM_W::new(self) + pub fn boim(&mut self) -> BOIM_W { + BOIM_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/dsts.rs b/crates/bcm2835-lpa/src/usb_otg_device/dsts.rs index 3d4bf4f..b9ba828 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/dsts.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/dsts.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS device status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/dthrctl.rs b/crates/bcm2835-lpa/src/usb_otg_device/dthrctl.rs index 5044505..aeb3156 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/dthrctl.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/dthrctl.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `NONISOTHREN` reader - Nonisochronous IN endpoints threshold enable"] pub type NONISOTHREN_R = crate::BitReader; #[doc = "Field `NONISOTHREN` writer - Nonisochronous IN endpoints threshold enable"] -pub type NONISOTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NONISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOTHREN` reader - ISO IN endpoint threshold enable"] pub type ISOTHREN_R = crate::BitReader; #[doc = "Field `ISOTHREN` writer - ISO IN endpoint threshold enable"] -pub type ISOTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTHRLEN` reader - Transmit threshold length"] pub type TXTHRLEN_R = crate::FieldReader; #[doc = "Field `TXTHRLEN` writer - Transmit threshold length"] -pub type TXTHRLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 9, O, u16>; +pub type TXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `RXTHREN` reader - Receive threshold enable"] pub type RXTHREN_R = crate::BitReader; #[doc = "Field `RXTHREN` writer - Receive threshold enable"] -pub type RXTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTHRLEN` reader - Receive threshold length"] pub type RXTHRLEN_R = crate::FieldReader; #[doc = "Field `RXTHRLEN` writer - Receive threshold length"] -pub type RXTHRLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 9, O, u16>; +pub type RXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `ARPEN` reader - Arbiter parking enable"] pub type ARPEN_R = crate::BitReader; #[doc = "Field `ARPEN` writer - Arbiter parking enable"] -pub type ARPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARPEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Nonisochronous IN endpoints threshold enable"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Nonisochronous IN endpoints threshold enable"] #[inline(always)] #[must_use] - pub fn nonisothren(&mut self) -> NONISOTHREN_W { - NONISOTHREN_W::new(self) + pub fn nonisothren(&mut self) -> NONISOTHREN_W { + NONISOTHREN_W::new(self, 0) } #[doc = "Bit 1 - ISO IN endpoint threshold enable"] #[inline(always)] #[must_use] - pub fn isothren(&mut self) -> ISOTHREN_W { - ISOTHREN_W::new(self) + pub fn isothren(&mut self) -> ISOTHREN_W { + ISOTHREN_W::new(self, 1) } #[doc = "Bits 2:10 - Transmit threshold length"] #[inline(always)] #[must_use] - pub fn txthrlen(&mut self) -> TXTHRLEN_W { - TXTHRLEN_W::new(self) + pub fn txthrlen(&mut self) -> TXTHRLEN_W { + TXTHRLEN_W::new(self, 2) } #[doc = "Bit 16 - Receive threshold enable"] #[inline(always)] #[must_use] - pub fn rxthren(&mut self) -> RXTHREN_W { - RXTHREN_W::new(self) + pub fn rxthren(&mut self) -> RXTHREN_W { + RXTHREN_W::new(self, 16) } #[doc = "Bits 17:25 - Receive threshold length"] #[inline(always)] #[must_use] - pub fn rxthrlen(&mut self) -> RXTHRLEN_W { - RXTHRLEN_W::new(self) + pub fn rxthrlen(&mut self) -> RXTHRLEN_W { + RXTHRLEN_W::new(self, 17) } #[doc = "Bit 27 - Arbiter parking enable"] #[inline(always)] #[must_use] - pub fn arpen(&mut self) -> ARPEN_W { - ARPEN_W::new(self) + pub fn arpen(&mut self) -> ARPEN_W { + ARPEN_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/dvbusdis.rs b/crates/bcm2835-lpa/src/usb_otg_device/dvbusdis.rs index 06b297e..d2f9b3b 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/dvbusdis.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/dvbusdis.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `VBUSDT` reader - Device VBUS discharge time"] pub type VBUSDT_R = crate::FieldReader; #[doc = "Field `VBUSDT` writer - Device VBUS discharge time"] -pub type VBUSDT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type VBUSDT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] #[must_use] - pub fn vbusdt(&mut self) -> VBUSDT_W { - VBUSDT_W::new(self) + pub fn vbusdt(&mut self) -> VBUSDT_W { + VBUSDT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/dvbuspulse.rs b/crates/bcm2835-lpa/src/usb_otg_device/dvbuspulse.rs index 52acecf..ec93af7 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/dvbuspulse.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/dvbuspulse.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DVBUSP` reader - Device VBUS pulsing time"] pub type DVBUSP_R = crate::FieldReader; #[doc = "Field `DVBUSP` writer - Device VBUS pulsing time"] -pub type DVBUSP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DVBUSP_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] #[must_use] - pub fn dvbusp(&mut self) -> DVBUSP_W { - DVBUSP_W::new(self) + pub fn dvbusp(&mut self) -> DVBUSP_W { + DVBUSP_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint.rs b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint.rs index 0e94feb..adf4157 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint.rs @@ -2,18 +2,40 @@ #[repr(C)] #[derive(Debug)] pub struct IN_ENDPOINT { - #[doc = "0x00 - Control"] - pub diepctl0: DIEPCTL0, + diepctl0: DIEPCTL0, _reserved1: [u8; 0x04], - #[doc = "0x08 - Interrupt"] - pub diepint: DIEPINT, + diepint: DIEPINT, _reserved2: [u8; 0x04], + dieptsiz: DIEPTSIZ, + diepdma: DIEPDMA, + dtxfsts: DTXFSTS, +} +impl IN_ENDPOINT { + #[doc = "0x00 - Control"] + #[inline(always)] + pub const fn diepctl0(&self) -> &DIEPCTL0 { + &self.diepctl0 + } + #[doc = "0x08 - Interrupt"] + #[inline(always)] + pub const fn diepint(&self) -> &DIEPINT { + &self.diepint + } #[doc = "0x10 - Transfer size"] - pub dieptsiz: DIEPTSIZ, + #[inline(always)] + pub const fn dieptsiz(&self) -> &DIEPTSIZ { + &self.dieptsiz + } #[doc = "0x14 - DMA address"] - pub diepdma: DIEPDMA, + #[inline(always)] + pub const fn diepdma(&self) -> &DIEPDMA { + &self.diepdma + } #[doc = "0x18 - Transmit FIFO status"] - pub dtxfsts: DTXFSTS, + #[inline(always)] + pub const fn dtxfsts(&self) -> &DTXFSTS { + &self.dtxfsts + } } #[doc = "DIEPCTL0 (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] module"] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs index 899b0d7..95e8ccd 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `MPSIZ` reader - Maximum packet size"] pub type MPSIZ_R = crate::FieldReader; #[doc = "Field `MPSIZ` writer - Maximum packet size"] -pub type MPSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 11, O, u16>; +pub type MPSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBAEP` reader - USB active endpoint"] pub type USBAEP_R = crate::BitReader; #[doc = "Field `USBAEP` writer - USB active endpoint"] -pub type USBAEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBAEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EONUM_DPID` reader - Even/odd frame"] pub type EONUM_DPID_R = crate::BitReader; #[doc = "Field `NAKSTS` reader - NAK status"] @@ -17,31 +17,31 @@ pub type NAKSTS_R = crate::BitReader; #[doc = "Field `EPTYP` reader - Endpoint type"] pub type EPTYP_R = crate::FieldReader; #[doc = "Field `EPTYP` writer - Endpoint type"] -pub type EPTYP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type EPTYP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `Stall` reader - STALL handshake"] pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL handshake"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub type TXFNUM_R = crate::FieldReader; #[doc = "Field `TXFNUM` writer - TxFIFO number"] -pub type TXFNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SD0PID_SEVNFRM` writer - Set DATA0 PID"] -pub type SD0PID_SEVNFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SD0PID_SEVNFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SODDFRM` writer - Set odd frame"] -pub type SODDFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SODDFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDIS` reader - Endpoint disable"] pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDIS` writer - Endpoint disable"] -pub type EPDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPENA` reader - Endpoint enable"] pub type EPENA_R = crate::BitReader; #[doc = "Field `EPENA` writer - Endpoint enable"] -pub type EPENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] @@ -106,75 +106,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] #[must_use] - pub fn mpsiz(&mut self) -> MPSIZ_W { - MPSIZ_W::new(self) + pub fn mpsiz(&mut self) -> MPSIZ_W { + MPSIZ_W::new(self, 0) } #[doc = "Bit 15 - USB active endpoint"] #[inline(always)] #[must_use] - pub fn usbaep(&mut self) -> USBAEP_W { - USBAEP_W::new(self) + pub fn usbaep(&mut self) -> USBAEP_W { + USBAEP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] #[must_use] - pub fn eptyp(&mut self) -> EPTYP_W { - EPTYP_W::new(self) + pub fn eptyp(&mut self) -> EPTYP_W { + EPTYP_W::new(self, 18) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO number"] #[inline(always)] #[must_use] - pub fn txfnum(&mut self) -> TXFNUM_W { - TXFNUM_W::new(self) + pub fn txfnum(&mut self) -> TXFNUM_W { + TXFNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W { - SD0PID_SEVNFRM_W::new(self) + pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W { + SD0PID_SEVNFRM_W::new(self, 28) } #[doc = "Bit 29 - Set odd frame"] #[inline(always)] #[must_use] - pub fn soddfrm(&mut self) -> SODDFRM_W { - SODDFRM_W::new(self) + pub fn soddfrm(&mut self) -> SODDFRM_W { + SODDFRM_W::new(self, 29) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepdma.rs b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepdma.rs index 18f13ad..7dcd1b3 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepdma.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepint.rs b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepint.rs index bd21aa2..8169c15 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/diepint.rs @@ -5,45 +5,45 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed interrupt"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed interrupt"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDISD` reader - Endpoint disabled interrupt"] pub type EPDISD_R = crate::BitReader; #[doc = "Field `EPDISD` writer - Endpoint disabled interrupt"] -pub type EPDISD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDISD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOC` reader - Timeout condition"] pub type TOC_R = crate::BitReader; #[doc = "Field `TOC` writer - Timeout condition"] -pub type TOC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFE` reader - IN token received when TxFIFO is empty"] pub type ITTXFE_R = crate::BitReader; #[doc = "Field `ITTXFE` writer - IN token received when TxFIFO is empty"] -pub type ITTXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNE` reader - IN endpoint NAK effective"] pub type INEPNE_R = crate::BitReader; #[doc = "Field `INEPNE` writer - IN endpoint NAK effective"] -pub type INEPNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub type TXFE_R = crate::BitReader; #[doc = "Field `TXFIFOUDRN` reader - Transmit Fifo Underrun"] pub type TXFIFOUDRN_R = crate::BitReader; #[doc = "Field `TXFIFOUDRN` writer - Transmit Fifo Underrun"] -pub type TXFIFOUDRN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFIFOUDRN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNA` reader - Buffer not available interrupt"] pub type BNA_R = crate::BitReader; #[doc = "Field `BNA` writer - Buffer not available interrupt"] -pub type BNA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BNA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PKTDRPSTS` reader - Packet dropped status"] pub type PKTDRPSTS_R = crate::BitReader; #[doc = "Field `PKTDRPSTS` writer - Packet dropped status"] -pub type PKTDRPSTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PKTDRPSTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERR` reader - Babble error interrupt"] pub type BERR_R = crate::BitReader; #[doc = "Field `BERR` writer - Babble error interrupt"] -pub type BERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK interrupt"] pub type NAK_R = crate::BitReader; #[doc = "Field `NAK` writer - NAK interrupt"] -pub type NAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] @@ -120,69 +120,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt"] #[inline(always)] #[must_use] - pub fn epdisd(&mut self) -> EPDISD_W { - EPDISD_W::new(self) + pub fn epdisd(&mut self) -> EPDISD_W { + EPDISD_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition"] #[inline(always)] #[must_use] - pub fn toc(&mut self) -> TOC_W { - TOC_W::new(self) + pub fn toc(&mut self) -> TOC_W { + TOC_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO is empty"] #[inline(always)] #[must_use] - pub fn ittxfe(&mut self) -> ITTXFE_W { - ITTXFE_W::new(self) + pub fn ittxfe(&mut self) -> ITTXFE_W { + ITTXFE_W::new(self, 4) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] #[must_use] - pub fn inepne(&mut self) -> INEPNE_W { - INEPNE_W::new(self) + pub fn inepne(&mut self) -> INEPNE_W { + INEPNE_W::new(self, 6) } #[doc = "Bit 8 - Transmit Fifo Underrun"] #[inline(always)] #[must_use] - pub fn txfifoudrn(&mut self) -> TXFIFOUDRN_W { - TXFIFOUDRN_W::new(self) + pub fn txfifoudrn(&mut self) -> TXFIFOUDRN_W { + TXFIFOUDRN_W::new(self, 8) } #[doc = "Bit 9 - Buffer not available interrupt"] #[inline(always)] #[must_use] - pub fn bna(&mut self) -> BNA_W { - BNA_W::new(self) + pub fn bna(&mut self) -> BNA_W { + BNA_W::new(self, 9) } #[doc = "Bit 11 - Packet dropped status"] #[inline(always)] #[must_use] - pub fn pktdrpsts(&mut self) -> PKTDRPSTS_W { - PKTDRPSTS_W::new(self) + pub fn pktdrpsts(&mut self) -> PKTDRPSTS_W { + PKTDRPSTS_W::new(self, 11) } #[doc = "Bit 12 - Babble error interrupt"] #[inline(always)] #[must_use] - pub fn berr(&mut self) -> BERR_W { - BERR_W::new(self) + pub fn berr(&mut self) -> BERR_W { + BERR_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self) + pub fn nak(&mut self) -> NAK_W { + NAK_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs index 72226f2..097425e 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::FieldReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PKTCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bits 19:20 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs index abe4eef..9a29e2d 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Transmit FIFO status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint.rs b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint.rs index 360b7f9..4847d95 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint.rs @@ -2,16 +2,34 @@ #[repr(C)] #[derive(Debug)] pub struct OUT_ENDPOINT { - #[doc = "0x00 - Control"] - pub doepctl: DOEPCTL, + doepctl: DOEPCTL, _reserved1: [u8; 0x04], - #[doc = "0x08 - Interrupt"] - pub doepint: DOEPINT, + doepint: DOEPINT, _reserved2: [u8; 0x04], + doeptsiz: DOEPTSIZ, + doepdma: DOEPDMA, +} +impl OUT_ENDPOINT { + #[doc = "0x00 - Control"] + #[inline(always)] + pub const fn doepctl(&self) -> &DOEPCTL { + &self.doepctl + } + #[doc = "0x08 - Interrupt"] + #[inline(always)] + pub const fn doepint(&self) -> &DOEPINT { + &self.doepint + } #[doc = "0x10 - Transfer size"] - pub doeptsiz: DOEPTSIZ, + #[inline(always)] + pub const fn doeptsiz(&self) -> &DOEPTSIZ { + &self.doeptsiz + } #[doc = "0x14 - DMA address"] - pub doepdma: DOEPDMA, + #[inline(always)] + pub const fn doepdma(&self) -> &DOEPDMA { + &self.doepdma + } } #[doc = "DOEPCTL (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl`] module"] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepctl.rs b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepctl.rs index 47f7dd2..074b02c 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepctl.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepctl.rs @@ -13,19 +13,19 @@ pub type EPTYP_R = crate::FieldReader; #[doc = "Field `SNPM` reader - Snoop mode"] pub type SNPM_R = crate::BitReader; #[doc = "Field `SNPM` writer - Snoop mode"] -pub type SNPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL handshake"] pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL handshake"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDIS` reader - Endpoint disable"] pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPENA` writer - Endpoint enable"] -pub type EPENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum packet size"] #[inline(always)] @@ -78,39 +78,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 20 - Snoop mode"] #[inline(always)] #[must_use] - pub fn snpm(&mut self) -> SNPM_W { - SNPM_W::new(self) + pub fn snpm(&mut self) -> SNPM_W { + SNPM_W::new(self, 20) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepdma.rs b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepdma.rs index ab7d95d..70f37e1 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepdma.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepint.rs b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepint.rs index 0552c9b..b756a89 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doepint.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed interrupt"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed interrupt"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDISD` reader - Endpoint disabled interrupt"] pub type EPDISD_R = crate::BitReader; #[doc = "Field `EPDISD` writer - Endpoint disabled interrupt"] -pub type EPDISD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDISD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUP` reader - SETUP phase done"] pub type STUP_R = crate::BitReader; #[doc = "Field `STUP` writer - SETUP phase done"] -pub type STUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTEPDIS` reader - OUT token received when endpoint disabled"] pub type OTEPDIS_R = crate::BitReader; #[doc = "Field `OTEPDIS` writer - OUT token received when endpoint disabled"] -pub type OTEPDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTEPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `B2BSTUP` reader - Back-to-back SETUP packets received"] pub type B2BSTUP_R = crate::BitReader; #[doc = "Field `B2BSTUP` writer - Back-to-back SETUP packets received"] -pub type B2BSTUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type B2BSTUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - NYET interrupt"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - NYET interrupt"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt"] #[inline(always)] #[must_use] - pub fn epdisd(&mut self) -> EPDISD_W { - EPDISD_W::new(self) + pub fn epdisd(&mut self) -> EPDISD_W { + EPDISD_W::new(self, 1) } #[doc = "Bit 3 - SETUP phase done"] #[inline(always)] #[must_use] - pub fn stup(&mut self) -> STUP_W { - STUP_W::new(self) + pub fn stup(&mut self) -> STUP_W { + STUP_W::new(self, 3) } #[doc = "Bit 4 - OUT token received when endpoint disabled"] #[inline(always)] #[must_use] - pub fn otepdis(&mut self) -> OTEPDIS_W { - OTEPDIS_W::new(self) + pub fn otepdis(&mut self) -> OTEPDIS_W { + OTEPDIS_W::new(self, 4) } #[doc = "Bit 6 - Back-to-back SETUP packets received"] #[inline(always)] #[must_use] - pub fn b2bstup(&mut self) -> B2BSTUP_W { - B2BSTUP_W::new(self) + pub fn b2bstup(&mut self) -> B2BSTUP_W { + B2BSTUP_W::new(self, 6) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs index 4606c37..37d01d3 100644 --- a/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs +++ b/crates/bcm2835-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::BitReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PKTCNT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUPCNT` reader - SETUP packet count"] pub type STUPCNT_R = crate::FieldReader; #[doc = "Field `STUPCNT` writer - SETUP packet count"] -pub type STUPCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type STUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bit 19 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP packet count"] #[inline(always)] #[must_use] - pub fn stupcnt(&mut self) -> STUPCNT_W { - STUPCNT_W::new(self) + pub fn stupcnt(&mut self) -> STUPCNT_W { + STUPCNT_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global.rs b/crates/bcm2835-lpa/src/usb_otg_global.rs index d8a5a57..f188fac 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global.rs @@ -2,87 +2,175 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - OTG_HS control and status register"] - pub gotgctl: GOTGCTL, - #[doc = "0x04 - OTG_HS interrupt register"] - pub gotgint: GOTGINT, - #[doc = "0x08 - OTG_HS AHB configuration register"] - pub gahbcfg: GAHBCFG, - #[doc = "0x0c - OTG_HS USB configuration register"] - pub gusbcfg: GUSBCFG, - #[doc = "0x10 - OTG_HS reset register"] - pub grstctl: GRSTCTL, - #[doc = "0x14 - OTG_HS core interrupt register"] - pub gintsts: GINTSTS, - #[doc = "0x18 - OTG_HS interrupt mask register"] - pub gintmsk: GINTMSK, + gotgctl: GOTGCTL, + gotgint: GOTGINT, + gahbcfg: GAHBCFG, + gusbcfg: GUSBCFG, + grstctl: GRSTCTL, + gintsts: GINTSTS, + gintmsk: GINTMSK, _reserved_7_grxstsr: [u8; 0x04], _reserved_8_grxstsp: [u8; 0x04], - #[doc = "0x24 - OTG_HS Receive FIFO size register"] - pub grxfsiz: GRXFSIZ, + grxfsiz: GRXFSIZ, _reserved_10_gnptxfsiz_host: [u8; 0x04], - #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"] - pub gnptxsts: GNPTXSTS, + gnptxsts: GNPTXSTS, _reserved12: [u8; 0x08], - #[doc = "0x38 - OTG_HS general core configuration register"] - pub gccfg: GCCFG, - #[doc = "0x3c - OTG_HS core ID register"] - pub cid: CID, - #[doc = "0x40 - OTG_HS vendor ID register"] - pub vid: VID, - #[doc = "0x44 - Direction"] - pub hw_direction: HW_DIRECTION, - #[doc = "0x48 - Hardware Config 0"] - pub hw_config0: HW_CONFIG0, + gccfg: GCCFG, + cid: CID, + vid: VID, + hw_direction: HW_DIRECTION, + hw_config0: HW_CONFIG0, _reserved17: [u8; 0xb4], - #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"] - pub hptxfsiz: HPTXFSIZ, - #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf1: DIEPTXF1, - #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf2: DIEPTXF2, + hptxfsiz: HPTXFSIZ, + dieptxf1: DIEPTXF1, + dieptxf2: DIEPTXF2, _reserved20: [u8; 0x10], - #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf3: DIEPTXF3, - #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf4: DIEPTXF4, - #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf5: DIEPTXF5, - #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf6: DIEPTXF6, - #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf7: DIEPTXF7, + dieptxf3: DIEPTXF3, + dieptxf4: DIEPTXF4, + dieptxf5: DIEPTXF5, + dieptxf6: DIEPTXF6, + dieptxf7: DIEPTXF7, } impl RegisterBlock { + #[doc = "0x00 - OTG_HS control and status register"] + #[inline(always)] + pub const fn gotgctl(&self) -> &GOTGCTL { + &self.gotgctl + } + #[doc = "0x04 - OTG_HS interrupt register"] + #[inline(always)] + pub const fn gotgint(&self) -> &GOTGINT { + &self.gotgint + } + #[doc = "0x08 - OTG_HS AHB configuration register"] + #[inline(always)] + pub const fn gahbcfg(&self) -> &GAHBCFG { + &self.gahbcfg + } + #[doc = "0x0c - OTG_HS USB configuration register"] + #[inline(always)] + pub const fn gusbcfg(&self) -> &GUSBCFG { + &self.gusbcfg + } + #[doc = "0x10 - OTG_HS reset register"] + #[inline(always)] + pub const fn grstctl(&self) -> &GRSTCTL { + &self.grstctl + } + #[doc = "0x14 - OTG_HS core interrupt register"] + #[inline(always)] + pub const fn gintsts(&self) -> &GINTSTS { + &self.gintsts + } + #[doc = "0x18 - OTG_HS interrupt mask register"] + #[inline(always)] + pub const fn gintmsk(&self) -> &GINTMSK { + &self.gintmsk + } #[doc = "0x1c - OTG_HS Receive status debug read register (peripheral mode mode)"] #[inline(always)] pub const fn grxstsr_peripheral(&self) -> &GRXSTSR_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(28usize).cast() } + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x1c - OTG_HS Receive status debug read register (host mode)"] #[inline(always)] pub const fn grxstsr_host(&self) -> &GRXSTSR_HOST { - unsafe { &*(self as *const Self).cast::().add(28usize).cast() } + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x20 - OTG_HS status read and pop register (peripheral mode)"] #[inline(always)] pub const fn grxstsp_peripheral(&self) -> &GRXSTSP_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(32usize).cast() } + unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x20 - OTG_HS status read and pop register (host mode)"] #[inline(always)] pub const fn grxstsp_host(&self) -> &GRXSTSP_HOST { - unsafe { &*(self as *const Self).cast::().add(32usize).cast() } + unsafe { &*(self as *const Self).cast::().add(32).cast() } + } + #[doc = "0x24 - OTG_HS Receive FIFO size register"] + #[inline(always)] + pub const fn grxfsiz(&self) -> &GRXFSIZ { + &self.grxfsiz } #[doc = "0x28 - Endpoint 0 transmit FIFO size (peripheral mode)"] #[inline(always)] pub const fn tx0fsiz_peripheral(&self) -> &TX0FSIZ_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(40usize).cast() } + unsafe { &*(self as *const Self).cast::().add(40).cast() } } #[doc = "0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)"] #[inline(always)] pub const fn gnptxfsiz_host(&self) -> &GNPTXFSIZ_HOST { - unsafe { &*(self as *const Self).cast::().add(40usize).cast() } + unsafe { &*(self as *const Self).cast::().add(40).cast() } + } + #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"] + #[inline(always)] + pub const fn gnptxsts(&self) -> &GNPTXSTS { + &self.gnptxsts + } + #[doc = "0x38 - OTG_HS general core configuration register"] + #[inline(always)] + pub const fn gccfg(&self) -> &GCCFG { + &self.gccfg + } + #[doc = "0x3c - OTG_HS core ID register"] + #[inline(always)] + pub const fn cid(&self) -> &CID { + &self.cid + } + #[doc = "0x40 - OTG_HS vendor ID register"] + #[inline(always)] + pub const fn vid(&self) -> &VID { + &self.vid + } + #[doc = "0x44 - Direction"] + #[inline(always)] + pub const fn hw_direction(&self) -> &HW_DIRECTION { + &self.hw_direction + } + #[doc = "0x48 - Hardware Config 0"] + #[inline(always)] + pub const fn hw_config0(&self) -> &HW_CONFIG0 { + &self.hw_config0 + } + #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"] + #[inline(always)] + pub const fn hptxfsiz(&self) -> &HPTXFSIZ { + &self.hptxfsiz + } + #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf1(&self) -> &DIEPTXF1 { + &self.dieptxf1 + } + #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf2(&self) -> &DIEPTXF2 { + &self.dieptxf2 + } + #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf3(&self) -> &DIEPTXF3 { + &self.dieptxf3 + } + #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf4(&self) -> &DIEPTXF4 { + &self.dieptxf4 + } + #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf5(&self) -> &DIEPTXF5 { + &self.dieptxf5 + } + #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf6(&self) -> &DIEPTXF6 { + &self.dieptxf6 + } + #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf7(&self) -> &DIEPTXF7 { + &self.dieptxf7 } } #[doc = "GOTGCTL (rw) register accessor: OTG_HS control and status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgctl`] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/cid.rs b/crates/bcm2835-lpa/src/usb_otg_global/cid.rs index c840ab9..4b8e59f 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/cid.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/cid.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PRODUCT_ID` reader - Product ID field"] pub type PRODUCT_ID_R = crate::FieldReader; #[doc = "Field `PRODUCT_ID` writer - Product ID field"] -pub type PRODUCT_ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type PRODUCT_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Product ID field"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - Product ID field"] #[inline(always)] #[must_use] - pub fn product_id(&mut self) -> PRODUCT_ID_W { - PRODUCT_ID_W::new(self) + pub fn product_id(&mut self) -> PRODUCT_ID_W { + PRODUCT_ID_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf1.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf1.rs index 52be8d1..d47b830 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf1.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf1.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf2.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf2.rs index ce63253..4c6ba9e 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf2.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf2.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf3.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf3.rs index 18a518c..67c7e3d 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf3.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf3.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf4.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf4.rs index 9b23f1d..516d2f0 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf4.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf4.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf5.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf5.rs index 03b144c..33964f8 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf5.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf5.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf6.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf6.rs index 57dcb25..783237e 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf6.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf6.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf7.rs b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf7.rs index 7a99ea4..2ae512e 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/dieptxf7.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/dieptxf7.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gahbcfg.rs b/crates/bcm2835-lpa/src/usb_otg_global/gahbcfg.rs index a135db6..b2d3d76 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gahbcfg.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gahbcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `GINT` reader - Global interrupt mask"] pub type GINT_R = crate::BitReader; #[doc = "Field `GINT` writer - Global interrupt mask"] -pub type GINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AXI_BURST` reader - Maximum AXI burst length"] pub type AXI_BURST_R = crate::FieldReader; #[doc = "Maximum AXI burst length\n\nValue on reset: 0"] @@ -64,8 +64,8 @@ impl AXI_BURST_R { } } #[doc = "Field `AXI_BURST` writer - Maximum AXI burst length"] -pub type AXI_BURST_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, BURST_A>; -impl<'a, REG, const O: u8> AXI_BURST_W<'a, REG, O> +pub type AXI_BURST_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, BURST_A>; +impl<'a, REG> AXI_BURST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -94,19 +94,19 @@ where #[doc = "Field `AXI_WAIT` reader - Wait for all AXI writes before signaling DMA"] pub type AXI_WAIT_R = crate::BitReader; #[doc = "Field `AXI_WAIT` writer - Wait for all AXI writes before signaling DMA"] -pub type AXI_WAIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AXI_WAIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAEN` reader - DMA enable"] pub type DMAEN_R = crate::BitReader; #[doc = "Field `DMAEN` writer - DMA enable"] -pub type DMAEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFELVL` reader - TxFIFO empty level"] pub type TXFELVL_R = crate::BitReader; #[doc = "Field `TXFELVL` writer - TxFIFO empty level"] -pub type TXFELVL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFELVL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTXFELVL` reader - Periodic TxFIFO empty level"] pub type PTXFELVL_R = crate::BitReader; #[doc = "Field `PTXFELVL` writer - Periodic TxFIFO empty level"] -pub type PTXFELVL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTXFELVL_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Global interrupt mask"] #[inline(always)] @@ -153,45 +153,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Global interrupt mask"] #[inline(always)] #[must_use] - pub fn gint(&mut self) -> GINT_W { - GINT_W::new(self) + pub fn gint(&mut self) -> GINT_W { + GINT_W::new(self, 0) } #[doc = "Bits 1:2 - Maximum AXI burst length"] #[inline(always)] #[must_use] - pub fn axi_burst(&mut self) -> AXI_BURST_W { - AXI_BURST_W::new(self) + pub fn axi_burst(&mut self) -> AXI_BURST_W { + AXI_BURST_W::new(self, 1) } #[doc = "Bit 4 - Wait for all AXI writes before signaling DMA"] #[inline(always)] #[must_use] - pub fn axi_wait(&mut self) -> AXI_WAIT_W { - AXI_WAIT_W::new(self) + pub fn axi_wait(&mut self) -> AXI_WAIT_W { + AXI_WAIT_W::new(self, 4) } #[doc = "Bit 5 - DMA enable"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 5) } #[doc = "Bit 7 - TxFIFO empty level"] #[inline(always)] #[must_use] - pub fn txfelvl(&mut self) -> TXFELVL_W { - TXFELVL_W::new(self) + pub fn txfelvl(&mut self) -> TXFELVL_W { + TXFELVL_W::new(self, 7) } #[doc = "Bit 8 - Periodic TxFIFO empty level"] #[inline(always)] #[must_use] - pub fn ptxfelvl(&mut self) -> PTXFELVL_W { - PTXFELVL_W::new(self) + pub fn ptxfelvl(&mut self) -> PTXFELVL_W { + PTXFELVL_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gccfg.rs b/crates/bcm2835-lpa/src/usb_otg_global/gccfg.rs index 6612077..462ba59 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gccfg.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gccfg.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `PWRDWN` reader - Power down"] pub type PWRDWN_R = crate::BitReader; #[doc = "Field `PWRDWN` writer - Power down"] -pub type PWRDWN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWRDWN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2CPADEN` reader - Enable I2C bus connection for the external I2C PHY interface"] pub type I2CPADEN_R = crate::BitReader; #[doc = "Field `I2CPADEN` writer - Enable I2C bus connection for the external I2C PHY interface"] -pub type I2CPADEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2CPADEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VBUSASEN` reader - Enable the VBUS sensing device"] pub type VBUSASEN_R = crate::BitReader; #[doc = "Field `VBUSASEN` writer - Enable the VBUS sensing device"] -pub type VBUSASEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VBUSASEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VBUSBSEN` reader - Enable the VBUS sensing device"] pub type VBUSBSEN_R = crate::BitReader; #[doc = "Field `VBUSBSEN` writer - Enable the VBUS sensing device"] -pub type VBUSBSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VBUSBSEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOFOUTEN` reader - SOF output enable"] pub type SOFOUTEN_R = crate::BitReader; #[doc = "Field `SOFOUTEN` writer - SOF output enable"] -pub type SOFOUTEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOFOUTEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NOVBUSSENS` reader - VBUS sensing disable option"] pub type NOVBUSSENS_R = crate::BitReader; #[doc = "Field `NOVBUSSENS` writer - VBUS sensing disable option"] -pub type NOVBUSSENS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NOVBUSSENS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - Power down"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 16 - Power down"] #[inline(always)] #[must_use] - pub fn pwrdwn(&mut self) -> PWRDWN_W { - PWRDWN_W::new(self) + pub fn pwrdwn(&mut self) -> PWRDWN_W { + PWRDWN_W::new(self, 16) } #[doc = "Bit 17 - Enable I2C bus connection for the external I2C PHY interface"] #[inline(always)] #[must_use] - pub fn i2cpaden(&mut self) -> I2CPADEN_W { - I2CPADEN_W::new(self) + pub fn i2cpaden(&mut self) -> I2CPADEN_W { + I2CPADEN_W::new(self, 17) } #[doc = "Bit 18 - Enable the VBUS sensing device"] #[inline(always)] #[must_use] - pub fn vbusasen(&mut self) -> VBUSASEN_W { - VBUSASEN_W::new(self) + pub fn vbusasen(&mut self) -> VBUSASEN_W { + VBUSASEN_W::new(self, 18) } #[doc = "Bit 19 - Enable the VBUS sensing device"] #[inline(always)] #[must_use] - pub fn vbusbsen(&mut self) -> VBUSBSEN_W { - VBUSBSEN_W::new(self) + pub fn vbusbsen(&mut self) -> VBUSBSEN_W { + VBUSBSEN_W::new(self, 19) } #[doc = "Bit 20 - SOF output enable"] #[inline(always)] #[must_use] - pub fn sofouten(&mut self) -> SOFOUTEN_W { - SOFOUTEN_W::new(self) + pub fn sofouten(&mut self) -> SOFOUTEN_W { + SOFOUTEN_W::new(self, 20) } #[doc = "Bit 21 - VBUS sensing disable option"] #[inline(always)] #[must_use] - pub fn novbussens(&mut self) -> NOVBUSSENS_W { - NOVBUSSENS_W::new(self) + pub fn novbussens(&mut self) -> NOVBUSSENS_W { + NOVBUSSENS_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gintmsk.rs b/crates/bcm2835-lpa/src/usb_otg_global/gintmsk.rs index 1a856d7..0402414 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gintmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gintmsk.rs @@ -5,105 +5,105 @@ pub type W = crate::W; #[doc = "Field `MMISM` reader - Mode mismatch interrupt mask"] pub type MMISM_R = crate::BitReader; #[doc = "Field `MMISM` writer - Mode mismatch interrupt mask"] -pub type MMISM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MMISM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGINT` reader - OTG interrupt mask"] pub type OTGINT_R = crate::BitReader; #[doc = "Field `OTGINT` writer - OTG interrupt mask"] -pub type OTGINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTGINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOFM` reader - Start of frame mask"] pub type SOFM_R = crate::BitReader; #[doc = "Field `SOFM` writer - Start of frame mask"] -pub type SOFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFLVLM` reader - Receive FIFO nonempty mask"] pub type RXFLVLM_R = crate::BitReader; #[doc = "Field `RXFLVLM` writer - Receive FIFO nonempty mask"] -pub type RXFLVLM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFLVLM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NPTXFEM` reader - Nonperiodic TxFIFO empty mask"] pub type NPTXFEM_R = crate::BitReader; #[doc = "Field `NPTXFEM` writer - Nonperiodic TxFIFO empty mask"] -pub type NPTXFEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NPTXFEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINAKEFFM` reader - Global nonperiodic IN NAK effective mask"] pub type GINAKEFFM_R = crate::BitReader; #[doc = "Field `GINAKEFFM` writer - Global nonperiodic IN NAK effective mask"] -pub type GINAKEFFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GINAKEFFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GONAKEFFM` reader - Global OUT NAK effective mask"] pub type GONAKEFFM_R = crate::BitReader; #[doc = "Field `GONAKEFFM` writer - Global OUT NAK effective mask"] -pub type GONAKEFFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GONAKEFFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESUSPM` reader - Early suspend mask"] pub type ESUSPM_R = crate::BitReader; #[doc = "Field `ESUSPM` writer - Early suspend mask"] -pub type ESUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSUSPM` reader - USB suspend mask"] pub type USBSUSPM_R = crate::BitReader; #[doc = "Field `USBSUSPM` writer - USB suspend mask"] -pub type USBSUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBSUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRST` reader - USB reset mask"] pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRST` writer - USB reset mask"] -pub type USBRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENUMDNEM` reader - Enumeration done mask"] pub type ENUMDNEM_R = crate::BitReader; #[doc = "Field `ENUMDNEM` writer - Enumeration done mask"] -pub type ENUMDNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENUMDNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOODRPM` reader - Isochronous OUT packet dropped interrupt mask"] pub type ISOODRPM_R = crate::BitReader; #[doc = "Field `ISOODRPM` writer - Isochronous OUT packet dropped interrupt mask"] -pub type ISOODRPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOODRPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPFM` reader - End of periodic frame interrupt mask"] pub type EOPFM_R = crate::BitReader; #[doc = "Field `EOPFM` writer - End of periodic frame interrupt mask"] -pub type EOPFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOPFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPMISM` reader - Endpoint mismatch interrupt mask"] pub type EPMISM_R = crate::BitReader; #[doc = "Field `EPMISM` writer - Endpoint mismatch interrupt mask"] -pub type EPMISM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPMISM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPINT` reader - IN endpoints interrupt mask"] pub type IEPINT_R = crate::BitReader; #[doc = "Field `IEPINT` writer - IN endpoints interrupt mask"] -pub type IEPINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEPINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEPINT` reader - OUT endpoints interrupt mask"] pub type OEPINT_R = crate::BitReader; #[doc = "Field `OEPINT` writer - OUT endpoints interrupt mask"] -pub type OEPINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEPINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IISOIXFRM` reader - Incomplete isochronous IN transfer mask"] pub type IISOIXFRM_R = crate::BitReader; #[doc = "Field `IISOIXFRM` writer - Incomplete isochronous IN transfer mask"] -pub type IISOIXFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IISOIXFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PXFRM_IISOOXFRM` reader - Incomplete periodic transfer mask"] pub type PXFRM_IISOOXFRM_R = crate::BitReader; #[doc = "Field `PXFRM_IISOOXFRM` writer - Incomplete periodic transfer mask"] -pub type PXFRM_IISOOXFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PXFRM_IISOOXFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSUSPM` reader - Data fetch suspended mask"] pub type FSUSPM_R = crate::BitReader; #[doc = "Field `FSUSPM` writer - Data fetch suspended mask"] -pub type FSUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FSUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRTIM` reader - Host port interrupt mask"] pub type PRTIM_R = crate::BitReader; #[doc = "Field `HCIM` reader - Host channels interrupt mask"] pub type HCIM_R = crate::BitReader; #[doc = "Field `HCIM` writer - Host channels interrupt mask"] -pub type HCIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTXFEM` reader - Periodic TxFIFO empty mask"] pub type PTXFEM_R = crate::BitReader; #[doc = "Field `PTXFEM` writer - Periodic TxFIFO empty mask"] -pub type PTXFEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTXFEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CIDSCHGM` reader - Connector ID status change mask"] pub type CIDSCHGM_R = crate::BitReader; #[doc = "Field `CIDSCHGM` writer - Connector ID status change mask"] -pub type CIDSCHGM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CIDSCHGM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCINT` reader - Disconnect detected interrupt mask"] pub type DISCINT_R = crate::BitReader; #[doc = "Field `DISCINT` writer - Disconnect detected interrupt mask"] -pub type DISCINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DISCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRQIM` reader - Session request/new session detected interrupt mask"] pub type SRQIM_R = crate::BitReader; #[doc = "Field `SRQIM` writer - Session request/new session detected interrupt mask"] -pub type SRQIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WUIM` reader - Resume/remote wakeup detected interrupt mask"] pub type WUIM_R = crate::BitReader; #[doc = "Field `WUIM` writer - Resume/remote wakeup detected interrupt mask"] -pub type WUIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WUIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Mode mismatch interrupt mask"] #[inline(always)] @@ -273,159 +273,159 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Mode mismatch interrupt mask"] #[inline(always)] #[must_use] - pub fn mmism(&mut self) -> MMISM_W { - MMISM_W::new(self) + pub fn mmism(&mut self) -> MMISM_W { + MMISM_W::new(self, 1) } #[doc = "Bit 2 - OTG interrupt mask"] #[inline(always)] #[must_use] - pub fn otgint(&mut self) -> OTGINT_W { - OTGINT_W::new(self) + pub fn otgint(&mut self) -> OTGINT_W { + OTGINT_W::new(self, 2) } #[doc = "Bit 3 - Start of frame mask"] #[inline(always)] #[must_use] - pub fn sofm(&mut self) -> SOFM_W { - SOFM_W::new(self) + pub fn sofm(&mut self) -> SOFM_W { + SOFM_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO nonempty mask"] #[inline(always)] #[must_use] - pub fn rxflvlm(&mut self) -> RXFLVLM_W { - RXFLVLM_W::new(self) + pub fn rxflvlm(&mut self) -> RXFLVLM_W { + RXFLVLM_W::new(self, 4) } #[doc = "Bit 5 - Nonperiodic TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn nptxfem(&mut self) -> NPTXFEM_W { - NPTXFEM_W::new(self) + pub fn nptxfem(&mut self) -> NPTXFEM_W { + NPTXFEM_W::new(self, 5) } #[doc = "Bit 6 - Global nonperiodic IN NAK effective mask"] #[inline(always)] #[must_use] - pub fn ginakeffm(&mut self) -> GINAKEFFM_W { - GINAKEFFM_W::new(self) + pub fn ginakeffm(&mut self) -> GINAKEFFM_W { + GINAKEFFM_W::new(self, 6) } #[doc = "Bit 7 - Global OUT NAK effective mask"] #[inline(always)] #[must_use] - pub fn gonakeffm(&mut self) -> GONAKEFFM_W { - GONAKEFFM_W::new(self) + pub fn gonakeffm(&mut self) -> GONAKEFFM_W { + GONAKEFFM_W::new(self, 7) } #[doc = "Bit 10 - Early suspend mask"] #[inline(always)] #[must_use] - pub fn esuspm(&mut self) -> ESUSPM_W { - ESUSPM_W::new(self) + pub fn esuspm(&mut self) -> ESUSPM_W { + ESUSPM_W::new(self, 10) } #[doc = "Bit 11 - USB suspend mask"] #[inline(always)] #[must_use] - pub fn usbsuspm(&mut self) -> USBSUSPM_W { - USBSUSPM_W::new(self) + pub fn usbsuspm(&mut self) -> USBSUSPM_W { + USBSUSPM_W::new(self, 11) } #[doc = "Bit 12 - USB reset mask"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration done mask"] #[inline(always)] #[must_use] - pub fn enumdnem(&mut self) -> ENUMDNEM_W { - ENUMDNEM_W::new(self) + pub fn enumdnem(&mut self) -> ENUMDNEM_W { + ENUMDNEM_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt mask"] #[inline(always)] #[must_use] - pub fn isoodrpm(&mut self) -> ISOODRPM_W { - ISOODRPM_W::new(self) + pub fn isoodrpm(&mut self) -> ISOODRPM_W { + ISOODRPM_W::new(self, 14) } #[doc = "Bit 15 - End of periodic frame interrupt mask"] #[inline(always)] #[must_use] - pub fn eopfm(&mut self) -> EOPFM_W { - EOPFM_W::new(self) + pub fn eopfm(&mut self) -> EOPFM_W { + EOPFM_W::new(self, 15) } #[doc = "Bit 17 - Endpoint mismatch interrupt mask"] #[inline(always)] #[must_use] - pub fn epmism(&mut self) -> EPMISM_W { - EPMISM_W::new(self) + pub fn epmism(&mut self) -> EPMISM_W { + EPMISM_W::new(self, 17) } #[doc = "Bit 18 - IN endpoints interrupt mask"] #[inline(always)] #[must_use] - pub fn iepint(&mut self) -> IEPINT_W { - IEPINT_W::new(self) + pub fn iepint(&mut self) -> IEPINT_W { + IEPINT_W::new(self, 18) } #[doc = "Bit 19 - OUT endpoints interrupt mask"] #[inline(always)] #[must_use] - pub fn oepint(&mut self) -> OEPINT_W { - OEPINT_W::new(self) + pub fn oepint(&mut self) -> OEPINT_W { + OEPINT_W::new(self, 19) } #[doc = "Bit 20 - Incomplete isochronous IN transfer mask"] #[inline(always)] #[must_use] - pub fn iisoixfrm(&mut self) -> IISOIXFRM_W { - IISOIXFRM_W::new(self) + pub fn iisoixfrm(&mut self) -> IISOIXFRM_W { + IISOIXFRM_W::new(self, 20) } #[doc = "Bit 21 - Incomplete periodic transfer mask"] #[inline(always)] #[must_use] - pub fn pxfrm_iisooxfrm(&mut self) -> PXFRM_IISOOXFRM_W { - PXFRM_IISOOXFRM_W::new(self) + pub fn pxfrm_iisooxfrm(&mut self) -> PXFRM_IISOOXFRM_W { + PXFRM_IISOOXFRM_W::new(self, 21) } #[doc = "Bit 22 - Data fetch suspended mask"] #[inline(always)] #[must_use] - pub fn fsuspm(&mut self) -> FSUSPM_W { - FSUSPM_W::new(self) + pub fn fsuspm(&mut self) -> FSUSPM_W { + FSUSPM_W::new(self, 22) } #[doc = "Bit 25 - Host channels interrupt mask"] #[inline(always)] #[must_use] - pub fn hcim(&mut self) -> HCIM_W { - HCIM_W::new(self) + pub fn hcim(&mut self) -> HCIM_W { + HCIM_W::new(self, 25) } #[doc = "Bit 26 - Periodic TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ptxfem(&mut self) -> PTXFEM_W { - PTXFEM_W::new(self) + pub fn ptxfem(&mut self) -> PTXFEM_W { + PTXFEM_W::new(self, 26) } #[doc = "Bit 28 - Connector ID status change mask"] #[inline(always)] #[must_use] - pub fn cidschgm(&mut self) -> CIDSCHGM_W { - CIDSCHGM_W::new(self) + pub fn cidschgm(&mut self) -> CIDSCHGM_W { + CIDSCHGM_W::new(self, 28) } #[doc = "Bit 29 - Disconnect detected interrupt mask"] #[inline(always)] #[must_use] - pub fn discint(&mut self) -> DISCINT_W { - DISCINT_W::new(self) + pub fn discint(&mut self) -> DISCINT_W { + DISCINT_W::new(self, 29) } #[doc = "Bit 30 - Session request/new session detected interrupt mask"] #[inline(always)] #[must_use] - pub fn srqim(&mut self) -> SRQIM_W { - SRQIM_W::new(self) + pub fn srqim(&mut self) -> SRQIM_W { + SRQIM_W::new(self, 30) } #[doc = "Bit 31 - Resume/remote wakeup detected interrupt mask"] #[inline(always)] #[must_use] - pub fn wuim(&mut self) -> WUIM_W { - WUIM_W::new(self) + pub fn wuim(&mut self) -> WUIM_W { + WUIM_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gintsts.rs b/crates/bcm2835-lpa/src/usb_otg_global/gintsts.rs index 513d718..ba0c53b 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gintsts.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gintsts.rs @@ -7,13 +7,13 @@ pub type CMOD_R = crate::BitReader; #[doc = "Field `MMIS` reader - Mode mismatch interrupt"] pub type MMIS_R = crate::BitReader; #[doc = "Field `MMIS` writer - Mode mismatch interrupt"] -pub type MMIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MMIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGINT` reader - OTG interrupt"] pub type OTGINT_R = crate::BitReader; #[doc = "Field `SOF` reader - Start of frame"] pub type SOF_R = crate::BitReader; #[doc = "Field `SOF` writer - Start of frame"] -pub type SOF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFLVL` reader - RxFIFO nonempty"] pub type RXFLVL_R = crate::BitReader; #[doc = "Field `NPTXFE` reader - Nonperiodic TxFIFO empty"] @@ -25,27 +25,27 @@ pub type BOUTNAKEFF_R = crate::BitReader; #[doc = "Field `ESUSP` reader - Early suspend"] pub type ESUSP_R = crate::BitReader; #[doc = "Field `ESUSP` writer - Early suspend"] -pub type ESUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSUSP` reader - USB suspend"] pub type USBSUSP_R = crate::BitReader; #[doc = "Field `USBSUSP` writer - USB suspend"] -pub type USBSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRST` reader - USB reset"] pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRST` writer - USB reset"] -pub type USBRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENUMDNE` reader - Enumeration done"] pub type ENUMDNE_R = crate::BitReader; #[doc = "Field `ENUMDNE` writer - Enumeration done"] -pub type ENUMDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENUMDNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOODRP` reader - Isochronous OUT packet dropped interrupt"] pub type ISOODRP_R = crate::BitReader; #[doc = "Field `ISOODRP` writer - Isochronous OUT packet dropped interrupt"] -pub type ISOODRP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOODRP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPF` reader - End of periodic frame interrupt"] pub type EOPF_R = crate::BitReader; #[doc = "Field `EOPF` writer - End of periodic frame interrupt"] -pub type EOPF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOPF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPINT` reader - IN endpoint interrupt"] pub type IEPINT_R = crate::BitReader; #[doc = "Field `OEPINT` reader - OUT endpoint interrupt"] @@ -53,15 +53,15 @@ pub type OEPINT_R = crate::BitReader; #[doc = "Field `IISOIXFR` reader - Incomplete isochronous IN transfer"] pub type IISOIXFR_R = crate::BitReader; #[doc = "Field `IISOIXFR` writer - Incomplete isochronous IN transfer"] -pub type IISOIXFR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IISOIXFR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PXFR_INCOMPISOOUT` reader - Incomplete periodic transfer"] pub type PXFR_INCOMPISOOUT_R = crate::BitReader; #[doc = "Field `PXFR_INCOMPISOOUT` writer - Incomplete periodic transfer"] -pub type PXFR_INCOMPISOOUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PXFR_INCOMPISOOUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATAFSUSP` reader - Data fetch suspended"] pub type DATAFSUSP_R = crate::BitReader; #[doc = "Field `DATAFSUSP` writer - Data fetch suspended"] -pub type DATAFSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATAFSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HPRTINT` reader - Host port interrupt"] pub type HPRTINT_R = crate::BitReader; #[doc = "Field `HCINT` reader - Host channels interrupt"] @@ -71,19 +71,19 @@ pub type PTXFE_R = crate::BitReader; #[doc = "Field `CIDSCHG` reader - Connector ID status change"] pub type CIDSCHG_R = crate::BitReader; #[doc = "Field `CIDSCHG` writer - Connector ID status change"] -pub type CIDSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CIDSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCINT` reader - Disconnect detected interrupt"] pub type DISCINT_R = crate::BitReader; #[doc = "Field `DISCINT` writer - Disconnect detected interrupt"] -pub type DISCINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DISCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRQINT` reader - Session request/new session detected interrupt"] pub type SRQINT_R = crate::BitReader; #[doc = "Field `SRQINT` writer - Session request/new session detected interrupt"] -pub type SRQINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WKUINT` reader - Resume/remote wakeup detected interrupt"] pub type WKUINT_R = crate::BitReader; #[doc = "Field `WKUINT` writer - Resume/remote wakeup detected interrupt"] -pub type WKUINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WKUINT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Current mode of operation"] #[inline(always)] @@ -253,99 +253,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Mode mismatch interrupt"] #[inline(always)] #[must_use] - pub fn mmis(&mut self) -> MMIS_W { - MMIS_W::new(self) + pub fn mmis(&mut self) -> MMIS_W { + MMIS_W::new(self, 1) } #[doc = "Bit 3 - Start of frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SOF_W { - SOF_W::new(self) + pub fn sof(&mut self) -> SOF_W { + SOF_W::new(self, 3) } #[doc = "Bit 10 - Early suspend"] #[inline(always)] #[must_use] - pub fn esusp(&mut self) -> ESUSP_W { - ESUSP_W::new(self) + pub fn esusp(&mut self) -> ESUSP_W { + ESUSP_W::new(self, 10) } #[doc = "Bit 11 - USB suspend"] #[inline(always)] #[must_use] - pub fn usbsusp(&mut self) -> USBSUSP_W { - USBSUSP_W::new(self) + pub fn usbsusp(&mut self) -> USBSUSP_W { + USBSUSP_W::new(self, 11) } #[doc = "Bit 12 - USB reset"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration done"] #[inline(always)] #[must_use] - pub fn enumdne(&mut self) -> ENUMDNE_W { - ENUMDNE_W::new(self) + pub fn enumdne(&mut self) -> ENUMDNE_W { + ENUMDNE_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt"] #[inline(always)] #[must_use] - pub fn isoodrp(&mut self) -> ISOODRP_W { - ISOODRP_W::new(self) + pub fn isoodrp(&mut self) -> ISOODRP_W { + ISOODRP_W::new(self, 14) } #[doc = "Bit 15 - End of periodic frame interrupt"] #[inline(always)] #[must_use] - pub fn eopf(&mut self) -> EOPF_W { - EOPF_W::new(self) + pub fn eopf(&mut self) -> EOPF_W { + EOPF_W::new(self, 15) } #[doc = "Bit 20 - Incomplete isochronous IN transfer"] #[inline(always)] #[must_use] - pub fn iisoixfr(&mut self) -> IISOIXFR_W { - IISOIXFR_W::new(self) + pub fn iisoixfr(&mut self) -> IISOIXFR_W { + IISOIXFR_W::new(self, 20) } #[doc = "Bit 21 - Incomplete periodic transfer"] #[inline(always)] #[must_use] - pub fn pxfr_incompisoout(&mut self) -> PXFR_INCOMPISOOUT_W { - PXFR_INCOMPISOOUT_W::new(self) + pub fn pxfr_incompisoout(&mut self) -> PXFR_INCOMPISOOUT_W { + PXFR_INCOMPISOOUT_W::new(self, 21) } #[doc = "Bit 22 - Data fetch suspended"] #[inline(always)] #[must_use] - pub fn datafsusp(&mut self) -> DATAFSUSP_W { - DATAFSUSP_W::new(self) + pub fn datafsusp(&mut self) -> DATAFSUSP_W { + DATAFSUSP_W::new(self, 22) } #[doc = "Bit 28 - Connector ID status change"] #[inline(always)] #[must_use] - pub fn cidschg(&mut self) -> CIDSCHG_W { - CIDSCHG_W::new(self) + pub fn cidschg(&mut self) -> CIDSCHG_W { + CIDSCHG_W::new(self, 28) } #[doc = "Bit 29 - Disconnect detected interrupt"] #[inline(always)] #[must_use] - pub fn discint(&mut self) -> DISCINT_W { - DISCINT_W::new(self) + pub fn discint(&mut self) -> DISCINT_W { + DISCINT_W::new(self, 29) } #[doc = "Bit 30 - Session request/new session detected interrupt"] #[inline(always)] #[must_use] - pub fn srqint(&mut self) -> SRQINT_W { - SRQINT_W::new(self) + pub fn srqint(&mut self) -> SRQINT_W { + SRQINT_W::new(self, 30) } #[doc = "Bit 31 - Resume/remote wakeup detected interrupt"] #[inline(always)] #[must_use] - pub fn wkuint(&mut self) -> WKUINT_W { - WKUINT_W::new(self) + pub fn wkuint(&mut self) -> WKUINT_W { + WKUINT_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gnptxfsiz_host.rs b/crates/bcm2835-lpa/src/usb_otg_global/gnptxfsiz_host.rs index b2b7b4e..1f2ce3c 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gnptxfsiz_host.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gnptxfsiz_host.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `NPTXFSA` reader - Nonperiodic transmit RAM start address"] pub type NPTXFSA_R = crate::FieldReader; #[doc = "Field `NPTXFSA` writer - Nonperiodic transmit RAM start address"] -pub type NPTXFSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type NPTXFSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `NPTXFD` reader - Nonperiodic TxFIFO depth"] pub type NPTXFD_R = crate::FieldReader; #[doc = "Field `NPTXFD` writer - Nonperiodic TxFIFO depth"] -pub type NPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type NPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Nonperiodic transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Nonperiodic transmit RAM start address"] #[inline(always)] #[must_use] - pub fn nptxfsa(&mut self) -> NPTXFSA_W { - NPTXFSA_W::new(self) + pub fn nptxfsa(&mut self) -> NPTXFSA_W { + NPTXFSA_W::new(self, 0) } #[doc = "Bits 16:31 - Nonperiodic TxFIFO depth"] #[inline(always)] #[must_use] - pub fn nptxfd(&mut self) -> NPTXFD_W { - NPTXFD_W::new(self) + pub fn nptxfd(&mut self) -> NPTXFD_W { + NPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gnptxsts.rs b/crates/bcm2835-lpa/src/usb_otg_global/gnptxsts.rs index 2b32a6f..297f9ca 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gnptxsts.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gnptxsts.rs @@ -34,7 +34,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS nonperiodic transmit FIFO/queue status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gotgctl.rs b/crates/bcm2835-lpa/src/usb_otg_global/gotgctl.rs index 36b3f21..ad93a29 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gotgctl.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gotgctl.rs @@ -7,21 +7,21 @@ pub type SRQSCS_R = crate::BitReader; #[doc = "Field `SRQ` reader - Session request"] pub type SRQ_R = crate::BitReader; #[doc = "Field `SRQ` writer - Session request"] -pub type SRQ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNGSCS` reader - Host negotiation success"] pub type HNGSCS_R = crate::BitReader; #[doc = "Field `HNPRQ` reader - HNP request"] pub type HNPRQ_R = crate::BitReader; #[doc = "Field `HNPRQ` writer - HNP request"] -pub type HNPRQ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNPRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HSHNPEN` reader - Host set HNP enable"] pub type HSHNPEN_R = crate::BitReader; #[doc = "Field `HSHNPEN` writer - Host set HNP enable"] -pub type HSHNPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HSHNPEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DHNPEN` reader - Device HNP enabled"] pub type DHNPEN_R = crate::BitReader; #[doc = "Field `DHNPEN` writer - Device HNP enabled"] -pub type DHNPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DHNPEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CIDSTS` reader - Connector ID status"] pub type CIDSTS_R = crate::BitReader; #[doc = "Field `DBCT` reader - Long/short debounce time"] @@ -100,33 +100,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Session request"] #[inline(always)] #[must_use] - pub fn srq(&mut self) -> SRQ_W { - SRQ_W::new(self) + pub fn srq(&mut self) -> SRQ_W { + SRQ_W::new(self, 1) } #[doc = "Bit 9 - HNP request"] #[inline(always)] #[must_use] - pub fn hnprq(&mut self) -> HNPRQ_W { - HNPRQ_W::new(self) + pub fn hnprq(&mut self) -> HNPRQ_W { + HNPRQ_W::new(self, 9) } #[doc = "Bit 10 - Host set HNP enable"] #[inline(always)] #[must_use] - pub fn hshnpen(&mut self) -> HSHNPEN_W { - HSHNPEN_W::new(self) + pub fn hshnpen(&mut self) -> HSHNPEN_W { + HSHNPEN_W::new(self, 10) } #[doc = "Bit 11 - Device HNP enabled"] #[inline(always)] #[must_use] - pub fn dhnpen(&mut self) -> DHNPEN_W { - DHNPEN_W::new(self) + pub fn dhnpen(&mut self) -> DHNPEN_W { + DHNPEN_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gotgint.rs b/crates/bcm2835-lpa/src/usb_otg_global/gotgint.rs index a44613f..820fbf5 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gotgint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gotgint.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `SEDET` reader - Session end detected"] pub type SEDET_R = crate::BitReader; #[doc = "Field `SEDET` writer - Session end detected"] -pub type SEDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SEDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRSSCHG` reader - Session request success status change"] pub type SRSSCHG_R = crate::BitReader; #[doc = "Field `SRSSCHG` writer - Session request success status change"] -pub type SRSSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRSSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNSSCHG` reader - Host negotiation success status change"] pub type HNSSCHG_R = crate::BitReader; #[doc = "Field `HNSSCHG` writer - Host negotiation success status change"] -pub type HNSSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNSSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNGDET` reader - Host negotiation detected"] pub type HNGDET_R = crate::BitReader; #[doc = "Field `HNGDET` writer - Host negotiation detected"] -pub type HNGDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNGDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADTOCHG` reader - A-device timeout change"] pub type ADTOCHG_R = crate::BitReader; #[doc = "Field `ADTOCHG` writer - A-device timeout change"] -pub type ADTOCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ADTOCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DBCDNE` reader - Debounce done"] pub type DBCDNE_R = crate::BitReader; #[doc = "Field `DBCDNE` writer - Debounce done"] -pub type DBCDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DBCDNE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - Session end detected"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 2 - Session end detected"] #[inline(always)] #[must_use] - pub fn sedet(&mut self) -> SEDET_W { - SEDET_W::new(self) + pub fn sedet(&mut self) -> SEDET_W { + SEDET_W::new(self, 2) } #[doc = "Bit 8 - Session request success status change"] #[inline(always)] #[must_use] - pub fn srsschg(&mut self) -> SRSSCHG_W { - SRSSCHG_W::new(self) + pub fn srsschg(&mut self) -> SRSSCHG_W { + SRSSCHG_W::new(self, 8) } #[doc = "Bit 9 - Host negotiation success status change"] #[inline(always)] #[must_use] - pub fn hnsschg(&mut self) -> HNSSCHG_W { - HNSSCHG_W::new(self) + pub fn hnsschg(&mut self) -> HNSSCHG_W { + HNSSCHG_W::new(self, 9) } #[doc = "Bit 17 - Host negotiation detected"] #[inline(always)] #[must_use] - pub fn hngdet(&mut self) -> HNGDET_W { - HNGDET_W::new(self) + pub fn hngdet(&mut self) -> HNGDET_W { + HNGDET_W::new(self, 17) } #[doc = "Bit 18 - A-device timeout change"] #[inline(always)] #[must_use] - pub fn adtochg(&mut self) -> ADTOCHG_W { - ADTOCHG_W::new(self) + pub fn adtochg(&mut self) -> ADTOCHG_W { + ADTOCHG_W::new(self, 18) } #[doc = "Bit 19 - Debounce done"] #[inline(always)] #[must_use] - pub fn dbcdne(&mut self) -> DBCDNE_W { - DBCDNE_W::new(self) + pub fn dbcdne(&mut self) -> DBCDNE_W { + DBCDNE_W::new(self, 19) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/grstctl.rs b/crates/bcm2835-lpa/src/usb_otg_global/grstctl.rs index 799d4ca..d12acdf 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/grstctl.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/grstctl.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `CSRST` reader - Core soft reset"] pub type CSRST_R = crate::BitReader; #[doc = "Field `CSRST` writer - Core soft reset"] -pub type CSRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HSRST` reader - HCLK soft reset"] pub type HSRST_R = crate::BitReader; #[doc = "Field `HSRST` writer - HCLK soft reset"] -pub type HSRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HSRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FCRST` reader - Host frame counter reset"] pub type FCRST_R = crate::BitReader; #[doc = "Field `FCRST` writer - Host frame counter reset"] -pub type FCRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FCRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFFLSH` reader - RxFIFO flush"] pub type RXFFLSH_R = crate::BitReader; #[doc = "Field `RXFFLSH` writer - RxFIFO flush"] -pub type RXFFLSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFFLSH` reader - TxFIFO flush"] pub type TXFFLSH_R = crate::BitReader; #[doc = "Field `TXFFLSH` writer - TxFIFO flush"] -pub type TXFFLSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub type TXFNUM_R = crate::FieldReader; #[doc = "Field `TXFNUM` writer - TxFIFO number"] -pub type TXFNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 5, O>; +pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `DMAREQ` reader - DMA request signal"] pub type DMAREQ_R = crate::BitReader; #[doc = "Field `AHBIDL` reader - AHB master idle"] @@ -88,45 +88,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Core soft reset"] #[inline(always)] #[must_use] - pub fn csrst(&mut self) -> CSRST_W { - CSRST_W::new(self) + pub fn csrst(&mut self) -> CSRST_W { + CSRST_W::new(self, 0) } #[doc = "Bit 1 - HCLK soft reset"] #[inline(always)] #[must_use] - pub fn hsrst(&mut self) -> HSRST_W { - HSRST_W::new(self) + pub fn hsrst(&mut self) -> HSRST_W { + HSRST_W::new(self, 1) } #[doc = "Bit 2 - Host frame counter reset"] #[inline(always)] #[must_use] - pub fn fcrst(&mut self) -> FCRST_W { - FCRST_W::new(self) + pub fn fcrst(&mut self) -> FCRST_W { + FCRST_W::new(self, 2) } #[doc = "Bit 4 - RxFIFO flush"] #[inline(always)] #[must_use] - pub fn rxfflsh(&mut self) -> RXFFLSH_W { - RXFFLSH_W::new(self) + pub fn rxfflsh(&mut self) -> RXFFLSH_W { + RXFFLSH_W::new(self, 4) } #[doc = "Bit 5 - TxFIFO flush"] #[inline(always)] #[must_use] - pub fn txfflsh(&mut self) -> TXFFLSH_W { - TXFFLSH_W::new(self) + pub fn txfflsh(&mut self) -> TXFFLSH_W { + TXFFLSH_W::new(self, 5) } #[doc = "Bits 6:10 - TxFIFO number"] #[inline(always)] #[must_use] - pub fn txfnum(&mut self) -> TXFNUM_W { - TXFNUM_W::new(self) + pub fn txfnum(&mut self) -> TXFNUM_W { + TXFNUM_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/grxfsiz.rs b/crates/bcm2835-lpa/src/usb_otg_global/grxfsiz.rs index b243ab8..29425cc 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/grxfsiz.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/grxfsiz.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RXFD` reader - RxFIFO depth"] pub type RXFD_R = crate::FieldReader; #[doc = "Field `RXFD` writer - RxFIFO depth"] -pub type RXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type RXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RxFIFO depth"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - RxFIFO depth"] #[inline(always)] #[must_use] - pub fn rxfd(&mut self) -> RXFD_W { - RXFD_W::new(self) + pub fn rxfd(&mut self) -> RXFD_W { + RXFD_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_host.rs b/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_host.rs index 5e8d3bb..55702c4 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_host.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_host.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS status read and pop register (host mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_host::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_peripheral.rs b/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_peripheral.rs index e28018e..a8c70b6 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_peripheral.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/grxstsp_peripheral.rs @@ -50,7 +50,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS status read and pop register (peripheral mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_peripheral::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_host.rs b/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_host.rs index e9e1ba6..766cd8d 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_host.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_host.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Receive status debug read register (host mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_host::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_peripheral.rs b/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_peripheral.rs index d6f8ca3..7083cf6 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_peripheral.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/grxstsr_peripheral.rs @@ -50,7 +50,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Receive status debug read register (peripheral mode mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_peripheral::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/gusbcfg.rs b/crates/bcm2835-lpa/src/usb_otg_global/gusbcfg.rs index b5f882e..6f9fa6e 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/gusbcfg.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/gusbcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOCAL` reader - FS timeout calibration"] pub type TOCAL_R = crate::FieldReader; #[doc = "Field `TOCAL` writer - FS timeout calibration"] -pub type TOCAL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TOCAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PHYIF` reader - PHY Interface width"] pub type PHYIF_R = crate::BitReader; #[doc = "PHY Interface width\n\nValue on reset: 0"] @@ -43,8 +43,8 @@ impl PHYIF_R { } } #[doc = "Field `PHYIF` writer - PHY Interface width"] -pub type PHYIF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYIF_A>; -impl<'a, REG, const O: u8> PHYIF_W<'a, REG, O> +pub type PHYIF_W<'a, REG> = crate::BitWriter<'a, REG, PHYIF_A>; +impl<'a, REG> PHYIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -96,8 +96,8 @@ impl PHYTYPE_R { } } #[doc = "Field `PHYTYPE` writer - PHY Type"] -pub type PHYTYPE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYTYPE_A>; -impl<'a, REG, const O: u8> PHYTYPE_W<'a, REG, O> +pub type PHYTYPE_W<'a, REG> = crate::BitWriter<'a, REG, PHYTYPE_A>; +impl<'a, REG> PHYTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -149,8 +149,8 @@ impl FSIF_R { } } #[doc = "Field `FSIF` writer - Full speed interface"] -pub type FSIF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, FSIF_A>; -impl<'a, REG, const O: u8> FSIF_W<'a, REG, O> +pub type FSIF_W<'a, REG> = crate::BitWriter<'a, REG, FSIF_A>; +impl<'a, REG> FSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -202,8 +202,8 @@ impl PHYSEL_R { } } #[doc = "Field `PHYSEL` writer - Transceiver select"] -pub type PHYSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYSEL_A>; -impl<'a, REG, const O: u8> PHYSEL_W<'a, REG, O> +pub type PHYSEL_W<'a, REG> = crate::BitWriter<'a, REG, PHYSEL_A>; +impl<'a, REG> PHYSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -255,8 +255,8 @@ impl DDRSEL_R { } } #[doc = "Field `DDRSEL` writer - ULPI data rate"] -pub type DDRSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DDRSEL_A>; -impl<'a, REG, const O: u8> DDRSEL_W<'a, REG, O> +pub type DDRSEL_W<'a, REG> = crate::BitWriter<'a, REG, DDRSEL_A>; +impl<'a, REG> DDRSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -274,67 +274,67 @@ where #[doc = "Field `SRPCAP` reader - SRP-capable"] pub type SRPCAP_R = crate::BitReader; #[doc = "Field `SRPCAP` writer - SRP-capable"] -pub type SRPCAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRPCAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNPCAP` reader - HNP-capable"] pub type HNPCAP_R = crate::BitReader; #[doc = "Field `HNPCAP` writer - HNP-capable"] -pub type HNPCAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNPCAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRDT` reader - USB turnaround time"] pub type TRDT_R = crate::FieldReader; #[doc = "Field `TRDT` writer - USB turnaround time"] -pub type TRDT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TRDT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PHYLPCS` reader - PHY Low-power clock select"] pub type PHYLPCS_R = crate::BitReader; #[doc = "Field `PHYLPCS` writer - PHY Low-power clock select"] -pub type PHYLPCS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYLPCS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIFSLS` reader - ULPI FS/LS select"] pub type ULPIFSLS_R = crate::BitReader; #[doc = "Field `ULPIFSLS` writer - ULPI FS/LS select"] -pub type ULPIFSLS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIFSLS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIAR` reader - ULPI Auto-resume"] pub type ULPIAR_R = crate::BitReader; #[doc = "Field `ULPIAR` writer - ULPI Auto-resume"] -pub type ULPIAR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIAR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPICSM` reader - ULPI Clock SuspendM"] pub type ULPICSM_R = crate::BitReader; #[doc = "Field `ULPICSM` writer - ULPI Clock SuspendM"] -pub type ULPICSM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPICSM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIEVBUSD` reader - ULPI External VBUS Drive"] pub type ULPIEVBUSD_R = crate::BitReader; #[doc = "Field `ULPIEVBUSD` writer - ULPI External VBUS Drive"] -pub type ULPIEVBUSD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIEVBUSD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIEVBUSI` reader - ULPI external VBUS indicator"] pub type ULPIEVBUSI_R = crate::BitReader; #[doc = "Field `ULPIEVBUSI` writer - ULPI external VBUS indicator"] -pub type ULPIEVBUSI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIEVBUSI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSDPS` reader - TermSel DLine pulsing selection"] pub type TSDPS_R = crate::BitReader; #[doc = "Field `TSDPS` writer - TermSel DLine pulsing selection"] -pub type TSDPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TSDPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCCI` reader - Indicator complement"] pub type PCCI_R = crate::BitReader; #[doc = "Field `PCCI` writer - Indicator complement"] -pub type PCCI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCCI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTCI` reader - Indicator pass through"] pub type PTCI_R = crate::BitReader; #[doc = "Field `PTCI` writer - Indicator pass through"] -pub type PTCI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTCI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIIPD` reader - ULPI interface protect disable"] pub type ULPIIPD_R = crate::BitReader; #[doc = "Field `ULPIIPD` writer - ULPI interface protect disable"] -pub type ULPIIPD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIIPD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FHMOD` reader - Forced host mode"] pub type FHMOD_R = crate::BitReader; #[doc = "Field `FHMOD` writer - Forced host mode"] -pub type FHMOD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FHMOD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FDMOD` reader - Forced peripheral mode"] pub type FDMOD_R = crate::BitReader; #[doc = "Field `FDMOD` writer - Forced peripheral mode"] -pub type FDMOD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FDMOD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTXPKT` reader - Corrupt Tx packet"] pub type CTXPKT_R = crate::BitReader; #[doc = "Field `CTXPKT` writer - Corrupt Tx packet"] -pub type CTXPKT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTXPKT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - FS timeout calibration"] #[inline(always)] @@ -477,141 +477,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - FS timeout calibration"] #[inline(always)] #[must_use] - pub fn tocal(&mut self) -> TOCAL_W { - TOCAL_W::new(self) + pub fn tocal(&mut self) -> TOCAL_W { + TOCAL_W::new(self, 0) } #[doc = "Bit 3 - PHY Interface width"] #[inline(always)] #[must_use] - pub fn phyif(&mut self) -> PHYIF_W { - PHYIF_W::new(self) + pub fn phyif(&mut self) -> PHYIF_W { + PHYIF_W::new(self, 3) } #[doc = "Bit 4 - PHY Type"] #[inline(always)] #[must_use] - pub fn phytype(&mut self) -> PHYTYPE_W { - PHYTYPE_W::new(self) + pub fn phytype(&mut self) -> PHYTYPE_W { + PHYTYPE_W::new(self, 4) } #[doc = "Bit 5 - Full speed interface"] #[inline(always)] #[must_use] - pub fn fsif(&mut self) -> FSIF_W { - FSIF_W::new(self) + pub fn fsif(&mut self) -> FSIF_W { + FSIF_W::new(self, 5) } #[doc = "Bit 6 - Transceiver select"] #[inline(always)] #[must_use] - pub fn physel(&mut self) -> PHYSEL_W { - PHYSEL_W::new(self) + pub fn physel(&mut self) -> PHYSEL_W { + PHYSEL_W::new(self, 6) } #[doc = "Bit 7 - ULPI data rate"] #[inline(always)] #[must_use] - pub fn ddrsel(&mut self) -> DDRSEL_W { - DDRSEL_W::new(self) + pub fn ddrsel(&mut self) -> DDRSEL_W { + DDRSEL_W::new(self, 7) } #[doc = "Bit 8 - SRP-capable"] #[inline(always)] #[must_use] - pub fn srpcap(&mut self) -> SRPCAP_W { - SRPCAP_W::new(self) + pub fn srpcap(&mut self) -> SRPCAP_W { + SRPCAP_W::new(self, 8) } #[doc = "Bit 9 - HNP-capable"] #[inline(always)] #[must_use] - pub fn hnpcap(&mut self) -> HNPCAP_W { - HNPCAP_W::new(self) + pub fn hnpcap(&mut self) -> HNPCAP_W { + HNPCAP_W::new(self, 9) } #[doc = "Bits 10:13 - USB turnaround time"] #[inline(always)] #[must_use] - pub fn trdt(&mut self) -> TRDT_W { - TRDT_W::new(self) + pub fn trdt(&mut self) -> TRDT_W { + TRDT_W::new(self, 10) } #[doc = "Bit 15 - PHY Low-power clock select"] #[inline(always)] #[must_use] - pub fn phylpcs(&mut self) -> PHYLPCS_W { - PHYLPCS_W::new(self) + pub fn phylpcs(&mut self) -> PHYLPCS_W { + PHYLPCS_W::new(self, 15) } #[doc = "Bit 17 - ULPI FS/LS select"] #[inline(always)] #[must_use] - pub fn ulpifsls(&mut self) -> ULPIFSLS_W { - ULPIFSLS_W::new(self) + pub fn ulpifsls(&mut self) -> ULPIFSLS_W { + ULPIFSLS_W::new(self, 17) } #[doc = "Bit 18 - ULPI Auto-resume"] #[inline(always)] #[must_use] - pub fn ulpiar(&mut self) -> ULPIAR_W { - ULPIAR_W::new(self) + pub fn ulpiar(&mut self) -> ULPIAR_W { + ULPIAR_W::new(self, 18) } #[doc = "Bit 19 - ULPI Clock SuspendM"] #[inline(always)] #[must_use] - pub fn ulpicsm(&mut self) -> ULPICSM_W { - ULPICSM_W::new(self) + pub fn ulpicsm(&mut self) -> ULPICSM_W { + ULPICSM_W::new(self, 19) } #[doc = "Bit 20 - ULPI External VBUS Drive"] #[inline(always)] #[must_use] - pub fn ulpievbusd(&mut self) -> ULPIEVBUSD_W { - ULPIEVBUSD_W::new(self) + pub fn ulpievbusd(&mut self) -> ULPIEVBUSD_W { + ULPIEVBUSD_W::new(self, 20) } #[doc = "Bit 21 - ULPI external VBUS indicator"] #[inline(always)] #[must_use] - pub fn ulpievbusi(&mut self) -> ULPIEVBUSI_W { - ULPIEVBUSI_W::new(self) + pub fn ulpievbusi(&mut self) -> ULPIEVBUSI_W { + ULPIEVBUSI_W::new(self, 21) } #[doc = "Bit 22 - TermSel DLine pulsing selection"] #[inline(always)] #[must_use] - pub fn tsdps(&mut self) -> TSDPS_W { - TSDPS_W::new(self) + pub fn tsdps(&mut self) -> TSDPS_W { + TSDPS_W::new(self, 22) } #[doc = "Bit 23 - Indicator complement"] #[inline(always)] #[must_use] - pub fn pcci(&mut self) -> PCCI_W { - PCCI_W::new(self) + pub fn pcci(&mut self) -> PCCI_W { + PCCI_W::new(self, 23) } #[doc = "Bit 24 - Indicator pass through"] #[inline(always)] #[must_use] - pub fn ptci(&mut self) -> PTCI_W { - PTCI_W::new(self) + pub fn ptci(&mut self) -> PTCI_W { + PTCI_W::new(self, 24) } #[doc = "Bit 25 - ULPI interface protect disable"] #[inline(always)] #[must_use] - pub fn ulpiipd(&mut self) -> ULPIIPD_W { - ULPIIPD_W::new(self) + pub fn ulpiipd(&mut self) -> ULPIIPD_W { + ULPIIPD_W::new(self, 25) } #[doc = "Bit 29 - Forced host mode"] #[inline(always)] #[must_use] - pub fn fhmod(&mut self) -> FHMOD_W { - FHMOD_W::new(self) + pub fn fhmod(&mut self) -> FHMOD_W { + FHMOD_W::new(self, 29) } #[doc = "Bit 30 - Forced peripheral mode"] #[inline(always)] #[must_use] - pub fn fdmod(&mut self) -> FDMOD_W { - FDMOD_W::new(self) + pub fn fdmod(&mut self) -> FDMOD_W { + FDMOD_W::new(self, 30) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] #[must_use] - pub fn ctxpkt(&mut self) -> CTXPKT_W { - CTXPKT_W::new(self) + pub fn ctxpkt(&mut self) -> CTXPKT_W { + CTXPKT_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/hptxfsiz.rs b/crates/bcm2835-lpa/src/usb_otg_global/hptxfsiz.rs index cd99421..9cf564b 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/hptxfsiz.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/hptxfsiz.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `PTXSA` reader - Host periodic TxFIFO start address"] pub type PTXSA_R = crate::FieldReader; #[doc = "Field `PTXSA` writer - Host periodic TxFIFO start address"] -pub type PTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTXFD` reader - Host periodic TxFIFO depth"] pub type PTXFD_R = crate::FieldReader; #[doc = "Field `PTXFD` writer - Host periodic TxFIFO depth"] -pub type PTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] #[must_use] - pub fn ptxsa(&mut self) -> PTXSA_W { - PTXSA_W::new(self) + pub fn ptxsa(&mut self) -> PTXSA_W { + PTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - Host periodic TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ptxfd(&mut self) -> PTXFD_W { - PTXFD_W::new(self) + pub fn ptxfd(&mut self) -> PTXFD_W { + PTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/hw_config0.rs b/crates/bcm2835-lpa/src/usb_otg_global/hw_config0.rs index 93348b4..1111e93 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/hw_config0.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/hw_config0.rs @@ -400,7 +400,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Hardware Config 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_config0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/hw_direction.rs b/crates/bcm2835-lpa/src/usb_otg_global/hw_direction.rs index 3545475..6428bea 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/hw_direction.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/hw_direction.rs @@ -50,9 +50,11 @@ impl DIRECTION_R { } } impl R { - #[doc = "Direction [0-15]"] + #[doc = "Direction [0-15]\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `DIRECTION0` field"] #[inline(always)] - pub unsafe fn direction(&self, n: u8) -> DIRECTION_R { + pub fn direction(&self, n: u8) -> DIRECTION_R { + #[allow(clippy::no_effect)] + [(); 16][n as usize]; DIRECTION_R::new(((self.bits >> (n * 2)) & 3) as u8) } #[doc = "Bits 0:1 - Direction 0"] @@ -178,7 +180,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Direction\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_direction::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs b/crates/bcm2835-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs index 73658ab..2afe810 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `TX0FSA` reader - Endpoint 0 transmit RAM start address"] pub type TX0FSA_R = crate::FieldReader; #[doc = "Field `TX0FSA` writer - Endpoint 0 transmit RAM start address"] -pub type TX0FSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TX0FSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `TX0FD` reader - Endpoint 0 TxFIFO depth"] pub type TX0FD_R = crate::FieldReader; #[doc = "Field `TX0FD` writer - Endpoint 0 TxFIFO depth"] -pub type TX0FD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TX0FD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Endpoint 0 transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Endpoint 0 transmit RAM start address"] #[inline(always)] #[must_use] - pub fn tx0fsa(&mut self) -> TX0FSA_W { - TX0FSA_W::new(self) + pub fn tx0fsa(&mut self) -> TX0FSA_W { + TX0FSA_W::new(self, 0) } #[doc = "Bits 16:31 - Endpoint 0 TxFIFO depth"] #[inline(always)] #[must_use] - pub fn tx0fd(&mut self) -> TX0FD_W { - TX0FD_W::new(self) + pub fn tx0fd(&mut self) -> TX0FD_W { + TX0FD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_global/vid.rs b/crates/bcm2835-lpa/src/usb_otg_global/vid.rs index 732dd16..05c4fa3 100644 --- a/crates/bcm2835-lpa/src/usb_otg_global/vid.rs +++ b/crates/bcm2835-lpa/src/usb_otg_global/vid.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS vendor ID register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_host.rs b/crates/bcm2835-lpa/src/usb_otg_host.rs index 69899f9..6322c96 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host.rs @@ -2,58 +2,136 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + hcfg: HCFG, + hfir: HFIR, + hfnum: HFNUM, + _reserved3: [u8; 0x04], + hptxsts: HPTXSTS, + haint: HAINT, + haintmsk: HAINTMSK, + _reserved6: [u8; 0x24], + hprt: HPRT, + _reserved7: [u8; 0xbc], + host_channel0: HOST_CHANNEL, + _reserved8: [u8; 0x08], + host_channel1: HOST_CHANNEL, + _reserved9: [u8; 0x08], + host_channel2: HOST_CHANNEL, + _reserved10: [u8; 0x08], + host_channel3: HOST_CHANNEL, + _reserved11: [u8; 0x08], + host_channel4: HOST_CHANNEL, + _reserved12: [u8; 0x08], + host_channel5: HOST_CHANNEL, + _reserved13: [u8; 0x08], + host_channel6: HOST_CHANNEL, + _reserved14: [u8; 0x08], + host_channel7: HOST_CHANNEL, + _reserved15: [u8; 0x08], + host_channel8: HOST_CHANNEL, + _reserved16: [u8; 0x08], + host_channel9: HOST_CHANNEL, + _reserved17: [u8; 0x08], + host_channel10: HOST_CHANNEL, + _reserved18: [u8; 0x08], + host_channel11: HOST_CHANNEL, +} +impl RegisterBlock { #[doc = "0x00 - OTG_HS host configuration register"] - pub hcfg: HCFG, + #[inline(always)] + pub const fn hcfg(&self) -> &HCFG { + &self.hcfg + } #[doc = "0x04 - OTG_HS Host frame interval register"] - pub hfir: HFIR, + #[inline(always)] + pub const fn hfir(&self) -> &HFIR { + &self.hfir + } #[doc = "0x08 - OTG_HS host frame number/frame time remaining register"] - pub hfnum: HFNUM, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn hfnum(&self) -> &HFNUM { + &self.hfnum + } #[doc = "0x10 - Host periodic transmit FIFO/queue status register"] - pub hptxsts: HPTXSTS, + #[inline(always)] + pub const fn hptxsts(&self) -> &HPTXSTS { + &self.hptxsts + } #[doc = "0x14 - OTG_HS Host all channels interrupt register"] - pub haint: HAINT, + #[inline(always)] + pub const fn haint(&self) -> &HAINT { + &self.haint + } #[doc = "0x18 - OTG_HS host all channels interrupt mask register"] - pub haintmsk: HAINTMSK, - _reserved6: [u8; 0x24], + #[inline(always)] + pub const fn haintmsk(&self) -> &HAINTMSK { + &self.haintmsk + } #[doc = "0x40 - OTG_HS host port control and status register"] - pub hprt: HPRT, - _reserved7: [u8; 0xbc], + #[inline(always)] + pub const fn hprt(&self) -> &HPRT { + &self.hprt + } #[doc = "0x100..0x118 - Host channel 0"] - pub host_channel0: HOST_CHANNEL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn host_channel0(&self) -> &HOST_CHANNEL { + &self.host_channel0 + } #[doc = "0x120..0x138 - Host channel 1"] - pub host_channel1: HOST_CHANNEL, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn host_channel1(&self) -> &HOST_CHANNEL { + &self.host_channel1 + } #[doc = "0x140..0x158 - Host channel 2"] - pub host_channel2: HOST_CHANNEL, - _reserved10: [u8; 0x08], + #[inline(always)] + pub const fn host_channel2(&self) -> &HOST_CHANNEL { + &self.host_channel2 + } #[doc = "0x160..0x178 - Host channel 3"] - pub host_channel3: HOST_CHANNEL, - _reserved11: [u8; 0x08], + #[inline(always)] + pub const fn host_channel3(&self) -> &HOST_CHANNEL { + &self.host_channel3 + } #[doc = "0x180..0x198 - Host channel 4"] - pub host_channel4: HOST_CHANNEL, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn host_channel4(&self) -> &HOST_CHANNEL { + &self.host_channel4 + } #[doc = "0x1a0..0x1b8 - Host channel 5"] - pub host_channel5: HOST_CHANNEL, - _reserved13: [u8; 0x08], + #[inline(always)] + pub const fn host_channel5(&self) -> &HOST_CHANNEL { + &self.host_channel5 + } #[doc = "0x1c0..0x1d8 - Host channel 6"] - pub host_channel6: HOST_CHANNEL, - _reserved14: [u8; 0x08], + #[inline(always)] + pub const fn host_channel6(&self) -> &HOST_CHANNEL { + &self.host_channel6 + } #[doc = "0x1e0..0x1f8 - Host channel 7"] - pub host_channel7: HOST_CHANNEL, - _reserved15: [u8; 0x08], + #[inline(always)] + pub const fn host_channel7(&self) -> &HOST_CHANNEL { + &self.host_channel7 + } #[doc = "0x200..0x218 - Host channel 8"] - pub host_channel8: HOST_CHANNEL, - _reserved16: [u8; 0x08], + #[inline(always)] + pub const fn host_channel8(&self) -> &HOST_CHANNEL { + &self.host_channel8 + } #[doc = "0x220..0x238 - Host channel 9"] - pub host_channel9: HOST_CHANNEL, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn host_channel9(&self) -> &HOST_CHANNEL { + &self.host_channel9 + } #[doc = "0x240..0x258 - Host channel 10"] - pub host_channel10: HOST_CHANNEL, - _reserved18: [u8; 0x08], + #[inline(always)] + pub const fn host_channel10(&self) -> &HOST_CHANNEL { + &self.host_channel10 + } #[doc = "0x260..0x278 - Host channel 11"] - pub host_channel11: HOST_CHANNEL, + #[inline(always)] + pub const fn host_channel11(&self) -> &HOST_CHANNEL { + &self.host_channel11 + } } #[doc = "HCFG (rw) register accessor: OTG_HS host configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcfg`] module"] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/haint.rs b/crates/bcm2835-lpa/src/usb_otg_host/haint.rs index fd11584..1dc94d5 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/haint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/haint.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Host all channels interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/haintmsk.rs b/crates/bcm2835-lpa/src/usb_otg_host/haintmsk.rs index f820459..2a95774 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/haintmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/haintmsk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `HAINTM` reader - Channel interrupt mask"] pub type HAINTM_R = crate::FieldReader; #[doc = "Field `HAINTM` writer - Channel interrupt mask"] -pub type HAINTM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type HAINTM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Channel interrupt mask"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Channel interrupt mask"] #[inline(always)] #[must_use] - pub fn haintm(&mut self) -> HAINTM_W { - HAINTM_W::new(self) + pub fn haintm(&mut self) -> HAINTM_W { + HAINTM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/hcfg.rs b/crates/bcm2835-lpa/src/usb_otg_host/hcfg.rs index af6795d..6451fdd 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/hcfg.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/hcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `FSLSPCS` reader - FS/LS PHY clock select"] pub type FSLSPCS_R = crate::FieldReader; #[doc = "Field `FSLSPCS` writer - FS/LS PHY clock select"] -pub type FSLSPCS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type FSLSPCS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FSLSS` reader - FS- and LS-only support"] pub type FSLSS_R = crate::BitReader; impl R { @@ -30,15 +30,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - FS/LS PHY clock select"] #[inline(always)] #[must_use] - pub fn fslspcs(&mut self) -> FSLSPCS_W { - FSLSPCS_W::new(self) + pub fn fslspcs(&mut self) -> FSLSPCS_W { + FSLSPCS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/hfir.rs b/crates/bcm2835-lpa/src/usb_otg_host/hfir.rs index d373916..04d2520 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/hfir.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/hfir.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `FRIVL` reader - Frame interval"] pub type FRIVL_R = crate::FieldReader; #[doc = "Field `FRIVL` writer - Frame interval"] -pub type FRIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type FRIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] #[must_use] - pub fn frivl(&mut self) -> FRIVL_W { - FRIVL_W::new(self) + pub fn frivl(&mut self) -> FRIVL_W { + FRIVL_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/hfnum.rs b/crates/bcm2835-lpa/src/usb_otg_host/hfnum.rs index 5bb48e9..b44cca5 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/hfnum.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/hfnum.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS host frame number/frame time remaining register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel.rs index 54d36d3..1ac62f9 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct HOST_CHANNEL { + hcchar: HCCHAR, + hcsplt: HCSPLT, + hcint: HCINT, + hcintmsk: HCINTMSK, + hctsiz: HCTSIZ, + hcdma: HCDMA, +} +impl HOST_CHANNEL { #[doc = "0x00 - Characteristics register"] - pub hcchar: HCCHAR, + #[inline(always)] + pub const fn hcchar(&self) -> &HCCHAR { + &self.hcchar + } #[doc = "0x04 - Split control register"] - pub hcsplt: HCSPLT, + #[inline(always)] + pub const fn hcsplt(&self) -> &HCSPLT { + &self.hcsplt + } #[doc = "0x08 - Interrupt register"] - pub hcint: HCINT, + #[inline(always)] + pub const fn hcint(&self) -> &HCINT { + &self.hcint + } #[doc = "0x0c - Interrupt mask"] - pub hcintmsk: HCINTMSK, + #[inline(always)] + pub const fn hcintmsk(&self) -> &HCINTMSK { + &self.hcintmsk + } #[doc = "0x10 - Transfer size"] - pub hctsiz: HCTSIZ, + #[inline(always)] + pub const fn hctsiz(&self) -> &HCTSIZ { + &self.hctsiz + } #[doc = "0x14 - DMA address"] - pub hcdma: HCDMA, + #[inline(always)] + pub const fn hcdma(&self) -> &HCDMA { + &self.hcdma + } } #[doc = "HCCHAR (rw) register accessor: Characteristics register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcchar`] module"] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcchar.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcchar.rs index 4bc5c53..1dcb5e3 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcchar.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcchar.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `MPSIZ` reader - Maximum packet size"] pub type MPSIZ_R = crate::FieldReader; #[doc = "Field `MPSIZ` writer - Maximum packet size"] -pub type MPSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 11, O, u16>; +pub type MPSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `EPNUM` reader - Endpoint number"] pub type EPNUM_R = crate::FieldReader; #[doc = "Field `EPNUM` writer - Endpoint number"] -pub type EPNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type EPNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `EPDIR` reader - Endpoint direction"] pub type EPDIR_R = crate::BitReader; #[doc = "Field `EPDIR` writer - Endpoint direction"] -pub type EPDIR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDIR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LSDEV` reader - Low-speed device"] pub type LSDEV_R = crate::BitReader; #[doc = "Field `LSDEV` writer - Low-speed device"] -pub type LSDEV_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LSDEV_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPTYP` reader - Endpoint type"] pub type EPTYP_R = crate::FieldReader; #[doc = "Field `EPTYP` writer - Endpoint type"] -pub type EPTYP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type EPTYP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `MC` reader - Multi Count (MC) / Error Count (EC)"] pub type MC_R = crate::FieldReader; #[doc = "Field `MC` writer - Multi Count (MC) / Error Count (EC)"] -pub type MC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type MC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DAD` reader - Device address"] pub type DAD_R = crate::FieldReader; #[doc = "Field `DAD` writer - Device address"] -pub type DAD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type DAD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `ODDFRM` reader - Odd frame"] pub type ODDFRM_R = crate::BitReader; #[doc = "Field `ODDFRM` writer - Odd frame"] -pub type ODDFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ODDFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDIS` reader - Channel disable"] pub type CHDIS_R = crate::BitReader; #[doc = "Field `CHDIS` writer - Channel disable"] -pub type CHDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHENA` reader - Channel enable"] pub type CHENA_R = crate::BitReader; #[doc = "Field `CHENA` writer - Channel enable"] -pub type CHENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] @@ -112,69 +112,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] #[must_use] - pub fn mpsiz(&mut self) -> MPSIZ_W { - MPSIZ_W::new(self) + pub fn mpsiz(&mut self) -> MPSIZ_W { + MPSIZ_W::new(self, 0) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] #[must_use] - pub fn epnum(&mut self) -> EPNUM_W { - EPNUM_W::new(self) + pub fn epnum(&mut self) -> EPNUM_W { + EPNUM_W::new(self, 11) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] #[must_use] - pub fn epdir(&mut self) -> EPDIR_W { - EPDIR_W::new(self) + pub fn epdir(&mut self) -> EPDIR_W { + EPDIR_W::new(self, 15) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] #[must_use] - pub fn lsdev(&mut self) -> LSDEV_W { - LSDEV_W::new(self) + pub fn lsdev(&mut self) -> LSDEV_W { + LSDEV_W::new(self, 17) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] #[must_use] - pub fn eptyp(&mut self) -> EPTYP_W { - EPTYP_W::new(self) + pub fn eptyp(&mut self) -> EPTYP_W { + EPTYP_W::new(self, 18) } #[doc = "Bits 20:21 - Multi Count (MC) / Error Count (EC)"] #[inline(always)] #[must_use] - pub fn mc(&mut self) -> MC_W { - MC_W::new(self) + pub fn mc(&mut self) -> MC_W { + MC_W::new(self, 20) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] #[must_use] - pub fn dad(&mut self) -> DAD_W { - DAD_W::new(self) + pub fn dad(&mut self) -> DAD_W { + DAD_W::new(self, 22) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] #[must_use] - pub fn oddfrm(&mut self) -> ODDFRM_W { - ODDFRM_W::new(self) + pub fn oddfrm(&mut self) -> ODDFRM_W { + ODDFRM_W::new(self, 29) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] #[must_use] - pub fn chdis(&mut self) -> CHDIS_W { - CHDIS_W::new(self) + pub fn chdis(&mut self) -> CHDIS_W { + CHDIS_W::new(self, 30) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] #[must_use] - pub fn chena(&mut self) -> CHENA_W { - CHENA_W::new(self) + pub fn chena(&mut self) -> CHENA_W { + CHENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcdma.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcdma.rs index 49ce1a2..173d1c7 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcdma.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcint.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcint.rs index 0fd949e..fc9d5e1 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcint.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcint.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHH` reader - Channel halted"] pub type CHH_R = crate::BitReader; #[doc = "Field `CHH` writer - Channel halted"] -pub type CHH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBERR` reader - AHB error"] pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBERR` writer - AHB error"] -pub type AHBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALL` reader - STALL response received interrupt"] pub type STALL_R = crate::BitReader; #[doc = "Field `STALL` writer - STALL response received interrupt"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK response received interrupt"] pub type NAK_R = crate::BitReader; #[doc = "Field `NAK` writer - NAK response received interrupt"] -pub type NAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub type ACK_R = crate::BitReader; #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] -pub type ACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - Response received interrupt"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - Response received interrupt"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXERR` reader - Transaction error"] pub type TXERR_R = crate::BitReader; #[doc = "Field `TXERR` writer - Transaction error"] -pub type TXERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BBERR` reader - Babble error"] pub type BBERR_R = crate::BitReader; #[doc = "Field `BBERR` writer - Babble error"] -pub type BBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRMOR` reader - Frame overrun"] pub type FRMOR_R = crate::BitReader; #[doc = "Field `FRMOR` writer - Frame overrun"] -pub type FRMOR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FRMOR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTERR` reader - Data toggle error"] pub type DTERR_R = crate::BitReader; #[doc = "Field `DTERR` writer - Data toggle error"] -pub type DTERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] #[must_use] - pub fn chh(&mut self) -> CHH_W { - CHH_W::new(self) + pub fn chh(&mut self) -> CHH_W { + CHH_W::new(self, 1) } #[doc = "Bit 2 - AHB error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 3) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self) + pub fn nak(&mut self) -> NAK_W { + NAK_W::new(self, 4) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W { - ACK_W::new(self) + pub fn ack(&mut self) -> ACK_W { + ACK_W::new(self, 5) } #[doc = "Bit 6 - Response received interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction error"] #[inline(always)] #[must_use] - pub fn txerr(&mut self) -> TXERR_W { - TXERR_W::new(self) + pub fn txerr(&mut self) -> TXERR_W { + TXERR_W::new(self, 7) } #[doc = "Bit 8 - Babble error"] #[inline(always)] #[must_use] - pub fn bberr(&mut self) -> BBERR_W { - BBERR_W::new(self) + pub fn bberr(&mut self) -> BBERR_W { + BBERR_W::new(self, 8) } #[doc = "Bit 9 - Frame overrun"] #[inline(always)] #[must_use] - pub fn frmor(&mut self) -> FRMOR_W { - FRMOR_W::new(self) + pub fn frmor(&mut self) -> FRMOR_W { + FRMOR_W::new(self, 9) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] #[must_use] - pub fn dterr(&mut self) -> DTERR_W { - DTERR_W::new(self) + pub fn dterr(&mut self) -> DTERR_W { + DTERR_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcintmsk.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcintmsk.rs index 03aa41c..56e5d7a 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcintmsk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcintmsk.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHHM` reader - Channel halted mask"] pub type CHHM_R = crate::BitReader; #[doc = "Field `CHHM` writer - Channel halted mask"] -pub type CHHM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHHM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBERR` reader - AHB error"] pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBERR` writer - AHB error"] -pub type AHBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALLM` reader - STALL response received interrupt mask"] pub type STALLM_R = crate::BitReader; #[doc = "Field `STALLM` writer - STALL response received interrupt mask"] -pub type STALLM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALLM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK response received interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK response received interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACKM` reader - ACK response received/transmitted interrupt mask"] pub type ACKM_R = crate::BitReader; #[doc = "Field `ACKM` writer - ACK response received/transmitted interrupt mask"] -pub type ACKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - response received interrupt mask"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - response received interrupt mask"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXERRM` reader - Transaction error mask"] pub type TXERRM_R = crate::BitReader; #[doc = "Field `TXERRM` writer - Transaction error mask"] -pub type TXERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BBERRM` reader - Babble error mask"] pub type BBERRM_R = crate::BitReader; #[doc = "Field `BBERRM` writer - Babble error mask"] -pub type BBERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BBERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRMORM` reader - Frame overrun mask"] pub type FRMORM_R = crate::BitReader; #[doc = "Field `FRMORM` writer - Frame overrun mask"] -pub type FRMORM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FRMORM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTERRM` reader - Data toggle error mask"] pub type DTERRM_R = crate::BitReader; #[doc = "Field `DTERRM` writer - Data toggle error mask"] -pub type DTERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTERRM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed mask"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Channel halted mask"] #[inline(always)] #[must_use] - pub fn chhm(&mut self) -> CHHM_W { - CHHM_W::new(self) + pub fn chhm(&mut self) -> CHHM_W { + CHHM_W::new(self, 1) } #[doc = "Bit 2 - AHB error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL response received interrupt mask"] #[inline(always)] #[must_use] - pub fn stallm(&mut self) -> STALLM_W { - STALLM_W::new(self) + pub fn stallm(&mut self) -> STALLM_W { + STALLM_W::new(self, 3) } #[doc = "Bit 4 - NAK response received interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 4) } #[doc = "Bit 5 - ACK response received/transmitted interrupt mask"] #[inline(always)] #[must_use] - pub fn ackm(&mut self) -> ACKM_W { - ACKM_W::new(self) + pub fn ackm(&mut self) -> ACKM_W { + ACKM_W::new(self, 5) } #[doc = "Bit 6 - response received interrupt mask"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction error mask"] #[inline(always)] #[must_use] - pub fn txerrm(&mut self) -> TXERRM_W { - TXERRM_W::new(self) + pub fn txerrm(&mut self) -> TXERRM_W { + TXERRM_W::new(self, 7) } #[doc = "Bit 8 - Babble error mask"] #[inline(always)] #[must_use] - pub fn bberrm(&mut self) -> BBERRM_W { - BBERRM_W::new(self) + pub fn bberrm(&mut self) -> BBERRM_W { + BBERRM_W::new(self, 8) } #[doc = "Bit 9 - Frame overrun mask"] #[inline(always)] #[must_use] - pub fn frmorm(&mut self) -> FRMORM_W { - FRMORM_W::new(self) + pub fn frmorm(&mut self) -> FRMORM_W { + FRMORM_W::new(self, 9) } #[doc = "Bit 10 - Data toggle error mask"] #[inline(always)] #[must_use] - pub fn dterrm(&mut self) -> DTERRM_W { - DTERRM_W::new(self) + pub fn dterrm(&mut self) -> DTERRM_W { + DTERRM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcsplt.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcsplt.rs index dfc4fa0..881e2ba 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcsplt.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hcsplt.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `PRTADDR` reader - Port address"] pub type PRTADDR_R = crate::FieldReader; #[doc = "Field `PRTADDR` writer - Port address"] -pub type PRTADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type PRTADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `HUBADDR` reader - Hub address"] pub type HUBADDR_R = crate::FieldReader; #[doc = "Field `HUBADDR` writer - Hub address"] -pub type HUBADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type HUBADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `XACTPOS` reader - XACTPOS"] pub type XACTPOS_R = crate::FieldReader; #[doc = "Field `XACTPOS` writer - XACTPOS"] -pub type XACTPOS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type XACTPOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `COMPLSPLT` reader - Do complete split"] pub type COMPLSPLT_R = crate::BitReader; #[doc = "Field `COMPLSPLT` writer - Do complete split"] -pub type COMPLSPLT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type COMPLSPLT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPLITEN` reader - Split enable"] pub type SPLITEN_R = crate::BitReader; #[doc = "Field `SPLITEN` writer - Split enable"] -pub type SPLITEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPLITEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:6 - Port address"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Port address"] #[inline(always)] #[must_use] - pub fn prtaddr(&mut self) -> PRTADDR_W { - PRTADDR_W::new(self) + pub fn prtaddr(&mut self) -> PRTADDR_W { + PRTADDR_W::new(self, 0) } #[doc = "Bits 7:13 - Hub address"] #[inline(always)] #[must_use] - pub fn hubaddr(&mut self) -> HUBADDR_W { - HUBADDR_W::new(self) + pub fn hubaddr(&mut self) -> HUBADDR_W { + HUBADDR_W::new(self, 7) } #[doc = "Bits 14:15 - XACTPOS"] #[inline(always)] #[must_use] - pub fn xactpos(&mut self) -> XACTPOS_W { - XACTPOS_W::new(self) + pub fn xactpos(&mut self) -> XACTPOS_W { + XACTPOS_W::new(self, 14) } #[doc = "Bit 16 - Do complete split"] #[inline(always)] #[must_use] - pub fn complsplt(&mut self) -> COMPLSPLT_W { - COMPLSPLT_W::new(self) + pub fn complsplt(&mut self) -> COMPLSPLT_W { + COMPLSPLT_W::new(self, 16) } #[doc = "Bit 31 - Split enable"] #[inline(always)] #[must_use] - pub fn spliten(&mut self) -> SPLITEN_W { - SPLITEN_W::new(self) + pub fn spliten(&mut self) -> SPLITEN_W { + SPLITEN_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hctsiz.rs b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hctsiz.rs index ebfe51b..57a9475 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hctsiz.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/host_channel/hctsiz.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 19, O, u32>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::FieldReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type PKTCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DPID` reader - Data PID"] pub type DPID_R = crate::FieldReader; #[doc = "Field `DPID` writer - Data PID"] -pub type DPID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type DPID_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:18 - Transfer size"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:18 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] #[must_use] - pub fn dpid(&mut self) -> DPID_W { - DPID_W::new(self) + pub fn dpid(&mut self) -> DPID_W { + DPID_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/hprt.rs b/crates/bcm2835-lpa/src/usb_otg_host/hprt.rs index ca27b6f..ccff5b5 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/hprt.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/hprt.rs @@ -7,43 +7,43 @@ pub type PCSTS_R = crate::BitReader; #[doc = "Field `PCDET` reader - Port connect detected"] pub type PCDET_R = crate::BitReader; #[doc = "Field `PCDET` writer - Port connect detected"] -pub type PCDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENA` reader - Port enable"] pub type PENA_R = crate::BitReader; #[doc = "Field `PENA` writer - Port enable"] -pub type PENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PENA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENCHNG` reader - Port enable/disable change"] pub type PENCHNG_R = crate::BitReader; #[doc = "Field `PENCHNG` writer - Port enable/disable change"] -pub type PENCHNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PENCHNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POCA` reader - Port overcurrent active"] pub type POCA_R = crate::BitReader; #[doc = "Field `POCCHNG` reader - Port overcurrent change"] pub type POCCHNG_R = crate::BitReader; #[doc = "Field `POCCHNG` writer - Port overcurrent change"] -pub type POCCHNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POCCHNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRES` reader - Port resume"] pub type PRES_R = crate::BitReader; #[doc = "Field `PRES` writer - Port resume"] -pub type PRES_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PRES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSUSP` reader - Port suspend"] pub type PSUSP_R = crate::BitReader; #[doc = "Field `PSUSP` writer - Port suspend"] -pub type PSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRST` reader - Port reset"] pub type PRST_R = crate::BitReader; #[doc = "Field `PRST` writer - Port reset"] -pub type PRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PLSTS` reader - Port line status"] pub type PLSTS_R = crate::FieldReader; #[doc = "Field `PPWR` reader - Port power"] pub type PPWR_R = crate::BitReader; #[doc = "Field `PPWR` writer - Port power"] -pub type PPWR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PPWR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTCTL` reader - Port test control"] pub type PTCTL_R = crate::FieldReader; #[doc = "Field `PTCTL` writer - Port test control"] -pub type PTCTL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type PTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PSPD` reader - Port speed"] pub type PSPD_R = crate::FieldReader; impl R { @@ -134,63 +134,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Port connect detected"] #[inline(always)] #[must_use] - pub fn pcdet(&mut self) -> PCDET_W { - PCDET_W::new(self) + pub fn pcdet(&mut self) -> PCDET_W { + PCDET_W::new(self, 1) } #[doc = "Bit 2 - Port enable"] #[inline(always)] #[must_use] - pub fn pena(&mut self) -> PENA_W { - PENA_W::new(self) + pub fn pena(&mut self) -> PENA_W { + PENA_W::new(self, 2) } #[doc = "Bit 3 - Port enable/disable change"] #[inline(always)] #[must_use] - pub fn penchng(&mut self) -> PENCHNG_W { - PENCHNG_W::new(self) + pub fn penchng(&mut self) -> PENCHNG_W { + PENCHNG_W::new(self, 3) } #[doc = "Bit 5 - Port overcurrent change"] #[inline(always)] #[must_use] - pub fn pocchng(&mut self) -> POCCHNG_W { - POCCHNG_W::new(self) + pub fn pocchng(&mut self) -> POCCHNG_W { + POCCHNG_W::new(self, 5) } #[doc = "Bit 6 - Port resume"] #[inline(always)] #[must_use] - pub fn pres(&mut self) -> PRES_W { - PRES_W::new(self) + pub fn pres(&mut self) -> PRES_W { + PRES_W::new(self, 6) } #[doc = "Bit 7 - Port suspend"] #[inline(always)] #[must_use] - pub fn psusp(&mut self) -> PSUSP_W { - PSUSP_W::new(self) + pub fn psusp(&mut self) -> PSUSP_W { + PSUSP_W::new(self, 7) } #[doc = "Bit 8 - Port reset"] #[inline(always)] #[must_use] - pub fn prst(&mut self) -> PRST_W { - PRST_W::new(self) + pub fn prst(&mut self) -> PRST_W { + PRST_W::new(self, 8) } #[doc = "Bit 12 - Port power"] #[inline(always)] #[must_use] - pub fn ppwr(&mut self) -> PPWR_W { - PPWR_W::new(self) + pub fn ppwr(&mut self) -> PPWR_W { + PPWR_W::new(self, 12) } #[doc = "Bits 13:16 - Port test control"] #[inline(always)] #[must_use] - pub fn ptctl(&mut self) -> PTCTL_W { - PTCTL_W::new(self) + pub fn ptctl(&mut self) -> PTCTL_W { + PTCTL_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_host/hptxsts.rs b/crates/bcm2835-lpa/src/usb_otg_host/hptxsts.rs index ffb1b12..41663c6 100644 --- a/crates/bcm2835-lpa/src/usb_otg_host/hptxsts.rs +++ b/crates/bcm2835-lpa/src/usb_otg_host/hptxsts.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PTXFSAVL` reader - Periodic transmit data FIFO space available"] pub type PTXFSAVL_R = crate::FieldReader; #[doc = "Field `PTXFSAVL` writer - Periodic transmit data FIFO space available"] -pub type PTXFSAVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXFSAVL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTXQSAV` reader - Periodic transmit request queue space available"] pub type PTXQSAV_R = crate::FieldReader; #[doc = "Field `PTXQTOP` reader - Top of the periodic transmit request queue"] @@ -38,15 +38,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Periodic transmit data FIFO space available"] #[inline(always)] #[must_use] - pub fn ptxfsavl(&mut self) -> PTXFSAVL_W { - PTXFSAVL_W::new(self) + pub fn ptxfsavl(&mut self) -> PTXFSAVL_W { + PTXFSAVL_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/usb_otg_pwrclk.rs b/crates/bcm2835-lpa/src/usb_otg_pwrclk.rs index 242f3b2..17de0ae 100644 --- a/crates/bcm2835-lpa/src/usb_otg_pwrclk.rs +++ b/crates/bcm2835-lpa/src/usb_otg_pwrclk.rs @@ -2,8 +2,14 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + pcgcctl: PCGCCTL, +} +impl RegisterBlock { #[doc = "0x00 - power and clock gating control"] - pub pcgcctl: PCGCCTL, + #[inline(always)] + pub const fn pcgcctl(&self) -> &PCGCCTL { + &self.pcgcctl + } } #[doc = "PCGCCTL (rw) register accessor: power and clock gating control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] module"] diff --git a/crates/bcm2835-lpa/src/usb_otg_pwrclk/pcgcctl.rs b/crates/bcm2835-lpa/src/usb_otg_pwrclk/pcgcctl.rs index 97a2598..7a3322c 100644 --- a/crates/bcm2835-lpa/src/usb_otg_pwrclk/pcgcctl.rs +++ b/crates/bcm2835-lpa/src/usb_otg_pwrclk/pcgcctl.rs @@ -5,63 +5,63 @@ pub type W = crate::W; #[doc = "Field `STPPCLK` reader - Stop PHY clock"] pub type STPPCLK_R = crate::BitReader; #[doc = "Field `STPPCLK` writer - Stop PHY clock"] -pub type STPPCLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STPPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GATEHCLK` reader - Gate HCLK"] pub type GATEHCLK_R = crate::BitReader; #[doc = "Field `GATEHCLK` writer - Gate HCLK"] -pub type GATEHCLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GATEHCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRCLMP` reader - Power clamp"] pub type PWRCLMP_R = crate::BitReader; #[doc = "Field `PWRCLMP` writer - Power clamp"] -pub type PWRCLMP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWRCLMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTPDWNMODULE` reader - Power down modules"] pub type RSTPDWNMODULE_R = crate::BitReader; #[doc = "Field `RSTPDWNMODULE` writer - Power down modules"] -pub type RSTPDWNMODULE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RSTPDWNMODULE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PHYSUSP` reader - PHY Suspended"] pub type PHYSUSP_R = crate::BitReader; #[doc = "Field `PHYSUSP` writer - PHY Suspended"] -pub type PHYSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE_L1GATING` reader - Enable sleep clock gating"] pub type ENABLE_L1GATING_R = crate::BitReader; #[doc = "Field `ENABLE_L1GATING` writer - Enable sleep clock gating"] -pub type ENABLE_L1GATING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_L1GATING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PHYSLEEP` reader - PHY is in sleep mode"] pub type PHYSLEEP_R = crate::BitReader; #[doc = "Field `PHYSLEEP` writer - PHY is in sleep mode"] -pub type PHYSLEEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYSLEEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEEPSLEEP` reader - PHY is in deep sleep"] pub type DEEPSLEEP_R = crate::BitReader; #[doc = "Field `DEEPSLEEP` writer - PHY is in deep sleep"] -pub type DEEPSLEEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEEPSLEEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETAFTERSUSP` reader - Reset after suspend"] pub type RESETAFTERSUSP_R = crate::BitReader; #[doc = "Field `RESETAFTERSUSP` writer - Reset after suspend"] -pub type RESETAFTERSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RESETAFTERSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTOREMODE` reader - Restore mode"] pub type RESTOREMODE_R = crate::BitReader; #[doc = "Field `RESTOREMODE` writer - Restore mode"] -pub type RESTOREMODE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RESTOREMODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENEXTNDEDHIBER` reader - Enable extended hibernation"] pub type ENEXTNDEDHIBER_R = crate::BitReader; #[doc = "Field `ENEXTNDEDHIBER` writer - Enable extended hibernation"] -pub type ENEXTNDEDHIBER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENEXTNDEDHIBER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTNDEDHIBERNATIONCLAMP` reader - Extended hibernation clamp"] pub type EXTNDEDHIBERNATIONCLAMP_R = crate::BitReader; #[doc = "Field `EXTNDEDHIBERNATIONCLAMP` writer - Extended hibernation clamp"] -pub type EXTNDEDHIBERNATIONCLAMP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EXTNDEDHIBERNATIONCLAMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTNDEDHIBERNATIONSWITCH` reader - Extended hibernation switch"] pub type EXTNDEDHIBERNATIONSWITCH_R = crate::BitReader; #[doc = "Field `EXTNDEDHIBERNATIONSWITCH` writer - Extended hibernation switch"] -pub type EXTNDEDHIBERNATIONSWITCH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EXTNDEDHIBERNATIONSWITCH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESSREGRESTORED` reader - Essential register values restored"] pub type ESSREGRESTORED_R = crate::BitReader; #[doc = "Field `ESSREGRESTORED` writer - Essential register values restored"] -pub type ESSREGRESTORED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESSREGRESTORED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTORE_VALUE` reader - Restore value"] pub type RESTORE_VALUE_R = crate::FieldReader; #[doc = "Field `RESTORE_VALUE` writer - Restore value"] -pub type RESTORE_VALUE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 18, O, u32>; +pub type RESTORE_VALUE_W<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; impl R { #[doc = "Bit 0 - Stop PHY clock"] #[inline(always)] @@ -186,99 +186,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Stop PHY clock"] #[inline(always)] #[must_use] - pub fn stppclk(&mut self) -> STPPCLK_W { - STPPCLK_W::new(self) + pub fn stppclk(&mut self) -> STPPCLK_W { + STPPCLK_W::new(self, 0) } #[doc = "Bit 1 - Gate HCLK"] #[inline(always)] #[must_use] - pub fn gatehclk(&mut self) -> GATEHCLK_W { - GATEHCLK_W::new(self) + pub fn gatehclk(&mut self) -> GATEHCLK_W { + GATEHCLK_W::new(self, 1) } #[doc = "Bit 2 - Power clamp"] #[inline(always)] #[must_use] - pub fn pwrclmp(&mut self) -> PWRCLMP_W { - PWRCLMP_W::new(self) + pub fn pwrclmp(&mut self) -> PWRCLMP_W { + PWRCLMP_W::new(self, 2) } #[doc = "Bit 3 - Power down modules"] #[inline(always)] #[must_use] - pub fn rstpdwnmodule(&mut self) -> RSTPDWNMODULE_W { - RSTPDWNMODULE_W::new(self) + pub fn rstpdwnmodule(&mut self) -> RSTPDWNMODULE_W { + RSTPDWNMODULE_W::new(self, 3) } #[doc = "Bit 4 - PHY Suspended"] #[inline(always)] #[must_use] - pub fn physusp(&mut self) -> PHYSUSP_W { - PHYSUSP_W::new(self) + pub fn physusp(&mut self) -> PHYSUSP_W { + PHYSUSP_W::new(self, 4) } #[doc = "Bit 5 - Enable sleep clock gating"] #[inline(always)] #[must_use] - pub fn enable_l1gating(&mut self) -> ENABLE_L1GATING_W { - ENABLE_L1GATING_W::new(self) + pub fn enable_l1gating(&mut self) -> ENABLE_L1GATING_W { + ENABLE_L1GATING_W::new(self, 5) } #[doc = "Bit 6 - PHY is in sleep mode"] #[inline(always)] #[must_use] - pub fn physleep(&mut self) -> PHYSLEEP_W { - PHYSLEEP_W::new(self) + pub fn physleep(&mut self) -> PHYSLEEP_W { + PHYSLEEP_W::new(self, 6) } #[doc = "Bit 7 - PHY is in deep sleep"] #[inline(always)] #[must_use] - pub fn deepsleep(&mut self) -> DEEPSLEEP_W { - DEEPSLEEP_W::new(self) + pub fn deepsleep(&mut self) -> DEEPSLEEP_W { + DEEPSLEEP_W::new(self, 7) } #[doc = "Bit 8 - Reset after suspend"] #[inline(always)] #[must_use] - pub fn resetaftersusp(&mut self) -> RESETAFTERSUSP_W { - RESETAFTERSUSP_W::new(self) + pub fn resetaftersusp(&mut self) -> RESETAFTERSUSP_W { + RESETAFTERSUSP_W::new(self, 8) } #[doc = "Bit 9 - Restore mode"] #[inline(always)] #[must_use] - pub fn restoremode(&mut self) -> RESTOREMODE_W { - RESTOREMODE_W::new(self) + pub fn restoremode(&mut self) -> RESTOREMODE_W { + RESTOREMODE_W::new(self, 9) } #[doc = "Bit 10 - Enable extended hibernation"] #[inline(always)] #[must_use] - pub fn enextndedhiber(&mut self) -> ENEXTNDEDHIBER_W { - ENEXTNDEDHIBER_W::new(self) + pub fn enextndedhiber(&mut self) -> ENEXTNDEDHIBER_W { + ENEXTNDEDHIBER_W::new(self, 10) } #[doc = "Bit 11 - Extended hibernation clamp"] #[inline(always)] #[must_use] - pub fn extndedhibernationclamp(&mut self) -> EXTNDEDHIBERNATIONCLAMP_W { - EXTNDEDHIBERNATIONCLAMP_W::new(self) + pub fn extndedhibernationclamp(&mut self) -> EXTNDEDHIBERNATIONCLAMP_W { + EXTNDEDHIBERNATIONCLAMP_W::new(self, 11) } #[doc = "Bit 12 - Extended hibernation switch"] #[inline(always)] #[must_use] - pub fn extndedhibernationswitch(&mut self) -> EXTNDEDHIBERNATIONSWITCH_W { - EXTNDEDHIBERNATIONSWITCH_W::new(self) + pub fn extndedhibernationswitch(&mut self) -> EXTNDEDHIBERNATIONSWITCH_W { + EXTNDEDHIBERNATIONSWITCH_W::new(self, 12) } #[doc = "Bit 13 - Essential register values restored"] #[inline(always)] #[must_use] - pub fn essregrestored(&mut self) -> ESSREGRESTORED_W { - ESSREGRESTORED_W::new(self) + pub fn essregrestored(&mut self) -> ESSREGRESTORED_W { + ESSREGRESTORED_W::new(self, 13) } #[doc = "Bits 14:31 - Restore value"] #[inline(always)] #[must_use] - pub fn restore_value(&mut self) -> RESTORE_VALUE_W { - RESTORE_VALUE_W::new(self) + pub fn restore_value(&mut self) -> RESTORE_VALUE_W { + RESTORE_VALUE_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/vcmailbox.rs b/crates/bcm2835-lpa/src/vcmailbox.rs index f3d9184..7faef45 100644 --- a/crates/bcm2835-lpa/src/vcmailbox.rs +++ b/crates/bcm2835-lpa/src/vcmailbox.rs @@ -2,28 +2,70 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - Read messages from the VideoCore"] - pub read: READ, + read: READ, _reserved1: [u8; 0x0c], + peek0: PEEK0, + sender0: SENDER0, + status0: STATUS0, + config0: CONFIG0, + write: WRITE, + _reserved6: [u8; 0x0c], + peek1: PEEK1, + sender1: SENDER1, + status1: STATUS1, + config1: CONFIG1, +} +impl RegisterBlock { + #[doc = "0x00 - Read messages from the VideoCore"] + #[inline(always)] + pub const fn read(&self) -> &READ { + &self.read + } #[doc = "0x10 - "] - pub peek0: PEEK0, + #[inline(always)] + pub const fn peek0(&self) -> &PEEK0 { + &self.peek0 + } #[doc = "0x14 - "] - pub sender0: SENDER0, + #[inline(always)] + pub const fn sender0(&self) -> &SENDER0 { + &self.sender0 + } #[doc = "0x18 - "] - pub status0: STATUS0, + #[inline(always)] + pub const fn status0(&self) -> &STATUS0 { + &self.status0 + } #[doc = "0x1c - "] - pub config0: CONFIG0, + #[inline(always)] + pub const fn config0(&self) -> &CONFIG0 { + &self.config0 + } #[doc = "0x20 - Write messages to the VideoCore"] - pub write: WRITE, - _reserved6: [u8; 0x0c], + #[inline(always)] + pub const fn write(&self) -> &WRITE { + &self.write + } #[doc = "0x30 - "] - pub peek1: PEEK1, + #[inline(always)] + pub const fn peek1(&self) -> &PEEK1 { + &self.peek1 + } #[doc = "0x34 - "] - pub sender1: SENDER1, + #[inline(always)] + pub const fn sender1(&self) -> &SENDER1 { + &self.sender1 + } #[doc = "0x38 - "] - pub status1: STATUS1, + #[inline(always)] + pub const fn status1(&self) -> &STATUS1 { + &self.status1 + } #[doc = "0x3c - "] - pub config1: CONFIG1, + #[inline(always)] + pub const fn config1(&self) -> &CONFIG1 { + &self.config1 + } } #[doc = "READ (r) register accessor: Read messages from the VideoCore\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`read::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@read`] module"] diff --git a/crates/bcm2835-lpa/src/vcmailbox/config0.rs b/crates/bcm2835-lpa/src/vcmailbox/config0.rs index b90c56d..eedd705 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/config0.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/config0.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `IRQEN` reader - Enable the interrupt when data is available"] pub type IRQEN_R = crate::BitReader; #[doc = "Field `IRQEN` writer - Enable the interrupt when data is available"] -pub type IRQEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IRQEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable the interrupt when data is available"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable the interrupt when data is available"] #[inline(always)] #[must_use] - pub fn irqen(&mut self) -> IRQEN_W { - IRQEN_W::new(self) + pub fn irqen(&mut self) -> IRQEN_W { + IRQEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2835-lpa/src/vcmailbox/config1.rs b/crates/bcm2835-lpa/src/vcmailbox/config1.rs index 8a50eee..349f301 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/config1.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/config1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/vcmailbox/peek0.rs b/crates/bcm2835-lpa/src/vcmailbox/peek0.rs index 9119a22..84b4901 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/peek0.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/peek0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/vcmailbox/peek1.rs b/crates/bcm2835-lpa/src/vcmailbox/peek1.rs index 221331c..cd5f491 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/peek1.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/peek1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/vcmailbox/read.rs b/crates/bcm2835-lpa/src/vcmailbox/read.rs index 7328372..42a55f5 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/read.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/read.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Read messages from the VideoCore\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`read::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/vcmailbox/sender0.rs b/crates/bcm2835-lpa/src/vcmailbox/sender0.rs index 4b8ec27..8e2da52 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/sender0.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/sender0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/vcmailbox/sender1.rs b/crates/bcm2835-lpa/src/vcmailbox/sender1.rs index f787ecb..f76a754 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/sender1.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/sender1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2835-lpa/src/vcmailbox/status0.rs b/crates/bcm2835-lpa/src/vcmailbox/status0.rs index 92a12f6..080d718 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/status0.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/status0.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2835-lpa/src/vcmailbox/status1.rs b/crates/bcm2835-lpa/src/vcmailbox/status1.rs index 64ad85f..4403a52 100644 --- a/crates/bcm2835-lpa/src/vcmailbox/status1.rs +++ b/crates/bcm2835-lpa/src/vcmailbox/status1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/Cargo.toml b/crates/bcm2837-lpa/Cargo.toml index deaf77e..5bd1b1f 100644 --- a/crates/bcm2837-lpa/Cargo.toml +++ b/crates/bcm2837-lpa/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "bcm2837-lpa" -version = "0.2.2" +version = "0.3.0" authors = ["Po-Yi Tsai "] edition = "2021" rust-version = "1.65.0" diff --git a/crates/bcm2837-lpa/src/aux_.rs b/crates/bcm2837-lpa/src/aux_.rs index e442ed8..bb4bdb6 100644 --- a/crates/bcm2837-lpa/src/aux_.rs +++ b/crates/bcm2837-lpa/src/aux_.rs @@ -2,10 +2,20 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + irq: IRQ, + enables: ENABLES, +} +impl RegisterBlock { #[doc = "0x00 - Interrupt status"] - pub irq: IRQ, + #[inline(always)] + pub const fn irq(&self) -> &IRQ { + &self.irq + } #[doc = "0x04 - Enable sub-peripherals"] - pub enables: ENABLES, + #[inline(always)] + pub const fn enables(&self) -> &ENABLES { + &self.enables + } } #[doc = "IRQ (rw) register accessor: Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq`] module"] diff --git a/crates/bcm2837-lpa/src/aux_/enables.rs b/crates/bcm2837-lpa/src/aux_/enables.rs index c84adb4..129a624 100644 --- a/crates/bcm2837-lpa/src/aux_/enables.rs +++ b/crates/bcm2837-lpa/src/aux_/enables.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `UART_1` reader - UART1 enabled"] pub type UART_1_R = crate::BitReader; #[doc = "Field `UART_1` writer - UART1 enabled"] -pub type UART_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 enabled"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 enabled"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 enabled"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 enabled"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UART1 enabled"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UART1 enabled"] #[inline(always)] #[must_use] - pub fn uart_1(&mut self) -> UART_1_W { - UART_1_W::new(self) + pub fn uart_1(&mut self) -> UART_1_W { + UART_1_W::new(self, 0) } #[doc = "Bit 1 - SPI1 enabled"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 enabled"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/aux_/irq.rs b/crates/bcm2837-lpa/src/aux_/irq.rs index 785d02a..1d1c42b 100644 --- a/crates/bcm2837-lpa/src/aux_/irq.rs +++ b/crates/bcm2837-lpa/src/aux_/irq.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `UART_1` reader - UART1 interrupt active"] pub type UART_1_R = crate::BitReader; #[doc = "Field `UART_1` writer - UART1 interrupt active"] -pub type UART_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UART_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_1` reader - SPI1 interrupt active"] pub type SPI_1_R = crate::BitReader; #[doc = "Field `SPI_1` writer - SPI1 interrupt active"] -pub type SPI_1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_2` reader - SPI2 interrupt active"] pub type SPI_2_R = crate::BitReader; #[doc = "Field `SPI_2` writer - SPI2 interrupt active"] -pub type SPI_2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UART1 interrupt active"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UART1 interrupt active"] #[inline(always)] #[must_use] - pub fn uart_1(&mut self) -> UART_1_W { - UART_1_W::new(self) + pub fn uart_1(&mut self) -> UART_1_W { + UART_1_W::new(self, 0) } #[doc = "Bit 1 - SPI1 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_1(&mut self) -> SPI_1_W { - SPI_1_W::new(self) + pub fn spi_1(&mut self) -> SPI_1_W { + SPI_1_W::new(self, 1) } #[doc = "Bit 2 - SPI2 interrupt active"] #[inline(always)] #[must_use] - pub fn spi_2(&mut self) -> SPI_2_W { - SPI_2_W::new(self) + pub fn spi_2(&mut self) -> SPI_2_W { + SPI_2_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0.rs b/crates/bcm2837-lpa/src/bsc0.rs index 0d1c120..0e6821a 100644 --- a/crates/bcm2837-lpa/src/bsc0.rs +++ b/crates/bcm2837-lpa/src/bsc0.rs @@ -2,22 +2,56 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + c: C, + s: S, + dlen: DLEN, + a: A, + fifo: FIFO, + div: DIV, + del: DEL, + clkt: CLKT, +} +impl RegisterBlock { #[doc = "0x00 - Control"] - pub c: C, + #[inline(always)] + pub const fn c(&self) -> &C { + &self.c + } #[doc = "0x04 - Status"] - pub s: S, + #[inline(always)] + pub const fn s(&self) -> &S { + &self.s + } #[doc = "0x08 - Data length"] - pub dlen: DLEN, + #[inline(always)] + pub const fn dlen(&self) -> &DLEN { + &self.dlen + } #[doc = "0x0c - Slave address"] - pub a: A, + #[inline(always)] + pub const fn a(&self) -> &A { + &self.a + } #[doc = "0x10 - Data FIFO"] - pub fifo: FIFO, + #[inline(always)] + pub const fn fifo(&self) -> &FIFO { + &self.fifo + } #[doc = "0x14 - Clock divider"] - pub div: DIV, + #[inline(always)] + pub const fn div(&self) -> &DIV { + &self.div + } #[doc = "0x18 - Data delay (Values must be under CDIV / 2)"] - pub del: DEL, + #[inline(always)] + pub const fn del(&self) -> &DEL { + &self.del + } #[doc = "0x1c - Clock stretch timeout (broken on 283x)"] - pub clkt: CLKT, + #[inline(always)] + pub const fn clkt(&self) -> &CLKT { + &self.clkt + } } #[doc = "C (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`c::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c`] module"] diff --git a/crates/bcm2837-lpa/src/bsc0/a.rs b/crates/bcm2837-lpa/src/bsc0/a.rs index e9669f3..7baa776 100644 --- a/crates/bcm2837-lpa/src/bsc0/a.rs +++ b/crates/bcm2837-lpa/src/bsc0/a.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `ADDR` reader - Slave address"] pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Slave address"] -pub type ADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - Slave address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Slave address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/c.rs b/crates/bcm2837-lpa/src/bsc0/c.rs index 85f86f7..bf50f99 100644 --- a/crates/bcm2837-lpa/src/bsc0/c.rs +++ b/crates/bcm2837-lpa/src/bsc0/c.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `READ` reader - Transfer is read"] pub type READ_R = crate::BitReader; #[doc = "Field `READ` writer - Transfer is read"] -pub type READ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` reader - Clear the FIFO"] pub type CLEAR_R = crate::FieldReader; #[doc = "Field `CLEAR` writer - Clear the FIFO"] -pub type CLEAR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CLEAR_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `ST` reader - Start transfer"] pub type ST_R = crate::BitReader; #[doc = "Field `ST` writer - Start transfer"] -pub type ST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTD` reader - Interrupt on done"] pub type INTD_R = crate::BitReader; #[doc = "Field `INTD` writer - Interrupt on done"] -pub type INTD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTT` reader - Interrupt on TX"] pub type INTT_R = crate::BitReader; #[doc = "Field `INTT` writer - Interrupt on TX"] -pub type INTT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTR` reader - Interrupt on RX"] pub type INTR_R = crate::BitReader; #[doc = "Field `INTR` writer - Interrupt on RX"] -pub type INTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2CEN` reader - I2C Enable"] pub type I2CEN_R = crate::BitReader; #[doc = "Field `I2CEN` writer - I2C Enable"] -pub type I2CEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2CEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer is read"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer is read"] #[inline(always)] #[must_use] - pub fn read(&mut self) -> READ_W { - READ_W::new(self) + pub fn read(&mut self) -> READ_W { + READ_W::new(self, 0) } #[doc = "Bits 4:5 - Clear the FIFO"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W::new(self) + pub fn clear(&mut self) -> CLEAR_W { + CLEAR_W::new(self, 4) } #[doc = "Bit 7 - Start transfer"] #[inline(always)] #[must_use] - pub fn st(&mut self) -> ST_W { - ST_W::new(self) + pub fn st(&mut self) -> ST_W { + ST_W::new(self, 7) } #[doc = "Bit 8 - Interrupt on done"] #[inline(always)] #[must_use] - pub fn intd(&mut self) -> INTD_W { - INTD_W::new(self) + pub fn intd(&mut self) -> INTD_W { + INTD_W::new(self, 8) } #[doc = "Bit 9 - Interrupt on TX"] #[inline(always)] #[must_use] - pub fn intt(&mut self) -> INTT_W { - INTT_W::new(self) + pub fn intt(&mut self) -> INTT_W { + INTT_W::new(self, 9) } #[doc = "Bit 10 - Interrupt on RX"] #[inline(always)] #[must_use] - pub fn intr(&mut self) -> INTR_W { - INTR_W::new(self) + pub fn intr(&mut self) -> INTR_W { + INTR_W::new(self, 10) } #[doc = "Bit 15 - I2C Enable"] #[inline(always)] #[must_use] - pub fn i2cen(&mut self) -> I2CEN_W { - I2CEN_W::new(self) + pub fn i2cen(&mut self) -> I2CEN_W { + I2CEN_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/clkt.rs b/crates/bcm2837-lpa/src/bsc0/clkt.rs index 103f923..52b4821 100644 --- a/crates/bcm2837-lpa/src/bsc0/clkt.rs +++ b/crates/bcm2837-lpa/src/bsc0/clkt.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOUT` reader - Number of SCL clock cycles to wait"] pub type TOUT_R = crate::FieldReader; #[doc = "Field `TOUT` writer - Number of SCL clock cycles to wait"] -pub type TOUT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Number of SCL clock cycles to wait"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Number of SCL clock cycles to wait"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W { - TOUT_W::new(self) + pub fn tout(&mut self) -> TOUT_W { + TOUT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/del.rs b/crates/bcm2837-lpa/src/bsc0/del.rs index 4c0e876..2068915 100644 --- a/crates/bcm2837-lpa/src/bsc0/del.rs +++ b/crates/bcm2837-lpa/src/bsc0/del.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `REDL` reader - Delay before reading after a rising edge"] pub type REDL_R = crate::FieldReader; #[doc = "Field `REDL` writer - Delay before reading after a rising edge"] -pub type REDL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type REDL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `FEDL` reader - Delay before reading after a falling edge"] pub type FEDL_R = crate::FieldReader; #[doc = "Field `FEDL` writer - Delay before reading after a falling edge"] -pub type FEDL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type FEDL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Delay before reading after a rising edge"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Delay before reading after a rising edge"] #[inline(always)] #[must_use] - pub fn redl(&mut self) -> REDL_W { - REDL_W::new(self) + pub fn redl(&mut self) -> REDL_W { + REDL_W::new(self, 0) } #[doc = "Bits 16:31 - Delay before reading after a falling edge"] #[inline(always)] #[must_use] - pub fn fedl(&mut self) -> FEDL_W { - FEDL_W::new(self) + pub fn fedl(&mut self) -> FEDL_W { + FEDL_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/div.rs b/crates/bcm2837-lpa/src/bsc0/div.rs index 9ffd801..b2baf3f 100644 --- a/crates/bcm2837-lpa/src/bsc0/div.rs +++ b/crates/bcm2837-lpa/src/bsc0/div.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CDIV` reader - Divide the source clock"] pub type CDIV_R = crate::FieldReader; #[doc = "Field `CDIV` writer - Divide the source clock"] -pub type CDIV_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type CDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Divide the source clock"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Divide the source clock"] #[inline(always)] #[must_use] - pub fn cdiv(&mut self) -> CDIV_W { - CDIV_W::new(self) + pub fn cdiv(&mut self) -> CDIV_W { + CDIV_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/dlen.rs b/crates/bcm2837-lpa/src/bsc0/dlen.rs index 5c7bb83..c86b386 100644 --- a/crates/bcm2837-lpa/src/bsc0/dlen.rs +++ b/crates/bcm2837-lpa/src/bsc0/dlen.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DLEN` reader - Data length"] pub type DLEN_R = crate::FieldReader; #[doc = "Field `DLEN` writer - Data length"] -pub type DLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Data length"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Data length"] #[inline(always)] #[must_use] - pub fn dlen(&mut self) -> DLEN_W { - DLEN_W::new(self) + pub fn dlen(&mut self) -> DLEN_W { + DLEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/fifo.rs b/crates/bcm2837-lpa/src/bsc0/fifo.rs index 0536908..acea4b1 100644 --- a/crates/bcm2837-lpa/src/bsc0/fifo.rs +++ b/crates/bcm2837-lpa/src/bsc0/fifo.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - Access the FIFO"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Access the FIFO"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Access the FIFO"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - Access the FIFO"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/bsc0/s.rs b/crates/bcm2837-lpa/src/bsc0/s.rs index 56cb006..3bbf05a 100644 --- a/crates/bcm2837-lpa/src/bsc0/s.rs +++ b/crates/bcm2837-lpa/src/bsc0/s.rs @@ -7,7 +7,7 @@ pub type TA_R = crate::BitReader; #[doc = "Field `DONE` reader - Transfer done"] pub type DONE_R = crate::BitReader; #[doc = "Field `DONE` writer - Transfer done"] -pub type DONE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TXW` reader - FIFO needs to be written"] pub type TXW_R = crate::BitReader; #[doc = "Field `RXR` reader - FIFO needs to be read"] @@ -23,11 +23,11 @@ pub type RXF_R = crate::BitReader; #[doc = "Field `ERR` reader - Error: No ack"] pub type ERR_R = crate::BitReader; #[doc = "Field `ERR` writer - Error: No ack"] -pub type ERR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLKT` reader - Clock stretch timeout"] pub type CLKT_R = crate::BitReader; #[doc = "Field `CLKT` writer - Clock stretch timeout"] -pub type CLKT_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLKT_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Transfer active"] #[inline(always)] @@ -98,27 +98,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Transfer done"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DONE_W { - DONE_W::new(self) + pub fn done(&mut self) -> DONE_W { + DONE_W::new(self, 1) } #[doc = "Bit 8 - Error: No ack"] #[inline(always)] #[must_use] - pub fn err(&mut self) -> ERR_W { - ERR_W::new(self) + pub fn err(&mut self) -> ERR_W { + ERR_W::new(self, 8) } #[doc = "Bit 9 - Clock stretch timeout"] #[inline(always)] #[must_use] - pub fn clkt(&mut self) -> CLKT_W { - CLKT_W::new(self) + pub fn clkt(&mut self) -> CLKT_W { + CLKT_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/cm_pcm.rs b/crates/bcm2837-lpa/src/cm_pcm.rs index 855e1b0..eafffb7 100644 --- a/crates/bcm2837-lpa/src/cm_pcm.rs +++ b/crates/bcm2837-lpa/src/cm_pcm.rs @@ -2,10 +2,20 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + div: DIV, +} +impl RegisterBlock { #[doc = "0x00 - Control / Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - Clock divisor"] - pub div: DIV, + #[inline(always)] + pub const fn div(&self) -> &DIV { + &self.div + } } #[doc = "CS (rw) register accessor: Control / Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2837-lpa/src/cm_pcm/cs.rs b/crates/bcm2837-lpa/src/cm_pcm/cs.rs index 036729f..753af77 100644 --- a/crates/bcm2837-lpa/src/cm_pcm/cs.rs +++ b/crates/bcm2837-lpa/src/cm_pcm/cs.rs @@ -22,6 +22,8 @@ pub enum SRC_A { PLLC = 6, #[doc = "7: `111`"] HDMI = 7, + #[doc = "0: `0`"] + GND = 0, } impl From for u8 { #[inline(always)] @@ -35,16 +37,16 @@ impl crate::FieldSpec for SRC_A { impl SRC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> SRC_A { match self.bits { - 1 => Some(SRC_A::XOSC), - 2 => Some(SRC_A::TEST0), - 3 => Some(SRC_A::TEST1), - 4 => Some(SRC_A::PLLA), - 5 => Some(SRC_A::PLLB), - 6 => Some(SRC_A::PLLC), - 7 => Some(SRC_A::HDMI), - _ => None, + 1 => SRC_A::XOSC, + 2 => SRC_A::TEST0, + 3 => SRC_A::TEST1, + 4 => SRC_A::PLLA, + 5 => SRC_A::PLLB, + 6 => SRC_A::PLLC, + 7 => SRC_A::HDMI, + _ => SRC_A::GND, } } #[doc = "`1`"] @@ -82,10 +84,15 @@ impl SRC_R { pub fn is_hdmi(&self) -> bool { *self == SRC_A::HDMI } + #[doc = "`0`"] + #[inline(always)] + pub fn is_gnd(&self) -> bool { + matches!(self.variant(), SRC_A::GND) + } } #[doc = "Field `SRC` writer - Clock source"] -pub type SRC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O, SRC_A>; -impl<'a, REG, const O: u8> SRC_W<'a, REG, O> +pub type SRC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, SRC_A>; +impl<'a, REG> SRC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -125,25 +132,30 @@ where pub fn hdmi(self) -> &'a mut crate::W { self.variant(SRC_A::HDMI) } + #[doc = "`0`"] + #[inline(always)] + pub fn gnd(self) -> &'a mut crate::W { + self.variant(SRC_A::GND) + } } #[doc = "Field `ENAB` reader - Enable the clock generator. (Switch SRC first.)"] pub type ENAB_R = crate::BitReader; #[doc = "Field `ENAB` writer - Enable the clock generator. (Switch SRC first.)"] -pub type ENAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENAB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KILL` reader - Stop and reset the generator"] pub type KILL_R = crate::BitReader; #[doc = "Field `KILL` writer - Stop and reset the generator"] -pub type KILL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type KILL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSY` reader - Indicates the clock generator is running"] pub type BUSY_R = crate::BitReader; #[doc = "Field `FLIP` reader - Generate an edge on output. (For testing)"] pub type FLIP_R = crate::BitReader; #[doc = "Field `FLIP` writer - Generate an edge on output. (For testing)"] -pub type FLIP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FLIP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASH` reader - MASH control, stage count"] pub type MASH_R = crate::FieldReader; #[doc = "Field `MASH` writer - MASH control, stage count"] -pub type MASH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type MASH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -161,8 +173,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -219,45 +231,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:3 - Clock source"] #[inline(always)] #[must_use] - pub fn src(&mut self) -> SRC_W { - SRC_W::new(self) + pub fn src(&mut self) -> SRC_W { + SRC_W::new(self, 0) } #[doc = "Bit 4 - Enable the clock generator. (Switch SRC first.)"] #[inline(always)] #[must_use] - pub fn enab(&mut self) -> ENAB_W { - ENAB_W::new(self) + pub fn enab(&mut self) -> ENAB_W { + ENAB_W::new(self, 4) } #[doc = "Bit 5 - Stop and reset the generator"] #[inline(always)] #[must_use] - pub fn kill(&mut self) -> KILL_W { - KILL_W::new(self) + pub fn kill(&mut self) -> KILL_W { + KILL_W::new(self, 5) } #[doc = "Bit 8 - Generate an edge on output. (For testing)"] #[inline(always)] #[must_use] - pub fn flip(&mut self) -> FLIP_W { - FLIP_W::new(self) + pub fn flip(&mut self) -> FLIP_W { + FLIP_W::new(self, 8) } #[doc = "Bits 9:10 - MASH control, stage count"] #[inline(always)] #[must_use] - pub fn mash(&mut self) -> MASH_W { - MASH_W::new(self) + pub fn mash(&mut self) -> MASH_W { + MASH_W::new(self, 9) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/cm_pcm/div.rs b/crates/bcm2837-lpa/src/cm_pcm/div.rs index 825974e..4ded814 100644 --- a/crates/bcm2837-lpa/src/cm_pcm/div.rs +++ b/crates/bcm2837-lpa/src/cm_pcm/div.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `DIVF` reader - Fractional part of divisor"] pub type DIVF_R = crate::FieldReader; #[doc = "Field `DIVF` writer - Fractional part of divisor"] -pub type DIVF_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DIVF_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DIVI` reader - Integer part of divisor"] pub type DIVI_R = crate::FieldReader; #[doc = "Field `DIVI` writer - Integer part of divisor"] -pub type DIVI_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DIVI_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Password. Always 0x5a\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] @@ -27,8 +27,8 @@ impl crate::FieldSpec for PASSWD_AW { type Ux = u8; } #[doc = "Field `PASSWD` writer - Password. Always 0x5a"] -pub type PASSWD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O, PASSWD_AW>; -impl<'a, REG, const O: u8> PASSWD_W<'a, REG, O> +pub type PASSWD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, PASSWD_AW>; +impl<'a, REG> PASSWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,27 +61,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:11 - Fractional part of divisor"] #[inline(always)] #[must_use] - pub fn divf(&mut self) -> DIVF_W { - DIVF_W::new(self) + pub fn divf(&mut self) -> DIVF_W { + DIVF_W::new(self, 0) } #[doc = "Bits 12:23 - Integer part of divisor"] #[inline(always)] #[must_use] - pub fn divi(&mut self) -> DIVI_W { - DIVI_W::new(self) + pub fn divi(&mut self) -> DIVI_W { + DIVI_W::new(self, 12) } #[doc = "Bits 24:31 - Password. Always 0x5a"] #[inline(always)] #[must_use] - pub fn passwd(&mut self) -> PASSWD_W { - PASSWD_W::new(self) + pub fn passwd(&mut self) -> PASSWD_W { + PASSWD_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc.rs b/crates/bcm2837-lpa/src/emmc.rs index 597a27a..d3fd4a7 100644 --- a/crates/bcm2837-lpa/src/emmc.rs +++ b/crates/bcm2837-lpa/src/emmc.rs @@ -2,63 +2,169 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + arg2: ARG2, + blksizecnt: BLKSIZECNT, + arg1: ARG1, + cmdtm: CMDTM, + resp0: RESP0, + resp1: RESP1, + resp2: RESP2, + resp3: RESP3, + data: DATA, + status: STATUS, + control0: CONTROL0, + control1: CONTROL1, + interrupt: INTERRUPT, + irpt_mask: IRPT_MASK, + irpt_en: IRPT_EN, + control2: CONTROL2, + _reserved16: [u8; 0x10], + force_irpt: FORCE_IRPT, + _reserved17: [u8; 0x1c], + boot_timeout: BOOT_TIMEOUT, + dbg_sel: DBG_SEL, + _reserved19: [u8; 0x08], + exrdfifo_cfg: EXRDFIFO_CFG, + exrdfifo_en: EXRDFIFO_EN, + tune_step: TUNE_STEP, + tune_steps_std: TUNE_STEPS_STD, + tune_steps_ddr: TUNE_STEPS_DDR, + _reserved24: [u8; 0x5c], + spi_int_spt: SPI_INT_SPT, + _reserved25: [u8; 0x08], + slotisr_ver: SLOTISR_VER, +} +impl RegisterBlock { #[doc = "0x00 - Argument for ACMD23 command"] - pub arg2: ARG2, + #[inline(always)] + pub const fn arg2(&self) -> &ARG2 { + &self.arg2 + } #[doc = "0x04 - Numer and size in bytes for data block to be transferred"] - pub blksizecnt: BLKSIZECNT, + #[inline(always)] + pub const fn blksizecnt(&self) -> &BLKSIZECNT { + &self.blksizecnt + } #[doc = "0x08 - Argument for everything but ACMD23"] - pub arg1: ARG1, + #[inline(always)] + pub const fn arg1(&self) -> &ARG1 { + &self.arg1 + } #[doc = "0x0c - Issue commands to the card"] - pub cmdtm: CMDTM, + #[inline(always)] + pub const fn cmdtm(&self) -> &CMDTM { + &self.cmdtm + } #[doc = "0x10 - Status bits of the response"] - pub resp0: RESP0, + #[inline(always)] + pub const fn resp0(&self) -> &RESP0 { + &self.resp0 + } #[doc = "0x14 - Bits 63:32 of CMD2 and CMD10 responses"] - pub resp1: RESP1, + #[inline(always)] + pub const fn resp1(&self) -> &RESP1 { + &self.resp1 + } #[doc = "0x18 - Bits 95:64 of CMD2 and CMD10 responses"] - pub resp2: RESP2, + #[inline(always)] + pub const fn resp2(&self) -> &RESP2 { + &self.resp2 + } #[doc = "0x1c - Bits 127:96 of CMD2 and CMD10 responses"] - pub resp3: RESP3, + #[inline(always)] + pub const fn resp3(&self) -> &RESP3 { + &self.resp3 + } #[doc = "0x20 - Data to/from the card"] - pub data: DATA, + #[inline(always)] + pub const fn data(&self) -> &DATA { + &self.data + } #[doc = "0x24 - Status info for debugging"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &STATUS { + &self.status + } #[doc = "0x28 - Control"] - pub control0: CONTROL0, + #[inline(always)] + pub const fn control0(&self) -> &CONTROL0 { + &self.control0 + } #[doc = "0x2c - Configure"] - pub control1: CONTROL1, + #[inline(always)] + pub const fn control1(&self) -> &CONTROL1 { + &self.control1 + } #[doc = "0x30 - Interrupt flags"] - pub interrupt: INTERRUPT, + #[inline(always)] + pub const fn interrupt(&self) -> &INTERRUPT { + &self.interrupt + } #[doc = "0x34 - Mask interrupts that change in INTERRUPT"] - pub irpt_mask: IRPT_MASK, + #[inline(always)] + pub const fn irpt_mask(&self) -> &IRPT_MASK { + &self.irpt_mask + } #[doc = "0x38 - Enable interrupt to core"] - pub irpt_en: IRPT_EN, + #[inline(always)] + pub const fn irpt_en(&self) -> &IRPT_EN { + &self.irpt_en + } #[doc = "0x3c - Control 2"] - pub control2: CONTROL2, - _reserved16: [u8; 0x10], + #[inline(always)] + pub const fn control2(&self) -> &CONTROL2 { + &self.control2 + } #[doc = "0x50 - Force an interrupt"] - pub force_irpt: FORCE_IRPT, - _reserved17: [u8; 0x1c], + #[inline(always)] + pub const fn force_irpt(&self) -> &FORCE_IRPT { + &self.force_irpt + } #[doc = "0x70 - Number of SD clock cycles to wait for boot"] - pub boot_timeout: BOOT_TIMEOUT, + #[inline(always)] + pub const fn boot_timeout(&self) -> &BOOT_TIMEOUT { + &self.boot_timeout + } #[doc = "0x74 - What submodules are accessed by the debug bus"] - pub dbg_sel: DBG_SEL, - _reserved19: [u8; 0x08], + #[inline(always)] + pub const fn dbg_sel(&self) -> &DBG_SEL { + &self.dbg_sel + } #[doc = "0x80 - Fine tune DMA request generation"] - pub exrdfifo_cfg: EXRDFIFO_CFG, + #[inline(always)] + pub const fn exrdfifo_cfg(&self) -> &EXRDFIFO_CFG { + &self.exrdfifo_cfg + } #[doc = "0x84 - Enable the extension data register"] - pub exrdfifo_en: EXRDFIFO_EN, + #[inline(always)] + pub const fn exrdfifo_en(&self) -> &EXRDFIFO_EN { + &self.exrdfifo_en + } #[doc = "0x88 - Sample clock delay step duration"] - pub tune_step: TUNE_STEP, + #[inline(always)] + pub const fn tune_step(&self) -> &TUNE_STEP { + &self.tune_step + } #[doc = "0x8c - Sample clock delay step count for SDR"] - pub tune_steps_std: TUNE_STEPS_STD, + #[inline(always)] + pub const fn tune_steps_std(&self) -> &TUNE_STEPS_STD { + &self.tune_steps_std + } #[doc = "0x90 - Sample clock delay step count for DDR"] - pub tune_steps_ddr: TUNE_STEPS_DDR, - _reserved24: [u8; 0x5c], + #[inline(always)] + pub const fn tune_steps_ddr(&self) -> &TUNE_STEPS_DDR { + &self.tune_steps_ddr + } #[doc = "0xf0 - Interrupts in SPI mode depend on CS"] - pub spi_int_spt: SPI_INT_SPT, - _reserved25: [u8; 0x08], + #[inline(always)] + pub const fn spi_int_spt(&self) -> &SPI_INT_SPT { + &self.spi_int_spt + } #[doc = "0xfc - Version information and slot interrupt status"] - pub slotisr_ver: SLOTISR_VER, + #[inline(always)] + pub const fn slotisr_ver(&self) -> &SLOTISR_VER { + &self.slotisr_ver + } } #[doc = "ARG2 (rw) register accessor: Argument for ACMD23 command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arg2`] module"] diff --git a/crates/bcm2837-lpa/src/emmc/arg1.rs b/crates/bcm2837-lpa/src/emmc/arg1.rs index 491f890..4dd4150 100644 --- a/crates/bcm2837-lpa/src/emmc/arg1.rs +++ b/crates/bcm2837-lpa/src/emmc/arg1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/arg2.rs b/crates/bcm2837-lpa/src/emmc/arg2.rs index 90678c2..915f1c7 100644 --- a/crates/bcm2837-lpa/src/emmc/arg2.rs +++ b/crates/bcm2837-lpa/src/emmc/arg2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/blksizecnt.rs b/crates/bcm2837-lpa/src/emmc/blksizecnt.rs index c6eec15..1f432bc 100644 --- a/crates/bcm2837-lpa/src/emmc/blksizecnt.rs +++ b/crates/bcm2837-lpa/src/emmc/blksizecnt.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `BLKSIZE` reader - Block size in bytes"] pub type BLKSIZE_R = crate::FieldReader; #[doc = "Field `BLKSIZE` writer - Block size in bytes"] -pub type BLKSIZE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type BLKSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `BLKCNT` reader - Number of blocks to be transferred"] pub type BLKCNT_R = crate::FieldReader; #[doc = "Field `BLKCNT` writer - Number of blocks to be transferred"] -pub type BLKCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type BLKCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:9 - Block size in bytes"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:9 - Block size in bytes"] #[inline(always)] #[must_use] - pub fn blksize(&mut self) -> BLKSIZE_W { - BLKSIZE_W::new(self) + pub fn blksize(&mut self) -> BLKSIZE_W { + BLKSIZE_W::new(self, 0) } #[doc = "Bits 16:31 - Number of blocks to be transferred"] #[inline(always)] #[must_use] - pub fn blkcnt(&mut self) -> BLKCNT_W { - BLKCNT_W::new(self) + pub fn blkcnt(&mut self) -> BLKCNT_W { + BLKCNT_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/boot_timeout.rs b/crates/bcm2837-lpa/src/emmc/boot_timeout.rs index 41d8ff1..1931547 100644 --- a/crates/bcm2837-lpa/src/emmc/boot_timeout.rs +++ b/crates/bcm2837-lpa/src/emmc/boot_timeout.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/cmdtm.rs b/crates/bcm2837-lpa/src/emmc/cmdtm.rs index 6ff28c8..2388784 100644 --- a/crates/bcm2837-lpa/src/emmc/cmdtm.rs +++ b/crates/bcm2837-lpa/src/emmc/cmdtm.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TM_BLKCNT_EN` reader - Enable block counter"] pub type TM_BLKCNT_EN_R = crate::BitReader; #[doc = "Field `TM_BLKCNT_EN` writer - Enable block counter"] -pub type TM_BLKCNT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TM_BLKCNT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TM_AUTO_CMD_EN` reader - Command after completion"] pub type TM_AUTO_CMD_EN_R = crate::FieldReader; #[doc = "Command after completion\n\nValue on reset: 0"] @@ -56,9 +56,8 @@ impl TM_AUTO_CMD_EN_R { } } #[doc = "Field `TM_AUTO_CMD_EN` writer - Command after completion"] -pub type TM_AUTO_CMD_EN_W<'a, REG, const O: u8> = - crate::FieldWriter<'a, REG, 2, O, TM_AUTO_CMD_EN_A>; -impl<'a, REG, const O: u8> TM_AUTO_CMD_EN_W<'a, REG, O> +pub type TM_AUTO_CMD_EN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TM_AUTO_CMD_EN_A>; +impl<'a, REG> TM_AUTO_CMD_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -116,8 +115,8 @@ impl TM_DAT_DIR_R { } } #[doc = "Field `TM_DAT_DIR` writer - Direction of data transfer"] -pub type TM_DAT_DIR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TM_DAT_DIR_A>; -impl<'a, REG, const O: u8> TM_DAT_DIR_W<'a, REG, O> +pub type TM_DAT_DIR_W<'a, REG> = crate::BitWriter<'a, REG, TM_DAT_DIR_A>; +impl<'a, REG> TM_DAT_DIR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -169,8 +168,8 @@ impl TM_MULTI_BLOCK_R { } } #[doc = "Field `TM_MULTI_BLOCK` writer - Type of data transfer"] -pub type TM_MULTI_BLOCK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, TM_MULTI_BLOCK_A>; -impl<'a, REG, const O: u8> TM_MULTI_BLOCK_W<'a, REG, O> +pub type TM_MULTI_BLOCK_W<'a, REG> = crate::BitWriter<'a, REG, TM_MULTI_BLOCK_A>; +impl<'a, REG> TM_MULTI_BLOCK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -243,8 +242,8 @@ impl CMD_RSPNS_TYPE_R { } } #[doc = "Field `CMD_RSPNS_TYPE` writer - Type of expected response"] -pub type CMD_RSPNS_TYPE_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, RESPONSE_A>; -impl<'a, REG, const O: u8> CMD_RSPNS_TYPE_W<'a, REG, O> +pub type CMD_RSPNS_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RESPONSE_A>; +impl<'a, REG> CMD_RSPNS_TYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,15 +272,15 @@ where #[doc = "Field `CMD_CRCCHK_EN` reader - Check the responses CRC"] pub type CMD_CRCCHK_EN_R = crate::BitReader; #[doc = "Field `CMD_CRCCHK_EN` writer - Check the responses CRC"] -pub type CMD_CRCCHK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_CRCCHK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_IXCHK_EN` reader - Check that the response has the same command index"] pub type CMD_IXCHK_EN_R = crate::BitReader; #[doc = "Field `CMD_IXCHK_EN` writer - Check that the response has the same command index"] -pub type CMD_IXCHK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_IXCHK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_ISDATA` reader - Command involves data"] pub type CMD_ISDATA_R = crate::BitReader; #[doc = "Field `CMD_ISDATA` writer - Command involves data"] -pub type CMD_ISDATA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_ISDATA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMD_TYPE` reader - Type of command to be issued"] pub type CMD_TYPE_R = crate::FieldReader; #[doc = "Type of command to be issued\n\nValue on reset: 0"] @@ -340,8 +339,8 @@ impl CMD_TYPE_R { } } #[doc = "Field `CMD_TYPE` writer - Type of command to be issued"] -pub type CMD_TYPE_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, CMD_TYPE_A>; -impl<'a, REG, const O: u8> CMD_TYPE_W<'a, REG, O> +pub type CMD_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CMD_TYPE_A>; +impl<'a, REG> CMD_TYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -370,7 +369,7 @@ where #[doc = "Field `CMD_INDEX` reader - Command index to be issued"] pub type CMD_INDEX_R = crate::FieldReader; #[doc = "Field `CMD_INDEX` writer - Command index to be issued"] -pub type CMD_INDEX_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type CMD_INDEX_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bit 1 - Enable block counter"] #[inline(always)] @@ -459,69 +458,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Enable block counter"] #[inline(always)] #[must_use] - pub fn tm_blkcnt_en(&mut self) -> TM_BLKCNT_EN_W { - TM_BLKCNT_EN_W::new(self) + pub fn tm_blkcnt_en(&mut self) -> TM_BLKCNT_EN_W { + TM_BLKCNT_EN_W::new(self, 1) } #[doc = "Bits 2:3 - Command after completion"] #[inline(always)] #[must_use] - pub fn tm_auto_cmd_en(&mut self) -> TM_AUTO_CMD_EN_W { - TM_AUTO_CMD_EN_W::new(self) + pub fn tm_auto_cmd_en(&mut self) -> TM_AUTO_CMD_EN_W { + TM_AUTO_CMD_EN_W::new(self, 2) } #[doc = "Bit 4 - Direction of data transfer"] #[inline(always)] #[must_use] - pub fn tm_dat_dir(&mut self) -> TM_DAT_DIR_W { - TM_DAT_DIR_W::new(self) + pub fn tm_dat_dir(&mut self) -> TM_DAT_DIR_W { + TM_DAT_DIR_W::new(self, 4) } #[doc = "Bit 5 - Type of data transfer"] #[inline(always)] #[must_use] - pub fn tm_multi_block(&mut self) -> TM_MULTI_BLOCK_W { - TM_MULTI_BLOCK_W::new(self) + pub fn tm_multi_block(&mut self) -> TM_MULTI_BLOCK_W { + TM_MULTI_BLOCK_W::new(self, 5) } #[doc = "Bits 16:17 - Type of expected response"] #[inline(always)] #[must_use] - pub fn cmd_rspns_type(&mut self) -> CMD_RSPNS_TYPE_W { - CMD_RSPNS_TYPE_W::new(self) + pub fn cmd_rspns_type(&mut self) -> CMD_RSPNS_TYPE_W { + CMD_RSPNS_TYPE_W::new(self, 16) } #[doc = "Bit 19 - Check the responses CRC"] #[inline(always)] #[must_use] - pub fn cmd_crcchk_en(&mut self) -> CMD_CRCCHK_EN_W { - CMD_CRCCHK_EN_W::new(self) + pub fn cmd_crcchk_en(&mut self) -> CMD_CRCCHK_EN_W { + CMD_CRCCHK_EN_W::new(self, 19) } #[doc = "Bit 20 - Check that the response has the same command index"] #[inline(always)] #[must_use] - pub fn cmd_ixchk_en(&mut self) -> CMD_IXCHK_EN_W { - CMD_IXCHK_EN_W::new(self) + pub fn cmd_ixchk_en(&mut self) -> CMD_IXCHK_EN_W { + CMD_IXCHK_EN_W::new(self, 20) } #[doc = "Bit 21 - Command involves data"] #[inline(always)] #[must_use] - pub fn cmd_isdata(&mut self) -> CMD_ISDATA_W { - CMD_ISDATA_W::new(self) + pub fn cmd_isdata(&mut self) -> CMD_ISDATA_W { + CMD_ISDATA_W::new(self, 21) } #[doc = "Bits 22:23 - Type of command to be issued"] #[inline(always)] #[must_use] - pub fn cmd_type(&mut self) -> CMD_TYPE_W { - CMD_TYPE_W::new(self) + pub fn cmd_type(&mut self) -> CMD_TYPE_W { + CMD_TYPE_W::new(self, 22) } #[doc = "Bits 24:29 - Command index to be issued"] #[inline(always)] #[must_use] - pub fn cmd_index(&mut self) -> CMD_INDEX_W { - CMD_INDEX_W::new(self) + pub fn cmd_index(&mut self) -> CMD_INDEX_W { + CMD_INDEX_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/control0.rs b/crates/bcm2837-lpa/src/emmc/control0.rs index 47fb08f..bb95bf4 100644 --- a/crates/bcm2837-lpa/src/emmc/control0.rs +++ b/crates/bcm2837-lpa/src/emmc/control0.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `HCTL_DWIDTH` reader - Use 4 data lines"] pub type HCTL_DWIDTH_R = crate::BitReader; #[doc = "Field `HCTL_DWIDTH` writer - Use 4 data lines"] -pub type HCTL_DWIDTH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_DWIDTH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HCTL_HS_EN` reader - Enable high speed mode"] pub type HCTL_HS_EN_R = crate::BitReader; #[doc = "Field `HCTL_HS_EN` writer - Enable high speed mode"] -pub type HCTL_HS_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_HS_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HCTL_8BIT` reader - Use 8 data lines"] pub type HCTL_8BIT_R = crate::BitReader; #[doc = "Field `HCTL_8BIT` writer - Use 8 data lines"] -pub type HCTL_8BIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCTL_8BIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_STOP` reader - Stop the current transaction at the next block gap"] pub type GAP_STOP_R = crate::BitReader; #[doc = "Field `GAP_STOP` writer - Stop the current transaction at the next block gap"] -pub type GAP_STOP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_STOP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_RESTART` reader - Restart a transaction stopped by GAP_STOP"] pub type GAP_RESTART_R = crate::BitReader; #[doc = "Field `GAP_RESTART` writer - Restart a transaction stopped by GAP_STOP"] -pub type GAP_RESTART_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_RESTART_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READWAIT_EN` reader - Use DAT2 read/wait protocol"] pub type READWAIT_EN_R = crate::BitReader; #[doc = "Field `READWAIT_EN` writer - Use DAT2 read/wait protocol"] -pub type READWAIT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READWAIT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAP_IEN` reader - Enable interrupt on block gap"] pub type GAP_IEN_R = crate::BitReader; #[doc = "Field `GAP_IEN` writer - Enable interrupt on block gap"] -pub type GAP_IEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAP_IEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI_MODE` reader - Enable SPI mode"] pub type SPI_MODE_R = crate::BitReader; #[doc = "Field `SPI_MODE` writer - Enable SPI mode"] -pub type SPI_MODE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPI_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOT_EN` reader - Boot mode enabled"] pub type BOOT_EN_R = crate::BitReader; #[doc = "Field `BOOT_EN` writer - Boot mode enabled"] -pub type BOOT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ALT_BOOT_EN` reader - Enable alternate boot mode"] pub type ALT_BOOT_EN_R = crate::BitReader; #[doc = "Field `ALT_BOOT_EN` writer - Enable alternate boot mode"] -pub type ALT_BOOT_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ALT_BOOT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Use 4 data lines"] #[inline(always)] @@ -112,69 +112,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Use 4 data lines"] #[inline(always)] #[must_use] - pub fn hctl_dwidth(&mut self) -> HCTL_DWIDTH_W { - HCTL_DWIDTH_W::new(self) + pub fn hctl_dwidth(&mut self) -> HCTL_DWIDTH_W { + HCTL_DWIDTH_W::new(self, 1) } #[doc = "Bit 2 - Enable high speed mode"] #[inline(always)] #[must_use] - pub fn hctl_hs_en(&mut self) -> HCTL_HS_EN_W { - HCTL_HS_EN_W::new(self) + pub fn hctl_hs_en(&mut self) -> HCTL_HS_EN_W { + HCTL_HS_EN_W::new(self, 2) } #[doc = "Bit 5 - Use 8 data lines"] #[inline(always)] #[must_use] - pub fn hctl_8bit(&mut self) -> HCTL_8BIT_W { - HCTL_8BIT_W::new(self) + pub fn hctl_8bit(&mut self) -> HCTL_8BIT_W { + HCTL_8BIT_W::new(self, 5) } #[doc = "Bit 16 - Stop the current transaction at the next block gap"] #[inline(always)] #[must_use] - pub fn gap_stop(&mut self) -> GAP_STOP_W { - GAP_STOP_W::new(self) + pub fn gap_stop(&mut self) -> GAP_STOP_W { + GAP_STOP_W::new(self, 16) } #[doc = "Bit 17 - Restart a transaction stopped by GAP_STOP"] #[inline(always)] #[must_use] - pub fn gap_restart(&mut self) -> GAP_RESTART_W { - GAP_RESTART_W::new(self) + pub fn gap_restart(&mut self) -> GAP_RESTART_W { + GAP_RESTART_W::new(self, 17) } #[doc = "Bit 18 - Use DAT2 read/wait protocol"] #[inline(always)] #[must_use] - pub fn readwait_en(&mut self) -> READWAIT_EN_W { - READWAIT_EN_W::new(self) + pub fn readwait_en(&mut self) -> READWAIT_EN_W { + READWAIT_EN_W::new(self, 18) } #[doc = "Bit 19 - Enable interrupt on block gap"] #[inline(always)] #[must_use] - pub fn gap_ien(&mut self) -> GAP_IEN_W { - GAP_IEN_W::new(self) + pub fn gap_ien(&mut self) -> GAP_IEN_W { + GAP_IEN_W::new(self, 19) } #[doc = "Bit 20 - Enable SPI mode"] #[inline(always)] #[must_use] - pub fn spi_mode(&mut self) -> SPI_MODE_W { - SPI_MODE_W::new(self) + pub fn spi_mode(&mut self) -> SPI_MODE_W { + SPI_MODE_W::new(self, 20) } #[doc = "Bit 21 - Boot mode enabled"] #[inline(always)] #[must_use] - pub fn boot_en(&mut self) -> BOOT_EN_W { - BOOT_EN_W::new(self) + pub fn boot_en(&mut self) -> BOOT_EN_W { + BOOT_EN_W::new(self, 21) } #[doc = "Bit 22 - Enable alternate boot mode"] #[inline(always)] #[must_use] - pub fn alt_boot_en(&mut self) -> ALT_BOOT_EN_W { - ALT_BOOT_EN_W::new(self) + pub fn alt_boot_en(&mut self) -> ALT_BOOT_EN_W { + ALT_BOOT_EN_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/control1.rs b/crates/bcm2837-lpa/src/emmc/control1.rs index 40a8765..2171ae4 100644 --- a/crates/bcm2837-lpa/src/emmc/control1.rs +++ b/crates/bcm2837-lpa/src/emmc/control1.rs @@ -5,13 +5,13 @@ pub type W = crate::W; #[doc = "Field `CLK_INTLEN` reader - Enable internal clock"] pub type CLK_INTLEN_R = crate::BitReader; #[doc = "Field `CLK_INTLEN` writer - Enable internal clock"] -pub type CLK_INTLEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLK_INTLEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLK_STABLE` reader - SD Clock stable"] pub type CLK_STABLE_R = crate::BitReader; #[doc = "Field `CLK_EN` reader - SD Clock enable"] pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - SD Clock enable"] -pub type CLK_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLK_GENSEL` reader - Mode of clock generation"] pub type CLK_GENSEL_R = crate::BitReader; #[doc = "Mode of clock generation\n\nValue on reset: 0"] @@ -49,8 +49,8 @@ impl CLK_GENSEL_R { } } #[doc = "Field `CLK_GENSEL` writer - Mode of clock generation"] -pub type CLK_GENSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, CLK_GENSEL_A>; -impl<'a, REG, const O: u8> CLK_GENSEL_W<'a, REG, O> +pub type CLK_GENSEL_W<'a, REG> = crate::BitWriter<'a, REG, CLK_GENSEL_A>; +impl<'a, REG> CLK_GENSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -68,27 +68,27 @@ where #[doc = "Field `CLK_FREQ_MS2` reader - Clock base divider MSBs"] pub type CLK_FREQ_MS2_R = crate::FieldReader; #[doc = "Field `CLK_FREQ_MS2` writer - Clock base divider MSBs"] -pub type CLK_FREQ_MS2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CLK_FREQ_MS2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CLK_FREQ8` reader - Clock base divider LSB"] pub type CLK_FREQ8_R = crate::FieldReader; #[doc = "Field `CLK_FREQ8` writer - Clock base divider LSB"] -pub type CLK_FREQ8_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type CLK_FREQ8_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DATA_TOUNIT` reader - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] pub type DATA_TOUNIT_R = crate::FieldReader; #[doc = "Field `DATA_TOUNIT` writer - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] -pub type DATA_TOUNIT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DATA_TOUNIT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SRST_HC` reader - Reset the complete host circuit"] pub type SRST_HC_R = crate::BitReader; #[doc = "Field `SRST_HC` writer - Reset the complete host circuit"] -pub type SRST_HC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_HC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRST_CMD` reader - Reset the command handling circuit"] pub type SRST_CMD_R = crate::BitReader; #[doc = "Field `SRST_CMD` writer - Reset the command handling circuit"] -pub type SRST_CMD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_CMD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRST_DATA` reader - Reset the data handling circuit"] pub type SRST_DATA_R = crate::BitReader; #[doc = "Field `SRST_DATA` writer - Reset the data handling circuit"] -pub type SRST_DATA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRST_DATA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable internal clock"] #[inline(always)] @@ -165,63 +165,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable internal clock"] #[inline(always)] #[must_use] - pub fn clk_intlen(&mut self) -> CLK_INTLEN_W { - CLK_INTLEN_W::new(self) + pub fn clk_intlen(&mut self) -> CLK_INTLEN_W { + CLK_INTLEN_W::new(self, 0) } #[doc = "Bit 2 - SD Clock enable"] #[inline(always)] #[must_use] - pub fn clk_en(&mut self) -> CLK_EN_W { - CLK_EN_W::new(self) + pub fn clk_en(&mut self) -> CLK_EN_W { + CLK_EN_W::new(self, 2) } #[doc = "Bit 5 - Mode of clock generation"] #[inline(always)] #[must_use] - pub fn clk_gensel(&mut self) -> CLK_GENSEL_W { - CLK_GENSEL_W::new(self) + pub fn clk_gensel(&mut self) -> CLK_GENSEL_W { + CLK_GENSEL_W::new(self, 5) } #[doc = "Bits 6:7 - Clock base divider MSBs"] #[inline(always)] #[must_use] - pub fn clk_freq_ms2(&mut self) -> CLK_FREQ_MS2_W { - CLK_FREQ_MS2_W::new(self) + pub fn clk_freq_ms2(&mut self) -> CLK_FREQ_MS2_W { + CLK_FREQ_MS2_W::new(self, 6) } #[doc = "Bits 8:15 - Clock base divider LSB"] #[inline(always)] #[must_use] - pub fn clk_freq8(&mut self) -> CLK_FREQ8_W { - CLK_FREQ8_W::new(self) + pub fn clk_freq8(&mut self) -> CLK_FREQ8_W { + CLK_FREQ8_W::new(self, 8) } #[doc = "Bits 16:19 - Data timeout exponent (TMCLK * 2 ** (x + 13)) 1111 disabled"] #[inline(always)] #[must_use] - pub fn data_tounit(&mut self) -> DATA_TOUNIT_W { - DATA_TOUNIT_W::new(self) + pub fn data_tounit(&mut self) -> DATA_TOUNIT_W { + DATA_TOUNIT_W::new(self, 16) } #[doc = "Bit 24 - Reset the complete host circuit"] #[inline(always)] #[must_use] - pub fn srst_hc(&mut self) -> SRST_HC_W { - SRST_HC_W::new(self) + pub fn srst_hc(&mut self) -> SRST_HC_W { + SRST_HC_W::new(self, 24) } #[doc = "Bit 25 - Reset the command handling circuit"] #[inline(always)] #[must_use] - pub fn srst_cmd(&mut self) -> SRST_CMD_W { - SRST_CMD_W::new(self) + pub fn srst_cmd(&mut self) -> SRST_CMD_W { + SRST_CMD_W::new(self, 25) } #[doc = "Bit 26 - Reset the data handling circuit"] #[inline(always)] #[must_use] - pub fn srst_data(&mut self) -> SRST_DATA_W { - SRST_DATA_W::new(self) + pub fn srst_data(&mut self) -> SRST_DATA_W { + SRST_DATA_W::new(self, 26) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/control2.rs b/crates/bcm2837-lpa/src/emmc/control2.rs index bb052fc..0e5ab02 100644 --- a/crates/bcm2837-lpa/src/emmc/control2.rs +++ b/crates/bcm2837-lpa/src/emmc/control2.rs @@ -80,8 +80,8 @@ impl UHSMODE_R { } } #[doc = "Field `UHSMODE` writer - Select the speed of the SD card"] -pub type UHSMODE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O, UHSMODE_A>; -impl<'a, REG, const O: u8> UHSMODE_W<'a, REG, O> +pub type UHSMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, UHSMODE_A>; +impl<'a, REG> UHSMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -115,11 +115,11 @@ where #[doc = "Field `TUNEON` reader - SD Clock tune in progress"] pub type TUNEON_R = crate::BitReader; #[doc = "Field `TUNEON` writer - SD Clock tune in progress"] -pub type TUNEON_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TUNEON_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TUNED` reader - Tuned clock is used for sampling data"] pub type TUNED_R = crate::BitReader; #[doc = "Field `TUNED` writer - Tuned clock is used for sampling data"] -pub type TUNED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TUNED_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Auto command not executed due to an error"] #[inline(always)] @@ -184,27 +184,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 16:18 - Select the speed of the SD card"] #[inline(always)] #[must_use] - pub fn uhsmode(&mut self) -> UHSMODE_W { - UHSMODE_W::new(self) + pub fn uhsmode(&mut self) -> UHSMODE_W { + UHSMODE_W::new(self, 16) } #[doc = "Bit 22 - SD Clock tune in progress"] #[inline(always)] #[must_use] - pub fn tuneon(&mut self) -> TUNEON_W { - TUNEON_W::new(self) + pub fn tuneon(&mut self) -> TUNEON_W { + TUNEON_W::new(self, 22) } #[doc = "Bit 23 - Tuned clock is used for sampling data"] #[inline(always)] #[must_use] - pub fn tuned(&mut self) -> TUNED_W { - TUNED_W::new(self) + pub fn tuned(&mut self) -> TUNED_W { + TUNED_W::new(self, 23) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/data.rs b/crates/bcm2837-lpa/src/emmc/data.rs index ac2280f..2f5aef2 100644 --- a/crates/bcm2837-lpa/src/emmc/data.rs +++ b/crates/bcm2837-lpa/src/emmc/data.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/dbg_sel.rs b/crates/bcm2837-lpa/src/emmc/dbg_sel.rs index 343a4db..a308d75 100644 --- a/crates/bcm2837-lpa/src/emmc/dbg_sel.rs +++ b/crates/bcm2837-lpa/src/emmc/dbg_sel.rs @@ -39,8 +39,8 @@ impl SELECT_R { } } #[doc = "Field `SELECT` writer - "] -pub type SELECT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SELECT_A>; -impl<'a, REG, const O: u8> SELECT_W<'a, REG, O> +pub type SELECT_W<'a, REG> = crate::BitWriter<'a, REG, SELECT_A>; +impl<'a, REG> SELECT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -71,15 +71,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0"] #[inline(always)] #[must_use] - pub fn select(&mut self) -> SELECT_W { - SELECT_W::new(self) + pub fn select(&mut self) -> SELECT_W { + SELECT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/exrdfifo_cfg.rs b/crates/bcm2837-lpa/src/emmc/exrdfifo_cfg.rs index 13440a1..ba96a18 100644 --- a/crates/bcm2837-lpa/src/emmc/exrdfifo_cfg.rs +++ b/crates/bcm2837-lpa/src/emmc/exrdfifo_cfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RD_THRSH` reader - Read threshold in 32 bit words"] pub type RD_THRSH_R = crate::FieldReader; #[doc = "Field `RD_THRSH` writer - Read threshold in 32 bit words"] -pub type RD_THRSH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type RD_THRSH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Read threshold in 32 bit words"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Read threshold in 32 bit words"] #[inline(always)] #[must_use] - pub fn rd_thrsh(&mut self) -> RD_THRSH_W { - RD_THRSH_W::new(self) + pub fn rd_thrsh(&mut self) -> RD_THRSH_W { + RD_THRSH_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/exrdfifo_en.rs b/crates/bcm2837-lpa/src/emmc/exrdfifo_en.rs index e6b6583..464a5fe 100644 --- a/crates/bcm2837-lpa/src/emmc/exrdfifo_en.rs +++ b/crates/bcm2837-lpa/src/emmc/exrdfifo_en.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `ENABLE` reader - Enable the extension FIFO"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable the extension FIFO"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable the extension FIFO"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable the extension FIFO"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/force_irpt.rs b/crates/bcm2837-lpa/src/emmc/force_irpt.rs index 682b8fe..2404f46 100644 --- a/crates/bcm2837-lpa/src/emmc/force_irpt.rs +++ b/crates/bcm2837-lpa/src/emmc/force_irpt.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/interrupt.rs b/crates/bcm2837-lpa/src/emmc/interrupt.rs index c28598f..46231a7 100644 --- a/crates/bcm2837-lpa/src/emmc/interrupt.rs +++ b/crates/bcm2837-lpa/src/emmc/interrupt.rs @@ -5,73 +5,73 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERR` reader - An error has occured"] pub type ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -190,111 +190,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/irpt_en.rs b/crates/bcm2837-lpa/src/emmc/irpt_en.rs index af7bc80..143dd3b 100644 --- a/crates/bcm2837-lpa/src/emmc/irpt_en.rs +++ b/crates/bcm2837-lpa/src/emmc/irpt_en.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/irpt_mask.rs b/crates/bcm2837-lpa/src/emmc/irpt_mask.rs index e8dc746..e3281ca 100644 --- a/crates/bcm2837-lpa/src/emmc/irpt_mask.rs +++ b/crates/bcm2837-lpa/src/emmc/irpt_mask.rs @@ -5,71 +5,71 @@ pub type W = crate::W; #[doc = "Field `CMD_DONE` reader - Command has finished"] pub type CMD_DONE_R = crate::BitReader; #[doc = "Field `CMD_DONE` writer - Command has finished"] -pub type CMD_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_DONE` reader - Data transfer has finished"] pub type DATA_DONE_R = crate::BitReader; #[doc = "Field `DATA_DONE` writer - Data transfer has finished"] -pub type DATA_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"] pub type BLOCK_GAP_R = crate::BitReader; #[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"] -pub type BLOCK_GAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_RDY` reader - DATA can be written to"] pub type WRITE_RDY_R = crate::BitReader; #[doc = "Field `WRITE_RDY` writer - DATA can be written to"] -pub type WRITE_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_RDY` reader - DATA contains data to be read"] pub type READ_RDY_R = crate::BitReader; #[doc = "Field `READ_RDY` writer - DATA contains data to be read"] -pub type READ_RDY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CARD` reader - Card made interrupt request"] pub type CARD_R = crate::BitReader; #[doc = "Field `CARD` writer - Card made interrupt request"] -pub type CARD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RETUNE` reader - Clock retune request"] pub type RETUNE_R = crate::BitReader; #[doc = "Field `RETUNE` writer - Clock retune request"] -pub type RETUNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOOTACK` reader - Boot has been acknowledged"] pub type BOOTACK_R = crate::BitReader; #[doc = "Field `BOOTACK` writer - Boot has been acknowledged"] -pub type BOOTACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDBOOT` reader - Boot operation has terminated"] pub type ENDBOOT_R = crate::BitReader; #[doc = "Field `ENDBOOT` writer - Boot operation has terminated"] -pub type ENDBOOT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO_ERR` reader - Command timeout"] pub type CTO_ERR_R = crate::BitReader; #[doc = "Field `CTO_ERR` writer - Command timeout"] -pub type CTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRC_ERR` reader - Command CRC error"] pub type CCRC_ERR_R = crate::BitReader; #[doc = "Field `CCRC_ERR` writer - Command CRC error"] -pub type CCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"] pub type CEND_ERR_R = crate::BitReader; #[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"] -pub type CEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CBAD_ERR` reader - Incorrect response command index"] pub type CBAD_ERR_R = crate::BitReader; #[doc = "Field `CBAD_ERR` writer - Incorrect response command index"] -pub type CBAD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTO_ERR` reader - Data timeout"] pub type DTO_ERR_R = crate::BitReader; #[doc = "Field `DTO_ERR` writer - Data timeout"] -pub type DTO_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRC_ERR` reader - Data CRC error"] pub type DCRC_ERR_R = crate::BitReader; #[doc = "Field `DCRC_ERR` writer - Data CRC error"] -pub type DCRC_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"] pub type DEND_ERR_R = crate::BitReader; #[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"] -pub type DEND_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMD_ERR` reader - Auto command error"] pub type ACMD_ERR_R = crate::BitReader; #[doc = "Field `ACMD_ERR` writer - Auto command error"] -pub type ACMD_ERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Command has finished"] #[inline(always)] @@ -182,111 +182,111 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command has finished"] #[inline(always)] #[must_use] - pub fn cmd_done(&mut self) -> CMD_DONE_W { - CMD_DONE_W::new(self) + pub fn cmd_done(&mut self) -> CMD_DONE_W { + CMD_DONE_W::new(self, 0) } #[doc = "Bit 1 - Data transfer has finished"] #[inline(always)] #[must_use] - pub fn data_done(&mut self) -> DATA_DONE_W { - DATA_DONE_W::new(self) + pub fn data_done(&mut self) -> DATA_DONE_W { + DATA_DONE_W::new(self, 1) } #[doc = "Bit 2 - Data transfer has stopped at block gap"] #[inline(always)] #[must_use] - pub fn block_gap(&mut self) -> BLOCK_GAP_W { - BLOCK_GAP_W::new(self) + pub fn block_gap(&mut self) -> BLOCK_GAP_W { + BLOCK_GAP_W::new(self, 2) } #[doc = "Bit 4 - DATA can be written to"] #[inline(always)] #[must_use] - pub fn write_rdy(&mut self) -> WRITE_RDY_W { - WRITE_RDY_W::new(self) + pub fn write_rdy(&mut self) -> WRITE_RDY_W { + WRITE_RDY_W::new(self, 4) } #[doc = "Bit 5 - DATA contains data to be read"] #[inline(always)] #[must_use] - pub fn read_rdy(&mut self) -> READ_RDY_W { - READ_RDY_W::new(self) + pub fn read_rdy(&mut self) -> READ_RDY_W { + READ_RDY_W::new(self, 5) } #[doc = "Bit 8 - Card made interrupt request"] #[inline(always)] #[must_use] - pub fn card(&mut self) -> CARD_W { - CARD_W::new(self) + pub fn card(&mut self) -> CARD_W { + CARD_W::new(self, 8) } #[doc = "Bit 12 - Clock retune request"] #[inline(always)] #[must_use] - pub fn retune(&mut self) -> RETUNE_W { - RETUNE_W::new(self) + pub fn retune(&mut self) -> RETUNE_W { + RETUNE_W::new(self, 12) } #[doc = "Bit 13 - Boot has been acknowledged"] #[inline(always)] #[must_use] - pub fn bootack(&mut self) -> BOOTACK_W { - BOOTACK_W::new(self) + pub fn bootack(&mut self) -> BOOTACK_W { + BOOTACK_W::new(self, 13) } #[doc = "Bit 14 - Boot operation has terminated"] #[inline(always)] #[must_use] - pub fn endboot(&mut self) -> ENDBOOT_W { - ENDBOOT_W::new(self) + pub fn endboot(&mut self) -> ENDBOOT_W { + ENDBOOT_W::new(self, 14) } #[doc = "Bit 16 - Command timeout"] #[inline(always)] #[must_use] - pub fn cto_err(&mut self) -> CTO_ERR_W { - CTO_ERR_W::new(self) + pub fn cto_err(&mut self) -> CTO_ERR_W { + CTO_ERR_W::new(self, 16) } #[doc = "Bit 17 - Command CRC error"] #[inline(always)] #[must_use] - pub fn ccrc_err(&mut self) -> CCRC_ERR_W { - CCRC_ERR_W::new(self) + pub fn ccrc_err(&mut self) -> CCRC_ERR_W { + CCRC_ERR_W::new(self, 17) } #[doc = "Bit 18 - Command end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn cend_err(&mut self) -> CEND_ERR_W { - CEND_ERR_W::new(self) + pub fn cend_err(&mut self) -> CEND_ERR_W { + CEND_ERR_W::new(self, 18) } #[doc = "Bit 19 - Incorrect response command index"] #[inline(always)] #[must_use] - pub fn cbad_err(&mut self) -> CBAD_ERR_W { - CBAD_ERR_W::new(self) + pub fn cbad_err(&mut self) -> CBAD_ERR_W { + CBAD_ERR_W::new(self, 19) } #[doc = "Bit 20 - Data timeout"] #[inline(always)] #[must_use] - pub fn dto_err(&mut self) -> DTO_ERR_W { - DTO_ERR_W::new(self) + pub fn dto_err(&mut self) -> DTO_ERR_W { + DTO_ERR_W::new(self, 20) } #[doc = "Bit 21 - Data CRC error"] #[inline(always)] #[must_use] - pub fn dcrc_err(&mut self) -> DCRC_ERR_W { - DCRC_ERR_W::new(self) + pub fn dcrc_err(&mut self) -> DCRC_ERR_W { + DCRC_ERR_W::new(self, 21) } #[doc = "Bit 22 - Data end bit error (not 1)"] #[inline(always)] #[must_use] - pub fn dend_err(&mut self) -> DEND_ERR_W { - DEND_ERR_W::new(self) + pub fn dend_err(&mut self) -> DEND_ERR_W { + DEND_ERR_W::new(self, 22) } #[doc = "Bit 24 - Auto command error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self) + pub fn acmd_err(&mut self) -> ACMD_ERR_W { + ACMD_ERR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/resp0.rs b/crates/bcm2837-lpa/src/emmc/resp0.rs index 79ea5ca..e14de29 100644 --- a/crates/bcm2837-lpa/src/emmc/resp0.rs +++ b/crates/bcm2837-lpa/src/emmc/resp0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/resp1.rs b/crates/bcm2837-lpa/src/emmc/resp1.rs index 12a2f9a..9c6a866 100644 --- a/crates/bcm2837-lpa/src/emmc/resp1.rs +++ b/crates/bcm2837-lpa/src/emmc/resp1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/resp2.rs b/crates/bcm2837-lpa/src/emmc/resp2.rs index 5a51d34..273382e 100644 --- a/crates/bcm2837-lpa/src/emmc/resp2.rs +++ b/crates/bcm2837-lpa/src/emmc/resp2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/resp3.rs b/crates/bcm2837-lpa/src/emmc/resp3.rs index 65ef18f..3f290da 100644 --- a/crates/bcm2837-lpa/src/emmc/resp3.rs +++ b/crates/bcm2837-lpa/src/emmc/resp3.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/emmc/slotisr_ver.rs b/crates/bcm2837-lpa/src/emmc/slotisr_ver.rs index 0db90df..eb34fd8 100644 --- a/crates/bcm2837-lpa/src/emmc/slotisr_ver.rs +++ b/crates/bcm2837-lpa/src/emmc/slotisr_ver.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `SLOT_STATUS` reader - OR of interrupt and wakeup signals for each slot"] pub type SLOT_STATUS_R = crate::FieldReader; #[doc = "Field `SLOT_STATUS` writer - OR of interrupt and wakeup signals for each slot"] -pub type SLOT_STATUS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SLOT_STATUS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SDVERSION` reader - Host controller specification version"] pub type SDVERSION_R = crate::FieldReader; #[doc = "Field `SDVERSION` writer - Host controller specification version"] -pub type SDVERSION_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SDVERSION_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `VENDOR` reader - Vendor version number"] pub type VENDOR_R = crate::FieldReader; #[doc = "Field `VENDOR` writer - Vendor version number"] -pub type VENDOR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type VENDOR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - OR of interrupt and wakeup signals for each slot"] #[inline(always)] @@ -45,27 +45,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - OR of interrupt and wakeup signals for each slot"] #[inline(always)] #[must_use] - pub fn slot_status(&mut self) -> SLOT_STATUS_W { - SLOT_STATUS_W::new(self) + pub fn slot_status(&mut self) -> SLOT_STATUS_W { + SLOT_STATUS_W::new(self, 0) } #[doc = "Bits 16:23 - Host controller specification version"] #[inline(always)] #[must_use] - pub fn sdversion(&mut self) -> SDVERSION_W { - SDVERSION_W::new(self) + pub fn sdversion(&mut self) -> SDVERSION_W { + SDVERSION_W::new(self, 16) } #[doc = "Bits 24:31 - Vendor version number"] #[inline(always)] #[must_use] - pub fn vendor(&mut self) -> VENDOR_W { - VENDOR_W::new(self) + pub fn vendor(&mut self) -> VENDOR_W { + VENDOR_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/spi_int_spt.rs b/crates/bcm2837-lpa/src/emmc/spi_int_spt.rs index ba304fe..7c4c0ae 100644 --- a/crates/bcm2837-lpa/src/emmc/spi_int_spt.rs +++ b/crates/bcm2837-lpa/src/emmc/spi_int_spt.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `SELECT` reader - "] pub type SELECT_R = crate::FieldReader; #[doc = "Field `SELECT` writer - "] -pub type SELECT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type SELECT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7"] #[inline(always)] #[must_use] - pub fn select(&mut self) -> SELECT_W { - SELECT_W::new(self) + pub fn select(&mut self) -> SELECT_W { + SELECT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/status.rs b/crates/bcm2837-lpa/src/emmc/status.rs index 2b07e21..c4dbd6d 100644 --- a/crates/bcm2837-lpa/src/emmc/status.rs +++ b/crates/bcm2837-lpa/src/emmc/status.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `CMD_INHIBIT` reader - Command line still in use"] pub type CMD_INHIBIT_R = crate::BitReader; #[doc = "Field `CMD_INHIBIT` writer - Command line still in use"] -pub type CMD_INHIBIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_INHIBIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_INHIBIT` reader - Data lines still in use"] pub type DAT_INHIBIT_R = crate::BitReader; #[doc = "Field `DAT_INHIBIT` writer - Data lines still in use"] -pub type DAT_INHIBIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DAT_INHIBIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_ACTIVE` reader - At least one data line is active"] pub type DAT_ACTIVE_R = crate::BitReader; #[doc = "Field `DAT_ACTIVE` writer - At least one data line is active"] -pub type DAT_ACTIVE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DAT_ACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE_TRANSFER` reader - Write transfer is active"] pub type WRITE_TRANSFER_R = crate::BitReader; #[doc = "Field `WRITE_TRANSFER` writer - Write transfer is active"] -pub type WRITE_TRANSFER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WRITE_TRANSFER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `READ_TRANSFER` reader - Read transfer is active"] pub type READ_TRANSFER_R = crate::BitReader; #[doc = "Field `READ_TRANSFER` writer - Read transfer is active"] -pub type READ_TRANSFER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type READ_TRANSFER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFFER_WRITE_ENABLE` reader - The buffer has space for new data"] pub type BUFFER_WRITE_ENABLE_R = crate::BitReader; #[doc = "Field `BUFFER_WRITE_ENABLE` writer - The buffer has space for new data"] -pub type BUFFER_WRITE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUFFER_WRITE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFFER_READ_ENABLE` reader - New data is available to read"] pub type BUFFER_READ_ENABLE_R = crate::BitReader; #[doc = "Field `BUFFER_READ_ENABLE` writer - New data is available to read"] -pub type BUFFER_READ_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUFFER_READ_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_LEVEL0` reader - Value of DAT\\[3:0\\]"] pub type DAT_LEVEL0_R = crate::FieldReader; #[doc = "Field `DAT_LEVEL0` writer - Value of DAT\\[3:0\\]"] -pub type DAT_LEVEL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DAT_LEVEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CMD_LEVEL` reader - Value of CMD"] pub type CMD_LEVEL_R = crate::BitReader; #[doc = "Field `CMD_LEVEL` writer - Value of CMD"] -pub type CMD_LEVEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CMD_LEVEL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAT_LEVEL1` reader - Value of DAT\\[7:4\\]"] pub type DAT_LEVEL1_R = crate::FieldReader; #[doc = "Field `DAT_LEVEL1` writer - Value of DAT\\[7:4\\]"] -pub type DAT_LEVEL1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type DAT_LEVEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Command line still in use"] #[inline(always)] @@ -124,69 +124,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Command line still in use"] #[inline(always)] #[must_use] - pub fn cmd_inhibit(&mut self) -> CMD_INHIBIT_W { - CMD_INHIBIT_W::new(self) + pub fn cmd_inhibit(&mut self) -> CMD_INHIBIT_W { + CMD_INHIBIT_W::new(self, 0) } #[doc = "Bit 1 - Data lines still in use"] #[inline(always)] #[must_use] - pub fn dat_inhibit(&mut self) -> DAT_INHIBIT_W { - DAT_INHIBIT_W::new(self) + pub fn dat_inhibit(&mut self) -> DAT_INHIBIT_W { + DAT_INHIBIT_W::new(self, 1) } #[doc = "Bit 2 - At least one data line is active"] #[inline(always)] #[must_use] - pub fn dat_active(&mut self) -> DAT_ACTIVE_W { - DAT_ACTIVE_W::new(self) + pub fn dat_active(&mut self) -> DAT_ACTIVE_W { + DAT_ACTIVE_W::new(self, 2) } #[doc = "Bit 8 - Write transfer is active"] #[inline(always)] #[must_use] - pub fn write_transfer(&mut self) -> WRITE_TRANSFER_W { - WRITE_TRANSFER_W::new(self) + pub fn write_transfer(&mut self) -> WRITE_TRANSFER_W { + WRITE_TRANSFER_W::new(self, 8) } #[doc = "Bit 9 - Read transfer is active"] #[inline(always)] #[must_use] - pub fn read_transfer(&mut self) -> READ_TRANSFER_W { - READ_TRANSFER_W::new(self) + pub fn read_transfer(&mut self) -> READ_TRANSFER_W { + READ_TRANSFER_W::new(self, 9) } #[doc = "Bit 10 - The buffer has space for new data"] #[inline(always)] #[must_use] - pub fn buffer_write_enable(&mut self) -> BUFFER_WRITE_ENABLE_W { - BUFFER_WRITE_ENABLE_W::new(self) + pub fn buffer_write_enable(&mut self) -> BUFFER_WRITE_ENABLE_W { + BUFFER_WRITE_ENABLE_W::new(self, 10) } #[doc = "Bit 11 - New data is available to read"] #[inline(always)] #[must_use] - pub fn buffer_read_enable(&mut self) -> BUFFER_READ_ENABLE_W { - BUFFER_READ_ENABLE_W::new(self) + pub fn buffer_read_enable(&mut self) -> BUFFER_READ_ENABLE_W { + BUFFER_READ_ENABLE_W::new(self, 11) } #[doc = "Bits 20:23 - Value of DAT\\[3:0\\]"] #[inline(always)] #[must_use] - pub fn dat_level0(&mut self) -> DAT_LEVEL0_W { - DAT_LEVEL0_W::new(self) + pub fn dat_level0(&mut self) -> DAT_LEVEL0_W { + DAT_LEVEL0_W::new(self, 20) } #[doc = "Bit 24 - Value of CMD"] #[inline(always)] #[must_use] - pub fn cmd_level(&mut self) -> CMD_LEVEL_W { - CMD_LEVEL_W::new(self) + pub fn cmd_level(&mut self) -> CMD_LEVEL_W { + CMD_LEVEL_W::new(self, 24) } #[doc = "Bits 25:28 - Value of DAT\\[7:4\\]"] #[inline(always)] #[must_use] - pub fn dat_level1(&mut self) -> DAT_LEVEL1_W { - DAT_LEVEL1_W::new(self) + pub fn dat_level1(&mut self) -> DAT_LEVEL1_W { + DAT_LEVEL1_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/tune_step.rs b/crates/bcm2837-lpa/src/emmc/tune_step.rs index aa0dd84..50aaa04 100644 --- a/crates/bcm2837-lpa/src/emmc/tune_step.rs +++ b/crates/bcm2837-lpa/src/emmc/tune_step.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DELAY` reader - "] pub type DELAY_R = crate::FieldReader; #[doc = "Field `DELAY` writer - "] -pub type DELAY_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2"] #[inline(always)] #[must_use] - pub fn delay(&mut self) -> DELAY_W { - DELAY_W::new(self) + pub fn delay(&mut self) -> DELAY_W { + DELAY_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/tune_steps_ddr.rs b/crates/bcm2837-lpa/src/emmc/tune_steps_ddr.rs index c4f1dd8..e1e156e 100644 --- a/crates/bcm2837-lpa/src/emmc/tune_steps_ddr.rs +++ b/crates/bcm2837-lpa/src/emmc/tune_steps_ddr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `STEPS` reader - "] pub type STEPS_R = crate::FieldReader; #[doc = "Field `STEPS` writer - "] -pub type STEPS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type STEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5"] #[inline(always)] #[must_use] - pub fn steps(&mut self) -> STEPS_W { - STEPS_W::new(self) + pub fn steps(&mut self) -> STEPS_W { + STEPS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/emmc/tune_steps_std.rs b/crates/bcm2837-lpa/src/emmc/tune_steps_std.rs index cf65897..6eb3de0 100644 --- a/crates/bcm2837-lpa/src/emmc/tune_steps_std.rs +++ b/crates/bcm2837-lpa/src/emmc/tune_steps_std.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `STEPS` reader - "] pub type STEPS_R = crate::FieldReader; #[doc = "Field `STEPS` writer - "] -pub type STEPS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type STEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5"] #[inline(always)] #[must_use] - pub fn steps(&mut self) -> STEPS_W { - STEPS_W::new(self) + pub fn steps(&mut self) -> STEPS_W { + STEPS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/generic.rs b/crates/bcm2837-lpa/src/generic.rs index a34573a..453ce21 100644 --- a/crates/bcm2837-lpa/src/generic.rs +++ b/crates/bcm2837-lpa/src/generic.rs @@ -316,12 +316,10 @@ pub struct Safe; #[doc(hidden)] pub struct Unsafe; #[doc = " Write field Proxy with unsafe `bits`"] -pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Unsafe>; +pub type FieldWriter<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Unsafe>; #[doc = " Write field Proxy with safe `bits`"] -pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Safe>; -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> +pub type FieldWriterSafe<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Safe>; +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -329,6 +327,16 @@ where { #[doc = " Field width"] pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes raw bits to the field"] #[doc = ""] #[doc = " # Safety"] @@ -336,8 +344,8 @@ where #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] #[inline(always)] pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -346,7 +354,7 @@ where unsafe { self.bits(FI::Ux::from(variant)) } } } -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> +impl<'a, REG, const WI: u8, FI> FieldWriterSafe<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -354,11 +362,21 @@ where { #[doc = " Field width"] pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -372,19 +390,29 @@ macro_rules! bit_proxy { #[doc(hidden)] pub struct $mwv; #[doc = " Bit-wise write field proxy"] - pub type $writer<'a, REG, const O: u8, FI = bool> = raw::BitWriter<'a, REG, O, FI, $mwv>; - impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> + pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>; + impl<'a, REG, FI> $writer<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, { #[doc = " Field width"] pub const WIDTH: u8 = 1; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + Self::WIDTH + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes bit to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF; + self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -402,7 +430,7 @@ bit_proxy!(BitWriter1C, Bit1C); bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -410,17 +438,17 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -428,11 +456,11 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -440,11 +468,11 @@ where #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -452,11 +480,11 @@ where #[doc = "Clears the field bit by passing one"] #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -464,11 +492,11 @@ where #[doc = "Sets the field bit by passing zero"] #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -476,11 +504,11 @@ where #[doc = "Toggle the field bit by passing one"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -488,7 +516,7 @@ where #[doc = "Toggle the field bit by passing zero"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } diff --git a/crates/bcm2837-lpa/src/generic/raw.rs b/crates/bcm2837-lpa/src/generic/raw.rs index 4ab1635..81f5779 100644 --- a/crates/bcm2837-lpa/src/generic/raw.rs +++ b/crates/bcm2837-lpa/src/generic/raw.rs @@ -41,15 +41,16 @@ impl BitReader { } } } -pub struct FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> +pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, FI: FieldSpec, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, Safety)>, } -impl<'a, REG, const WI: u8, const O: u8, FI, Safety> FieldWriter<'a, REG, WI, O, FI, Safety> +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -57,22 +58,24 @@ where #[doc = " Creates a new instance of the writer"] #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } } -pub struct BitWriter<'a, REG, const O: u8, FI = bool, M = BitM> +pub struct BitWriter<'a, REG, FI = bool, M = BitM> where REG: Writable + RegisterSpec, bool: From, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, M)>, } -impl<'a, REG, const O: u8, FI, M> BitWriter<'a, REG, O, FI, M> +impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M> where REG: Writable + RegisterSpec, bool: From, @@ -80,9 +83,10 @@ where #[doc = " Creates a new instance of the writer"] #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } diff --git a/crates/bcm2837-lpa/src/gpio.rs b/crates/bcm2837-lpa/src/gpio.rs index 270dc41..9526818 100644 --- a/crates/bcm2837-lpa/src/gpio.rs +++ b/crates/bcm2837-lpa/src/gpio.rs @@ -2,80 +2,206 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + gpfsel0: GPFSEL0, + gpfsel1: GPFSEL1, + gpfsel2: GPFSEL2, + gpfsel3: GPFSEL3, + gpfsel4: GPFSEL4, + gpfsel5: GPFSEL5, + _reserved6: [u8; 0x04], + gpset0: GPSET0, + gpset1: GPSET1, + _reserved8: [u8; 0x04], + gpclr0: GPCLR0, + gpclr1: GPCLR1, + _reserved10: [u8; 0x04], + gplev0: GPLEV0, + gplev1: GPLEV1, + _reserved12: [u8; 0x04], + gpeds0: GPEDS0, + gpeds1: GPEDS1, + _reserved14: [u8; 0x04], + gpren0: GPREN0, + gpren1: GPREN1, + _reserved16: [u8; 0x04], + gpfen0: GPFEN0, + gpfen1: GPFEN1, + _reserved18: [u8; 0x04], + gphen0: GPHEN0, + gphen1: GPHEN1, + _reserved20: [u8; 0x04], + gplen0: GPLEN0, + gplen1: GPLEN1, + _reserved22: [u8; 0x04], + gparen0: GPAREN0, + gparen1: GPAREN1, + _reserved24: [u8; 0x04], + gpafen0: GPAFEN0, + gpafen1: GPAFEN1, + _reserved26: [u8; 0x40], + extra_mux: EXTRA_MUX, + _reserved27: [u8; 0x10], + gpio_pup_pdn_cntrl_reg0: GPIO_PUP_PDN_CNTRL_REG0, + gpio_pup_pdn_cntrl_reg1: GPIO_PUP_PDN_CNTRL_REG1, + gpio_pup_pdn_cntrl_reg2: GPIO_PUP_PDN_CNTRL_REG2, + gpio_pup_pdn_cntrl_reg3: GPIO_PUP_PDN_CNTRL_REG3, +} +impl RegisterBlock { #[doc = "0x00 - GPIO Function Select 0"] - pub gpfsel0: GPFSEL0, + #[inline(always)] + pub const fn gpfsel0(&self) -> &GPFSEL0 { + &self.gpfsel0 + } #[doc = "0x04 - GPIO Function Select 1"] - pub gpfsel1: GPFSEL1, + #[inline(always)] + pub const fn gpfsel1(&self) -> &GPFSEL1 { + &self.gpfsel1 + } #[doc = "0x08 - GPIO Function Select 2"] - pub gpfsel2: GPFSEL2, + #[inline(always)] + pub const fn gpfsel2(&self) -> &GPFSEL2 { + &self.gpfsel2 + } #[doc = "0x0c - GPIO Function Select 3"] - pub gpfsel3: GPFSEL3, + #[inline(always)] + pub const fn gpfsel3(&self) -> &GPFSEL3 { + &self.gpfsel3 + } #[doc = "0x10 - GPIO Function Select 4"] - pub gpfsel4: GPFSEL4, + #[inline(always)] + pub const fn gpfsel4(&self) -> &GPFSEL4 { + &self.gpfsel4 + } #[doc = "0x14 - GPIO Function Select 5"] - pub gpfsel5: GPFSEL5, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn gpfsel5(&self) -> &GPFSEL5 { + &self.gpfsel5 + } #[doc = "0x1c - GPIO Pin Output Set 0"] - pub gpset0: GPSET0, + #[inline(always)] + pub const fn gpset0(&self) -> &GPSET0 { + &self.gpset0 + } #[doc = "0x20 - GPIO Pin Output Set 1"] - pub gpset1: GPSET1, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn gpset1(&self) -> &GPSET1 { + &self.gpset1 + } #[doc = "0x28 - GPIO Pin Output Clear 0"] - pub gpclr0: GPCLR0, + #[inline(always)] + pub const fn gpclr0(&self) -> &GPCLR0 { + &self.gpclr0 + } #[doc = "0x2c - GPIO Pin Output Clear 1"] - pub gpclr1: GPCLR1, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn gpclr1(&self) -> &GPCLR1 { + &self.gpclr1 + } #[doc = "0x34 - GPIO Pin Level 0"] - pub gplev0: GPLEV0, + #[inline(always)] + pub const fn gplev0(&self) -> &GPLEV0 { + &self.gplev0 + } #[doc = "0x38 - GPIO Pin Level 1"] - pub gplev1: GPLEV1, - _reserved12: [u8; 0x04], + #[inline(always)] + pub const fn gplev1(&self) -> &GPLEV1 { + &self.gplev1 + } #[doc = "0x40 - GPIO Pin Event Detect Status 0"] - pub gpeds0: GPEDS0, + #[inline(always)] + pub const fn gpeds0(&self) -> &GPEDS0 { + &self.gpeds0 + } #[doc = "0x44 - GPIO Pin Event Detect Status 1"] - pub gpeds1: GPEDS1, - _reserved14: [u8; 0x04], + #[inline(always)] + pub const fn gpeds1(&self) -> &GPEDS1 { + &self.gpeds1 + } #[doc = "0x4c - GPIO Pin Rising Edge Detect Enable 0"] - pub gpren0: GPREN0, + #[inline(always)] + pub const fn gpren0(&self) -> &GPREN0 { + &self.gpren0 + } #[doc = "0x50 - GPIO Pin Rising Edge Detect Enable 1"] - pub gpren1: GPREN1, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn gpren1(&self) -> &GPREN1 { + &self.gpren1 + } #[doc = "0x58 - GPIO Pin Falling Edge Detect Enable 0"] - pub gpfen0: GPFEN0, + #[inline(always)] + pub const fn gpfen0(&self) -> &GPFEN0 { + &self.gpfen0 + } #[doc = "0x5c - GPIO Pin Falling Edge Detect Enable 1"] - pub gpfen1: GPFEN1, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn gpfen1(&self) -> &GPFEN1 { + &self.gpfen1 + } #[doc = "0x64 - GPIO Pin High Detect Enable 0"] - pub gphen0: GPHEN0, + #[inline(always)] + pub const fn gphen0(&self) -> &GPHEN0 { + &self.gphen0 + } #[doc = "0x68 - GPIO Pin High Detect Enable 1"] - pub gphen1: GPHEN1, - _reserved20: [u8; 0x04], + #[inline(always)] + pub const fn gphen1(&self) -> &GPHEN1 { + &self.gphen1 + } #[doc = "0x70 - GPIO Pin Low Detect Enable 0"] - pub gplen0: GPLEN0, + #[inline(always)] + pub const fn gplen0(&self) -> &GPLEN0 { + &self.gplen0 + } #[doc = "0x74 - GPIO Pin Low Detect Enable 1"] - pub gplen1: GPLEN1, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn gplen1(&self) -> &GPLEN1 { + &self.gplen1 + } #[doc = "0x7c - GPIO Pin Async. Rising Edge Detect 0"] - pub gparen0: GPAREN0, + #[inline(always)] + pub const fn gparen0(&self) -> &GPAREN0 { + &self.gparen0 + } #[doc = "0x80 - GPIO Pin Async. Rising Edge Detect 1"] - pub gparen1: GPAREN1, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn gparen1(&self) -> &GPAREN1 { + &self.gparen1 + } #[doc = "0x88 - GPIO Pin Async. Falling Edge Detect 0"] - pub gpafen0: GPAFEN0, + #[inline(always)] + pub const fn gpafen0(&self) -> &GPAFEN0 { + &self.gpafen0 + } #[doc = "0x8c - GPIO Pin Async. Falling Edge Detect 1"] - pub gpafen1: GPAFEN1, - _reserved26: [u8; 0x40], + #[inline(always)] + pub const fn gpafen1(&self) -> &GPAFEN1 { + &self.gpafen1 + } #[doc = "0xd0 - Undocumented multiplexing bits"] - pub extra_mux: EXTRA_MUX, - _reserved27: [u8; 0x10], + #[inline(always)] + pub const fn extra_mux(&self) -> &EXTRA_MUX { + &self.extra_mux + } #[doc = "0xe4 - GPIO Pull-up / Pull-down Register 0"] - pub gpio_pup_pdn_cntrl_reg0: GPIO_PUP_PDN_CNTRL_REG0, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg0(&self) -> &GPIO_PUP_PDN_CNTRL_REG0 { + &self.gpio_pup_pdn_cntrl_reg0 + } #[doc = "0xe8 - GPIO Pull-up / Pull-down Register 1"] - pub gpio_pup_pdn_cntrl_reg1: GPIO_PUP_PDN_CNTRL_REG1, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg1(&self) -> &GPIO_PUP_PDN_CNTRL_REG1 { + &self.gpio_pup_pdn_cntrl_reg1 + } #[doc = "0xec - GPIO Pull-up / Pull-down Register 2"] - pub gpio_pup_pdn_cntrl_reg2: GPIO_PUP_PDN_CNTRL_REG2, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg2(&self) -> &GPIO_PUP_PDN_CNTRL_REG2 { + &self.gpio_pup_pdn_cntrl_reg2 + } #[doc = "0xf0 - GPIO Pull-up / Pull-down Register 3"] - pub gpio_pup_pdn_cntrl_reg3: GPIO_PUP_PDN_CNTRL_REG3, + #[inline(always)] + pub const fn gpio_pup_pdn_cntrl_reg3(&self) -> &GPIO_PUP_PDN_CNTRL_REG3 { + &self.gpio_pup_pdn_cntrl_reg3 + } } #[doc = "GPFSEL0 (rw) register accessor: GPIO Function Select 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpfsel0::R`]. You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpfsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpfsel0`] module"] diff --git a/crates/bcm2837-lpa/src/gpio/extra_mux.rs b/crates/bcm2837-lpa/src/gpio/extra_mux.rs index bac06d5..f5c8939 100644 --- a/crates/bcm2837-lpa/src/gpio/extra_mux.rs +++ b/crates/bcm2837-lpa/src/gpio/extra_mux.rs @@ -39,8 +39,8 @@ impl SDIO_R { } } #[doc = "Field `SDIO` writer - Switch peripheral connection to undocumented SDIO pins used on Pi 4"] -pub type SDIO_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, SDIO_A>; -impl<'a, REG, const O: u8> SDIO_W<'a, REG, O> +pub type SDIO_W<'a, REG> = crate::BitWriter<'a, REG, SDIO_A>; +impl<'a, REG> SDIO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -71,15 +71,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Switch peripheral connection to undocumented SDIO pins used on Pi 4"] #[inline(always)] #[must_use] - pub fn sdio(&mut self) -> SDIO_W { - SDIO_W::new(self) + pub fn sdio(&mut self) -> SDIO_W { + SDIO_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpafen0.rs b/crates/bcm2837-lpa/src/gpio/gpafen0.rs index 44bf785..539e1b8 100644 --- a/crates/bcm2837-lpa/src/gpio/gpafen0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpafen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `AFEN0` reader - Async falling enabled 0"] pub type AFEN0_R = crate::BitReader; #[doc = "Field `AFEN0` writer - Async falling enabled 0"] -pub type AFEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN1` reader - Async falling enabled 1"] pub type AFEN1_R = crate::BitReader; #[doc = "Field `AFEN1` writer - Async falling enabled 1"] -pub type AFEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN2` reader - Async falling enabled 2"] pub type AFEN2_R = crate::BitReader; #[doc = "Field `AFEN2` writer - Async falling enabled 2"] -pub type AFEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN3` reader - Async falling enabled 3"] pub type AFEN3_R = crate::BitReader; #[doc = "Field `AFEN3` writer - Async falling enabled 3"] -pub type AFEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN4` reader - Async falling enabled 4"] pub type AFEN4_R = crate::BitReader; #[doc = "Field `AFEN4` writer - Async falling enabled 4"] -pub type AFEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN5` reader - Async falling enabled 5"] pub type AFEN5_R = crate::BitReader; #[doc = "Field `AFEN5` writer - Async falling enabled 5"] -pub type AFEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN6` reader - Async falling enabled 6"] pub type AFEN6_R = crate::BitReader; #[doc = "Field `AFEN6` writer - Async falling enabled 6"] -pub type AFEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN7` reader - Async falling enabled 7"] pub type AFEN7_R = crate::BitReader; #[doc = "Field `AFEN7` writer - Async falling enabled 7"] -pub type AFEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN8` reader - Async falling enabled 8"] pub type AFEN8_R = crate::BitReader; #[doc = "Field `AFEN8` writer - Async falling enabled 8"] -pub type AFEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN9` reader - Async falling enabled 9"] pub type AFEN9_R = crate::BitReader; #[doc = "Field `AFEN9` writer - Async falling enabled 9"] -pub type AFEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN10` reader - Async falling enabled 10"] pub type AFEN10_R = crate::BitReader; #[doc = "Field `AFEN10` writer - Async falling enabled 10"] -pub type AFEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN11` reader - Async falling enabled 11"] pub type AFEN11_R = crate::BitReader; #[doc = "Field `AFEN11` writer - Async falling enabled 11"] -pub type AFEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN12` reader - Async falling enabled 12"] pub type AFEN12_R = crate::BitReader; #[doc = "Field `AFEN12` writer - Async falling enabled 12"] -pub type AFEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN13` reader - Async falling enabled 13"] pub type AFEN13_R = crate::BitReader; #[doc = "Field `AFEN13` writer - Async falling enabled 13"] -pub type AFEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN14` reader - Async falling enabled 14"] pub type AFEN14_R = crate::BitReader; #[doc = "Field `AFEN14` writer - Async falling enabled 14"] -pub type AFEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN15` reader - Async falling enabled 15"] pub type AFEN15_R = crate::BitReader; #[doc = "Field `AFEN15` writer - Async falling enabled 15"] -pub type AFEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN16` reader - Async falling enabled 16"] pub type AFEN16_R = crate::BitReader; #[doc = "Field `AFEN16` writer - Async falling enabled 16"] -pub type AFEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN17` reader - Async falling enabled 17"] pub type AFEN17_R = crate::BitReader; #[doc = "Field `AFEN17` writer - Async falling enabled 17"] -pub type AFEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN18` reader - Async falling enabled 18"] pub type AFEN18_R = crate::BitReader; #[doc = "Field `AFEN18` writer - Async falling enabled 18"] -pub type AFEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN19` reader - Async falling enabled 19"] pub type AFEN19_R = crate::BitReader; #[doc = "Field `AFEN19` writer - Async falling enabled 19"] -pub type AFEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN20` reader - Async falling enabled 20"] pub type AFEN20_R = crate::BitReader; #[doc = "Field `AFEN20` writer - Async falling enabled 20"] -pub type AFEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN21` reader - Async falling enabled 21"] pub type AFEN21_R = crate::BitReader; #[doc = "Field `AFEN21` writer - Async falling enabled 21"] -pub type AFEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN22` reader - Async falling enabled 22"] pub type AFEN22_R = crate::BitReader; #[doc = "Field `AFEN22` writer - Async falling enabled 22"] -pub type AFEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN23` reader - Async falling enabled 23"] pub type AFEN23_R = crate::BitReader; #[doc = "Field `AFEN23` writer - Async falling enabled 23"] -pub type AFEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN24` reader - Async falling enabled 24"] pub type AFEN24_R = crate::BitReader; #[doc = "Field `AFEN24` writer - Async falling enabled 24"] -pub type AFEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN25` reader - Async falling enabled 25"] pub type AFEN25_R = crate::BitReader; #[doc = "Field `AFEN25` writer - Async falling enabled 25"] -pub type AFEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN26` reader - Async falling enabled 26"] pub type AFEN26_R = crate::BitReader; #[doc = "Field `AFEN26` writer - Async falling enabled 26"] -pub type AFEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN27` reader - Async falling enabled 27"] pub type AFEN27_R = crate::BitReader; #[doc = "Field `AFEN27` writer - Async falling enabled 27"] -pub type AFEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN28` reader - Async falling enabled 28"] pub type AFEN28_R = crate::BitReader; #[doc = "Field `AFEN28` writer - Async falling enabled 28"] -pub type AFEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN29` reader - Async falling enabled 29"] pub type AFEN29_R = crate::BitReader; #[doc = "Field `AFEN29` writer - Async falling enabled 29"] -pub type AFEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN30` reader - Async falling enabled 30"] pub type AFEN30_R = crate::BitReader; #[doc = "Field `AFEN30` writer - Async falling enabled 30"] -pub type AFEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN31` reader - Async falling enabled 31"] pub type AFEN31_R = crate::BitReader; #[doc = "Field `AFEN31` writer - Async falling enabled 31"] -pub type AFEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async falling enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async falling enabled 0"] #[inline(always)] #[must_use] - pub fn afen0(&mut self) -> AFEN0_W { - AFEN0_W::new(self) + pub fn afen0(&mut self) -> AFEN0_W { + AFEN0_W::new(self, 0) } #[doc = "Bit 1 - Async falling enabled 1"] #[inline(always)] #[must_use] - pub fn afen1(&mut self) -> AFEN1_W { - AFEN1_W::new(self) + pub fn afen1(&mut self) -> AFEN1_W { + AFEN1_W::new(self, 1) } #[doc = "Bit 2 - Async falling enabled 2"] #[inline(always)] #[must_use] - pub fn afen2(&mut self) -> AFEN2_W { - AFEN2_W::new(self) + pub fn afen2(&mut self) -> AFEN2_W { + AFEN2_W::new(self, 2) } #[doc = "Bit 3 - Async falling enabled 3"] #[inline(always)] #[must_use] - pub fn afen3(&mut self) -> AFEN3_W { - AFEN3_W::new(self) + pub fn afen3(&mut self) -> AFEN3_W { + AFEN3_W::new(self, 3) } #[doc = "Bit 4 - Async falling enabled 4"] #[inline(always)] #[must_use] - pub fn afen4(&mut self) -> AFEN4_W { - AFEN4_W::new(self) + pub fn afen4(&mut self) -> AFEN4_W { + AFEN4_W::new(self, 4) } #[doc = "Bit 5 - Async falling enabled 5"] #[inline(always)] #[must_use] - pub fn afen5(&mut self) -> AFEN5_W { - AFEN5_W::new(self) + pub fn afen5(&mut self) -> AFEN5_W { + AFEN5_W::new(self, 5) } #[doc = "Bit 6 - Async falling enabled 6"] #[inline(always)] #[must_use] - pub fn afen6(&mut self) -> AFEN6_W { - AFEN6_W::new(self) + pub fn afen6(&mut self) -> AFEN6_W { + AFEN6_W::new(self, 6) } #[doc = "Bit 7 - Async falling enabled 7"] #[inline(always)] #[must_use] - pub fn afen7(&mut self) -> AFEN7_W { - AFEN7_W::new(self) + pub fn afen7(&mut self) -> AFEN7_W { + AFEN7_W::new(self, 7) } #[doc = "Bit 8 - Async falling enabled 8"] #[inline(always)] #[must_use] - pub fn afen8(&mut self) -> AFEN8_W { - AFEN8_W::new(self) + pub fn afen8(&mut self) -> AFEN8_W { + AFEN8_W::new(self, 8) } #[doc = "Bit 9 - Async falling enabled 9"] #[inline(always)] #[must_use] - pub fn afen9(&mut self) -> AFEN9_W { - AFEN9_W::new(self) + pub fn afen9(&mut self) -> AFEN9_W { + AFEN9_W::new(self, 9) } #[doc = "Bit 10 - Async falling enabled 10"] #[inline(always)] #[must_use] - pub fn afen10(&mut self) -> AFEN10_W { - AFEN10_W::new(self) + pub fn afen10(&mut self) -> AFEN10_W { + AFEN10_W::new(self, 10) } #[doc = "Bit 11 - Async falling enabled 11"] #[inline(always)] #[must_use] - pub fn afen11(&mut self) -> AFEN11_W { - AFEN11_W::new(self) + pub fn afen11(&mut self) -> AFEN11_W { + AFEN11_W::new(self, 11) } #[doc = "Bit 12 - Async falling enabled 12"] #[inline(always)] #[must_use] - pub fn afen12(&mut self) -> AFEN12_W { - AFEN12_W::new(self) + pub fn afen12(&mut self) -> AFEN12_W { + AFEN12_W::new(self, 12) } #[doc = "Bit 13 - Async falling enabled 13"] #[inline(always)] #[must_use] - pub fn afen13(&mut self) -> AFEN13_W { - AFEN13_W::new(self) + pub fn afen13(&mut self) -> AFEN13_W { + AFEN13_W::new(self, 13) } #[doc = "Bit 14 - Async falling enabled 14"] #[inline(always)] #[must_use] - pub fn afen14(&mut self) -> AFEN14_W { - AFEN14_W::new(self) + pub fn afen14(&mut self) -> AFEN14_W { + AFEN14_W::new(self, 14) } #[doc = "Bit 15 - Async falling enabled 15"] #[inline(always)] #[must_use] - pub fn afen15(&mut self) -> AFEN15_W { - AFEN15_W::new(self) + pub fn afen15(&mut self) -> AFEN15_W { + AFEN15_W::new(self, 15) } #[doc = "Bit 16 - Async falling enabled 16"] #[inline(always)] #[must_use] - pub fn afen16(&mut self) -> AFEN16_W { - AFEN16_W::new(self) + pub fn afen16(&mut self) -> AFEN16_W { + AFEN16_W::new(self, 16) } #[doc = "Bit 17 - Async falling enabled 17"] #[inline(always)] #[must_use] - pub fn afen17(&mut self) -> AFEN17_W { - AFEN17_W::new(self) + pub fn afen17(&mut self) -> AFEN17_W { + AFEN17_W::new(self, 17) } #[doc = "Bit 18 - Async falling enabled 18"] #[inline(always)] #[must_use] - pub fn afen18(&mut self) -> AFEN18_W { - AFEN18_W::new(self) + pub fn afen18(&mut self) -> AFEN18_W { + AFEN18_W::new(self, 18) } #[doc = "Bit 19 - Async falling enabled 19"] #[inline(always)] #[must_use] - pub fn afen19(&mut self) -> AFEN19_W { - AFEN19_W::new(self) + pub fn afen19(&mut self) -> AFEN19_W { + AFEN19_W::new(self, 19) } #[doc = "Bit 20 - Async falling enabled 20"] #[inline(always)] #[must_use] - pub fn afen20(&mut self) -> AFEN20_W { - AFEN20_W::new(self) + pub fn afen20(&mut self) -> AFEN20_W { + AFEN20_W::new(self, 20) } #[doc = "Bit 21 - Async falling enabled 21"] #[inline(always)] #[must_use] - pub fn afen21(&mut self) -> AFEN21_W { - AFEN21_W::new(self) + pub fn afen21(&mut self) -> AFEN21_W { + AFEN21_W::new(self, 21) } #[doc = "Bit 22 - Async falling enabled 22"] #[inline(always)] #[must_use] - pub fn afen22(&mut self) -> AFEN22_W { - AFEN22_W::new(self) + pub fn afen22(&mut self) -> AFEN22_W { + AFEN22_W::new(self, 22) } #[doc = "Bit 23 - Async falling enabled 23"] #[inline(always)] #[must_use] - pub fn afen23(&mut self) -> AFEN23_W { - AFEN23_W::new(self) + pub fn afen23(&mut self) -> AFEN23_W { + AFEN23_W::new(self, 23) } #[doc = "Bit 24 - Async falling enabled 24"] #[inline(always)] #[must_use] - pub fn afen24(&mut self) -> AFEN24_W { - AFEN24_W::new(self) + pub fn afen24(&mut self) -> AFEN24_W { + AFEN24_W::new(self, 24) } #[doc = "Bit 25 - Async falling enabled 25"] #[inline(always)] #[must_use] - pub fn afen25(&mut self) -> AFEN25_W { - AFEN25_W::new(self) + pub fn afen25(&mut self) -> AFEN25_W { + AFEN25_W::new(self, 25) } #[doc = "Bit 26 - Async falling enabled 26"] #[inline(always)] #[must_use] - pub fn afen26(&mut self) -> AFEN26_W { - AFEN26_W::new(self) + pub fn afen26(&mut self) -> AFEN26_W { + AFEN26_W::new(self, 26) } #[doc = "Bit 27 - Async falling enabled 27"] #[inline(always)] #[must_use] - pub fn afen27(&mut self) -> AFEN27_W { - AFEN27_W::new(self) + pub fn afen27(&mut self) -> AFEN27_W { + AFEN27_W::new(self, 27) } #[doc = "Bit 28 - Async falling enabled 28"] #[inline(always)] #[must_use] - pub fn afen28(&mut self) -> AFEN28_W { - AFEN28_W::new(self) + pub fn afen28(&mut self) -> AFEN28_W { + AFEN28_W::new(self, 28) } #[doc = "Bit 29 - Async falling enabled 29"] #[inline(always)] #[must_use] - pub fn afen29(&mut self) -> AFEN29_W { - AFEN29_W::new(self) + pub fn afen29(&mut self) -> AFEN29_W { + AFEN29_W::new(self, 29) } #[doc = "Bit 30 - Async falling enabled 30"] #[inline(always)] #[must_use] - pub fn afen30(&mut self) -> AFEN30_W { - AFEN30_W::new(self) + pub fn afen30(&mut self) -> AFEN30_W { + AFEN30_W::new(self, 30) } #[doc = "Bit 31 - Async falling enabled 31"] #[inline(always)] #[must_use] - pub fn afen31(&mut self) -> AFEN31_W { - AFEN31_W::new(self) + pub fn afen31(&mut self) -> AFEN31_W { + AFEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpafen1.rs b/crates/bcm2837-lpa/src/gpio/gpafen1.rs index 83ed52d..a8c6a36 100644 --- a/crates/bcm2837-lpa/src/gpio/gpafen1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpafen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `AFEN32` reader - Async falling enabled 32"] pub type AFEN32_R = crate::BitReader; #[doc = "Field `AFEN32` writer - Async falling enabled 32"] -pub type AFEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN33` reader - Async falling enabled 33"] pub type AFEN33_R = crate::BitReader; #[doc = "Field `AFEN33` writer - Async falling enabled 33"] -pub type AFEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN34` reader - Async falling enabled 34"] pub type AFEN34_R = crate::BitReader; #[doc = "Field `AFEN34` writer - Async falling enabled 34"] -pub type AFEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN35` reader - Async falling enabled 35"] pub type AFEN35_R = crate::BitReader; #[doc = "Field `AFEN35` writer - Async falling enabled 35"] -pub type AFEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN36` reader - Async falling enabled 36"] pub type AFEN36_R = crate::BitReader; #[doc = "Field `AFEN36` writer - Async falling enabled 36"] -pub type AFEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN37` reader - Async falling enabled 37"] pub type AFEN37_R = crate::BitReader; #[doc = "Field `AFEN37` writer - Async falling enabled 37"] -pub type AFEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN38` reader - Async falling enabled 38"] pub type AFEN38_R = crate::BitReader; #[doc = "Field `AFEN38` writer - Async falling enabled 38"] -pub type AFEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN39` reader - Async falling enabled 39"] pub type AFEN39_R = crate::BitReader; #[doc = "Field `AFEN39` writer - Async falling enabled 39"] -pub type AFEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN40` reader - Async falling enabled 40"] pub type AFEN40_R = crate::BitReader; #[doc = "Field `AFEN40` writer - Async falling enabled 40"] -pub type AFEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN41` reader - Async falling enabled 41"] pub type AFEN41_R = crate::BitReader; #[doc = "Field `AFEN41` writer - Async falling enabled 41"] -pub type AFEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN42` reader - Async falling enabled 42"] pub type AFEN42_R = crate::BitReader; #[doc = "Field `AFEN42` writer - Async falling enabled 42"] -pub type AFEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN43` reader - Async falling enabled 43"] pub type AFEN43_R = crate::BitReader; #[doc = "Field `AFEN43` writer - Async falling enabled 43"] -pub type AFEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN44` reader - Async falling enabled 44"] pub type AFEN44_R = crate::BitReader; #[doc = "Field `AFEN44` writer - Async falling enabled 44"] -pub type AFEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN45` reader - Async falling enabled 45"] pub type AFEN45_R = crate::BitReader; #[doc = "Field `AFEN45` writer - Async falling enabled 45"] -pub type AFEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN46` reader - Async falling enabled 46"] pub type AFEN46_R = crate::BitReader; #[doc = "Field `AFEN46` writer - Async falling enabled 46"] -pub type AFEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN47` reader - Async falling enabled 47"] pub type AFEN47_R = crate::BitReader; #[doc = "Field `AFEN47` writer - Async falling enabled 47"] -pub type AFEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN48` reader - Async falling enabled 48"] pub type AFEN48_R = crate::BitReader; #[doc = "Field `AFEN48` writer - Async falling enabled 48"] -pub type AFEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN49` reader - Async falling enabled 49"] pub type AFEN49_R = crate::BitReader; #[doc = "Field `AFEN49` writer - Async falling enabled 49"] -pub type AFEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN50` reader - Async falling enabled 50"] pub type AFEN50_R = crate::BitReader; #[doc = "Field `AFEN50` writer - Async falling enabled 50"] -pub type AFEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN51` reader - Async falling enabled 51"] pub type AFEN51_R = crate::BitReader; #[doc = "Field `AFEN51` writer - Async falling enabled 51"] -pub type AFEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN52` reader - Async falling enabled 52"] pub type AFEN52_R = crate::BitReader; #[doc = "Field `AFEN52` writer - Async falling enabled 52"] -pub type AFEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AFEN53` reader - Async falling enabled 53"] pub type AFEN53_R = crate::BitReader; #[doc = "Field `AFEN53` writer - Async falling enabled 53"] -pub type AFEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AFEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async falling enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async falling enabled 32"] #[inline(always)] #[must_use] - pub fn afen32(&mut self) -> AFEN32_W { - AFEN32_W::new(self) + pub fn afen32(&mut self) -> AFEN32_W { + AFEN32_W::new(self, 0) } #[doc = "Bit 1 - Async falling enabled 33"] #[inline(always)] #[must_use] - pub fn afen33(&mut self) -> AFEN33_W { - AFEN33_W::new(self) + pub fn afen33(&mut self) -> AFEN33_W { + AFEN33_W::new(self, 1) } #[doc = "Bit 2 - Async falling enabled 34"] #[inline(always)] #[must_use] - pub fn afen34(&mut self) -> AFEN34_W { - AFEN34_W::new(self) + pub fn afen34(&mut self) -> AFEN34_W { + AFEN34_W::new(self, 2) } #[doc = "Bit 3 - Async falling enabled 35"] #[inline(always)] #[must_use] - pub fn afen35(&mut self) -> AFEN35_W { - AFEN35_W::new(self) + pub fn afen35(&mut self) -> AFEN35_W { + AFEN35_W::new(self, 3) } #[doc = "Bit 4 - Async falling enabled 36"] #[inline(always)] #[must_use] - pub fn afen36(&mut self) -> AFEN36_W { - AFEN36_W::new(self) + pub fn afen36(&mut self) -> AFEN36_W { + AFEN36_W::new(self, 4) } #[doc = "Bit 5 - Async falling enabled 37"] #[inline(always)] #[must_use] - pub fn afen37(&mut self) -> AFEN37_W { - AFEN37_W::new(self) + pub fn afen37(&mut self) -> AFEN37_W { + AFEN37_W::new(self, 5) } #[doc = "Bit 6 - Async falling enabled 38"] #[inline(always)] #[must_use] - pub fn afen38(&mut self) -> AFEN38_W { - AFEN38_W::new(self) + pub fn afen38(&mut self) -> AFEN38_W { + AFEN38_W::new(self, 6) } #[doc = "Bit 7 - Async falling enabled 39"] #[inline(always)] #[must_use] - pub fn afen39(&mut self) -> AFEN39_W { - AFEN39_W::new(self) + pub fn afen39(&mut self) -> AFEN39_W { + AFEN39_W::new(self, 7) } #[doc = "Bit 8 - Async falling enabled 40"] #[inline(always)] #[must_use] - pub fn afen40(&mut self) -> AFEN40_W { - AFEN40_W::new(self) + pub fn afen40(&mut self) -> AFEN40_W { + AFEN40_W::new(self, 8) } #[doc = "Bit 9 - Async falling enabled 41"] #[inline(always)] #[must_use] - pub fn afen41(&mut self) -> AFEN41_W { - AFEN41_W::new(self) + pub fn afen41(&mut self) -> AFEN41_W { + AFEN41_W::new(self, 9) } #[doc = "Bit 10 - Async falling enabled 42"] #[inline(always)] #[must_use] - pub fn afen42(&mut self) -> AFEN42_W { - AFEN42_W::new(self) + pub fn afen42(&mut self) -> AFEN42_W { + AFEN42_W::new(self, 10) } #[doc = "Bit 11 - Async falling enabled 43"] #[inline(always)] #[must_use] - pub fn afen43(&mut self) -> AFEN43_W { - AFEN43_W::new(self) + pub fn afen43(&mut self) -> AFEN43_W { + AFEN43_W::new(self, 11) } #[doc = "Bit 12 - Async falling enabled 44"] #[inline(always)] #[must_use] - pub fn afen44(&mut self) -> AFEN44_W { - AFEN44_W::new(self) + pub fn afen44(&mut self) -> AFEN44_W { + AFEN44_W::new(self, 12) } #[doc = "Bit 13 - Async falling enabled 45"] #[inline(always)] #[must_use] - pub fn afen45(&mut self) -> AFEN45_W { - AFEN45_W::new(self) + pub fn afen45(&mut self) -> AFEN45_W { + AFEN45_W::new(self, 13) } #[doc = "Bit 14 - Async falling enabled 46"] #[inline(always)] #[must_use] - pub fn afen46(&mut self) -> AFEN46_W { - AFEN46_W::new(self) + pub fn afen46(&mut self) -> AFEN46_W { + AFEN46_W::new(self, 14) } #[doc = "Bit 15 - Async falling enabled 47"] #[inline(always)] #[must_use] - pub fn afen47(&mut self) -> AFEN47_W { - AFEN47_W::new(self) + pub fn afen47(&mut self) -> AFEN47_W { + AFEN47_W::new(self, 15) } #[doc = "Bit 16 - Async falling enabled 48"] #[inline(always)] #[must_use] - pub fn afen48(&mut self) -> AFEN48_W { - AFEN48_W::new(self) + pub fn afen48(&mut self) -> AFEN48_W { + AFEN48_W::new(self, 16) } #[doc = "Bit 17 - Async falling enabled 49"] #[inline(always)] #[must_use] - pub fn afen49(&mut self) -> AFEN49_W { - AFEN49_W::new(self) + pub fn afen49(&mut self) -> AFEN49_W { + AFEN49_W::new(self, 17) } #[doc = "Bit 18 - Async falling enabled 50"] #[inline(always)] #[must_use] - pub fn afen50(&mut self) -> AFEN50_W { - AFEN50_W::new(self) + pub fn afen50(&mut self) -> AFEN50_W { + AFEN50_W::new(self, 18) } #[doc = "Bit 19 - Async falling enabled 51"] #[inline(always)] #[must_use] - pub fn afen51(&mut self) -> AFEN51_W { - AFEN51_W::new(self) + pub fn afen51(&mut self) -> AFEN51_W { + AFEN51_W::new(self, 19) } #[doc = "Bit 20 - Async falling enabled 52"] #[inline(always)] #[must_use] - pub fn afen52(&mut self) -> AFEN52_W { - AFEN52_W::new(self) + pub fn afen52(&mut self) -> AFEN52_W { + AFEN52_W::new(self, 20) } #[doc = "Bit 21 - Async falling enabled 53"] #[inline(always)] #[must_use] - pub fn afen53(&mut self) -> AFEN53_W { - AFEN53_W::new(self) + pub fn afen53(&mut self) -> AFEN53_W { + AFEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gparen0.rs b/crates/bcm2837-lpa/src/gpio/gparen0.rs index ac719d0..38a09c9 100644 --- a/crates/bcm2837-lpa/src/gpio/gparen0.rs +++ b/crates/bcm2837-lpa/src/gpio/gparen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `AREN0` reader - Async rising enabled 0"] pub type AREN0_R = crate::BitReader; #[doc = "Field `AREN0` writer - Async rising enabled 0"] -pub type AREN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN1` reader - Async rising enabled 1"] pub type AREN1_R = crate::BitReader; #[doc = "Field `AREN1` writer - Async rising enabled 1"] -pub type AREN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN2` reader - Async rising enabled 2"] pub type AREN2_R = crate::BitReader; #[doc = "Field `AREN2` writer - Async rising enabled 2"] -pub type AREN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN3` reader - Async rising enabled 3"] pub type AREN3_R = crate::BitReader; #[doc = "Field `AREN3` writer - Async rising enabled 3"] -pub type AREN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN4` reader - Async rising enabled 4"] pub type AREN4_R = crate::BitReader; #[doc = "Field `AREN4` writer - Async rising enabled 4"] -pub type AREN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN5` reader - Async rising enabled 5"] pub type AREN5_R = crate::BitReader; #[doc = "Field `AREN5` writer - Async rising enabled 5"] -pub type AREN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN6` reader - Async rising enabled 6"] pub type AREN6_R = crate::BitReader; #[doc = "Field `AREN6` writer - Async rising enabled 6"] -pub type AREN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN7` reader - Async rising enabled 7"] pub type AREN7_R = crate::BitReader; #[doc = "Field `AREN7` writer - Async rising enabled 7"] -pub type AREN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN8` reader - Async rising enabled 8"] pub type AREN8_R = crate::BitReader; #[doc = "Field `AREN8` writer - Async rising enabled 8"] -pub type AREN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN9` reader - Async rising enabled 9"] pub type AREN9_R = crate::BitReader; #[doc = "Field `AREN9` writer - Async rising enabled 9"] -pub type AREN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN10` reader - Async rising enabled 10"] pub type AREN10_R = crate::BitReader; #[doc = "Field `AREN10` writer - Async rising enabled 10"] -pub type AREN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN11` reader - Async rising enabled 11"] pub type AREN11_R = crate::BitReader; #[doc = "Field `AREN11` writer - Async rising enabled 11"] -pub type AREN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN12` reader - Async rising enabled 12"] pub type AREN12_R = crate::BitReader; #[doc = "Field `AREN12` writer - Async rising enabled 12"] -pub type AREN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN13` reader - Async rising enabled 13"] pub type AREN13_R = crate::BitReader; #[doc = "Field `AREN13` writer - Async rising enabled 13"] -pub type AREN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN14` reader - Async rising enabled 14"] pub type AREN14_R = crate::BitReader; #[doc = "Field `AREN14` writer - Async rising enabled 14"] -pub type AREN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN15` reader - Async rising enabled 15"] pub type AREN15_R = crate::BitReader; #[doc = "Field `AREN15` writer - Async rising enabled 15"] -pub type AREN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN16` reader - Async rising enabled 16"] pub type AREN16_R = crate::BitReader; #[doc = "Field `AREN16` writer - Async rising enabled 16"] -pub type AREN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN17` reader - Async rising enabled 17"] pub type AREN17_R = crate::BitReader; #[doc = "Field `AREN17` writer - Async rising enabled 17"] -pub type AREN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN18` reader - Async rising enabled 18"] pub type AREN18_R = crate::BitReader; #[doc = "Field `AREN18` writer - Async rising enabled 18"] -pub type AREN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN19` reader - Async rising enabled 19"] pub type AREN19_R = crate::BitReader; #[doc = "Field `AREN19` writer - Async rising enabled 19"] -pub type AREN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN20` reader - Async rising enabled 20"] pub type AREN20_R = crate::BitReader; #[doc = "Field `AREN20` writer - Async rising enabled 20"] -pub type AREN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN21` reader - Async rising enabled 21"] pub type AREN21_R = crate::BitReader; #[doc = "Field `AREN21` writer - Async rising enabled 21"] -pub type AREN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN22` reader - Async rising enabled 22"] pub type AREN22_R = crate::BitReader; #[doc = "Field `AREN22` writer - Async rising enabled 22"] -pub type AREN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN23` reader - Async rising enabled 23"] pub type AREN23_R = crate::BitReader; #[doc = "Field `AREN23` writer - Async rising enabled 23"] -pub type AREN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN24` reader - Async rising enabled 24"] pub type AREN24_R = crate::BitReader; #[doc = "Field `AREN24` writer - Async rising enabled 24"] -pub type AREN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN25` reader - Async rising enabled 25"] pub type AREN25_R = crate::BitReader; #[doc = "Field `AREN25` writer - Async rising enabled 25"] -pub type AREN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN26` reader - Async rising enabled 26"] pub type AREN26_R = crate::BitReader; #[doc = "Field `AREN26` writer - Async rising enabled 26"] -pub type AREN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN27` reader - Async rising enabled 27"] pub type AREN27_R = crate::BitReader; #[doc = "Field `AREN27` writer - Async rising enabled 27"] -pub type AREN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN28` reader - Async rising enabled 28"] pub type AREN28_R = crate::BitReader; #[doc = "Field `AREN28` writer - Async rising enabled 28"] -pub type AREN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN29` reader - Async rising enabled 29"] pub type AREN29_R = crate::BitReader; #[doc = "Field `AREN29` writer - Async rising enabled 29"] -pub type AREN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN30` reader - Async rising enabled 30"] pub type AREN30_R = crate::BitReader; #[doc = "Field `AREN30` writer - Async rising enabled 30"] -pub type AREN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN31` reader - Async rising enabled 31"] pub type AREN31_R = crate::BitReader; #[doc = "Field `AREN31` writer - Async rising enabled 31"] -pub type AREN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async rising enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async rising enabled 0"] #[inline(always)] #[must_use] - pub fn aren0(&mut self) -> AREN0_W { - AREN0_W::new(self) + pub fn aren0(&mut self) -> AREN0_W { + AREN0_W::new(self, 0) } #[doc = "Bit 1 - Async rising enabled 1"] #[inline(always)] #[must_use] - pub fn aren1(&mut self) -> AREN1_W { - AREN1_W::new(self) + pub fn aren1(&mut self) -> AREN1_W { + AREN1_W::new(self, 1) } #[doc = "Bit 2 - Async rising enabled 2"] #[inline(always)] #[must_use] - pub fn aren2(&mut self) -> AREN2_W { - AREN2_W::new(self) + pub fn aren2(&mut self) -> AREN2_W { + AREN2_W::new(self, 2) } #[doc = "Bit 3 - Async rising enabled 3"] #[inline(always)] #[must_use] - pub fn aren3(&mut self) -> AREN3_W { - AREN3_W::new(self) + pub fn aren3(&mut self) -> AREN3_W { + AREN3_W::new(self, 3) } #[doc = "Bit 4 - Async rising enabled 4"] #[inline(always)] #[must_use] - pub fn aren4(&mut self) -> AREN4_W { - AREN4_W::new(self) + pub fn aren4(&mut self) -> AREN4_W { + AREN4_W::new(self, 4) } #[doc = "Bit 5 - Async rising enabled 5"] #[inline(always)] #[must_use] - pub fn aren5(&mut self) -> AREN5_W { - AREN5_W::new(self) + pub fn aren5(&mut self) -> AREN5_W { + AREN5_W::new(self, 5) } #[doc = "Bit 6 - Async rising enabled 6"] #[inline(always)] #[must_use] - pub fn aren6(&mut self) -> AREN6_W { - AREN6_W::new(self) + pub fn aren6(&mut self) -> AREN6_W { + AREN6_W::new(self, 6) } #[doc = "Bit 7 - Async rising enabled 7"] #[inline(always)] #[must_use] - pub fn aren7(&mut self) -> AREN7_W { - AREN7_W::new(self) + pub fn aren7(&mut self) -> AREN7_W { + AREN7_W::new(self, 7) } #[doc = "Bit 8 - Async rising enabled 8"] #[inline(always)] #[must_use] - pub fn aren8(&mut self) -> AREN8_W { - AREN8_W::new(self) + pub fn aren8(&mut self) -> AREN8_W { + AREN8_W::new(self, 8) } #[doc = "Bit 9 - Async rising enabled 9"] #[inline(always)] #[must_use] - pub fn aren9(&mut self) -> AREN9_W { - AREN9_W::new(self) + pub fn aren9(&mut self) -> AREN9_W { + AREN9_W::new(self, 9) } #[doc = "Bit 10 - Async rising enabled 10"] #[inline(always)] #[must_use] - pub fn aren10(&mut self) -> AREN10_W { - AREN10_W::new(self) + pub fn aren10(&mut self) -> AREN10_W { + AREN10_W::new(self, 10) } #[doc = "Bit 11 - Async rising enabled 11"] #[inline(always)] #[must_use] - pub fn aren11(&mut self) -> AREN11_W { - AREN11_W::new(self) + pub fn aren11(&mut self) -> AREN11_W { + AREN11_W::new(self, 11) } #[doc = "Bit 12 - Async rising enabled 12"] #[inline(always)] #[must_use] - pub fn aren12(&mut self) -> AREN12_W { - AREN12_W::new(self) + pub fn aren12(&mut self) -> AREN12_W { + AREN12_W::new(self, 12) } #[doc = "Bit 13 - Async rising enabled 13"] #[inline(always)] #[must_use] - pub fn aren13(&mut self) -> AREN13_W { - AREN13_W::new(self) + pub fn aren13(&mut self) -> AREN13_W { + AREN13_W::new(self, 13) } #[doc = "Bit 14 - Async rising enabled 14"] #[inline(always)] #[must_use] - pub fn aren14(&mut self) -> AREN14_W { - AREN14_W::new(self) + pub fn aren14(&mut self) -> AREN14_W { + AREN14_W::new(self, 14) } #[doc = "Bit 15 - Async rising enabled 15"] #[inline(always)] #[must_use] - pub fn aren15(&mut self) -> AREN15_W { - AREN15_W::new(self) + pub fn aren15(&mut self) -> AREN15_W { + AREN15_W::new(self, 15) } #[doc = "Bit 16 - Async rising enabled 16"] #[inline(always)] #[must_use] - pub fn aren16(&mut self) -> AREN16_W { - AREN16_W::new(self) + pub fn aren16(&mut self) -> AREN16_W { + AREN16_W::new(self, 16) } #[doc = "Bit 17 - Async rising enabled 17"] #[inline(always)] #[must_use] - pub fn aren17(&mut self) -> AREN17_W { - AREN17_W::new(self) + pub fn aren17(&mut self) -> AREN17_W { + AREN17_W::new(self, 17) } #[doc = "Bit 18 - Async rising enabled 18"] #[inline(always)] #[must_use] - pub fn aren18(&mut self) -> AREN18_W { - AREN18_W::new(self) + pub fn aren18(&mut self) -> AREN18_W { + AREN18_W::new(self, 18) } #[doc = "Bit 19 - Async rising enabled 19"] #[inline(always)] #[must_use] - pub fn aren19(&mut self) -> AREN19_W { - AREN19_W::new(self) + pub fn aren19(&mut self) -> AREN19_W { + AREN19_W::new(self, 19) } #[doc = "Bit 20 - Async rising enabled 20"] #[inline(always)] #[must_use] - pub fn aren20(&mut self) -> AREN20_W { - AREN20_W::new(self) + pub fn aren20(&mut self) -> AREN20_W { + AREN20_W::new(self, 20) } #[doc = "Bit 21 - Async rising enabled 21"] #[inline(always)] #[must_use] - pub fn aren21(&mut self) -> AREN21_W { - AREN21_W::new(self) + pub fn aren21(&mut self) -> AREN21_W { + AREN21_W::new(self, 21) } #[doc = "Bit 22 - Async rising enabled 22"] #[inline(always)] #[must_use] - pub fn aren22(&mut self) -> AREN22_W { - AREN22_W::new(self) + pub fn aren22(&mut self) -> AREN22_W { + AREN22_W::new(self, 22) } #[doc = "Bit 23 - Async rising enabled 23"] #[inline(always)] #[must_use] - pub fn aren23(&mut self) -> AREN23_W { - AREN23_W::new(self) + pub fn aren23(&mut self) -> AREN23_W { + AREN23_W::new(self, 23) } #[doc = "Bit 24 - Async rising enabled 24"] #[inline(always)] #[must_use] - pub fn aren24(&mut self) -> AREN24_W { - AREN24_W::new(self) + pub fn aren24(&mut self) -> AREN24_W { + AREN24_W::new(self, 24) } #[doc = "Bit 25 - Async rising enabled 25"] #[inline(always)] #[must_use] - pub fn aren25(&mut self) -> AREN25_W { - AREN25_W::new(self) + pub fn aren25(&mut self) -> AREN25_W { + AREN25_W::new(self, 25) } #[doc = "Bit 26 - Async rising enabled 26"] #[inline(always)] #[must_use] - pub fn aren26(&mut self) -> AREN26_W { - AREN26_W::new(self) + pub fn aren26(&mut self) -> AREN26_W { + AREN26_W::new(self, 26) } #[doc = "Bit 27 - Async rising enabled 27"] #[inline(always)] #[must_use] - pub fn aren27(&mut self) -> AREN27_W { - AREN27_W::new(self) + pub fn aren27(&mut self) -> AREN27_W { + AREN27_W::new(self, 27) } #[doc = "Bit 28 - Async rising enabled 28"] #[inline(always)] #[must_use] - pub fn aren28(&mut self) -> AREN28_W { - AREN28_W::new(self) + pub fn aren28(&mut self) -> AREN28_W { + AREN28_W::new(self, 28) } #[doc = "Bit 29 - Async rising enabled 29"] #[inline(always)] #[must_use] - pub fn aren29(&mut self) -> AREN29_W { - AREN29_W::new(self) + pub fn aren29(&mut self) -> AREN29_W { + AREN29_W::new(self, 29) } #[doc = "Bit 30 - Async rising enabled 30"] #[inline(always)] #[must_use] - pub fn aren30(&mut self) -> AREN30_W { - AREN30_W::new(self) + pub fn aren30(&mut self) -> AREN30_W { + AREN30_W::new(self, 30) } #[doc = "Bit 31 - Async rising enabled 31"] #[inline(always)] #[must_use] - pub fn aren31(&mut self) -> AREN31_W { - AREN31_W::new(self) + pub fn aren31(&mut self) -> AREN31_W { + AREN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gparen1.rs b/crates/bcm2837-lpa/src/gpio/gparen1.rs index f4a64ad..2e15a27 100644 --- a/crates/bcm2837-lpa/src/gpio/gparen1.rs +++ b/crates/bcm2837-lpa/src/gpio/gparen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `AREN32` reader - Async rising enabled 32"] pub type AREN32_R = crate::BitReader; #[doc = "Field `AREN32` writer - Async rising enabled 32"] -pub type AREN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN33` reader - Async rising enabled 33"] pub type AREN33_R = crate::BitReader; #[doc = "Field `AREN33` writer - Async rising enabled 33"] -pub type AREN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN34` reader - Async rising enabled 34"] pub type AREN34_R = crate::BitReader; #[doc = "Field `AREN34` writer - Async rising enabled 34"] -pub type AREN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN35` reader - Async rising enabled 35"] pub type AREN35_R = crate::BitReader; #[doc = "Field `AREN35` writer - Async rising enabled 35"] -pub type AREN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN36` reader - Async rising enabled 36"] pub type AREN36_R = crate::BitReader; #[doc = "Field `AREN36` writer - Async rising enabled 36"] -pub type AREN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN37` reader - Async rising enabled 37"] pub type AREN37_R = crate::BitReader; #[doc = "Field `AREN37` writer - Async rising enabled 37"] -pub type AREN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN38` reader - Async rising enabled 38"] pub type AREN38_R = crate::BitReader; #[doc = "Field `AREN38` writer - Async rising enabled 38"] -pub type AREN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN39` reader - Async rising enabled 39"] pub type AREN39_R = crate::BitReader; #[doc = "Field `AREN39` writer - Async rising enabled 39"] -pub type AREN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN40` reader - Async rising enabled 40"] pub type AREN40_R = crate::BitReader; #[doc = "Field `AREN40` writer - Async rising enabled 40"] -pub type AREN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN41` reader - Async rising enabled 41"] pub type AREN41_R = crate::BitReader; #[doc = "Field `AREN41` writer - Async rising enabled 41"] -pub type AREN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN42` reader - Async rising enabled 42"] pub type AREN42_R = crate::BitReader; #[doc = "Field `AREN42` writer - Async rising enabled 42"] -pub type AREN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN43` reader - Async rising enabled 43"] pub type AREN43_R = crate::BitReader; #[doc = "Field `AREN43` writer - Async rising enabled 43"] -pub type AREN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN44` reader - Async rising enabled 44"] pub type AREN44_R = crate::BitReader; #[doc = "Field `AREN44` writer - Async rising enabled 44"] -pub type AREN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN45` reader - Async rising enabled 45"] pub type AREN45_R = crate::BitReader; #[doc = "Field `AREN45` writer - Async rising enabled 45"] -pub type AREN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN46` reader - Async rising enabled 46"] pub type AREN46_R = crate::BitReader; #[doc = "Field `AREN46` writer - Async rising enabled 46"] -pub type AREN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN47` reader - Async rising enabled 47"] pub type AREN47_R = crate::BitReader; #[doc = "Field `AREN47` writer - Async rising enabled 47"] -pub type AREN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN48` reader - Async rising enabled 48"] pub type AREN48_R = crate::BitReader; #[doc = "Field `AREN48` writer - Async rising enabled 48"] -pub type AREN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN49` reader - Async rising enabled 49"] pub type AREN49_R = crate::BitReader; #[doc = "Field `AREN49` writer - Async rising enabled 49"] -pub type AREN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN50` reader - Async rising enabled 50"] pub type AREN50_R = crate::BitReader; #[doc = "Field `AREN50` writer - Async rising enabled 50"] -pub type AREN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN51` reader - Async rising enabled 51"] pub type AREN51_R = crate::BitReader; #[doc = "Field `AREN51` writer - Async rising enabled 51"] -pub type AREN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN52` reader - Async rising enabled 52"] pub type AREN52_R = crate::BitReader; #[doc = "Field `AREN52` writer - Async rising enabled 52"] -pub type AREN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AREN53` reader - Async rising enabled 53"] pub type AREN53_R = crate::BitReader; #[doc = "Field `AREN53` writer - Async rising enabled 53"] -pub type AREN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AREN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Async rising enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Async rising enabled 32"] #[inline(always)] #[must_use] - pub fn aren32(&mut self) -> AREN32_W { - AREN32_W::new(self) + pub fn aren32(&mut self) -> AREN32_W { + AREN32_W::new(self, 0) } #[doc = "Bit 1 - Async rising enabled 33"] #[inline(always)] #[must_use] - pub fn aren33(&mut self) -> AREN33_W { - AREN33_W::new(self) + pub fn aren33(&mut self) -> AREN33_W { + AREN33_W::new(self, 1) } #[doc = "Bit 2 - Async rising enabled 34"] #[inline(always)] #[must_use] - pub fn aren34(&mut self) -> AREN34_W { - AREN34_W::new(self) + pub fn aren34(&mut self) -> AREN34_W { + AREN34_W::new(self, 2) } #[doc = "Bit 3 - Async rising enabled 35"] #[inline(always)] #[must_use] - pub fn aren35(&mut self) -> AREN35_W { - AREN35_W::new(self) + pub fn aren35(&mut self) -> AREN35_W { + AREN35_W::new(self, 3) } #[doc = "Bit 4 - Async rising enabled 36"] #[inline(always)] #[must_use] - pub fn aren36(&mut self) -> AREN36_W { - AREN36_W::new(self) + pub fn aren36(&mut self) -> AREN36_W { + AREN36_W::new(self, 4) } #[doc = "Bit 5 - Async rising enabled 37"] #[inline(always)] #[must_use] - pub fn aren37(&mut self) -> AREN37_W { - AREN37_W::new(self) + pub fn aren37(&mut self) -> AREN37_W { + AREN37_W::new(self, 5) } #[doc = "Bit 6 - Async rising enabled 38"] #[inline(always)] #[must_use] - pub fn aren38(&mut self) -> AREN38_W { - AREN38_W::new(self) + pub fn aren38(&mut self) -> AREN38_W { + AREN38_W::new(self, 6) } #[doc = "Bit 7 - Async rising enabled 39"] #[inline(always)] #[must_use] - pub fn aren39(&mut self) -> AREN39_W { - AREN39_W::new(self) + pub fn aren39(&mut self) -> AREN39_W { + AREN39_W::new(self, 7) } #[doc = "Bit 8 - Async rising enabled 40"] #[inline(always)] #[must_use] - pub fn aren40(&mut self) -> AREN40_W { - AREN40_W::new(self) + pub fn aren40(&mut self) -> AREN40_W { + AREN40_W::new(self, 8) } #[doc = "Bit 9 - Async rising enabled 41"] #[inline(always)] #[must_use] - pub fn aren41(&mut self) -> AREN41_W { - AREN41_W::new(self) + pub fn aren41(&mut self) -> AREN41_W { + AREN41_W::new(self, 9) } #[doc = "Bit 10 - Async rising enabled 42"] #[inline(always)] #[must_use] - pub fn aren42(&mut self) -> AREN42_W { - AREN42_W::new(self) + pub fn aren42(&mut self) -> AREN42_W { + AREN42_W::new(self, 10) } #[doc = "Bit 11 - Async rising enabled 43"] #[inline(always)] #[must_use] - pub fn aren43(&mut self) -> AREN43_W { - AREN43_W::new(self) + pub fn aren43(&mut self) -> AREN43_W { + AREN43_W::new(self, 11) } #[doc = "Bit 12 - Async rising enabled 44"] #[inline(always)] #[must_use] - pub fn aren44(&mut self) -> AREN44_W { - AREN44_W::new(self) + pub fn aren44(&mut self) -> AREN44_W { + AREN44_W::new(self, 12) } #[doc = "Bit 13 - Async rising enabled 45"] #[inline(always)] #[must_use] - pub fn aren45(&mut self) -> AREN45_W { - AREN45_W::new(self) + pub fn aren45(&mut self) -> AREN45_W { + AREN45_W::new(self, 13) } #[doc = "Bit 14 - Async rising enabled 46"] #[inline(always)] #[must_use] - pub fn aren46(&mut self) -> AREN46_W { - AREN46_W::new(self) + pub fn aren46(&mut self) -> AREN46_W { + AREN46_W::new(self, 14) } #[doc = "Bit 15 - Async rising enabled 47"] #[inline(always)] #[must_use] - pub fn aren47(&mut self) -> AREN47_W { - AREN47_W::new(self) + pub fn aren47(&mut self) -> AREN47_W { + AREN47_W::new(self, 15) } #[doc = "Bit 16 - Async rising enabled 48"] #[inline(always)] #[must_use] - pub fn aren48(&mut self) -> AREN48_W { - AREN48_W::new(self) + pub fn aren48(&mut self) -> AREN48_W { + AREN48_W::new(self, 16) } #[doc = "Bit 17 - Async rising enabled 49"] #[inline(always)] #[must_use] - pub fn aren49(&mut self) -> AREN49_W { - AREN49_W::new(self) + pub fn aren49(&mut self) -> AREN49_W { + AREN49_W::new(self, 17) } #[doc = "Bit 18 - Async rising enabled 50"] #[inline(always)] #[must_use] - pub fn aren50(&mut self) -> AREN50_W { - AREN50_W::new(self) + pub fn aren50(&mut self) -> AREN50_W { + AREN50_W::new(self, 18) } #[doc = "Bit 19 - Async rising enabled 51"] #[inline(always)] #[must_use] - pub fn aren51(&mut self) -> AREN51_W { - AREN51_W::new(self) + pub fn aren51(&mut self) -> AREN51_W { + AREN51_W::new(self, 19) } #[doc = "Bit 20 - Async rising enabled 52"] #[inline(always)] #[must_use] - pub fn aren52(&mut self) -> AREN52_W { - AREN52_W::new(self) + pub fn aren52(&mut self) -> AREN52_W { + AREN52_W::new(self, 20) } #[doc = "Bit 21 - Async rising enabled 53"] #[inline(always)] #[must_use] - pub fn aren53(&mut self) -> AREN53_W { - AREN53_W::new(self) + pub fn aren53(&mut self) -> AREN53_W { + AREN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpclr0.rs b/crates/bcm2837-lpa/src/gpio/gpclr0.rs index 210af7f..d25acb3 100644 --- a/crates/bcm2837-lpa/src/gpio/gpclr0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpclr0.rs @@ -1,69 +1,69 @@ #[doc = "Register `GPCLR0` writer"] pub type W = crate::W; #[doc = "Field `CLR0` writer - Clear 0"] -pub type CLR0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR1` writer - Clear 1"] -pub type CLR1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR2` writer - Clear 2"] -pub type CLR2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR3` writer - Clear 3"] -pub type CLR3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR4` writer - Clear 4"] -pub type CLR4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR5` writer - Clear 5"] -pub type CLR5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR6` writer - Clear 6"] -pub type CLR6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR7` writer - Clear 7"] -pub type CLR7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR8` writer - Clear 8"] -pub type CLR8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR9` writer - Clear 9"] -pub type CLR9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR10` writer - Clear 10"] -pub type CLR10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR11` writer - Clear 11"] -pub type CLR11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR12` writer - Clear 12"] -pub type CLR12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR13` writer - Clear 13"] -pub type CLR13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR14` writer - Clear 14"] -pub type CLR14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR15` writer - Clear 15"] -pub type CLR15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR16` writer - Clear 16"] -pub type CLR16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR17` writer - Clear 17"] -pub type CLR17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR18` writer - Clear 18"] -pub type CLR18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR19` writer - Clear 19"] -pub type CLR19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR20` writer - Clear 20"] -pub type CLR20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR21` writer - Clear 21"] -pub type CLR21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR22` writer - Clear 22"] -pub type CLR22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR23` writer - Clear 23"] -pub type CLR23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR24` writer - Clear 24"] -pub type CLR24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR25` writer - Clear 25"] -pub type CLR25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR26` writer - Clear 26"] -pub type CLR26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR27` writer - Clear 27"] -pub type CLR27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR28` writer - Clear 28"] -pub type CLR28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR29` writer - Clear 29"] -pub type CLR29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR30` writer - Clear 30"] -pub type CLR30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR31` writer - Clear 31"] -pub type CLR31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -73,194 +73,194 @@ impl W { #[doc = "Bit 0 - Clear 0"] #[inline(always)] #[must_use] - pub fn clr0(&mut self) -> CLR0_W { - CLR0_W::new(self) + pub fn clr0(&mut self) -> CLR0_W { + CLR0_W::new(self, 0) } #[doc = "Bit 1 - Clear 1"] #[inline(always)] #[must_use] - pub fn clr1(&mut self) -> CLR1_W { - CLR1_W::new(self) + pub fn clr1(&mut self) -> CLR1_W { + CLR1_W::new(self, 1) } #[doc = "Bit 2 - Clear 2"] #[inline(always)] #[must_use] - pub fn clr2(&mut self) -> CLR2_W { - CLR2_W::new(self) + pub fn clr2(&mut self) -> CLR2_W { + CLR2_W::new(self, 2) } #[doc = "Bit 3 - Clear 3"] #[inline(always)] #[must_use] - pub fn clr3(&mut self) -> CLR3_W { - CLR3_W::new(self) + pub fn clr3(&mut self) -> CLR3_W { + CLR3_W::new(self, 3) } #[doc = "Bit 4 - Clear 4"] #[inline(always)] #[must_use] - pub fn clr4(&mut self) -> CLR4_W { - CLR4_W::new(self) + pub fn clr4(&mut self) -> CLR4_W { + CLR4_W::new(self, 4) } #[doc = "Bit 5 - Clear 5"] #[inline(always)] #[must_use] - pub fn clr5(&mut self) -> CLR5_W { - CLR5_W::new(self) + pub fn clr5(&mut self) -> CLR5_W { + CLR5_W::new(self, 5) } #[doc = "Bit 6 - Clear 6"] #[inline(always)] #[must_use] - pub fn clr6(&mut self) -> CLR6_W { - CLR6_W::new(self) + pub fn clr6(&mut self) -> CLR6_W { + CLR6_W::new(self, 6) } #[doc = "Bit 7 - Clear 7"] #[inline(always)] #[must_use] - pub fn clr7(&mut self) -> CLR7_W { - CLR7_W::new(self) + pub fn clr7(&mut self) -> CLR7_W { + CLR7_W::new(self, 7) } #[doc = "Bit 8 - Clear 8"] #[inline(always)] #[must_use] - pub fn clr8(&mut self) -> CLR8_W { - CLR8_W::new(self) + pub fn clr8(&mut self) -> CLR8_W { + CLR8_W::new(self, 8) } #[doc = "Bit 9 - Clear 9"] #[inline(always)] #[must_use] - pub fn clr9(&mut self) -> CLR9_W { - CLR9_W::new(self) + pub fn clr9(&mut self) -> CLR9_W { + CLR9_W::new(self, 9) } #[doc = "Bit 10 - Clear 10"] #[inline(always)] #[must_use] - pub fn clr10(&mut self) -> CLR10_W { - CLR10_W::new(self) + pub fn clr10(&mut self) -> CLR10_W { + CLR10_W::new(self, 10) } #[doc = "Bit 11 - Clear 11"] #[inline(always)] #[must_use] - pub fn clr11(&mut self) -> CLR11_W { - CLR11_W::new(self) + pub fn clr11(&mut self) -> CLR11_W { + CLR11_W::new(self, 11) } #[doc = "Bit 12 - Clear 12"] #[inline(always)] #[must_use] - pub fn clr12(&mut self) -> CLR12_W { - CLR12_W::new(self) + pub fn clr12(&mut self) -> CLR12_W { + CLR12_W::new(self, 12) } #[doc = "Bit 13 - Clear 13"] #[inline(always)] #[must_use] - pub fn clr13(&mut self) -> CLR13_W { - CLR13_W::new(self) + pub fn clr13(&mut self) -> CLR13_W { + CLR13_W::new(self, 13) } #[doc = "Bit 14 - Clear 14"] #[inline(always)] #[must_use] - pub fn clr14(&mut self) -> CLR14_W { - CLR14_W::new(self) + pub fn clr14(&mut self) -> CLR14_W { + CLR14_W::new(self, 14) } #[doc = "Bit 15 - Clear 15"] #[inline(always)] #[must_use] - pub fn clr15(&mut self) -> CLR15_W { - CLR15_W::new(self) + pub fn clr15(&mut self) -> CLR15_W { + CLR15_W::new(self, 15) } #[doc = "Bit 16 - Clear 16"] #[inline(always)] #[must_use] - pub fn clr16(&mut self) -> CLR16_W { - CLR16_W::new(self) + pub fn clr16(&mut self) -> CLR16_W { + CLR16_W::new(self, 16) } #[doc = "Bit 17 - Clear 17"] #[inline(always)] #[must_use] - pub fn clr17(&mut self) -> CLR17_W { - CLR17_W::new(self) + pub fn clr17(&mut self) -> CLR17_W { + CLR17_W::new(self, 17) } #[doc = "Bit 18 - Clear 18"] #[inline(always)] #[must_use] - pub fn clr18(&mut self) -> CLR18_W { - CLR18_W::new(self) + pub fn clr18(&mut self) -> CLR18_W { + CLR18_W::new(self, 18) } #[doc = "Bit 19 - Clear 19"] #[inline(always)] #[must_use] - pub fn clr19(&mut self) -> CLR19_W { - CLR19_W::new(self) + pub fn clr19(&mut self) -> CLR19_W { + CLR19_W::new(self, 19) } #[doc = "Bit 20 - Clear 20"] #[inline(always)] #[must_use] - pub fn clr20(&mut self) -> CLR20_W { - CLR20_W::new(self) + pub fn clr20(&mut self) -> CLR20_W { + CLR20_W::new(self, 20) } #[doc = "Bit 21 - Clear 21"] #[inline(always)] #[must_use] - pub fn clr21(&mut self) -> CLR21_W { - CLR21_W::new(self) + pub fn clr21(&mut self) -> CLR21_W { + CLR21_W::new(self, 21) } #[doc = "Bit 22 - Clear 22"] #[inline(always)] #[must_use] - pub fn clr22(&mut self) -> CLR22_W { - CLR22_W::new(self) + pub fn clr22(&mut self) -> CLR22_W { + CLR22_W::new(self, 22) } #[doc = "Bit 23 - Clear 23"] #[inline(always)] #[must_use] - pub fn clr23(&mut self) -> CLR23_W { - CLR23_W::new(self) + pub fn clr23(&mut self) -> CLR23_W { + CLR23_W::new(self, 23) } #[doc = "Bit 24 - Clear 24"] #[inline(always)] #[must_use] - pub fn clr24(&mut self) -> CLR24_W { - CLR24_W::new(self) + pub fn clr24(&mut self) -> CLR24_W { + CLR24_W::new(self, 24) } #[doc = "Bit 25 - Clear 25"] #[inline(always)] #[must_use] - pub fn clr25(&mut self) -> CLR25_W { - CLR25_W::new(self) + pub fn clr25(&mut self) -> CLR25_W { + CLR25_W::new(self, 25) } #[doc = "Bit 26 - Clear 26"] #[inline(always)] #[must_use] - pub fn clr26(&mut self) -> CLR26_W { - CLR26_W::new(self) + pub fn clr26(&mut self) -> CLR26_W { + CLR26_W::new(self, 26) } #[doc = "Bit 27 - Clear 27"] #[inline(always)] #[must_use] - pub fn clr27(&mut self) -> CLR27_W { - CLR27_W::new(self) + pub fn clr27(&mut self) -> CLR27_W { + CLR27_W::new(self, 27) } #[doc = "Bit 28 - Clear 28"] #[inline(always)] #[must_use] - pub fn clr28(&mut self) -> CLR28_W { - CLR28_W::new(self) + pub fn clr28(&mut self) -> CLR28_W { + CLR28_W::new(self, 28) } #[doc = "Bit 29 - Clear 29"] #[inline(always)] #[must_use] - pub fn clr29(&mut self) -> CLR29_W { - CLR29_W::new(self) + pub fn clr29(&mut self) -> CLR29_W { + CLR29_W::new(self, 29) } #[doc = "Bit 30 - Clear 30"] #[inline(always)] #[must_use] - pub fn clr30(&mut self) -> CLR30_W { - CLR30_W::new(self) + pub fn clr30(&mut self) -> CLR30_W { + CLR30_W::new(self, 30) } #[doc = "Bit 31 - Clear 31"] #[inline(always)] #[must_use] - pub fn clr31(&mut self) -> CLR31_W { - CLR31_W::new(self) + pub fn clr31(&mut self) -> CLR31_W { + CLR31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpclr1.rs b/crates/bcm2837-lpa/src/gpio/gpclr1.rs index 21e8c12..911b7c7 100644 --- a/crates/bcm2837-lpa/src/gpio/gpclr1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpclr1.rs @@ -1,49 +1,49 @@ #[doc = "Register `GPCLR1` writer"] pub type W = crate::W; #[doc = "Field `CLR32` writer - Clear 32"] -pub type CLR32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR33` writer - Clear 33"] -pub type CLR33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR34` writer - Clear 34"] -pub type CLR34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR35` writer - Clear 35"] -pub type CLR35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR36` writer - Clear 36"] -pub type CLR36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR37` writer - Clear 37"] -pub type CLR37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR38` writer - Clear 38"] -pub type CLR38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR39` writer - Clear 39"] -pub type CLR39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR40` writer - Clear 40"] -pub type CLR40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR41` writer - Clear 41"] -pub type CLR41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR42` writer - Clear 42"] -pub type CLR42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR43` writer - Clear 43"] -pub type CLR43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR44` writer - Clear 44"] -pub type CLR44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR45` writer - Clear 45"] -pub type CLR45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR46` writer - Clear 46"] -pub type CLR46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR47` writer - Clear 47"] -pub type CLR47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR48` writer - Clear 48"] -pub type CLR48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR49` writer - Clear 49"] -pub type CLR49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR50` writer - Clear 50"] -pub type CLR50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR51` writer - Clear 51"] -pub type CLR51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR52` writer - Clear 52"] -pub type CLR52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CLR53` writer - Clear 53"] -pub type CLR53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CLR53_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -53,134 +53,134 @@ impl W { #[doc = "Bit 0 - Clear 32"] #[inline(always)] #[must_use] - pub fn clr32(&mut self) -> CLR32_W { - CLR32_W::new(self) + pub fn clr32(&mut self) -> CLR32_W { + CLR32_W::new(self, 0) } #[doc = "Bit 1 - Clear 33"] #[inline(always)] #[must_use] - pub fn clr33(&mut self) -> CLR33_W { - CLR33_W::new(self) + pub fn clr33(&mut self) -> CLR33_W { + CLR33_W::new(self, 1) } #[doc = "Bit 2 - Clear 34"] #[inline(always)] #[must_use] - pub fn clr34(&mut self) -> CLR34_W { - CLR34_W::new(self) + pub fn clr34(&mut self) -> CLR34_W { + CLR34_W::new(self, 2) } #[doc = "Bit 3 - Clear 35"] #[inline(always)] #[must_use] - pub fn clr35(&mut self) -> CLR35_W { - CLR35_W::new(self) + pub fn clr35(&mut self) -> CLR35_W { + CLR35_W::new(self, 3) } #[doc = "Bit 4 - Clear 36"] #[inline(always)] #[must_use] - pub fn clr36(&mut self) -> CLR36_W { - CLR36_W::new(self) + pub fn clr36(&mut self) -> CLR36_W { + CLR36_W::new(self, 4) } #[doc = "Bit 5 - Clear 37"] #[inline(always)] #[must_use] - pub fn clr37(&mut self) -> CLR37_W { - CLR37_W::new(self) + pub fn clr37(&mut self) -> CLR37_W { + CLR37_W::new(self, 5) } #[doc = "Bit 6 - Clear 38"] #[inline(always)] #[must_use] - pub fn clr38(&mut self) -> CLR38_W { - CLR38_W::new(self) + pub fn clr38(&mut self) -> CLR38_W { + CLR38_W::new(self, 6) } #[doc = "Bit 7 - Clear 39"] #[inline(always)] #[must_use] - pub fn clr39(&mut self) -> CLR39_W { - CLR39_W::new(self) + pub fn clr39(&mut self) -> CLR39_W { + CLR39_W::new(self, 7) } #[doc = "Bit 8 - Clear 40"] #[inline(always)] #[must_use] - pub fn clr40(&mut self) -> CLR40_W { - CLR40_W::new(self) + pub fn clr40(&mut self) -> CLR40_W { + CLR40_W::new(self, 8) } #[doc = "Bit 9 - Clear 41"] #[inline(always)] #[must_use] - pub fn clr41(&mut self) -> CLR41_W { - CLR41_W::new(self) + pub fn clr41(&mut self) -> CLR41_W { + CLR41_W::new(self, 9) } #[doc = "Bit 10 - Clear 42"] #[inline(always)] #[must_use] - pub fn clr42(&mut self) -> CLR42_W { - CLR42_W::new(self) + pub fn clr42(&mut self) -> CLR42_W { + CLR42_W::new(self, 10) } #[doc = "Bit 11 - Clear 43"] #[inline(always)] #[must_use] - pub fn clr43(&mut self) -> CLR43_W { - CLR43_W::new(self) + pub fn clr43(&mut self) -> CLR43_W { + CLR43_W::new(self, 11) } #[doc = "Bit 12 - Clear 44"] #[inline(always)] #[must_use] - pub fn clr44(&mut self) -> CLR44_W { - CLR44_W::new(self) + pub fn clr44(&mut self) -> CLR44_W { + CLR44_W::new(self, 12) } #[doc = "Bit 13 - Clear 45"] #[inline(always)] #[must_use] - pub fn clr45(&mut self) -> CLR45_W { - CLR45_W::new(self) + pub fn clr45(&mut self) -> CLR45_W { + CLR45_W::new(self, 13) } #[doc = "Bit 14 - Clear 46"] #[inline(always)] #[must_use] - pub fn clr46(&mut self) -> CLR46_W { - CLR46_W::new(self) + pub fn clr46(&mut self) -> CLR46_W { + CLR46_W::new(self, 14) } #[doc = "Bit 15 - Clear 47"] #[inline(always)] #[must_use] - pub fn clr47(&mut self) -> CLR47_W { - CLR47_W::new(self) + pub fn clr47(&mut self) -> CLR47_W { + CLR47_W::new(self, 15) } #[doc = "Bit 16 - Clear 48"] #[inline(always)] #[must_use] - pub fn clr48(&mut self) -> CLR48_W { - CLR48_W::new(self) + pub fn clr48(&mut self) -> CLR48_W { + CLR48_W::new(self, 16) } #[doc = "Bit 17 - Clear 49"] #[inline(always)] #[must_use] - pub fn clr49(&mut self) -> CLR49_W { - CLR49_W::new(self) + pub fn clr49(&mut self) -> CLR49_W { + CLR49_W::new(self, 17) } #[doc = "Bit 18 - Clear 50"] #[inline(always)] #[must_use] - pub fn clr50(&mut self) -> CLR50_W { - CLR50_W::new(self) + pub fn clr50(&mut self) -> CLR50_W { + CLR50_W::new(self, 18) } #[doc = "Bit 19 - Clear 51"] #[inline(always)] #[must_use] - pub fn clr51(&mut self) -> CLR51_W { - CLR51_W::new(self) + pub fn clr51(&mut self) -> CLR51_W { + CLR51_W::new(self, 19) } #[doc = "Bit 20 - Clear 52"] #[inline(always)] #[must_use] - pub fn clr52(&mut self) -> CLR52_W { - CLR52_W::new(self) + pub fn clr52(&mut self) -> CLR52_W { + CLR52_W::new(self, 20) } #[doc = "Bit 21 - Clear 53"] #[inline(always)] #[must_use] - pub fn clr53(&mut self) -> CLR53_W { - CLR53_W::new(self) + pub fn clr53(&mut self) -> CLR53_W { + CLR53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpeds0.rs b/crates/bcm2837-lpa/src/gpio/gpeds0.rs index caa11e1..f89e12d 100644 --- a/crates/bcm2837-lpa/src/gpio/gpeds0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpeds0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `EDS0` reader - Event detected 0"] pub type EDS0_R = crate::BitReader; #[doc = "Field `EDS0` writer - Event detected 0"] -pub type EDS0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS1` reader - Event detected 1"] pub type EDS1_R = crate::BitReader; #[doc = "Field `EDS1` writer - Event detected 1"] -pub type EDS1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS2` reader - Event detected 2"] pub type EDS2_R = crate::BitReader; #[doc = "Field `EDS2` writer - Event detected 2"] -pub type EDS2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS3` reader - Event detected 3"] pub type EDS3_R = crate::BitReader; #[doc = "Field `EDS3` writer - Event detected 3"] -pub type EDS3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS4` reader - Event detected 4"] pub type EDS4_R = crate::BitReader; #[doc = "Field `EDS4` writer - Event detected 4"] -pub type EDS4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS5` reader - Event detected 5"] pub type EDS5_R = crate::BitReader; #[doc = "Field `EDS5` writer - Event detected 5"] -pub type EDS5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS6` reader - Event detected 6"] pub type EDS6_R = crate::BitReader; #[doc = "Field `EDS6` writer - Event detected 6"] -pub type EDS6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS7` reader - Event detected 7"] pub type EDS7_R = crate::BitReader; #[doc = "Field `EDS7` writer - Event detected 7"] -pub type EDS7_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS7_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS8` reader - Event detected 8"] pub type EDS8_R = crate::BitReader; #[doc = "Field `EDS8` writer - Event detected 8"] -pub type EDS8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS9` reader - Event detected 9"] pub type EDS9_R = crate::BitReader; #[doc = "Field `EDS9` writer - Event detected 9"] -pub type EDS9_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS9_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS10` reader - Event detected 10"] pub type EDS10_R = crate::BitReader; #[doc = "Field `EDS10` writer - Event detected 10"] -pub type EDS10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS11` reader - Event detected 11"] pub type EDS11_R = crate::BitReader; #[doc = "Field `EDS11` writer - Event detected 11"] -pub type EDS11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS12` reader - Event detected 12"] pub type EDS12_R = crate::BitReader; #[doc = "Field `EDS12` writer - Event detected 12"] -pub type EDS12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS13` reader - Event detected 13"] pub type EDS13_R = crate::BitReader; #[doc = "Field `EDS13` writer - Event detected 13"] -pub type EDS13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS14` reader - Event detected 14"] pub type EDS14_R = crate::BitReader; #[doc = "Field `EDS14` writer - Event detected 14"] -pub type EDS14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS15` reader - Event detected 15"] pub type EDS15_R = crate::BitReader; #[doc = "Field `EDS15` writer - Event detected 15"] -pub type EDS15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS15_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS16` reader - Event detected 16"] pub type EDS16_R = crate::BitReader; #[doc = "Field `EDS16` writer - Event detected 16"] -pub type EDS16_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS16_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS17` reader - Event detected 17"] pub type EDS17_R = crate::BitReader; #[doc = "Field `EDS17` writer - Event detected 17"] -pub type EDS17_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS17_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS18` reader - Event detected 18"] pub type EDS18_R = crate::BitReader; #[doc = "Field `EDS18` writer - Event detected 18"] -pub type EDS18_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS18_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS19` reader - Event detected 19"] pub type EDS19_R = crate::BitReader; #[doc = "Field `EDS19` writer - Event detected 19"] -pub type EDS19_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS19_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS20` reader - Event detected 20"] pub type EDS20_R = crate::BitReader; #[doc = "Field `EDS20` writer - Event detected 20"] -pub type EDS20_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS20_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS21` reader - Event detected 21"] pub type EDS21_R = crate::BitReader; #[doc = "Field `EDS21` writer - Event detected 21"] -pub type EDS21_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS21_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS22` reader - Event detected 22"] pub type EDS22_R = crate::BitReader; #[doc = "Field `EDS22` writer - Event detected 22"] -pub type EDS22_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS22_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS23` reader - Event detected 23"] pub type EDS23_R = crate::BitReader; #[doc = "Field `EDS23` writer - Event detected 23"] -pub type EDS23_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS23_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS24` reader - Event detected 24"] pub type EDS24_R = crate::BitReader; #[doc = "Field `EDS24` writer - Event detected 24"] -pub type EDS24_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS24_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS25` reader - Event detected 25"] pub type EDS25_R = crate::BitReader; #[doc = "Field `EDS25` writer - Event detected 25"] -pub type EDS25_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS25_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS26` reader - Event detected 26"] pub type EDS26_R = crate::BitReader; #[doc = "Field `EDS26` writer - Event detected 26"] -pub type EDS26_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS26_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS27` reader - Event detected 27"] pub type EDS27_R = crate::BitReader; #[doc = "Field `EDS27` writer - Event detected 27"] -pub type EDS27_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS27_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS28` reader - Event detected 28"] pub type EDS28_R = crate::BitReader; #[doc = "Field `EDS28` writer - Event detected 28"] -pub type EDS28_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS28_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS29` reader - Event detected 29"] pub type EDS29_R = crate::BitReader; #[doc = "Field `EDS29` writer - Event detected 29"] -pub type EDS29_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS29_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS30` reader - Event detected 30"] pub type EDS30_R = crate::BitReader; #[doc = "Field `EDS30` writer - Event detected 30"] -pub type EDS30_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS30_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS31` reader - Event detected 31"] pub type EDS31_R = crate::BitReader; #[doc = "Field `EDS31` writer - Event detected 31"] -pub type EDS31_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS31_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Event detected 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Event detected 0"] #[inline(always)] #[must_use] - pub fn eds0(&mut self) -> EDS0_W { - EDS0_W::new(self) + pub fn eds0(&mut self) -> EDS0_W { + EDS0_W::new(self, 0) } #[doc = "Bit 1 - Event detected 1"] #[inline(always)] #[must_use] - pub fn eds1(&mut self) -> EDS1_W { - EDS1_W::new(self) + pub fn eds1(&mut self) -> EDS1_W { + EDS1_W::new(self, 1) } #[doc = "Bit 2 - Event detected 2"] #[inline(always)] #[must_use] - pub fn eds2(&mut self) -> EDS2_W { - EDS2_W::new(self) + pub fn eds2(&mut self) -> EDS2_W { + EDS2_W::new(self, 2) } #[doc = "Bit 3 - Event detected 3"] #[inline(always)] #[must_use] - pub fn eds3(&mut self) -> EDS3_W { - EDS3_W::new(self) + pub fn eds3(&mut self) -> EDS3_W { + EDS3_W::new(self, 3) } #[doc = "Bit 4 - Event detected 4"] #[inline(always)] #[must_use] - pub fn eds4(&mut self) -> EDS4_W { - EDS4_W::new(self) + pub fn eds4(&mut self) -> EDS4_W { + EDS4_W::new(self, 4) } #[doc = "Bit 5 - Event detected 5"] #[inline(always)] #[must_use] - pub fn eds5(&mut self) -> EDS5_W { - EDS5_W::new(self) + pub fn eds5(&mut self) -> EDS5_W { + EDS5_W::new(self, 5) } #[doc = "Bit 6 - Event detected 6"] #[inline(always)] #[must_use] - pub fn eds6(&mut self) -> EDS6_W { - EDS6_W::new(self) + pub fn eds6(&mut self) -> EDS6_W { + EDS6_W::new(self, 6) } #[doc = "Bit 7 - Event detected 7"] #[inline(always)] #[must_use] - pub fn eds7(&mut self) -> EDS7_W { - EDS7_W::new(self) + pub fn eds7(&mut self) -> EDS7_W { + EDS7_W::new(self, 7) } #[doc = "Bit 8 - Event detected 8"] #[inline(always)] #[must_use] - pub fn eds8(&mut self) -> EDS8_W { - EDS8_W::new(self) + pub fn eds8(&mut self) -> EDS8_W { + EDS8_W::new(self, 8) } #[doc = "Bit 9 - Event detected 9"] #[inline(always)] #[must_use] - pub fn eds9(&mut self) -> EDS9_W { - EDS9_W::new(self) + pub fn eds9(&mut self) -> EDS9_W { + EDS9_W::new(self, 9) } #[doc = "Bit 10 - Event detected 10"] #[inline(always)] #[must_use] - pub fn eds10(&mut self) -> EDS10_W { - EDS10_W::new(self) + pub fn eds10(&mut self) -> EDS10_W { + EDS10_W::new(self, 10) } #[doc = "Bit 11 - Event detected 11"] #[inline(always)] #[must_use] - pub fn eds11(&mut self) -> EDS11_W { - EDS11_W::new(self) + pub fn eds11(&mut self) -> EDS11_W { + EDS11_W::new(self, 11) } #[doc = "Bit 12 - Event detected 12"] #[inline(always)] #[must_use] - pub fn eds12(&mut self) -> EDS12_W { - EDS12_W::new(self) + pub fn eds12(&mut self) -> EDS12_W { + EDS12_W::new(self, 12) } #[doc = "Bit 13 - Event detected 13"] #[inline(always)] #[must_use] - pub fn eds13(&mut self) -> EDS13_W { - EDS13_W::new(self) + pub fn eds13(&mut self) -> EDS13_W { + EDS13_W::new(self, 13) } #[doc = "Bit 14 - Event detected 14"] #[inline(always)] #[must_use] - pub fn eds14(&mut self) -> EDS14_W { - EDS14_W::new(self) + pub fn eds14(&mut self) -> EDS14_W { + EDS14_W::new(self, 14) } #[doc = "Bit 15 - Event detected 15"] #[inline(always)] #[must_use] - pub fn eds15(&mut self) -> EDS15_W { - EDS15_W::new(self) + pub fn eds15(&mut self) -> EDS15_W { + EDS15_W::new(self, 15) } #[doc = "Bit 16 - Event detected 16"] #[inline(always)] #[must_use] - pub fn eds16(&mut self) -> EDS16_W { - EDS16_W::new(self) + pub fn eds16(&mut self) -> EDS16_W { + EDS16_W::new(self, 16) } #[doc = "Bit 17 - Event detected 17"] #[inline(always)] #[must_use] - pub fn eds17(&mut self) -> EDS17_W { - EDS17_W::new(self) + pub fn eds17(&mut self) -> EDS17_W { + EDS17_W::new(self, 17) } #[doc = "Bit 18 - Event detected 18"] #[inline(always)] #[must_use] - pub fn eds18(&mut self) -> EDS18_W { - EDS18_W::new(self) + pub fn eds18(&mut self) -> EDS18_W { + EDS18_W::new(self, 18) } #[doc = "Bit 19 - Event detected 19"] #[inline(always)] #[must_use] - pub fn eds19(&mut self) -> EDS19_W { - EDS19_W::new(self) + pub fn eds19(&mut self) -> EDS19_W { + EDS19_W::new(self, 19) } #[doc = "Bit 20 - Event detected 20"] #[inline(always)] #[must_use] - pub fn eds20(&mut self) -> EDS20_W { - EDS20_W::new(self) + pub fn eds20(&mut self) -> EDS20_W { + EDS20_W::new(self, 20) } #[doc = "Bit 21 - Event detected 21"] #[inline(always)] #[must_use] - pub fn eds21(&mut self) -> EDS21_W { - EDS21_W::new(self) + pub fn eds21(&mut self) -> EDS21_W { + EDS21_W::new(self, 21) } #[doc = "Bit 22 - Event detected 22"] #[inline(always)] #[must_use] - pub fn eds22(&mut self) -> EDS22_W { - EDS22_W::new(self) + pub fn eds22(&mut self) -> EDS22_W { + EDS22_W::new(self, 22) } #[doc = "Bit 23 - Event detected 23"] #[inline(always)] #[must_use] - pub fn eds23(&mut self) -> EDS23_W { - EDS23_W::new(self) + pub fn eds23(&mut self) -> EDS23_W { + EDS23_W::new(self, 23) } #[doc = "Bit 24 - Event detected 24"] #[inline(always)] #[must_use] - pub fn eds24(&mut self) -> EDS24_W { - EDS24_W::new(self) + pub fn eds24(&mut self) -> EDS24_W { + EDS24_W::new(self, 24) } #[doc = "Bit 25 - Event detected 25"] #[inline(always)] #[must_use] - pub fn eds25(&mut self) -> EDS25_W { - EDS25_W::new(self) + pub fn eds25(&mut self) -> EDS25_W { + EDS25_W::new(self, 25) } #[doc = "Bit 26 - Event detected 26"] #[inline(always)] #[must_use] - pub fn eds26(&mut self) -> EDS26_W { - EDS26_W::new(self) + pub fn eds26(&mut self) -> EDS26_W { + EDS26_W::new(self, 26) } #[doc = "Bit 27 - Event detected 27"] #[inline(always)] #[must_use] - pub fn eds27(&mut self) -> EDS27_W { - EDS27_W::new(self) + pub fn eds27(&mut self) -> EDS27_W { + EDS27_W::new(self, 27) } #[doc = "Bit 28 - Event detected 28"] #[inline(always)] #[must_use] - pub fn eds28(&mut self) -> EDS28_W { - EDS28_W::new(self) + pub fn eds28(&mut self) -> EDS28_W { + EDS28_W::new(self, 28) } #[doc = "Bit 29 - Event detected 29"] #[inline(always)] #[must_use] - pub fn eds29(&mut self) -> EDS29_W { - EDS29_W::new(self) + pub fn eds29(&mut self) -> EDS29_W { + EDS29_W::new(self, 29) } #[doc = "Bit 30 - Event detected 30"] #[inline(always)] #[must_use] - pub fn eds30(&mut self) -> EDS30_W { - EDS30_W::new(self) + pub fn eds30(&mut self) -> EDS30_W { + EDS30_W::new(self, 30) } #[doc = "Bit 31 - Event detected 31"] #[inline(always)] #[must_use] - pub fn eds31(&mut self) -> EDS31_W { - EDS31_W::new(self) + pub fn eds31(&mut self) -> EDS31_W { + EDS31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpeds1.rs b/crates/bcm2837-lpa/src/gpio/gpeds1.rs index ac728c0..b6ca4fd 100644 --- a/crates/bcm2837-lpa/src/gpio/gpeds1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpeds1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `EDS32` reader - Event detected 32"] pub type EDS32_R = crate::BitReader; #[doc = "Field `EDS32` writer - Event detected 32"] -pub type EDS32_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS32_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS33` reader - Event detected 33"] pub type EDS33_R = crate::BitReader; #[doc = "Field `EDS33` writer - Event detected 33"] -pub type EDS33_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS33_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS34` reader - Event detected 34"] pub type EDS34_R = crate::BitReader; #[doc = "Field `EDS34` writer - Event detected 34"] -pub type EDS34_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS34_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS35` reader - Event detected 35"] pub type EDS35_R = crate::BitReader; #[doc = "Field `EDS35` writer - Event detected 35"] -pub type EDS35_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS35_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS36` reader - Event detected 36"] pub type EDS36_R = crate::BitReader; #[doc = "Field `EDS36` writer - Event detected 36"] -pub type EDS36_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS36_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS37` reader - Event detected 37"] pub type EDS37_R = crate::BitReader; #[doc = "Field `EDS37` writer - Event detected 37"] -pub type EDS37_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS37_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS38` reader - Event detected 38"] pub type EDS38_R = crate::BitReader; #[doc = "Field `EDS38` writer - Event detected 38"] -pub type EDS38_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS38_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS39` reader - Event detected 39"] pub type EDS39_R = crate::BitReader; #[doc = "Field `EDS39` writer - Event detected 39"] -pub type EDS39_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS39_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS40` reader - Event detected 40"] pub type EDS40_R = crate::BitReader; #[doc = "Field `EDS40` writer - Event detected 40"] -pub type EDS40_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS40_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS41` reader - Event detected 41"] pub type EDS41_R = crate::BitReader; #[doc = "Field `EDS41` writer - Event detected 41"] -pub type EDS41_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS41_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS42` reader - Event detected 42"] pub type EDS42_R = crate::BitReader; #[doc = "Field `EDS42` writer - Event detected 42"] -pub type EDS42_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS42_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS43` reader - Event detected 43"] pub type EDS43_R = crate::BitReader; #[doc = "Field `EDS43` writer - Event detected 43"] -pub type EDS43_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS43_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS44` reader - Event detected 44"] pub type EDS44_R = crate::BitReader; #[doc = "Field `EDS44` writer - Event detected 44"] -pub type EDS44_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS44_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS45` reader - Event detected 45"] pub type EDS45_R = crate::BitReader; #[doc = "Field `EDS45` writer - Event detected 45"] -pub type EDS45_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS45_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS46` reader - Event detected 46"] pub type EDS46_R = crate::BitReader; #[doc = "Field `EDS46` writer - Event detected 46"] -pub type EDS46_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS46_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS47` reader - Event detected 47"] pub type EDS47_R = crate::BitReader; #[doc = "Field `EDS47` writer - Event detected 47"] -pub type EDS47_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS47_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS48` reader - Event detected 48"] pub type EDS48_R = crate::BitReader; #[doc = "Field `EDS48` writer - Event detected 48"] -pub type EDS48_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS48_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS49` reader - Event detected 49"] pub type EDS49_R = crate::BitReader; #[doc = "Field `EDS49` writer - Event detected 49"] -pub type EDS49_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS49_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS50` reader - Event detected 50"] pub type EDS50_R = crate::BitReader; #[doc = "Field `EDS50` writer - Event detected 50"] -pub type EDS50_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS50_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS51` reader - Event detected 51"] pub type EDS51_R = crate::BitReader; #[doc = "Field `EDS51` writer - Event detected 51"] -pub type EDS51_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS51_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS52` reader - Event detected 52"] pub type EDS52_R = crate::BitReader; #[doc = "Field `EDS52` writer - Event detected 52"] -pub type EDS52_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS52_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EDS53` reader - Event detected 53"] pub type EDS53_R = crate::BitReader; #[doc = "Field `EDS53` writer - Event detected 53"] -pub type EDS53_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EDS53_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Event detected 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Event detected 32"] #[inline(always)] #[must_use] - pub fn eds32(&mut self) -> EDS32_W { - EDS32_W::new(self) + pub fn eds32(&mut self) -> EDS32_W { + EDS32_W::new(self, 0) } #[doc = "Bit 1 - Event detected 33"] #[inline(always)] #[must_use] - pub fn eds33(&mut self) -> EDS33_W { - EDS33_W::new(self) + pub fn eds33(&mut self) -> EDS33_W { + EDS33_W::new(self, 1) } #[doc = "Bit 2 - Event detected 34"] #[inline(always)] #[must_use] - pub fn eds34(&mut self) -> EDS34_W { - EDS34_W::new(self) + pub fn eds34(&mut self) -> EDS34_W { + EDS34_W::new(self, 2) } #[doc = "Bit 3 - Event detected 35"] #[inline(always)] #[must_use] - pub fn eds35(&mut self) -> EDS35_W { - EDS35_W::new(self) + pub fn eds35(&mut self) -> EDS35_W { + EDS35_W::new(self, 3) } #[doc = "Bit 4 - Event detected 36"] #[inline(always)] #[must_use] - pub fn eds36(&mut self) -> EDS36_W { - EDS36_W::new(self) + pub fn eds36(&mut self) -> EDS36_W { + EDS36_W::new(self, 4) } #[doc = "Bit 5 - Event detected 37"] #[inline(always)] #[must_use] - pub fn eds37(&mut self) -> EDS37_W { - EDS37_W::new(self) + pub fn eds37(&mut self) -> EDS37_W { + EDS37_W::new(self, 5) } #[doc = "Bit 6 - Event detected 38"] #[inline(always)] #[must_use] - pub fn eds38(&mut self) -> EDS38_W { - EDS38_W::new(self) + pub fn eds38(&mut self) -> EDS38_W { + EDS38_W::new(self, 6) } #[doc = "Bit 7 - Event detected 39"] #[inline(always)] #[must_use] - pub fn eds39(&mut self) -> EDS39_W { - EDS39_W::new(self) + pub fn eds39(&mut self) -> EDS39_W { + EDS39_W::new(self, 7) } #[doc = "Bit 8 - Event detected 40"] #[inline(always)] #[must_use] - pub fn eds40(&mut self) -> EDS40_W { - EDS40_W::new(self) + pub fn eds40(&mut self) -> EDS40_W { + EDS40_W::new(self, 8) } #[doc = "Bit 9 - Event detected 41"] #[inline(always)] #[must_use] - pub fn eds41(&mut self) -> EDS41_W { - EDS41_W::new(self) + pub fn eds41(&mut self) -> EDS41_W { + EDS41_W::new(self, 9) } #[doc = "Bit 10 - Event detected 42"] #[inline(always)] #[must_use] - pub fn eds42(&mut self) -> EDS42_W { - EDS42_W::new(self) + pub fn eds42(&mut self) -> EDS42_W { + EDS42_W::new(self, 10) } #[doc = "Bit 11 - Event detected 43"] #[inline(always)] #[must_use] - pub fn eds43(&mut self) -> EDS43_W { - EDS43_W::new(self) + pub fn eds43(&mut self) -> EDS43_W { + EDS43_W::new(self, 11) } #[doc = "Bit 12 - Event detected 44"] #[inline(always)] #[must_use] - pub fn eds44(&mut self) -> EDS44_W { - EDS44_W::new(self) + pub fn eds44(&mut self) -> EDS44_W { + EDS44_W::new(self, 12) } #[doc = "Bit 13 - Event detected 45"] #[inline(always)] #[must_use] - pub fn eds45(&mut self) -> EDS45_W { - EDS45_W::new(self) + pub fn eds45(&mut self) -> EDS45_W { + EDS45_W::new(self, 13) } #[doc = "Bit 14 - Event detected 46"] #[inline(always)] #[must_use] - pub fn eds46(&mut self) -> EDS46_W { - EDS46_W::new(self) + pub fn eds46(&mut self) -> EDS46_W { + EDS46_W::new(self, 14) } #[doc = "Bit 15 - Event detected 47"] #[inline(always)] #[must_use] - pub fn eds47(&mut self) -> EDS47_W { - EDS47_W::new(self) + pub fn eds47(&mut self) -> EDS47_W { + EDS47_W::new(self, 15) } #[doc = "Bit 16 - Event detected 48"] #[inline(always)] #[must_use] - pub fn eds48(&mut self) -> EDS48_W { - EDS48_W::new(self) + pub fn eds48(&mut self) -> EDS48_W { + EDS48_W::new(self, 16) } #[doc = "Bit 17 - Event detected 49"] #[inline(always)] #[must_use] - pub fn eds49(&mut self) -> EDS49_W { - EDS49_W::new(self) + pub fn eds49(&mut self) -> EDS49_W { + EDS49_W::new(self, 17) } #[doc = "Bit 18 - Event detected 50"] #[inline(always)] #[must_use] - pub fn eds50(&mut self) -> EDS50_W { - EDS50_W::new(self) + pub fn eds50(&mut self) -> EDS50_W { + EDS50_W::new(self, 18) } #[doc = "Bit 19 - Event detected 51"] #[inline(always)] #[must_use] - pub fn eds51(&mut self) -> EDS51_W { - EDS51_W::new(self) + pub fn eds51(&mut self) -> EDS51_W { + EDS51_W::new(self, 19) } #[doc = "Bit 20 - Event detected 52"] #[inline(always)] #[must_use] - pub fn eds52(&mut self) -> EDS52_W { - EDS52_W::new(self) + pub fn eds52(&mut self) -> EDS52_W { + EDS52_W::new(self, 20) } #[doc = "Bit 21 - Event detected 53"] #[inline(always)] #[must_use] - pub fn eds53(&mut self) -> EDS53_W { - EDS53_W::new(self) + pub fn eds53(&mut self) -> EDS53_W { + EDS53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfen0.rs b/crates/bcm2837-lpa/src/gpio/gpfen0.rs index abcf609..511158e 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfen0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `FEN0` reader - Falling edge enabled 0"] pub type FEN0_R = crate::BitReader; #[doc = "Field `FEN0` writer - Falling edge enabled 0"] -pub type FEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN1` reader - Falling edge enabled 1"] pub type FEN1_R = crate::BitReader; #[doc = "Field `FEN1` writer - Falling edge enabled 1"] -pub type FEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN2` reader - Falling edge enabled 2"] pub type FEN2_R = crate::BitReader; #[doc = "Field `FEN2` writer - Falling edge enabled 2"] -pub type FEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN3` reader - Falling edge enabled 3"] pub type FEN3_R = crate::BitReader; #[doc = "Field `FEN3` writer - Falling edge enabled 3"] -pub type FEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN4` reader - Falling edge enabled 4"] pub type FEN4_R = crate::BitReader; #[doc = "Field `FEN4` writer - Falling edge enabled 4"] -pub type FEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN5` reader - Falling edge enabled 5"] pub type FEN5_R = crate::BitReader; #[doc = "Field `FEN5` writer - Falling edge enabled 5"] -pub type FEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN6` reader - Falling edge enabled 6"] pub type FEN6_R = crate::BitReader; #[doc = "Field `FEN6` writer - Falling edge enabled 6"] -pub type FEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN7` reader - Falling edge enabled 7"] pub type FEN7_R = crate::BitReader; #[doc = "Field `FEN7` writer - Falling edge enabled 7"] -pub type FEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN8` reader - Falling edge enabled 8"] pub type FEN8_R = crate::BitReader; #[doc = "Field `FEN8` writer - Falling edge enabled 8"] -pub type FEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN9` reader - Falling edge enabled 9"] pub type FEN9_R = crate::BitReader; #[doc = "Field `FEN9` writer - Falling edge enabled 9"] -pub type FEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN10` reader - Falling edge enabled 10"] pub type FEN10_R = crate::BitReader; #[doc = "Field `FEN10` writer - Falling edge enabled 10"] -pub type FEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN11` reader - Falling edge enabled 11"] pub type FEN11_R = crate::BitReader; #[doc = "Field `FEN11` writer - Falling edge enabled 11"] -pub type FEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN12` reader - Falling edge enabled 12"] pub type FEN12_R = crate::BitReader; #[doc = "Field `FEN12` writer - Falling edge enabled 12"] -pub type FEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN13` reader - Falling edge enabled 13"] pub type FEN13_R = crate::BitReader; #[doc = "Field `FEN13` writer - Falling edge enabled 13"] -pub type FEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN14` reader - Falling edge enabled 14"] pub type FEN14_R = crate::BitReader; #[doc = "Field `FEN14` writer - Falling edge enabled 14"] -pub type FEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN15` reader - Falling edge enabled 15"] pub type FEN15_R = crate::BitReader; #[doc = "Field `FEN15` writer - Falling edge enabled 15"] -pub type FEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN16` reader - Falling edge enabled 16"] pub type FEN16_R = crate::BitReader; #[doc = "Field `FEN16` writer - Falling edge enabled 16"] -pub type FEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN17` reader - Falling edge enabled 17"] pub type FEN17_R = crate::BitReader; #[doc = "Field `FEN17` writer - Falling edge enabled 17"] -pub type FEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN18` reader - Falling edge enabled 18"] pub type FEN18_R = crate::BitReader; #[doc = "Field `FEN18` writer - Falling edge enabled 18"] -pub type FEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN19` reader - Falling edge enabled 19"] pub type FEN19_R = crate::BitReader; #[doc = "Field `FEN19` writer - Falling edge enabled 19"] -pub type FEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN20` reader - Falling edge enabled 20"] pub type FEN20_R = crate::BitReader; #[doc = "Field `FEN20` writer - Falling edge enabled 20"] -pub type FEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN21` reader - Falling edge enabled 21"] pub type FEN21_R = crate::BitReader; #[doc = "Field `FEN21` writer - Falling edge enabled 21"] -pub type FEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN22` reader - Falling edge enabled 22"] pub type FEN22_R = crate::BitReader; #[doc = "Field `FEN22` writer - Falling edge enabled 22"] -pub type FEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN23` reader - Falling edge enabled 23"] pub type FEN23_R = crate::BitReader; #[doc = "Field `FEN23` writer - Falling edge enabled 23"] -pub type FEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN24` reader - Falling edge enabled 24"] pub type FEN24_R = crate::BitReader; #[doc = "Field `FEN24` writer - Falling edge enabled 24"] -pub type FEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN25` reader - Falling edge enabled 25"] pub type FEN25_R = crate::BitReader; #[doc = "Field `FEN25` writer - Falling edge enabled 25"] -pub type FEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN26` reader - Falling edge enabled 26"] pub type FEN26_R = crate::BitReader; #[doc = "Field `FEN26` writer - Falling edge enabled 26"] -pub type FEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN27` reader - Falling edge enabled 27"] pub type FEN27_R = crate::BitReader; #[doc = "Field `FEN27` writer - Falling edge enabled 27"] -pub type FEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN28` reader - Falling edge enabled 28"] pub type FEN28_R = crate::BitReader; #[doc = "Field `FEN28` writer - Falling edge enabled 28"] -pub type FEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN29` reader - Falling edge enabled 29"] pub type FEN29_R = crate::BitReader; #[doc = "Field `FEN29` writer - Falling edge enabled 29"] -pub type FEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN30` reader - Falling edge enabled 30"] pub type FEN30_R = crate::BitReader; #[doc = "Field `FEN30` writer - Falling edge enabled 30"] -pub type FEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN31` reader - Falling edge enabled 31"] pub type FEN31_R = crate::BitReader; #[doc = "Field `FEN31` writer - Falling edge enabled 31"] -pub type FEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Falling edge enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Falling edge enabled 0"] #[inline(always)] #[must_use] - pub fn fen0(&mut self) -> FEN0_W { - FEN0_W::new(self) + pub fn fen0(&mut self) -> FEN0_W { + FEN0_W::new(self, 0) } #[doc = "Bit 1 - Falling edge enabled 1"] #[inline(always)] #[must_use] - pub fn fen1(&mut self) -> FEN1_W { - FEN1_W::new(self) + pub fn fen1(&mut self) -> FEN1_W { + FEN1_W::new(self, 1) } #[doc = "Bit 2 - Falling edge enabled 2"] #[inline(always)] #[must_use] - pub fn fen2(&mut self) -> FEN2_W { - FEN2_W::new(self) + pub fn fen2(&mut self) -> FEN2_W { + FEN2_W::new(self, 2) } #[doc = "Bit 3 - Falling edge enabled 3"] #[inline(always)] #[must_use] - pub fn fen3(&mut self) -> FEN3_W { - FEN3_W::new(self) + pub fn fen3(&mut self) -> FEN3_W { + FEN3_W::new(self, 3) } #[doc = "Bit 4 - Falling edge enabled 4"] #[inline(always)] #[must_use] - pub fn fen4(&mut self) -> FEN4_W { - FEN4_W::new(self) + pub fn fen4(&mut self) -> FEN4_W { + FEN4_W::new(self, 4) } #[doc = "Bit 5 - Falling edge enabled 5"] #[inline(always)] #[must_use] - pub fn fen5(&mut self) -> FEN5_W { - FEN5_W::new(self) + pub fn fen5(&mut self) -> FEN5_W { + FEN5_W::new(self, 5) } #[doc = "Bit 6 - Falling edge enabled 6"] #[inline(always)] #[must_use] - pub fn fen6(&mut self) -> FEN6_W { - FEN6_W::new(self) + pub fn fen6(&mut self) -> FEN6_W { + FEN6_W::new(self, 6) } #[doc = "Bit 7 - Falling edge enabled 7"] #[inline(always)] #[must_use] - pub fn fen7(&mut self) -> FEN7_W { - FEN7_W::new(self) + pub fn fen7(&mut self) -> FEN7_W { + FEN7_W::new(self, 7) } #[doc = "Bit 8 - Falling edge enabled 8"] #[inline(always)] #[must_use] - pub fn fen8(&mut self) -> FEN8_W { - FEN8_W::new(self) + pub fn fen8(&mut self) -> FEN8_W { + FEN8_W::new(self, 8) } #[doc = "Bit 9 - Falling edge enabled 9"] #[inline(always)] #[must_use] - pub fn fen9(&mut self) -> FEN9_W { - FEN9_W::new(self) + pub fn fen9(&mut self) -> FEN9_W { + FEN9_W::new(self, 9) } #[doc = "Bit 10 - Falling edge enabled 10"] #[inline(always)] #[must_use] - pub fn fen10(&mut self) -> FEN10_W { - FEN10_W::new(self) + pub fn fen10(&mut self) -> FEN10_W { + FEN10_W::new(self, 10) } #[doc = "Bit 11 - Falling edge enabled 11"] #[inline(always)] #[must_use] - pub fn fen11(&mut self) -> FEN11_W { - FEN11_W::new(self) + pub fn fen11(&mut self) -> FEN11_W { + FEN11_W::new(self, 11) } #[doc = "Bit 12 - Falling edge enabled 12"] #[inline(always)] #[must_use] - pub fn fen12(&mut self) -> FEN12_W { - FEN12_W::new(self) + pub fn fen12(&mut self) -> FEN12_W { + FEN12_W::new(self, 12) } #[doc = "Bit 13 - Falling edge enabled 13"] #[inline(always)] #[must_use] - pub fn fen13(&mut self) -> FEN13_W { - FEN13_W::new(self) + pub fn fen13(&mut self) -> FEN13_W { + FEN13_W::new(self, 13) } #[doc = "Bit 14 - Falling edge enabled 14"] #[inline(always)] #[must_use] - pub fn fen14(&mut self) -> FEN14_W { - FEN14_W::new(self) + pub fn fen14(&mut self) -> FEN14_W { + FEN14_W::new(self, 14) } #[doc = "Bit 15 - Falling edge enabled 15"] #[inline(always)] #[must_use] - pub fn fen15(&mut self) -> FEN15_W { - FEN15_W::new(self) + pub fn fen15(&mut self) -> FEN15_W { + FEN15_W::new(self, 15) } #[doc = "Bit 16 - Falling edge enabled 16"] #[inline(always)] #[must_use] - pub fn fen16(&mut self) -> FEN16_W { - FEN16_W::new(self) + pub fn fen16(&mut self) -> FEN16_W { + FEN16_W::new(self, 16) } #[doc = "Bit 17 - Falling edge enabled 17"] #[inline(always)] #[must_use] - pub fn fen17(&mut self) -> FEN17_W { - FEN17_W::new(self) + pub fn fen17(&mut self) -> FEN17_W { + FEN17_W::new(self, 17) } #[doc = "Bit 18 - Falling edge enabled 18"] #[inline(always)] #[must_use] - pub fn fen18(&mut self) -> FEN18_W { - FEN18_W::new(self) + pub fn fen18(&mut self) -> FEN18_W { + FEN18_W::new(self, 18) } #[doc = "Bit 19 - Falling edge enabled 19"] #[inline(always)] #[must_use] - pub fn fen19(&mut self) -> FEN19_W { - FEN19_W::new(self) + pub fn fen19(&mut self) -> FEN19_W { + FEN19_W::new(self, 19) } #[doc = "Bit 20 - Falling edge enabled 20"] #[inline(always)] #[must_use] - pub fn fen20(&mut self) -> FEN20_W { - FEN20_W::new(self) + pub fn fen20(&mut self) -> FEN20_W { + FEN20_W::new(self, 20) } #[doc = "Bit 21 - Falling edge enabled 21"] #[inline(always)] #[must_use] - pub fn fen21(&mut self) -> FEN21_W { - FEN21_W::new(self) + pub fn fen21(&mut self) -> FEN21_W { + FEN21_W::new(self, 21) } #[doc = "Bit 22 - Falling edge enabled 22"] #[inline(always)] #[must_use] - pub fn fen22(&mut self) -> FEN22_W { - FEN22_W::new(self) + pub fn fen22(&mut self) -> FEN22_W { + FEN22_W::new(self, 22) } #[doc = "Bit 23 - Falling edge enabled 23"] #[inline(always)] #[must_use] - pub fn fen23(&mut self) -> FEN23_W { - FEN23_W::new(self) + pub fn fen23(&mut self) -> FEN23_W { + FEN23_W::new(self, 23) } #[doc = "Bit 24 - Falling edge enabled 24"] #[inline(always)] #[must_use] - pub fn fen24(&mut self) -> FEN24_W { - FEN24_W::new(self) + pub fn fen24(&mut self) -> FEN24_W { + FEN24_W::new(self, 24) } #[doc = "Bit 25 - Falling edge enabled 25"] #[inline(always)] #[must_use] - pub fn fen25(&mut self) -> FEN25_W { - FEN25_W::new(self) + pub fn fen25(&mut self) -> FEN25_W { + FEN25_W::new(self, 25) } #[doc = "Bit 26 - Falling edge enabled 26"] #[inline(always)] #[must_use] - pub fn fen26(&mut self) -> FEN26_W { - FEN26_W::new(self) + pub fn fen26(&mut self) -> FEN26_W { + FEN26_W::new(self, 26) } #[doc = "Bit 27 - Falling edge enabled 27"] #[inline(always)] #[must_use] - pub fn fen27(&mut self) -> FEN27_W { - FEN27_W::new(self) + pub fn fen27(&mut self) -> FEN27_W { + FEN27_W::new(self, 27) } #[doc = "Bit 28 - Falling edge enabled 28"] #[inline(always)] #[must_use] - pub fn fen28(&mut self) -> FEN28_W { - FEN28_W::new(self) + pub fn fen28(&mut self) -> FEN28_W { + FEN28_W::new(self, 28) } #[doc = "Bit 29 - Falling edge enabled 29"] #[inline(always)] #[must_use] - pub fn fen29(&mut self) -> FEN29_W { - FEN29_W::new(self) + pub fn fen29(&mut self) -> FEN29_W { + FEN29_W::new(self, 29) } #[doc = "Bit 30 - Falling edge enabled 30"] #[inline(always)] #[must_use] - pub fn fen30(&mut self) -> FEN30_W { - FEN30_W::new(self) + pub fn fen30(&mut self) -> FEN30_W { + FEN30_W::new(self, 30) } #[doc = "Bit 31 - Falling edge enabled 31"] #[inline(always)] #[must_use] - pub fn fen31(&mut self) -> FEN31_W { - FEN31_W::new(self) + pub fn fen31(&mut self) -> FEN31_W { + FEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfen1.rs b/crates/bcm2837-lpa/src/gpio/gpfen1.rs index d0e94e8..285d880 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfen1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `FEN32` reader - Falling edge enabled 32"] pub type FEN32_R = crate::BitReader; #[doc = "Field `FEN32` writer - Falling edge enabled 32"] -pub type FEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN33` reader - Falling edge enabled 33"] pub type FEN33_R = crate::BitReader; #[doc = "Field `FEN33` writer - Falling edge enabled 33"] -pub type FEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN34` reader - Falling edge enabled 34"] pub type FEN34_R = crate::BitReader; #[doc = "Field `FEN34` writer - Falling edge enabled 34"] -pub type FEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN35` reader - Falling edge enabled 35"] pub type FEN35_R = crate::BitReader; #[doc = "Field `FEN35` writer - Falling edge enabled 35"] -pub type FEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN36` reader - Falling edge enabled 36"] pub type FEN36_R = crate::BitReader; #[doc = "Field `FEN36` writer - Falling edge enabled 36"] -pub type FEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN37` reader - Falling edge enabled 37"] pub type FEN37_R = crate::BitReader; #[doc = "Field `FEN37` writer - Falling edge enabled 37"] -pub type FEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN38` reader - Falling edge enabled 38"] pub type FEN38_R = crate::BitReader; #[doc = "Field `FEN38` writer - Falling edge enabled 38"] -pub type FEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN39` reader - Falling edge enabled 39"] pub type FEN39_R = crate::BitReader; #[doc = "Field `FEN39` writer - Falling edge enabled 39"] -pub type FEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN40` reader - Falling edge enabled 40"] pub type FEN40_R = crate::BitReader; #[doc = "Field `FEN40` writer - Falling edge enabled 40"] -pub type FEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN41` reader - Falling edge enabled 41"] pub type FEN41_R = crate::BitReader; #[doc = "Field `FEN41` writer - Falling edge enabled 41"] -pub type FEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN42` reader - Falling edge enabled 42"] pub type FEN42_R = crate::BitReader; #[doc = "Field `FEN42` writer - Falling edge enabled 42"] -pub type FEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN43` reader - Falling edge enabled 43"] pub type FEN43_R = crate::BitReader; #[doc = "Field `FEN43` writer - Falling edge enabled 43"] -pub type FEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN44` reader - Falling edge enabled 44"] pub type FEN44_R = crate::BitReader; #[doc = "Field `FEN44` writer - Falling edge enabled 44"] -pub type FEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN45` reader - Falling edge enabled 45"] pub type FEN45_R = crate::BitReader; #[doc = "Field `FEN45` writer - Falling edge enabled 45"] -pub type FEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN46` reader - Falling edge enabled 46"] pub type FEN46_R = crate::BitReader; #[doc = "Field `FEN46` writer - Falling edge enabled 46"] -pub type FEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN47` reader - Falling edge enabled 47"] pub type FEN47_R = crate::BitReader; #[doc = "Field `FEN47` writer - Falling edge enabled 47"] -pub type FEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN48` reader - Falling edge enabled 48"] pub type FEN48_R = crate::BitReader; #[doc = "Field `FEN48` writer - Falling edge enabled 48"] -pub type FEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN49` reader - Falling edge enabled 49"] pub type FEN49_R = crate::BitReader; #[doc = "Field `FEN49` writer - Falling edge enabled 49"] -pub type FEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN50` reader - Falling edge enabled 50"] pub type FEN50_R = crate::BitReader; #[doc = "Field `FEN50` writer - Falling edge enabled 50"] -pub type FEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN51` reader - Falling edge enabled 51"] pub type FEN51_R = crate::BitReader; #[doc = "Field `FEN51` writer - Falling edge enabled 51"] -pub type FEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN52` reader - Falling edge enabled 52"] pub type FEN52_R = crate::BitReader; #[doc = "Field `FEN52` writer - Falling edge enabled 52"] -pub type FEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN53` reader - Falling edge enabled 53"] pub type FEN53_R = crate::BitReader; #[doc = "Field `FEN53` writer - Falling edge enabled 53"] -pub type FEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Falling edge enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Falling edge enabled 32"] #[inline(always)] #[must_use] - pub fn fen32(&mut self) -> FEN32_W { - FEN32_W::new(self) + pub fn fen32(&mut self) -> FEN32_W { + FEN32_W::new(self, 0) } #[doc = "Bit 1 - Falling edge enabled 33"] #[inline(always)] #[must_use] - pub fn fen33(&mut self) -> FEN33_W { - FEN33_W::new(self) + pub fn fen33(&mut self) -> FEN33_W { + FEN33_W::new(self, 1) } #[doc = "Bit 2 - Falling edge enabled 34"] #[inline(always)] #[must_use] - pub fn fen34(&mut self) -> FEN34_W { - FEN34_W::new(self) + pub fn fen34(&mut self) -> FEN34_W { + FEN34_W::new(self, 2) } #[doc = "Bit 3 - Falling edge enabled 35"] #[inline(always)] #[must_use] - pub fn fen35(&mut self) -> FEN35_W { - FEN35_W::new(self) + pub fn fen35(&mut self) -> FEN35_W { + FEN35_W::new(self, 3) } #[doc = "Bit 4 - Falling edge enabled 36"] #[inline(always)] #[must_use] - pub fn fen36(&mut self) -> FEN36_W { - FEN36_W::new(self) + pub fn fen36(&mut self) -> FEN36_W { + FEN36_W::new(self, 4) } #[doc = "Bit 5 - Falling edge enabled 37"] #[inline(always)] #[must_use] - pub fn fen37(&mut self) -> FEN37_W { - FEN37_W::new(self) + pub fn fen37(&mut self) -> FEN37_W { + FEN37_W::new(self, 5) } #[doc = "Bit 6 - Falling edge enabled 38"] #[inline(always)] #[must_use] - pub fn fen38(&mut self) -> FEN38_W { - FEN38_W::new(self) + pub fn fen38(&mut self) -> FEN38_W { + FEN38_W::new(self, 6) } #[doc = "Bit 7 - Falling edge enabled 39"] #[inline(always)] #[must_use] - pub fn fen39(&mut self) -> FEN39_W { - FEN39_W::new(self) + pub fn fen39(&mut self) -> FEN39_W { + FEN39_W::new(self, 7) } #[doc = "Bit 8 - Falling edge enabled 40"] #[inline(always)] #[must_use] - pub fn fen40(&mut self) -> FEN40_W { - FEN40_W::new(self) + pub fn fen40(&mut self) -> FEN40_W { + FEN40_W::new(self, 8) } #[doc = "Bit 9 - Falling edge enabled 41"] #[inline(always)] #[must_use] - pub fn fen41(&mut self) -> FEN41_W { - FEN41_W::new(self) + pub fn fen41(&mut self) -> FEN41_W { + FEN41_W::new(self, 9) } #[doc = "Bit 10 - Falling edge enabled 42"] #[inline(always)] #[must_use] - pub fn fen42(&mut self) -> FEN42_W { - FEN42_W::new(self) + pub fn fen42(&mut self) -> FEN42_W { + FEN42_W::new(self, 10) } #[doc = "Bit 11 - Falling edge enabled 43"] #[inline(always)] #[must_use] - pub fn fen43(&mut self) -> FEN43_W { - FEN43_W::new(self) + pub fn fen43(&mut self) -> FEN43_W { + FEN43_W::new(self, 11) } #[doc = "Bit 12 - Falling edge enabled 44"] #[inline(always)] #[must_use] - pub fn fen44(&mut self) -> FEN44_W { - FEN44_W::new(self) + pub fn fen44(&mut self) -> FEN44_W { + FEN44_W::new(self, 12) } #[doc = "Bit 13 - Falling edge enabled 45"] #[inline(always)] #[must_use] - pub fn fen45(&mut self) -> FEN45_W { - FEN45_W::new(self) + pub fn fen45(&mut self) -> FEN45_W { + FEN45_W::new(self, 13) } #[doc = "Bit 14 - Falling edge enabled 46"] #[inline(always)] #[must_use] - pub fn fen46(&mut self) -> FEN46_W { - FEN46_W::new(self) + pub fn fen46(&mut self) -> FEN46_W { + FEN46_W::new(self, 14) } #[doc = "Bit 15 - Falling edge enabled 47"] #[inline(always)] #[must_use] - pub fn fen47(&mut self) -> FEN47_W { - FEN47_W::new(self) + pub fn fen47(&mut self) -> FEN47_W { + FEN47_W::new(self, 15) } #[doc = "Bit 16 - Falling edge enabled 48"] #[inline(always)] #[must_use] - pub fn fen48(&mut self) -> FEN48_W { - FEN48_W::new(self) + pub fn fen48(&mut self) -> FEN48_W { + FEN48_W::new(self, 16) } #[doc = "Bit 17 - Falling edge enabled 49"] #[inline(always)] #[must_use] - pub fn fen49(&mut self) -> FEN49_W { - FEN49_W::new(self) + pub fn fen49(&mut self) -> FEN49_W { + FEN49_W::new(self, 17) } #[doc = "Bit 18 - Falling edge enabled 50"] #[inline(always)] #[must_use] - pub fn fen50(&mut self) -> FEN50_W { - FEN50_W::new(self) + pub fn fen50(&mut self) -> FEN50_W { + FEN50_W::new(self, 18) } #[doc = "Bit 19 - Falling edge enabled 51"] #[inline(always)] #[must_use] - pub fn fen51(&mut self) -> FEN51_W { - FEN51_W::new(self) + pub fn fen51(&mut self) -> FEN51_W { + FEN51_W::new(self, 19) } #[doc = "Bit 20 - Falling edge enabled 52"] #[inline(always)] #[must_use] - pub fn fen52(&mut self) -> FEN52_W { - FEN52_W::new(self) + pub fn fen52(&mut self) -> FEN52_W { + FEN52_W::new(self, 20) } #[doc = "Bit 21 - Falling edge enabled 53"] #[inline(always)] #[must_use] - pub fn fen53(&mut self) -> FEN53_W { - FEN53_W::new(self) + pub fn fen53(&mut self) -> FEN53_W { + FEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfsel0.rs b/crates/bcm2837-lpa/src/gpio/gpfsel0.rs index dcdf15a..1fe49c7 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfsel0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfsel0.rs @@ -92,8 +92,8 @@ impl FSEL0_R { } } #[doc = "Field `FSEL0` writer - Function Select 0"] -pub type FSEL0_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL0_A>; -impl<'a, REG, const O: u8> FSEL0_W<'a, REG, O> +pub type FSEL0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL0_A>; +impl<'a, REG> FSEL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL1_R { } } #[doc = "Field `FSEL1` writer - Function Select 1"] -pub type FSEL1_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL1_A>; -impl<'a, REG, const O: u8> FSEL1_W<'a, REG, O> +pub type FSEL1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL1_A>; +impl<'a, REG> FSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL2_R { } } #[doc = "Field `FSEL2` writer - Function Select 2"] -pub type FSEL2_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL2_A>; -impl<'a, REG, const O: u8> FSEL2_W<'a, REG, O> +pub type FSEL2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL2_A>; +impl<'a, REG> FSEL2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL3_R { } } #[doc = "Field `FSEL3` writer - Function Select 3"] -pub type FSEL3_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL3_A>; -impl<'a, REG, const O: u8> FSEL3_W<'a, REG, O> +pub type FSEL3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL3_A>; +impl<'a, REG> FSEL3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL4_R { } } #[doc = "Field `FSEL4` writer - Function Select 4"] -pub type FSEL4_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL4_A>; -impl<'a, REG, const O: u8> FSEL4_W<'a, REG, O> +pub type FSEL4_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL4_A>; +impl<'a, REG> FSEL4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL5_R { } } #[doc = "Field `FSEL5` writer - Function Select 5"] -pub type FSEL5_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL5_A>; -impl<'a, REG, const O: u8> FSEL5_W<'a, REG, O> +pub type FSEL5_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL5_A>; +impl<'a, REG> FSEL5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL6_R { } } #[doc = "Field `FSEL6` writer - Function Select 6"] -pub type FSEL6_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL6_A>; -impl<'a, REG, const O: u8> FSEL6_W<'a, REG, O> +pub type FSEL6_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL6_A>; +impl<'a, REG> FSEL6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL7_R { } } #[doc = "Field `FSEL7` writer - Function Select 7"] -pub type FSEL7_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL7_A>; -impl<'a, REG, const O: u8> FSEL7_W<'a, REG, O> +pub type FSEL7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL7_A>; +impl<'a, REG> FSEL7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL8_R { } } #[doc = "Field `FSEL8` writer - Function Select 8"] -pub type FSEL8_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL8_A>; -impl<'a, REG, const O: u8> FSEL8_W<'a, REG, O> +pub type FSEL8_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL8_A>; +impl<'a, REG> FSEL8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL9_R { } } #[doc = "Field `FSEL9` writer - Function Select 9"] -pub type FSEL9_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL9_A>; -impl<'a, REG, const O: u8> FSEL9_W<'a, REG, O> +pub type FSEL9_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL9_A>; +impl<'a, REG> FSEL9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 0"] #[inline(always)] #[must_use] - pub fn fsel0(&mut self) -> FSEL0_W { - FSEL0_W::new(self) + pub fn fsel0(&mut self) -> FSEL0_W { + FSEL0_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 1"] #[inline(always)] #[must_use] - pub fn fsel1(&mut self) -> FSEL1_W { - FSEL1_W::new(self) + pub fn fsel1(&mut self) -> FSEL1_W { + FSEL1_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 2"] #[inline(always)] #[must_use] - pub fn fsel2(&mut self) -> FSEL2_W { - FSEL2_W::new(self) + pub fn fsel2(&mut self) -> FSEL2_W { + FSEL2_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 3"] #[inline(always)] #[must_use] - pub fn fsel3(&mut self) -> FSEL3_W { - FSEL3_W::new(self) + pub fn fsel3(&mut self) -> FSEL3_W { + FSEL3_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 4"] #[inline(always)] #[must_use] - pub fn fsel4(&mut self) -> FSEL4_W { - FSEL4_W::new(self) + pub fn fsel4(&mut self) -> FSEL4_W { + FSEL4_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 5"] #[inline(always)] #[must_use] - pub fn fsel5(&mut self) -> FSEL5_W { - FSEL5_W::new(self) + pub fn fsel5(&mut self) -> FSEL5_W { + FSEL5_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 6"] #[inline(always)] #[must_use] - pub fn fsel6(&mut self) -> FSEL6_W { - FSEL6_W::new(self) + pub fn fsel6(&mut self) -> FSEL6_W { + FSEL6_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 7"] #[inline(always)] #[must_use] - pub fn fsel7(&mut self) -> FSEL7_W { - FSEL7_W::new(self) + pub fn fsel7(&mut self) -> FSEL7_W { + FSEL7_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 8"] #[inline(always)] #[must_use] - pub fn fsel8(&mut self) -> FSEL8_W { - FSEL8_W::new(self) + pub fn fsel8(&mut self) -> FSEL8_W { + FSEL8_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 9"] #[inline(always)] #[must_use] - pub fn fsel9(&mut self) -> FSEL9_W { - FSEL9_W::new(self) + pub fn fsel9(&mut self) -> FSEL9_W { + FSEL9_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfsel1.rs b/crates/bcm2837-lpa/src/gpio/gpfsel1.rs index acb33a1..028c9cf 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfsel1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfsel1.rs @@ -92,8 +92,8 @@ impl FSEL10_R { } } #[doc = "Field `FSEL10` writer - Function Select 10"] -pub type FSEL10_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL10_A>; -impl<'a, REG, const O: u8> FSEL10_W<'a, REG, O> +pub type FSEL10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL10_A>; +impl<'a, REG> FSEL10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL11_R { } } #[doc = "Field `FSEL11` writer - Function Select 11"] -pub type FSEL11_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL11_A>; -impl<'a, REG, const O: u8> FSEL11_W<'a, REG, O> +pub type FSEL11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL11_A>; +impl<'a, REG> FSEL11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL12_R { } } #[doc = "Field `FSEL12` writer - Function Select 12"] -pub type FSEL12_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL12_A>; -impl<'a, REG, const O: u8> FSEL12_W<'a, REG, O> +pub type FSEL12_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL12_A>; +impl<'a, REG> FSEL12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL13_R { } } #[doc = "Field `FSEL13` writer - Function Select 13"] -pub type FSEL13_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL13_A>; -impl<'a, REG, const O: u8> FSEL13_W<'a, REG, O> +pub type FSEL13_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL13_A>; +impl<'a, REG> FSEL13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL14_R { } } #[doc = "Field `FSEL14` writer - Function Select 14"] -pub type FSEL14_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL14_A>; -impl<'a, REG, const O: u8> FSEL14_W<'a, REG, O> +pub type FSEL14_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL14_A>; +impl<'a, REG> FSEL14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL15_R { } } #[doc = "Field `FSEL15` writer - Function Select 15"] -pub type FSEL15_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL15_A>; -impl<'a, REG, const O: u8> FSEL15_W<'a, REG, O> +pub type FSEL15_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL15_A>; +impl<'a, REG> FSEL15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL16_R { } } #[doc = "Field `FSEL16` writer - Function Select 16"] -pub type FSEL16_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL16_A>; -impl<'a, REG, const O: u8> FSEL16_W<'a, REG, O> +pub type FSEL16_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL16_A>; +impl<'a, REG> FSEL16_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL17_R { } } #[doc = "Field `FSEL17` writer - Function Select 17"] -pub type FSEL17_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL17_A>; -impl<'a, REG, const O: u8> FSEL17_W<'a, REG, O> +pub type FSEL17_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL17_A>; +impl<'a, REG> FSEL17_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL18_R { } } #[doc = "Field `FSEL18` writer - Function Select 18"] -pub type FSEL18_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL18_A>; -impl<'a, REG, const O: u8> FSEL18_W<'a, REG, O> +pub type FSEL18_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL18_A>; +impl<'a, REG> FSEL18_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL19_R { } } #[doc = "Field `FSEL19` writer - Function Select 19"] -pub type FSEL19_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL19_A>; -impl<'a, REG, const O: u8> FSEL19_W<'a, REG, O> +pub type FSEL19_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL19_A>; +impl<'a, REG> FSEL19_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 10"] #[inline(always)] #[must_use] - pub fn fsel10(&mut self) -> FSEL10_W { - FSEL10_W::new(self) + pub fn fsel10(&mut self) -> FSEL10_W { + FSEL10_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 11"] #[inline(always)] #[must_use] - pub fn fsel11(&mut self) -> FSEL11_W { - FSEL11_W::new(self) + pub fn fsel11(&mut self) -> FSEL11_W { + FSEL11_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 12"] #[inline(always)] #[must_use] - pub fn fsel12(&mut self) -> FSEL12_W { - FSEL12_W::new(self) + pub fn fsel12(&mut self) -> FSEL12_W { + FSEL12_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 13"] #[inline(always)] #[must_use] - pub fn fsel13(&mut self) -> FSEL13_W { - FSEL13_W::new(self) + pub fn fsel13(&mut self) -> FSEL13_W { + FSEL13_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 14"] #[inline(always)] #[must_use] - pub fn fsel14(&mut self) -> FSEL14_W { - FSEL14_W::new(self) + pub fn fsel14(&mut self) -> FSEL14_W { + FSEL14_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 15"] #[inline(always)] #[must_use] - pub fn fsel15(&mut self) -> FSEL15_W { - FSEL15_W::new(self) + pub fn fsel15(&mut self) -> FSEL15_W { + FSEL15_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 16"] #[inline(always)] #[must_use] - pub fn fsel16(&mut self) -> FSEL16_W { - FSEL16_W::new(self) + pub fn fsel16(&mut self) -> FSEL16_W { + FSEL16_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 17"] #[inline(always)] #[must_use] - pub fn fsel17(&mut self) -> FSEL17_W { - FSEL17_W::new(self) + pub fn fsel17(&mut self) -> FSEL17_W { + FSEL17_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 18"] #[inline(always)] #[must_use] - pub fn fsel18(&mut self) -> FSEL18_W { - FSEL18_W::new(self) + pub fn fsel18(&mut self) -> FSEL18_W { + FSEL18_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 19"] #[inline(always)] #[must_use] - pub fn fsel19(&mut self) -> FSEL19_W { - FSEL19_W::new(self) + pub fn fsel19(&mut self) -> FSEL19_W { + FSEL19_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfsel2.rs b/crates/bcm2837-lpa/src/gpio/gpfsel2.rs index 5704f8e..cf09bee 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfsel2.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfsel2.rs @@ -92,8 +92,8 @@ impl FSEL20_R { } } #[doc = "Field `FSEL20` writer - Function Select 20"] -pub type FSEL20_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL20_A>; -impl<'a, REG, const O: u8> FSEL20_W<'a, REG, O> +pub type FSEL20_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL20_A>; +impl<'a, REG> FSEL20_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL21_R { } } #[doc = "Field `FSEL21` writer - Function Select 21"] -pub type FSEL21_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL21_A>; -impl<'a, REG, const O: u8> FSEL21_W<'a, REG, O> +pub type FSEL21_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL21_A>; +impl<'a, REG> FSEL21_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL22_R { } } #[doc = "Field `FSEL22` writer - Function Select 22"] -pub type FSEL22_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL22_A>; -impl<'a, REG, const O: u8> FSEL22_W<'a, REG, O> +pub type FSEL22_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL22_A>; +impl<'a, REG> FSEL22_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL23_R { } } #[doc = "Field `FSEL23` writer - Function Select 23"] -pub type FSEL23_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL23_A>; -impl<'a, REG, const O: u8> FSEL23_W<'a, REG, O> +pub type FSEL23_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL23_A>; +impl<'a, REG> FSEL23_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL24_R { } } #[doc = "Field `FSEL24` writer - Function Select 24"] -pub type FSEL24_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL24_A>; -impl<'a, REG, const O: u8> FSEL24_W<'a, REG, O> +pub type FSEL24_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL24_A>; +impl<'a, REG> FSEL24_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL25_R { } } #[doc = "Field `FSEL25` writer - Function Select 25"] -pub type FSEL25_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL25_A>; -impl<'a, REG, const O: u8> FSEL25_W<'a, REG, O> +pub type FSEL25_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL25_A>; +impl<'a, REG> FSEL25_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL26_R { } } #[doc = "Field `FSEL26` writer - Function Select 26"] -pub type FSEL26_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL26_A>; -impl<'a, REG, const O: u8> FSEL26_W<'a, REG, O> +pub type FSEL26_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL26_A>; +impl<'a, REG> FSEL26_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL27_R { } } #[doc = "Field `FSEL27` writer - Function Select 27"] -pub type FSEL27_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL27_A>; -impl<'a, REG, const O: u8> FSEL27_W<'a, REG, O> +pub type FSEL27_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL27_A>; +impl<'a, REG> FSEL27_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL28_R { } } #[doc = "Field `FSEL28` writer - Function Select 28"] -pub type FSEL28_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL28_A>; -impl<'a, REG, const O: u8> FSEL28_W<'a, REG, O> +pub type FSEL28_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL28_A>; +impl<'a, REG> FSEL28_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL29_R { } } #[doc = "Field `FSEL29` writer - Function Select 29"] -pub type FSEL29_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL29_A>; -impl<'a, REG, const O: u8> FSEL29_W<'a, REG, O> +pub type FSEL29_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL29_A>; +impl<'a, REG> FSEL29_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 20"] #[inline(always)] #[must_use] - pub fn fsel20(&mut self) -> FSEL20_W { - FSEL20_W::new(self) + pub fn fsel20(&mut self) -> FSEL20_W { + FSEL20_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 21"] #[inline(always)] #[must_use] - pub fn fsel21(&mut self) -> FSEL21_W { - FSEL21_W::new(self) + pub fn fsel21(&mut self) -> FSEL21_W { + FSEL21_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 22"] #[inline(always)] #[must_use] - pub fn fsel22(&mut self) -> FSEL22_W { - FSEL22_W::new(self) + pub fn fsel22(&mut self) -> FSEL22_W { + FSEL22_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 23"] #[inline(always)] #[must_use] - pub fn fsel23(&mut self) -> FSEL23_W { - FSEL23_W::new(self) + pub fn fsel23(&mut self) -> FSEL23_W { + FSEL23_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 24"] #[inline(always)] #[must_use] - pub fn fsel24(&mut self) -> FSEL24_W { - FSEL24_W::new(self) + pub fn fsel24(&mut self) -> FSEL24_W { + FSEL24_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 25"] #[inline(always)] #[must_use] - pub fn fsel25(&mut self) -> FSEL25_W { - FSEL25_W::new(self) + pub fn fsel25(&mut self) -> FSEL25_W { + FSEL25_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 26"] #[inline(always)] #[must_use] - pub fn fsel26(&mut self) -> FSEL26_W { - FSEL26_W::new(self) + pub fn fsel26(&mut self) -> FSEL26_W { + FSEL26_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 27"] #[inline(always)] #[must_use] - pub fn fsel27(&mut self) -> FSEL27_W { - FSEL27_W::new(self) + pub fn fsel27(&mut self) -> FSEL27_W { + FSEL27_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 28"] #[inline(always)] #[must_use] - pub fn fsel28(&mut self) -> FSEL28_W { - FSEL28_W::new(self) + pub fn fsel28(&mut self) -> FSEL28_W { + FSEL28_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 29"] #[inline(always)] #[must_use] - pub fn fsel29(&mut self) -> FSEL29_W { - FSEL29_W::new(self) + pub fn fsel29(&mut self) -> FSEL29_W { + FSEL29_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfsel3.rs b/crates/bcm2837-lpa/src/gpio/gpfsel3.rs index ce2ef3a..a9fc0c7 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfsel3.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfsel3.rs @@ -92,8 +92,8 @@ impl FSEL30_R { } } #[doc = "Field `FSEL30` writer - Function Select 30"] -pub type FSEL30_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL30_A>; -impl<'a, REG, const O: u8> FSEL30_W<'a, REG, O> +pub type FSEL30_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL30_A>; +impl<'a, REG> FSEL30_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL31_R { } } #[doc = "Field `FSEL31` writer - Function Select 31"] -pub type FSEL31_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL31_A>; -impl<'a, REG, const O: u8> FSEL31_W<'a, REG, O> +pub type FSEL31_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL31_A>; +impl<'a, REG> FSEL31_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL32_R { } } #[doc = "Field `FSEL32` writer - Function Select 32"] -pub type FSEL32_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL32_A>; -impl<'a, REG, const O: u8> FSEL32_W<'a, REG, O> +pub type FSEL32_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL32_A>; +impl<'a, REG> FSEL32_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL33_R { } } #[doc = "Field `FSEL33` writer - Function Select 33"] -pub type FSEL33_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL33_A>; -impl<'a, REG, const O: u8> FSEL33_W<'a, REG, O> +pub type FSEL33_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL33_A>; +impl<'a, REG> FSEL33_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL34_R { } } #[doc = "Field `FSEL34` writer - Function Select 34"] -pub type FSEL34_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL34_A>; -impl<'a, REG, const O: u8> FSEL34_W<'a, REG, O> +pub type FSEL34_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL34_A>; +impl<'a, REG> FSEL34_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL35_R { } } #[doc = "Field `FSEL35` writer - Function Select 35"] -pub type FSEL35_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL35_A>; -impl<'a, REG, const O: u8> FSEL35_W<'a, REG, O> +pub type FSEL35_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL35_A>; +impl<'a, REG> FSEL35_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL36_R { } } #[doc = "Field `FSEL36` writer - Function Select 36"] -pub type FSEL36_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL36_A>; -impl<'a, REG, const O: u8> FSEL36_W<'a, REG, O> +pub type FSEL36_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL36_A>; +impl<'a, REG> FSEL36_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL37_R { } } #[doc = "Field `FSEL37` writer - Function Select 37"] -pub type FSEL37_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL37_A>; -impl<'a, REG, const O: u8> FSEL37_W<'a, REG, O> +pub type FSEL37_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL37_A>; +impl<'a, REG> FSEL37_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL38_R { } } #[doc = "Field `FSEL38` writer - Function Select 38"] -pub type FSEL38_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL38_A>; -impl<'a, REG, const O: u8> FSEL38_W<'a, REG, O> +pub type FSEL38_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL38_A>; +impl<'a, REG> FSEL38_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL39_R { } } #[doc = "Field `FSEL39` writer - Function Select 39"] -pub type FSEL39_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL39_A>; -impl<'a, REG, const O: u8> FSEL39_W<'a, REG, O> +pub type FSEL39_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL39_A>; +impl<'a, REG> FSEL39_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 30"] #[inline(always)] #[must_use] - pub fn fsel30(&mut self) -> FSEL30_W { - FSEL30_W::new(self) + pub fn fsel30(&mut self) -> FSEL30_W { + FSEL30_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 31"] #[inline(always)] #[must_use] - pub fn fsel31(&mut self) -> FSEL31_W { - FSEL31_W::new(self) + pub fn fsel31(&mut self) -> FSEL31_W { + FSEL31_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 32"] #[inline(always)] #[must_use] - pub fn fsel32(&mut self) -> FSEL32_W { - FSEL32_W::new(self) + pub fn fsel32(&mut self) -> FSEL32_W { + FSEL32_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 33"] #[inline(always)] #[must_use] - pub fn fsel33(&mut self) -> FSEL33_W { - FSEL33_W::new(self) + pub fn fsel33(&mut self) -> FSEL33_W { + FSEL33_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 34"] #[inline(always)] #[must_use] - pub fn fsel34(&mut self) -> FSEL34_W { - FSEL34_W::new(self) + pub fn fsel34(&mut self) -> FSEL34_W { + FSEL34_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 35"] #[inline(always)] #[must_use] - pub fn fsel35(&mut self) -> FSEL35_W { - FSEL35_W::new(self) + pub fn fsel35(&mut self) -> FSEL35_W { + FSEL35_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 36"] #[inline(always)] #[must_use] - pub fn fsel36(&mut self) -> FSEL36_W { - FSEL36_W::new(self) + pub fn fsel36(&mut self) -> FSEL36_W { + FSEL36_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 37"] #[inline(always)] #[must_use] - pub fn fsel37(&mut self) -> FSEL37_W { - FSEL37_W::new(self) + pub fn fsel37(&mut self) -> FSEL37_W { + FSEL37_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 38"] #[inline(always)] #[must_use] - pub fn fsel38(&mut self) -> FSEL38_W { - FSEL38_W::new(self) + pub fn fsel38(&mut self) -> FSEL38_W { + FSEL38_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 39"] #[inline(always)] #[must_use] - pub fn fsel39(&mut self) -> FSEL39_W { - FSEL39_W::new(self) + pub fn fsel39(&mut self) -> FSEL39_W { + FSEL39_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfsel4.rs b/crates/bcm2837-lpa/src/gpio/gpfsel4.rs index 50a568f..b5dc959 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfsel4.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfsel4.rs @@ -92,8 +92,8 @@ impl FSEL40_R { } } #[doc = "Field `FSEL40` writer - Function Select 40"] -pub type FSEL40_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL40_A>; -impl<'a, REG, const O: u8> FSEL40_W<'a, REG, O> +pub type FSEL40_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL40_A>; +impl<'a, REG> FSEL40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL41_R { } } #[doc = "Field `FSEL41` writer - Function Select 41"] -pub type FSEL41_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL41_A>; -impl<'a, REG, const O: u8> FSEL41_W<'a, REG, O> +pub type FSEL41_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL41_A>; +impl<'a, REG> FSEL41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL42_R { } } #[doc = "Field `FSEL42` writer - Function Select 42"] -pub type FSEL42_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL42_A>; -impl<'a, REG, const O: u8> FSEL42_W<'a, REG, O> +pub type FSEL42_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL42_A>; +impl<'a, REG> FSEL42_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL43_R { } } #[doc = "Field `FSEL43` writer - Function Select 43"] -pub type FSEL43_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL43_A>; -impl<'a, REG, const O: u8> FSEL43_W<'a, REG, O> +pub type FSEL43_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL43_A>; +impl<'a, REG> FSEL43_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,8 +640,8 @@ impl FSEL44_R { } } #[doc = "Field `FSEL44` writer - Function Select 44"] -pub type FSEL44_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL44_A>; -impl<'a, REG, const O: u8> FSEL44_W<'a, REG, O> +pub type FSEL44_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL44_A>; +impl<'a, REG> FSEL44_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -777,8 +777,8 @@ impl FSEL45_R { } } #[doc = "Field `FSEL45` writer - Function Select 45"] -pub type FSEL45_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL45_A>; -impl<'a, REG, const O: u8> FSEL45_W<'a, REG, O> +pub type FSEL45_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL45_A>; +impl<'a, REG> FSEL45_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -914,8 +914,8 @@ impl FSEL46_R { } } #[doc = "Field `FSEL46` writer - Function Select 46"] -pub type FSEL46_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL46_A>; -impl<'a, REG, const O: u8> FSEL46_W<'a, REG, O> +pub type FSEL46_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL46_A>; +impl<'a, REG> FSEL46_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1051,8 +1051,8 @@ impl FSEL47_R { } } #[doc = "Field `FSEL47` writer - Function Select 47"] -pub type FSEL47_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL47_A>; -impl<'a, REG, const O: u8> FSEL47_W<'a, REG, O> +pub type FSEL47_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL47_A>; +impl<'a, REG> FSEL47_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1188,8 +1188,8 @@ impl FSEL48_R { } } #[doc = "Field `FSEL48` writer - Function Select 48"] -pub type FSEL48_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL48_A>; -impl<'a, REG, const O: u8> FSEL48_W<'a, REG, O> +pub type FSEL48_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL48_A>; +impl<'a, REG> FSEL48_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1325,8 +1325,8 @@ impl FSEL49_R { } } #[doc = "Field `FSEL49` writer - Function Select 49"] -pub type FSEL49_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL49_A>; -impl<'a, REG, const O: u8> FSEL49_W<'a, REG, O> +pub type FSEL49_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL49_A>; +impl<'a, REG> FSEL49_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1442,69 +1442,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 40"] #[inline(always)] #[must_use] - pub fn fsel40(&mut self) -> FSEL40_W { - FSEL40_W::new(self) + pub fn fsel40(&mut self) -> FSEL40_W { + FSEL40_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 41"] #[inline(always)] #[must_use] - pub fn fsel41(&mut self) -> FSEL41_W { - FSEL41_W::new(self) + pub fn fsel41(&mut self) -> FSEL41_W { + FSEL41_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 42"] #[inline(always)] #[must_use] - pub fn fsel42(&mut self) -> FSEL42_W { - FSEL42_W::new(self) + pub fn fsel42(&mut self) -> FSEL42_W { + FSEL42_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 43"] #[inline(always)] #[must_use] - pub fn fsel43(&mut self) -> FSEL43_W { - FSEL43_W::new(self) + pub fn fsel43(&mut self) -> FSEL43_W { + FSEL43_W::new(self, 9) } #[doc = "Bits 12:14 - Function Select 44"] #[inline(always)] #[must_use] - pub fn fsel44(&mut self) -> FSEL44_W { - FSEL44_W::new(self) + pub fn fsel44(&mut self) -> FSEL44_W { + FSEL44_W::new(self, 12) } #[doc = "Bits 15:17 - Function Select 45"] #[inline(always)] #[must_use] - pub fn fsel45(&mut self) -> FSEL45_W { - FSEL45_W::new(self) + pub fn fsel45(&mut self) -> FSEL45_W { + FSEL45_W::new(self, 15) } #[doc = "Bits 18:20 - Function Select 46"] #[inline(always)] #[must_use] - pub fn fsel46(&mut self) -> FSEL46_W { - FSEL46_W::new(self) + pub fn fsel46(&mut self) -> FSEL46_W { + FSEL46_W::new(self, 18) } #[doc = "Bits 21:23 - Function Select 47"] #[inline(always)] #[must_use] - pub fn fsel47(&mut self) -> FSEL47_W { - FSEL47_W::new(self) + pub fn fsel47(&mut self) -> FSEL47_W { + FSEL47_W::new(self, 21) } #[doc = "Bits 24:26 - Function Select 48"] #[inline(always)] #[must_use] - pub fn fsel48(&mut self) -> FSEL48_W { - FSEL48_W::new(self) + pub fn fsel48(&mut self) -> FSEL48_W { + FSEL48_W::new(self, 24) } #[doc = "Bits 27:29 - Function Select 49"] #[inline(always)] #[must_use] - pub fn fsel49(&mut self) -> FSEL49_W { - FSEL49_W::new(self) + pub fn fsel49(&mut self) -> FSEL49_W { + FSEL49_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpfsel5.rs b/crates/bcm2837-lpa/src/gpio/gpfsel5.rs index bb2d446..e78258c 100644 --- a/crates/bcm2837-lpa/src/gpio/gpfsel5.rs +++ b/crates/bcm2837-lpa/src/gpio/gpfsel5.rs @@ -92,8 +92,8 @@ impl FSEL50_R { } } #[doc = "Field `FSEL50` writer - Function Select 50"] -pub type FSEL50_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL50_A>; -impl<'a, REG, const O: u8> FSEL50_W<'a, REG, O> +pub type FSEL50_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL50_A>; +impl<'a, REG> FSEL50_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,8 +229,8 @@ impl FSEL51_R { } } #[doc = "Field `FSEL51` writer - Function Select 51"] -pub type FSEL51_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL51_A>; -impl<'a, REG, const O: u8> FSEL51_W<'a, REG, O> +pub type FSEL51_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL51_A>; +impl<'a, REG> FSEL51_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -366,8 +366,8 @@ impl FSEL52_R { } } #[doc = "Field `FSEL52` writer - Function Select 52"] -pub type FSEL52_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL52_A>; -impl<'a, REG, const O: u8> FSEL52_W<'a, REG, O> +pub type FSEL52_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL52_A>; +impl<'a, REG> FSEL52_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -503,8 +503,8 @@ impl FSEL53_R { } } #[doc = "Field `FSEL53` writer - Function Select 53"] -pub type FSEL53_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 3, O, FSEL53_A>; -impl<'a, REG, const O: u8> FSEL53_W<'a, REG, O> +pub type FSEL53_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, FSEL53_A>; +impl<'a, REG> FSEL53_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -584,33 +584,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - Function Select 50"] #[inline(always)] #[must_use] - pub fn fsel50(&mut self) -> FSEL50_W { - FSEL50_W::new(self) + pub fn fsel50(&mut self) -> FSEL50_W { + FSEL50_W::new(self, 0) } #[doc = "Bits 3:5 - Function Select 51"] #[inline(always)] #[must_use] - pub fn fsel51(&mut self) -> FSEL51_W { - FSEL51_W::new(self) + pub fn fsel51(&mut self) -> FSEL51_W { + FSEL51_W::new(self, 3) } #[doc = "Bits 6:8 - Function Select 52"] #[inline(always)] #[must_use] - pub fn fsel52(&mut self) -> FSEL52_W { - FSEL52_W::new(self) + pub fn fsel52(&mut self) -> FSEL52_W { + FSEL52_W::new(self, 6) } #[doc = "Bits 9:11 - Function Select 53"] #[inline(always)] #[must_use] - pub fn fsel53(&mut self) -> FSEL53_W { - FSEL53_W::new(self) + pub fn fsel53(&mut self) -> FSEL53_W { + FSEL53_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gphen0.rs b/crates/bcm2837-lpa/src/gpio/gphen0.rs index d788bbf..f8a30dc 100644 --- a/crates/bcm2837-lpa/src/gpio/gphen0.rs +++ b/crates/bcm2837-lpa/src/gpio/gphen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HEN0` reader - High detect enabled 0"] pub type HEN0_R = crate::BitReader; #[doc = "Field `HEN0` writer - High detect enabled 0"] -pub type HEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN1` reader - High detect enabled 1"] pub type HEN1_R = crate::BitReader; #[doc = "Field `HEN1` writer - High detect enabled 1"] -pub type HEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN2` reader - High detect enabled 2"] pub type HEN2_R = crate::BitReader; #[doc = "Field `HEN2` writer - High detect enabled 2"] -pub type HEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN3` reader - High detect enabled 3"] pub type HEN3_R = crate::BitReader; #[doc = "Field `HEN3` writer - High detect enabled 3"] -pub type HEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN4` reader - High detect enabled 4"] pub type HEN4_R = crate::BitReader; #[doc = "Field `HEN4` writer - High detect enabled 4"] -pub type HEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN5` reader - High detect enabled 5"] pub type HEN5_R = crate::BitReader; #[doc = "Field `HEN5` writer - High detect enabled 5"] -pub type HEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN6` reader - High detect enabled 6"] pub type HEN6_R = crate::BitReader; #[doc = "Field `HEN6` writer - High detect enabled 6"] -pub type HEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN7` reader - High detect enabled 7"] pub type HEN7_R = crate::BitReader; #[doc = "Field `HEN7` writer - High detect enabled 7"] -pub type HEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN8` reader - High detect enabled 8"] pub type HEN8_R = crate::BitReader; #[doc = "Field `HEN8` writer - High detect enabled 8"] -pub type HEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN9` reader - High detect enabled 9"] pub type HEN9_R = crate::BitReader; #[doc = "Field `HEN9` writer - High detect enabled 9"] -pub type HEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN10` reader - High detect enabled 10"] pub type HEN10_R = crate::BitReader; #[doc = "Field `HEN10` writer - High detect enabled 10"] -pub type HEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN11` reader - High detect enabled 11"] pub type HEN11_R = crate::BitReader; #[doc = "Field `HEN11` writer - High detect enabled 11"] -pub type HEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN12` reader - High detect enabled 12"] pub type HEN12_R = crate::BitReader; #[doc = "Field `HEN12` writer - High detect enabled 12"] -pub type HEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN13` reader - High detect enabled 13"] pub type HEN13_R = crate::BitReader; #[doc = "Field `HEN13` writer - High detect enabled 13"] -pub type HEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN14` reader - High detect enabled 14"] pub type HEN14_R = crate::BitReader; #[doc = "Field `HEN14` writer - High detect enabled 14"] -pub type HEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN15` reader - High detect enabled 15"] pub type HEN15_R = crate::BitReader; #[doc = "Field `HEN15` writer - High detect enabled 15"] -pub type HEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN16` reader - High detect enabled 16"] pub type HEN16_R = crate::BitReader; #[doc = "Field `HEN16` writer - High detect enabled 16"] -pub type HEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN17` reader - High detect enabled 17"] pub type HEN17_R = crate::BitReader; #[doc = "Field `HEN17` writer - High detect enabled 17"] -pub type HEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN18` reader - High detect enabled 18"] pub type HEN18_R = crate::BitReader; #[doc = "Field `HEN18` writer - High detect enabled 18"] -pub type HEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN19` reader - High detect enabled 19"] pub type HEN19_R = crate::BitReader; #[doc = "Field `HEN19` writer - High detect enabled 19"] -pub type HEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN20` reader - High detect enabled 20"] pub type HEN20_R = crate::BitReader; #[doc = "Field `HEN20` writer - High detect enabled 20"] -pub type HEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN21` reader - High detect enabled 21"] pub type HEN21_R = crate::BitReader; #[doc = "Field `HEN21` writer - High detect enabled 21"] -pub type HEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN22` reader - High detect enabled 22"] pub type HEN22_R = crate::BitReader; #[doc = "Field `HEN22` writer - High detect enabled 22"] -pub type HEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN23` reader - High detect enabled 23"] pub type HEN23_R = crate::BitReader; #[doc = "Field `HEN23` writer - High detect enabled 23"] -pub type HEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN24` reader - High detect enabled 24"] pub type HEN24_R = crate::BitReader; #[doc = "Field `HEN24` writer - High detect enabled 24"] -pub type HEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN25` reader - High detect enabled 25"] pub type HEN25_R = crate::BitReader; #[doc = "Field `HEN25` writer - High detect enabled 25"] -pub type HEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN26` reader - High detect enabled 26"] pub type HEN26_R = crate::BitReader; #[doc = "Field `HEN26` writer - High detect enabled 26"] -pub type HEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN27` reader - High detect enabled 27"] pub type HEN27_R = crate::BitReader; #[doc = "Field `HEN27` writer - High detect enabled 27"] -pub type HEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN28` reader - High detect enabled 28"] pub type HEN28_R = crate::BitReader; #[doc = "Field `HEN28` writer - High detect enabled 28"] -pub type HEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN29` reader - High detect enabled 29"] pub type HEN29_R = crate::BitReader; #[doc = "Field `HEN29` writer - High detect enabled 29"] -pub type HEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN30` reader - High detect enabled 30"] pub type HEN30_R = crate::BitReader; #[doc = "Field `HEN30` writer - High detect enabled 30"] -pub type HEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN31` reader - High detect enabled 31"] pub type HEN31_R = crate::BitReader; #[doc = "Field `HEN31` writer - High detect enabled 31"] -pub type HEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - High detect enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - High detect enabled 0"] #[inline(always)] #[must_use] - pub fn hen0(&mut self) -> HEN0_W { - HEN0_W::new(self) + pub fn hen0(&mut self) -> HEN0_W { + HEN0_W::new(self, 0) } #[doc = "Bit 1 - High detect enabled 1"] #[inline(always)] #[must_use] - pub fn hen1(&mut self) -> HEN1_W { - HEN1_W::new(self) + pub fn hen1(&mut self) -> HEN1_W { + HEN1_W::new(self, 1) } #[doc = "Bit 2 - High detect enabled 2"] #[inline(always)] #[must_use] - pub fn hen2(&mut self) -> HEN2_W { - HEN2_W::new(self) + pub fn hen2(&mut self) -> HEN2_W { + HEN2_W::new(self, 2) } #[doc = "Bit 3 - High detect enabled 3"] #[inline(always)] #[must_use] - pub fn hen3(&mut self) -> HEN3_W { - HEN3_W::new(self) + pub fn hen3(&mut self) -> HEN3_W { + HEN3_W::new(self, 3) } #[doc = "Bit 4 - High detect enabled 4"] #[inline(always)] #[must_use] - pub fn hen4(&mut self) -> HEN4_W { - HEN4_W::new(self) + pub fn hen4(&mut self) -> HEN4_W { + HEN4_W::new(self, 4) } #[doc = "Bit 5 - High detect enabled 5"] #[inline(always)] #[must_use] - pub fn hen5(&mut self) -> HEN5_W { - HEN5_W::new(self) + pub fn hen5(&mut self) -> HEN5_W { + HEN5_W::new(self, 5) } #[doc = "Bit 6 - High detect enabled 6"] #[inline(always)] #[must_use] - pub fn hen6(&mut self) -> HEN6_W { - HEN6_W::new(self) + pub fn hen6(&mut self) -> HEN6_W { + HEN6_W::new(self, 6) } #[doc = "Bit 7 - High detect enabled 7"] #[inline(always)] #[must_use] - pub fn hen7(&mut self) -> HEN7_W { - HEN7_W::new(self) + pub fn hen7(&mut self) -> HEN7_W { + HEN7_W::new(self, 7) } #[doc = "Bit 8 - High detect enabled 8"] #[inline(always)] #[must_use] - pub fn hen8(&mut self) -> HEN8_W { - HEN8_W::new(self) + pub fn hen8(&mut self) -> HEN8_W { + HEN8_W::new(self, 8) } #[doc = "Bit 9 - High detect enabled 9"] #[inline(always)] #[must_use] - pub fn hen9(&mut self) -> HEN9_W { - HEN9_W::new(self) + pub fn hen9(&mut self) -> HEN9_W { + HEN9_W::new(self, 9) } #[doc = "Bit 10 - High detect enabled 10"] #[inline(always)] #[must_use] - pub fn hen10(&mut self) -> HEN10_W { - HEN10_W::new(self) + pub fn hen10(&mut self) -> HEN10_W { + HEN10_W::new(self, 10) } #[doc = "Bit 11 - High detect enabled 11"] #[inline(always)] #[must_use] - pub fn hen11(&mut self) -> HEN11_W { - HEN11_W::new(self) + pub fn hen11(&mut self) -> HEN11_W { + HEN11_W::new(self, 11) } #[doc = "Bit 12 - High detect enabled 12"] #[inline(always)] #[must_use] - pub fn hen12(&mut self) -> HEN12_W { - HEN12_W::new(self) + pub fn hen12(&mut self) -> HEN12_W { + HEN12_W::new(self, 12) } #[doc = "Bit 13 - High detect enabled 13"] #[inline(always)] #[must_use] - pub fn hen13(&mut self) -> HEN13_W { - HEN13_W::new(self) + pub fn hen13(&mut self) -> HEN13_W { + HEN13_W::new(self, 13) } #[doc = "Bit 14 - High detect enabled 14"] #[inline(always)] #[must_use] - pub fn hen14(&mut self) -> HEN14_W { - HEN14_W::new(self) + pub fn hen14(&mut self) -> HEN14_W { + HEN14_W::new(self, 14) } #[doc = "Bit 15 - High detect enabled 15"] #[inline(always)] #[must_use] - pub fn hen15(&mut self) -> HEN15_W { - HEN15_W::new(self) + pub fn hen15(&mut self) -> HEN15_W { + HEN15_W::new(self, 15) } #[doc = "Bit 16 - High detect enabled 16"] #[inline(always)] #[must_use] - pub fn hen16(&mut self) -> HEN16_W { - HEN16_W::new(self) + pub fn hen16(&mut self) -> HEN16_W { + HEN16_W::new(self, 16) } #[doc = "Bit 17 - High detect enabled 17"] #[inline(always)] #[must_use] - pub fn hen17(&mut self) -> HEN17_W { - HEN17_W::new(self) + pub fn hen17(&mut self) -> HEN17_W { + HEN17_W::new(self, 17) } #[doc = "Bit 18 - High detect enabled 18"] #[inline(always)] #[must_use] - pub fn hen18(&mut self) -> HEN18_W { - HEN18_W::new(self) + pub fn hen18(&mut self) -> HEN18_W { + HEN18_W::new(self, 18) } #[doc = "Bit 19 - High detect enabled 19"] #[inline(always)] #[must_use] - pub fn hen19(&mut self) -> HEN19_W { - HEN19_W::new(self) + pub fn hen19(&mut self) -> HEN19_W { + HEN19_W::new(self, 19) } #[doc = "Bit 20 - High detect enabled 20"] #[inline(always)] #[must_use] - pub fn hen20(&mut self) -> HEN20_W { - HEN20_W::new(self) + pub fn hen20(&mut self) -> HEN20_W { + HEN20_W::new(self, 20) } #[doc = "Bit 21 - High detect enabled 21"] #[inline(always)] #[must_use] - pub fn hen21(&mut self) -> HEN21_W { - HEN21_W::new(self) + pub fn hen21(&mut self) -> HEN21_W { + HEN21_W::new(self, 21) } #[doc = "Bit 22 - High detect enabled 22"] #[inline(always)] #[must_use] - pub fn hen22(&mut self) -> HEN22_W { - HEN22_W::new(self) + pub fn hen22(&mut self) -> HEN22_W { + HEN22_W::new(self, 22) } #[doc = "Bit 23 - High detect enabled 23"] #[inline(always)] #[must_use] - pub fn hen23(&mut self) -> HEN23_W { - HEN23_W::new(self) + pub fn hen23(&mut self) -> HEN23_W { + HEN23_W::new(self, 23) } #[doc = "Bit 24 - High detect enabled 24"] #[inline(always)] #[must_use] - pub fn hen24(&mut self) -> HEN24_W { - HEN24_W::new(self) + pub fn hen24(&mut self) -> HEN24_W { + HEN24_W::new(self, 24) } #[doc = "Bit 25 - High detect enabled 25"] #[inline(always)] #[must_use] - pub fn hen25(&mut self) -> HEN25_W { - HEN25_W::new(self) + pub fn hen25(&mut self) -> HEN25_W { + HEN25_W::new(self, 25) } #[doc = "Bit 26 - High detect enabled 26"] #[inline(always)] #[must_use] - pub fn hen26(&mut self) -> HEN26_W { - HEN26_W::new(self) + pub fn hen26(&mut self) -> HEN26_W { + HEN26_W::new(self, 26) } #[doc = "Bit 27 - High detect enabled 27"] #[inline(always)] #[must_use] - pub fn hen27(&mut self) -> HEN27_W { - HEN27_W::new(self) + pub fn hen27(&mut self) -> HEN27_W { + HEN27_W::new(self, 27) } #[doc = "Bit 28 - High detect enabled 28"] #[inline(always)] #[must_use] - pub fn hen28(&mut self) -> HEN28_W { - HEN28_W::new(self) + pub fn hen28(&mut self) -> HEN28_W { + HEN28_W::new(self, 28) } #[doc = "Bit 29 - High detect enabled 29"] #[inline(always)] #[must_use] - pub fn hen29(&mut self) -> HEN29_W { - HEN29_W::new(self) + pub fn hen29(&mut self) -> HEN29_W { + HEN29_W::new(self, 29) } #[doc = "Bit 30 - High detect enabled 30"] #[inline(always)] #[must_use] - pub fn hen30(&mut self) -> HEN30_W { - HEN30_W::new(self) + pub fn hen30(&mut self) -> HEN30_W { + HEN30_W::new(self, 30) } #[doc = "Bit 31 - High detect enabled 31"] #[inline(always)] #[must_use] - pub fn hen31(&mut self) -> HEN31_W { - HEN31_W::new(self) + pub fn hen31(&mut self) -> HEN31_W { + HEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gphen1.rs b/crates/bcm2837-lpa/src/gpio/gphen1.rs index 3d0aa21..0b33d39 100644 --- a/crates/bcm2837-lpa/src/gpio/gphen1.rs +++ b/crates/bcm2837-lpa/src/gpio/gphen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `HEN32` reader - High detect enabled 32"] pub type HEN32_R = crate::BitReader; #[doc = "Field `HEN32` writer - High detect enabled 32"] -pub type HEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN33` reader - High detect enabled 33"] pub type HEN33_R = crate::BitReader; #[doc = "Field `HEN33` writer - High detect enabled 33"] -pub type HEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN34` reader - High detect enabled 34"] pub type HEN34_R = crate::BitReader; #[doc = "Field `HEN34` writer - High detect enabled 34"] -pub type HEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN35` reader - High detect enabled 35"] pub type HEN35_R = crate::BitReader; #[doc = "Field `HEN35` writer - High detect enabled 35"] -pub type HEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN36` reader - High detect enabled 36"] pub type HEN36_R = crate::BitReader; #[doc = "Field `HEN36` writer - High detect enabled 36"] -pub type HEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN37` reader - High detect enabled 37"] pub type HEN37_R = crate::BitReader; #[doc = "Field `HEN37` writer - High detect enabled 37"] -pub type HEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN38` reader - High detect enabled 38"] pub type HEN38_R = crate::BitReader; #[doc = "Field `HEN38` writer - High detect enabled 38"] -pub type HEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN39` reader - High detect enabled 39"] pub type HEN39_R = crate::BitReader; #[doc = "Field `HEN39` writer - High detect enabled 39"] -pub type HEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN40` reader - High detect enabled 40"] pub type HEN40_R = crate::BitReader; #[doc = "Field `HEN40` writer - High detect enabled 40"] -pub type HEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN41` reader - High detect enabled 41"] pub type HEN41_R = crate::BitReader; #[doc = "Field `HEN41` writer - High detect enabled 41"] -pub type HEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN42` reader - High detect enabled 42"] pub type HEN42_R = crate::BitReader; #[doc = "Field `HEN42` writer - High detect enabled 42"] -pub type HEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN43` reader - High detect enabled 43"] pub type HEN43_R = crate::BitReader; #[doc = "Field `HEN43` writer - High detect enabled 43"] -pub type HEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN44` reader - High detect enabled 44"] pub type HEN44_R = crate::BitReader; #[doc = "Field `HEN44` writer - High detect enabled 44"] -pub type HEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN45` reader - High detect enabled 45"] pub type HEN45_R = crate::BitReader; #[doc = "Field `HEN45` writer - High detect enabled 45"] -pub type HEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN46` reader - High detect enabled 46"] pub type HEN46_R = crate::BitReader; #[doc = "Field `HEN46` writer - High detect enabled 46"] -pub type HEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN47` reader - High detect enabled 47"] pub type HEN47_R = crate::BitReader; #[doc = "Field `HEN47` writer - High detect enabled 47"] -pub type HEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN48` reader - High detect enabled 48"] pub type HEN48_R = crate::BitReader; #[doc = "Field `HEN48` writer - High detect enabled 48"] -pub type HEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN49` reader - High detect enabled 49"] pub type HEN49_R = crate::BitReader; #[doc = "Field `HEN49` writer - High detect enabled 49"] -pub type HEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN50` reader - High detect enabled 50"] pub type HEN50_R = crate::BitReader; #[doc = "Field `HEN50` writer - High detect enabled 50"] -pub type HEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN51` reader - High detect enabled 51"] pub type HEN51_R = crate::BitReader; #[doc = "Field `HEN51` writer - High detect enabled 51"] -pub type HEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN52` reader - High detect enabled 52"] pub type HEN52_R = crate::BitReader; #[doc = "Field `HEN52` writer - High detect enabled 52"] -pub type HEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HEN53` reader - High detect enabled 53"] pub type HEN53_R = crate::BitReader; #[doc = "Field `HEN53` writer - High detect enabled 53"] -pub type HEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - High detect enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - High detect enabled 32"] #[inline(always)] #[must_use] - pub fn hen32(&mut self) -> HEN32_W { - HEN32_W::new(self) + pub fn hen32(&mut self) -> HEN32_W { + HEN32_W::new(self, 0) } #[doc = "Bit 1 - High detect enabled 33"] #[inline(always)] #[must_use] - pub fn hen33(&mut self) -> HEN33_W { - HEN33_W::new(self) + pub fn hen33(&mut self) -> HEN33_W { + HEN33_W::new(self, 1) } #[doc = "Bit 2 - High detect enabled 34"] #[inline(always)] #[must_use] - pub fn hen34(&mut self) -> HEN34_W { - HEN34_W::new(self) + pub fn hen34(&mut self) -> HEN34_W { + HEN34_W::new(self, 2) } #[doc = "Bit 3 - High detect enabled 35"] #[inline(always)] #[must_use] - pub fn hen35(&mut self) -> HEN35_W { - HEN35_W::new(self) + pub fn hen35(&mut self) -> HEN35_W { + HEN35_W::new(self, 3) } #[doc = "Bit 4 - High detect enabled 36"] #[inline(always)] #[must_use] - pub fn hen36(&mut self) -> HEN36_W { - HEN36_W::new(self) + pub fn hen36(&mut self) -> HEN36_W { + HEN36_W::new(self, 4) } #[doc = "Bit 5 - High detect enabled 37"] #[inline(always)] #[must_use] - pub fn hen37(&mut self) -> HEN37_W { - HEN37_W::new(self) + pub fn hen37(&mut self) -> HEN37_W { + HEN37_W::new(self, 5) } #[doc = "Bit 6 - High detect enabled 38"] #[inline(always)] #[must_use] - pub fn hen38(&mut self) -> HEN38_W { - HEN38_W::new(self) + pub fn hen38(&mut self) -> HEN38_W { + HEN38_W::new(self, 6) } #[doc = "Bit 7 - High detect enabled 39"] #[inline(always)] #[must_use] - pub fn hen39(&mut self) -> HEN39_W { - HEN39_W::new(self) + pub fn hen39(&mut self) -> HEN39_W { + HEN39_W::new(self, 7) } #[doc = "Bit 8 - High detect enabled 40"] #[inline(always)] #[must_use] - pub fn hen40(&mut self) -> HEN40_W { - HEN40_W::new(self) + pub fn hen40(&mut self) -> HEN40_W { + HEN40_W::new(self, 8) } #[doc = "Bit 9 - High detect enabled 41"] #[inline(always)] #[must_use] - pub fn hen41(&mut self) -> HEN41_W { - HEN41_W::new(self) + pub fn hen41(&mut self) -> HEN41_W { + HEN41_W::new(self, 9) } #[doc = "Bit 10 - High detect enabled 42"] #[inline(always)] #[must_use] - pub fn hen42(&mut self) -> HEN42_W { - HEN42_W::new(self) + pub fn hen42(&mut self) -> HEN42_W { + HEN42_W::new(self, 10) } #[doc = "Bit 11 - High detect enabled 43"] #[inline(always)] #[must_use] - pub fn hen43(&mut self) -> HEN43_W { - HEN43_W::new(self) + pub fn hen43(&mut self) -> HEN43_W { + HEN43_W::new(self, 11) } #[doc = "Bit 12 - High detect enabled 44"] #[inline(always)] #[must_use] - pub fn hen44(&mut self) -> HEN44_W { - HEN44_W::new(self) + pub fn hen44(&mut self) -> HEN44_W { + HEN44_W::new(self, 12) } #[doc = "Bit 13 - High detect enabled 45"] #[inline(always)] #[must_use] - pub fn hen45(&mut self) -> HEN45_W { - HEN45_W::new(self) + pub fn hen45(&mut self) -> HEN45_W { + HEN45_W::new(self, 13) } #[doc = "Bit 14 - High detect enabled 46"] #[inline(always)] #[must_use] - pub fn hen46(&mut self) -> HEN46_W { - HEN46_W::new(self) + pub fn hen46(&mut self) -> HEN46_W { + HEN46_W::new(self, 14) } #[doc = "Bit 15 - High detect enabled 47"] #[inline(always)] #[must_use] - pub fn hen47(&mut self) -> HEN47_W { - HEN47_W::new(self) + pub fn hen47(&mut self) -> HEN47_W { + HEN47_W::new(self, 15) } #[doc = "Bit 16 - High detect enabled 48"] #[inline(always)] #[must_use] - pub fn hen48(&mut self) -> HEN48_W { - HEN48_W::new(self) + pub fn hen48(&mut self) -> HEN48_W { + HEN48_W::new(self, 16) } #[doc = "Bit 17 - High detect enabled 49"] #[inline(always)] #[must_use] - pub fn hen49(&mut self) -> HEN49_W { - HEN49_W::new(self) + pub fn hen49(&mut self) -> HEN49_W { + HEN49_W::new(self, 17) } #[doc = "Bit 18 - High detect enabled 50"] #[inline(always)] #[must_use] - pub fn hen50(&mut self) -> HEN50_W { - HEN50_W::new(self) + pub fn hen50(&mut self) -> HEN50_W { + HEN50_W::new(self, 18) } #[doc = "Bit 19 - High detect enabled 51"] #[inline(always)] #[must_use] - pub fn hen51(&mut self) -> HEN51_W { - HEN51_W::new(self) + pub fn hen51(&mut self) -> HEN51_W { + HEN51_W::new(self, 19) } #[doc = "Bit 20 - High detect enabled 52"] #[inline(always)] #[must_use] - pub fn hen52(&mut self) -> HEN52_W { - HEN52_W::new(self) + pub fn hen52(&mut self) -> HEN52_W { + HEN52_W::new(self, 20) } #[doc = "Bit 21 - High detect enabled 53"] #[inline(always)] #[must_use] - pub fn hen53(&mut self) -> HEN53_W { - HEN53_W::new(self) + pub fn hen53(&mut self) -> HEN53_W { + HEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs index 507543e..fd43ea1 100644 --- a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg0.rs @@ -52,8 +52,8 @@ impl GPIO_PUP_PDN_CNTRL0_R { } } #[doc = "Field `GPIO_PUP_PDN_CNTRL0` writer - Resistor select for 0"] -pub type GPIO_PUP_PDN_CNTRL0_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, BP_PULL_A>; -impl<'a, REG, const O: u8> GPIO_PUP_PDN_CNTRL0_W<'a, REG, O> +pub type GPIO_PUP_PDN_CNTRL0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BP_PULL_A>; +impl<'a, REG> GPIO_PUP_PDN_CNTRL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -288,137 +288,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 0"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl0( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL0_W { - GPIO_PUP_PDN_CNTRL0_W::new(self) + pub fn gpio_pup_pdn_cntrl0(&mut self) -> GPIO_PUP_PDN_CNTRL0_W { + GPIO_PUP_PDN_CNTRL0_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 1"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl1( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL1_W { - GPIO_PUP_PDN_CNTRL1_W::new(self) + pub fn gpio_pup_pdn_cntrl1(&mut self) -> GPIO_PUP_PDN_CNTRL1_W { + GPIO_PUP_PDN_CNTRL1_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 2"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl2( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL2_W { - GPIO_PUP_PDN_CNTRL2_W::new(self) + pub fn gpio_pup_pdn_cntrl2(&mut self) -> GPIO_PUP_PDN_CNTRL2_W { + GPIO_PUP_PDN_CNTRL2_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 3"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl3( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL3_W { - GPIO_PUP_PDN_CNTRL3_W::new(self) + pub fn gpio_pup_pdn_cntrl3(&mut self) -> GPIO_PUP_PDN_CNTRL3_W { + GPIO_PUP_PDN_CNTRL3_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 4"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl4( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL4_W { - GPIO_PUP_PDN_CNTRL4_W::new(self) + pub fn gpio_pup_pdn_cntrl4(&mut self) -> GPIO_PUP_PDN_CNTRL4_W { + GPIO_PUP_PDN_CNTRL4_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 5"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl5( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL5_W { - GPIO_PUP_PDN_CNTRL5_W::new(self) + pub fn gpio_pup_pdn_cntrl5(&mut self) -> GPIO_PUP_PDN_CNTRL5_W { + GPIO_PUP_PDN_CNTRL5_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 6"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl6( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL6_W { - GPIO_PUP_PDN_CNTRL6_W::new(self) + pub fn gpio_pup_pdn_cntrl6(&mut self) -> GPIO_PUP_PDN_CNTRL6_W { + GPIO_PUP_PDN_CNTRL6_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 7"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl7( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL7_W { - GPIO_PUP_PDN_CNTRL7_W::new(self) + pub fn gpio_pup_pdn_cntrl7(&mut self) -> GPIO_PUP_PDN_CNTRL7_W { + GPIO_PUP_PDN_CNTRL7_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 8"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl8( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL8_W { - GPIO_PUP_PDN_CNTRL8_W::new(self) + pub fn gpio_pup_pdn_cntrl8(&mut self) -> GPIO_PUP_PDN_CNTRL8_W { + GPIO_PUP_PDN_CNTRL8_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 9"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl9( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL9_W { - GPIO_PUP_PDN_CNTRL9_W::new(self) + pub fn gpio_pup_pdn_cntrl9(&mut self) -> GPIO_PUP_PDN_CNTRL9_W { + GPIO_PUP_PDN_CNTRL9_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 10"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl10( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL10_W { - GPIO_PUP_PDN_CNTRL10_W::new(self) + pub fn gpio_pup_pdn_cntrl10(&mut self) -> GPIO_PUP_PDN_CNTRL10_W { + GPIO_PUP_PDN_CNTRL10_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 11"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl11( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL11_W { - GPIO_PUP_PDN_CNTRL11_W::new(self) + pub fn gpio_pup_pdn_cntrl11(&mut self) -> GPIO_PUP_PDN_CNTRL11_W { + GPIO_PUP_PDN_CNTRL11_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 12"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl12( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL12_W { - GPIO_PUP_PDN_CNTRL12_W::new(self) + pub fn gpio_pup_pdn_cntrl12(&mut self) -> GPIO_PUP_PDN_CNTRL12_W { + GPIO_PUP_PDN_CNTRL12_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 13"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl13( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL13_W { - GPIO_PUP_PDN_CNTRL13_W::new(self) + pub fn gpio_pup_pdn_cntrl13(&mut self) -> GPIO_PUP_PDN_CNTRL13_W { + GPIO_PUP_PDN_CNTRL13_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 14"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl14( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL14_W { - GPIO_PUP_PDN_CNTRL14_W::new(self) + pub fn gpio_pup_pdn_cntrl14(&mut self) -> GPIO_PUP_PDN_CNTRL14_W { + GPIO_PUP_PDN_CNTRL14_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 15"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl15( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL15_W { - GPIO_PUP_PDN_CNTRL15_W::new(self) + pub fn gpio_pup_pdn_cntrl15(&mut self) -> GPIO_PUP_PDN_CNTRL15_W { + GPIO_PUP_PDN_CNTRL15_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs index 877b1ae..8d7c93d 100644 --- a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg1.rs @@ -222,137 +222,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 16"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl16( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL16_W { - GPIO_PUP_PDN_CNTRL16_W::new(self) + pub fn gpio_pup_pdn_cntrl16(&mut self) -> GPIO_PUP_PDN_CNTRL16_W { + GPIO_PUP_PDN_CNTRL16_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 17"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl17( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL17_W { - GPIO_PUP_PDN_CNTRL17_W::new(self) + pub fn gpio_pup_pdn_cntrl17(&mut self) -> GPIO_PUP_PDN_CNTRL17_W { + GPIO_PUP_PDN_CNTRL17_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 18"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl18( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL18_W { - GPIO_PUP_PDN_CNTRL18_W::new(self) + pub fn gpio_pup_pdn_cntrl18(&mut self) -> GPIO_PUP_PDN_CNTRL18_W { + GPIO_PUP_PDN_CNTRL18_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 19"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl19( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL19_W { - GPIO_PUP_PDN_CNTRL19_W::new(self) + pub fn gpio_pup_pdn_cntrl19(&mut self) -> GPIO_PUP_PDN_CNTRL19_W { + GPIO_PUP_PDN_CNTRL19_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 20"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl20( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL20_W { - GPIO_PUP_PDN_CNTRL20_W::new(self) + pub fn gpio_pup_pdn_cntrl20(&mut self) -> GPIO_PUP_PDN_CNTRL20_W { + GPIO_PUP_PDN_CNTRL20_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 21"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl21( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL21_W { - GPIO_PUP_PDN_CNTRL21_W::new(self) + pub fn gpio_pup_pdn_cntrl21(&mut self) -> GPIO_PUP_PDN_CNTRL21_W { + GPIO_PUP_PDN_CNTRL21_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 22"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl22( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL22_W { - GPIO_PUP_PDN_CNTRL22_W::new(self) + pub fn gpio_pup_pdn_cntrl22(&mut self) -> GPIO_PUP_PDN_CNTRL22_W { + GPIO_PUP_PDN_CNTRL22_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 23"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl23( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL23_W { - GPIO_PUP_PDN_CNTRL23_W::new(self) + pub fn gpio_pup_pdn_cntrl23(&mut self) -> GPIO_PUP_PDN_CNTRL23_W { + GPIO_PUP_PDN_CNTRL23_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 24"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl24( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL24_W { - GPIO_PUP_PDN_CNTRL24_W::new(self) + pub fn gpio_pup_pdn_cntrl24(&mut self) -> GPIO_PUP_PDN_CNTRL24_W { + GPIO_PUP_PDN_CNTRL24_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 25"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl25( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL25_W { - GPIO_PUP_PDN_CNTRL25_W::new(self) + pub fn gpio_pup_pdn_cntrl25(&mut self) -> GPIO_PUP_PDN_CNTRL25_W { + GPIO_PUP_PDN_CNTRL25_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 26"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl26( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL26_W { - GPIO_PUP_PDN_CNTRL26_W::new(self) + pub fn gpio_pup_pdn_cntrl26(&mut self) -> GPIO_PUP_PDN_CNTRL26_W { + GPIO_PUP_PDN_CNTRL26_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 27"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl27( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL27_W { - GPIO_PUP_PDN_CNTRL27_W::new(self) + pub fn gpio_pup_pdn_cntrl27(&mut self) -> GPIO_PUP_PDN_CNTRL27_W { + GPIO_PUP_PDN_CNTRL27_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 28"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl28( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL28_W { - GPIO_PUP_PDN_CNTRL28_W::new(self) + pub fn gpio_pup_pdn_cntrl28(&mut self) -> GPIO_PUP_PDN_CNTRL28_W { + GPIO_PUP_PDN_CNTRL28_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 29"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl29( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL29_W { - GPIO_PUP_PDN_CNTRL29_W::new(self) + pub fn gpio_pup_pdn_cntrl29(&mut self) -> GPIO_PUP_PDN_CNTRL29_W { + GPIO_PUP_PDN_CNTRL29_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 30"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl30( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL30_W { - GPIO_PUP_PDN_CNTRL30_W::new(self) + pub fn gpio_pup_pdn_cntrl30(&mut self) -> GPIO_PUP_PDN_CNTRL30_W { + GPIO_PUP_PDN_CNTRL30_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 31"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl31( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL31_W { - GPIO_PUP_PDN_CNTRL31_W::new(self) + pub fn gpio_pup_pdn_cntrl31(&mut self) -> GPIO_PUP_PDN_CNTRL31_W { + GPIO_PUP_PDN_CNTRL31_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs index dfd838d..3881adc 100644 --- a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs +++ b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg2.rs @@ -222,137 +222,105 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 32"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl32( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL32_W { - GPIO_PUP_PDN_CNTRL32_W::new(self) + pub fn gpio_pup_pdn_cntrl32(&mut self) -> GPIO_PUP_PDN_CNTRL32_W { + GPIO_PUP_PDN_CNTRL32_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 33"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl33( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL33_W { - GPIO_PUP_PDN_CNTRL33_W::new(self) + pub fn gpio_pup_pdn_cntrl33(&mut self) -> GPIO_PUP_PDN_CNTRL33_W { + GPIO_PUP_PDN_CNTRL33_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 34"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl34( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL34_W { - GPIO_PUP_PDN_CNTRL34_W::new(self) + pub fn gpio_pup_pdn_cntrl34(&mut self) -> GPIO_PUP_PDN_CNTRL34_W { + GPIO_PUP_PDN_CNTRL34_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 35"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl35( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL35_W { - GPIO_PUP_PDN_CNTRL35_W::new(self) + pub fn gpio_pup_pdn_cntrl35(&mut self) -> GPIO_PUP_PDN_CNTRL35_W { + GPIO_PUP_PDN_CNTRL35_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 36"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl36( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL36_W { - GPIO_PUP_PDN_CNTRL36_W::new(self) + pub fn gpio_pup_pdn_cntrl36(&mut self) -> GPIO_PUP_PDN_CNTRL36_W { + GPIO_PUP_PDN_CNTRL36_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 37"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl37( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL37_W { - GPIO_PUP_PDN_CNTRL37_W::new(self) + pub fn gpio_pup_pdn_cntrl37(&mut self) -> GPIO_PUP_PDN_CNTRL37_W { + GPIO_PUP_PDN_CNTRL37_W::new(self, 10) } #[doc = "Bits 12:13 - Resistor select for 38"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl38( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL38_W { - GPIO_PUP_PDN_CNTRL38_W::new(self) + pub fn gpio_pup_pdn_cntrl38(&mut self) -> GPIO_PUP_PDN_CNTRL38_W { + GPIO_PUP_PDN_CNTRL38_W::new(self, 12) } #[doc = "Bits 14:15 - Resistor select for 39"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl39( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL39_W { - GPIO_PUP_PDN_CNTRL39_W::new(self) + pub fn gpio_pup_pdn_cntrl39(&mut self) -> GPIO_PUP_PDN_CNTRL39_W { + GPIO_PUP_PDN_CNTRL39_W::new(self, 14) } #[doc = "Bits 16:17 - Resistor select for 40"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl40( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL40_W { - GPIO_PUP_PDN_CNTRL40_W::new(self) + pub fn gpio_pup_pdn_cntrl40(&mut self) -> GPIO_PUP_PDN_CNTRL40_W { + GPIO_PUP_PDN_CNTRL40_W::new(self, 16) } #[doc = "Bits 18:19 - Resistor select for 41"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl41( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL41_W { - GPIO_PUP_PDN_CNTRL41_W::new(self) + pub fn gpio_pup_pdn_cntrl41(&mut self) -> GPIO_PUP_PDN_CNTRL41_W { + GPIO_PUP_PDN_CNTRL41_W::new(self, 18) } #[doc = "Bits 20:21 - Resistor select for 42"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl42( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL42_W { - GPIO_PUP_PDN_CNTRL42_W::new(self) + pub fn gpio_pup_pdn_cntrl42(&mut self) -> GPIO_PUP_PDN_CNTRL42_W { + GPIO_PUP_PDN_CNTRL42_W::new(self, 20) } #[doc = "Bits 22:23 - Resistor select for 43"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl43( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL43_W { - GPIO_PUP_PDN_CNTRL43_W::new(self) + pub fn gpio_pup_pdn_cntrl43(&mut self) -> GPIO_PUP_PDN_CNTRL43_W { + GPIO_PUP_PDN_CNTRL43_W::new(self, 22) } #[doc = "Bits 24:25 - Resistor select for 44"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl44( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL44_W { - GPIO_PUP_PDN_CNTRL44_W::new(self) + pub fn gpio_pup_pdn_cntrl44(&mut self) -> GPIO_PUP_PDN_CNTRL44_W { + GPIO_PUP_PDN_CNTRL44_W::new(self, 24) } #[doc = "Bits 26:27 - Resistor select for 45"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl45( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL45_W { - GPIO_PUP_PDN_CNTRL45_W::new(self) + pub fn gpio_pup_pdn_cntrl45(&mut self) -> GPIO_PUP_PDN_CNTRL45_W { + GPIO_PUP_PDN_CNTRL45_W::new(self, 26) } #[doc = "Bits 28:29 - Resistor select for 46"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl46( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL46_W { - GPIO_PUP_PDN_CNTRL46_W::new(self) + pub fn gpio_pup_pdn_cntrl46(&mut self) -> GPIO_PUP_PDN_CNTRL46_W { + GPIO_PUP_PDN_CNTRL46_W::new(self, 28) } #[doc = "Bits 30:31 - Resistor select for 47"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl47( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL47_W { - GPIO_PUP_PDN_CNTRL47_W::new(self) + pub fn gpio_pup_pdn_cntrl47(&mut self) -> GPIO_PUP_PDN_CNTRL47_W { + GPIO_PUP_PDN_CNTRL47_W::new(self, 30) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs index 52b564a..d8c1f24 100644 --- a/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs +++ b/crates/bcm2837-lpa/src/gpio/gpio_pup_pdn_cntrl_reg3.rs @@ -92,57 +92,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Resistor select for 48"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl48( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL48_W { - GPIO_PUP_PDN_CNTRL48_W::new(self) + pub fn gpio_pup_pdn_cntrl48(&mut self) -> GPIO_PUP_PDN_CNTRL48_W { + GPIO_PUP_PDN_CNTRL48_W::new(self, 0) } #[doc = "Bits 2:3 - Resistor select for 49"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl49( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL49_W { - GPIO_PUP_PDN_CNTRL49_W::new(self) + pub fn gpio_pup_pdn_cntrl49(&mut self) -> GPIO_PUP_PDN_CNTRL49_W { + GPIO_PUP_PDN_CNTRL49_W::new(self, 2) } #[doc = "Bits 4:5 - Resistor select for 50"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl50( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL50_W { - GPIO_PUP_PDN_CNTRL50_W::new(self) + pub fn gpio_pup_pdn_cntrl50(&mut self) -> GPIO_PUP_PDN_CNTRL50_W { + GPIO_PUP_PDN_CNTRL50_W::new(self, 4) } #[doc = "Bits 6:7 - Resistor select for 51"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl51( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL51_W { - GPIO_PUP_PDN_CNTRL51_W::new(self) + pub fn gpio_pup_pdn_cntrl51(&mut self) -> GPIO_PUP_PDN_CNTRL51_W { + GPIO_PUP_PDN_CNTRL51_W::new(self, 6) } #[doc = "Bits 8:9 - Resistor select for 52"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl52( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL52_W { - GPIO_PUP_PDN_CNTRL52_W::new(self) + pub fn gpio_pup_pdn_cntrl52(&mut self) -> GPIO_PUP_PDN_CNTRL52_W { + GPIO_PUP_PDN_CNTRL52_W::new(self, 8) } #[doc = "Bits 10:11 - Resistor select for 53"] #[inline(always)] #[must_use] - pub fn gpio_pup_pdn_cntrl53( - &mut self, - ) -> GPIO_PUP_PDN_CNTRL53_W { - GPIO_PUP_PDN_CNTRL53_W::new(self) + pub fn gpio_pup_pdn_cntrl53(&mut self) -> GPIO_PUP_PDN_CNTRL53_W { + GPIO_PUP_PDN_CNTRL53_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gplen0.rs b/crates/bcm2837-lpa/src/gpio/gplen0.rs index bfac268..2d0f220 100644 --- a/crates/bcm2837-lpa/src/gpio/gplen0.rs +++ b/crates/bcm2837-lpa/src/gpio/gplen0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `LEN0` reader - Low detect enabled 0"] pub type LEN0_R = crate::BitReader; #[doc = "Field `LEN0` writer - Low detect enabled 0"] -pub type LEN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN1` reader - Low detect enabled 1"] pub type LEN1_R = crate::BitReader; #[doc = "Field `LEN1` writer - Low detect enabled 1"] -pub type LEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN2` reader - Low detect enabled 2"] pub type LEN2_R = crate::BitReader; #[doc = "Field `LEN2` writer - Low detect enabled 2"] -pub type LEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN3` reader - Low detect enabled 3"] pub type LEN3_R = crate::BitReader; #[doc = "Field `LEN3` writer - Low detect enabled 3"] -pub type LEN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN4` reader - Low detect enabled 4"] pub type LEN4_R = crate::BitReader; #[doc = "Field `LEN4` writer - Low detect enabled 4"] -pub type LEN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN5` reader - Low detect enabled 5"] pub type LEN5_R = crate::BitReader; #[doc = "Field `LEN5` writer - Low detect enabled 5"] -pub type LEN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN6` reader - Low detect enabled 6"] pub type LEN6_R = crate::BitReader; #[doc = "Field `LEN6` writer - Low detect enabled 6"] -pub type LEN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN7` reader - Low detect enabled 7"] pub type LEN7_R = crate::BitReader; #[doc = "Field `LEN7` writer - Low detect enabled 7"] -pub type LEN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN8` reader - Low detect enabled 8"] pub type LEN8_R = crate::BitReader; #[doc = "Field `LEN8` writer - Low detect enabled 8"] -pub type LEN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN9` reader - Low detect enabled 9"] pub type LEN9_R = crate::BitReader; #[doc = "Field `LEN9` writer - Low detect enabled 9"] -pub type LEN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN10` reader - Low detect enabled 10"] pub type LEN10_R = crate::BitReader; #[doc = "Field `LEN10` writer - Low detect enabled 10"] -pub type LEN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN11` reader - Low detect enabled 11"] pub type LEN11_R = crate::BitReader; #[doc = "Field `LEN11` writer - Low detect enabled 11"] -pub type LEN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN12` reader - Low detect enabled 12"] pub type LEN12_R = crate::BitReader; #[doc = "Field `LEN12` writer - Low detect enabled 12"] -pub type LEN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN13` reader - Low detect enabled 13"] pub type LEN13_R = crate::BitReader; #[doc = "Field `LEN13` writer - Low detect enabled 13"] -pub type LEN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN14` reader - Low detect enabled 14"] pub type LEN14_R = crate::BitReader; #[doc = "Field `LEN14` writer - Low detect enabled 14"] -pub type LEN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN15` reader - Low detect enabled 15"] pub type LEN15_R = crate::BitReader; #[doc = "Field `LEN15` writer - Low detect enabled 15"] -pub type LEN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN16` reader - Low detect enabled 16"] pub type LEN16_R = crate::BitReader; #[doc = "Field `LEN16` writer - Low detect enabled 16"] -pub type LEN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN17` reader - Low detect enabled 17"] pub type LEN17_R = crate::BitReader; #[doc = "Field `LEN17` writer - Low detect enabled 17"] -pub type LEN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN18` reader - Low detect enabled 18"] pub type LEN18_R = crate::BitReader; #[doc = "Field `LEN18` writer - Low detect enabled 18"] -pub type LEN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN19` reader - Low detect enabled 19"] pub type LEN19_R = crate::BitReader; #[doc = "Field `LEN19` writer - Low detect enabled 19"] -pub type LEN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN20` reader - Low detect enabled 20"] pub type LEN20_R = crate::BitReader; #[doc = "Field `LEN20` writer - Low detect enabled 20"] -pub type LEN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN21` reader - Low detect enabled 21"] pub type LEN21_R = crate::BitReader; #[doc = "Field `LEN21` writer - Low detect enabled 21"] -pub type LEN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN22` reader - Low detect enabled 22"] pub type LEN22_R = crate::BitReader; #[doc = "Field `LEN22` writer - Low detect enabled 22"] -pub type LEN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN23` reader - Low detect enabled 23"] pub type LEN23_R = crate::BitReader; #[doc = "Field `LEN23` writer - Low detect enabled 23"] -pub type LEN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN24` reader - Low detect enabled 24"] pub type LEN24_R = crate::BitReader; #[doc = "Field `LEN24` writer - Low detect enabled 24"] -pub type LEN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN25` reader - Low detect enabled 25"] pub type LEN25_R = crate::BitReader; #[doc = "Field `LEN25` writer - Low detect enabled 25"] -pub type LEN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN26` reader - Low detect enabled 26"] pub type LEN26_R = crate::BitReader; #[doc = "Field `LEN26` writer - Low detect enabled 26"] -pub type LEN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN27` reader - Low detect enabled 27"] pub type LEN27_R = crate::BitReader; #[doc = "Field `LEN27` writer - Low detect enabled 27"] -pub type LEN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN28` reader - Low detect enabled 28"] pub type LEN28_R = crate::BitReader; #[doc = "Field `LEN28` writer - Low detect enabled 28"] -pub type LEN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN29` reader - Low detect enabled 29"] pub type LEN29_R = crate::BitReader; #[doc = "Field `LEN29` writer - Low detect enabled 29"] -pub type LEN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN30` reader - Low detect enabled 30"] pub type LEN30_R = crate::BitReader; #[doc = "Field `LEN30` writer - Low detect enabled 30"] -pub type LEN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN31` reader - Low detect enabled 31"] pub type LEN31_R = crate::BitReader; #[doc = "Field `LEN31` writer - Low detect enabled 31"] -pub type LEN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Low detect enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Low detect enabled 0"] #[inline(always)] #[must_use] - pub fn len0(&mut self) -> LEN0_W { - LEN0_W::new(self) + pub fn len0(&mut self) -> LEN0_W { + LEN0_W::new(self, 0) } #[doc = "Bit 1 - Low detect enabled 1"] #[inline(always)] #[must_use] - pub fn len1(&mut self) -> LEN1_W { - LEN1_W::new(self) + pub fn len1(&mut self) -> LEN1_W { + LEN1_W::new(self, 1) } #[doc = "Bit 2 - Low detect enabled 2"] #[inline(always)] #[must_use] - pub fn len2(&mut self) -> LEN2_W { - LEN2_W::new(self) + pub fn len2(&mut self) -> LEN2_W { + LEN2_W::new(self, 2) } #[doc = "Bit 3 - Low detect enabled 3"] #[inline(always)] #[must_use] - pub fn len3(&mut self) -> LEN3_W { - LEN3_W::new(self) + pub fn len3(&mut self) -> LEN3_W { + LEN3_W::new(self, 3) } #[doc = "Bit 4 - Low detect enabled 4"] #[inline(always)] #[must_use] - pub fn len4(&mut self) -> LEN4_W { - LEN4_W::new(self) + pub fn len4(&mut self) -> LEN4_W { + LEN4_W::new(self, 4) } #[doc = "Bit 5 - Low detect enabled 5"] #[inline(always)] #[must_use] - pub fn len5(&mut self) -> LEN5_W { - LEN5_W::new(self) + pub fn len5(&mut self) -> LEN5_W { + LEN5_W::new(self, 5) } #[doc = "Bit 6 - Low detect enabled 6"] #[inline(always)] #[must_use] - pub fn len6(&mut self) -> LEN6_W { - LEN6_W::new(self) + pub fn len6(&mut self) -> LEN6_W { + LEN6_W::new(self, 6) } #[doc = "Bit 7 - Low detect enabled 7"] #[inline(always)] #[must_use] - pub fn len7(&mut self) -> LEN7_W { - LEN7_W::new(self) + pub fn len7(&mut self) -> LEN7_W { + LEN7_W::new(self, 7) } #[doc = "Bit 8 - Low detect enabled 8"] #[inline(always)] #[must_use] - pub fn len8(&mut self) -> LEN8_W { - LEN8_W::new(self) + pub fn len8(&mut self) -> LEN8_W { + LEN8_W::new(self, 8) } #[doc = "Bit 9 - Low detect enabled 9"] #[inline(always)] #[must_use] - pub fn len9(&mut self) -> LEN9_W { - LEN9_W::new(self) + pub fn len9(&mut self) -> LEN9_W { + LEN9_W::new(self, 9) } #[doc = "Bit 10 - Low detect enabled 10"] #[inline(always)] #[must_use] - pub fn len10(&mut self) -> LEN10_W { - LEN10_W::new(self) + pub fn len10(&mut self) -> LEN10_W { + LEN10_W::new(self, 10) } #[doc = "Bit 11 - Low detect enabled 11"] #[inline(always)] #[must_use] - pub fn len11(&mut self) -> LEN11_W { - LEN11_W::new(self) + pub fn len11(&mut self) -> LEN11_W { + LEN11_W::new(self, 11) } #[doc = "Bit 12 - Low detect enabled 12"] #[inline(always)] #[must_use] - pub fn len12(&mut self) -> LEN12_W { - LEN12_W::new(self) + pub fn len12(&mut self) -> LEN12_W { + LEN12_W::new(self, 12) } #[doc = "Bit 13 - Low detect enabled 13"] #[inline(always)] #[must_use] - pub fn len13(&mut self) -> LEN13_W { - LEN13_W::new(self) + pub fn len13(&mut self) -> LEN13_W { + LEN13_W::new(self, 13) } #[doc = "Bit 14 - Low detect enabled 14"] #[inline(always)] #[must_use] - pub fn len14(&mut self) -> LEN14_W { - LEN14_W::new(self) + pub fn len14(&mut self) -> LEN14_W { + LEN14_W::new(self, 14) } #[doc = "Bit 15 - Low detect enabled 15"] #[inline(always)] #[must_use] - pub fn len15(&mut self) -> LEN15_W { - LEN15_W::new(self) + pub fn len15(&mut self) -> LEN15_W { + LEN15_W::new(self, 15) } #[doc = "Bit 16 - Low detect enabled 16"] #[inline(always)] #[must_use] - pub fn len16(&mut self) -> LEN16_W { - LEN16_W::new(self) + pub fn len16(&mut self) -> LEN16_W { + LEN16_W::new(self, 16) } #[doc = "Bit 17 - Low detect enabled 17"] #[inline(always)] #[must_use] - pub fn len17(&mut self) -> LEN17_W { - LEN17_W::new(self) + pub fn len17(&mut self) -> LEN17_W { + LEN17_W::new(self, 17) } #[doc = "Bit 18 - Low detect enabled 18"] #[inline(always)] #[must_use] - pub fn len18(&mut self) -> LEN18_W { - LEN18_W::new(self) + pub fn len18(&mut self) -> LEN18_W { + LEN18_W::new(self, 18) } #[doc = "Bit 19 - Low detect enabled 19"] #[inline(always)] #[must_use] - pub fn len19(&mut self) -> LEN19_W { - LEN19_W::new(self) + pub fn len19(&mut self) -> LEN19_W { + LEN19_W::new(self, 19) } #[doc = "Bit 20 - Low detect enabled 20"] #[inline(always)] #[must_use] - pub fn len20(&mut self) -> LEN20_W { - LEN20_W::new(self) + pub fn len20(&mut self) -> LEN20_W { + LEN20_W::new(self, 20) } #[doc = "Bit 21 - Low detect enabled 21"] #[inline(always)] #[must_use] - pub fn len21(&mut self) -> LEN21_W { - LEN21_W::new(self) + pub fn len21(&mut self) -> LEN21_W { + LEN21_W::new(self, 21) } #[doc = "Bit 22 - Low detect enabled 22"] #[inline(always)] #[must_use] - pub fn len22(&mut self) -> LEN22_W { - LEN22_W::new(self) + pub fn len22(&mut self) -> LEN22_W { + LEN22_W::new(self, 22) } #[doc = "Bit 23 - Low detect enabled 23"] #[inline(always)] #[must_use] - pub fn len23(&mut self) -> LEN23_W { - LEN23_W::new(self) + pub fn len23(&mut self) -> LEN23_W { + LEN23_W::new(self, 23) } #[doc = "Bit 24 - Low detect enabled 24"] #[inline(always)] #[must_use] - pub fn len24(&mut self) -> LEN24_W { - LEN24_W::new(self) + pub fn len24(&mut self) -> LEN24_W { + LEN24_W::new(self, 24) } #[doc = "Bit 25 - Low detect enabled 25"] #[inline(always)] #[must_use] - pub fn len25(&mut self) -> LEN25_W { - LEN25_W::new(self) + pub fn len25(&mut self) -> LEN25_W { + LEN25_W::new(self, 25) } #[doc = "Bit 26 - Low detect enabled 26"] #[inline(always)] #[must_use] - pub fn len26(&mut self) -> LEN26_W { - LEN26_W::new(self) + pub fn len26(&mut self) -> LEN26_W { + LEN26_W::new(self, 26) } #[doc = "Bit 27 - Low detect enabled 27"] #[inline(always)] #[must_use] - pub fn len27(&mut self) -> LEN27_W { - LEN27_W::new(self) + pub fn len27(&mut self) -> LEN27_W { + LEN27_W::new(self, 27) } #[doc = "Bit 28 - Low detect enabled 28"] #[inline(always)] #[must_use] - pub fn len28(&mut self) -> LEN28_W { - LEN28_W::new(self) + pub fn len28(&mut self) -> LEN28_W { + LEN28_W::new(self, 28) } #[doc = "Bit 29 - Low detect enabled 29"] #[inline(always)] #[must_use] - pub fn len29(&mut self) -> LEN29_W { - LEN29_W::new(self) + pub fn len29(&mut self) -> LEN29_W { + LEN29_W::new(self, 29) } #[doc = "Bit 30 - Low detect enabled 30"] #[inline(always)] #[must_use] - pub fn len30(&mut self) -> LEN30_W { - LEN30_W::new(self) + pub fn len30(&mut self) -> LEN30_W { + LEN30_W::new(self, 30) } #[doc = "Bit 31 - Low detect enabled 31"] #[inline(always)] #[must_use] - pub fn len31(&mut self) -> LEN31_W { - LEN31_W::new(self) + pub fn len31(&mut self) -> LEN31_W { + LEN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gplen1.rs b/crates/bcm2837-lpa/src/gpio/gplen1.rs index bcf3f46..e199d0b 100644 --- a/crates/bcm2837-lpa/src/gpio/gplen1.rs +++ b/crates/bcm2837-lpa/src/gpio/gplen1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `LEN32` reader - Low detect enabled 32"] pub type LEN32_R = crate::BitReader; #[doc = "Field `LEN32` writer - Low detect enabled 32"] -pub type LEN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN33` reader - Low detect enabled 33"] pub type LEN33_R = crate::BitReader; #[doc = "Field `LEN33` writer - Low detect enabled 33"] -pub type LEN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN34` reader - Low detect enabled 34"] pub type LEN34_R = crate::BitReader; #[doc = "Field `LEN34` writer - Low detect enabled 34"] -pub type LEN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN35` reader - Low detect enabled 35"] pub type LEN35_R = crate::BitReader; #[doc = "Field `LEN35` writer - Low detect enabled 35"] -pub type LEN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN36` reader - Low detect enabled 36"] pub type LEN36_R = crate::BitReader; #[doc = "Field `LEN36` writer - Low detect enabled 36"] -pub type LEN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN37` reader - Low detect enabled 37"] pub type LEN37_R = crate::BitReader; #[doc = "Field `LEN37` writer - Low detect enabled 37"] -pub type LEN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN38` reader - Low detect enabled 38"] pub type LEN38_R = crate::BitReader; #[doc = "Field `LEN38` writer - Low detect enabled 38"] -pub type LEN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN39` reader - Low detect enabled 39"] pub type LEN39_R = crate::BitReader; #[doc = "Field `LEN39` writer - Low detect enabled 39"] -pub type LEN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN40` reader - Low detect enabled 40"] pub type LEN40_R = crate::BitReader; #[doc = "Field `LEN40` writer - Low detect enabled 40"] -pub type LEN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN41` reader - Low detect enabled 41"] pub type LEN41_R = crate::BitReader; #[doc = "Field `LEN41` writer - Low detect enabled 41"] -pub type LEN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN42` reader - Low detect enabled 42"] pub type LEN42_R = crate::BitReader; #[doc = "Field `LEN42` writer - Low detect enabled 42"] -pub type LEN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN43` reader - Low detect enabled 43"] pub type LEN43_R = crate::BitReader; #[doc = "Field `LEN43` writer - Low detect enabled 43"] -pub type LEN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN44` reader - Low detect enabled 44"] pub type LEN44_R = crate::BitReader; #[doc = "Field `LEN44` writer - Low detect enabled 44"] -pub type LEN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN45` reader - Low detect enabled 45"] pub type LEN45_R = crate::BitReader; #[doc = "Field `LEN45` writer - Low detect enabled 45"] -pub type LEN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN46` reader - Low detect enabled 46"] pub type LEN46_R = crate::BitReader; #[doc = "Field `LEN46` writer - Low detect enabled 46"] -pub type LEN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN47` reader - Low detect enabled 47"] pub type LEN47_R = crate::BitReader; #[doc = "Field `LEN47` writer - Low detect enabled 47"] -pub type LEN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN48` reader - Low detect enabled 48"] pub type LEN48_R = crate::BitReader; #[doc = "Field `LEN48` writer - Low detect enabled 48"] -pub type LEN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN49` reader - Low detect enabled 49"] pub type LEN49_R = crate::BitReader; #[doc = "Field `LEN49` writer - Low detect enabled 49"] -pub type LEN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN50` reader - Low detect enabled 50"] pub type LEN50_R = crate::BitReader; #[doc = "Field `LEN50` writer - Low detect enabled 50"] -pub type LEN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN51` reader - Low detect enabled 51"] pub type LEN51_R = crate::BitReader; #[doc = "Field `LEN51` writer - Low detect enabled 51"] -pub type LEN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN52` reader - Low detect enabled 52"] pub type LEN52_R = crate::BitReader; #[doc = "Field `LEN52` writer - Low detect enabled 52"] -pub type LEN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN53` reader - Low detect enabled 53"] pub type LEN53_R = crate::BitReader; #[doc = "Field `LEN53` writer - Low detect enabled 53"] -pub type LEN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Low detect enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Low detect enabled 32"] #[inline(always)] #[must_use] - pub fn len32(&mut self) -> LEN32_W { - LEN32_W::new(self) + pub fn len32(&mut self) -> LEN32_W { + LEN32_W::new(self, 0) } #[doc = "Bit 1 - Low detect enabled 33"] #[inline(always)] #[must_use] - pub fn len33(&mut self) -> LEN33_W { - LEN33_W::new(self) + pub fn len33(&mut self) -> LEN33_W { + LEN33_W::new(self, 1) } #[doc = "Bit 2 - Low detect enabled 34"] #[inline(always)] #[must_use] - pub fn len34(&mut self) -> LEN34_W { - LEN34_W::new(self) + pub fn len34(&mut self) -> LEN34_W { + LEN34_W::new(self, 2) } #[doc = "Bit 3 - Low detect enabled 35"] #[inline(always)] #[must_use] - pub fn len35(&mut self) -> LEN35_W { - LEN35_W::new(self) + pub fn len35(&mut self) -> LEN35_W { + LEN35_W::new(self, 3) } #[doc = "Bit 4 - Low detect enabled 36"] #[inline(always)] #[must_use] - pub fn len36(&mut self) -> LEN36_W { - LEN36_W::new(self) + pub fn len36(&mut self) -> LEN36_W { + LEN36_W::new(self, 4) } #[doc = "Bit 5 - Low detect enabled 37"] #[inline(always)] #[must_use] - pub fn len37(&mut self) -> LEN37_W { - LEN37_W::new(self) + pub fn len37(&mut self) -> LEN37_W { + LEN37_W::new(self, 5) } #[doc = "Bit 6 - Low detect enabled 38"] #[inline(always)] #[must_use] - pub fn len38(&mut self) -> LEN38_W { - LEN38_W::new(self) + pub fn len38(&mut self) -> LEN38_W { + LEN38_W::new(self, 6) } #[doc = "Bit 7 - Low detect enabled 39"] #[inline(always)] #[must_use] - pub fn len39(&mut self) -> LEN39_W { - LEN39_W::new(self) + pub fn len39(&mut self) -> LEN39_W { + LEN39_W::new(self, 7) } #[doc = "Bit 8 - Low detect enabled 40"] #[inline(always)] #[must_use] - pub fn len40(&mut self) -> LEN40_W { - LEN40_W::new(self) + pub fn len40(&mut self) -> LEN40_W { + LEN40_W::new(self, 8) } #[doc = "Bit 9 - Low detect enabled 41"] #[inline(always)] #[must_use] - pub fn len41(&mut self) -> LEN41_W { - LEN41_W::new(self) + pub fn len41(&mut self) -> LEN41_W { + LEN41_W::new(self, 9) } #[doc = "Bit 10 - Low detect enabled 42"] #[inline(always)] #[must_use] - pub fn len42(&mut self) -> LEN42_W { - LEN42_W::new(self) + pub fn len42(&mut self) -> LEN42_W { + LEN42_W::new(self, 10) } #[doc = "Bit 11 - Low detect enabled 43"] #[inline(always)] #[must_use] - pub fn len43(&mut self) -> LEN43_W { - LEN43_W::new(self) + pub fn len43(&mut self) -> LEN43_W { + LEN43_W::new(self, 11) } #[doc = "Bit 12 - Low detect enabled 44"] #[inline(always)] #[must_use] - pub fn len44(&mut self) -> LEN44_W { - LEN44_W::new(self) + pub fn len44(&mut self) -> LEN44_W { + LEN44_W::new(self, 12) } #[doc = "Bit 13 - Low detect enabled 45"] #[inline(always)] #[must_use] - pub fn len45(&mut self) -> LEN45_W { - LEN45_W::new(self) + pub fn len45(&mut self) -> LEN45_W { + LEN45_W::new(self, 13) } #[doc = "Bit 14 - Low detect enabled 46"] #[inline(always)] #[must_use] - pub fn len46(&mut self) -> LEN46_W { - LEN46_W::new(self) + pub fn len46(&mut self) -> LEN46_W { + LEN46_W::new(self, 14) } #[doc = "Bit 15 - Low detect enabled 47"] #[inline(always)] #[must_use] - pub fn len47(&mut self) -> LEN47_W { - LEN47_W::new(self) + pub fn len47(&mut self) -> LEN47_W { + LEN47_W::new(self, 15) } #[doc = "Bit 16 - Low detect enabled 48"] #[inline(always)] #[must_use] - pub fn len48(&mut self) -> LEN48_W { - LEN48_W::new(self) + pub fn len48(&mut self) -> LEN48_W { + LEN48_W::new(self, 16) } #[doc = "Bit 17 - Low detect enabled 49"] #[inline(always)] #[must_use] - pub fn len49(&mut self) -> LEN49_W { - LEN49_W::new(self) + pub fn len49(&mut self) -> LEN49_W { + LEN49_W::new(self, 17) } #[doc = "Bit 18 - Low detect enabled 50"] #[inline(always)] #[must_use] - pub fn len50(&mut self) -> LEN50_W { - LEN50_W::new(self) + pub fn len50(&mut self) -> LEN50_W { + LEN50_W::new(self, 18) } #[doc = "Bit 19 - Low detect enabled 51"] #[inline(always)] #[must_use] - pub fn len51(&mut self) -> LEN51_W { - LEN51_W::new(self) + pub fn len51(&mut self) -> LEN51_W { + LEN51_W::new(self, 19) } #[doc = "Bit 20 - Low detect enabled 52"] #[inline(always)] #[must_use] - pub fn len52(&mut self) -> LEN52_W { - LEN52_W::new(self) + pub fn len52(&mut self) -> LEN52_W { + LEN52_W::new(self, 20) } #[doc = "Bit 21 - Low detect enabled 53"] #[inline(always)] #[must_use] - pub fn len53(&mut self) -> LEN53_W { - LEN53_W::new(self) + pub fn len53(&mut self) -> LEN53_W { + LEN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gplev0.rs b/crates/bcm2837-lpa/src/gpio/gplev0.rs index 43e1e5c..3179253 100644 --- a/crates/bcm2837-lpa/src/gpio/gplev0.rs +++ b/crates/bcm2837-lpa/src/gpio/gplev0.rs @@ -266,7 +266,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "GPIO Pin Level 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gplev0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/gpio/gplev1.rs b/crates/bcm2837-lpa/src/gpio/gplev1.rs index e881649..7648da2 100644 --- a/crates/bcm2837-lpa/src/gpio/gplev1.rs +++ b/crates/bcm2837-lpa/src/gpio/gplev1.rs @@ -186,7 +186,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "GPIO Pin Level 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gplev1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/gpio/gpren0.rs b/crates/bcm2837-lpa/src/gpio/gpren0.rs index f4dfc2e..59cff0d 100644 --- a/crates/bcm2837-lpa/src/gpio/gpren0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpren0.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `REN0` reader - Rising edge enabled 0"] pub type REN0_R = crate::BitReader; #[doc = "Field `REN0` writer - Rising edge enabled 0"] -pub type REN0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN1` reader - Rising edge enabled 1"] pub type REN1_R = crate::BitReader; #[doc = "Field `REN1` writer - Rising edge enabled 1"] -pub type REN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN2` reader - Rising edge enabled 2"] pub type REN2_R = crate::BitReader; #[doc = "Field `REN2` writer - Rising edge enabled 2"] -pub type REN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN3` reader - Rising edge enabled 3"] pub type REN3_R = crate::BitReader; #[doc = "Field `REN3` writer - Rising edge enabled 3"] -pub type REN3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN4` reader - Rising edge enabled 4"] pub type REN4_R = crate::BitReader; #[doc = "Field `REN4` writer - Rising edge enabled 4"] -pub type REN4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN5` reader - Rising edge enabled 5"] pub type REN5_R = crate::BitReader; #[doc = "Field `REN5` writer - Rising edge enabled 5"] -pub type REN5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN6` reader - Rising edge enabled 6"] pub type REN6_R = crate::BitReader; #[doc = "Field `REN6` writer - Rising edge enabled 6"] -pub type REN6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN7` reader - Rising edge enabled 7"] pub type REN7_R = crate::BitReader; #[doc = "Field `REN7` writer - Rising edge enabled 7"] -pub type REN7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN8` reader - Rising edge enabled 8"] pub type REN8_R = crate::BitReader; #[doc = "Field `REN8` writer - Rising edge enabled 8"] -pub type REN8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN9` reader - Rising edge enabled 9"] pub type REN9_R = crate::BitReader; #[doc = "Field `REN9` writer - Rising edge enabled 9"] -pub type REN9_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN10` reader - Rising edge enabled 10"] pub type REN10_R = crate::BitReader; #[doc = "Field `REN10` writer - Rising edge enabled 10"] -pub type REN10_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN11` reader - Rising edge enabled 11"] pub type REN11_R = crate::BitReader; #[doc = "Field `REN11` writer - Rising edge enabled 11"] -pub type REN11_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN12` reader - Rising edge enabled 12"] pub type REN12_R = crate::BitReader; #[doc = "Field `REN12` writer - Rising edge enabled 12"] -pub type REN12_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN13` reader - Rising edge enabled 13"] pub type REN13_R = crate::BitReader; #[doc = "Field `REN13` writer - Rising edge enabled 13"] -pub type REN13_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN14` reader - Rising edge enabled 14"] pub type REN14_R = crate::BitReader; #[doc = "Field `REN14` writer - Rising edge enabled 14"] -pub type REN14_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN15` reader - Rising edge enabled 15"] pub type REN15_R = crate::BitReader; #[doc = "Field `REN15` writer - Rising edge enabled 15"] -pub type REN15_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN16` reader - Rising edge enabled 16"] pub type REN16_R = crate::BitReader; #[doc = "Field `REN16` writer - Rising edge enabled 16"] -pub type REN16_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN17` reader - Rising edge enabled 17"] pub type REN17_R = crate::BitReader; #[doc = "Field `REN17` writer - Rising edge enabled 17"] -pub type REN17_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN18` reader - Rising edge enabled 18"] pub type REN18_R = crate::BitReader; #[doc = "Field `REN18` writer - Rising edge enabled 18"] -pub type REN18_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN19` reader - Rising edge enabled 19"] pub type REN19_R = crate::BitReader; #[doc = "Field `REN19` writer - Rising edge enabled 19"] -pub type REN19_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN20` reader - Rising edge enabled 20"] pub type REN20_R = crate::BitReader; #[doc = "Field `REN20` writer - Rising edge enabled 20"] -pub type REN20_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN21` reader - Rising edge enabled 21"] pub type REN21_R = crate::BitReader; #[doc = "Field `REN21` writer - Rising edge enabled 21"] -pub type REN21_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN22` reader - Rising edge enabled 22"] pub type REN22_R = crate::BitReader; #[doc = "Field `REN22` writer - Rising edge enabled 22"] -pub type REN22_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN23` reader - Rising edge enabled 23"] pub type REN23_R = crate::BitReader; #[doc = "Field `REN23` writer - Rising edge enabled 23"] -pub type REN23_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN24` reader - Rising edge enabled 24"] pub type REN24_R = crate::BitReader; #[doc = "Field `REN24` writer - Rising edge enabled 24"] -pub type REN24_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN25` reader - Rising edge enabled 25"] pub type REN25_R = crate::BitReader; #[doc = "Field `REN25` writer - Rising edge enabled 25"] -pub type REN25_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN26` reader - Rising edge enabled 26"] pub type REN26_R = crate::BitReader; #[doc = "Field `REN26` writer - Rising edge enabled 26"] -pub type REN26_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN27` reader - Rising edge enabled 27"] pub type REN27_R = crate::BitReader; #[doc = "Field `REN27` writer - Rising edge enabled 27"] -pub type REN27_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN28` reader - Rising edge enabled 28"] pub type REN28_R = crate::BitReader; #[doc = "Field `REN28` writer - Rising edge enabled 28"] -pub type REN28_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN29` reader - Rising edge enabled 29"] pub type REN29_R = crate::BitReader; #[doc = "Field `REN29` writer - Rising edge enabled 29"] -pub type REN29_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN30` reader - Rising edge enabled 30"] pub type REN30_R = crate::BitReader; #[doc = "Field `REN30` writer - Rising edge enabled 30"] -pub type REN30_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN31` reader - Rising edge enabled 31"] pub type REN31_R = crate::BitReader; #[doc = "Field `REN31` writer - Rising edge enabled 31"] -pub type REN31_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge enabled 0"] #[inline(always)] @@ -332,201 +332,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Rising edge enabled 0"] #[inline(always)] #[must_use] - pub fn ren0(&mut self) -> REN0_W { - REN0_W::new(self) + pub fn ren0(&mut self) -> REN0_W { + REN0_W::new(self, 0) } #[doc = "Bit 1 - Rising edge enabled 1"] #[inline(always)] #[must_use] - pub fn ren1(&mut self) -> REN1_W { - REN1_W::new(self) + pub fn ren1(&mut self) -> REN1_W { + REN1_W::new(self, 1) } #[doc = "Bit 2 - Rising edge enabled 2"] #[inline(always)] #[must_use] - pub fn ren2(&mut self) -> REN2_W { - REN2_W::new(self) + pub fn ren2(&mut self) -> REN2_W { + REN2_W::new(self, 2) } #[doc = "Bit 3 - Rising edge enabled 3"] #[inline(always)] #[must_use] - pub fn ren3(&mut self) -> REN3_W { - REN3_W::new(self) + pub fn ren3(&mut self) -> REN3_W { + REN3_W::new(self, 3) } #[doc = "Bit 4 - Rising edge enabled 4"] #[inline(always)] #[must_use] - pub fn ren4(&mut self) -> REN4_W { - REN4_W::new(self) + pub fn ren4(&mut self) -> REN4_W { + REN4_W::new(self, 4) } #[doc = "Bit 5 - Rising edge enabled 5"] #[inline(always)] #[must_use] - pub fn ren5(&mut self) -> REN5_W { - REN5_W::new(self) + pub fn ren5(&mut self) -> REN5_W { + REN5_W::new(self, 5) } #[doc = "Bit 6 - Rising edge enabled 6"] #[inline(always)] #[must_use] - pub fn ren6(&mut self) -> REN6_W { - REN6_W::new(self) + pub fn ren6(&mut self) -> REN6_W { + REN6_W::new(self, 6) } #[doc = "Bit 7 - Rising edge enabled 7"] #[inline(always)] #[must_use] - pub fn ren7(&mut self) -> REN7_W { - REN7_W::new(self) + pub fn ren7(&mut self) -> REN7_W { + REN7_W::new(self, 7) } #[doc = "Bit 8 - Rising edge enabled 8"] #[inline(always)] #[must_use] - pub fn ren8(&mut self) -> REN8_W { - REN8_W::new(self) + pub fn ren8(&mut self) -> REN8_W { + REN8_W::new(self, 8) } #[doc = "Bit 9 - Rising edge enabled 9"] #[inline(always)] #[must_use] - pub fn ren9(&mut self) -> REN9_W { - REN9_W::new(self) + pub fn ren9(&mut self) -> REN9_W { + REN9_W::new(self, 9) } #[doc = "Bit 10 - Rising edge enabled 10"] #[inline(always)] #[must_use] - pub fn ren10(&mut self) -> REN10_W { - REN10_W::new(self) + pub fn ren10(&mut self) -> REN10_W { + REN10_W::new(self, 10) } #[doc = "Bit 11 - Rising edge enabled 11"] #[inline(always)] #[must_use] - pub fn ren11(&mut self) -> REN11_W { - REN11_W::new(self) + pub fn ren11(&mut self) -> REN11_W { + REN11_W::new(self, 11) } #[doc = "Bit 12 - Rising edge enabled 12"] #[inline(always)] #[must_use] - pub fn ren12(&mut self) -> REN12_W { - REN12_W::new(self) + pub fn ren12(&mut self) -> REN12_W { + REN12_W::new(self, 12) } #[doc = "Bit 13 - Rising edge enabled 13"] #[inline(always)] #[must_use] - pub fn ren13(&mut self) -> REN13_W { - REN13_W::new(self) + pub fn ren13(&mut self) -> REN13_W { + REN13_W::new(self, 13) } #[doc = "Bit 14 - Rising edge enabled 14"] #[inline(always)] #[must_use] - pub fn ren14(&mut self) -> REN14_W { - REN14_W::new(self) + pub fn ren14(&mut self) -> REN14_W { + REN14_W::new(self, 14) } #[doc = "Bit 15 - Rising edge enabled 15"] #[inline(always)] #[must_use] - pub fn ren15(&mut self) -> REN15_W { - REN15_W::new(self) + pub fn ren15(&mut self) -> REN15_W { + REN15_W::new(self, 15) } #[doc = "Bit 16 - Rising edge enabled 16"] #[inline(always)] #[must_use] - pub fn ren16(&mut self) -> REN16_W { - REN16_W::new(self) + pub fn ren16(&mut self) -> REN16_W { + REN16_W::new(self, 16) } #[doc = "Bit 17 - Rising edge enabled 17"] #[inline(always)] #[must_use] - pub fn ren17(&mut self) -> REN17_W { - REN17_W::new(self) + pub fn ren17(&mut self) -> REN17_W { + REN17_W::new(self, 17) } #[doc = "Bit 18 - Rising edge enabled 18"] #[inline(always)] #[must_use] - pub fn ren18(&mut self) -> REN18_W { - REN18_W::new(self) + pub fn ren18(&mut self) -> REN18_W { + REN18_W::new(self, 18) } #[doc = "Bit 19 - Rising edge enabled 19"] #[inline(always)] #[must_use] - pub fn ren19(&mut self) -> REN19_W { - REN19_W::new(self) + pub fn ren19(&mut self) -> REN19_W { + REN19_W::new(self, 19) } #[doc = "Bit 20 - Rising edge enabled 20"] #[inline(always)] #[must_use] - pub fn ren20(&mut self) -> REN20_W { - REN20_W::new(self) + pub fn ren20(&mut self) -> REN20_W { + REN20_W::new(self, 20) } #[doc = "Bit 21 - Rising edge enabled 21"] #[inline(always)] #[must_use] - pub fn ren21(&mut self) -> REN21_W { - REN21_W::new(self) + pub fn ren21(&mut self) -> REN21_W { + REN21_W::new(self, 21) } #[doc = "Bit 22 - Rising edge enabled 22"] #[inline(always)] #[must_use] - pub fn ren22(&mut self) -> REN22_W { - REN22_W::new(self) + pub fn ren22(&mut self) -> REN22_W { + REN22_W::new(self, 22) } #[doc = "Bit 23 - Rising edge enabled 23"] #[inline(always)] #[must_use] - pub fn ren23(&mut self) -> REN23_W { - REN23_W::new(self) + pub fn ren23(&mut self) -> REN23_W { + REN23_W::new(self, 23) } #[doc = "Bit 24 - Rising edge enabled 24"] #[inline(always)] #[must_use] - pub fn ren24(&mut self) -> REN24_W { - REN24_W::new(self) + pub fn ren24(&mut self) -> REN24_W { + REN24_W::new(self, 24) } #[doc = "Bit 25 - Rising edge enabled 25"] #[inline(always)] #[must_use] - pub fn ren25(&mut self) -> REN25_W { - REN25_W::new(self) + pub fn ren25(&mut self) -> REN25_W { + REN25_W::new(self, 25) } #[doc = "Bit 26 - Rising edge enabled 26"] #[inline(always)] #[must_use] - pub fn ren26(&mut self) -> REN26_W { - REN26_W::new(self) + pub fn ren26(&mut self) -> REN26_W { + REN26_W::new(self, 26) } #[doc = "Bit 27 - Rising edge enabled 27"] #[inline(always)] #[must_use] - pub fn ren27(&mut self) -> REN27_W { - REN27_W::new(self) + pub fn ren27(&mut self) -> REN27_W { + REN27_W::new(self, 27) } #[doc = "Bit 28 - Rising edge enabled 28"] #[inline(always)] #[must_use] - pub fn ren28(&mut self) -> REN28_W { - REN28_W::new(self) + pub fn ren28(&mut self) -> REN28_W { + REN28_W::new(self, 28) } #[doc = "Bit 29 - Rising edge enabled 29"] #[inline(always)] #[must_use] - pub fn ren29(&mut self) -> REN29_W { - REN29_W::new(self) + pub fn ren29(&mut self) -> REN29_W { + REN29_W::new(self, 29) } #[doc = "Bit 30 - Rising edge enabled 30"] #[inline(always)] #[must_use] - pub fn ren30(&mut self) -> REN30_W { - REN30_W::new(self) + pub fn ren30(&mut self) -> REN30_W { + REN30_W::new(self, 30) } #[doc = "Bit 31 - Rising edge enabled 31"] #[inline(always)] #[must_use] - pub fn ren31(&mut self) -> REN31_W { - REN31_W::new(self) + pub fn ren31(&mut self) -> REN31_W { + REN31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpren1.rs b/crates/bcm2837-lpa/src/gpio/gpren1.rs index 9f78a23..05e9477 100644 --- a/crates/bcm2837-lpa/src/gpio/gpren1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpren1.rs @@ -5,91 +5,91 @@ pub type W = crate::W; #[doc = "Field `REN32` reader - Rising edge enabled 32"] pub type REN32_R = crate::BitReader; #[doc = "Field `REN32` writer - Rising edge enabled 32"] -pub type REN32_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN32_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN33` reader - Rising edge enabled 33"] pub type REN33_R = crate::BitReader; #[doc = "Field `REN33` writer - Rising edge enabled 33"] -pub type REN33_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN33_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN34` reader - Rising edge enabled 34"] pub type REN34_R = crate::BitReader; #[doc = "Field `REN34` writer - Rising edge enabled 34"] -pub type REN34_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN34_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN35` reader - Rising edge enabled 35"] pub type REN35_R = crate::BitReader; #[doc = "Field `REN35` writer - Rising edge enabled 35"] -pub type REN35_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN35_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN36` reader - Rising edge enabled 36"] pub type REN36_R = crate::BitReader; #[doc = "Field `REN36` writer - Rising edge enabled 36"] -pub type REN36_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN36_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN37` reader - Rising edge enabled 37"] pub type REN37_R = crate::BitReader; #[doc = "Field `REN37` writer - Rising edge enabled 37"] -pub type REN37_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN37_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN38` reader - Rising edge enabled 38"] pub type REN38_R = crate::BitReader; #[doc = "Field `REN38` writer - Rising edge enabled 38"] -pub type REN38_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN38_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN39` reader - Rising edge enabled 39"] pub type REN39_R = crate::BitReader; #[doc = "Field `REN39` writer - Rising edge enabled 39"] -pub type REN39_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN39_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN40` reader - Rising edge enabled 40"] pub type REN40_R = crate::BitReader; #[doc = "Field `REN40` writer - Rising edge enabled 40"] -pub type REN40_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN40_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN41` reader - Rising edge enabled 41"] pub type REN41_R = crate::BitReader; #[doc = "Field `REN41` writer - Rising edge enabled 41"] -pub type REN41_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN41_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN42` reader - Rising edge enabled 42"] pub type REN42_R = crate::BitReader; #[doc = "Field `REN42` writer - Rising edge enabled 42"] -pub type REN42_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN42_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN43` reader - Rising edge enabled 43"] pub type REN43_R = crate::BitReader; #[doc = "Field `REN43` writer - Rising edge enabled 43"] -pub type REN43_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN43_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN44` reader - Rising edge enabled 44"] pub type REN44_R = crate::BitReader; #[doc = "Field `REN44` writer - Rising edge enabled 44"] -pub type REN44_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN44_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN45` reader - Rising edge enabled 45"] pub type REN45_R = crate::BitReader; #[doc = "Field `REN45` writer - Rising edge enabled 45"] -pub type REN45_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN45_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN46` reader - Rising edge enabled 46"] pub type REN46_R = crate::BitReader; #[doc = "Field `REN46` writer - Rising edge enabled 46"] -pub type REN46_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN46_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN47` reader - Rising edge enabled 47"] pub type REN47_R = crate::BitReader; #[doc = "Field `REN47` writer - Rising edge enabled 47"] -pub type REN47_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN47_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN48` reader - Rising edge enabled 48"] pub type REN48_R = crate::BitReader; #[doc = "Field `REN48` writer - Rising edge enabled 48"] -pub type REN48_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN48_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN49` reader - Rising edge enabled 49"] pub type REN49_R = crate::BitReader; #[doc = "Field `REN49` writer - Rising edge enabled 49"] -pub type REN49_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN49_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN50` reader - Rising edge enabled 50"] pub type REN50_R = crate::BitReader; #[doc = "Field `REN50` writer - Rising edge enabled 50"] -pub type REN50_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN50_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN51` reader - Rising edge enabled 51"] pub type REN51_R = crate::BitReader; #[doc = "Field `REN51` writer - Rising edge enabled 51"] -pub type REN51_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN51_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN52` reader - Rising edge enabled 52"] pub type REN52_R = crate::BitReader; #[doc = "Field `REN52` writer - Rising edge enabled 52"] -pub type REN52_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN52_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN53` reader - Rising edge enabled 53"] pub type REN53_R = crate::BitReader; #[doc = "Field `REN53` writer - Rising edge enabled 53"] -pub type REN53_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN53_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge enabled 32"] #[inline(always)] @@ -232,141 +232,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Rising edge enabled 32"] #[inline(always)] #[must_use] - pub fn ren32(&mut self) -> REN32_W { - REN32_W::new(self) + pub fn ren32(&mut self) -> REN32_W { + REN32_W::new(self, 0) } #[doc = "Bit 1 - Rising edge enabled 33"] #[inline(always)] #[must_use] - pub fn ren33(&mut self) -> REN33_W { - REN33_W::new(self) + pub fn ren33(&mut self) -> REN33_W { + REN33_W::new(self, 1) } #[doc = "Bit 2 - Rising edge enabled 34"] #[inline(always)] #[must_use] - pub fn ren34(&mut self) -> REN34_W { - REN34_W::new(self) + pub fn ren34(&mut self) -> REN34_W { + REN34_W::new(self, 2) } #[doc = "Bit 3 - Rising edge enabled 35"] #[inline(always)] #[must_use] - pub fn ren35(&mut self) -> REN35_W { - REN35_W::new(self) + pub fn ren35(&mut self) -> REN35_W { + REN35_W::new(self, 3) } #[doc = "Bit 4 - Rising edge enabled 36"] #[inline(always)] #[must_use] - pub fn ren36(&mut self) -> REN36_W { - REN36_W::new(self) + pub fn ren36(&mut self) -> REN36_W { + REN36_W::new(self, 4) } #[doc = "Bit 5 - Rising edge enabled 37"] #[inline(always)] #[must_use] - pub fn ren37(&mut self) -> REN37_W { - REN37_W::new(self) + pub fn ren37(&mut self) -> REN37_W { + REN37_W::new(self, 5) } #[doc = "Bit 6 - Rising edge enabled 38"] #[inline(always)] #[must_use] - pub fn ren38(&mut self) -> REN38_W { - REN38_W::new(self) + pub fn ren38(&mut self) -> REN38_W { + REN38_W::new(self, 6) } #[doc = "Bit 7 - Rising edge enabled 39"] #[inline(always)] #[must_use] - pub fn ren39(&mut self) -> REN39_W { - REN39_W::new(self) + pub fn ren39(&mut self) -> REN39_W { + REN39_W::new(self, 7) } #[doc = "Bit 8 - Rising edge enabled 40"] #[inline(always)] #[must_use] - pub fn ren40(&mut self) -> REN40_W { - REN40_W::new(self) + pub fn ren40(&mut self) -> REN40_W { + REN40_W::new(self, 8) } #[doc = "Bit 9 - Rising edge enabled 41"] #[inline(always)] #[must_use] - pub fn ren41(&mut self) -> REN41_W { - REN41_W::new(self) + pub fn ren41(&mut self) -> REN41_W { + REN41_W::new(self, 9) } #[doc = "Bit 10 - Rising edge enabled 42"] #[inline(always)] #[must_use] - pub fn ren42(&mut self) -> REN42_W { - REN42_W::new(self) + pub fn ren42(&mut self) -> REN42_W { + REN42_W::new(self, 10) } #[doc = "Bit 11 - Rising edge enabled 43"] #[inline(always)] #[must_use] - pub fn ren43(&mut self) -> REN43_W { - REN43_W::new(self) + pub fn ren43(&mut self) -> REN43_W { + REN43_W::new(self, 11) } #[doc = "Bit 12 - Rising edge enabled 44"] #[inline(always)] #[must_use] - pub fn ren44(&mut self) -> REN44_W { - REN44_W::new(self) + pub fn ren44(&mut self) -> REN44_W { + REN44_W::new(self, 12) } #[doc = "Bit 13 - Rising edge enabled 45"] #[inline(always)] #[must_use] - pub fn ren45(&mut self) -> REN45_W { - REN45_W::new(self) + pub fn ren45(&mut self) -> REN45_W { + REN45_W::new(self, 13) } #[doc = "Bit 14 - Rising edge enabled 46"] #[inline(always)] #[must_use] - pub fn ren46(&mut self) -> REN46_W { - REN46_W::new(self) + pub fn ren46(&mut self) -> REN46_W { + REN46_W::new(self, 14) } #[doc = "Bit 15 - Rising edge enabled 47"] #[inline(always)] #[must_use] - pub fn ren47(&mut self) -> REN47_W { - REN47_W::new(self) + pub fn ren47(&mut self) -> REN47_W { + REN47_W::new(self, 15) } #[doc = "Bit 16 - Rising edge enabled 48"] #[inline(always)] #[must_use] - pub fn ren48(&mut self) -> REN48_W { - REN48_W::new(self) + pub fn ren48(&mut self) -> REN48_W { + REN48_W::new(self, 16) } #[doc = "Bit 17 - Rising edge enabled 49"] #[inline(always)] #[must_use] - pub fn ren49(&mut self) -> REN49_W { - REN49_W::new(self) + pub fn ren49(&mut self) -> REN49_W { + REN49_W::new(self, 17) } #[doc = "Bit 18 - Rising edge enabled 50"] #[inline(always)] #[must_use] - pub fn ren50(&mut self) -> REN50_W { - REN50_W::new(self) + pub fn ren50(&mut self) -> REN50_W { + REN50_W::new(self, 18) } #[doc = "Bit 19 - Rising edge enabled 51"] #[inline(always)] #[must_use] - pub fn ren51(&mut self) -> REN51_W { - REN51_W::new(self) + pub fn ren51(&mut self) -> REN51_W { + REN51_W::new(self, 19) } #[doc = "Bit 20 - Rising edge enabled 52"] #[inline(always)] #[must_use] - pub fn ren52(&mut self) -> REN52_W { - REN52_W::new(self) + pub fn ren52(&mut self) -> REN52_W { + REN52_W::new(self, 20) } #[doc = "Bit 21 - Rising edge enabled 53"] #[inline(always)] #[must_use] - pub fn ren53(&mut self) -> REN53_W { - REN53_W::new(self) + pub fn ren53(&mut self) -> REN53_W { + REN53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpset0.rs b/crates/bcm2837-lpa/src/gpio/gpset0.rs index 513781b..66cbab6 100644 --- a/crates/bcm2837-lpa/src/gpio/gpset0.rs +++ b/crates/bcm2837-lpa/src/gpio/gpset0.rs @@ -1,69 +1,69 @@ #[doc = "Register `GPSET0` writer"] pub type W = crate::W; #[doc = "Field `SET0` writer - Set 0"] -pub type SET0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET1` writer - Set 1"] -pub type SET1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET2` writer - Set 2"] -pub type SET2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET3` writer - Set 3"] -pub type SET3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET4` writer - Set 4"] -pub type SET4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET5` writer - Set 5"] -pub type SET5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET6` writer - Set 6"] -pub type SET6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET7` writer - Set 7"] -pub type SET7_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET7_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET8` writer - Set 8"] -pub type SET8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET9` writer - Set 9"] -pub type SET9_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET9_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET10` writer - Set 10"] -pub type SET10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET11` writer - Set 11"] -pub type SET11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET12` writer - Set 12"] -pub type SET12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET13` writer - Set 13"] -pub type SET13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET14` writer - Set 14"] -pub type SET14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET15` writer - Set 15"] -pub type SET15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET15_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET16` writer - Set 16"] -pub type SET16_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET16_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET17` writer - Set 17"] -pub type SET17_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET17_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET18` writer - Set 18"] -pub type SET18_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET18_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET19` writer - Set 19"] -pub type SET19_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET19_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET20` writer - Set 20"] -pub type SET20_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET20_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET21` writer - Set 21"] -pub type SET21_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET21_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET22` writer - Set 22"] -pub type SET22_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET22_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET23` writer - Set 23"] -pub type SET23_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET23_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET24` writer - Set 24"] -pub type SET24_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET24_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET25` writer - Set 25"] -pub type SET25_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET25_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET26` writer - Set 26"] -pub type SET26_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET26_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET27` writer - Set 27"] -pub type SET27_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET27_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET28` writer - Set 28"] -pub type SET28_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET28_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET29` writer - Set 29"] -pub type SET29_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET29_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET30` writer - Set 30"] -pub type SET30_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET30_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET31` writer - Set 31"] -pub type SET31_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET31_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -73,194 +73,194 @@ impl W { #[doc = "Bit 0 - Set 0"] #[inline(always)] #[must_use] - pub fn set0(&mut self) -> SET0_W { - SET0_W::new(self) + pub fn set0(&mut self) -> SET0_W { + SET0_W::new(self, 0) } #[doc = "Bit 1 - Set 1"] #[inline(always)] #[must_use] - pub fn set1(&mut self) -> SET1_W { - SET1_W::new(self) + pub fn set1(&mut self) -> SET1_W { + SET1_W::new(self, 1) } #[doc = "Bit 2 - Set 2"] #[inline(always)] #[must_use] - pub fn set2(&mut self) -> SET2_W { - SET2_W::new(self) + pub fn set2(&mut self) -> SET2_W { + SET2_W::new(self, 2) } #[doc = "Bit 3 - Set 3"] #[inline(always)] #[must_use] - pub fn set3(&mut self) -> SET3_W { - SET3_W::new(self) + pub fn set3(&mut self) -> SET3_W { + SET3_W::new(self, 3) } #[doc = "Bit 4 - Set 4"] #[inline(always)] #[must_use] - pub fn set4(&mut self) -> SET4_W { - SET4_W::new(self) + pub fn set4(&mut self) -> SET4_W { + SET4_W::new(self, 4) } #[doc = "Bit 5 - Set 5"] #[inline(always)] #[must_use] - pub fn set5(&mut self) -> SET5_W { - SET5_W::new(self) + pub fn set5(&mut self) -> SET5_W { + SET5_W::new(self, 5) } #[doc = "Bit 6 - Set 6"] #[inline(always)] #[must_use] - pub fn set6(&mut self) -> SET6_W { - SET6_W::new(self) + pub fn set6(&mut self) -> SET6_W { + SET6_W::new(self, 6) } #[doc = "Bit 7 - Set 7"] #[inline(always)] #[must_use] - pub fn set7(&mut self) -> SET7_W { - SET7_W::new(self) + pub fn set7(&mut self) -> SET7_W { + SET7_W::new(self, 7) } #[doc = "Bit 8 - Set 8"] #[inline(always)] #[must_use] - pub fn set8(&mut self) -> SET8_W { - SET8_W::new(self) + pub fn set8(&mut self) -> SET8_W { + SET8_W::new(self, 8) } #[doc = "Bit 9 - Set 9"] #[inline(always)] #[must_use] - pub fn set9(&mut self) -> SET9_W { - SET9_W::new(self) + pub fn set9(&mut self) -> SET9_W { + SET9_W::new(self, 9) } #[doc = "Bit 10 - Set 10"] #[inline(always)] #[must_use] - pub fn set10(&mut self) -> SET10_W { - SET10_W::new(self) + pub fn set10(&mut self) -> SET10_W { + SET10_W::new(self, 10) } #[doc = "Bit 11 - Set 11"] #[inline(always)] #[must_use] - pub fn set11(&mut self) -> SET11_W { - SET11_W::new(self) + pub fn set11(&mut self) -> SET11_W { + SET11_W::new(self, 11) } #[doc = "Bit 12 - Set 12"] #[inline(always)] #[must_use] - pub fn set12(&mut self) -> SET12_W { - SET12_W::new(self) + pub fn set12(&mut self) -> SET12_W { + SET12_W::new(self, 12) } #[doc = "Bit 13 - Set 13"] #[inline(always)] #[must_use] - pub fn set13(&mut self) -> SET13_W { - SET13_W::new(self) + pub fn set13(&mut self) -> SET13_W { + SET13_W::new(self, 13) } #[doc = "Bit 14 - Set 14"] #[inline(always)] #[must_use] - pub fn set14(&mut self) -> SET14_W { - SET14_W::new(self) + pub fn set14(&mut self) -> SET14_W { + SET14_W::new(self, 14) } #[doc = "Bit 15 - Set 15"] #[inline(always)] #[must_use] - pub fn set15(&mut self) -> SET15_W { - SET15_W::new(self) + pub fn set15(&mut self) -> SET15_W { + SET15_W::new(self, 15) } #[doc = "Bit 16 - Set 16"] #[inline(always)] #[must_use] - pub fn set16(&mut self) -> SET16_W { - SET16_W::new(self) + pub fn set16(&mut self) -> SET16_W { + SET16_W::new(self, 16) } #[doc = "Bit 17 - Set 17"] #[inline(always)] #[must_use] - pub fn set17(&mut self) -> SET17_W { - SET17_W::new(self) + pub fn set17(&mut self) -> SET17_W { + SET17_W::new(self, 17) } #[doc = "Bit 18 - Set 18"] #[inline(always)] #[must_use] - pub fn set18(&mut self) -> SET18_W { - SET18_W::new(self) + pub fn set18(&mut self) -> SET18_W { + SET18_W::new(self, 18) } #[doc = "Bit 19 - Set 19"] #[inline(always)] #[must_use] - pub fn set19(&mut self) -> SET19_W { - SET19_W::new(self) + pub fn set19(&mut self) -> SET19_W { + SET19_W::new(self, 19) } #[doc = "Bit 20 - Set 20"] #[inline(always)] #[must_use] - pub fn set20(&mut self) -> SET20_W { - SET20_W::new(self) + pub fn set20(&mut self) -> SET20_W { + SET20_W::new(self, 20) } #[doc = "Bit 21 - Set 21"] #[inline(always)] #[must_use] - pub fn set21(&mut self) -> SET21_W { - SET21_W::new(self) + pub fn set21(&mut self) -> SET21_W { + SET21_W::new(self, 21) } #[doc = "Bit 22 - Set 22"] #[inline(always)] #[must_use] - pub fn set22(&mut self) -> SET22_W { - SET22_W::new(self) + pub fn set22(&mut self) -> SET22_W { + SET22_W::new(self, 22) } #[doc = "Bit 23 - Set 23"] #[inline(always)] #[must_use] - pub fn set23(&mut self) -> SET23_W { - SET23_W::new(self) + pub fn set23(&mut self) -> SET23_W { + SET23_W::new(self, 23) } #[doc = "Bit 24 - Set 24"] #[inline(always)] #[must_use] - pub fn set24(&mut self) -> SET24_W { - SET24_W::new(self) + pub fn set24(&mut self) -> SET24_W { + SET24_W::new(self, 24) } #[doc = "Bit 25 - Set 25"] #[inline(always)] #[must_use] - pub fn set25(&mut self) -> SET25_W { - SET25_W::new(self) + pub fn set25(&mut self) -> SET25_W { + SET25_W::new(self, 25) } #[doc = "Bit 26 - Set 26"] #[inline(always)] #[must_use] - pub fn set26(&mut self) -> SET26_W { - SET26_W::new(self) + pub fn set26(&mut self) -> SET26_W { + SET26_W::new(self, 26) } #[doc = "Bit 27 - Set 27"] #[inline(always)] #[must_use] - pub fn set27(&mut self) -> SET27_W { - SET27_W::new(self) + pub fn set27(&mut self) -> SET27_W { + SET27_W::new(self, 27) } #[doc = "Bit 28 - Set 28"] #[inline(always)] #[must_use] - pub fn set28(&mut self) -> SET28_W { - SET28_W::new(self) + pub fn set28(&mut self) -> SET28_W { + SET28_W::new(self, 28) } #[doc = "Bit 29 - Set 29"] #[inline(always)] #[must_use] - pub fn set29(&mut self) -> SET29_W { - SET29_W::new(self) + pub fn set29(&mut self) -> SET29_W { + SET29_W::new(self, 29) } #[doc = "Bit 30 - Set 30"] #[inline(always)] #[must_use] - pub fn set30(&mut self) -> SET30_W { - SET30_W::new(self) + pub fn set30(&mut self) -> SET30_W { + SET30_W::new(self, 30) } #[doc = "Bit 31 - Set 31"] #[inline(always)] #[must_use] - pub fn set31(&mut self) -> SET31_W { - SET31_W::new(self) + pub fn set31(&mut self) -> SET31_W { + SET31_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/gpio/gpset1.rs b/crates/bcm2837-lpa/src/gpio/gpset1.rs index b6b4b3f..fc6bbc0 100644 --- a/crates/bcm2837-lpa/src/gpio/gpset1.rs +++ b/crates/bcm2837-lpa/src/gpio/gpset1.rs @@ -1,49 +1,49 @@ #[doc = "Register `GPSET1` writer"] pub type W = crate::W; #[doc = "Field `SET32` writer - Set 32"] -pub type SET32_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET32_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET33` writer - Set 33"] -pub type SET33_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET33_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET34` writer - Set 34"] -pub type SET34_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET34_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET35` writer - Set 35"] -pub type SET35_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET35_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET36` writer - Set 36"] -pub type SET36_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET36_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET37` writer - Set 37"] -pub type SET37_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET37_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET38` writer - Set 38"] -pub type SET38_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET38_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET39` writer - Set 39"] -pub type SET39_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET39_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET40` writer - Set 40"] -pub type SET40_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET40_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET41` writer - Set 41"] -pub type SET41_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET41_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET42` writer - Set 42"] -pub type SET42_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET42_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET43` writer - Set 43"] -pub type SET43_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET43_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET44` writer - Set 44"] -pub type SET44_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET44_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET45` writer - Set 45"] -pub type SET45_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET45_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET46` writer - Set 46"] -pub type SET46_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET46_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET47` writer - Set 47"] -pub type SET47_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET47_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET48` writer - Set 48"] -pub type SET48_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET48_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET49` writer - Set 49"] -pub type SET49_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET49_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET50` writer - Set 50"] -pub type SET50_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET50_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET51` writer - Set 51"] -pub type SET51_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET51_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET52` writer - Set 52"] -pub type SET52_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET52_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SET53` writer - Set 53"] -pub type SET53_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SET53_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -53,134 +53,134 @@ impl W { #[doc = "Bit 0 - Set 32"] #[inline(always)] #[must_use] - pub fn set32(&mut self) -> SET32_W { - SET32_W::new(self) + pub fn set32(&mut self) -> SET32_W { + SET32_W::new(self, 0) } #[doc = "Bit 1 - Set 33"] #[inline(always)] #[must_use] - pub fn set33(&mut self) -> SET33_W { - SET33_W::new(self) + pub fn set33(&mut self) -> SET33_W { + SET33_W::new(self, 1) } #[doc = "Bit 2 - Set 34"] #[inline(always)] #[must_use] - pub fn set34(&mut self) -> SET34_W { - SET34_W::new(self) + pub fn set34(&mut self) -> SET34_W { + SET34_W::new(self, 2) } #[doc = "Bit 3 - Set 35"] #[inline(always)] #[must_use] - pub fn set35(&mut self) -> SET35_W { - SET35_W::new(self) + pub fn set35(&mut self) -> SET35_W { + SET35_W::new(self, 3) } #[doc = "Bit 4 - Set 36"] #[inline(always)] #[must_use] - pub fn set36(&mut self) -> SET36_W { - SET36_W::new(self) + pub fn set36(&mut self) -> SET36_W { + SET36_W::new(self, 4) } #[doc = "Bit 5 - Set 37"] #[inline(always)] #[must_use] - pub fn set37(&mut self) -> SET37_W { - SET37_W::new(self) + pub fn set37(&mut self) -> SET37_W { + SET37_W::new(self, 5) } #[doc = "Bit 6 - Set 38"] #[inline(always)] #[must_use] - pub fn set38(&mut self) -> SET38_W { - SET38_W::new(self) + pub fn set38(&mut self) -> SET38_W { + SET38_W::new(self, 6) } #[doc = "Bit 7 - Set 39"] #[inline(always)] #[must_use] - pub fn set39(&mut self) -> SET39_W { - SET39_W::new(self) + pub fn set39(&mut self) -> SET39_W { + SET39_W::new(self, 7) } #[doc = "Bit 8 - Set 40"] #[inline(always)] #[must_use] - pub fn set40(&mut self) -> SET40_W { - SET40_W::new(self) + pub fn set40(&mut self) -> SET40_W { + SET40_W::new(self, 8) } #[doc = "Bit 9 - Set 41"] #[inline(always)] #[must_use] - pub fn set41(&mut self) -> SET41_W { - SET41_W::new(self) + pub fn set41(&mut self) -> SET41_W { + SET41_W::new(self, 9) } #[doc = "Bit 10 - Set 42"] #[inline(always)] #[must_use] - pub fn set42(&mut self) -> SET42_W { - SET42_W::new(self) + pub fn set42(&mut self) -> SET42_W { + SET42_W::new(self, 10) } #[doc = "Bit 11 - Set 43"] #[inline(always)] #[must_use] - pub fn set43(&mut self) -> SET43_W { - SET43_W::new(self) + pub fn set43(&mut self) -> SET43_W { + SET43_W::new(self, 11) } #[doc = "Bit 12 - Set 44"] #[inline(always)] #[must_use] - pub fn set44(&mut self) -> SET44_W { - SET44_W::new(self) + pub fn set44(&mut self) -> SET44_W { + SET44_W::new(self, 12) } #[doc = "Bit 13 - Set 45"] #[inline(always)] #[must_use] - pub fn set45(&mut self) -> SET45_W { - SET45_W::new(self) + pub fn set45(&mut self) -> SET45_W { + SET45_W::new(self, 13) } #[doc = "Bit 14 - Set 46"] #[inline(always)] #[must_use] - pub fn set46(&mut self) -> SET46_W { - SET46_W::new(self) + pub fn set46(&mut self) -> SET46_W { + SET46_W::new(self, 14) } #[doc = "Bit 15 - Set 47"] #[inline(always)] #[must_use] - pub fn set47(&mut self) -> SET47_W { - SET47_W::new(self) + pub fn set47(&mut self) -> SET47_W { + SET47_W::new(self, 15) } #[doc = "Bit 16 - Set 48"] #[inline(always)] #[must_use] - pub fn set48(&mut self) -> SET48_W { - SET48_W::new(self) + pub fn set48(&mut self) -> SET48_W { + SET48_W::new(self, 16) } #[doc = "Bit 17 - Set 49"] #[inline(always)] #[must_use] - pub fn set49(&mut self) -> SET49_W { - SET49_W::new(self) + pub fn set49(&mut self) -> SET49_W { + SET49_W::new(self, 17) } #[doc = "Bit 18 - Set 50"] #[inline(always)] #[must_use] - pub fn set50(&mut self) -> SET50_W { - SET50_W::new(self) + pub fn set50(&mut self) -> SET50_W { + SET50_W::new(self, 18) } #[doc = "Bit 19 - Set 51"] #[inline(always)] #[must_use] - pub fn set51(&mut self) -> SET51_W { - SET51_W::new(self) + pub fn set51(&mut self) -> SET51_W { + SET51_W::new(self, 19) } #[doc = "Bit 20 - Set 52"] #[inline(always)] #[must_use] - pub fn set52(&mut self) -> SET52_W { - SET52_W::new(self) + pub fn set52(&mut self) -> SET52_W { + SET52_W::new(self, 20) } #[doc = "Bit 21 - Set 53"] #[inline(always)] #[must_use] - pub fn set53(&mut self) -> SET53_W { - SET53_W::new(self) + pub fn set53(&mut self) -> SET53_W { + SET53_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lib.rs b/crates/bcm2837-lpa/src/lib.rs index 39ade9e..34ca54e 100644 --- a/crates/bcm2837-lpa/src/lib.rs +++ b/crates/bcm2837-lpa/src/lib.rs @@ -1,18 +1,5 @@ -#![doc = "Peripheral access API for BCM2837_LPA microcontrollers (generated using svd2rust v0.30.3 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.30.3/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] -#![deny(dead_code)] -#![deny(improper_ctypes)] -#![deny(missing_docs)] -#![deny(no_mangle_generic_items)] -#![deny(non_shorthand_field_patterns)] -#![deny(overflowing_literals)] -#![deny(path_statements)] -#![deny(patterns_in_fns_without_body)] -#![deny(unconditional_recursion)] -#![deny(unused_allocation)] -#![deny(unused_comparisons)] -#![deny(unused_parens)] -#![deny(while_true)] +#![doc = "Peripheral access API for BCM2837_LPA microcontrollers (generated using svd2rust v0.31.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.31.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] diff --git a/crates/bcm2837-lpa/src/lic.rs b/crates/bcm2837-lpa/src/lic.rs index 36d6423..bbb8a85 100644 --- a/crates/bcm2837-lpa/src/lic.rs +++ b/crates/bcm2837-lpa/src/lic.rs @@ -3,26 +3,68 @@ #[derive(Debug)] pub struct RegisterBlock { _reserved0: [u8; 0x0200], + basic_pending: BASIC_PENDING, + pending_1: PENDING_1, + pending_2: PENDING_2, + fiq_control: FIQ_CONTROL, + enable_1: ENABLE_1, + enable_2: ENABLE_2, + enable_basic: ENABLE_BASIC, + disable_1: DISABLE_1, + disable_2: DISABLE_2, + disable_basic: DISABLE_BASIC, +} +impl RegisterBlock { #[doc = "0x200 - Basic pending info"] - pub basic_pending: BASIC_PENDING, + #[inline(always)] + pub const fn basic_pending(&self) -> &BASIC_PENDING { + &self.basic_pending + } #[doc = "0x204 - Pending state for interrupts 1 - 31"] - pub pending_1: PENDING_1, + #[inline(always)] + pub const fn pending_1(&self) -> &PENDING_1 { + &self.pending_1 + } #[doc = "0x208 - Pending state for interrupts 32 - 63"] - pub pending_2: PENDING_2, + #[inline(always)] + pub const fn pending_2(&self) -> &PENDING_2 { + &self.pending_2 + } #[doc = "0x20c - FIQ control"] - pub fiq_control: FIQ_CONTROL, + #[inline(always)] + pub const fn fiq_control(&self) -> &FIQ_CONTROL { + &self.fiq_control + } #[doc = "0x210 - Enable interrupts 1 - 31"] - pub enable_1: ENABLE_1, + #[inline(always)] + pub const fn enable_1(&self) -> &ENABLE_1 { + &self.enable_1 + } #[doc = "0x214 - Enable interrupts 32 - 63"] - pub enable_2: ENABLE_2, + #[inline(always)] + pub const fn enable_2(&self) -> &ENABLE_2 { + &self.enable_2 + } #[doc = "0x218 - Enable basic interrupts"] - pub enable_basic: ENABLE_BASIC, + #[inline(always)] + pub const fn enable_basic(&self) -> &ENABLE_BASIC { + &self.enable_basic + } #[doc = "0x21c - Disable interrupts 1 - 31"] - pub disable_1: DISABLE_1, + #[inline(always)] + pub const fn disable_1(&self) -> &DISABLE_1 { + &self.disable_1 + } #[doc = "0x220 - Disable interrupts 32 - 63"] - pub disable_2: DISABLE_2, + #[inline(always)] + pub const fn disable_2(&self) -> &DISABLE_2 { + &self.disable_2 + } #[doc = "0x224 - Disable basic interrupts"] - pub disable_basic: DISABLE_BASIC, + #[inline(always)] + pub const fn disable_basic(&self) -> &DISABLE_BASIC { + &self.disable_basic + } } #[doc = "BASIC_PENDING (r) register accessor: Basic pending info\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`basic_pending::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@basic_pending`] module"] diff --git a/crates/bcm2837-lpa/src/lic/basic_pending.rs b/crates/bcm2837-lpa/src/lic/basic_pending.rs index a88fcb1..e36bb67 100644 --- a/crates/bcm2837-lpa/src/lic/basic_pending.rs +++ b/crates/bcm2837-lpa/src/lic/basic_pending.rs @@ -184,7 +184,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Basic pending info\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`basic_pending::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/lic/disable_1.rs b/crates/bcm2837-lpa/src/lic/disable_1.rs index efd5fcf..d126710 100644 --- a/crates/bcm2837-lpa/src/lic/disable_1.rs +++ b/crates/bcm2837-lpa/src/lic/disable_1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/disable_2.rs b/crates/bcm2837-lpa/src/lic/disable_2.rs index 05263c3..6b92e00 100644 --- a/crates/bcm2837-lpa/src/lic/disable_2.rs +++ b/crates/bcm2837-lpa/src/lic/disable_2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/disable_basic.rs b/crates/bcm2837-lpa/src/lic/disable_basic.rs index da28ed6..dfa6828 100644 --- a/crates/bcm2837-lpa/src/lic/disable_basic.rs +++ b/crates/bcm2837-lpa/src/lic/disable_basic.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -98,57 +98,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/enable_1.rs b/crates/bcm2837-lpa/src/lic/enable_1.rs index d55fb6e..d3032f6 100644 --- a/crates/bcm2837-lpa/src/lic/enable_1.rs +++ b/crates/bcm2837-lpa/src/lic/enable_1.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `TIMER_0` reader - Timer 0"] pub type TIMER_0_R = crate::BitReader; #[doc = "Field `TIMER_0` writer - Timer 0"] -pub type TIMER_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_1` reader - Timer 1"] pub type TIMER_1_R = crate::BitReader; #[doc = "Field `TIMER_1` writer - Timer 1"] -pub type TIMER_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_2` reader - Timer 2"] pub type TIMER_2_R = crate::BitReader; #[doc = "Field `TIMER_2` writer - Timer 2"] -pub type TIMER_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TIMER_3` reader - Timer 3"] pub type TIMER_3_R = crate::BitReader; #[doc = "Field `TIMER_3` writer - Timer 3"] -pub type TIMER_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_0` reader - H264 0"] pub type H264_0_R = crate::BitReader; #[doc = "Field `H264_0` writer - H264 0"] -pub type H264_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_1` reader - H264 1"] pub type H264_1_R = crate::BitReader; #[doc = "Field `H264_1` writer - H264 1"] -pub type H264_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `H264_2` reader - H264 2"] pub type H264_2_R = crate::BitReader; #[doc = "Field `H264_2` writer - H264 2"] -pub type H264_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type H264_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `JPEG` reader - JPEG"] pub type JPEG_R = crate::BitReader; #[doc = "Field `JPEG` writer - JPEG"] -pub type JPEG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type JPEG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ISP` reader - ISP"] pub type ISP_R = crate::BitReader; #[doc = "Field `ISP` writer - ISP"] -pub type ISP_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ISP_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `USB` reader - USB"] pub type USB_R = crate::BitReader; #[doc = "Field `USB` writer - USB"] -pub type USB_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type USB_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `V3D` reader - V3D"] pub type V3D_R = crate::BitReader; #[doc = "Field `V3D` writer - V3D"] -pub type V3D_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type V3D_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `TRANSPOSER` reader - Transposer"] pub type TRANSPOSER_R = crate::BitReader; #[doc = "Field `TRANSPOSER` writer - Transposer"] -pub type TRANSPOSER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TRANSPOSER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_0` reader - Multicore Sync 0"] pub type MULTICORE_SYNC_0_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_0` writer - Multicore Sync 0"] -pub type MULTICORE_SYNC_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_1` reader - Multicore Sync 1"] pub type MULTICORE_SYNC_1_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_1` writer - Multicore Sync 1"] -pub type MULTICORE_SYNC_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_2` reader - Multicore Sync 2"] pub type MULTICORE_SYNC_2_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_2` writer - Multicore Sync 2"] -pub type MULTICORE_SYNC_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MULTICORE_SYNC_3` reader - Multicore Sync 3"] pub type MULTICORE_SYNC_3_R = crate::BitReader; #[doc = "Field `MULTICORE_SYNC_3` writer - Multicore Sync 3"] -pub type MULTICORE_SYNC_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MULTICORE_SYNC_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_0` reader - DMA 0"] pub type DMA_0_R = crate::BitReader; #[doc = "Field `DMA_0` writer - DMA 0"] -pub type DMA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_1` reader - DMA 1"] pub type DMA_1_R = crate::BitReader; #[doc = "Field `DMA_1` writer - DMA 1"] -pub type DMA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_2` reader - DMA 2"] pub type DMA_2_R = crate::BitReader; #[doc = "Field `DMA_2` writer - DMA 2"] -pub type DMA_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_3` reader - DMA 3"] pub type DMA_3_R = crate::BitReader; #[doc = "Field `DMA_3` writer - DMA 3"] -pub type DMA_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_4` reader - DMA 4"] pub type DMA_4_R = crate::BitReader; #[doc = "Field `DMA_4` writer - DMA 4"] -pub type DMA_4_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_4_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_5` reader - DMA 5"] pub type DMA_5_R = crate::BitReader; #[doc = "Field `DMA_5` writer - DMA 5"] -pub type DMA_5_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_5_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_6` reader - DMA 6"] pub type DMA_6_R = crate::BitReader; #[doc = "Field `DMA_6` writer - DMA 6"] -pub type DMA_6_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_6_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_7_8` reader - OR of DMA 7 and 8"] pub type DMA_7_8_R = crate::BitReader; #[doc = "Field `DMA_7_8` writer - OR of DMA 7 and 8"] -pub type DMA_7_8_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_7_8_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_9_10` reader - OR of DMA 9 and 10"] pub type DMA_9_10_R = crate::BitReader; #[doc = "Field `DMA_9_10` writer - OR of DMA 9 and 10"] -pub type DMA_9_10_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_9_10_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_11` reader - DMA 11"] pub type DMA_11_R = crate::BitReader; #[doc = "Field `DMA_11` writer - DMA 11"] -pub type DMA_11_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_11_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_12` reader - DMA 12"] pub type DMA_12_R = crate::BitReader; #[doc = "Field `DMA_12` writer - DMA 12"] -pub type DMA_12_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_12_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_13` reader - DMA 13"] pub type DMA_13_R = crate::BitReader; #[doc = "Field `DMA_13` writer - DMA 13"] -pub type DMA_13_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_13_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_14` reader - DMA 14"] pub type DMA_14_R = crate::BitReader; #[doc = "Field `DMA_14` writer - DMA 14"] -pub type DMA_14_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_14_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `AUX` reader - OR of UART1, SPI1 and SPI2"] pub type AUX_R = crate::BitReader; #[doc = "Field `AUX` writer - OR of UART1, SPI1 and SPI2"] -pub type AUX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type AUX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM` reader - ARM"] pub type ARM_R = crate::BitReader; #[doc = "Field `ARM` writer - ARM"] -pub type ARM_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DMA_15` reader - DMA 15"] pub type DMA_15_R = crate::BitReader; #[doc = "Field `DMA_15` writer - DMA 15"] -pub type DMA_15_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DMA_15_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - Timer 0"] #[inline(always)] @@ -344,201 +344,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Timer 0"] #[inline(always)] #[must_use] - pub fn timer_0(&mut self) -> TIMER_0_W { - TIMER_0_W::new(self) + pub fn timer_0(&mut self) -> TIMER_0_W { + TIMER_0_W::new(self, 0) } #[doc = "Bit 1 - Timer 1"] #[inline(always)] #[must_use] - pub fn timer_1(&mut self) -> TIMER_1_W { - TIMER_1_W::new(self) + pub fn timer_1(&mut self) -> TIMER_1_W { + TIMER_1_W::new(self, 1) } #[doc = "Bit 2 - Timer 2"] #[inline(always)] #[must_use] - pub fn timer_2(&mut self) -> TIMER_2_W { - TIMER_2_W::new(self) + pub fn timer_2(&mut self) -> TIMER_2_W { + TIMER_2_W::new(self, 2) } #[doc = "Bit 3 - Timer 3"] #[inline(always)] #[must_use] - pub fn timer_3(&mut self) -> TIMER_3_W { - TIMER_3_W::new(self) + pub fn timer_3(&mut self) -> TIMER_3_W { + TIMER_3_W::new(self, 3) } #[doc = "Bit 4 - H264 0"] #[inline(always)] #[must_use] - pub fn h264_0(&mut self) -> H264_0_W { - H264_0_W::new(self) + pub fn h264_0(&mut self) -> H264_0_W { + H264_0_W::new(self, 4) } #[doc = "Bit 5 - H264 1"] #[inline(always)] #[must_use] - pub fn h264_1(&mut self) -> H264_1_W { - H264_1_W::new(self) + pub fn h264_1(&mut self) -> H264_1_W { + H264_1_W::new(self, 5) } #[doc = "Bit 6 - H264 2"] #[inline(always)] #[must_use] - pub fn h264_2(&mut self) -> H264_2_W { - H264_2_W::new(self) + pub fn h264_2(&mut self) -> H264_2_W { + H264_2_W::new(self, 6) } #[doc = "Bit 7 - JPEG"] #[inline(always)] #[must_use] - pub fn jpeg(&mut self) -> JPEG_W { - JPEG_W::new(self) + pub fn jpeg(&mut self) -> JPEG_W { + JPEG_W::new(self, 7) } #[doc = "Bit 8 - ISP"] #[inline(always)] #[must_use] - pub fn isp(&mut self) -> ISP_W { - ISP_W::new(self) + pub fn isp(&mut self) -> ISP_W { + ISP_W::new(self, 8) } #[doc = "Bit 9 - USB"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 9) } #[doc = "Bit 10 - V3D"] #[inline(always)] #[must_use] - pub fn v3d(&mut self) -> V3D_W { - V3D_W::new(self) + pub fn v3d(&mut self) -> V3D_W { + V3D_W::new(self, 10) } #[doc = "Bit 11 - Transposer"] #[inline(always)] #[must_use] - pub fn transposer(&mut self) -> TRANSPOSER_W { - TRANSPOSER_W::new(self) + pub fn transposer(&mut self) -> TRANSPOSER_W { + TRANSPOSER_W::new(self, 11) } #[doc = "Bit 12 - Multicore Sync 0"] #[inline(always)] #[must_use] - pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { - MULTICORE_SYNC_0_W::new(self) + pub fn multicore_sync_0(&mut self) -> MULTICORE_SYNC_0_W { + MULTICORE_SYNC_0_W::new(self, 12) } #[doc = "Bit 13 - Multicore Sync 1"] #[inline(always)] #[must_use] - pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { - MULTICORE_SYNC_1_W::new(self) + pub fn multicore_sync_1(&mut self) -> MULTICORE_SYNC_1_W { + MULTICORE_SYNC_1_W::new(self, 13) } #[doc = "Bit 14 - Multicore Sync 2"] #[inline(always)] #[must_use] - pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { - MULTICORE_SYNC_2_W::new(self) + pub fn multicore_sync_2(&mut self) -> MULTICORE_SYNC_2_W { + MULTICORE_SYNC_2_W::new(self, 14) } #[doc = "Bit 15 - Multicore Sync 3"] #[inline(always)] #[must_use] - pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { - MULTICORE_SYNC_3_W::new(self) + pub fn multicore_sync_3(&mut self) -> MULTICORE_SYNC_3_W { + MULTICORE_SYNC_3_W::new(self, 15) } #[doc = "Bit 16 - DMA 0"] #[inline(always)] #[must_use] - pub fn dma_0(&mut self) -> DMA_0_W { - DMA_0_W::new(self) + pub fn dma_0(&mut self) -> DMA_0_W { + DMA_0_W::new(self, 16) } #[doc = "Bit 17 - DMA 1"] #[inline(always)] #[must_use] - pub fn dma_1(&mut self) -> DMA_1_W { - DMA_1_W::new(self) + pub fn dma_1(&mut self) -> DMA_1_W { + DMA_1_W::new(self, 17) } #[doc = "Bit 18 - DMA 2"] #[inline(always)] #[must_use] - pub fn dma_2(&mut self) -> DMA_2_W { - DMA_2_W::new(self) + pub fn dma_2(&mut self) -> DMA_2_W { + DMA_2_W::new(self, 18) } #[doc = "Bit 19 - DMA 3"] #[inline(always)] #[must_use] - pub fn dma_3(&mut self) -> DMA_3_W { - DMA_3_W::new(self) + pub fn dma_3(&mut self) -> DMA_3_W { + DMA_3_W::new(self, 19) } #[doc = "Bit 20 - DMA 4"] #[inline(always)] #[must_use] - pub fn dma_4(&mut self) -> DMA_4_W { - DMA_4_W::new(self) + pub fn dma_4(&mut self) -> DMA_4_W { + DMA_4_W::new(self, 20) } #[doc = "Bit 21 - DMA 5"] #[inline(always)] #[must_use] - pub fn dma_5(&mut self) -> DMA_5_W { - DMA_5_W::new(self) + pub fn dma_5(&mut self) -> DMA_5_W { + DMA_5_W::new(self, 21) } #[doc = "Bit 22 - DMA 6"] #[inline(always)] #[must_use] - pub fn dma_6(&mut self) -> DMA_6_W { - DMA_6_W::new(self) + pub fn dma_6(&mut self) -> DMA_6_W { + DMA_6_W::new(self, 22) } #[doc = "Bit 23 - OR of DMA 7 and 8"] #[inline(always)] #[must_use] - pub fn dma_7_8(&mut self) -> DMA_7_8_W { - DMA_7_8_W::new(self) + pub fn dma_7_8(&mut self) -> DMA_7_8_W { + DMA_7_8_W::new(self, 23) } #[doc = "Bit 24 - OR of DMA 9 and 10"] #[inline(always)] #[must_use] - pub fn dma_9_10(&mut self) -> DMA_9_10_W { - DMA_9_10_W::new(self) + pub fn dma_9_10(&mut self) -> DMA_9_10_W { + DMA_9_10_W::new(self, 24) } #[doc = "Bit 25 - DMA 11"] #[inline(always)] #[must_use] - pub fn dma_11(&mut self) -> DMA_11_W { - DMA_11_W::new(self) + pub fn dma_11(&mut self) -> DMA_11_W { + DMA_11_W::new(self, 25) } #[doc = "Bit 26 - DMA 12"] #[inline(always)] #[must_use] - pub fn dma_12(&mut self) -> DMA_12_W { - DMA_12_W::new(self) + pub fn dma_12(&mut self) -> DMA_12_W { + DMA_12_W::new(self, 26) } #[doc = "Bit 27 - DMA 13"] #[inline(always)] #[must_use] - pub fn dma_13(&mut self) -> DMA_13_W { - DMA_13_W::new(self) + pub fn dma_13(&mut self) -> DMA_13_W { + DMA_13_W::new(self, 27) } #[doc = "Bit 28 - DMA 14"] #[inline(always)] #[must_use] - pub fn dma_14(&mut self) -> DMA_14_W { - DMA_14_W::new(self) + pub fn dma_14(&mut self) -> DMA_14_W { + DMA_14_W::new(self, 28) } #[doc = "Bit 29 - OR of UART1, SPI1 and SPI2"] #[inline(always)] #[must_use] - pub fn aux(&mut self) -> AUX_W { - AUX_W::new(self) + pub fn aux(&mut self) -> AUX_W { + AUX_W::new(self, 29) } #[doc = "Bit 30 - ARM"] #[inline(always)] #[must_use] - pub fn arm(&mut self) -> ARM_W { - ARM_W::new(self) + pub fn arm(&mut self) -> ARM_W { + ARM_W::new(self, 30) } #[doc = "Bit 31 - DMA 15"] #[inline(always)] #[must_use] - pub fn dma_15(&mut self) -> DMA_15_W { - DMA_15_W::new(self) + pub fn dma_15(&mut self) -> DMA_15_W { + DMA_15_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/enable_2.rs b/crates/bcm2837-lpa/src/lic/enable_2.rs index 43769aa..76ba424 100644 --- a/crates/bcm2837-lpa/src/lic/enable_2.rs +++ b/crates/bcm2837-lpa/src/lic/enable_2.rs @@ -5,131 +5,131 @@ pub type W = crate::W; #[doc = "Field `HDMI_CEC` reader - HDMI CEC"] pub type HDMI_CEC_R = crate::BitReader; #[doc = "Field `HDMI_CEC` writer - HDMI CEC"] -pub type HDMI_CEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_CEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HVS` reader - HVS"] pub type HVS_R = crate::BitReader; #[doc = "Field `HVS` writer - HVS"] -pub type HVS_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HVS_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RPIVID` reader - RPIVID"] pub type RPIVID_R = crate::BitReader; #[doc = "Field `RPIVID` writer - RPIVID"] -pub type RPIVID_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RPIVID_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDC` reader - SDC"] pub type SDC_R = crate::BitReader; #[doc = "Field `SDC` writer - SDC"] -pub type SDC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_0` reader - DSI 0"] pub type DSI_0_R = crate::BitReader; #[doc = "Field `DSI_0` writer - DSI 0"] -pub type DSI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_2` reader - Pixel Valve 2"] pub type PIXEL_VALVE_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_2` writer - Pixel Valve 2"] -pub type PIXEL_VALVE_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_0` reader - Camera 0"] pub type CAMERA_0_R = crate::BitReader; #[doc = "Field `CAMERA_0` writer - Camera 0"] -pub type CAMERA_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CAMERA_1` reader - Camera 1"] pub type CAMERA_1_R = crate::BitReader; #[doc = "Field `CAMERA_1` writer - Camera 1"] -pub type CAMERA_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CAMERA_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_0` reader - HDMI 0"] pub type HDMI_0_R = crate::BitReader; #[doc = "Field `HDMI_0` writer - HDMI 0"] -pub type HDMI_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `HDMI_1` reader - HDMI 1"] pub type HDMI_1_R = crate::BitReader; #[doc = "Field `HDMI_1` writer - HDMI 1"] -pub type HDMI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type HDMI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_3` reader - Pixel Valve 3"] pub type PIXEL_VALVE_3_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_3` writer - Pixel Valve 3"] -pub type PIXEL_VALVE_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI_BSC_SLAVE` reader - SPI/BSC Slave"] pub type SPI_BSC_SLAVE_R = crate::BitReader; #[doc = "Field `SPI_BSC_SLAVE` writer - SPI/BSC Slave"] -pub type SPI_BSC_SLAVE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_BSC_SLAVE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DSI_1` reader - DSI 1"] pub type DSI_1_R = crate::BitReader; #[doc = "Field `DSI_1` writer - DSI 1"] -pub type DSI_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DSI_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_0` reader - Pixel Valve 0"] pub type PIXEL_VALVE_0_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_0` writer - Pixel Valve 0"] -pub type PIXEL_VALVE_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PIXEL_VALVE_1_2` reader - OR of Pixel Valve 1 and 2"] pub type PIXEL_VALVE_1_2_R = crate::BitReader; #[doc = "Field `PIXEL_VALVE_1_2` writer - OR of Pixel Valve 1 and 2"] -pub type PIXEL_VALVE_1_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PIXEL_VALVE_1_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPR` reader - CPR"] pub type CPR_R = crate::BitReader; #[doc = "Field `CPR` writer - CPR"] -pub type CPR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SMI` reader - SMI"] pub type SMI_R = crate::BitReader; #[doc = "Field `SMI` writer - SMI"] -pub type SMI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SMI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_0` reader - GPIO 0"] pub type GPIO_0_R = crate::BitReader; #[doc = "Field `GPIO_0` writer - GPIO 0"] -pub type GPIO_0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_1` reader - GPIO 1"] pub type GPIO_1_R = crate::BitReader; #[doc = "Field `GPIO_1` writer - GPIO 1"] -pub type GPIO_1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_2` reader - GPIO 2"] pub type GPIO_2_R = crate::BitReader; #[doc = "Field `GPIO_2` writer - GPIO 2"] -pub type GPIO_2_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_2_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `GPIO_3` reader - GPIO 3"] pub type GPIO_3_R = crate::BitReader; #[doc = "Field `GPIO_3` writer - GPIO 3"] -pub type GPIO_3_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type GPIO_3_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `I2C` reader - OR of all I2C"] pub type I2C_R = crate::BitReader; #[doc = "Field `I2C` writer - OR of all I2C"] -pub type I2C_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type I2C_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SPI` reader - OR of all SPI"] pub type SPI_R = crate::BitReader; #[doc = "Field `SPI` writer - OR of all SPI"] -pub type SPI_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SPI_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `PCM_I2S` reader - PCM/I2S"] pub type PCM_I2S_R = crate::BitReader; #[doc = "Field `PCM_I2S` writer - PCM/I2S"] -pub type PCM_I2S_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type PCM_I2S_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `SDHOST` reader - SDHOST"] pub type SDHOST_R = crate::BitReader; #[doc = "Field `SDHOST` writer - SDHOST"] -pub type SDHOST_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type SDHOST_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `UART` reader - OR of all PL011 UARTs"] pub type UART_R = crate::BitReader; #[doc = "Field `UART` writer - OR of all PL011 UARTs"] -pub type UART_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type UART_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE` reader - OR of all ETH_PCIe L2"] pub type ETH_PCIE_R = crate::BitReader; #[doc = "Field `ETH_PCIE` writer - OR of all ETH_PCIe L2"] -pub type ETH_PCIE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VEC` reader - VEC"] pub type VEC_R = crate::BitReader; #[doc = "Field `VEC` writer - VEC"] -pub type VEC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VEC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `CPG` reader - CPG"] pub type CPG_R = crate::BitReader; #[doc = "Field `CPG` writer - CPG"] -pub type CPG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type CPG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `RNG` reader - RNG"] pub type RNG_R = crate::BitReader; #[doc = "Field `RNG` writer - RNG"] -pub type RNG_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type RNG_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `EMMC` reader - OR of EMMC and EMMC2"] pub type EMMC_R = crate::BitReader; #[doc = "Field `EMMC` writer - OR of EMMC and EMMC2"] -pub type EMMC_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type EMMC_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ETH_PCIE_SECURE` reader - ETH_PCIe secure"] pub type ETH_PCIE_SECURE_R = crate::BitReader; #[doc = "Field `ETH_PCIE_SECURE` writer - ETH_PCIe secure"] -pub type ETH_PCIE_SECURE_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ETH_PCIE_SECURE_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] @@ -350,201 +350,201 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - HDMI CEC"] #[inline(always)] #[must_use] - pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { - HDMI_CEC_W::new(self) + pub fn hdmi_cec(&mut self) -> HDMI_CEC_W { + HDMI_CEC_W::new(self, 0) } #[doc = "Bit 1 - HVS"] #[inline(always)] #[must_use] - pub fn hvs(&mut self) -> HVS_W { - HVS_W::new(self) + pub fn hvs(&mut self) -> HVS_W { + HVS_W::new(self, 1) } #[doc = "Bit 2 - RPIVID"] #[inline(always)] #[must_use] - pub fn rpivid(&mut self) -> RPIVID_W { - RPIVID_W::new(self) + pub fn rpivid(&mut self) -> RPIVID_W { + RPIVID_W::new(self, 2) } #[doc = "Bit 3 - SDC"] #[inline(always)] #[must_use] - pub fn sdc(&mut self) -> SDC_W { - SDC_W::new(self) + pub fn sdc(&mut self) -> SDC_W { + SDC_W::new(self, 3) } #[doc = "Bit 4 - DSI 0"] #[inline(always)] #[must_use] - pub fn dsi_0(&mut self) -> DSI_0_W { - DSI_0_W::new(self) + pub fn dsi_0(&mut self) -> DSI_0_W { + DSI_0_W::new(self, 4) } #[doc = "Bit 5 - Pixel Valve 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { - PIXEL_VALVE_2_W::new(self) + pub fn pixel_valve_2(&mut self) -> PIXEL_VALVE_2_W { + PIXEL_VALVE_2_W::new(self, 5) } #[doc = "Bit 6 - Camera 0"] #[inline(always)] #[must_use] - pub fn camera_0(&mut self) -> CAMERA_0_W { - CAMERA_0_W::new(self) + pub fn camera_0(&mut self) -> CAMERA_0_W { + CAMERA_0_W::new(self, 6) } #[doc = "Bit 7 - Camera 1"] #[inline(always)] #[must_use] - pub fn camera_1(&mut self) -> CAMERA_1_W { - CAMERA_1_W::new(self) + pub fn camera_1(&mut self) -> CAMERA_1_W { + CAMERA_1_W::new(self, 7) } #[doc = "Bit 8 - HDMI 0"] #[inline(always)] #[must_use] - pub fn hdmi_0(&mut self) -> HDMI_0_W { - HDMI_0_W::new(self) + pub fn hdmi_0(&mut self) -> HDMI_0_W { + HDMI_0_W::new(self, 8) } #[doc = "Bit 9 - HDMI 1"] #[inline(always)] #[must_use] - pub fn hdmi_1(&mut self) -> HDMI_1_W { - HDMI_1_W::new(self) + pub fn hdmi_1(&mut self) -> HDMI_1_W { + HDMI_1_W::new(self, 9) } #[doc = "Bit 10 - Pixel Valve 3"] #[inline(always)] #[must_use] - pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { - PIXEL_VALVE_3_W::new(self) + pub fn pixel_valve_3(&mut self) -> PIXEL_VALVE_3_W { + PIXEL_VALVE_3_W::new(self, 10) } #[doc = "Bit 11 - SPI/BSC Slave"] #[inline(always)] #[must_use] - pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { - SPI_BSC_SLAVE_W::new(self) + pub fn spi_bsc_slave(&mut self) -> SPI_BSC_SLAVE_W { + SPI_BSC_SLAVE_W::new(self, 11) } #[doc = "Bit 12 - DSI 1"] #[inline(always)] #[must_use] - pub fn dsi_1(&mut self) -> DSI_1_W { - DSI_1_W::new(self) + pub fn dsi_1(&mut self) -> DSI_1_W { + DSI_1_W::new(self, 12) } #[doc = "Bit 13 - Pixel Valve 0"] #[inline(always)] #[must_use] - pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { - PIXEL_VALVE_0_W::new(self) + pub fn pixel_valve_0(&mut self) -> PIXEL_VALVE_0_W { + PIXEL_VALVE_0_W::new(self, 13) } #[doc = "Bit 14 - OR of Pixel Valve 1 and 2"] #[inline(always)] #[must_use] - pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { - PIXEL_VALVE_1_2_W::new(self) + pub fn pixel_valve_1_2(&mut self) -> PIXEL_VALVE_1_2_W { + PIXEL_VALVE_1_2_W::new(self, 14) } #[doc = "Bit 15 - CPR"] #[inline(always)] #[must_use] - pub fn cpr(&mut self) -> CPR_W { - CPR_W::new(self) + pub fn cpr(&mut self) -> CPR_W { + CPR_W::new(self, 15) } #[doc = "Bit 16 - SMI"] #[inline(always)] #[must_use] - pub fn smi(&mut self) -> SMI_W { - SMI_W::new(self) + pub fn smi(&mut self) -> SMI_W { + SMI_W::new(self, 16) } #[doc = "Bit 17 - GPIO 0"] #[inline(always)] #[must_use] - pub fn gpio_0(&mut self) -> GPIO_0_W { - GPIO_0_W::new(self) + pub fn gpio_0(&mut self) -> GPIO_0_W { + GPIO_0_W::new(self, 17) } #[doc = "Bit 18 - GPIO 1"] #[inline(always)] #[must_use] - pub fn gpio_1(&mut self) -> GPIO_1_W { - GPIO_1_W::new(self) + pub fn gpio_1(&mut self) -> GPIO_1_W { + GPIO_1_W::new(self, 18) } #[doc = "Bit 19 - GPIO 2"] #[inline(always)] #[must_use] - pub fn gpio_2(&mut self) -> GPIO_2_W { - GPIO_2_W::new(self) + pub fn gpio_2(&mut self) -> GPIO_2_W { + GPIO_2_W::new(self, 19) } #[doc = "Bit 20 - GPIO 3"] #[inline(always)] #[must_use] - pub fn gpio_3(&mut self) -> GPIO_3_W { - GPIO_3_W::new(self) + pub fn gpio_3(&mut self) -> GPIO_3_W { + GPIO_3_W::new(self, 20) } #[doc = "Bit 21 - OR of all I2C"] #[inline(always)] #[must_use] - pub fn i2c(&mut self) -> I2C_W { - I2C_W::new(self) + pub fn i2c(&mut self) -> I2C_W { + I2C_W::new(self, 21) } #[doc = "Bit 22 - OR of all SPI"] #[inline(always)] #[must_use] - pub fn spi(&mut self) -> SPI_W { - SPI_W::new(self) + pub fn spi(&mut self) -> SPI_W { + SPI_W::new(self, 22) } #[doc = "Bit 23 - PCM/I2S"] #[inline(always)] #[must_use] - pub fn pcm_i2s(&mut self) -> PCM_I2S_W { - PCM_I2S_W::new(self) + pub fn pcm_i2s(&mut self) -> PCM_I2S_W { + PCM_I2S_W::new(self, 23) } #[doc = "Bit 24 - SDHOST"] #[inline(always)] #[must_use] - pub fn sdhost(&mut self) -> SDHOST_W { - SDHOST_W::new(self) + pub fn sdhost(&mut self) -> SDHOST_W { + SDHOST_W::new(self, 24) } #[doc = "Bit 25 - OR of all PL011 UARTs"] #[inline(always)] #[must_use] - pub fn uart(&mut self) -> UART_W { - UART_W::new(self) + pub fn uart(&mut self) -> UART_W { + UART_W::new(self, 25) } #[doc = "Bit 26 - OR of all ETH_PCIe L2"] #[inline(always)] #[must_use] - pub fn eth_pcie(&mut self) -> ETH_PCIE_W { - ETH_PCIE_W::new(self) + pub fn eth_pcie(&mut self) -> ETH_PCIE_W { + ETH_PCIE_W::new(self, 26) } #[doc = "Bit 27 - VEC"] #[inline(always)] #[must_use] - pub fn vec(&mut self) -> VEC_W { - VEC_W::new(self) + pub fn vec(&mut self) -> VEC_W { + VEC_W::new(self, 27) } #[doc = "Bit 28 - CPG"] #[inline(always)] #[must_use] - pub fn cpg(&mut self) -> CPG_W { - CPG_W::new(self) + pub fn cpg(&mut self) -> CPG_W { + CPG_W::new(self, 28) } #[doc = "Bit 29 - RNG"] #[inline(always)] #[must_use] - pub fn rng(&mut self) -> RNG_W { - RNG_W::new(self) + pub fn rng(&mut self) -> RNG_W { + RNG_W::new(self, 29) } #[doc = "Bit 30 - OR of EMMC and EMMC2"] #[inline(always)] #[must_use] - pub fn emmc(&mut self) -> EMMC_W { - EMMC_W::new(self) + pub fn emmc(&mut self) -> EMMC_W { + EMMC_W::new(self, 30) } #[doc = "Bit 31 - ETH_PCIe secure"] #[inline(always)] #[must_use] - pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { - ETH_PCIE_SECURE_W::new(self) + pub fn eth_pcie_secure(&mut self) -> ETH_PCIE_SECURE_W { + ETH_PCIE_SECURE_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/enable_basic.rs b/crates/bcm2837-lpa/src/lic/enable_basic.rs index 3533529..86699b8 100644 --- a/crates/bcm2837-lpa/src/lic/enable_basic.rs +++ b/crates/bcm2837-lpa/src/lic/enable_basic.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `TIMER` reader - ARMC Timer"] pub type TIMER_R = crate::BitReader; #[doc = "Field `TIMER` writer - ARMC Timer"] -pub type TIMER_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type TIMER_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `MAILBOX` reader - Mailbox"] pub type MAILBOX_R = crate::BitReader; #[doc = "Field `MAILBOX` writer - Mailbox"] -pub type MAILBOX_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type MAILBOX_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL0` reader - Doorbell 0"] pub type DOORBELL0_R = crate::BitReader; #[doc = "Field `DOORBELL0` writer - Doorbell 0"] -pub type DOORBELL0_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL0_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `DOORBELL1` reader - Doorbell 1"] pub type DOORBELL1_R = crate::BitReader; #[doc = "Field `DOORBELL1` writer - Doorbell 1"] -pub type DOORBELL1_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type DOORBELL1_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU0_HALTED` reader - VPU0 halted"] pub type VPU0_HALTED_R = crate::BitReader; #[doc = "Field `VPU0_HALTED` writer - VPU0 halted"] -pub type VPU0_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU0_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `VPU1_HALTED` reader - VPU1 halted"] pub type VPU1_HALTED_R = crate::BitReader; #[doc = "Field `VPU1_HALTED` writer - VPU1 halted"] -pub type VPU1_HALTED_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type VPU1_HALTED_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_ADDRESS_ERROR` reader - ARM address error"] pub type ARM_ADDRESS_ERROR_R = crate::BitReader; #[doc = "Field `ARM_ADDRESS_ERROR` writer - ARM address error"] -pub type ARM_ADDRESS_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_ADDRESS_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; #[doc = "Field `ARM_AXI_ERROR` reader - ARM AXI error"] pub type ARM_AXI_ERROR_R = crate::BitReader; #[doc = "Field `ARM_AXI_ERROR` writer - ARM AXI error"] -pub type ARM_AXI_ERROR_W<'a, REG, const O: u8> = crate::BitWriter1S<'a, REG, O>; +pub type ARM_AXI_ERROR_W<'a, REG> = crate::BitWriter1S<'a, REG>; impl R { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] @@ -98,57 +98,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - ARMC Timer"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W { - TIMER_W::new(self) + pub fn timer(&mut self) -> TIMER_W { + TIMER_W::new(self, 0) } #[doc = "Bit 1 - Mailbox"] #[inline(always)] #[must_use] - pub fn mailbox(&mut self) -> MAILBOX_W { - MAILBOX_W::new(self) + pub fn mailbox(&mut self) -> MAILBOX_W { + MAILBOX_W::new(self, 1) } #[doc = "Bit 2 - Doorbell 0"] #[inline(always)] #[must_use] - pub fn doorbell0(&mut self) -> DOORBELL0_W { - DOORBELL0_W::new(self) + pub fn doorbell0(&mut self) -> DOORBELL0_W { + DOORBELL0_W::new(self, 2) } #[doc = "Bit 3 - Doorbell 1"] #[inline(always)] #[must_use] - pub fn doorbell1(&mut self) -> DOORBELL1_W { - DOORBELL1_W::new(self) + pub fn doorbell1(&mut self) -> DOORBELL1_W { + DOORBELL1_W::new(self, 3) } #[doc = "Bit 4 - VPU0 halted"] #[inline(always)] #[must_use] - pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { - VPU0_HALTED_W::new(self) + pub fn vpu0_halted(&mut self) -> VPU0_HALTED_W { + VPU0_HALTED_W::new(self, 4) } #[doc = "Bit 5 - VPU1 halted"] #[inline(always)] #[must_use] - pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { - VPU1_HALTED_W::new(self) + pub fn vpu1_halted(&mut self) -> VPU1_HALTED_W { + VPU1_HALTED_W::new(self, 5) } #[doc = "Bit 6 - ARM address error"] #[inline(always)] #[must_use] - pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { - ARM_ADDRESS_ERROR_W::new(self) + pub fn arm_address_error(&mut self) -> ARM_ADDRESS_ERROR_W { + ARM_ADDRESS_ERROR_W::new(self, 6) } #[doc = "Bit 7 - ARM AXI error"] #[inline(always)] #[must_use] - pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { - ARM_AXI_ERROR_W::new(self) + pub fn arm_axi_error(&mut self) -> ARM_AXI_ERROR_W { + ARM_AXI_ERROR_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/fiq_control.rs b/crates/bcm2837-lpa/src/lic/fiq_control.rs index e7bc947..303b1fd 100644 --- a/crates/bcm2837-lpa/src/lic/fiq_control.rs +++ b/crates/bcm2837-lpa/src/lic/fiq_control.rs @@ -604,8 +604,8 @@ impl SOURCE_R { } } #[doc = "Field `SOURCE` writer - FIQ Source"] -pub type SOURCE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O, SOURCE_A>; -impl<'a, REG, const O: u8> SOURCE_W<'a, REG, O> +pub type SOURCE_W<'a, REG> = crate::FieldWriter<'a, REG, 7, SOURCE_A>; +impl<'a, REG> SOURCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -974,7 +974,7 @@ where #[doc = "Field `ENABLE` reader - FIQ Enable"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - FIQ Enable"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:6 - FIQ Source"] #[inline(always)] @@ -997,21 +997,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - FIQ Source"] #[inline(always)] #[must_use] - pub fn source(&mut self) -> SOURCE_W { - SOURCE_W::new(self) + pub fn source(&mut self) -> SOURCE_W { + SOURCE_W::new(self, 0) } #[doc = "Bit 7 - FIQ Enable"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/lic/pending_1.rs b/crates/bcm2837-lpa/src/lic/pending_1.rs index 8c9286e..fc9091b 100644 --- a/crates/bcm2837-lpa/src/lic/pending_1.rs +++ b/crates/bcm2837-lpa/src/lic/pending_1.rs @@ -278,7 +278,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Pending state for interrupts 1 - 31\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pending_1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/lic/pending_2.rs b/crates/bcm2837-lpa/src/lic/pending_2.rs index fcd18af..df23755 100644 --- a/crates/bcm2837-lpa/src/lic/pending_2.rs +++ b/crates/bcm2837-lpa/src/lic/pending_2.rs @@ -284,7 +284,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Pending state for interrupts 32 - 63\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pending_2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/pwm0.rs b/crates/bcm2837-lpa/src/pwm0.rs index 4306916..3a98ec3 100644 --- a/crates/bcm2837-lpa/src/pwm0.rs +++ b/crates/bcm2837-lpa/src/pwm0.rs @@ -2,24 +2,58 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + ctl: CTL, + sta: STA, + dmac: DMAC, + _reserved3: [u8; 0x04], + rng1: RNG1, + dat1: DAT1, + fif1: FIF1, + _reserved6: [u8; 0x04], + rng2: RNG2, + dat2: DAT2, +} +impl RegisterBlock { #[doc = "0x00 - Control"] - pub ctl: CTL, + #[inline(always)] + pub const fn ctl(&self) -> &CTL { + &self.ctl + } #[doc = "0x04 - Status"] - pub sta: STA, + #[inline(always)] + pub const fn sta(&self) -> &STA { + &self.sta + } #[doc = "0x08 - DMA control"] - pub dmac: DMAC, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn dmac(&self) -> &DMAC { + &self.dmac + } #[doc = "0x10 - Range for channel 1"] - pub rng1: RNG1, + #[inline(always)] + pub const fn rng1(&self) -> &RNG1 { + &self.rng1 + } #[doc = "0x14 - Channel 1 data"] - pub dat1: DAT1, + #[inline(always)] + pub const fn dat1(&self) -> &DAT1 { + &self.dat1 + } #[doc = "0x18 - FIFO input"] - pub fif1: FIF1, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn fif1(&self) -> &FIF1 { + &self.fif1 + } #[doc = "0x20 - Range for channel 2"] - pub rng2: RNG2, + #[inline(always)] + pub const fn rng2(&self) -> &RNG2 { + &self.rng2 + } #[doc = "0x24 - Channel 2 data"] - pub dat2: DAT2, + #[inline(always)] + pub const fn dat2(&self) -> &DAT2 { + &self.dat2 + } } #[doc = "CTL (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctl`] module"] diff --git a/crates/bcm2837-lpa/src/pwm0/ctl.rs b/crates/bcm2837-lpa/src/pwm0/ctl.rs index d1b9d57..775bd00 100644 --- a/crates/bcm2837-lpa/src/pwm0/ctl.rs +++ b/crates/bcm2837-lpa/src/pwm0/ctl.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PWEN1` reader - Enable channel 1"] pub type PWEN1_R = crate::BitReader; #[doc = "Field `PWEN1` writer - Enable channel 1"] -pub type PWEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MODE1` reader - Channel 1 mode"] pub type MODE1_R = crate::BitReader; #[doc = "Channel 1 mode\n\nValue on reset: 0"] @@ -43,8 +43,8 @@ impl MODE1_R { } } #[doc = "Field `MODE1` writer - Channel 1 mode"] -pub type MODE1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MODE1_A>; -impl<'a, REG, const O: u8> MODE1_W<'a, REG, O> +pub type MODE1_W<'a, REG> = crate::BitWriter<'a, REG, MODE1_A>; +impl<'a, REG> MODE1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -62,31 +62,31 @@ where #[doc = "Field `RPTL1` reader - Repeat last value from FIFO for channel 1"] pub type RPTL1_R = crate::BitReader; #[doc = "Field `RPTL1` writer - Repeat last value from FIFO for channel 1"] -pub type RPTL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPTL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBIT1` reader - State when not transmitting on channel 1"] pub type SBIT1_R = crate::BitReader; #[doc = "Field `SBIT1` writer - State when not transmitting on channel 1"] -pub type SBIT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SBIT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLA1` reader - Channel 1 polarity inverted"] pub type POLA1_R = crate::BitReader; #[doc = "Field `POLA1` writer - Channel 1 polarity inverted"] -pub type POLA1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POLA1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEF1` reader - Use FIFO for channel 1"] pub type USEF1_R = crate::BitReader; #[doc = "Field `USEF1` writer - Use FIFO for channel 1"] -pub type USEF1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USEF1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLRF1` reader - Clear FIFO"] pub type CLRF1_R = crate::BitReader; #[doc = "Field `CLRF1` writer - Clear FIFO"] -pub type CLRF1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLRF1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSEN1` reader - M/S mode for channel 1"] pub type MSEN1_R = crate::BitReader; #[doc = "Field `MSEN1` writer - M/S mode for channel 1"] -pub type MSEN1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWEN2` reader - Enable channel 2"] pub type PWEN2_R = crate::BitReader; #[doc = "Field `PWEN2` writer - Enable channel 2"] -pub type PWEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWEN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MODE2` reader - Channel 2 mode"] pub type MODE2_R = crate::BitReader; #[doc = "Channel 2 mode\n\nValue on reset: 0"] @@ -124,8 +124,8 @@ impl MODE2_R { } } #[doc = "Field `MODE2` writer - Channel 2 mode"] -pub type MODE2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, MODE2_A>; -impl<'a, REG, const O: u8> MODE2_W<'a, REG, O> +pub type MODE2_W<'a, REG> = crate::BitWriter<'a, REG, MODE2_A>; +impl<'a, REG> MODE2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -143,23 +143,23 @@ where #[doc = "Field `RPTL2` reader - Repeat last value from FIFO for channel 2"] pub type RPTL2_R = crate::BitReader; #[doc = "Field `RPTL2` writer - Repeat last value from FIFO for channel 2"] -pub type RPTL2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RPTL2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBIT2` reader - State when not transmitting on channel 2"] pub type SBIT2_R = crate::BitReader; #[doc = "Field `SBIT2` writer - State when not transmitting on channel 2"] -pub type SBIT2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SBIT2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLA2` reader - Channel 2 polarity inverted"] pub type POLA2_R = crate::BitReader; #[doc = "Field `POLA2` writer - Channel 2 polarity inverted"] -pub type POLA2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POLA2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEF2` reader - Use FIFO for channel 2"] pub type USEF2_R = crate::BitReader; #[doc = "Field `USEF2` writer - Use FIFO for channel 2"] -pub type USEF2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USEF2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSEN2` reader - M/S mode for channel 2"] pub type MSEN2_R = crate::BitReader; #[doc = "Field `MSEN2` writer - M/S mode for channel 2"] -pub type MSEN2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSEN2_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] @@ -260,99 +260,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] #[must_use] - pub fn pwen1(&mut self) -> PWEN1_W { - PWEN1_W::new(self) + pub fn pwen1(&mut self) -> PWEN1_W { + PWEN1_W::new(self, 0) } #[doc = "Bit 1 - Channel 1 mode"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W { - MODE1_W::new(self) + pub fn mode1(&mut self) -> MODE1_W { + MODE1_W::new(self, 1) } #[doc = "Bit 2 - Repeat last value from FIFO for channel 1"] #[inline(always)] #[must_use] - pub fn rptl1(&mut self) -> RPTL1_W { - RPTL1_W::new(self) + pub fn rptl1(&mut self) -> RPTL1_W { + RPTL1_W::new(self, 2) } #[doc = "Bit 3 - State when not transmitting on channel 1"] #[inline(always)] #[must_use] - pub fn sbit1(&mut self) -> SBIT1_W { - SBIT1_W::new(self) + pub fn sbit1(&mut self) -> SBIT1_W { + SBIT1_W::new(self, 3) } #[doc = "Bit 4 - Channel 1 polarity inverted"] #[inline(always)] #[must_use] - pub fn pola1(&mut self) -> POLA1_W { - POLA1_W::new(self) + pub fn pola1(&mut self) -> POLA1_W { + POLA1_W::new(self, 4) } #[doc = "Bit 5 - Use FIFO for channel 1"] #[inline(always)] #[must_use] - pub fn usef1(&mut self) -> USEF1_W { - USEF1_W::new(self) + pub fn usef1(&mut self) -> USEF1_W { + USEF1_W::new(self, 5) } #[doc = "Bit 6 - Clear FIFO"] #[inline(always)] #[must_use] - pub fn clrf1(&mut self) -> CLRF1_W { - CLRF1_W::new(self) + pub fn clrf1(&mut self) -> CLRF1_W { + CLRF1_W::new(self, 6) } #[doc = "Bit 7 - M/S mode for channel 1"] #[inline(always)] #[must_use] - pub fn msen1(&mut self) -> MSEN1_W { - MSEN1_W::new(self) + pub fn msen1(&mut self) -> MSEN1_W { + MSEN1_W::new(self, 7) } #[doc = "Bit 8 - Enable channel 2"] #[inline(always)] #[must_use] - pub fn pwen2(&mut self) -> PWEN2_W { - PWEN2_W::new(self) + pub fn pwen2(&mut self) -> PWEN2_W { + PWEN2_W::new(self, 8) } #[doc = "Bit 9 - Channel 2 mode"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W { - MODE2_W::new(self) + pub fn mode2(&mut self) -> MODE2_W { + MODE2_W::new(self, 9) } #[doc = "Bit 10 - Repeat last value from FIFO for channel 2"] #[inline(always)] #[must_use] - pub fn rptl2(&mut self) -> RPTL2_W { - RPTL2_W::new(self) + pub fn rptl2(&mut self) -> RPTL2_W { + RPTL2_W::new(self, 10) } #[doc = "Bit 11 - State when not transmitting on channel 2"] #[inline(always)] #[must_use] - pub fn sbit2(&mut self) -> SBIT2_W { - SBIT2_W::new(self) + pub fn sbit2(&mut self) -> SBIT2_W { + SBIT2_W::new(self, 11) } #[doc = "Bit 12 - Channel 2 polarity inverted"] #[inline(always)] #[must_use] - pub fn pola2(&mut self) -> POLA2_W { - POLA2_W::new(self) + pub fn pola2(&mut self) -> POLA2_W { + POLA2_W::new(self, 12) } #[doc = "Bit 13 - Use FIFO for channel 2"] #[inline(always)] #[must_use] - pub fn usef2(&mut self) -> USEF2_W { - USEF2_W::new(self) + pub fn usef2(&mut self) -> USEF2_W { + USEF2_W::new(self, 13) } #[doc = "Bit 15 - M/S mode for channel 2"] #[inline(always)] #[must_use] - pub fn msen2(&mut self) -> MSEN2_W { - MSEN2_W::new(self) + pub fn msen2(&mut self) -> MSEN2_W { + MSEN2_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/pwm0/dat1.rs b/crates/bcm2837-lpa/src/pwm0/dat1.rs index b70672a..d7e256f 100644 --- a/crates/bcm2837-lpa/src/pwm0/dat1.rs +++ b/crates/bcm2837-lpa/src/pwm0/dat1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/pwm0/dat2.rs b/crates/bcm2837-lpa/src/pwm0/dat2.rs index 00bb85f..eb9a92e 100644 --- a/crates/bcm2837-lpa/src/pwm0/dat2.rs +++ b/crates/bcm2837-lpa/src/pwm0/dat2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/pwm0/dmac.rs b/crates/bcm2837-lpa/src/pwm0/dmac.rs index d73ccfd..481d414 100644 --- a/crates/bcm2837-lpa/src/pwm0/dmac.rs +++ b/crates/bcm2837-lpa/src/pwm0/dmac.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `DREQ` reader - DMA threshold for DREQ signal"] pub type DREQ_R = crate::FieldReader; #[doc = "Field `DREQ` writer - DMA threshold for DREQ signal"] -pub type DREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PANIC` reader - DMA threshold for panic signal"] pub type PANIC_R = crate::FieldReader; #[doc = "Field `PANIC` writer - DMA threshold for panic signal"] -pub type PANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type PANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ENAB` reader - DMA enabled"] pub type ENAB_R = crate::BitReader; #[doc = "Field `ENAB` writer - DMA enabled"] -pub type ENAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENAB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - DMA threshold for DREQ signal"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA threshold for DREQ signal"] #[inline(always)] #[must_use] - pub fn dreq(&mut self) -> DREQ_W { - DREQ_W::new(self) + pub fn dreq(&mut self) -> DREQ_W { + DREQ_W::new(self, 0) } #[doc = "Bits 8:15 - DMA threshold for panic signal"] #[inline(always)] #[must_use] - pub fn panic(&mut self) -> PANIC_W { - PANIC_W::new(self) + pub fn panic(&mut self) -> PANIC_W { + PANIC_W::new(self, 8) } #[doc = "Bit 31 - DMA enabled"] #[inline(always)] #[must_use] - pub fn enab(&mut self) -> ENAB_W { - ENAB_W::new(self) + pub fn enab(&mut self) -> ENAB_W { + ENAB_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/pwm0/rng1.rs b/crates/bcm2837-lpa/src/pwm0/rng1.rs index 2a01d68..2f3996b 100644 --- a/crates/bcm2837-lpa/src/pwm0/rng1.rs +++ b/crates/bcm2837-lpa/src/pwm0/rng1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/pwm0/rng2.rs b/crates/bcm2837-lpa/src/pwm0/rng2.rs index c7a9f74..c1b9401 100644 --- a/crates/bcm2837-lpa/src/pwm0/rng2.rs +++ b/crates/bcm2837-lpa/src/pwm0/rng2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/pwm0/sta.rs b/crates/bcm2837-lpa/src/pwm0/sta.rs index a0076a9..6429987 100644 --- a/crates/bcm2837-lpa/src/pwm0/sta.rs +++ b/crates/bcm2837-lpa/src/pwm0/sta.rs @@ -5,55 +5,55 @@ pub type W = crate::W; #[doc = "Field `FULL1` reader - FIFO full"] pub type FULL1_R = crate::BitReader; #[doc = "Field `FULL1` writer - FIFO full"] -pub type FULL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FULL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMPT1` reader - FIFO empty"] pub type EMPT1_R = crate::BitReader; #[doc = "Field `EMPT1` writer - FIFO empty"] -pub type EMPT1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EMPT1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WERR1` reader - FIFO write error"] pub type WERR1_R = crate::BitReader; #[doc = "Field `WERR1` writer - FIFO write error"] -pub type WERR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WERR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RERR1` reader - FIFO read error"] pub type RERR1_R = crate::BitReader; #[doc = "Field `RERR1` writer - FIFO read error"] -pub type RERR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RERR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO1` reader - Channel 1 gap occurred"] pub type GAPO1_R = crate::BitReader; #[doc = "Field `GAPO1` writer - Channel 1 gap occurred"] -pub type GAPO1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO2` reader - Channel 2 gap occurred"] pub type GAPO2_R = crate::BitReader; #[doc = "Field `GAPO2` writer - Channel 2 gap occurred"] -pub type GAPO2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO3` reader - Channel 3 gap occurred"] pub type GAPO3_R = crate::BitReader; #[doc = "Field `GAPO3` writer - Channel 3 gap occurred"] -pub type GAPO3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GAPO4` reader - Channel 4 gap occurred"] pub type GAPO4_R = crate::BitReader; #[doc = "Field `GAPO4` writer - Channel 4 gap occurred"] -pub type GAPO4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GAPO4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERR` reader - Bus error"] pub type BERR_R = crate::BitReader; #[doc = "Field `BERR` writer - Bus error"] -pub type BERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA1` reader - Channel 1 state"] pub type STA1_R = crate::BitReader; #[doc = "Field `STA1` writer - Channel 1 state"] -pub type STA1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA2` reader - Channel 2 state"] pub type STA2_R = crate::BitReader; #[doc = "Field `STA2` writer - Channel 2 state"] -pub type STA2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA3` reader - Channel 3 state"] pub type STA3_R = crate::BitReader; #[doc = "Field `STA3` writer - Channel 3 state"] -pub type STA3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STA4` reader - Channel 4 state"] pub type STA4_R = crate::BitReader; #[doc = "Field `STA4` writer - Channel 4 state"] -pub type STA4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STA4_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - FIFO full"] #[inline(always)] @@ -142,87 +142,87 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - FIFO full"] #[inline(always)] #[must_use] - pub fn full1(&mut self) -> FULL1_W { - FULL1_W::new(self) + pub fn full1(&mut self) -> FULL1_W { + FULL1_W::new(self, 0) } #[doc = "Bit 1 - FIFO empty"] #[inline(always)] #[must_use] - pub fn empt1(&mut self) -> EMPT1_W { - EMPT1_W::new(self) + pub fn empt1(&mut self) -> EMPT1_W { + EMPT1_W::new(self, 1) } #[doc = "Bit 2 - FIFO write error"] #[inline(always)] #[must_use] - pub fn werr1(&mut self) -> WERR1_W { - WERR1_W::new(self) + pub fn werr1(&mut self) -> WERR1_W { + WERR1_W::new(self, 2) } #[doc = "Bit 3 - FIFO read error"] #[inline(always)] #[must_use] - pub fn rerr1(&mut self) -> RERR1_W { - RERR1_W::new(self) + pub fn rerr1(&mut self) -> RERR1_W { + RERR1_W::new(self, 3) } #[doc = "Bit 4 - Channel 1 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo1(&mut self) -> GAPO1_W { - GAPO1_W::new(self) + pub fn gapo1(&mut self) -> GAPO1_W { + GAPO1_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo2(&mut self) -> GAPO2_W { - GAPO2_W::new(self) + pub fn gapo2(&mut self) -> GAPO2_W { + GAPO2_W::new(self, 5) } #[doc = "Bit 6 - Channel 3 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo3(&mut self) -> GAPO3_W { - GAPO3_W::new(self) + pub fn gapo3(&mut self) -> GAPO3_W { + GAPO3_W::new(self, 6) } #[doc = "Bit 7 - Channel 4 gap occurred"] #[inline(always)] #[must_use] - pub fn gapo4(&mut self) -> GAPO4_W { - GAPO4_W::new(self) + pub fn gapo4(&mut self) -> GAPO4_W { + GAPO4_W::new(self, 7) } #[doc = "Bit 8 - Bus error"] #[inline(always)] #[must_use] - pub fn berr(&mut self) -> BERR_W { - BERR_W::new(self) + pub fn berr(&mut self) -> BERR_W { + BERR_W::new(self, 8) } #[doc = "Bit 9 - Channel 1 state"] #[inline(always)] #[must_use] - pub fn sta1(&mut self) -> STA1_W { - STA1_W::new(self) + pub fn sta1(&mut self) -> STA1_W { + STA1_W::new(self, 9) } #[doc = "Bit 10 - Channel 2 state"] #[inline(always)] #[must_use] - pub fn sta2(&mut self) -> STA2_W { - STA2_W::new(self) + pub fn sta2(&mut self) -> STA2_W { + STA2_W::new(self, 10) } #[doc = "Bit 11 - Channel 3 state"] #[inline(always)] #[must_use] - pub fn sta3(&mut self) -> STA3_W { - STA3_W::new(self) + pub fn sta3(&mut self) -> STA3_W { + STA3_W::new(self, 11) } #[doc = "Bit 12 - Channel 4 state"] #[inline(always)] #[must_use] - pub fn sta4(&mut self) -> STA4_W { - STA4_W::new(self) + pub fn sta4(&mut self) -> STA4_W { + STA4_W::new(self, 12) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi0.rs b/crates/bcm2837-lpa/src/spi0.rs index 66be9b6..bcd4b68 100644 --- a/crates/bcm2837-lpa/src/spi0.rs +++ b/crates/bcm2837-lpa/src/spi0.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + fifo: FIFO, + clk: CLK, + dlen: DLEN, + ltoh: LTOH, + dc: DC, +} +impl RegisterBlock { #[doc = "0x00 - Control and Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - FIFO access"] - pub fifo: FIFO, + #[inline(always)] + pub const fn fifo(&self) -> &FIFO { + &self.fifo + } #[doc = "0x08 - Clock divider"] - pub clk: CLK, + #[inline(always)] + pub const fn clk(&self) -> &CLK { + &self.clk + } #[doc = "0x0c - Data length"] - pub dlen: DLEN, + #[inline(always)] + pub const fn dlen(&self) -> &DLEN { + &self.dlen + } #[doc = "0x10 - LoSSI output hold delay"] - pub ltoh: LTOH, + #[inline(always)] + pub const fn ltoh(&self) -> <OH { + &self.ltoh + } #[doc = "0x14 - "] - pub dc: DC, + #[inline(always)] + pub const fn dc(&self) -> &DC { + &self.dc + } } #[doc = "CS (rw) register accessor: Control and Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2837-lpa/src/spi0/clk.rs b/crates/bcm2837-lpa/src/spi0/clk.rs index 54ce877..280645f 100644 --- a/crates/bcm2837-lpa/src/spi0/clk.rs +++ b/crates/bcm2837-lpa/src/spi0/clk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CDIV` reader - Clock divider"] pub type CDIV_R = crate::FieldReader; #[doc = "Field `CDIV` writer - Clock divider"] -pub type CDIV_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type CDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Clock divider"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Clock divider"] #[inline(always)] #[must_use] - pub fn cdiv(&mut self) -> CDIV_W { - CDIV_W::new(self) + pub fn cdiv(&mut self) -> CDIV_W { + CDIV_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi0/cs.rs b/crates/bcm2837-lpa/src/spi0/cs.rs index 06511e6..edf286a 100644 --- a/crates/bcm2837-lpa/src/spi0/cs.rs +++ b/crates/bcm2837-lpa/src/spi0/cs.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `CS` reader - Chip select"] pub type CS_R = crate::FieldReader; #[doc = "Field `CS` writer - Chip select"] -pub type CS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type CS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CPHA` reader - Clock phase"] pub type CPHA_R = crate::BitReader; #[doc = "Field `CPHA` writer - Clock phase"] -pub type CPHA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPHA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPOL` reader - Clock polarity"] pub type CPOL_R = crate::BitReader; #[doc = "Field `CPOL` writer - Clock polarity"] -pub type CPOL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CPOL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` reader - Clear the FIFO(s)"] pub type CLEAR_R = crate::FieldReader; #[doc = "Clear the FIFO(s)\n\nValue on reset: 0"] @@ -64,8 +64,8 @@ impl CLEAR_R { } } #[doc = "Field `CLEAR` writer - Clear the FIFO(s)"] -pub type CLEAR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, CLEAR_A>; -impl<'a, REG, const O: u8> CLEAR_W<'a, REG, O> +pub type CLEAR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CLEAR_A>; +impl<'a, REG> CLEAR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -89,43 +89,43 @@ where #[doc = "Field `CSPOL` reader - Chip select polarity"] pub type CSPOL_R = crate::BitReader; #[doc = "Field `CSPOL` writer - Chip select polarity"] -pub type CSPOL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TA` reader - Transfer active"] pub type TA_R = crate::BitReader; #[doc = "Field `TA` writer - Transfer active"] -pub type TA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAEN` reader - Enable DMA"] pub type DMAEN_R = crate::BitReader; #[doc = "Field `DMAEN` writer - Enable DMA"] -pub type DMAEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTD` reader - Interrupt on done"] pub type INTD_R = crate::BitReader; #[doc = "Field `INTD` writer - Interrupt on done"] -pub type INTD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTR` reader - Interrupt on RX"] pub type INTR_R = crate::BitReader; #[doc = "Field `INTR` writer - Interrupt on RX"] -pub type INTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADCS` reader - Automatically deassert chip select"] pub type ADCS_R = crate::BitReader; #[doc = "Field `ADCS` writer - Automatically deassert chip select"] -pub type ADCS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ADCS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REN` reader - Read enable"] pub type REN_R = crate::BitReader; #[doc = "Field `REN` writer - Read enable"] -pub type REN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type REN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN` reader - LoSSI enable"] pub type LEN_R = crate::BitReader; #[doc = "Field `LEN` writer - LoSSI enable"] -pub type LEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LMONO` reader - "] pub type LMONO_R = crate::BitReader; #[doc = "Field `LMONO` writer - "] -pub type LMONO_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LMONO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TE_EN` reader - "] pub type TE_EN_R = crate::BitReader; #[doc = "Field `TE_EN` writer - "] -pub type TE_EN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TE_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE` reader - Transfer is done"] pub type DONE_R = crate::BitReader; #[doc = "Field `RXD` reader - RX FIFO contains data"] @@ -139,23 +139,23 @@ pub type RXF_R = crate::BitReader; #[doc = "Field `CSPOL0` reader - Chip select 0 polarity"] pub type CSPOL0_R = crate::BitReader; #[doc = "Field `CSPOL0` writer - Chip select 0 polarity"] -pub type CSPOL0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSPOL1` reader - Chip select 1 polarity"] pub type CSPOL1_R = crate::BitReader; #[doc = "Field `CSPOL1` writer - Chip select 1 polarity"] -pub type CSPOL1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSPOL2` reader - Chip select 2 polarity"] pub type CSPOL2_R = crate::BitReader; #[doc = "Field `CSPOL2` writer - Chip select 2 polarity"] -pub type CSPOL2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSPOL2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA_LEN` reader - Enable DMA in LoSSI mode"] pub type DMA_LEN_R = crate::BitReader; #[doc = "Field `DMA_LEN` writer - Enable DMA in LoSSI mode"] -pub type DMA_LEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMA_LEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEN_LONG` reader - Enable long data word in LoSSI mode"] pub type LEN_LONG_R = crate::BitReader; #[doc = "Field `LEN_LONG` writer - Enable long data word in LoSSI mode"] -pub type LEN_LONG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LEN_LONG_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Chip select"] #[inline(always)] @@ -310,123 +310,123 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Chip select"] #[inline(always)] #[must_use] - pub fn cs(&mut self) -> CS_W { - CS_W::new(self) + pub fn cs(&mut self) -> CS_W { + CS_W::new(self, 0) } #[doc = "Bit 2 - Clock phase"] #[inline(always)] #[must_use] - pub fn cpha(&mut self) -> CPHA_W { - CPHA_W::new(self) + pub fn cpha(&mut self) -> CPHA_W { + CPHA_W::new(self, 2) } #[doc = "Bit 3 - Clock polarity"] #[inline(always)] #[must_use] - pub fn cpol(&mut self) -> CPOL_W { - CPOL_W::new(self) + pub fn cpol(&mut self) -> CPOL_W { + CPOL_W::new(self, 3) } #[doc = "Bits 4:5 - Clear the FIFO(s)"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W::new(self) + pub fn clear(&mut self) -> CLEAR_W { + CLEAR_W::new(self, 4) } #[doc = "Bit 6 - Chip select polarity"] #[inline(always)] #[must_use] - pub fn cspol(&mut self) -> CSPOL_W { - CSPOL_W::new(self) + pub fn cspol(&mut self) -> CSPOL_W { + CSPOL_W::new(self, 6) } #[doc = "Bit 7 - Transfer active"] #[inline(always)] #[must_use] - pub fn ta(&mut self) -> TA_W { - TA_W::new(self) + pub fn ta(&mut self) -> TA_W { + TA_W::new(self, 7) } #[doc = "Bit 8 - Enable DMA"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 8) } #[doc = "Bit 9 - Interrupt on done"] #[inline(always)] #[must_use] - pub fn intd(&mut self) -> INTD_W { - INTD_W::new(self) + pub fn intd(&mut self) -> INTD_W { + INTD_W::new(self, 9) } #[doc = "Bit 10 - Interrupt on RX"] #[inline(always)] #[must_use] - pub fn intr(&mut self) -> INTR_W { - INTR_W::new(self) + pub fn intr(&mut self) -> INTR_W { + INTR_W::new(self, 10) } #[doc = "Bit 11 - Automatically deassert chip select"] #[inline(always)] #[must_use] - pub fn adcs(&mut self) -> ADCS_W { - ADCS_W::new(self) + pub fn adcs(&mut self) -> ADCS_W { + ADCS_W::new(self, 11) } #[doc = "Bit 12 - Read enable"] #[inline(always)] #[must_use] - pub fn ren(&mut self) -> REN_W { - REN_W::new(self) + pub fn ren(&mut self) -> REN_W { + REN_W::new(self, 12) } #[doc = "Bit 13 - LoSSI enable"] #[inline(always)] #[must_use] - pub fn len(&mut self) -> LEN_W { - LEN_W::new(self) + pub fn len(&mut self) -> LEN_W { + LEN_W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] #[must_use] - pub fn lmono(&mut self) -> LMONO_W { - LMONO_W::new(self) + pub fn lmono(&mut self) -> LMONO_W { + LMONO_W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] #[must_use] - pub fn te_en(&mut self) -> TE_EN_W { - TE_EN_W::new(self) + pub fn te_en(&mut self) -> TE_EN_W { + TE_EN_W::new(self, 15) } #[doc = "Bit 21 - Chip select 0 polarity"] #[inline(always)] #[must_use] - pub fn cspol0(&mut self) -> CSPOL0_W { - CSPOL0_W::new(self) + pub fn cspol0(&mut self) -> CSPOL0_W { + CSPOL0_W::new(self, 21) } #[doc = "Bit 22 - Chip select 1 polarity"] #[inline(always)] #[must_use] - pub fn cspol1(&mut self) -> CSPOL1_W { - CSPOL1_W::new(self) + pub fn cspol1(&mut self) -> CSPOL1_W { + CSPOL1_W::new(self, 22) } #[doc = "Bit 23 - Chip select 2 polarity"] #[inline(always)] #[must_use] - pub fn cspol2(&mut self) -> CSPOL2_W { - CSPOL2_W::new(self) + pub fn cspol2(&mut self) -> CSPOL2_W { + CSPOL2_W::new(self, 23) } #[doc = "Bit 24 - Enable DMA in LoSSI mode"] #[inline(always)] #[must_use] - pub fn dma_len(&mut self) -> DMA_LEN_W { - DMA_LEN_W::new(self) + pub fn dma_len(&mut self) -> DMA_LEN_W { + DMA_LEN_W::new(self, 24) } #[doc = "Bit 25 - Enable long data word in LoSSI mode"] #[inline(always)] #[must_use] - pub fn len_long(&mut self) -> LEN_LONG_W { - LEN_LONG_W::new(self) + pub fn len_long(&mut self) -> LEN_LONG_W { + LEN_LONG_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi0/dc.rs b/crates/bcm2837-lpa/src/spi0/dc.rs index 23813da..a6b1267 100644 --- a/crates/bcm2837-lpa/src/spi0/dc.rs +++ b/crates/bcm2837-lpa/src/spi0/dc.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `TDREQ` reader - DMA Write request threshold"] pub type TDREQ_R = crate::FieldReader; #[doc = "Field `TDREQ` writer - DMA Write request threshold"] -pub type TDREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TDREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TPANIC` reader - DMA write panic threshold"] pub type TPANIC_R = crate::FieldReader; #[doc = "Field `TPANIC` writer - DMA write panic threshold"] -pub type TPANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type TPANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RDREQ` reader - DMA read request threshold"] pub type RDREQ_R = crate::FieldReader; #[doc = "Field `RDREQ` writer - DMA read request threshold"] -pub type RDREQ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RDREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `RPANIC` reader - DMA read panic threshold"] pub type RPANIC_R = crate::FieldReader; #[doc = "Field `RPANIC` writer - DMA read panic threshold"] -pub type RPANIC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type RPANIC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Write request threshold"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DMA Write request threshold"] #[inline(always)] #[must_use] - pub fn tdreq(&mut self) -> TDREQ_W { - TDREQ_W::new(self) + pub fn tdreq(&mut self) -> TDREQ_W { + TDREQ_W::new(self, 0) } #[doc = "Bits 8:15 - DMA write panic threshold"] #[inline(always)] #[must_use] - pub fn tpanic(&mut self) -> TPANIC_W { - TPANIC_W::new(self) + pub fn tpanic(&mut self) -> TPANIC_W { + TPANIC_W::new(self, 8) } #[doc = "Bits 16:23 - DMA read request threshold"] #[inline(always)] #[must_use] - pub fn rdreq(&mut self) -> RDREQ_W { - RDREQ_W::new(self) + pub fn rdreq(&mut self) -> RDREQ_W { + RDREQ_W::new(self, 16) } #[doc = "Bits 24:31 - DMA read panic threshold"] #[inline(always)] #[must_use] - pub fn rpanic(&mut self) -> RPANIC_W { - RPANIC_W::new(self) + pub fn rpanic(&mut self) -> RPANIC_W { + RPANIC_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi0/dlen.rs b/crates/bcm2837-lpa/src/spi0/dlen.rs index 5c7bb83..c86b386 100644 --- a/crates/bcm2837-lpa/src/spi0/dlen.rs +++ b/crates/bcm2837-lpa/src/spi0/dlen.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DLEN` reader - Data length"] pub type DLEN_R = crate::FieldReader; #[doc = "Field `DLEN` writer - Data length"] -pub type DLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Data length"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Data length"] #[inline(always)] #[must_use] - pub fn dlen(&mut self) -> DLEN_W { - DLEN_W::new(self) + pub fn dlen(&mut self) -> DLEN_W { + DLEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi0/fifo.rs b/crates/bcm2837-lpa/src/spi0/fifo.rs index 937c27b..e85c975 100644 --- a/crates/bcm2837-lpa/src/spi0/fifo.rs +++ b/crates/bcm2837-lpa/src/spi0/fifo.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi0/ltoh.rs b/crates/bcm2837-lpa/src/spi0/ltoh.rs index 15d66d8..b968dfa 100644 --- a/crates/bcm2837-lpa/src/spi0/ltoh.rs +++ b/crates/bcm2837-lpa/src/spi0/ltoh.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOH` reader - Output hold delay"] pub type TOH_R = crate::FieldReader; #[doc = "Field `TOH` writer - Output hold delay"] -pub type TOH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TOH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Output hold delay"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:3 - Output hold delay"] #[inline(always)] #[must_use] - pub fn toh(&mut self) -> TOH_W { - TOH_W::new(self) + pub fn toh(&mut self) -> TOH_W { + TOH_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi1.rs b/crates/bcm2837-lpa/src/spi1.rs index 0031aa9..2dab98b 100644 --- a/crates/bcm2837-lpa/src/spi1.rs +++ b/crates/bcm2837-lpa/src/spi1.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cntl0: CNTL0, + cntl1: CNTL1, + stat: STAT, + peek: PEEK, + io: [IO; 4], + txhold: [TXHOLD; 4], +} +impl RegisterBlock { #[doc = "0x00 - Control 0"] - pub cntl0: CNTL0, + #[inline(always)] + pub const fn cntl0(&self) -> &CNTL0 { + &self.cntl0 + } #[doc = "0x04 - Control 1"] - pub cntl1: CNTL1, + #[inline(always)] + pub const fn cntl1(&self) -> &CNTL1 { + &self.cntl1 + } #[doc = "0x08 - Status"] - pub stat: STAT, + #[inline(always)] + pub const fn stat(&self) -> &STAT { + &self.stat + } #[doc = "0x0c - Read the RXFIFO without removing an entry"] - pub peek: PEEK, + #[inline(always)] + pub const fn peek(&self) -> &PEEK { + &self.peek + } #[doc = "0x10..0x20 - Writing to the FIFO will deassert CS at the end of the access"] - pub io: [IO; 4], + #[inline(always)] + pub const fn io(&self, n: usize) -> &IO { + &self.io[n] + } #[doc = "0x20..0x30 - Writing to the FIFO will maintain CS at the end of the access"] - pub txhold: [TXHOLD; 4], + #[inline(always)] + pub const fn txhold(&self, n: usize) -> &TXHOLD { + &self.txhold[n] + } } #[doc = "CNTL0 (rw) register accessor: Control 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cntl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cntl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cntl0`] module"] diff --git a/crates/bcm2837-lpa/src/spi1/cntl0.rs b/crates/bcm2837-lpa/src/spi1/cntl0.rs index df7d957..451bebc 100644 --- a/crates/bcm2837-lpa/src/spi1/cntl0.rs +++ b/crates/bcm2837-lpa/src/spi1/cntl0.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `SHIFT_LENGTH` reader - Number of bits to shift"] pub type SHIFT_LENGTH_R = crate::FieldReader; #[doc = "Field `SHIFT_LENGTH` writer - Number of bits to shift"] -pub type SHIFT_LENGTH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type SHIFT_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MSB_FIRST` reader - Shift out the most significant bit (MSB) first"] pub type MSB_FIRST_R = crate::BitReader; #[doc = "Field `MSB_FIRST` writer - Shift out the most significant bit (MSB) first"] -pub type MSB_FIRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSB_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INVERT_CLK` reader - Idle clock high"] pub type INVERT_CLK_R = crate::BitReader; #[doc = "Field `INVERT_CLK` writer - Idle clock high"] -pub type INVERT_CLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INVERT_CLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT_RISING` reader - Data is clocked out on rising edge of CLK"] pub type OUT_RISING_R = crate::BitReader; #[doc = "Field `OUT_RISING` writer - Data is clocked out on rising edge of CLK"] -pub type OUT_RISING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OUT_RISING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR_FIFOS` reader - Clear FIFOs"] pub type CLEAR_FIFOS_R = crate::BitReader; #[doc = "Field `CLEAR_FIFOS` writer - Clear FIFOs"] -pub type CLEAR_FIFOS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CLEAR_FIFOS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IN_RISING` reader - Data is clocked in on rising edge of CLK"] pub type IN_RISING_R = crate::BitReader; #[doc = "Field `IN_RISING` writer - Data is clocked in on rising edge of CLK"] -pub type IN_RISING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IN_RISING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE` reader - Enable the interface"] pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable the interface"] -pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOUT_HOLD_TIME` reader - Controls extra DOUT hold time in system clock cycles"] pub type DOUT_HOLD_TIME_R = crate::FieldReader; #[doc = "Controls extra DOUT hold time in system clock cycles\n\nValue on reset: 0"] @@ -88,9 +88,8 @@ impl DOUT_HOLD_TIME_R { } } #[doc = "Field `DOUT_HOLD_TIME` writer - Controls extra DOUT hold time in system clock cycles"] -pub type DOUT_HOLD_TIME_W<'a, REG, const O: u8> = - crate::FieldWriterSafe<'a, REG, 2, O, DOUT_HOLD_TIME_A>; -impl<'a, REG, const O: u8> DOUT_HOLD_TIME_W<'a, REG, O> +pub type DOUT_HOLD_TIME_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DOUT_HOLD_TIME_A>; +impl<'a, REG> DOUT_HOLD_TIME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -119,23 +118,23 @@ where #[doc = "Field `VARIABLE_WIDTH` reader - Take shift length and data from FIFO"] pub type VARIABLE_WIDTH_R = crate::BitReader; #[doc = "Field `VARIABLE_WIDTH` writer - Take shift length and data from FIFO"] -pub type VARIABLE_WIDTH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VARIABLE_WIDTH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VARIABLE_CS` reader - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] pub type VARIABLE_CS_R = crate::BitReader; #[doc = "Field `VARIABLE_CS` writer - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] -pub type VARIABLE_CS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VARIABLE_CS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POST_INPUT` reader - Post input mode"] pub type POST_INPUT_R = crate::BitReader; #[doc = "Field `POST_INPUT` writer - Post input mode"] -pub type POST_INPUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POST_INPUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIP_SELECTS` reader - The CS pattern when active"] pub type CHIP_SELECTS_R = crate::FieldReader; #[doc = "Field `CHIP_SELECTS` writer - The CS pattern when active"] -pub type CHIP_SELECTS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CHIP_SELECTS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SPEED` reader - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] pub type SPEED_R = crate::FieldReader; #[doc = "Field `SPEED` writer - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] -pub type SPEED_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type SPEED_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:5 - Number of bits to shift"] #[inline(always)] @@ -236,87 +235,87 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - Number of bits to shift"] #[inline(always)] #[must_use] - pub fn shift_length(&mut self) -> SHIFT_LENGTH_W { - SHIFT_LENGTH_W::new(self) + pub fn shift_length(&mut self) -> SHIFT_LENGTH_W { + SHIFT_LENGTH_W::new(self, 0) } #[doc = "Bit 6 - Shift out the most significant bit (MSB) first"] #[inline(always)] #[must_use] - pub fn msb_first(&mut self) -> MSB_FIRST_W { - MSB_FIRST_W::new(self) + pub fn msb_first(&mut self) -> MSB_FIRST_W { + MSB_FIRST_W::new(self, 6) } #[doc = "Bit 7 - Idle clock high"] #[inline(always)] #[must_use] - pub fn invert_clk(&mut self) -> INVERT_CLK_W { - INVERT_CLK_W::new(self) + pub fn invert_clk(&mut self) -> INVERT_CLK_W { + INVERT_CLK_W::new(self, 7) } #[doc = "Bit 8 - Data is clocked out on rising edge of CLK"] #[inline(always)] #[must_use] - pub fn out_rising(&mut self) -> OUT_RISING_W { - OUT_RISING_W::new(self) + pub fn out_rising(&mut self) -> OUT_RISING_W { + OUT_RISING_W::new(self, 8) } #[doc = "Bit 9 - Clear FIFOs"] #[inline(always)] #[must_use] - pub fn clear_fifos(&mut self) -> CLEAR_FIFOS_W { - CLEAR_FIFOS_W::new(self) + pub fn clear_fifos(&mut self) -> CLEAR_FIFOS_W { + CLEAR_FIFOS_W::new(self, 9) } #[doc = "Bit 10 - Data is clocked in on rising edge of CLK"] #[inline(always)] #[must_use] - pub fn in_rising(&mut self) -> IN_RISING_W { - IN_RISING_W::new(self) + pub fn in_rising(&mut self) -> IN_RISING_W { + IN_RISING_W::new(self, 10) } #[doc = "Bit 11 - Enable the interface"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 11) } #[doc = "Bits 12:13 - Controls extra DOUT hold time in system clock cycles"] #[inline(always)] #[must_use] - pub fn dout_hold_time(&mut self) -> DOUT_HOLD_TIME_W { - DOUT_HOLD_TIME_W::new(self) + pub fn dout_hold_time(&mut self) -> DOUT_HOLD_TIME_W { + DOUT_HOLD_TIME_W::new(self, 12) } #[doc = "Bit 14 - Take shift length and data from FIFO"] #[inline(always)] #[must_use] - pub fn variable_width(&mut self) -> VARIABLE_WIDTH_W { - VARIABLE_WIDTH_W::new(self) + pub fn variable_width(&mut self) -> VARIABLE_WIDTH_W { + VARIABLE_WIDTH_W::new(self, 14) } #[doc = "Bit 15 - Take CS pattern and data from TX FIFO (along with VARIABLE_WIDTH)"] #[inline(always)] #[must_use] - pub fn variable_cs(&mut self) -> VARIABLE_CS_W { - VARIABLE_CS_W::new(self) + pub fn variable_cs(&mut self) -> VARIABLE_CS_W { + VARIABLE_CS_W::new(self, 15) } #[doc = "Bit 16 - Post input mode"] #[inline(always)] #[must_use] - pub fn post_input(&mut self) -> POST_INPUT_W { - POST_INPUT_W::new(self) + pub fn post_input(&mut self) -> POST_INPUT_W { + POST_INPUT_W::new(self, 16) } #[doc = "Bits 17:19 - The CS pattern when active"] #[inline(always)] #[must_use] - pub fn chip_selects(&mut self) -> CHIP_SELECTS_W { - CHIP_SELECTS_W::new(self) + pub fn chip_selects(&mut self) -> CHIP_SELECTS_W { + CHIP_SELECTS_W::new(self, 17) } #[doc = "Bits 20:31 - SPI clock speed. clk = sys / 2 * (SPEED + 1)"] #[inline(always)] #[must_use] - pub fn speed(&mut self) -> SPEED_W { - SPEED_W::new(self) + pub fn speed(&mut self) -> SPEED_W { + SPEED_W::new(self, 20) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi1/cntl1.rs b/crates/bcm2837-lpa/src/spi1/cntl1.rs index c1f0228..651e5d8 100644 --- a/crates/bcm2837-lpa/src/spi1/cntl1.rs +++ b/crates/bcm2837-lpa/src/spi1/cntl1.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `KEEP_INPUT` reader - Don't clear the RX shift register before a new transaction"] pub type KEEP_INPUT_R = crate::BitReader; #[doc = "Field `KEEP_INPUT` writer - Don't clear the RX shift register before a new transaction"] -pub type KEEP_INPUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type KEEP_INPUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSB_FIRST` reader - Shift the most significant bit first (MSB)"] pub type MSB_FIRST_R = crate::BitReader; #[doc = "Field `MSB_FIRST` writer - Shift the most significant bit first (MSB)"] -pub type MSB_FIRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MSB_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE_ENABLE` reader - Enable DONE interrupt"] pub type DONE_ENABLE_R = crate::BitReader; #[doc = "Field `DONE_ENABLE` writer - Enable DONE interrupt"] -pub type DONE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DONE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXE_ENABLE` reader - Enable TX empty interrupt"] pub type TXE_ENABLE_R = crate::BitReader; #[doc = "Field `TXE_ENABLE` writer - Enable TX empty interrupt"] -pub type TXE_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS_HIGH_TIME` reader - Additional SPI clock cycles where CS is high"] pub type CS_HIGH_TIME_R = crate::FieldReader; #[doc = "Field `CS_HIGH_TIME` writer - Additional SPI clock cycles where CS is high"] -pub type CS_HIGH_TIME_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type CS_HIGH_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Don't clear the RX shift register before a new transaction"] #[inline(always)] @@ -65,39 +65,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Don't clear the RX shift register before a new transaction"] #[inline(always)] #[must_use] - pub fn keep_input(&mut self) -> KEEP_INPUT_W { - KEEP_INPUT_W::new(self) + pub fn keep_input(&mut self) -> KEEP_INPUT_W { + KEEP_INPUT_W::new(self, 0) } #[doc = "Bit 1 - Shift the most significant bit first (MSB)"] #[inline(always)] #[must_use] - pub fn msb_first(&mut self) -> MSB_FIRST_W { - MSB_FIRST_W::new(self) + pub fn msb_first(&mut self) -> MSB_FIRST_W { + MSB_FIRST_W::new(self, 1) } #[doc = "Bit 6 - Enable DONE interrupt"] #[inline(always)] #[must_use] - pub fn done_enable(&mut self) -> DONE_ENABLE_W { - DONE_ENABLE_W::new(self) + pub fn done_enable(&mut self) -> DONE_ENABLE_W { + DONE_ENABLE_W::new(self, 6) } #[doc = "Bit 7 - Enable TX empty interrupt"] #[inline(always)] #[must_use] - pub fn txe_enable(&mut self) -> TXE_ENABLE_W { - TXE_ENABLE_W::new(self) + pub fn txe_enable(&mut self) -> TXE_ENABLE_W { + TXE_ENABLE_W::new(self, 7) } #[doc = "Bits 8:10 - Additional SPI clock cycles where CS is high"] #[inline(always)] #[must_use] - pub fn cs_high_time(&mut self) -> CS_HIGH_TIME_W { - CS_HIGH_TIME_W::new(self) + pub fn cs_high_time(&mut self) -> CS_HIGH_TIME_W { + CS_HIGH_TIME_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi1/io.rs b/crates/bcm2837-lpa/src/spi1/io.rs index 6564875..684bdc3 100644 --- a/crates/bcm2837-lpa/src/spi1/io.rs +++ b/crates/bcm2837-lpa/src/spi1/io.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO data access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO data access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi1/peek.rs b/crates/bcm2837-lpa/src/spi1/peek.rs index 7ceeb4a..5de5289 100644 --- a/crates/bcm2837-lpa/src/spi1/peek.rs +++ b/crates/bcm2837-lpa/src/spi1/peek.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Read the RXFIFO without removing an entry\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/spi1/stat.rs b/crates/bcm2837-lpa/src/spi1/stat.rs index 9fe3977..ae962a9 100644 --- a/crates/bcm2837-lpa/src/spi1/stat.rs +++ b/crates/bcm2837-lpa/src/spi1/stat.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `BIT_COUNT` reader - Number of bits left to be processed."] pub type BIT_COUNT_R = crate::FieldReader; #[doc = "Field `BIT_COUNT` writer - Number of bits left to be processed."] -pub type BIT_COUNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type BIT_COUNT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `BUSY` reader - Indicates a transfer is ongoing"] pub type BUSY_R = crate::BitReader; #[doc = "Field `BUSY` writer - Indicates a transfer is ongoing"] -pub type BUSY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUSY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_EMPTY` reader - RX FIFO is empty"] pub type RX_EMPTY_R = crate::BitReader; #[doc = "Field `RX_EMPTY` writer - RX FIFO is empty"] -pub type RX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_FULL` reader - RX FIFO is full"] pub type RX_FULL_R = crate::BitReader; #[doc = "Field `RX_FULL` writer - RX FIFO is full"] -pub type RX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - TX FIFO is empty"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - TX FIFO is empty"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_FULL` reader - TX FIFO is full"] pub type TX_FULL_R = crate::BitReader; #[doc = "Field `TX_FULL` writer - TX FIFO is full"] -pub type TX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_LEVEL` reader - Number of entries in RX FIFO"] pub type RX_LEVEL_R = crate::FieldReader; #[doc = "Field `RX_LEVEL` writer - Number of entries in RX FIFO"] -pub type RX_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type RX_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TX_LEVEL` reader - Number of entries in TX FIFO"] pub type TX_LEVEL_R = crate::FieldReader; #[doc = "Field `TX_LEVEL` writer - Number of entries in TX FIFO"] -pub type TX_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TX_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:5 - Number of bits left to be processed."] #[inline(always)] @@ -92,57 +92,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - Number of bits left to be processed."] #[inline(always)] #[must_use] - pub fn bit_count(&mut self) -> BIT_COUNT_W { - BIT_COUNT_W::new(self) + pub fn bit_count(&mut self) -> BIT_COUNT_W { + BIT_COUNT_W::new(self, 0) } #[doc = "Bit 6 - Indicates a transfer is ongoing"] #[inline(always)] #[must_use] - pub fn busy(&mut self) -> BUSY_W { - BUSY_W::new(self) + pub fn busy(&mut self) -> BUSY_W { + BUSY_W::new(self, 6) } #[doc = "Bit 7 - RX FIFO is empty"] #[inline(always)] #[must_use] - pub fn rx_empty(&mut self) -> RX_EMPTY_W { - RX_EMPTY_W::new(self) + pub fn rx_empty(&mut self) -> RX_EMPTY_W { + RX_EMPTY_W::new(self, 7) } #[doc = "Bit 8 - RX FIFO is full"] #[inline(always)] #[must_use] - pub fn rx_full(&mut self) -> RX_FULL_W { - RX_FULL_W::new(self) + pub fn rx_full(&mut self) -> RX_FULL_W { + RX_FULL_W::new(self, 8) } #[doc = "Bit 9 - TX FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 9) } #[doc = "Bit 10 - TX FIFO is full"] #[inline(always)] #[must_use] - pub fn tx_full(&mut self) -> TX_FULL_W { - TX_FULL_W::new(self) + pub fn tx_full(&mut self) -> TX_FULL_W { + TX_FULL_W::new(self, 10) } #[doc = "Bits 16:19 - Number of entries in RX FIFO"] #[inline(always)] #[must_use] - pub fn rx_level(&mut self) -> RX_LEVEL_W { - RX_LEVEL_W::new(self) + pub fn rx_level(&mut self) -> RX_LEVEL_W { + RX_LEVEL_W::new(self, 16) } #[doc = "Bits 24:27 - Number of entries in TX FIFO"] #[inline(always)] #[must_use] - pub fn tx_level(&mut self) -> TX_LEVEL_W { - TX_LEVEL_W::new(self) + pub fn tx_level(&mut self) -> TX_LEVEL_W { + TX_LEVEL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/spi1/txhold.rs b/crates/bcm2837-lpa/src/spi1/txhold.rs index 8c29938..7150eb6 100644 --- a/crates/bcm2837-lpa/src/spi1/txhold.rs +++ b/crates/bcm2837-lpa/src/spi1/txhold.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO data access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO data access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - FIFO data access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/systmr.rs b/crates/bcm2837-lpa/src/systmr.rs index 31647d3..eb65cff 100644 --- a/crates/bcm2837-lpa/src/systmr.rs +++ b/crates/bcm2837-lpa/src/systmr.rs @@ -2,20 +2,50 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + cs: CS, + clo: CLO, + chi: CHI, + c0: C0, + c1: C1, + c2: C2, + c3: C3, +} +impl RegisterBlock { #[doc = "0x00 - Control / Status"] - pub cs: CS, + #[inline(always)] + pub const fn cs(&self) -> &CS { + &self.cs + } #[doc = "0x04 - Lower 32 bits for the free running counter"] - pub clo: CLO, + #[inline(always)] + pub const fn clo(&self) -> &CLO { + &self.clo + } #[doc = "0x08 - Higher 32 bits for the free running counter"] - pub chi: CHI, + #[inline(always)] + pub const fn chi(&self) -> &CHI { + &self.chi + } #[doc = "0x0c - Compare channel 0"] - pub c0: C0, + #[inline(always)] + pub const fn c0(&self) -> &C0 { + &self.c0 + } #[doc = "0x10 - Compare channel 1"] - pub c1: C1, + #[inline(always)] + pub const fn c1(&self) -> &C1 { + &self.c1 + } #[doc = "0x14 - Compare channel 2"] - pub c2: C2, + #[inline(always)] + pub const fn c2(&self) -> &C2 { + &self.c2 + } #[doc = "0x18 - Compare channel 3"] - pub c3: C3, + #[inline(always)] + pub const fn c3(&self) -> &C3 { + &self.c3 + } } #[doc = "CS (rw) register accessor: Control / Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`] module"] diff --git a/crates/bcm2837-lpa/src/systmr/c0.rs b/crates/bcm2837-lpa/src/systmr/c0.rs index 18be8a7..9ab12b6 100644 --- a/crates/bcm2837-lpa/src/systmr/c0.rs +++ b/crates/bcm2837-lpa/src/systmr/c0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/systmr/c1.rs b/crates/bcm2837-lpa/src/systmr/c1.rs index bcf565c..166b9b1 100644 --- a/crates/bcm2837-lpa/src/systmr/c1.rs +++ b/crates/bcm2837-lpa/src/systmr/c1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/systmr/c2.rs b/crates/bcm2837-lpa/src/systmr/c2.rs index e91e152..5e445b8 100644 --- a/crates/bcm2837-lpa/src/systmr/c2.rs +++ b/crates/bcm2837-lpa/src/systmr/c2.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/systmr/c3.rs b/crates/bcm2837-lpa/src/systmr/c3.rs index a33918f..92faaa4 100644 --- a/crates/bcm2837-lpa/src/systmr/c3.rs +++ b/crates/bcm2837-lpa/src/systmr/c3.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/systmr/chi.rs b/crates/bcm2837-lpa/src/systmr/chi.rs index 7313db2..54d6e6b 100644 --- a/crates/bcm2837-lpa/src/systmr/chi.rs +++ b/crates/bcm2837-lpa/src/systmr/chi.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Higher 32 bits for the free running counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/systmr/clo.rs b/crates/bcm2837-lpa/src/systmr/clo.rs index 43986b1..145765a 100644 --- a/crates/bcm2837-lpa/src/systmr/clo.rs +++ b/crates/bcm2837-lpa/src/systmr/clo.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Lower 32 bits for the free running counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/systmr/cs.rs b/crates/bcm2837-lpa/src/systmr/cs.rs index 3e1660d..1e3978b 100644 --- a/crates/bcm2837-lpa/src/systmr/cs.rs +++ b/crates/bcm2837-lpa/src/systmr/cs.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `M0` reader - System timer match 0"] pub type M0_R = crate::BitReader; #[doc = "Field `M0` writer - System timer match 0"] -pub type M0_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M0_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M1` reader - System timer match 1"] pub type M1_R = crate::BitReader; #[doc = "Field `M1` writer - System timer match 1"] -pub type M1_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M1_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M2` reader - System timer match 2"] pub type M2_R = crate::BitReader; #[doc = "Field `M2` writer - System timer match 2"] -pub type M2_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M2_W<'a, REG> = crate::BitWriter1C<'a, REG>; #[doc = "Field `M3` reader - System timer match 3"] pub type M3_R = crate::BitReader; #[doc = "Field `M3` writer - System timer match 3"] -pub type M3_W<'a, REG, const O: u8> = crate::BitWriter1C<'a, REG, O>; +pub type M3_W<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bit 0 - System timer match 0"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - System timer match 0"] #[inline(always)] #[must_use] - pub fn m0(&mut self) -> M0_W { - M0_W::new(self) + pub fn m0(&mut self) -> M0_W { + M0_W::new(self, 0) } #[doc = "Bit 1 - System timer match 1"] #[inline(always)] #[must_use] - pub fn m1(&mut self) -> M1_W { - M1_W::new(self) + pub fn m1(&mut self) -> M1_W { + M1_W::new(self, 1) } #[doc = "Bit 2 - System timer match 2"] #[inline(always)] #[must_use] - pub fn m2(&mut self) -> M2_W { - M2_W::new(self) + pub fn m2(&mut self) -> M2_W { + M2_W::new(self, 2) } #[doc = "Bit 3 - System timer match 3"] #[inline(always)] #[must_use] - pub fn m3(&mut self) -> M3_W { - M3_W::new(self) + pub fn m3(&mut self) -> M3_W { + M3_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0.rs b/crates/bcm2837-lpa/src/uart0.rs index a12a501..c46032b 100644 --- a/crates/bcm2837-lpa/src/uart0.rs +++ b/crates/bcm2837-lpa/src/uart0.rs @@ -2,44 +2,92 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - Data Register"] - pub dr: DR, + dr: DR, _reserved_1_ecr: [u8; 0x04], _reserved2: [u8; 0x10], - #[doc = "0x18 - Flag Register"] - pub fr: FR, + fr: FR, _reserved3: [u8; 0x08], + ibrd: IBRD, + fbrd: FBRD, + lcr_h: LCR_H, + cr: CR, + ifls: IFLS, + imsc: IMSC, + ris: RIS, + mis: MIS, + icr: ICR, + dmacr: DMACR, +} +impl RegisterBlock { + #[doc = "0x00 - Data Register"] + #[inline(always)] + pub const fn dr(&self) -> &DR { + &self.dr + } + #[doc = "0x04 - Error Clear Register"] + #[inline(always)] + pub const fn ecr(&self) -> &ECR { + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x04 - Receive Status Register"] + #[inline(always)] + pub const fn rsr(&self) -> &RSR { + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x18 - Flag Register"] + #[inline(always)] + pub const fn fr(&self) -> &FR { + &self.fr + } #[doc = "0x24 - Integer Baud Rate Register"] - pub ibrd: IBRD, + #[inline(always)] + pub const fn ibrd(&self) -> &IBRD { + &self.ibrd + } #[doc = "0x28 - Fractional Baud Rate Register"] - pub fbrd: FBRD, + #[inline(always)] + pub const fn fbrd(&self) -> &FBRD { + &self.fbrd + } #[doc = "0x2c - Line Control Register"] - pub lcr_h: LCR_H, + #[inline(always)] + pub const fn lcr_h(&self) -> &LCR_H { + &self.lcr_h + } #[doc = "0x30 - Control Register"] - pub cr: CR, + #[inline(always)] + pub const fn cr(&self) -> &CR { + &self.cr + } #[doc = "0x34 - Interrupt FIFO Level Select Register"] - pub ifls: IFLS, + #[inline(always)] + pub const fn ifls(&self) -> &IFLS { + &self.ifls + } #[doc = "0x38 - Interrupt Mask set_Clear Register"] - pub imsc: IMSC, + #[inline(always)] + pub const fn imsc(&self) -> &IMSC { + &self.imsc + } #[doc = "0x3c - Raw Interrupt Status Register"] - pub ris: RIS, + #[inline(always)] + pub const fn ris(&self) -> &RIS { + &self.ris + } #[doc = "0x40 - Masked Interrupt Status Register"] - pub mis: MIS, + #[inline(always)] + pub const fn mis(&self) -> &MIS { + &self.mis + } #[doc = "0x44 - Interrupt Clear Register"] - pub icr: ICR, - #[doc = "0x48 - DMA Control Register"] - pub dmacr: DMACR, -} -impl RegisterBlock { - #[doc = "0x04 - Error Clear Register"] #[inline(always)] - pub const fn ecr(&self) -> &ECR { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + pub const fn icr(&self) -> &ICR { + &self.icr } - #[doc = "0x04 - Receive Status Register"] + #[doc = "0x48 - DMA Control Register"] #[inline(always)] - pub const fn rsr(&self) -> &RSR { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + pub const fn dmacr(&self) -> &DMACR { + &self.dmacr } } #[doc = "DR (rw) register accessor: Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dr`] diff --git a/crates/bcm2837-lpa/src/uart0/cr.rs b/crates/bcm2837-lpa/src/uart0/cr.rs index bfbc283..bf3ad6e 100644 --- a/crates/bcm2837-lpa/src/uart0/cr.rs +++ b/crates/bcm2837-lpa/src/uart0/cr.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `UARTEN` reader - UARTEN"] pub type UARTEN_R = crate::BitReader; #[doc = "Field `UARTEN` writer - UARTEN"] -pub type UARTEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type UARTEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIREN` reader - SIREN"] pub type SIREN_R = crate::BitReader; #[doc = "Field `SIREN` writer - SIREN"] -pub type SIREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SIREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIRLP` reader - SIRLP"] pub type SIRLP_R = crate::BitReader; #[doc = "Field `SIRLP` writer - SIRLP"] -pub type SIRLP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SIRLP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXE` reader - TXE"] pub type TXE_R = crate::BitReader; #[doc = "Field `TXE` writer - TXE"] -pub type TXE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXE` reader - RXE"] pub type RXE_R = crate::BitReader; #[doc = "Field `RXE` writer - RXE"] -pub type RXE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTR` reader - DTR"] pub type DTR_R = crate::BitReader; #[doc = "Field `DTR` writer - DTR"] -pub type DTR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS` reader - RTS"] pub type RTS_R = crate::BitReader; #[doc = "Field `RTS` writer - RTS"] -pub type RTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSEN` reader - RTSEN"] pub type RTSEN_R = crate::BitReader; #[doc = "Field `RTSEN` writer - RTSEN"] -pub type RTSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTSEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSEN` reader - CTSEN"] pub type CTSEN_R = crate::BitReader; #[doc = "Field `CTSEN` writer - CTSEN"] -pub type CTSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - UARTEN"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - UARTEN"] #[inline(always)] #[must_use] - pub fn uarten(&mut self) -> UARTEN_W { - UARTEN_W::new(self) + pub fn uarten(&mut self) -> UARTEN_W { + UARTEN_W::new(self, 0) } #[doc = "Bit 1 - SIREN"] #[inline(always)] #[must_use] - pub fn siren(&mut self) -> SIREN_W { - SIREN_W::new(self) + pub fn siren(&mut self) -> SIREN_W { + SIREN_W::new(self, 1) } #[doc = "Bit 2 - SIRLP"] #[inline(always)] #[must_use] - pub fn sirlp(&mut self) -> SIRLP_W { - SIRLP_W::new(self) + pub fn sirlp(&mut self) -> SIRLP_W { + SIRLP_W::new(self, 2) } #[doc = "Bit 8 - TXE"] #[inline(always)] #[must_use] - pub fn txe(&mut self) -> TXE_W { - TXE_W::new(self) + pub fn txe(&mut self) -> TXE_W { + TXE_W::new(self, 8) } #[doc = "Bit 9 - RXE"] #[inline(always)] #[must_use] - pub fn rxe(&mut self) -> RXE_W { - RXE_W::new(self) + pub fn rxe(&mut self) -> RXE_W { + RXE_W::new(self, 9) } #[doc = "Bit 10 - DTR"] #[inline(always)] #[must_use] - pub fn dtr(&mut self) -> DTR_W { - DTR_W::new(self) + pub fn dtr(&mut self) -> DTR_W { + DTR_W::new(self, 10) } #[doc = "Bit 11 - RTS"] #[inline(always)] #[must_use] - pub fn rts(&mut self) -> RTS_W { - RTS_W::new(self) + pub fn rts(&mut self) -> RTS_W { + RTS_W::new(self, 11) } #[doc = "Bit 14 - RTSEN"] #[inline(always)] #[must_use] - pub fn rtsen(&mut self) -> RTSEN_W { - RTSEN_W::new(self) + pub fn rtsen(&mut self) -> RTSEN_W { + RTSEN_W::new(self, 14) } #[doc = "Bit 15 - CTSEN"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CTSEN_W { + CTSEN_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/dmacr.rs b/crates/bcm2837-lpa/src/uart0/dmacr.rs index 40efa50..dcdcd2e 100644 --- a/crates/bcm2837-lpa/src/uart0/dmacr.rs +++ b/crates/bcm2837-lpa/src/uart0/dmacr.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `RXDMAE` reader - RXDMAE"] pub type RXDMAE_R = crate::BitReader; #[doc = "Field `RXDMAE` writer - RXDMAE"] -pub type RXDMAE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDMAE` reader - TXDMAE"] pub type TXDMAE_R = crate::BitReader; #[doc = "Field `TXDMAE` writer - TXDMAE"] -pub type TXDMAE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAONERR` reader - DMAONERR"] pub type DMAONERR_R = crate::BitReader; #[doc = "Field `DMAONERR` writer - DMAONERR"] -pub type DMAONERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAONERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RXDMAE"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - RXDMAE"] #[inline(always)] #[must_use] - pub fn rxdmae(&mut self) -> RXDMAE_W { - RXDMAE_W::new(self) + pub fn rxdmae(&mut self) -> RXDMAE_W { + RXDMAE_W::new(self, 0) } #[doc = "Bit 1 - TXDMAE"] #[inline(always)] #[must_use] - pub fn txdmae(&mut self) -> TXDMAE_W { - TXDMAE_W::new(self) + pub fn txdmae(&mut self) -> TXDMAE_W { + TXDMAE_W::new(self, 1) } #[doc = "Bit 2 - DMAONERR"] #[inline(always)] #[must_use] - pub fn dmaonerr(&mut self) -> DMAONERR_W { - DMAONERR_W::new(self) + pub fn dmaonerr(&mut self) -> DMAONERR_W { + DMAONERR_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/dr.rs b/crates/bcm2837-lpa/src/uart0/dr.rs index 3c7f81e..6ac1b23 100644 --- a/crates/bcm2837-lpa/src/uart0/dr.rs +++ b/crates/bcm2837-lpa/src/uart0/dr.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - DATA"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - DATA"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `FE` reader - FE"] pub type FE_R = crate::BitReader; #[doc = "Field `FE` writer - FE"] -pub type FE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PE` reader - PE"] pub type PE_R = crate::BitReader; #[doc = "Field `PE` writer - PE"] -pub type PE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` reader - BE"] pub type BE_R = crate::BitReader; #[doc = "Field `BE` writer - BE"] -pub type BE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OE` reader - OE"] pub type OE_R = crate::BitReader; #[doc = "Field `OE` writer - OE"] -pub type OE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - DATA"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - DATA"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = "Bit 8 - FE"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 8) } #[doc = "Bit 9 - PE"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 9) } #[doc = "Bit 10 - BE"] #[inline(always)] #[must_use] - pub fn be(&mut self) -> BE_W { - BE_W::new(self) + pub fn be(&mut self) -> BE_W { + BE_W::new(self, 10) } #[doc = "Bit 11 - OE"] #[inline(always)] #[must_use] - pub fn oe(&mut self) -> OE_W { - OE_W::new(self) + pub fn oe(&mut self) -> OE_W { + OE_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/ecr.rs b/crates/bcm2837-lpa/src/uart0/ecr.rs index 97efb0b..a17d921 100644 --- a/crates/bcm2837-lpa/src/uart0/ecr.rs +++ b/crates/bcm2837-lpa/src/uart0/ecr.rs @@ -1,13 +1,13 @@ #[doc = "Register `ECR` writer"] pub type W = crate::W; #[doc = "Field `FE` writer - FE"] -pub type FE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PE` writer - PE"] -pub type PE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` writer - BE"] -pub type BE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OE` writer - OE"] -pub type OE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OE_W<'a, REG> = crate::BitWriter<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -17,26 +17,26 @@ impl W { #[doc = "Bit 0 - FE"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 0) } #[doc = "Bit 1 - PE"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 1) } #[doc = "Bit 2 - BE"] #[inline(always)] #[must_use] - pub fn be(&mut self) -> BE_W { - BE_W::new(self) + pub fn be(&mut self) -> BE_W { + BE_W::new(self, 2) } #[doc = "Bit 3 - OE"] #[inline(always)] #[must_use] - pub fn oe(&mut self) -> OE_W { - OE_W::new(self) + pub fn oe(&mut self) -> OE_W { + OE_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/fbrd.rs b/crates/bcm2837-lpa/src/uart0/fbrd.rs index e0fe228..12a11b7 100644 --- a/crates/bcm2837-lpa/src/uart0/fbrd.rs +++ b/crates/bcm2837-lpa/src/uart0/fbrd.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BAUDDIVFRAC` reader - BAUDDIVFRAC"] pub type BAUDDIVFRAC_R = crate::FieldReader; #[doc = "Field `BAUDDIVFRAC` writer - BAUDDIVFRAC"] -pub type BAUDDIVFRAC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 6, O>; +pub type BAUDDIVFRAC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - BAUDDIVFRAC"] #[inline(always)] @@ -25,15 +25,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:5 - BAUDDIVFRAC"] #[inline(always)] #[must_use] - pub fn bauddivfrac(&mut self) -> BAUDDIVFRAC_W { - BAUDDIVFRAC_W::new(self) + pub fn bauddivfrac(&mut self) -> BAUDDIVFRAC_W { + BAUDDIVFRAC_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/fr.rs b/crates/bcm2837-lpa/src/uart0/fr.rs index d70703c..7b350ba 100644 --- a/crates/bcm2837-lpa/src/uart0/fr.rs +++ b/crates/bcm2837-lpa/src/uart0/fr.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `CTS` reader - CTS"] pub type CTS_R = crate::BitReader; #[doc = "Field `CTS` writer - CTS"] -pub type CTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSR` reader - DSR"] pub type DSR_R = crate::BitReader; #[doc = "Field `DSR` writer - DSR"] -pub type DSR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCD` reader - DCD"] pub type DCD_R = crate::BitReader; #[doc = "Field `DCD` writer - DCD"] -pub type DCD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSY` reader - BUSY"] pub type BUSY_R = crate::BitReader; #[doc = "Field `BUSY` writer - BUSY"] -pub type BUSY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BUSY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFE` reader - RXFE"] pub type RXFE_R = crate::BitReader; #[doc = "Field `RXFE` writer - RXFE"] -pub type RXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFF` reader - TXFF"] pub type TXFF_R = crate::BitReader; #[doc = "Field `TXFF` writer - TXFF"] -pub type TXFF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFF` reader - RXFF"] pub type RXFF_R = crate::BitReader; #[doc = "Field `RXFF` writer - RXFF"] -pub type RXFF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFE` reader - TXFE"] pub type TXFE_R = crate::BitReader; #[doc = "Field `TXFE` writer - TXFE"] -pub type TXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RI` reader - RI"] pub type RI_R = crate::BitReader; #[doc = "Field `RI` writer - RI"] -pub type RI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RI_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CTS"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - CTS"] #[inline(always)] #[must_use] - pub fn cts(&mut self) -> CTS_W { - CTS_W::new(self) + pub fn cts(&mut self) -> CTS_W { + CTS_W::new(self, 0) } #[doc = "Bit 1 - DSR"] #[inline(always)] #[must_use] - pub fn dsr(&mut self) -> DSR_W { - DSR_W::new(self) + pub fn dsr(&mut self) -> DSR_W { + DSR_W::new(self, 1) } #[doc = "Bit 2 - DCD"] #[inline(always)] #[must_use] - pub fn dcd(&mut self) -> DCD_W { - DCD_W::new(self) + pub fn dcd(&mut self) -> DCD_W { + DCD_W::new(self, 2) } #[doc = "Bit 3 - BUSY"] #[inline(always)] #[must_use] - pub fn busy(&mut self) -> BUSY_W { - BUSY_W::new(self) + pub fn busy(&mut self) -> BUSY_W { + BUSY_W::new(self, 3) } #[doc = "Bit 4 - RXFE"] #[inline(always)] #[must_use] - pub fn rxfe(&mut self) -> RXFE_W { - RXFE_W::new(self) + pub fn rxfe(&mut self) -> RXFE_W { + RXFE_W::new(self, 4) } #[doc = "Bit 5 - TXFF"] #[inline(always)] #[must_use] - pub fn txff(&mut self) -> TXFF_W { - TXFF_W::new(self) + pub fn txff(&mut self) -> TXFF_W { + TXFF_W::new(self, 5) } #[doc = "Bit 6 - RXFF"] #[inline(always)] #[must_use] - pub fn rxff(&mut self) -> RXFF_W { - RXFF_W::new(self) + pub fn rxff(&mut self) -> RXFF_W { + RXFF_W::new(self, 6) } #[doc = "Bit 7 - TXFE"] #[inline(always)] #[must_use] - pub fn txfe(&mut self) -> TXFE_W { - TXFE_W::new(self) + pub fn txfe(&mut self) -> TXFE_W { + TXFE_W::new(self, 7) } #[doc = "Bit 8 - RI"] #[inline(always)] #[must_use] - pub fn ri(&mut self) -> RI_W { - RI_W::new(self) + pub fn ri(&mut self) -> RI_W { + RI_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/ibrd.rs b/crates/bcm2837-lpa/src/uart0/ibrd.rs index 07441c8..193f8ca 100644 --- a/crates/bcm2837-lpa/src/uart0/ibrd.rs +++ b/crates/bcm2837-lpa/src/uart0/ibrd.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `BAUDDIVINT` reader - BAUDDIVINT"] pub type BAUDDIVINT_R = crate::FieldReader; #[doc = "Field `BAUDDIVINT` writer - BAUDDIVINT"] -pub type BAUDDIVINT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type BAUDDIVINT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - BAUDDIVINT"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - BAUDDIVINT"] #[inline(always)] #[must_use] - pub fn bauddivint(&mut self) -> BAUDDIVINT_W { - BAUDDIVINT_W::new(self) + pub fn bauddivint(&mut self) -> BAUDDIVINT_W { + BAUDDIVINT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/icr.rs b/crates/bcm2837-lpa/src/uart0/icr.rs index e69a3e9..0b0080c 100644 --- a/crates/bcm2837-lpa/src/uart0/icr.rs +++ b/crates/bcm2837-lpa/src/uart0/icr.rs @@ -1,27 +1,27 @@ #[doc = "Register `ICR` writer"] pub type W = crate::W; #[doc = "Field `RIMIC` writer - RIMIC"] -pub type RIMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RIMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSMIC` writer - CTSMIC"] -pub type CTSMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDMIC` writer - DCDMIC"] -pub type DCDMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCDMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSRMIC` writer - DSRMIC"] -pub type DSRMIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSRMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIC` writer - RXIC"] -pub type RXIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIC` writer - TXIC"] -pub type TXIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIC` writer - RTIC"] -pub type RTIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEIC` writer - FEIC"] -pub type FEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEIC` writer - PEIC"] -pub type PEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEIC` writer - BEIC"] -pub type BEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BEIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEIC` writer - OEIC"] -pub type OEIC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEIC_W<'a, REG> = crate::BitWriter<'a, REG>; impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -31,68 +31,68 @@ impl W { #[doc = "Bit 0 - RIMIC"] #[inline(always)] #[must_use] - pub fn rimic(&mut self) -> RIMIC_W { - RIMIC_W::new(self) + pub fn rimic(&mut self) -> RIMIC_W { + RIMIC_W::new(self, 0) } #[doc = "Bit 1 - CTSMIC"] #[inline(always)] #[must_use] - pub fn ctsmic(&mut self) -> CTSMIC_W { - CTSMIC_W::new(self) + pub fn ctsmic(&mut self) -> CTSMIC_W { + CTSMIC_W::new(self, 1) } #[doc = "Bit 2 - DCDMIC"] #[inline(always)] #[must_use] - pub fn dcdmic(&mut self) -> DCDMIC_W { - DCDMIC_W::new(self) + pub fn dcdmic(&mut self) -> DCDMIC_W { + DCDMIC_W::new(self, 2) } #[doc = "Bit 3 - DSRMIC"] #[inline(always)] #[must_use] - pub fn dsrmic(&mut self) -> DSRMIC_W { - DSRMIC_W::new(self) + pub fn dsrmic(&mut self) -> DSRMIC_W { + DSRMIC_W::new(self, 3) } #[doc = "Bit 4 - RXIC"] #[inline(always)] #[must_use] - pub fn rxic(&mut self) -> RXIC_W { - RXIC_W::new(self) + pub fn rxic(&mut self) -> RXIC_W { + RXIC_W::new(self, 4) } #[doc = "Bit 5 - TXIC"] #[inline(always)] #[must_use] - pub fn txic(&mut self) -> TXIC_W { - TXIC_W::new(self) + pub fn txic(&mut self) -> TXIC_W { + TXIC_W::new(self, 5) } #[doc = "Bit 6 - RTIC"] #[inline(always)] #[must_use] - pub fn rtic(&mut self) -> RTIC_W { - RTIC_W::new(self) + pub fn rtic(&mut self) -> RTIC_W { + RTIC_W::new(self, 6) } #[doc = "Bit 7 - FEIC"] #[inline(always)] #[must_use] - pub fn feic(&mut self) -> FEIC_W { - FEIC_W::new(self) + pub fn feic(&mut self) -> FEIC_W { + FEIC_W::new(self, 7) } #[doc = "Bit 8 - PEIC"] #[inline(always)] #[must_use] - pub fn peic(&mut self) -> PEIC_W { - PEIC_W::new(self) + pub fn peic(&mut self) -> PEIC_W { + PEIC_W::new(self, 8) } #[doc = "Bit 9 - BEIC"] #[inline(always)] #[must_use] - pub fn beic(&mut self) -> BEIC_W { - BEIC_W::new(self) + pub fn beic(&mut self) -> BEIC_W { + BEIC_W::new(self, 9) } #[doc = "Bit 10 - OEIC"] #[inline(always)] #[must_use] - pub fn oeic(&mut self) -> OEIC_W { - OEIC_W::new(self) + pub fn oeic(&mut self) -> OEIC_W { + OEIC_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/ifls.rs b/crates/bcm2837-lpa/src/uart0/ifls.rs index 5119af0..3d8257b 100644 --- a/crates/bcm2837-lpa/src/uart0/ifls.rs +++ b/crates/bcm2837-lpa/src/uart0/ifls.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `TXIFLSEL` reader - TXIFLSEL"] pub type TXIFLSEL_R = crate::FieldReader; #[doc = "Field `TXIFLSEL` writer - TXIFLSEL"] -pub type TXIFLSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TXIFLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `RXIFLSEL` reader - RXIFLSEL"] pub type RXIFLSEL_R = crate::FieldReader; #[doc = "Field `RXIFLSEL` writer - RXIFLSEL"] -pub type RXIFLSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type RXIFLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - TXIFLSEL"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - TXIFLSEL"] #[inline(always)] #[must_use] - pub fn txiflsel(&mut self) -> TXIFLSEL_W { - TXIFLSEL_W::new(self) + pub fn txiflsel(&mut self) -> TXIFLSEL_W { + TXIFLSEL_W::new(self, 0) } #[doc = "Bits 3:5 - RXIFLSEL"] #[inline(always)] #[must_use] - pub fn rxiflsel(&mut self) -> RXIFLSEL_W { - RXIFLSEL_W::new(self) + pub fn rxiflsel(&mut self) -> RXIFLSEL_W { + RXIFLSEL_W::new(self, 3) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/imsc.rs b/crates/bcm2837-lpa/src/uart0/imsc.rs index 80b23a4..62b5776 100644 --- a/crates/bcm2837-lpa/src/uart0/imsc.rs +++ b/crates/bcm2837-lpa/src/uart0/imsc.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `RIMIM` reader - RIMIM"] pub type RIMIM_R = crate::BitReader; #[doc = "Field `RIMIM` writer - RIMIM"] -pub type RIMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RIMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTSMIM` reader - CTSMIM"] pub type CTSMIM_R = crate::BitReader; #[doc = "Field `CTSMIM` writer - CTSMIM"] -pub type CTSMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTSMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDMIM` reader - DCDMIM"] pub type DCDMIM_R = crate::BitReader; #[doc = "Field `DCDMIM` writer - DCDMIM"] -pub type DCDMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DCDMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSRMIM` reader - DSRMIM"] pub type DSRMIM_R = crate::BitReader; #[doc = "Field `DSRMIM` writer - DSRMIM"] -pub type DSRMIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DSRMIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIM` reader - RXIM"] pub type RXIM_R = crate::BitReader; #[doc = "Field `RXIM` writer - RXIM"] -pub type RXIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIM` reader - TXIM"] pub type TXIM_R = crate::BitReader; #[doc = "Field `TXIM` writer - TXIM"] -pub type TXIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIM` reader - RTIM"] pub type RTIM_R = crate::BitReader; #[doc = "Field `RTIM` writer - RTIM"] -pub type RTIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEIM` reader - FEIM"] pub type FEIM_R = crate::BitReader; #[doc = "Field `FEIM` writer - FEIM"] -pub type FEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEIM` reader - PEIM"] pub type PEIM_R = crate::BitReader; #[doc = "Field `PEIM` writer - PEIM"] -pub type PEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEIM` reader - BEIM"] pub type BEIM_R = crate::BitReader; #[doc = "Field `BEIM` writer - BEIM"] -pub type BEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BEIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEIM` reader - OEIM"] pub type OEIM_R = crate::BitReader; #[doc = "Field `OEIM` writer - OEIM"] -pub type OEIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RIMIM"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - RIMIM"] #[inline(always)] #[must_use] - pub fn rimim(&mut self) -> RIMIM_W { - RIMIM_W::new(self) + pub fn rimim(&mut self) -> RIMIM_W { + RIMIM_W::new(self, 0) } #[doc = "Bit 1 - CTSMIM"] #[inline(always)] #[must_use] - pub fn ctsmim(&mut self) -> CTSMIM_W { - CTSMIM_W::new(self) + pub fn ctsmim(&mut self) -> CTSMIM_W { + CTSMIM_W::new(self, 1) } #[doc = "Bit 2 - DCDMIM"] #[inline(always)] #[must_use] - pub fn dcdmim(&mut self) -> DCDMIM_W { - DCDMIM_W::new(self) + pub fn dcdmim(&mut self) -> DCDMIM_W { + DCDMIM_W::new(self, 2) } #[doc = "Bit 3 - DSRMIM"] #[inline(always)] #[must_use] - pub fn dsrmim(&mut self) -> DSRMIM_W { - DSRMIM_W::new(self) + pub fn dsrmim(&mut self) -> DSRMIM_W { + DSRMIM_W::new(self, 3) } #[doc = "Bit 4 - RXIM"] #[inline(always)] #[must_use] - pub fn rxim(&mut self) -> RXIM_W { - RXIM_W::new(self) + pub fn rxim(&mut self) -> RXIM_W { + RXIM_W::new(self, 4) } #[doc = "Bit 5 - TXIM"] #[inline(always)] #[must_use] - pub fn txim(&mut self) -> TXIM_W { - TXIM_W::new(self) + pub fn txim(&mut self) -> TXIM_W { + TXIM_W::new(self, 5) } #[doc = "Bit 6 - RTIM"] #[inline(always)] #[must_use] - pub fn rtim(&mut self) -> RTIM_W { - RTIM_W::new(self) + pub fn rtim(&mut self) -> RTIM_W { + RTIM_W::new(self, 6) } #[doc = "Bit 7 - FEIM"] #[inline(always)] #[must_use] - pub fn feim(&mut self) -> FEIM_W { - FEIM_W::new(self) + pub fn feim(&mut self) -> FEIM_W { + FEIM_W::new(self, 7) } #[doc = "Bit 8 - PEIM"] #[inline(always)] #[must_use] - pub fn peim(&mut self) -> PEIM_W { - PEIM_W::new(self) + pub fn peim(&mut self) -> PEIM_W { + PEIM_W::new(self, 8) } #[doc = "Bit 9 - BEIM"] #[inline(always)] #[must_use] - pub fn beim(&mut self) -> BEIM_W { - BEIM_W::new(self) + pub fn beim(&mut self) -> BEIM_W { + BEIM_W::new(self, 9) } #[doc = "Bit 10 - OEIM"] #[inline(always)] #[must_use] - pub fn oeim(&mut self) -> OEIM_W { - OEIM_W::new(self) + pub fn oeim(&mut self) -> OEIM_W { + OEIM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/lcr_h.rs b/crates/bcm2837-lpa/src/uart0/lcr_h.rs index b6c85cc..6f5ab61 100644 --- a/crates/bcm2837-lpa/src/uart0/lcr_h.rs +++ b/crates/bcm2837-lpa/src/uart0/lcr_h.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `BRK` reader - BRK"] pub type BRK_R = crate::BitReader; #[doc = "Field `BRK` writer - BRK"] -pub type BRK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BRK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEN` reader - PEN"] pub type PEN_R = crate::BitReader; #[doc = "Field `PEN` writer - PEN"] -pub type PEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPS` reader - EPS"] pub type EPS_R = crate::BitReader; #[doc = "Field `EPS` writer - EPS"] -pub type EPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STP2` reader - STP2"] pub type STP2_R = crate::BitReader; #[doc = "Field `STP2` writer - STP2"] -pub type STP2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STP2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEN` reader - FEN"] pub type FEN_R = crate::BitReader; #[doc = "Field `FEN` writer - FEN"] -pub type FEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WLEN` reader - WLEN"] pub type WLEN_R = crate::FieldReader; #[doc = "Field `WLEN` writer - WLEN"] -pub type WLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type WLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SPS` reader - SPS"] pub type SPS_R = crate::BitReader; #[doc = "Field `SPS` writer - SPS"] -pub type SPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - BRK"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - BRK"] #[inline(always)] #[must_use] - pub fn brk(&mut self) -> BRK_W { - BRK_W::new(self) + pub fn brk(&mut self) -> BRK_W { + BRK_W::new(self, 0) } #[doc = "Bit 1 - PEN"] #[inline(always)] #[must_use] - pub fn pen(&mut self) -> PEN_W { - PEN_W::new(self) + pub fn pen(&mut self) -> PEN_W { + PEN_W::new(self, 1) } #[doc = "Bit 2 - EPS"] #[inline(always)] #[must_use] - pub fn eps(&mut self) -> EPS_W { - EPS_W::new(self) + pub fn eps(&mut self) -> EPS_W { + EPS_W::new(self, 2) } #[doc = "Bit 3 - STP2"] #[inline(always)] #[must_use] - pub fn stp2(&mut self) -> STP2_W { - STP2_W::new(self) + pub fn stp2(&mut self) -> STP2_W { + STP2_W::new(self, 3) } #[doc = "Bit 4 - FEN"] #[inline(always)] #[must_use] - pub fn fen(&mut self) -> FEN_W { - FEN_W::new(self) + pub fn fen(&mut self) -> FEN_W { + FEN_W::new(self, 4) } #[doc = "Bits 5:6 - WLEN"] #[inline(always)] #[must_use] - pub fn wlen(&mut self) -> WLEN_W { - WLEN_W::new(self) + pub fn wlen(&mut self) -> WLEN_W { + WLEN_W::new(self, 5) } #[doc = "Bit 7 - SPS"] #[inline(always)] #[must_use] - pub fn sps(&mut self) -> SPS_W { - SPS_W::new(self) + pub fn sps(&mut self) -> SPS_W { + SPS_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart0/mis.rs b/crates/bcm2837-lpa/src/uart0/mis.rs index 8ecfc00..acfe63e 100644 --- a/crates/bcm2837-lpa/src/uart0/mis.rs +++ b/crates/bcm2837-lpa/src/uart0/mis.rs @@ -98,7 +98,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Masked Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mis::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/uart0/ris.rs b/crates/bcm2837-lpa/src/uart0/ris.rs index 9da59ba..3d4619d 100644 --- a/crates/bcm2837-lpa/src/uart0/ris.rs +++ b/crates/bcm2837-lpa/src/uart0/ris.rs @@ -98,7 +98,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Raw Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ris::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/uart0/rsr.rs b/crates/bcm2837-lpa/src/uart0/rsr.rs index 524d503..29bc562 100644 --- a/crates/bcm2837-lpa/src/uart0/rsr.rs +++ b/crates/bcm2837-lpa/src/uart0/rsr.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Receive Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/uart1.rs b/crates/bcm2837-lpa/src/uart1.rs index 7cc03cc..943516a 100644 --- a/crates/bcm2837-lpa/src/uart1.rs +++ b/crates/bcm2837-lpa/src/uart1.rs @@ -4,46 +4,82 @@ pub struct RegisterBlock { _reserved_0_io: [u8; 0x04], _reserved_1_ier: [u8; 0x04], - #[doc = "0x08 - Interrupt Identify"] - pub iir: IIR, - #[doc = "0x0c - Line control"] - pub lcr: LCR, - #[doc = "0x10 - Modem Control"] - pub mcr: MCR, - #[doc = "0x14 - Line Status"] - pub lsr: LSR, - #[doc = "0x18 - Modem Status"] - pub msr: MSR, - #[doc = "0x1c - Scratch"] - pub scratch: SCRATCH, + iir: IIR, + lcr: LCR, + mcr: MCR, + lsr: LSR, + msr: MSR, + scratch: SCRATCH, _reserved8: [u8; 0x03], - #[doc = "0x20 - Control"] - pub cntl: CNTL, - #[doc = "0x24 - Status"] - pub stat: STAT, - #[doc = "0x28 - Baudrate"] - pub baud: BAUD, + cntl: CNTL, + stat: STAT, + baud: BAUD, } impl RegisterBlock { #[doc = "0x00 - Lower bits of baudrate when DLAB is set"] #[inline(always)] pub const fn baudl(&self) -> &BAUDL { - unsafe { &*(self as *const Self).cast::().add(0usize).cast() } + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x00 - I/O Data"] #[inline(always)] pub const fn io(&self) -> &IO { - unsafe { &*(self as *const Self).cast::().add(0usize).cast() } + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x04 - High bits of baudrate when DLAB is set"] #[inline(always)] pub const fn baudh(&self) -> &BAUDH { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + unsafe { &*(self as *const Self).cast::().add(4).cast() } } #[doc = "0x04 - Interrupt Enable"] #[inline(always)] pub const fn ier(&self) -> &IER { - unsafe { &*(self as *const Self).cast::().add(4usize).cast() } + unsafe { &*(self as *const Self).cast::().add(4).cast() } + } + #[doc = "0x08 - Interrupt Identify"] + #[inline(always)] + pub const fn iir(&self) -> &IIR { + &self.iir + } + #[doc = "0x0c - Line control"] + #[inline(always)] + pub const fn lcr(&self) -> &LCR { + &self.lcr + } + #[doc = "0x10 - Modem Control"] + #[inline(always)] + pub const fn mcr(&self) -> &MCR { + &self.mcr + } + #[doc = "0x14 - Line Status"] + #[inline(always)] + pub const fn lsr(&self) -> &LSR { + &self.lsr + } + #[doc = "0x18 - Modem Status"] + #[inline(always)] + pub const fn msr(&self) -> &MSR { + &self.msr + } + #[doc = "0x1c - Scratch"] + #[inline(always)] + pub const fn scratch(&self) -> &SCRATCH { + &self.scratch + } + #[doc = "0x20 - Control"] + #[inline(always)] + pub const fn cntl(&self) -> &CNTL { + &self.cntl + } + #[doc = "0x24 - Status"] + #[inline(always)] + pub const fn stat(&self) -> &STAT { + &self.stat + } + #[doc = "0x28 - Baudrate"] + #[inline(always)] + pub const fn baud(&self) -> &BAUD { + &self.baud } } #[doc = "IO (rw) register accessor: I/O Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`io::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`io::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@io`] diff --git a/crates/bcm2837-lpa/src/uart1/baud.rs b/crates/bcm2837-lpa/src/uart1/baud.rs index 4cc37c7..1a1fe31 100644 --- a/crates/bcm2837-lpa/src/uart1/baud.rs +++ b/crates/bcm2837-lpa/src/uart1/baud.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/uart1/baudh.rs b/crates/bcm2837-lpa/src/uart1/baudh.rs index aa2fa88..259e873 100644 --- a/crates/bcm2837-lpa/src/uart1/baudh.rs +++ b/crates/bcm2837-lpa/src/uart1/baudh.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/uart1/baudl.rs b/crates/bcm2837-lpa/src/uart1/baudl.rs index a9c9850..966abf8 100644 --- a/crates/bcm2837-lpa/src/uart1/baudl.rs +++ b/crates/bcm2837-lpa/src/uart1/baudl.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/uart1/cntl.rs b/crates/bcm2837-lpa/src/uart1/cntl.rs index ca942f3..5615608 100644 --- a/crates/bcm2837-lpa/src/uart1/cntl.rs +++ b/crates/bcm2837-lpa/src/uart1/cntl.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `RX_ENABLE` reader - Enable receive"] pub type RX_ENABLE_R = crate::BitReader; #[doc = "Field `RX_ENABLE` writer - Enable receive"] -pub type RX_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_ENABLE` reader - Enable transmit"] pub type TX_ENABLE_R = crate::BitReader; #[doc = "Field `TX_ENABLE` writer - Enable transmit"] -pub type TX_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_ENABLE` reader - Enable auto receive flow control with RTS"] pub type RTS_ENABLE_R = crate::BitReader; #[doc = "Field `RTS_ENABLE` writer - Enable auto receive flow control with RTS"] -pub type RTS_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTS_ENABLE` reader - Enable auto transmit flow control with CTS"] pub type CTS_ENABLE_R = crate::BitReader; #[doc = "Field `CTS_ENABLE` writer - Enable auto transmit flow control with CTS"] -pub type CTS_ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_FIFO_LEVEL` reader - FIFO level to de-assert RTS"] pub type RTS_FIFO_LEVEL_R = crate::FieldReader; #[doc = "FIFO level to de-assert RTS\n\nValue on reset: 0"] @@ -76,9 +76,8 @@ impl RTS_FIFO_LEVEL_R { } } #[doc = "Field `RTS_FIFO_LEVEL` writer - FIFO level to de-assert RTS"] -pub type RTS_FIFO_LEVEL_W<'a, REG, const O: u8> = - crate::FieldWriterSafe<'a, REG, 2, O, FIFO_LEVEL_A>; -impl<'a, REG, const O: u8> RTS_FIFO_LEVEL_W<'a, REG, O> +pub type RTS_FIFO_LEVEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FIFO_LEVEL_A>; +impl<'a, REG> RTS_FIFO_LEVEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -145,8 +144,8 @@ impl CTS_ASSERT_R { } } #[doc = "Field `CTS_ASSERT` writer - CTS assert level"] -pub type CTS_ASSERT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ASSERT_LEVEL_A>; -impl<'a, REG, const O: u8> CTS_ASSERT_W<'a, REG, O> +pub type CTS_ASSERT_W<'a, REG> = crate::BitWriter<'a, REG, ASSERT_LEVEL_A>; +impl<'a, REG> CTS_ASSERT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -216,51 +215,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable receive"] #[inline(always)] #[must_use] - pub fn rx_enable(&mut self) -> RX_ENABLE_W { - RX_ENABLE_W::new(self) + pub fn rx_enable(&mut self) -> RX_ENABLE_W { + RX_ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Enable transmit"] #[inline(always)] #[must_use] - pub fn tx_enable(&mut self) -> TX_ENABLE_W { - TX_ENABLE_W::new(self) + pub fn tx_enable(&mut self) -> TX_ENABLE_W { + TX_ENABLE_W::new(self, 1) } #[doc = "Bit 2 - Enable auto receive flow control with RTS"] #[inline(always)] #[must_use] - pub fn rts_enable(&mut self) -> RTS_ENABLE_W { - RTS_ENABLE_W::new(self) + pub fn rts_enable(&mut self) -> RTS_ENABLE_W { + RTS_ENABLE_W::new(self, 2) } #[doc = "Bit 3 - Enable auto transmit flow control with CTS"] #[inline(always)] #[must_use] - pub fn cts_enable(&mut self) -> CTS_ENABLE_W { - CTS_ENABLE_W::new(self) + pub fn cts_enable(&mut self) -> CTS_ENABLE_W { + CTS_ENABLE_W::new(self, 3) } #[doc = "Bits 4:5 - FIFO level to de-assert RTS"] #[inline(always)] #[must_use] - pub fn rts_fifo_level(&mut self) -> RTS_FIFO_LEVEL_W { - RTS_FIFO_LEVEL_W::new(self) + pub fn rts_fifo_level(&mut self) -> RTS_FIFO_LEVEL_W { + RTS_FIFO_LEVEL_W::new(self, 4) } #[doc = "Bit 6 - RTS assert level"] #[inline(always)] #[must_use] - pub fn rts_assert(&mut self) -> RTS_ASSERT_W { - RTS_ASSERT_W::new(self) + pub fn rts_assert(&mut self) -> RTS_ASSERT_W { + RTS_ASSERT_W::new(self, 6) } #[doc = "Bit 7 - CTS assert level"] #[inline(always)] #[must_use] - pub fn cts_assert(&mut self) -> CTS_ASSERT_W { - CTS_ASSERT_W::new(self) + pub fn cts_assert(&mut self) -> CTS_ASSERT_W { + CTS_ASSERT_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/ier.rs b/crates/bcm2837-lpa/src/uart1/ier.rs index f3188e7..397be5f 100644 --- a/crates/bcm2837-lpa/src/uart1/ier.rs +++ b/crates/bcm2837-lpa/src/uart1/ier.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least 1 byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least 1 byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO is empty"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO is empty"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive FIFO has at least 1 byte"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least 1 byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Transmit FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/iir.rs b/crates/bcm2837-lpa/src/uart1/iir.rs index b7a876b..68b5ae3 100644 --- a/crates/bcm2837-lpa/src/uart1/iir.rs +++ b/crates/bcm2837-lpa/src/uart1/iir.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `nPENDING` reader - No pending interrupt"] pub type N_PENDING_R = crate::BitReader; #[doc = "Field `nPENDING` writer - No pending interrupt"] -pub type N_PENDING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type N_PENDING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least 1 byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least 1 byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO is empty"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO is empty"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No pending interrupt"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - No pending interrupt"] #[inline(always)] #[must_use] - pub fn n_pending(&mut self) -> N_PENDING_W { - N_PENDING_W::new(self) + pub fn n_pending(&mut self) -> N_PENDING_W { + N_PENDING_W::new(self, 0) } #[doc = "Bit 1 - Receive FIFO has at least 1 byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 1) } #[doc = "Bit 2 - Transmit FIFO is empty"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/io.rs b/crates/bcm2837-lpa/src/uart1/io.rs index 1873e08..50a4e82 100644 --- a/crates/bcm2837-lpa/src/uart1/io.rs +++ b/crates/bcm2837-lpa/src/uart1/io.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DATA` reader - FIFO access"] pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - FIFO access"] -pub type DATA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - FIFO access"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:7 - FIFO access"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/lcr.rs b/crates/bcm2837-lpa/src/uart1/lcr.rs index 38e7d1e..af3e618 100644 --- a/crates/bcm2837-lpa/src/uart1/lcr.rs +++ b/crates/bcm2837-lpa/src/uart1/lcr.rs @@ -44,8 +44,8 @@ impl DATA_SIZE_R { } } #[doc = "Field `DATA_SIZE` writer - UART word size"] -pub type DATA_SIZE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O, MODE_A>; -impl<'a, REG, const O: u8> DATA_SIZE_W<'a, REG, O> +pub type DATA_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE_A>; +impl<'a, REG> DATA_SIZE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -64,11 +64,11 @@ where #[doc = "Field `BREAK` reader - Pull TX low continuously to send break"] pub type BREAK_R = crate::BitReader; #[doc = "Field `BREAK` writer - Pull TX low continuously to send break"] -pub type BREAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BREAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DLAB` reader - First two registers are baudrate"] pub type DLAB_R = crate::BitReader; #[doc = "Field `DLAB` writer - First two registers are baudrate"] -pub type DLAB_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DLAB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - UART word size"] #[inline(always)] @@ -97,27 +97,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - UART word size"] #[inline(always)] #[must_use] - pub fn data_size(&mut self) -> DATA_SIZE_W { - DATA_SIZE_W::new(self) + pub fn data_size(&mut self) -> DATA_SIZE_W { + DATA_SIZE_W::new(self, 0) } #[doc = "Bit 6 - Pull TX low continuously to send break"] #[inline(always)] #[must_use] - pub fn break_(&mut self) -> BREAK_W { - BREAK_W::new(self) + pub fn break_(&mut self) -> BREAK_W { + BREAK_W::new(self, 6) } #[doc = "Bit 7 - First two registers are baudrate"] #[inline(always)] #[must_use] - pub fn dlab(&mut self) -> DLAB_W { - DLAB_W::new(self) + pub fn dlab(&mut self) -> DLAB_W { + DLAB_W::new(self, 7) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/lsr.rs b/crates/bcm2837-lpa/src/uart1/lsr.rs index 83455e7..c1d3fb3 100644 --- a/crates/bcm2837-lpa/src/uart1/lsr.rs +++ b/crates/bcm2837-lpa/src/uart1/lsr.rs @@ -5,19 +5,19 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least one byte"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least one byte"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_OVERRUN` reader - Receive FIFO overrun"] pub type RX_OVERRUN_R = crate::BitReader; #[doc = "Field `RX_OVERRUN` writer - Receive FIFO overrun"] -pub type RX_OVERRUN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - Transmit FIFO has room for at least one byte"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - Transmit FIFO has room for at least one byte"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_IDLE` reader - Transmit FIFO empty and all bits shifted out"] pub type TX_IDLE_R = crate::BitReader; #[doc = "Field `TX_IDLE` writer - Transmit FIFO empty and all bits shifted out"] -pub type TX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive FIFO has at least one byte"] #[inline(always)] @@ -52,33 +52,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least one byte"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Receive FIFO overrun"] #[inline(always)] #[must_use] - pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { - RX_OVERRUN_W::new(self) + pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { + RX_OVERRUN_W::new(self, 1) } #[doc = "Bit 5 - Transmit FIFO has room for at least one byte"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 5) } #[doc = "Bit 6 - Transmit FIFO empty and all bits shifted out"] #[inline(always)] #[must_use] - pub fn tx_idle(&mut self) -> TX_IDLE_W { - TX_IDLE_W::new(self) + pub fn tx_idle(&mut self) -> TX_IDLE_W { + TX_IDLE_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/mcr.rs b/crates/bcm2837-lpa/src/uart1/mcr.rs index 26a7cb4..af66534 100644 --- a/crates/bcm2837-lpa/src/uart1/mcr.rs +++ b/crates/bcm2837-lpa/src/uart1/mcr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RTS` reader - RTS is low"] pub type RTS_R = crate::BitReader; #[doc = "Field `RTS` writer - RTS is low"] -pub type RTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - RTS is low"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - RTS is low"] #[inline(always)] #[must_use] - pub fn rts(&mut self) -> RTS_W { - RTS_W::new(self) + pub fn rts(&mut self) -> RTS_W { + RTS_W::new(self, 1) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/msr.rs b/crates/bcm2837-lpa/src/uart1/msr.rs index c6e81af..889b504 100644 --- a/crates/bcm2837-lpa/src/uart1/msr.rs +++ b/crates/bcm2837-lpa/src/uart1/msr.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `CTS` reader - CTS is low"] pub type CTS_R = crate::BitReader; #[doc = "Field `CTS` writer - CTS is low"] -pub type CTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - CTS is low"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 4 - CTS is low"] #[inline(always)] #[must_use] - pub fn cts(&mut self) -> CTS_W { - CTS_W::new(self) + pub fn cts(&mut self) -> CTS_W { + CTS_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/uart1/scratch.rs b/crates/bcm2837-lpa/src/uart1/scratch.rs index bd73381..e8dcef0 100644 --- a/crates/bcm2837-lpa/src/uart1/scratch.rs +++ b/crates/bcm2837-lpa/src/uart1/scratch.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/uart1/stat.rs b/crates/bcm2837-lpa/src/uart1/stat.rs index b876fef..679c73b 100644 --- a/crates/bcm2837-lpa/src/uart1/stat.rs +++ b/crates/bcm2837-lpa/src/uart1/stat.rs @@ -5,51 +5,51 @@ pub type W = crate::W; #[doc = "Field `DATA_READY` reader - Receive FIFO has at least one symbol"] pub type DATA_READY_R = crate::BitReader; #[doc = "Field `DATA_READY` writer - Receive FIFO has at least one symbol"] -pub type DATA_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATA_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_READY` reader - Transmit FIFO has space for at least one symbol"] pub type TX_READY_R = crate::BitReader; #[doc = "Field `TX_READY` writer - Transmit FIFO has space for at least one symbol"] -pub type TX_READY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_READY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_IDLE` reader - Receiver is idle"] pub type RX_IDLE_R = crate::BitReader; #[doc = "Field `RX_IDLE` writer - Receiver is idle"] -pub type RX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_IDLE` reader - Transmitter is idle"] pub type TX_IDLE_R = crate::BitReader; #[doc = "Field `TX_IDLE` writer - Transmitter is idle"] -pub type TX_IDLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_OVERRUN` reader - Receive FIFO overrun"] pub type RX_OVERRUN_R = crate::BitReader; #[doc = "Field `RX_OVERRUN` writer - Receive FIFO overrun"] -pub type RX_OVERRUN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RX_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_FULL` reader - Transmit FIFO is full"] pub type TX_FULL_R = crate::BitReader; #[doc = "Field `TX_FULL` writer - Transmit FIFO is full"] -pub type TX_FULL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_FULL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTS_STATUS` reader - RTS state"] pub type RTS_STATUS_R = crate::BitReader; #[doc = "Field `RTS_STATUS` writer - RTS state"] -pub type RTS_STATUS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RTS_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTS_STATUS` reader - CTS state"] pub type CTS_STATUS_R = crate::BitReader; #[doc = "Field `CTS_STATUS` writer - CTS state"] -pub type CTS_STATUS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTS_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_EMPTY` reader - Transmit FIFO is completely empty"] pub type TX_EMPTY_R = crate::BitReader; #[doc = "Field `TX_EMPTY` writer - Transmit FIFO is completely empty"] -pub type TX_EMPTY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX_DONE` reader - Transmit FIFO is empty and transmitter is idle"] pub type TX_DONE_R = crate::BitReader; #[doc = "Field `TX_DONE` writer - Transmit FIFO is empty and transmitter is idle"] -pub type TX_DONE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TX_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX_FIFO_LEVEL` reader - How many entries are filled in the RX FIFO"] pub type RX_FIFO_LEVEL_R = crate::FieldReader; #[doc = "Field `RX_FIFO_LEVEL` writer - How many entries are filled in the RX FIFO"] -pub type RX_FIFO_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type RX_FIFO_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TX_FIFO_LEVEL` reader - How many entries are filled in the TX FIFO"] pub type TX_FIFO_LEVEL_R = crate::FieldReader; #[doc = "Field `TX_FIFO_LEVEL` writer - How many entries are filled in the TX FIFO"] -pub type TX_FIFO_LEVEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TX_FIFO_LEVEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Receive FIFO has at least one symbol"] #[inline(always)] @@ -138,81 +138,81 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Receive FIFO has at least one symbol"] #[inline(always)] #[must_use] - pub fn data_ready(&mut self) -> DATA_READY_W { - DATA_READY_W::new(self) + pub fn data_ready(&mut self) -> DATA_READY_W { + DATA_READY_W::new(self, 0) } #[doc = "Bit 1 - Transmit FIFO has space for at least one symbol"] #[inline(always)] #[must_use] - pub fn tx_ready(&mut self) -> TX_READY_W { - TX_READY_W::new(self) + pub fn tx_ready(&mut self) -> TX_READY_W { + TX_READY_W::new(self, 1) } #[doc = "Bit 2 - Receiver is idle"] #[inline(always)] #[must_use] - pub fn rx_idle(&mut self) -> RX_IDLE_W { - RX_IDLE_W::new(self) + pub fn rx_idle(&mut self) -> RX_IDLE_W { + RX_IDLE_W::new(self, 2) } #[doc = "Bit 3 - Transmitter is idle"] #[inline(always)] #[must_use] - pub fn tx_idle(&mut self) -> TX_IDLE_W { - TX_IDLE_W::new(self) + pub fn tx_idle(&mut self) -> TX_IDLE_W { + TX_IDLE_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO overrun"] #[inline(always)] #[must_use] - pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { - RX_OVERRUN_W::new(self) + pub fn rx_overrun(&mut self) -> RX_OVERRUN_W { + RX_OVERRUN_W::new(self, 4) } #[doc = "Bit 5 - Transmit FIFO is full"] #[inline(always)] #[must_use] - pub fn tx_full(&mut self) -> TX_FULL_W { - TX_FULL_W::new(self) + pub fn tx_full(&mut self) -> TX_FULL_W { + TX_FULL_W::new(self, 5) } #[doc = "Bit 6 - RTS state"] #[inline(always)] #[must_use] - pub fn rts_status(&mut self) -> RTS_STATUS_W { - RTS_STATUS_W::new(self) + pub fn rts_status(&mut self) -> RTS_STATUS_W { + RTS_STATUS_W::new(self, 6) } #[doc = "Bit 7 - CTS state"] #[inline(always)] #[must_use] - pub fn cts_status(&mut self) -> CTS_STATUS_W { - CTS_STATUS_W::new(self) + pub fn cts_status(&mut self) -> CTS_STATUS_W { + CTS_STATUS_W::new(self, 7) } #[doc = "Bit 8 - Transmit FIFO is completely empty"] #[inline(always)] #[must_use] - pub fn tx_empty(&mut self) -> TX_EMPTY_W { - TX_EMPTY_W::new(self) + pub fn tx_empty(&mut self) -> TX_EMPTY_W { + TX_EMPTY_W::new(self, 8) } #[doc = "Bit 9 - Transmit FIFO is empty and transmitter is idle"] #[inline(always)] #[must_use] - pub fn tx_done(&mut self) -> TX_DONE_W { - TX_DONE_W::new(self) + pub fn tx_done(&mut self) -> TX_DONE_W { + TX_DONE_W::new(self, 9) } #[doc = "Bits 16:19 - How many entries are filled in the RX FIFO"] #[inline(always)] #[must_use] - pub fn rx_fifo_level(&mut self) -> RX_FIFO_LEVEL_W { - RX_FIFO_LEVEL_W::new(self) + pub fn rx_fifo_level(&mut self) -> RX_FIFO_LEVEL_W { + RX_FIFO_LEVEL_W::new(self, 16) } #[doc = "Bits 24:27 - How many entries are filled in the TX FIFO"] #[inline(always)] #[must_use] - pub fn tx_fifo_level(&mut self) -> TX_FIFO_LEVEL_W { - TX_FIFO_LEVEL_W::new(self) + pub fn tx_fifo_level(&mut self) -> TX_FIFO_LEVEL_W { + TX_FIFO_LEVEL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device.rs b/crates/bcm2837-lpa/src/usb_otg_device.rs index 140d7ba..4c4dbc2 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device.rs @@ -2,111 +2,269 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + dcfg: DCFG, + dctl: DCTL, + dsts: DSTS, + _reserved3: [u8; 0x04], + diepmsk: DIEPMSK, + doepmsk: DOEPMSK, + daint: DAINT, + daintmsk: DAINTMSK, + _reserved7: [u8; 0x08], + dvbusdis: DVBUSDIS, + dvbuspulse: DVBUSPULSE, + dthrctl: DTHRCTL, + diepempmsk: DIEPEMPMSK, + deachint: DEACHINT, + deachintmsk: DEACHINTMSK, + diepeachmsk1: DIEPEACHMSK1, + _reserved14: [u8; 0x3c], + doepeachmsk1: DOEPEACHMSK1, + _reserved15: [u8; 0x7c], + in_endpoint0: IN_ENDPOINT, + _reserved16: [u8; 0x04], + in_endpoint1: IN_ENDPOINT, + _reserved17: [u8; 0x04], + in_endpoint2: IN_ENDPOINT, + _reserved18: [u8; 0x04], + in_endpoint3: IN_ENDPOINT, + _reserved19: [u8; 0x04], + in_endpoint4: IN_ENDPOINT, + _reserved20: [u8; 0x04], + in_endpoint5: IN_ENDPOINT, + _reserved21: [u8; 0x04], + in_endpoint6: IN_ENDPOINT, + _reserved22: [u8; 0x04], + in_endpoint7: IN_ENDPOINT, + _reserved23: [u8; 0x04], + in_endpoint8: IN_ENDPOINT, + _reserved24: [u8; 0x04], + in_endpoint9: IN_ENDPOINT, + _reserved25: [u8; 0x04], + in_endpoint10: IN_ENDPOINT, + _reserved26: [u8; 0x04], + in_endpoint11: IN_ENDPOINT, + _reserved27: [u8; 0x84], + out_endpoint0: OUT_ENDPOINT, + _reserved28: [u8; 0x08], + out_endpoint1: OUT_ENDPOINT, + _reserved29: [u8; 0x08], + out_endpoint2: OUT_ENDPOINT, + _reserved30: [u8; 0x08], + out_endpoint3: OUT_ENDPOINT, + _reserved31: [u8; 0x08], + out_endpoint4: OUT_ENDPOINT, + _reserved32: [u8; 0x08], + out_endpoint5: OUT_ENDPOINT, + _reserved33: [u8; 0x08], + out_endpoint6: OUT_ENDPOINT, + _reserved34: [u8; 0x08], + out_endpoint7: OUT_ENDPOINT, + _reserved35: [u8; 0x08], + out_endpoint8: OUT_ENDPOINT, + _reserved36: [u8; 0x08], + out_endpoint9: OUT_ENDPOINT, + _reserved37: [u8; 0x08], + out_endpoint10: OUT_ENDPOINT, + _reserved38: [u8; 0x08], + out_endpoint11: OUT_ENDPOINT, +} +impl RegisterBlock { #[doc = "0x00 - OTG_HS device configuration register"] - pub dcfg: DCFG, + #[inline(always)] + pub const fn dcfg(&self) -> &DCFG { + &self.dcfg + } #[doc = "0x04 - OTG_HS device control register"] - pub dctl: DCTL, + #[inline(always)] + pub const fn dctl(&self) -> &DCTL { + &self.dctl + } #[doc = "0x08 - OTG_HS device status register"] - pub dsts: DSTS, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn dsts(&self) -> &DSTS { + &self.dsts + } #[doc = "0x10 - OTG_HS device IN endpoint common interrupt mask register"] - pub diepmsk: DIEPMSK, + #[inline(always)] + pub const fn diepmsk(&self) -> &DIEPMSK { + &self.diepmsk + } #[doc = "0x14 - OTG_HS device OUT endpoint common interrupt mask register"] - pub doepmsk: DOEPMSK, + #[inline(always)] + pub const fn doepmsk(&self) -> &DOEPMSK { + &self.doepmsk + } #[doc = "0x18 - OTG_HS device all endpoints interrupt register"] - pub daint: DAINT, + #[inline(always)] + pub const fn daint(&self) -> &DAINT { + &self.daint + } #[doc = "0x1c - OTG_HS all endpoints interrupt mask register"] - pub daintmsk: DAINTMSK, - _reserved7: [u8; 0x08], + #[inline(always)] + pub const fn daintmsk(&self) -> &DAINTMSK { + &self.daintmsk + } #[doc = "0x28 - OTG_HS device VBUS discharge time register"] - pub dvbusdis: DVBUSDIS, + #[inline(always)] + pub const fn dvbusdis(&self) -> &DVBUSDIS { + &self.dvbusdis + } #[doc = "0x2c - OTG_HS device VBUS pulsing time register"] - pub dvbuspulse: DVBUSPULSE, + #[inline(always)] + pub const fn dvbuspulse(&self) -> &DVBUSPULSE { + &self.dvbuspulse + } #[doc = "0x30 - OTG_HS Device threshold control register"] - pub dthrctl: DTHRCTL, + #[inline(always)] + pub const fn dthrctl(&self) -> &DTHRCTL { + &self.dthrctl + } #[doc = "0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register"] - pub diepempmsk: DIEPEMPMSK, + #[inline(always)] + pub const fn diepempmsk(&self) -> &DIEPEMPMSK { + &self.diepempmsk + } #[doc = "0x38 - OTG_HS device each endpoint interrupt register"] - pub deachint: DEACHINT, + #[inline(always)] + pub const fn deachint(&self) -> &DEACHINT { + &self.deachint + } #[doc = "0x3c - OTG_HS device each endpoint interrupt register mask"] - pub deachintmsk: DEACHINTMSK, + #[inline(always)] + pub const fn deachintmsk(&self) -> &DEACHINTMSK { + &self.deachintmsk + } #[doc = "0x40 - OTG_HS device each in endpoint-1 interrupt register"] - pub diepeachmsk1: DIEPEACHMSK1, - _reserved14: [u8; 0x3c], + #[inline(always)] + pub const fn diepeachmsk1(&self) -> &DIEPEACHMSK1 { + &self.diepeachmsk1 + } #[doc = "0x80 - OTG_HS device each OUT endpoint-1 interrupt register"] - pub doepeachmsk1: DOEPEACHMSK1, - _reserved15: [u8; 0x7c], + #[inline(always)] + pub const fn doepeachmsk1(&self) -> &DOEPEACHMSK1 { + &self.doepeachmsk1 + } #[doc = "0x100..0x11c - IN Endpoint 0"] - pub in_endpoint0: IN_ENDPOINT, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint0(&self) -> &IN_ENDPOINT { + &self.in_endpoint0 + } #[doc = "0x120..0x13c - IN Endpoint 1"] - pub in_endpoint1: IN_ENDPOINT, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint1(&self) -> &IN_ENDPOINT { + &self.in_endpoint1 + } #[doc = "0x140..0x15c - IN Endpoint 2"] - pub in_endpoint2: IN_ENDPOINT, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint2(&self) -> &IN_ENDPOINT { + &self.in_endpoint2 + } #[doc = "0x160..0x17c - IN Endpoint 3"] - pub in_endpoint3: IN_ENDPOINT, - _reserved19: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint3(&self) -> &IN_ENDPOINT { + &self.in_endpoint3 + } #[doc = "0x180..0x19c - IN Endpoint 4"] - pub in_endpoint4: IN_ENDPOINT, - _reserved20: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint4(&self) -> &IN_ENDPOINT { + &self.in_endpoint4 + } #[doc = "0x1a0..0x1bc - IN Endpoint 5"] - pub in_endpoint5: IN_ENDPOINT, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint5(&self) -> &IN_ENDPOINT { + &self.in_endpoint5 + } #[doc = "0x1c0..0x1dc - IN Endpoint 6"] - pub in_endpoint6: IN_ENDPOINT, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint6(&self) -> &IN_ENDPOINT { + &self.in_endpoint6 + } #[doc = "0x1e0..0x1fc - IN Endpoint 7"] - pub in_endpoint7: IN_ENDPOINT, - _reserved23: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint7(&self) -> &IN_ENDPOINT { + &self.in_endpoint7 + } #[doc = "0x200..0x21c - IN Endpoint 8"] - pub in_endpoint8: IN_ENDPOINT, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint8(&self) -> &IN_ENDPOINT { + &self.in_endpoint8 + } #[doc = "0x220..0x23c - IN Endpoint 9"] - pub in_endpoint9: IN_ENDPOINT, - _reserved25: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint9(&self) -> &IN_ENDPOINT { + &self.in_endpoint9 + } #[doc = "0x240..0x25c - IN Endpoint 10"] - pub in_endpoint10: IN_ENDPOINT, - _reserved26: [u8; 0x04], + #[inline(always)] + pub const fn in_endpoint10(&self) -> &IN_ENDPOINT { + &self.in_endpoint10 + } #[doc = "0x260..0x27c - IN Endpoint 11"] - pub in_endpoint11: IN_ENDPOINT, - _reserved27: [u8; 0x84], + #[inline(always)] + pub const fn in_endpoint11(&self) -> &IN_ENDPOINT { + &self.in_endpoint11 + } #[doc = "0x300..0x318 - OUT Endpoint 0"] - pub out_endpoint0: OUT_ENDPOINT, - _reserved28: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint0(&self) -> &OUT_ENDPOINT { + &self.out_endpoint0 + } #[doc = "0x320..0x338 - OUT Endpoint 1"] - pub out_endpoint1: OUT_ENDPOINT, - _reserved29: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint1(&self) -> &OUT_ENDPOINT { + &self.out_endpoint1 + } #[doc = "0x340..0x358 - OUT Endpoint 2"] - pub out_endpoint2: OUT_ENDPOINT, - _reserved30: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint2(&self) -> &OUT_ENDPOINT { + &self.out_endpoint2 + } #[doc = "0x360..0x378 - OUT Endpoint 3"] - pub out_endpoint3: OUT_ENDPOINT, - _reserved31: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint3(&self) -> &OUT_ENDPOINT { + &self.out_endpoint3 + } #[doc = "0x380..0x398 - OUT Endpoint 4"] - pub out_endpoint4: OUT_ENDPOINT, - _reserved32: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint4(&self) -> &OUT_ENDPOINT { + &self.out_endpoint4 + } #[doc = "0x3a0..0x3b8 - OUT Endpoint 5"] - pub out_endpoint5: OUT_ENDPOINT, - _reserved33: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint5(&self) -> &OUT_ENDPOINT { + &self.out_endpoint5 + } #[doc = "0x3c0..0x3d8 - OUT Endpoint 6"] - pub out_endpoint6: OUT_ENDPOINT, - _reserved34: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint6(&self) -> &OUT_ENDPOINT { + &self.out_endpoint6 + } #[doc = "0x3e0..0x3f8 - OUT Endpoint 7"] - pub out_endpoint7: OUT_ENDPOINT, - _reserved35: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint7(&self) -> &OUT_ENDPOINT { + &self.out_endpoint7 + } #[doc = "0x400..0x418 - OUT Endpoint 8"] - pub out_endpoint8: OUT_ENDPOINT, - _reserved36: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint8(&self) -> &OUT_ENDPOINT { + &self.out_endpoint8 + } #[doc = "0x420..0x438 - OUT Endpoint 9"] - pub out_endpoint9: OUT_ENDPOINT, - _reserved37: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint9(&self) -> &OUT_ENDPOINT { + &self.out_endpoint9 + } #[doc = "0x440..0x458 - OUT Endpoint 10"] - pub out_endpoint10: OUT_ENDPOINT, - _reserved38: [u8; 0x08], + #[inline(always)] + pub const fn out_endpoint10(&self) -> &OUT_ENDPOINT { + &self.out_endpoint10 + } #[doc = "0x460..0x478 - OUT Endpoint 11"] - pub out_endpoint11: OUT_ENDPOINT, + #[inline(always)] + pub const fn out_endpoint11(&self) -> &OUT_ENDPOINT { + &self.out_endpoint11 + } } #[doc = "DCFG (rw) register accessor: OTG_HS device configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] module"] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/daint.rs b/crates/bcm2837-lpa/src/usb_otg_device/daint.rs index 3210b36..69e661f 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/daint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/daint.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS device all endpoints interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/daintmsk.rs b/crates/bcm2837-lpa/src/usb_otg_device/daintmsk.rs index 44196aa..ddd94d4 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/daintmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/daintmsk.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEPM` reader - IN EP interrupt mask bits"] pub type IEPM_R = crate::FieldReader; #[doc = "Field `IEPM` writer - IN EP interrupt mask bits"] -pub type IEPM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type IEPM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `OEPM` reader - OUT EP interrupt mask bits"] pub type OEPM_R = crate::FieldReader; #[doc = "Field `OEPM` writer - OUT EP interrupt mask bits"] -pub type OEPM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type OEPM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP interrupt mask bits"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN EP interrupt mask bits"] #[inline(always)] #[must_use] - pub fn iepm(&mut self) -> IEPM_W { - IEPM_W::new(self) + pub fn iepm(&mut self) -> IEPM_W { + IEPM_W::new(self, 0) } #[doc = "Bits 16:31 - OUT EP interrupt mask bits"] #[inline(always)] #[must_use] - pub fn oepm(&mut self) -> OEPM_W { - OEPM_W::new(self) + pub fn oepm(&mut self) -> OEPM_W { + OEPM_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/dcfg.rs b/crates/bcm2837-lpa/src/usb_otg_device/dcfg.rs index fc2bbc8..e1c82c1 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/dcfg.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/dcfg.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `DSPD` reader - Device speed"] pub type DSPD_R = crate::FieldReader; #[doc = "Field `DSPD` writer - Device speed"] -pub type DSPD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type DSPD_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `NZLSOHSK` reader - Nonzero-length status OUT handshake"] pub type NZLSOHSK_R = crate::BitReader; #[doc = "Field `NZLSOHSK` writer - Nonzero-length status OUT handshake"] -pub type NZLSOHSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NZLSOHSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAD` reader - Device address"] pub type DAD_R = crate::FieldReader; #[doc = "Field `DAD` writer - Device address"] -pub type DAD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type DAD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PFIVL` reader - Periodic (micro)frame interval"] pub type PFIVL_R = crate::FieldReader; #[doc = "Field `PFIVL` writer - Periodic (micro)frame interval"] -pub type PFIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PFIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PERSCHIVL` reader - Periodic scheduling interval"] pub type PERSCHIVL_R = crate::FieldReader; #[doc = "Field `PERSCHIVL` writer - Periodic scheduling interval"] -pub type PERSCHIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PERSCHIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] #[must_use] - pub fn dspd(&mut self) -> DSPD_W { - DSPD_W::new(self) + pub fn dspd(&mut self) -> DSPD_W { + DSPD_W::new(self, 0) } #[doc = "Bit 2 - Nonzero-length status OUT handshake"] #[inline(always)] #[must_use] - pub fn nzlsohsk(&mut self) -> NZLSOHSK_W { - NZLSOHSK_W::new(self) + pub fn nzlsohsk(&mut self) -> NZLSOHSK_W { + NZLSOHSK_W::new(self, 2) } #[doc = "Bits 4:10 - Device address"] #[inline(always)] #[must_use] - pub fn dad(&mut self) -> DAD_W { - DAD_W::new(self) + pub fn dad(&mut self) -> DAD_W { + DAD_W::new(self, 4) } #[doc = "Bits 11:12 - Periodic (micro)frame interval"] #[inline(always)] #[must_use] - pub fn pfivl(&mut self) -> PFIVL_W { - PFIVL_W::new(self) + pub fn pfivl(&mut self) -> PFIVL_W { + PFIVL_W::new(self, 11) } #[doc = "Bits 24:25 - Periodic scheduling interval"] #[inline(always)] #[must_use] - pub fn perschivl(&mut self) -> PERSCHIVL_W { - PERSCHIVL_W::new(self) + pub fn perschivl(&mut self) -> PERSCHIVL_W { + PERSCHIVL_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/dctl.rs b/crates/bcm2837-lpa/src/usb_otg_device/dctl.rs index 42ffebd..cd2765c 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/dctl.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/dctl.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `RWUSIG` reader - Remote wakeup signaling"] pub type RWUSIG_R = crate::BitReader; #[doc = "Field `RWUSIG` writer - Remote wakeup signaling"] -pub type RWUSIG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RWUSIG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIS` reader - Soft disconnect"] pub type SDIS_R = crate::BitReader; #[doc = "Field `SDIS` writer - Soft disconnect"] -pub type SDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINSTS` reader - Global IN NAK status"] pub type GINSTS_R = crate::BitReader; #[doc = "Field `GONSTS` reader - Global OUT NAK status"] @@ -17,19 +17,19 @@ pub type GONSTS_R = crate::BitReader; #[doc = "Field `TCTL` reader - Test control"] pub type TCTL_R = crate::FieldReader; #[doc = "Field `TCTL` writer - Test control"] -pub type TCTL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SGINAK` writer - Set global IN NAK"] -pub type SGINAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SGINAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGINAK` writer - Clear global IN NAK"] -pub type CGINAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CGINAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SGONAK` writer - Set global OUT NAK"] -pub type SGONAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SGONAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGONAK` writer - Clear global OUT NAK"] -pub type CGONAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CGONAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POPRGDNE` reader - Power-on programming done"] pub type POPRGDNE_R = crate::BitReader; #[doc = "Field `POPRGDNE` writer - Power-on programming done"] -pub type POPRGDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POPRGDNE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Remote wakeup signaling"] #[inline(always)] @@ -76,57 +76,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Remote wakeup signaling"] #[inline(always)] #[must_use] - pub fn rwusig(&mut self) -> RWUSIG_W { - RWUSIG_W::new(self) + pub fn rwusig(&mut self) -> RWUSIG_W { + RWUSIG_W::new(self, 0) } #[doc = "Bit 1 - Soft disconnect"] #[inline(always)] #[must_use] - pub fn sdis(&mut self) -> SDIS_W { - SDIS_W::new(self) + pub fn sdis(&mut self) -> SDIS_W { + SDIS_W::new(self, 1) } #[doc = "Bits 4:6 - Test control"] #[inline(always)] #[must_use] - pub fn tctl(&mut self) -> TCTL_W { - TCTL_W::new(self) + pub fn tctl(&mut self) -> TCTL_W { + TCTL_W::new(self, 4) } #[doc = "Bit 7 - Set global IN NAK"] #[inline(always)] #[must_use] - pub fn sginak(&mut self) -> SGINAK_W { - SGINAK_W::new(self) + pub fn sginak(&mut self) -> SGINAK_W { + SGINAK_W::new(self, 7) } #[doc = "Bit 8 - Clear global IN NAK"] #[inline(always)] #[must_use] - pub fn cginak(&mut self) -> CGINAK_W { - CGINAK_W::new(self) + pub fn cginak(&mut self) -> CGINAK_W { + CGINAK_W::new(self, 8) } #[doc = "Bit 9 - Set global OUT NAK"] #[inline(always)] #[must_use] - pub fn sgonak(&mut self) -> SGONAK_W { - SGONAK_W::new(self) + pub fn sgonak(&mut self) -> SGONAK_W { + SGONAK_W::new(self, 9) } #[doc = "Bit 10 - Clear global OUT NAK"] #[inline(always)] #[must_use] - pub fn cgonak(&mut self) -> CGONAK_W { - CGONAK_W::new(self) + pub fn cgonak(&mut self) -> CGONAK_W { + CGONAK_W::new(self, 10) } #[doc = "Bit 11 - Power-on programming done"] #[inline(always)] #[must_use] - pub fn poprgdne(&mut self) -> POPRGDNE_W { - POPRGDNE_W::new(self) + pub fn poprgdne(&mut self) -> POPRGDNE_W { + POPRGDNE_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/deachint.rs b/crates/bcm2837-lpa/src/usb_otg_device/deachint.rs index f8f0c35..7e2e5d4 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/deachint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/deachint.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEP1INT` reader - IN endpoint 1interrupt bit"] pub type IEP1INT_R = crate::BitReader; #[doc = "Field `IEP1INT` writer - IN endpoint 1interrupt bit"] -pub type IEP1INT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEP1INT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEP1INT` reader - OUT endpoint 1 interrupt bit"] pub type OEP1INT_R = crate::BitReader; #[doc = "Field `OEP1INT` writer - OUT endpoint 1 interrupt bit"] -pub type OEP1INT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEP1INT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - IN endpoint 1interrupt bit"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - IN endpoint 1interrupt bit"] #[inline(always)] #[must_use] - pub fn iep1int(&mut self) -> IEP1INT_W { - IEP1INT_W::new(self) + pub fn iep1int(&mut self) -> IEP1INT_W { + IEP1INT_W::new(self, 1) } #[doc = "Bit 17 - OUT endpoint 1 interrupt bit"] #[inline(always)] #[must_use] - pub fn oep1int(&mut self) -> OEP1INT_W { - OEP1INT_W::new(self) + pub fn oep1int(&mut self) -> OEP1INT_W { + OEP1INT_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/deachintmsk.rs b/crates/bcm2837-lpa/src/usb_otg_device/deachintmsk.rs index 8979089..ef76a4e 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/deachintmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/deachintmsk.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `IEP1INTM` reader - IN Endpoint 1 interrupt mask bit"] pub type IEP1INTM_R = crate::BitReader; #[doc = "Field `IEP1INTM` writer - IN Endpoint 1 interrupt mask bit"] -pub type IEP1INTM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEP1INTM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEP1INTM` reader - OUT Endpoint 1 interrupt mask bit"] pub type OEP1INTM_R = crate::BitReader; #[doc = "Field `OEP1INTM` writer - OUT Endpoint 1 interrupt mask bit"] -pub type OEP1INTM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEP1INTM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - IN Endpoint 1 interrupt mask bit"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - IN Endpoint 1 interrupt mask bit"] #[inline(always)] #[must_use] - pub fn iep1intm(&mut self) -> IEP1INTM_W { - IEP1INTM_W::new(self) + pub fn iep1intm(&mut self) -> IEP1INTM_W { + IEP1INTM_W::new(self, 1) } #[doc = "Bit 17 - OUT Endpoint 1 interrupt mask bit"] #[inline(always)] #[must_use] - pub fn oep1intm(&mut self) -> OEP1INTM_W { - OEP1INTM_W::new(self) + pub fn oep1intm(&mut self) -> OEP1INTM_W { + OEP1INTM_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/diepeachmsk1.rs b/crates/bcm2837-lpa/src/usb_otg_device/diepeachmsk1.rs index b6d85a8..015ca9a 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/diepeachmsk1.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/diepeachmsk1.rs @@ -5,39 +5,39 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask (nonisochronous endpoints)"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask (nonisochronous endpoints)"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - FIFO underrun mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - FIFO underrun mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -102,63 +102,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask (nonisochronous endpoints)"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - FIFO underrun mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = "Bit 13 - NAK interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/diepempmsk.rs b/crates/bcm2837-lpa/src/usb_otg_device/diepempmsk.rs index 89831f3..f81b3f4 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/diepempmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/diepempmsk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `INEPTXFEM` reader - IN EP Tx FIFO empty interrupt mask bits"] pub type INEPTXFEM_R = crate::FieldReader; #[doc = "Field `INEPTXFEM` writer - IN EP Tx FIFO empty interrupt mask bits"] -pub type INEPTXFEM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFEM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits"] #[inline(always)] #[must_use] - pub fn ineptxfem(&mut self) -> INEPTXFEM_W { - INEPTXFEM_W::new(self) + pub fn ineptxfem(&mut self) -> INEPTXFEM_W { + INEPTXFEM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/diepmsk.rs b/crates/bcm2837-lpa/src/usb_otg_device/diepmsk.rs index 8bd397c..da31f73 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/diepmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/diepmsk.rs @@ -5,35 +5,35 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask (nonisochronous endpoints)"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask (nonisochronous endpoints)"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - FIFO underrun mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - FIFO underrun mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -92,57 +92,57 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask (nonisochronous endpoints)"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - FIFO underrun mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/doepeachmsk1.rs b/crates/bcm2837-lpa/src/usb_otg_device/doepeachmsk1.rs index 7c60dcc..9d7c73d 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/doepeachmsk1.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/doepeachmsk1.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOM` reader - Timeout condition mask"] pub type TOM_R = crate::BitReader; #[doc = "Field `TOM` writer - Timeout condition mask"] -pub type TOM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFEMSK` reader - IN token received when TxFIFO empty mask"] pub type ITTXFEMSK_R = crate::BitReader; #[doc = "Field `ITTXFEMSK` writer - IN token received when TxFIFO empty mask"] -pub type ITTXFEMSK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFEMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNMM` reader - IN token received with EP mismatch mask"] pub type INEPNMM_R = crate::BitReader; #[doc = "Field `INEPNMM` writer - IN token received with EP mismatch mask"] -pub type INEPNMM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNMM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNEM` reader - IN endpoint NAK effective mask"] pub type INEPNEM_R = crate::BitReader; #[doc = "Field `INEPNEM` writer - IN endpoint NAK effective mask"] -pub type INEPNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFURM` reader - OUT packet error mask"] pub type TXFURM_R = crate::BitReader; #[doc = "Field `TXFURM` writer - OUT packet error mask"] -pub type TXFURM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFURM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIM` reader - BNA interrupt mask"] pub type BIM_R = crate::BitReader; #[doc = "Field `BIM` writer - BNA interrupt mask"] -pub type BIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERRM` reader - Bubble error interrupt mask"] pub type BERRM_R = crate::BitReader; #[doc = "Field `BERRM` writer - Bubble error interrupt mask"] -pub type BERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETM` reader - NYET interrupt mask"] pub type NYETM_R = crate::BitReader; #[doc = "Field `NYETM` writer - NYET interrupt mask"] -pub type NYETM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYETM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition mask"] #[inline(always)] #[must_use] - pub fn tom(&mut self) -> TOM_W { - TOM_W::new(self) + pub fn tom(&mut self) -> TOM_W { + TOM_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { - ITTXFEMSK_W::new(self) + pub fn ittxfemsk(&mut self) -> ITTXFEMSK_W { + ITTXFEMSK_W::new(self, 4) } #[doc = "Bit 5 - IN token received with EP mismatch mask"] #[inline(always)] #[must_use] - pub fn inepnmm(&mut self) -> INEPNMM_W { - INEPNMM_W::new(self) + pub fn inepnmm(&mut self) -> INEPNMM_W { + INEPNMM_W::new(self, 5) } #[doc = "Bit 6 - IN endpoint NAK effective mask"] #[inline(always)] #[must_use] - pub fn inepnem(&mut self) -> INEPNEM_W { - INEPNEM_W::new(self) + pub fn inepnem(&mut self) -> INEPNEM_W { + INEPNEM_W::new(self, 6) } #[doc = "Bit 8 - OUT packet error mask"] #[inline(always)] #[must_use] - pub fn txfurm(&mut self) -> TXFURM_W { - TXFURM_W::new(self) + pub fn txfurm(&mut self) -> TXFURM_W { + TXFURM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn bim(&mut self) -> BIM_W { - BIM_W::new(self) + pub fn bim(&mut self) -> BIM_W { + BIM_W::new(self, 9) } #[doc = "Bit 12 - Bubble error interrupt mask"] #[inline(always)] #[must_use] - pub fn berrm(&mut self) -> BERRM_W { - BERRM_W::new(self) + pub fn berrm(&mut self) -> BERRM_W { + BERRM_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt mask"] #[inline(always)] #[must_use] - pub fn nyetm(&mut self) -> NYETM_W { - NYETM_W::new(self) + pub fn nyetm(&mut self) -> NYETM_W { + NYETM_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/doepmsk.rs b/crates/bcm2837-lpa/src/usb_otg_device/doepmsk.rs index dbed437..5613f52 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/doepmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/doepmsk.rs @@ -5,31 +5,31 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed interrupt mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed interrupt mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDM` reader - Endpoint disabled interrupt mask"] pub type EPDM_R = crate::BitReader; #[doc = "Field `EPDM` writer - Endpoint disabled interrupt mask"] -pub type EPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUPM` reader - SETUP phase done mask"] pub type STUPM_R = crate::BitReader; #[doc = "Field `STUPM` writer - SETUP phase done mask"] -pub type STUPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STUPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTEPDM` reader - OUT token received when endpoint disabled mask"] pub type OTEPDM_R = crate::BitReader; #[doc = "Field `OTEPDM` writer - OUT token received when endpoint disabled mask"] -pub type OTEPDM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTEPDM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `B2BSTUP` reader - Back-to-back SETUP packets received mask"] pub type B2BSTUP_R = crate::BitReader; #[doc = "Field `B2BSTUP` writer - Back-to-back SETUP packets received mask"] -pub type B2BSTUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type B2BSTUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OPEM` reader - OUT packet error mask"] pub type OPEM_R = crate::BitReader; #[doc = "Field `OPEM` writer - OUT packet error mask"] -pub type OPEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OPEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BOIM` reader - BNA interrupt mask"] pub type BOIM_R = crate::BitReader; #[doc = "Field `BOIM` writer - BNA interrupt mask"] -pub type BOIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BOIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] @@ -82,51 +82,51 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt mask"] #[inline(always)] #[must_use] - pub fn epdm(&mut self) -> EPDM_W { - EPDM_W::new(self) + pub fn epdm(&mut self) -> EPDM_W { + EPDM_W::new(self, 1) } #[doc = "Bit 3 - SETUP phase done mask"] #[inline(always)] #[must_use] - pub fn stupm(&mut self) -> STUPM_W { - STUPM_W::new(self) + pub fn stupm(&mut self) -> STUPM_W { + STUPM_W::new(self, 3) } #[doc = "Bit 4 - OUT token received when endpoint disabled mask"] #[inline(always)] #[must_use] - pub fn otepdm(&mut self) -> OTEPDM_W { - OTEPDM_W::new(self) + pub fn otepdm(&mut self) -> OTEPDM_W { + OTEPDM_W::new(self, 4) } #[doc = "Bit 6 - Back-to-back SETUP packets received mask"] #[inline(always)] #[must_use] - pub fn b2bstup(&mut self) -> B2BSTUP_W { - B2BSTUP_W::new(self) + pub fn b2bstup(&mut self) -> B2BSTUP_W { + B2BSTUP_W::new(self, 6) } #[doc = "Bit 8 - OUT packet error mask"] #[inline(always)] #[must_use] - pub fn opem(&mut self) -> OPEM_W { - OPEM_W::new(self) + pub fn opem(&mut self) -> OPEM_W { + OPEM_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt mask"] #[inline(always)] #[must_use] - pub fn boim(&mut self) -> BOIM_W { - BOIM_W::new(self) + pub fn boim(&mut self) -> BOIM_W { + BOIM_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/dsts.rs b/crates/bcm2837-lpa/src/usb_otg_device/dsts.rs index 3d4bf4f..b9ba828 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/dsts.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/dsts.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS device status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/dthrctl.rs b/crates/bcm2837-lpa/src/usb_otg_device/dthrctl.rs index 5044505..aeb3156 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/dthrctl.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/dthrctl.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `NONISOTHREN` reader - Nonisochronous IN endpoints threshold enable"] pub type NONISOTHREN_R = crate::BitReader; #[doc = "Field `NONISOTHREN` writer - Nonisochronous IN endpoints threshold enable"] -pub type NONISOTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NONISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOTHREN` reader - ISO IN endpoint threshold enable"] pub type ISOTHREN_R = crate::BitReader; #[doc = "Field `ISOTHREN` writer - ISO IN endpoint threshold enable"] -pub type ISOTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTHRLEN` reader - Transmit threshold length"] pub type TXTHRLEN_R = crate::FieldReader; #[doc = "Field `TXTHRLEN` writer - Transmit threshold length"] -pub type TXTHRLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 9, O, u16>; +pub type TXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `RXTHREN` reader - Receive threshold enable"] pub type RXTHREN_R = crate::BitReader; #[doc = "Field `RXTHREN` writer - Receive threshold enable"] -pub type RXTHREN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXTHREN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTHRLEN` reader - Receive threshold length"] pub type RXTHRLEN_R = crate::FieldReader; #[doc = "Field `RXTHRLEN` writer - Receive threshold length"] -pub type RXTHRLEN_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 9, O, u16>; +pub type RXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `ARPEN` reader - Arbiter parking enable"] pub type ARPEN_R = crate::BitReader; #[doc = "Field `ARPEN` writer - Arbiter parking enable"] -pub type ARPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ARPEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Nonisochronous IN endpoints threshold enable"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Nonisochronous IN endpoints threshold enable"] #[inline(always)] #[must_use] - pub fn nonisothren(&mut self) -> NONISOTHREN_W { - NONISOTHREN_W::new(self) + pub fn nonisothren(&mut self) -> NONISOTHREN_W { + NONISOTHREN_W::new(self, 0) } #[doc = "Bit 1 - ISO IN endpoint threshold enable"] #[inline(always)] #[must_use] - pub fn isothren(&mut self) -> ISOTHREN_W { - ISOTHREN_W::new(self) + pub fn isothren(&mut self) -> ISOTHREN_W { + ISOTHREN_W::new(self, 1) } #[doc = "Bits 2:10 - Transmit threshold length"] #[inline(always)] #[must_use] - pub fn txthrlen(&mut self) -> TXTHRLEN_W { - TXTHRLEN_W::new(self) + pub fn txthrlen(&mut self) -> TXTHRLEN_W { + TXTHRLEN_W::new(self, 2) } #[doc = "Bit 16 - Receive threshold enable"] #[inline(always)] #[must_use] - pub fn rxthren(&mut self) -> RXTHREN_W { - RXTHREN_W::new(self) + pub fn rxthren(&mut self) -> RXTHREN_W { + RXTHREN_W::new(self, 16) } #[doc = "Bits 17:25 - Receive threshold length"] #[inline(always)] #[must_use] - pub fn rxthrlen(&mut self) -> RXTHRLEN_W { - RXTHRLEN_W::new(self) + pub fn rxthrlen(&mut self) -> RXTHRLEN_W { + RXTHRLEN_W::new(self, 17) } #[doc = "Bit 27 - Arbiter parking enable"] #[inline(always)] #[must_use] - pub fn arpen(&mut self) -> ARPEN_W { - ARPEN_W::new(self) + pub fn arpen(&mut self) -> ARPEN_W { + ARPEN_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/dvbusdis.rs b/crates/bcm2837-lpa/src/usb_otg_device/dvbusdis.rs index 06b297e..d2f9b3b 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/dvbusdis.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/dvbusdis.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `VBUSDT` reader - Device VBUS discharge time"] pub type VBUSDT_R = crate::FieldReader; #[doc = "Field `VBUSDT` writer - Device VBUS discharge time"] -pub type VBUSDT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type VBUSDT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] #[must_use] - pub fn vbusdt(&mut self) -> VBUSDT_W { - VBUSDT_W::new(self) + pub fn vbusdt(&mut self) -> VBUSDT_W { + VBUSDT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/dvbuspulse.rs b/crates/bcm2837-lpa/src/usb_otg_device/dvbuspulse.rs index 52acecf..ec93af7 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/dvbuspulse.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/dvbuspulse.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DVBUSP` reader - Device VBUS pulsing time"] pub type DVBUSP_R = crate::FieldReader; #[doc = "Field `DVBUSP` writer - Device VBUS pulsing time"] -pub type DVBUSP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 12, O, u16>; +pub type DVBUSP_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] #[must_use] - pub fn dvbusp(&mut self) -> DVBUSP_W { - DVBUSP_W::new(self) + pub fn dvbusp(&mut self) -> DVBUSP_W { + DVBUSP_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint.rs b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint.rs index 0e94feb..adf4157 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint.rs @@ -2,18 +2,40 @@ #[repr(C)] #[derive(Debug)] pub struct IN_ENDPOINT { - #[doc = "0x00 - Control"] - pub diepctl0: DIEPCTL0, + diepctl0: DIEPCTL0, _reserved1: [u8; 0x04], - #[doc = "0x08 - Interrupt"] - pub diepint: DIEPINT, + diepint: DIEPINT, _reserved2: [u8; 0x04], + dieptsiz: DIEPTSIZ, + diepdma: DIEPDMA, + dtxfsts: DTXFSTS, +} +impl IN_ENDPOINT { + #[doc = "0x00 - Control"] + #[inline(always)] + pub const fn diepctl0(&self) -> &DIEPCTL0 { + &self.diepctl0 + } + #[doc = "0x08 - Interrupt"] + #[inline(always)] + pub const fn diepint(&self) -> &DIEPINT { + &self.diepint + } #[doc = "0x10 - Transfer size"] - pub dieptsiz: DIEPTSIZ, + #[inline(always)] + pub const fn dieptsiz(&self) -> &DIEPTSIZ { + &self.dieptsiz + } #[doc = "0x14 - DMA address"] - pub diepdma: DIEPDMA, + #[inline(always)] + pub const fn diepdma(&self) -> &DIEPDMA { + &self.diepdma + } #[doc = "0x18 - Transmit FIFO status"] - pub dtxfsts: DTXFSTS, + #[inline(always)] + pub const fn dtxfsts(&self) -> &DTXFSTS { + &self.dtxfsts + } } #[doc = "DIEPCTL0 (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] module"] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs index 899b0d7..95e8ccd 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepctl0.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `MPSIZ` reader - Maximum packet size"] pub type MPSIZ_R = crate::FieldReader; #[doc = "Field `MPSIZ` writer - Maximum packet size"] -pub type MPSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 11, O, u16>; +pub type MPSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBAEP` reader - USB active endpoint"] pub type USBAEP_R = crate::BitReader; #[doc = "Field `USBAEP` writer - USB active endpoint"] -pub type USBAEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBAEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EONUM_DPID` reader - Even/odd frame"] pub type EONUM_DPID_R = crate::BitReader; #[doc = "Field `NAKSTS` reader - NAK status"] @@ -17,31 +17,31 @@ pub type NAKSTS_R = crate::BitReader; #[doc = "Field `EPTYP` reader - Endpoint type"] pub type EPTYP_R = crate::FieldReader; #[doc = "Field `EPTYP` writer - Endpoint type"] -pub type EPTYP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type EPTYP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `Stall` reader - STALL handshake"] pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL handshake"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub type TXFNUM_R = crate::FieldReader; #[doc = "Field `TXFNUM` writer - TxFIFO number"] -pub type TXFNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SD0PID_SEVNFRM` writer - Set DATA0 PID"] -pub type SD0PID_SEVNFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SD0PID_SEVNFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SODDFRM` writer - Set odd frame"] -pub type SODDFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SODDFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDIS` reader - Endpoint disable"] pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDIS` writer - Endpoint disable"] -pub type EPDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPENA` reader - Endpoint enable"] pub type EPENA_R = crate::BitReader; #[doc = "Field `EPENA` writer - Endpoint enable"] -pub type EPENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] @@ -106,75 +106,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] #[must_use] - pub fn mpsiz(&mut self) -> MPSIZ_W { - MPSIZ_W::new(self) + pub fn mpsiz(&mut self) -> MPSIZ_W { + MPSIZ_W::new(self, 0) } #[doc = "Bit 15 - USB active endpoint"] #[inline(always)] #[must_use] - pub fn usbaep(&mut self) -> USBAEP_W { - USBAEP_W::new(self) + pub fn usbaep(&mut self) -> USBAEP_W { + USBAEP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] #[must_use] - pub fn eptyp(&mut self) -> EPTYP_W { - EPTYP_W::new(self) + pub fn eptyp(&mut self) -> EPTYP_W { + EPTYP_W::new(self, 18) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO number"] #[inline(always)] #[must_use] - pub fn txfnum(&mut self) -> TXFNUM_W { - TXFNUM_W::new(self) + pub fn txfnum(&mut self) -> TXFNUM_W { + TXFNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W { - SD0PID_SEVNFRM_W::new(self) + pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W { + SD0PID_SEVNFRM_W::new(self, 28) } #[doc = "Bit 29 - Set odd frame"] #[inline(always)] #[must_use] - pub fn soddfrm(&mut self) -> SODDFRM_W { - SODDFRM_W::new(self) + pub fn soddfrm(&mut self) -> SODDFRM_W { + SODDFRM_W::new(self, 29) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepdma.rs b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepdma.rs index 18f13ad..7dcd1b3 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepdma.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepint.rs b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepint.rs index bd21aa2..8169c15 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/diepint.rs @@ -5,45 +5,45 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed interrupt"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed interrupt"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDISD` reader - Endpoint disabled interrupt"] pub type EPDISD_R = crate::BitReader; #[doc = "Field `EPDISD` writer - Endpoint disabled interrupt"] -pub type EPDISD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDISD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TOC` reader - Timeout condition"] pub type TOC_R = crate::BitReader; #[doc = "Field `TOC` writer - Timeout condition"] -pub type TOC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TOC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ITTXFE` reader - IN token received when TxFIFO is empty"] pub type ITTXFE_R = crate::BitReader; #[doc = "Field `ITTXFE` writer - IN token received when TxFIFO is empty"] -pub type ITTXFE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ITTXFE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNE` reader - IN endpoint NAK effective"] pub type INEPNE_R = crate::BitReader; #[doc = "Field `INEPNE` writer - IN endpoint NAK effective"] -pub type INEPNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type INEPNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub type TXFE_R = crate::BitReader; #[doc = "Field `TXFIFOUDRN` reader - Transmit Fifo Underrun"] pub type TXFIFOUDRN_R = crate::BitReader; #[doc = "Field `TXFIFOUDRN` writer - Transmit Fifo Underrun"] -pub type TXFIFOUDRN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFIFOUDRN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNA` reader - Buffer not available interrupt"] pub type BNA_R = crate::BitReader; #[doc = "Field `BNA` writer - Buffer not available interrupt"] -pub type BNA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BNA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PKTDRPSTS` reader - Packet dropped status"] pub type PKTDRPSTS_R = crate::BitReader; #[doc = "Field `PKTDRPSTS` writer - Packet dropped status"] -pub type PKTDRPSTS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PKTDRPSTS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BERR` reader - Babble error interrupt"] pub type BERR_R = crate::BitReader; #[doc = "Field `BERR` writer - Babble error interrupt"] -pub type BERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK interrupt"] pub type NAK_R = crate::BitReader; #[doc = "Field `NAK` writer - NAK interrupt"] -pub type NAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] @@ -120,69 +120,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt"] #[inline(always)] #[must_use] - pub fn epdisd(&mut self) -> EPDISD_W { - EPDISD_W::new(self) + pub fn epdisd(&mut self) -> EPDISD_W { + EPDISD_W::new(self, 1) } #[doc = "Bit 3 - Timeout condition"] #[inline(always)] #[must_use] - pub fn toc(&mut self) -> TOC_W { - TOC_W::new(self) + pub fn toc(&mut self) -> TOC_W { + TOC_W::new(self, 3) } #[doc = "Bit 4 - IN token received when TxFIFO is empty"] #[inline(always)] #[must_use] - pub fn ittxfe(&mut self) -> ITTXFE_W { - ITTXFE_W::new(self) + pub fn ittxfe(&mut self) -> ITTXFE_W { + ITTXFE_W::new(self, 4) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] #[must_use] - pub fn inepne(&mut self) -> INEPNE_W { - INEPNE_W::new(self) + pub fn inepne(&mut self) -> INEPNE_W { + INEPNE_W::new(self, 6) } #[doc = "Bit 8 - Transmit Fifo Underrun"] #[inline(always)] #[must_use] - pub fn txfifoudrn(&mut self) -> TXFIFOUDRN_W { - TXFIFOUDRN_W::new(self) + pub fn txfifoudrn(&mut self) -> TXFIFOUDRN_W { + TXFIFOUDRN_W::new(self, 8) } #[doc = "Bit 9 - Buffer not available interrupt"] #[inline(always)] #[must_use] - pub fn bna(&mut self) -> BNA_W { - BNA_W::new(self) + pub fn bna(&mut self) -> BNA_W { + BNA_W::new(self, 9) } #[doc = "Bit 11 - Packet dropped status"] #[inline(always)] #[must_use] - pub fn pktdrpsts(&mut self) -> PKTDRPSTS_W { - PKTDRPSTS_W::new(self) + pub fn pktdrpsts(&mut self) -> PKTDRPSTS_W { + PKTDRPSTS_W::new(self, 11) } #[doc = "Bit 12 - Babble error interrupt"] #[inline(always)] #[must_use] - pub fn berr(&mut self) -> BERR_W { - BERR_W::new(self) + pub fn berr(&mut self) -> BERR_W { + BERR_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self) + pub fn nak(&mut self) -> NAK_W { + NAK_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs index 72226f2..097425e 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dieptsiz.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::FieldReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type PKTCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bits 19:20 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs index abe4eef..9a29e2d 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/in_endpoint/dtxfsts.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Transmit FIFO status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint.rs b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint.rs index 360b7f9..4847d95 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint.rs @@ -2,16 +2,34 @@ #[repr(C)] #[derive(Debug)] pub struct OUT_ENDPOINT { - #[doc = "0x00 - Control"] - pub doepctl: DOEPCTL, + doepctl: DOEPCTL, _reserved1: [u8; 0x04], - #[doc = "0x08 - Interrupt"] - pub doepint: DOEPINT, + doepint: DOEPINT, _reserved2: [u8; 0x04], + doeptsiz: DOEPTSIZ, + doepdma: DOEPDMA, +} +impl OUT_ENDPOINT { + #[doc = "0x00 - Control"] + #[inline(always)] + pub const fn doepctl(&self) -> &DOEPCTL { + &self.doepctl + } + #[doc = "0x08 - Interrupt"] + #[inline(always)] + pub const fn doepint(&self) -> &DOEPINT { + &self.doepint + } #[doc = "0x10 - Transfer size"] - pub doeptsiz: DOEPTSIZ, + #[inline(always)] + pub const fn doeptsiz(&self) -> &DOEPTSIZ { + &self.doeptsiz + } #[doc = "0x14 - DMA address"] - pub doepdma: DOEPDMA, + #[inline(always)] + pub const fn doepdma(&self) -> &DOEPDMA { + &self.doepdma + } } #[doc = "DOEPCTL (rw) register accessor: Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl`] module"] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepctl.rs b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepctl.rs index 47f7dd2..074b02c 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepctl.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepctl.rs @@ -13,19 +13,19 @@ pub type EPTYP_R = crate::FieldReader; #[doc = "Field `SNPM` reader - Snoop mode"] pub type SNPM_R = crate::BitReader; #[doc = "Field `SNPM` writer - Snoop mode"] -pub type SNPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL handshake"] pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL handshake"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDIS` reader - Endpoint disable"] pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPENA` writer - Endpoint enable"] -pub type EPENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum packet size"] #[inline(always)] @@ -78,39 +78,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 20 - Snoop mode"] #[inline(always)] #[must_use] - pub fn snpm(&mut self) -> SNPM_W { - SNPM_W::new(self) + pub fn snpm(&mut self) -> SNPM_W { + SNPM_W::new(self, 20) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepdma.rs b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepdma.rs index ab7d95d..70f37e1 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepdma.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepint.rs b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepint.rs index 0552c9b..b756a89 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doepint.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed interrupt"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed interrupt"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDISD` reader - Endpoint disabled interrupt"] pub type EPDISD_R = crate::BitReader; #[doc = "Field `EPDISD` writer - Endpoint disabled interrupt"] -pub type EPDISD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDISD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUP` reader - SETUP phase done"] pub type STUP_R = crate::BitReader; #[doc = "Field `STUP` writer - SETUP phase done"] -pub type STUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTEPDIS` reader - OUT token received when endpoint disabled"] pub type OTEPDIS_R = crate::BitReader; #[doc = "Field `OTEPDIS` writer - OUT token received when endpoint disabled"] -pub type OTEPDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTEPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `B2BSTUP` reader - Back-to-back SETUP packets received"] pub type B2BSTUP_R = crate::BitReader; #[doc = "Field `B2BSTUP` writer - Back-to-back SETUP packets received"] -pub type B2BSTUP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type B2BSTUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - NYET interrupt"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - NYET interrupt"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Endpoint disabled interrupt"] #[inline(always)] #[must_use] - pub fn epdisd(&mut self) -> EPDISD_W { - EPDISD_W::new(self) + pub fn epdisd(&mut self) -> EPDISD_W { + EPDISD_W::new(self, 1) } #[doc = "Bit 3 - SETUP phase done"] #[inline(always)] #[must_use] - pub fn stup(&mut self) -> STUP_W { - STUP_W::new(self) + pub fn stup(&mut self) -> STUP_W { + STUP_W::new(self, 3) } #[doc = "Bit 4 - OUT token received when endpoint disabled"] #[inline(always)] #[must_use] - pub fn otepdis(&mut self) -> OTEPDIS_W { - OTEPDIS_W::new(self) + pub fn otepdis(&mut self) -> OTEPDIS_W { + OTEPDIS_W::new(self, 4) } #[doc = "Bit 6 - Back-to-back SETUP packets received"] #[inline(always)] #[must_use] - pub fn b2bstup(&mut self) -> B2BSTUP_W { - B2BSTUP_W::new(self) + pub fn b2bstup(&mut self) -> B2BSTUP_W { + B2BSTUP_W::new(self, 6) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs index 4606c37..37d01d3 100644 --- a/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs +++ b/crates/bcm2837-lpa/src/usb_otg_device/out_endpoint/doeptsiz.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::BitReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PKTCNT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STUPCNT` reader - SETUP packet count"] pub type STUPCNT_R = crate::FieldReader; #[doc = "Field `STUPCNT` writer - SETUP packet count"] -pub type STUPCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type STUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bit 19 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP packet count"] #[inline(always)] #[must_use] - pub fn stupcnt(&mut self) -> STUPCNT_W { - STUPCNT_W::new(self) + pub fn stupcnt(&mut self) -> STUPCNT_W { + STUPCNT_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global.rs b/crates/bcm2837-lpa/src/usb_otg_global.rs index d8a5a57..f188fac 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global.rs @@ -2,87 +2,175 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - OTG_HS control and status register"] - pub gotgctl: GOTGCTL, - #[doc = "0x04 - OTG_HS interrupt register"] - pub gotgint: GOTGINT, - #[doc = "0x08 - OTG_HS AHB configuration register"] - pub gahbcfg: GAHBCFG, - #[doc = "0x0c - OTG_HS USB configuration register"] - pub gusbcfg: GUSBCFG, - #[doc = "0x10 - OTG_HS reset register"] - pub grstctl: GRSTCTL, - #[doc = "0x14 - OTG_HS core interrupt register"] - pub gintsts: GINTSTS, - #[doc = "0x18 - OTG_HS interrupt mask register"] - pub gintmsk: GINTMSK, + gotgctl: GOTGCTL, + gotgint: GOTGINT, + gahbcfg: GAHBCFG, + gusbcfg: GUSBCFG, + grstctl: GRSTCTL, + gintsts: GINTSTS, + gintmsk: GINTMSK, _reserved_7_grxstsr: [u8; 0x04], _reserved_8_grxstsp: [u8; 0x04], - #[doc = "0x24 - OTG_HS Receive FIFO size register"] - pub grxfsiz: GRXFSIZ, + grxfsiz: GRXFSIZ, _reserved_10_gnptxfsiz_host: [u8; 0x04], - #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"] - pub gnptxsts: GNPTXSTS, + gnptxsts: GNPTXSTS, _reserved12: [u8; 0x08], - #[doc = "0x38 - OTG_HS general core configuration register"] - pub gccfg: GCCFG, - #[doc = "0x3c - OTG_HS core ID register"] - pub cid: CID, - #[doc = "0x40 - OTG_HS vendor ID register"] - pub vid: VID, - #[doc = "0x44 - Direction"] - pub hw_direction: HW_DIRECTION, - #[doc = "0x48 - Hardware Config 0"] - pub hw_config0: HW_CONFIG0, + gccfg: GCCFG, + cid: CID, + vid: VID, + hw_direction: HW_DIRECTION, + hw_config0: HW_CONFIG0, _reserved17: [u8; 0xb4], - #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"] - pub hptxfsiz: HPTXFSIZ, - #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf1: DIEPTXF1, - #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf2: DIEPTXF2, + hptxfsiz: HPTXFSIZ, + dieptxf1: DIEPTXF1, + dieptxf2: DIEPTXF2, _reserved20: [u8; 0x10], - #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf3: DIEPTXF3, - #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf4: DIEPTXF4, - #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf5: DIEPTXF5, - #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf6: DIEPTXF6, - #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"] - pub dieptxf7: DIEPTXF7, + dieptxf3: DIEPTXF3, + dieptxf4: DIEPTXF4, + dieptxf5: DIEPTXF5, + dieptxf6: DIEPTXF6, + dieptxf7: DIEPTXF7, } impl RegisterBlock { + #[doc = "0x00 - OTG_HS control and status register"] + #[inline(always)] + pub const fn gotgctl(&self) -> &GOTGCTL { + &self.gotgctl + } + #[doc = "0x04 - OTG_HS interrupt register"] + #[inline(always)] + pub const fn gotgint(&self) -> &GOTGINT { + &self.gotgint + } + #[doc = "0x08 - OTG_HS AHB configuration register"] + #[inline(always)] + pub const fn gahbcfg(&self) -> &GAHBCFG { + &self.gahbcfg + } + #[doc = "0x0c - OTG_HS USB configuration register"] + #[inline(always)] + pub const fn gusbcfg(&self) -> &GUSBCFG { + &self.gusbcfg + } + #[doc = "0x10 - OTG_HS reset register"] + #[inline(always)] + pub const fn grstctl(&self) -> &GRSTCTL { + &self.grstctl + } + #[doc = "0x14 - OTG_HS core interrupt register"] + #[inline(always)] + pub const fn gintsts(&self) -> &GINTSTS { + &self.gintsts + } + #[doc = "0x18 - OTG_HS interrupt mask register"] + #[inline(always)] + pub const fn gintmsk(&self) -> &GINTMSK { + &self.gintmsk + } #[doc = "0x1c - OTG_HS Receive status debug read register (peripheral mode mode)"] #[inline(always)] pub const fn grxstsr_peripheral(&self) -> &GRXSTSR_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(28usize).cast() } + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x1c - OTG_HS Receive status debug read register (host mode)"] #[inline(always)] pub const fn grxstsr_host(&self) -> &GRXSTSR_HOST { - unsafe { &*(self as *const Self).cast::().add(28usize).cast() } + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x20 - OTG_HS status read and pop register (peripheral mode)"] #[inline(always)] pub const fn grxstsp_peripheral(&self) -> &GRXSTSP_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(32usize).cast() } + unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x20 - OTG_HS status read and pop register (host mode)"] #[inline(always)] pub const fn grxstsp_host(&self) -> &GRXSTSP_HOST { - unsafe { &*(self as *const Self).cast::().add(32usize).cast() } + unsafe { &*(self as *const Self).cast::().add(32).cast() } + } + #[doc = "0x24 - OTG_HS Receive FIFO size register"] + #[inline(always)] + pub const fn grxfsiz(&self) -> &GRXFSIZ { + &self.grxfsiz } #[doc = "0x28 - Endpoint 0 transmit FIFO size (peripheral mode)"] #[inline(always)] pub const fn tx0fsiz_peripheral(&self) -> &TX0FSIZ_PERIPHERAL { - unsafe { &*(self as *const Self).cast::().add(40usize).cast() } + unsafe { &*(self as *const Self).cast::().add(40).cast() } } #[doc = "0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)"] #[inline(always)] pub const fn gnptxfsiz_host(&self) -> &GNPTXFSIZ_HOST { - unsafe { &*(self as *const Self).cast::().add(40usize).cast() } + unsafe { &*(self as *const Self).cast::().add(40).cast() } + } + #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"] + #[inline(always)] + pub const fn gnptxsts(&self) -> &GNPTXSTS { + &self.gnptxsts + } + #[doc = "0x38 - OTG_HS general core configuration register"] + #[inline(always)] + pub const fn gccfg(&self) -> &GCCFG { + &self.gccfg + } + #[doc = "0x3c - OTG_HS core ID register"] + #[inline(always)] + pub const fn cid(&self) -> &CID { + &self.cid + } + #[doc = "0x40 - OTG_HS vendor ID register"] + #[inline(always)] + pub const fn vid(&self) -> &VID { + &self.vid + } + #[doc = "0x44 - Direction"] + #[inline(always)] + pub const fn hw_direction(&self) -> &HW_DIRECTION { + &self.hw_direction + } + #[doc = "0x48 - Hardware Config 0"] + #[inline(always)] + pub const fn hw_config0(&self) -> &HW_CONFIG0 { + &self.hw_config0 + } + #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"] + #[inline(always)] + pub const fn hptxfsiz(&self) -> &HPTXFSIZ { + &self.hptxfsiz + } + #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf1(&self) -> &DIEPTXF1 { + &self.dieptxf1 + } + #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf2(&self) -> &DIEPTXF2 { + &self.dieptxf2 + } + #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf3(&self) -> &DIEPTXF3 { + &self.dieptxf3 + } + #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf4(&self) -> &DIEPTXF4 { + &self.dieptxf4 + } + #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf5(&self) -> &DIEPTXF5 { + &self.dieptxf5 + } + #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf6(&self) -> &DIEPTXF6 { + &self.dieptxf6 + } + #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf7(&self) -> &DIEPTXF7 { + &self.dieptxf7 } } #[doc = "GOTGCTL (rw) register accessor: OTG_HS control and status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgctl`] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/cid.rs b/crates/bcm2837-lpa/src/usb_otg_global/cid.rs index c840ab9..4b8e59f 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/cid.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/cid.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PRODUCT_ID` reader - Product ID field"] pub type PRODUCT_ID_R = crate::FieldReader; #[doc = "Field `PRODUCT_ID` writer - Product ID field"] -pub type PRODUCT_ID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type PRODUCT_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Product ID field"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - Product ID field"] #[inline(always)] #[must_use] - pub fn product_id(&mut self) -> PRODUCT_ID_W { - PRODUCT_ID_W::new(self) + pub fn product_id(&mut self) -> PRODUCT_ID_W { + PRODUCT_ID_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf1.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf1.rs index 52be8d1..d47b830 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf1.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf1.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf2.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf2.rs index ce63253..4c6ba9e 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf2.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf2.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf3.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf3.rs index 18a518c..67c7e3d 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf3.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf3.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf4.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf4.rs index 9b23f1d..516d2f0 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf4.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf4.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf5.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf5.rs index 03b144c..33964f8 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf5.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf5.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf6.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf6.rs index 57dcb25..783237e 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf6.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf6.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf7.rs b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf7.rs index 7a99ea4..2ae512e 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/dieptxf7.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/dieptxf7.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `INEPTXSA` reader - IN endpoint FIFOx transmit RAM start address"] pub type INEPTXSA_R = crate::FieldReader; #[doc = "Field `INEPTXSA` writer - IN endpoint FIFOx transmit RAM start address"] -pub type INEPTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTXFD` reader - IN endpoint TxFIFO depth"] pub type INEPTXFD_R = crate::FieldReader; #[doc = "Field `INEPTXFD` writer - IN endpoint TxFIFO depth"] -pub type INEPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type INEPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFOx transmit RAM start address"] #[inline(always)] #[must_use] - pub fn ineptxsa(&mut self) -> INEPTXSA_W { - INEPTXSA_W::new(self) + pub fn ineptxsa(&mut self) -> INEPTXSA_W { + INEPTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ineptxfd(&mut self) -> INEPTXFD_W { - INEPTXFD_W::new(self) + pub fn ineptxfd(&mut self) -> INEPTXFD_W { + INEPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gahbcfg.rs b/crates/bcm2837-lpa/src/usb_otg_global/gahbcfg.rs index a135db6..b2d3d76 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gahbcfg.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gahbcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `GINT` reader - Global interrupt mask"] pub type GINT_R = crate::BitReader; #[doc = "Field `GINT` writer - Global interrupt mask"] -pub type GINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AXI_BURST` reader - Maximum AXI burst length"] pub type AXI_BURST_R = crate::FieldReader; #[doc = "Maximum AXI burst length\n\nValue on reset: 0"] @@ -64,8 +64,8 @@ impl AXI_BURST_R { } } #[doc = "Field `AXI_BURST` writer - Maximum AXI burst length"] -pub type AXI_BURST_W<'a, REG, const O: u8> = crate::FieldWriterSafe<'a, REG, 2, O, BURST_A>; -impl<'a, REG, const O: u8> AXI_BURST_W<'a, REG, O> +pub type AXI_BURST_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, BURST_A>; +impl<'a, REG> AXI_BURST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -94,19 +94,19 @@ where #[doc = "Field `AXI_WAIT` reader - Wait for all AXI writes before signaling DMA"] pub type AXI_WAIT_R = crate::BitReader; #[doc = "Field `AXI_WAIT` writer - Wait for all AXI writes before signaling DMA"] -pub type AXI_WAIT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AXI_WAIT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAEN` reader - DMA enable"] pub type DMAEN_R = crate::BitReader; #[doc = "Field `DMAEN` writer - DMA enable"] -pub type DMAEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFELVL` reader - TxFIFO empty level"] pub type TXFELVL_R = crate::BitReader; #[doc = "Field `TXFELVL` writer - TxFIFO empty level"] -pub type TXFELVL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFELVL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTXFELVL` reader - Periodic TxFIFO empty level"] pub type PTXFELVL_R = crate::BitReader; #[doc = "Field `PTXFELVL` writer - Periodic TxFIFO empty level"] -pub type PTXFELVL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTXFELVL_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Global interrupt mask"] #[inline(always)] @@ -153,45 +153,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Global interrupt mask"] #[inline(always)] #[must_use] - pub fn gint(&mut self) -> GINT_W { - GINT_W::new(self) + pub fn gint(&mut self) -> GINT_W { + GINT_W::new(self, 0) } #[doc = "Bits 1:2 - Maximum AXI burst length"] #[inline(always)] #[must_use] - pub fn axi_burst(&mut self) -> AXI_BURST_W { - AXI_BURST_W::new(self) + pub fn axi_burst(&mut self) -> AXI_BURST_W { + AXI_BURST_W::new(self, 1) } #[doc = "Bit 4 - Wait for all AXI writes before signaling DMA"] #[inline(always)] #[must_use] - pub fn axi_wait(&mut self) -> AXI_WAIT_W { - AXI_WAIT_W::new(self) + pub fn axi_wait(&mut self) -> AXI_WAIT_W { + AXI_WAIT_W::new(self, 4) } #[doc = "Bit 5 - DMA enable"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 5) } #[doc = "Bit 7 - TxFIFO empty level"] #[inline(always)] #[must_use] - pub fn txfelvl(&mut self) -> TXFELVL_W { - TXFELVL_W::new(self) + pub fn txfelvl(&mut self) -> TXFELVL_W { + TXFELVL_W::new(self, 7) } #[doc = "Bit 8 - Periodic TxFIFO empty level"] #[inline(always)] #[must_use] - pub fn ptxfelvl(&mut self) -> PTXFELVL_W { - PTXFELVL_W::new(self) + pub fn ptxfelvl(&mut self) -> PTXFELVL_W { + PTXFELVL_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gccfg.rs b/crates/bcm2837-lpa/src/usb_otg_global/gccfg.rs index 6612077..462ba59 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gccfg.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gccfg.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `PWRDWN` reader - Power down"] pub type PWRDWN_R = crate::BitReader; #[doc = "Field `PWRDWN` writer - Power down"] -pub type PWRDWN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWRDWN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2CPADEN` reader - Enable I2C bus connection for the external I2C PHY interface"] pub type I2CPADEN_R = crate::BitReader; #[doc = "Field `I2CPADEN` writer - Enable I2C bus connection for the external I2C PHY interface"] -pub type I2CPADEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type I2CPADEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VBUSASEN` reader - Enable the VBUS sensing device"] pub type VBUSASEN_R = crate::BitReader; #[doc = "Field `VBUSASEN` writer - Enable the VBUS sensing device"] -pub type VBUSASEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VBUSASEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VBUSBSEN` reader - Enable the VBUS sensing device"] pub type VBUSBSEN_R = crate::BitReader; #[doc = "Field `VBUSBSEN` writer - Enable the VBUS sensing device"] -pub type VBUSBSEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type VBUSBSEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOFOUTEN` reader - SOF output enable"] pub type SOFOUTEN_R = crate::BitReader; #[doc = "Field `SOFOUTEN` writer - SOF output enable"] -pub type SOFOUTEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOFOUTEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NOVBUSSENS` reader - VBUS sensing disable option"] pub type NOVBUSSENS_R = crate::BitReader; #[doc = "Field `NOVBUSSENS` writer - VBUS sensing disable option"] -pub type NOVBUSSENS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NOVBUSSENS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - Power down"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 16 - Power down"] #[inline(always)] #[must_use] - pub fn pwrdwn(&mut self) -> PWRDWN_W { - PWRDWN_W::new(self) + pub fn pwrdwn(&mut self) -> PWRDWN_W { + PWRDWN_W::new(self, 16) } #[doc = "Bit 17 - Enable I2C bus connection for the external I2C PHY interface"] #[inline(always)] #[must_use] - pub fn i2cpaden(&mut self) -> I2CPADEN_W { - I2CPADEN_W::new(self) + pub fn i2cpaden(&mut self) -> I2CPADEN_W { + I2CPADEN_W::new(self, 17) } #[doc = "Bit 18 - Enable the VBUS sensing device"] #[inline(always)] #[must_use] - pub fn vbusasen(&mut self) -> VBUSASEN_W { - VBUSASEN_W::new(self) + pub fn vbusasen(&mut self) -> VBUSASEN_W { + VBUSASEN_W::new(self, 18) } #[doc = "Bit 19 - Enable the VBUS sensing device"] #[inline(always)] #[must_use] - pub fn vbusbsen(&mut self) -> VBUSBSEN_W { - VBUSBSEN_W::new(self) + pub fn vbusbsen(&mut self) -> VBUSBSEN_W { + VBUSBSEN_W::new(self, 19) } #[doc = "Bit 20 - SOF output enable"] #[inline(always)] #[must_use] - pub fn sofouten(&mut self) -> SOFOUTEN_W { - SOFOUTEN_W::new(self) + pub fn sofouten(&mut self) -> SOFOUTEN_W { + SOFOUTEN_W::new(self, 20) } #[doc = "Bit 21 - VBUS sensing disable option"] #[inline(always)] #[must_use] - pub fn novbussens(&mut self) -> NOVBUSSENS_W { - NOVBUSSENS_W::new(self) + pub fn novbussens(&mut self) -> NOVBUSSENS_W { + NOVBUSSENS_W::new(self, 21) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gintmsk.rs b/crates/bcm2837-lpa/src/usb_otg_global/gintmsk.rs index 1a856d7..0402414 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gintmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gintmsk.rs @@ -5,105 +5,105 @@ pub type W = crate::W; #[doc = "Field `MMISM` reader - Mode mismatch interrupt mask"] pub type MMISM_R = crate::BitReader; #[doc = "Field `MMISM` writer - Mode mismatch interrupt mask"] -pub type MMISM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MMISM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGINT` reader - OTG interrupt mask"] pub type OTGINT_R = crate::BitReader; #[doc = "Field `OTGINT` writer - OTG interrupt mask"] -pub type OTGINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OTGINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOFM` reader - Start of frame mask"] pub type SOFM_R = crate::BitReader; #[doc = "Field `SOFM` writer - Start of frame mask"] -pub type SOFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFLVLM` reader - Receive FIFO nonempty mask"] pub type RXFLVLM_R = crate::BitReader; #[doc = "Field `RXFLVLM` writer - Receive FIFO nonempty mask"] -pub type RXFLVLM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFLVLM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NPTXFEM` reader - Nonperiodic TxFIFO empty mask"] pub type NPTXFEM_R = crate::BitReader; #[doc = "Field `NPTXFEM` writer - Nonperiodic TxFIFO empty mask"] -pub type NPTXFEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NPTXFEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINAKEFFM` reader - Global nonperiodic IN NAK effective mask"] pub type GINAKEFFM_R = crate::BitReader; #[doc = "Field `GINAKEFFM` writer - Global nonperiodic IN NAK effective mask"] -pub type GINAKEFFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GINAKEFFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GONAKEFFM` reader - Global OUT NAK effective mask"] pub type GONAKEFFM_R = crate::BitReader; #[doc = "Field `GONAKEFFM` writer - Global OUT NAK effective mask"] -pub type GONAKEFFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GONAKEFFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESUSPM` reader - Early suspend mask"] pub type ESUSPM_R = crate::BitReader; #[doc = "Field `ESUSPM` writer - Early suspend mask"] -pub type ESUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSUSPM` reader - USB suspend mask"] pub type USBSUSPM_R = crate::BitReader; #[doc = "Field `USBSUSPM` writer - USB suspend mask"] -pub type USBSUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBSUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRST` reader - USB reset mask"] pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRST` writer - USB reset mask"] -pub type USBRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENUMDNEM` reader - Enumeration done mask"] pub type ENUMDNEM_R = crate::BitReader; #[doc = "Field `ENUMDNEM` writer - Enumeration done mask"] -pub type ENUMDNEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENUMDNEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOODRPM` reader - Isochronous OUT packet dropped interrupt mask"] pub type ISOODRPM_R = crate::BitReader; #[doc = "Field `ISOODRPM` writer - Isochronous OUT packet dropped interrupt mask"] -pub type ISOODRPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOODRPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPFM` reader - End of periodic frame interrupt mask"] pub type EOPFM_R = crate::BitReader; #[doc = "Field `EOPFM` writer - End of periodic frame interrupt mask"] -pub type EOPFM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOPFM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPMISM` reader - Endpoint mismatch interrupt mask"] pub type EPMISM_R = crate::BitReader; #[doc = "Field `EPMISM` writer - Endpoint mismatch interrupt mask"] -pub type EPMISM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPMISM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPINT` reader - IN endpoints interrupt mask"] pub type IEPINT_R = crate::BitReader; #[doc = "Field `IEPINT` writer - IN endpoints interrupt mask"] -pub type IEPINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IEPINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEPINT` reader - OUT endpoints interrupt mask"] pub type OEPINT_R = crate::BitReader; #[doc = "Field `OEPINT` writer - OUT endpoints interrupt mask"] -pub type OEPINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type OEPINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IISOIXFRM` reader - Incomplete isochronous IN transfer mask"] pub type IISOIXFRM_R = crate::BitReader; #[doc = "Field `IISOIXFRM` writer - Incomplete isochronous IN transfer mask"] -pub type IISOIXFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IISOIXFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PXFRM_IISOOXFRM` reader - Incomplete periodic transfer mask"] pub type PXFRM_IISOOXFRM_R = crate::BitReader; #[doc = "Field `PXFRM_IISOOXFRM` writer - Incomplete periodic transfer mask"] -pub type PXFRM_IISOOXFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PXFRM_IISOOXFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSUSPM` reader - Data fetch suspended mask"] pub type FSUSPM_R = crate::BitReader; #[doc = "Field `FSUSPM` writer - Data fetch suspended mask"] -pub type FSUSPM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FSUSPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRTIM` reader - Host port interrupt mask"] pub type PRTIM_R = crate::BitReader; #[doc = "Field `HCIM` reader - Host channels interrupt mask"] pub type HCIM_R = crate::BitReader; #[doc = "Field `HCIM` writer - Host channels interrupt mask"] -pub type HCIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HCIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTXFEM` reader - Periodic TxFIFO empty mask"] pub type PTXFEM_R = crate::BitReader; #[doc = "Field `PTXFEM` writer - Periodic TxFIFO empty mask"] -pub type PTXFEM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTXFEM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CIDSCHGM` reader - Connector ID status change mask"] pub type CIDSCHGM_R = crate::BitReader; #[doc = "Field `CIDSCHGM` writer - Connector ID status change mask"] -pub type CIDSCHGM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CIDSCHGM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCINT` reader - Disconnect detected interrupt mask"] pub type DISCINT_R = crate::BitReader; #[doc = "Field `DISCINT` writer - Disconnect detected interrupt mask"] -pub type DISCINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DISCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRQIM` reader - Session request/new session detected interrupt mask"] pub type SRQIM_R = crate::BitReader; #[doc = "Field `SRQIM` writer - Session request/new session detected interrupt mask"] -pub type SRQIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQIM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WUIM` reader - Resume/remote wakeup detected interrupt mask"] pub type WUIM_R = crate::BitReader; #[doc = "Field `WUIM` writer - Resume/remote wakeup detected interrupt mask"] -pub type WUIM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WUIM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Mode mismatch interrupt mask"] #[inline(always)] @@ -273,159 +273,159 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Mode mismatch interrupt mask"] #[inline(always)] #[must_use] - pub fn mmism(&mut self) -> MMISM_W { - MMISM_W::new(self) + pub fn mmism(&mut self) -> MMISM_W { + MMISM_W::new(self, 1) } #[doc = "Bit 2 - OTG interrupt mask"] #[inline(always)] #[must_use] - pub fn otgint(&mut self) -> OTGINT_W { - OTGINT_W::new(self) + pub fn otgint(&mut self) -> OTGINT_W { + OTGINT_W::new(self, 2) } #[doc = "Bit 3 - Start of frame mask"] #[inline(always)] #[must_use] - pub fn sofm(&mut self) -> SOFM_W { - SOFM_W::new(self) + pub fn sofm(&mut self) -> SOFM_W { + SOFM_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO nonempty mask"] #[inline(always)] #[must_use] - pub fn rxflvlm(&mut self) -> RXFLVLM_W { - RXFLVLM_W::new(self) + pub fn rxflvlm(&mut self) -> RXFLVLM_W { + RXFLVLM_W::new(self, 4) } #[doc = "Bit 5 - Nonperiodic TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn nptxfem(&mut self) -> NPTXFEM_W { - NPTXFEM_W::new(self) + pub fn nptxfem(&mut self) -> NPTXFEM_W { + NPTXFEM_W::new(self, 5) } #[doc = "Bit 6 - Global nonperiodic IN NAK effective mask"] #[inline(always)] #[must_use] - pub fn ginakeffm(&mut self) -> GINAKEFFM_W { - GINAKEFFM_W::new(self) + pub fn ginakeffm(&mut self) -> GINAKEFFM_W { + GINAKEFFM_W::new(self, 6) } #[doc = "Bit 7 - Global OUT NAK effective mask"] #[inline(always)] #[must_use] - pub fn gonakeffm(&mut self) -> GONAKEFFM_W { - GONAKEFFM_W::new(self) + pub fn gonakeffm(&mut self) -> GONAKEFFM_W { + GONAKEFFM_W::new(self, 7) } #[doc = "Bit 10 - Early suspend mask"] #[inline(always)] #[must_use] - pub fn esuspm(&mut self) -> ESUSPM_W { - ESUSPM_W::new(self) + pub fn esuspm(&mut self) -> ESUSPM_W { + ESUSPM_W::new(self, 10) } #[doc = "Bit 11 - USB suspend mask"] #[inline(always)] #[must_use] - pub fn usbsuspm(&mut self) -> USBSUSPM_W { - USBSUSPM_W::new(self) + pub fn usbsuspm(&mut self) -> USBSUSPM_W { + USBSUSPM_W::new(self, 11) } #[doc = "Bit 12 - USB reset mask"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration done mask"] #[inline(always)] #[must_use] - pub fn enumdnem(&mut self) -> ENUMDNEM_W { - ENUMDNEM_W::new(self) + pub fn enumdnem(&mut self) -> ENUMDNEM_W { + ENUMDNEM_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt mask"] #[inline(always)] #[must_use] - pub fn isoodrpm(&mut self) -> ISOODRPM_W { - ISOODRPM_W::new(self) + pub fn isoodrpm(&mut self) -> ISOODRPM_W { + ISOODRPM_W::new(self, 14) } #[doc = "Bit 15 - End of periodic frame interrupt mask"] #[inline(always)] #[must_use] - pub fn eopfm(&mut self) -> EOPFM_W { - EOPFM_W::new(self) + pub fn eopfm(&mut self) -> EOPFM_W { + EOPFM_W::new(self, 15) } #[doc = "Bit 17 - Endpoint mismatch interrupt mask"] #[inline(always)] #[must_use] - pub fn epmism(&mut self) -> EPMISM_W { - EPMISM_W::new(self) + pub fn epmism(&mut self) -> EPMISM_W { + EPMISM_W::new(self, 17) } #[doc = "Bit 18 - IN endpoints interrupt mask"] #[inline(always)] #[must_use] - pub fn iepint(&mut self) -> IEPINT_W { - IEPINT_W::new(self) + pub fn iepint(&mut self) -> IEPINT_W { + IEPINT_W::new(self, 18) } #[doc = "Bit 19 - OUT endpoints interrupt mask"] #[inline(always)] #[must_use] - pub fn oepint(&mut self) -> OEPINT_W { - OEPINT_W::new(self) + pub fn oepint(&mut self) -> OEPINT_W { + OEPINT_W::new(self, 19) } #[doc = "Bit 20 - Incomplete isochronous IN transfer mask"] #[inline(always)] #[must_use] - pub fn iisoixfrm(&mut self) -> IISOIXFRM_W { - IISOIXFRM_W::new(self) + pub fn iisoixfrm(&mut self) -> IISOIXFRM_W { + IISOIXFRM_W::new(self, 20) } #[doc = "Bit 21 - Incomplete periodic transfer mask"] #[inline(always)] #[must_use] - pub fn pxfrm_iisooxfrm(&mut self) -> PXFRM_IISOOXFRM_W { - PXFRM_IISOOXFRM_W::new(self) + pub fn pxfrm_iisooxfrm(&mut self) -> PXFRM_IISOOXFRM_W { + PXFRM_IISOOXFRM_W::new(self, 21) } #[doc = "Bit 22 - Data fetch suspended mask"] #[inline(always)] #[must_use] - pub fn fsuspm(&mut self) -> FSUSPM_W { - FSUSPM_W::new(self) + pub fn fsuspm(&mut self) -> FSUSPM_W { + FSUSPM_W::new(self, 22) } #[doc = "Bit 25 - Host channels interrupt mask"] #[inline(always)] #[must_use] - pub fn hcim(&mut self) -> HCIM_W { - HCIM_W::new(self) + pub fn hcim(&mut self) -> HCIM_W { + HCIM_W::new(self, 25) } #[doc = "Bit 26 - Periodic TxFIFO empty mask"] #[inline(always)] #[must_use] - pub fn ptxfem(&mut self) -> PTXFEM_W { - PTXFEM_W::new(self) + pub fn ptxfem(&mut self) -> PTXFEM_W { + PTXFEM_W::new(self, 26) } #[doc = "Bit 28 - Connector ID status change mask"] #[inline(always)] #[must_use] - pub fn cidschgm(&mut self) -> CIDSCHGM_W { - CIDSCHGM_W::new(self) + pub fn cidschgm(&mut self) -> CIDSCHGM_W { + CIDSCHGM_W::new(self, 28) } #[doc = "Bit 29 - Disconnect detected interrupt mask"] #[inline(always)] #[must_use] - pub fn discint(&mut self) -> DISCINT_W { - DISCINT_W::new(self) + pub fn discint(&mut self) -> DISCINT_W { + DISCINT_W::new(self, 29) } #[doc = "Bit 30 - Session request/new session detected interrupt mask"] #[inline(always)] #[must_use] - pub fn srqim(&mut self) -> SRQIM_W { - SRQIM_W::new(self) + pub fn srqim(&mut self) -> SRQIM_W { + SRQIM_W::new(self, 30) } #[doc = "Bit 31 - Resume/remote wakeup detected interrupt mask"] #[inline(always)] #[must_use] - pub fn wuim(&mut self) -> WUIM_W { - WUIM_W::new(self) + pub fn wuim(&mut self) -> WUIM_W { + WUIM_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gintsts.rs b/crates/bcm2837-lpa/src/usb_otg_global/gintsts.rs index 513d718..ba0c53b 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gintsts.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gintsts.rs @@ -7,13 +7,13 @@ pub type CMOD_R = crate::BitReader; #[doc = "Field `MMIS` reader - Mode mismatch interrupt"] pub type MMIS_R = crate::BitReader; #[doc = "Field `MMIS` writer - Mode mismatch interrupt"] -pub type MMIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type MMIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGINT` reader - OTG interrupt"] pub type OTGINT_R = crate::BitReader; #[doc = "Field `SOF` reader - Start of frame"] pub type SOF_R = crate::BitReader; #[doc = "Field `SOF` writer - Start of frame"] -pub type SOF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFLVL` reader - RxFIFO nonempty"] pub type RXFLVL_R = crate::BitReader; #[doc = "Field `NPTXFE` reader - Nonperiodic TxFIFO empty"] @@ -25,27 +25,27 @@ pub type BOUTNAKEFF_R = crate::BitReader; #[doc = "Field `ESUSP` reader - Early suspend"] pub type ESUSP_R = crate::BitReader; #[doc = "Field `ESUSP` writer - Early suspend"] -pub type ESUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSUSP` reader - USB suspend"] pub type USBSUSP_R = crate::BitReader; #[doc = "Field `USBSUSP` writer - USB suspend"] -pub type USBSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRST` reader - USB reset"] pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRST` writer - USB reset"] -pub type USBRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENUMDNE` reader - Enumeration done"] pub type ENUMDNE_R = crate::BitReader; #[doc = "Field `ENUMDNE` writer - Enumeration done"] -pub type ENUMDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENUMDNE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOODRP` reader - Isochronous OUT packet dropped interrupt"] pub type ISOODRP_R = crate::BitReader; #[doc = "Field `ISOODRP` writer - Isochronous OUT packet dropped interrupt"] -pub type ISOODRP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ISOODRP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPF` reader - End of periodic frame interrupt"] pub type EOPF_R = crate::BitReader; #[doc = "Field `EOPF` writer - End of periodic frame interrupt"] -pub type EOPF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EOPF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPINT` reader - IN endpoint interrupt"] pub type IEPINT_R = crate::BitReader; #[doc = "Field `OEPINT` reader - OUT endpoint interrupt"] @@ -53,15 +53,15 @@ pub type OEPINT_R = crate::BitReader; #[doc = "Field `IISOIXFR` reader - Incomplete isochronous IN transfer"] pub type IISOIXFR_R = crate::BitReader; #[doc = "Field `IISOIXFR` writer - Incomplete isochronous IN transfer"] -pub type IISOIXFR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IISOIXFR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PXFR_INCOMPISOOUT` reader - Incomplete periodic transfer"] pub type PXFR_INCOMPISOOUT_R = crate::BitReader; #[doc = "Field `PXFR_INCOMPISOOUT` writer - Incomplete periodic transfer"] -pub type PXFR_INCOMPISOOUT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PXFR_INCOMPISOOUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DATAFSUSP` reader - Data fetch suspended"] pub type DATAFSUSP_R = crate::BitReader; #[doc = "Field `DATAFSUSP` writer - Data fetch suspended"] -pub type DATAFSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DATAFSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HPRTINT` reader - Host port interrupt"] pub type HPRTINT_R = crate::BitReader; #[doc = "Field `HCINT` reader - Host channels interrupt"] @@ -71,19 +71,19 @@ pub type PTXFE_R = crate::BitReader; #[doc = "Field `CIDSCHG` reader - Connector ID status change"] pub type CIDSCHG_R = crate::BitReader; #[doc = "Field `CIDSCHG` writer - Connector ID status change"] -pub type CIDSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CIDSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCINT` reader - Disconnect detected interrupt"] pub type DISCINT_R = crate::BitReader; #[doc = "Field `DISCINT` writer - Disconnect detected interrupt"] -pub type DISCINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DISCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRQINT` reader - Session request/new session detected interrupt"] pub type SRQINT_R = crate::BitReader; #[doc = "Field `SRQINT` writer - Session request/new session detected interrupt"] -pub type SRQINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WKUINT` reader - Resume/remote wakeup detected interrupt"] pub type WKUINT_R = crate::BitReader; #[doc = "Field `WKUINT` writer - Resume/remote wakeup detected interrupt"] -pub type WKUINT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type WKUINT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Current mode of operation"] #[inline(always)] @@ -253,99 +253,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Mode mismatch interrupt"] #[inline(always)] #[must_use] - pub fn mmis(&mut self) -> MMIS_W { - MMIS_W::new(self) + pub fn mmis(&mut self) -> MMIS_W { + MMIS_W::new(self, 1) } #[doc = "Bit 3 - Start of frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SOF_W { - SOF_W::new(self) + pub fn sof(&mut self) -> SOF_W { + SOF_W::new(self, 3) } #[doc = "Bit 10 - Early suspend"] #[inline(always)] #[must_use] - pub fn esusp(&mut self) -> ESUSP_W { - ESUSP_W::new(self) + pub fn esusp(&mut self) -> ESUSP_W { + ESUSP_W::new(self, 10) } #[doc = "Bit 11 - USB suspend"] #[inline(always)] #[must_use] - pub fn usbsusp(&mut self) -> USBSUSP_W { - USBSUSP_W::new(self) + pub fn usbsusp(&mut self) -> USBSUSP_W { + USBSUSP_W::new(self, 11) } #[doc = "Bit 12 - USB reset"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration done"] #[inline(always)] #[must_use] - pub fn enumdne(&mut self) -> ENUMDNE_W { - ENUMDNE_W::new(self) + pub fn enumdne(&mut self) -> ENUMDNE_W { + ENUMDNE_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt"] #[inline(always)] #[must_use] - pub fn isoodrp(&mut self) -> ISOODRP_W { - ISOODRP_W::new(self) + pub fn isoodrp(&mut self) -> ISOODRP_W { + ISOODRP_W::new(self, 14) } #[doc = "Bit 15 - End of periodic frame interrupt"] #[inline(always)] #[must_use] - pub fn eopf(&mut self) -> EOPF_W { - EOPF_W::new(self) + pub fn eopf(&mut self) -> EOPF_W { + EOPF_W::new(self, 15) } #[doc = "Bit 20 - Incomplete isochronous IN transfer"] #[inline(always)] #[must_use] - pub fn iisoixfr(&mut self) -> IISOIXFR_W { - IISOIXFR_W::new(self) + pub fn iisoixfr(&mut self) -> IISOIXFR_W { + IISOIXFR_W::new(self, 20) } #[doc = "Bit 21 - Incomplete periodic transfer"] #[inline(always)] #[must_use] - pub fn pxfr_incompisoout(&mut self) -> PXFR_INCOMPISOOUT_W { - PXFR_INCOMPISOOUT_W::new(self) + pub fn pxfr_incompisoout(&mut self) -> PXFR_INCOMPISOOUT_W { + PXFR_INCOMPISOOUT_W::new(self, 21) } #[doc = "Bit 22 - Data fetch suspended"] #[inline(always)] #[must_use] - pub fn datafsusp(&mut self) -> DATAFSUSP_W { - DATAFSUSP_W::new(self) + pub fn datafsusp(&mut self) -> DATAFSUSP_W { + DATAFSUSP_W::new(self, 22) } #[doc = "Bit 28 - Connector ID status change"] #[inline(always)] #[must_use] - pub fn cidschg(&mut self) -> CIDSCHG_W { - CIDSCHG_W::new(self) + pub fn cidschg(&mut self) -> CIDSCHG_W { + CIDSCHG_W::new(self, 28) } #[doc = "Bit 29 - Disconnect detected interrupt"] #[inline(always)] #[must_use] - pub fn discint(&mut self) -> DISCINT_W { - DISCINT_W::new(self) + pub fn discint(&mut self) -> DISCINT_W { + DISCINT_W::new(self, 29) } #[doc = "Bit 30 - Session request/new session detected interrupt"] #[inline(always)] #[must_use] - pub fn srqint(&mut self) -> SRQINT_W { - SRQINT_W::new(self) + pub fn srqint(&mut self) -> SRQINT_W { + SRQINT_W::new(self, 30) } #[doc = "Bit 31 - Resume/remote wakeup detected interrupt"] #[inline(always)] #[must_use] - pub fn wkuint(&mut self) -> WKUINT_W { - WKUINT_W::new(self) + pub fn wkuint(&mut self) -> WKUINT_W { + WKUINT_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gnptxfsiz_host.rs b/crates/bcm2837-lpa/src/usb_otg_global/gnptxfsiz_host.rs index b2b7b4e..1f2ce3c 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gnptxfsiz_host.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gnptxfsiz_host.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `NPTXFSA` reader - Nonperiodic transmit RAM start address"] pub type NPTXFSA_R = crate::FieldReader; #[doc = "Field `NPTXFSA` writer - Nonperiodic transmit RAM start address"] -pub type NPTXFSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type NPTXFSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `NPTXFD` reader - Nonperiodic TxFIFO depth"] pub type NPTXFD_R = crate::FieldReader; #[doc = "Field `NPTXFD` writer - Nonperiodic TxFIFO depth"] -pub type NPTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type NPTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Nonperiodic transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Nonperiodic transmit RAM start address"] #[inline(always)] #[must_use] - pub fn nptxfsa(&mut self) -> NPTXFSA_W { - NPTXFSA_W::new(self) + pub fn nptxfsa(&mut self) -> NPTXFSA_W { + NPTXFSA_W::new(self, 0) } #[doc = "Bits 16:31 - Nonperiodic TxFIFO depth"] #[inline(always)] #[must_use] - pub fn nptxfd(&mut self) -> NPTXFD_W { - NPTXFD_W::new(self) + pub fn nptxfd(&mut self) -> NPTXFD_W { + NPTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gnptxsts.rs b/crates/bcm2837-lpa/src/usb_otg_global/gnptxsts.rs index 2b32a6f..297f9ca 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gnptxsts.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gnptxsts.rs @@ -34,7 +34,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS nonperiodic transmit FIFO/queue status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gotgctl.rs b/crates/bcm2837-lpa/src/usb_otg_global/gotgctl.rs index 36b3f21..ad93a29 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gotgctl.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gotgctl.rs @@ -7,21 +7,21 @@ pub type SRQSCS_R = crate::BitReader; #[doc = "Field `SRQ` reader - Session request"] pub type SRQ_R = crate::BitReader; #[doc = "Field `SRQ` writer - Session request"] -pub type SRQ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNGSCS` reader - Host negotiation success"] pub type HNGSCS_R = crate::BitReader; #[doc = "Field `HNPRQ` reader - HNP request"] pub type HNPRQ_R = crate::BitReader; #[doc = "Field `HNPRQ` writer - HNP request"] -pub type HNPRQ_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNPRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HSHNPEN` reader - Host set HNP enable"] pub type HSHNPEN_R = crate::BitReader; #[doc = "Field `HSHNPEN` writer - Host set HNP enable"] -pub type HSHNPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HSHNPEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DHNPEN` reader - Device HNP enabled"] pub type DHNPEN_R = crate::BitReader; #[doc = "Field `DHNPEN` writer - Device HNP enabled"] -pub type DHNPEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DHNPEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CIDSTS` reader - Connector ID status"] pub type CIDSTS_R = crate::BitReader; #[doc = "Field `DBCT` reader - Long/short debounce time"] @@ -100,33 +100,33 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Session request"] #[inline(always)] #[must_use] - pub fn srq(&mut self) -> SRQ_W { - SRQ_W::new(self) + pub fn srq(&mut self) -> SRQ_W { + SRQ_W::new(self, 1) } #[doc = "Bit 9 - HNP request"] #[inline(always)] #[must_use] - pub fn hnprq(&mut self) -> HNPRQ_W { - HNPRQ_W::new(self) + pub fn hnprq(&mut self) -> HNPRQ_W { + HNPRQ_W::new(self, 9) } #[doc = "Bit 10 - Host set HNP enable"] #[inline(always)] #[must_use] - pub fn hshnpen(&mut self) -> HSHNPEN_W { - HSHNPEN_W::new(self) + pub fn hshnpen(&mut self) -> HSHNPEN_W { + HSHNPEN_W::new(self, 10) } #[doc = "Bit 11 - Device HNP enabled"] #[inline(always)] #[must_use] - pub fn dhnpen(&mut self) -> DHNPEN_W { - DHNPEN_W::new(self) + pub fn dhnpen(&mut self) -> DHNPEN_W { + DHNPEN_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gotgint.rs b/crates/bcm2837-lpa/src/usb_otg_global/gotgint.rs index a44613f..820fbf5 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gotgint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gotgint.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `SEDET` reader - Session end detected"] pub type SEDET_R = crate::BitReader; #[doc = "Field `SEDET` writer - Session end detected"] -pub type SEDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SEDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRSSCHG` reader - Session request success status change"] pub type SRSSCHG_R = crate::BitReader; #[doc = "Field `SRSSCHG` writer - Session request success status change"] -pub type SRSSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRSSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNSSCHG` reader - Host negotiation success status change"] pub type HNSSCHG_R = crate::BitReader; #[doc = "Field `HNSSCHG` writer - Host negotiation success status change"] -pub type HNSSCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNSSCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNGDET` reader - Host negotiation detected"] pub type HNGDET_R = crate::BitReader; #[doc = "Field `HNGDET` writer - Host negotiation detected"] -pub type HNGDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNGDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADTOCHG` reader - A-device timeout change"] pub type ADTOCHG_R = crate::BitReader; #[doc = "Field `ADTOCHG` writer - A-device timeout change"] -pub type ADTOCHG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ADTOCHG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DBCDNE` reader - Debounce done"] pub type DBCDNE_R = crate::BitReader; #[doc = "Field `DBCDNE` writer - Debounce done"] -pub type DBCDNE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DBCDNE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - Session end detected"] #[inline(always)] @@ -72,45 +72,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 2 - Session end detected"] #[inline(always)] #[must_use] - pub fn sedet(&mut self) -> SEDET_W { - SEDET_W::new(self) + pub fn sedet(&mut self) -> SEDET_W { + SEDET_W::new(self, 2) } #[doc = "Bit 8 - Session request success status change"] #[inline(always)] #[must_use] - pub fn srsschg(&mut self) -> SRSSCHG_W { - SRSSCHG_W::new(self) + pub fn srsschg(&mut self) -> SRSSCHG_W { + SRSSCHG_W::new(self, 8) } #[doc = "Bit 9 - Host negotiation success status change"] #[inline(always)] #[must_use] - pub fn hnsschg(&mut self) -> HNSSCHG_W { - HNSSCHG_W::new(self) + pub fn hnsschg(&mut self) -> HNSSCHG_W { + HNSSCHG_W::new(self, 9) } #[doc = "Bit 17 - Host negotiation detected"] #[inline(always)] #[must_use] - pub fn hngdet(&mut self) -> HNGDET_W { - HNGDET_W::new(self) + pub fn hngdet(&mut self) -> HNGDET_W { + HNGDET_W::new(self, 17) } #[doc = "Bit 18 - A-device timeout change"] #[inline(always)] #[must_use] - pub fn adtochg(&mut self) -> ADTOCHG_W { - ADTOCHG_W::new(self) + pub fn adtochg(&mut self) -> ADTOCHG_W { + ADTOCHG_W::new(self, 18) } #[doc = "Bit 19 - Debounce done"] #[inline(always)] #[must_use] - pub fn dbcdne(&mut self) -> DBCDNE_W { - DBCDNE_W::new(self) + pub fn dbcdne(&mut self) -> DBCDNE_W { + DBCDNE_W::new(self, 19) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/grstctl.rs b/crates/bcm2837-lpa/src/usb_otg_global/grstctl.rs index 799d4ca..d12acdf 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/grstctl.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/grstctl.rs @@ -5,27 +5,27 @@ pub type W = crate::W; #[doc = "Field `CSRST` reader - Core soft reset"] pub type CSRST_R = crate::BitReader; #[doc = "Field `CSRST` writer - Core soft reset"] -pub type CSRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CSRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HSRST` reader - HCLK soft reset"] pub type HSRST_R = crate::BitReader; #[doc = "Field `HSRST` writer - HCLK soft reset"] -pub type HSRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HSRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FCRST` reader - Host frame counter reset"] pub type FCRST_R = crate::BitReader; #[doc = "Field `FCRST` writer - Host frame counter reset"] -pub type FCRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FCRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFFLSH` reader - RxFIFO flush"] pub type RXFFLSH_R = crate::BitReader; #[doc = "Field `RXFFLSH` writer - RxFIFO flush"] -pub type RXFFLSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RXFFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFFLSH` reader - TxFIFO flush"] pub type TXFFLSH_R = crate::BitReader; #[doc = "Field `TXFFLSH` writer - TxFIFO flush"] -pub type TXFFLSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXFFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub type TXFNUM_R = crate::FieldReader; #[doc = "Field `TXFNUM` writer - TxFIFO number"] -pub type TXFNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 5, O>; +pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `DMAREQ` reader - DMA request signal"] pub type DMAREQ_R = crate::BitReader; #[doc = "Field `AHBIDL` reader - AHB master idle"] @@ -88,45 +88,45 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Core soft reset"] #[inline(always)] #[must_use] - pub fn csrst(&mut self) -> CSRST_W { - CSRST_W::new(self) + pub fn csrst(&mut self) -> CSRST_W { + CSRST_W::new(self, 0) } #[doc = "Bit 1 - HCLK soft reset"] #[inline(always)] #[must_use] - pub fn hsrst(&mut self) -> HSRST_W { - HSRST_W::new(self) + pub fn hsrst(&mut self) -> HSRST_W { + HSRST_W::new(self, 1) } #[doc = "Bit 2 - Host frame counter reset"] #[inline(always)] #[must_use] - pub fn fcrst(&mut self) -> FCRST_W { - FCRST_W::new(self) + pub fn fcrst(&mut self) -> FCRST_W { + FCRST_W::new(self, 2) } #[doc = "Bit 4 - RxFIFO flush"] #[inline(always)] #[must_use] - pub fn rxfflsh(&mut self) -> RXFFLSH_W { - RXFFLSH_W::new(self) + pub fn rxfflsh(&mut self) -> RXFFLSH_W { + RXFFLSH_W::new(self, 4) } #[doc = "Bit 5 - TxFIFO flush"] #[inline(always)] #[must_use] - pub fn txfflsh(&mut self) -> TXFFLSH_W { - TXFFLSH_W::new(self) + pub fn txfflsh(&mut self) -> TXFFLSH_W { + TXFFLSH_W::new(self, 5) } #[doc = "Bits 6:10 - TxFIFO number"] #[inline(always)] #[must_use] - pub fn txfnum(&mut self) -> TXFNUM_W { - TXFNUM_W::new(self) + pub fn txfnum(&mut self) -> TXFNUM_W { + TXFNUM_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/grxfsiz.rs b/crates/bcm2837-lpa/src/usb_otg_global/grxfsiz.rs index b243ab8..29425cc 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/grxfsiz.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/grxfsiz.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `RXFD` reader - RxFIFO depth"] pub type RXFD_R = crate::FieldReader; #[doc = "Field `RXFD` writer - RxFIFO depth"] -pub type RXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type RXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RxFIFO depth"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - RxFIFO depth"] #[inline(always)] #[must_use] - pub fn rxfd(&mut self) -> RXFD_W { - RXFD_W::new(self) + pub fn rxfd(&mut self) -> RXFD_W { + RXFD_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_host.rs b/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_host.rs index 5e8d3bb..55702c4 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_host.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_host.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS status read and pop register (host mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_host::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_peripheral.rs b/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_peripheral.rs index e28018e..a8c70b6 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_peripheral.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/grxstsp_peripheral.rs @@ -50,7 +50,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS status read and pop register (peripheral mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_peripheral::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_host.rs b/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_host.rs index e9e1ba6..766cd8d 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_host.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_host.rs @@ -42,7 +42,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Receive status debug read register (host mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_host::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_peripheral.rs b/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_peripheral.rs index d6f8ca3..7083cf6 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_peripheral.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/grxstsr_peripheral.rs @@ -50,7 +50,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Receive status debug read register (peripheral mode mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_peripheral::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/gusbcfg.rs b/crates/bcm2837-lpa/src/usb_otg_global/gusbcfg.rs index b5f882e..6f9fa6e 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/gusbcfg.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/gusbcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `TOCAL` reader - FS timeout calibration"] pub type TOCAL_R = crate::FieldReader; #[doc = "Field `TOCAL` writer - FS timeout calibration"] -pub type TOCAL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 3, O>; +pub type TOCAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PHYIF` reader - PHY Interface width"] pub type PHYIF_R = crate::BitReader; #[doc = "PHY Interface width\n\nValue on reset: 0"] @@ -43,8 +43,8 @@ impl PHYIF_R { } } #[doc = "Field `PHYIF` writer - PHY Interface width"] -pub type PHYIF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYIF_A>; -impl<'a, REG, const O: u8> PHYIF_W<'a, REG, O> +pub type PHYIF_W<'a, REG> = crate::BitWriter<'a, REG, PHYIF_A>; +impl<'a, REG> PHYIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -96,8 +96,8 @@ impl PHYTYPE_R { } } #[doc = "Field `PHYTYPE` writer - PHY Type"] -pub type PHYTYPE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYTYPE_A>; -impl<'a, REG, const O: u8> PHYTYPE_W<'a, REG, O> +pub type PHYTYPE_W<'a, REG> = crate::BitWriter<'a, REG, PHYTYPE_A>; +impl<'a, REG> PHYTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -149,8 +149,8 @@ impl FSIF_R { } } #[doc = "Field `FSIF` writer - Full speed interface"] -pub type FSIF_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, FSIF_A>; -impl<'a, REG, const O: u8> FSIF_W<'a, REG, O> +pub type FSIF_W<'a, REG> = crate::BitWriter<'a, REG, FSIF_A>; +impl<'a, REG> FSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -202,8 +202,8 @@ impl PHYSEL_R { } } #[doc = "Field `PHYSEL` writer - Transceiver select"] -pub type PHYSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, PHYSEL_A>; -impl<'a, REG, const O: u8> PHYSEL_W<'a, REG, O> +pub type PHYSEL_W<'a, REG> = crate::BitWriter<'a, REG, PHYSEL_A>; +impl<'a, REG> PHYSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -255,8 +255,8 @@ impl DDRSEL_R { } } #[doc = "Field `DDRSEL` writer - ULPI data rate"] -pub type DDRSEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DDRSEL_A>; -impl<'a, REG, const O: u8> DDRSEL_W<'a, REG, O> +pub type DDRSEL_W<'a, REG> = crate::BitWriter<'a, REG, DDRSEL_A>; +impl<'a, REG> DDRSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -274,67 +274,67 @@ where #[doc = "Field `SRPCAP` reader - SRP-capable"] pub type SRPCAP_R = crate::BitReader; #[doc = "Field `SRPCAP` writer - SRP-capable"] -pub type SRPCAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SRPCAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HNPCAP` reader - HNP-capable"] pub type HNPCAP_R = crate::BitReader; #[doc = "Field `HNPCAP` writer - HNP-capable"] -pub type HNPCAP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type HNPCAP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRDT` reader - USB turnaround time"] pub type TRDT_R = crate::FieldReader; #[doc = "Field `TRDT` writer - USB turnaround time"] -pub type TRDT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type TRDT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PHYLPCS` reader - PHY Low-power clock select"] pub type PHYLPCS_R = crate::BitReader; #[doc = "Field `PHYLPCS` writer - PHY Low-power clock select"] -pub type PHYLPCS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYLPCS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIFSLS` reader - ULPI FS/LS select"] pub type ULPIFSLS_R = crate::BitReader; #[doc = "Field `ULPIFSLS` writer - ULPI FS/LS select"] -pub type ULPIFSLS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIFSLS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIAR` reader - ULPI Auto-resume"] pub type ULPIAR_R = crate::BitReader; #[doc = "Field `ULPIAR` writer - ULPI Auto-resume"] -pub type ULPIAR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIAR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPICSM` reader - ULPI Clock SuspendM"] pub type ULPICSM_R = crate::BitReader; #[doc = "Field `ULPICSM` writer - ULPI Clock SuspendM"] -pub type ULPICSM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPICSM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIEVBUSD` reader - ULPI External VBUS Drive"] pub type ULPIEVBUSD_R = crate::BitReader; #[doc = "Field `ULPIEVBUSD` writer - ULPI External VBUS Drive"] -pub type ULPIEVBUSD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIEVBUSD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIEVBUSI` reader - ULPI external VBUS indicator"] pub type ULPIEVBUSI_R = crate::BitReader; #[doc = "Field `ULPIEVBUSI` writer - ULPI external VBUS indicator"] -pub type ULPIEVBUSI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIEVBUSI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSDPS` reader - TermSel DLine pulsing selection"] pub type TSDPS_R = crate::BitReader; #[doc = "Field `TSDPS` writer - TermSel DLine pulsing selection"] -pub type TSDPS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TSDPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCCI` reader - Indicator complement"] pub type PCCI_R = crate::BitReader; #[doc = "Field `PCCI` writer - Indicator complement"] -pub type PCCI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCCI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTCI` reader - Indicator pass through"] pub type PTCI_R = crate::BitReader; #[doc = "Field `PTCI` writer - Indicator pass through"] -pub type PTCI_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PTCI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULPIIPD` reader - ULPI interface protect disable"] pub type ULPIIPD_R = crate::BitReader; #[doc = "Field `ULPIIPD` writer - ULPI interface protect disable"] -pub type ULPIIPD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ULPIIPD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FHMOD` reader - Forced host mode"] pub type FHMOD_R = crate::BitReader; #[doc = "Field `FHMOD` writer - Forced host mode"] -pub type FHMOD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FHMOD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FDMOD` reader - Forced peripheral mode"] pub type FDMOD_R = crate::BitReader; #[doc = "Field `FDMOD` writer - Forced peripheral mode"] -pub type FDMOD_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FDMOD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTXPKT` reader - Corrupt Tx packet"] pub type CTXPKT_R = crate::BitReader; #[doc = "Field `CTXPKT` writer - Corrupt Tx packet"] -pub type CTXPKT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CTXPKT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - FS timeout calibration"] #[inline(always)] @@ -477,141 +477,141 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:2 - FS timeout calibration"] #[inline(always)] #[must_use] - pub fn tocal(&mut self) -> TOCAL_W { - TOCAL_W::new(self) + pub fn tocal(&mut self) -> TOCAL_W { + TOCAL_W::new(self, 0) } #[doc = "Bit 3 - PHY Interface width"] #[inline(always)] #[must_use] - pub fn phyif(&mut self) -> PHYIF_W { - PHYIF_W::new(self) + pub fn phyif(&mut self) -> PHYIF_W { + PHYIF_W::new(self, 3) } #[doc = "Bit 4 - PHY Type"] #[inline(always)] #[must_use] - pub fn phytype(&mut self) -> PHYTYPE_W { - PHYTYPE_W::new(self) + pub fn phytype(&mut self) -> PHYTYPE_W { + PHYTYPE_W::new(self, 4) } #[doc = "Bit 5 - Full speed interface"] #[inline(always)] #[must_use] - pub fn fsif(&mut self) -> FSIF_W { - FSIF_W::new(self) + pub fn fsif(&mut self) -> FSIF_W { + FSIF_W::new(self, 5) } #[doc = "Bit 6 - Transceiver select"] #[inline(always)] #[must_use] - pub fn physel(&mut self) -> PHYSEL_W { - PHYSEL_W::new(self) + pub fn physel(&mut self) -> PHYSEL_W { + PHYSEL_W::new(self, 6) } #[doc = "Bit 7 - ULPI data rate"] #[inline(always)] #[must_use] - pub fn ddrsel(&mut self) -> DDRSEL_W { - DDRSEL_W::new(self) + pub fn ddrsel(&mut self) -> DDRSEL_W { + DDRSEL_W::new(self, 7) } #[doc = "Bit 8 - SRP-capable"] #[inline(always)] #[must_use] - pub fn srpcap(&mut self) -> SRPCAP_W { - SRPCAP_W::new(self) + pub fn srpcap(&mut self) -> SRPCAP_W { + SRPCAP_W::new(self, 8) } #[doc = "Bit 9 - HNP-capable"] #[inline(always)] #[must_use] - pub fn hnpcap(&mut self) -> HNPCAP_W { - HNPCAP_W::new(self) + pub fn hnpcap(&mut self) -> HNPCAP_W { + HNPCAP_W::new(self, 9) } #[doc = "Bits 10:13 - USB turnaround time"] #[inline(always)] #[must_use] - pub fn trdt(&mut self) -> TRDT_W { - TRDT_W::new(self) + pub fn trdt(&mut self) -> TRDT_W { + TRDT_W::new(self, 10) } #[doc = "Bit 15 - PHY Low-power clock select"] #[inline(always)] #[must_use] - pub fn phylpcs(&mut self) -> PHYLPCS_W { - PHYLPCS_W::new(self) + pub fn phylpcs(&mut self) -> PHYLPCS_W { + PHYLPCS_W::new(self, 15) } #[doc = "Bit 17 - ULPI FS/LS select"] #[inline(always)] #[must_use] - pub fn ulpifsls(&mut self) -> ULPIFSLS_W { - ULPIFSLS_W::new(self) + pub fn ulpifsls(&mut self) -> ULPIFSLS_W { + ULPIFSLS_W::new(self, 17) } #[doc = "Bit 18 - ULPI Auto-resume"] #[inline(always)] #[must_use] - pub fn ulpiar(&mut self) -> ULPIAR_W { - ULPIAR_W::new(self) + pub fn ulpiar(&mut self) -> ULPIAR_W { + ULPIAR_W::new(self, 18) } #[doc = "Bit 19 - ULPI Clock SuspendM"] #[inline(always)] #[must_use] - pub fn ulpicsm(&mut self) -> ULPICSM_W { - ULPICSM_W::new(self) + pub fn ulpicsm(&mut self) -> ULPICSM_W { + ULPICSM_W::new(self, 19) } #[doc = "Bit 20 - ULPI External VBUS Drive"] #[inline(always)] #[must_use] - pub fn ulpievbusd(&mut self) -> ULPIEVBUSD_W { - ULPIEVBUSD_W::new(self) + pub fn ulpievbusd(&mut self) -> ULPIEVBUSD_W { + ULPIEVBUSD_W::new(self, 20) } #[doc = "Bit 21 - ULPI external VBUS indicator"] #[inline(always)] #[must_use] - pub fn ulpievbusi(&mut self) -> ULPIEVBUSI_W { - ULPIEVBUSI_W::new(self) + pub fn ulpievbusi(&mut self) -> ULPIEVBUSI_W { + ULPIEVBUSI_W::new(self, 21) } #[doc = "Bit 22 - TermSel DLine pulsing selection"] #[inline(always)] #[must_use] - pub fn tsdps(&mut self) -> TSDPS_W { - TSDPS_W::new(self) + pub fn tsdps(&mut self) -> TSDPS_W { + TSDPS_W::new(self, 22) } #[doc = "Bit 23 - Indicator complement"] #[inline(always)] #[must_use] - pub fn pcci(&mut self) -> PCCI_W { - PCCI_W::new(self) + pub fn pcci(&mut self) -> PCCI_W { + PCCI_W::new(self, 23) } #[doc = "Bit 24 - Indicator pass through"] #[inline(always)] #[must_use] - pub fn ptci(&mut self) -> PTCI_W { - PTCI_W::new(self) + pub fn ptci(&mut self) -> PTCI_W { + PTCI_W::new(self, 24) } #[doc = "Bit 25 - ULPI interface protect disable"] #[inline(always)] #[must_use] - pub fn ulpiipd(&mut self) -> ULPIIPD_W { - ULPIIPD_W::new(self) + pub fn ulpiipd(&mut self) -> ULPIIPD_W { + ULPIIPD_W::new(self, 25) } #[doc = "Bit 29 - Forced host mode"] #[inline(always)] #[must_use] - pub fn fhmod(&mut self) -> FHMOD_W { - FHMOD_W::new(self) + pub fn fhmod(&mut self) -> FHMOD_W { + FHMOD_W::new(self, 29) } #[doc = "Bit 30 - Forced peripheral mode"] #[inline(always)] #[must_use] - pub fn fdmod(&mut self) -> FDMOD_W { - FDMOD_W::new(self) + pub fn fdmod(&mut self) -> FDMOD_W { + FDMOD_W::new(self, 30) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] #[must_use] - pub fn ctxpkt(&mut self) -> CTXPKT_W { - CTXPKT_W::new(self) + pub fn ctxpkt(&mut self) -> CTXPKT_W { + CTXPKT_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/hptxfsiz.rs b/crates/bcm2837-lpa/src/usb_otg_global/hptxfsiz.rs index cd99421..9cf564b 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/hptxfsiz.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/hptxfsiz.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `PTXSA` reader - Host periodic TxFIFO start address"] pub type PTXSA_R = crate::FieldReader; #[doc = "Field `PTXSA` writer - Host periodic TxFIFO start address"] -pub type PTXSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTXFD` reader - Host periodic TxFIFO depth"] pub type PTXFD_R = crate::FieldReader; #[doc = "Field `PTXFD` writer - Host periodic TxFIFO depth"] -pub type PTXFD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXFD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] #[must_use] - pub fn ptxsa(&mut self) -> PTXSA_W { - PTXSA_W::new(self) + pub fn ptxsa(&mut self) -> PTXSA_W { + PTXSA_W::new(self, 0) } #[doc = "Bits 16:31 - Host periodic TxFIFO depth"] #[inline(always)] #[must_use] - pub fn ptxfd(&mut self) -> PTXFD_W { - PTXFD_W::new(self) + pub fn ptxfd(&mut self) -> PTXFD_W { + PTXFD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/hw_config0.rs b/crates/bcm2837-lpa/src/usb_otg_global/hw_config0.rs index 93348b4..1111e93 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/hw_config0.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/hw_config0.rs @@ -400,7 +400,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Hardware Config 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_config0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/hw_direction.rs b/crates/bcm2837-lpa/src/usb_otg_global/hw_direction.rs index 3545475..6428bea 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/hw_direction.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/hw_direction.rs @@ -50,9 +50,11 @@ impl DIRECTION_R { } } impl R { - #[doc = "Direction [0-15]"] + #[doc = "Direction [0-15]\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `DIRECTION0` field"] #[inline(always)] - pub unsafe fn direction(&self, n: u8) -> DIRECTION_R { + pub fn direction(&self, n: u8) -> DIRECTION_R { + #[allow(clippy::no_effect)] + [(); 16][n as usize]; DIRECTION_R::new(((self.bits >> (n * 2)) & 3) as u8) } #[doc = "Bits 0:1 - Direction 0"] @@ -178,7 +180,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Direction\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_direction::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs b/crates/bcm2837-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs index 73658ab..2afe810 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/tx0fsiz_peripheral.rs @@ -5,11 +5,11 @@ pub type W = crate::W; #[doc = "Field `TX0FSA` reader - Endpoint 0 transmit RAM start address"] pub type TX0FSA_R = crate::FieldReader; #[doc = "Field `TX0FSA` writer - Endpoint 0 transmit RAM start address"] -pub type TX0FSA_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TX0FSA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `TX0FD` reader - Endpoint 0 TxFIFO depth"] pub type TX0FD_R = crate::FieldReader; #[doc = "Field `TX0FD` writer - Endpoint 0 TxFIFO depth"] -pub type TX0FD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type TX0FD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Endpoint 0 transmit RAM start address"] #[inline(always)] @@ -32,21 +32,21 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Endpoint 0 transmit RAM start address"] #[inline(always)] #[must_use] - pub fn tx0fsa(&mut self) -> TX0FSA_W { - TX0FSA_W::new(self) + pub fn tx0fsa(&mut self) -> TX0FSA_W { + TX0FSA_W::new(self, 0) } #[doc = "Bits 16:31 - Endpoint 0 TxFIFO depth"] #[inline(always)] #[must_use] - pub fn tx0fd(&mut self) -> TX0FD_W { - TX0FD_W::new(self) + pub fn tx0fd(&mut self) -> TX0FD_W { + TX0FD_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_global/vid.rs b/crates/bcm2837-lpa/src/usb_otg_global/vid.rs index 732dd16..05c4fa3 100644 --- a/crates/bcm2837-lpa/src/usb_otg_global/vid.rs +++ b/crates/bcm2837-lpa/src/usb_otg_global/vid.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS vendor ID register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_host.rs b/crates/bcm2837-lpa/src/usb_otg_host.rs index 69899f9..6322c96 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host.rs @@ -2,58 +2,136 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + hcfg: HCFG, + hfir: HFIR, + hfnum: HFNUM, + _reserved3: [u8; 0x04], + hptxsts: HPTXSTS, + haint: HAINT, + haintmsk: HAINTMSK, + _reserved6: [u8; 0x24], + hprt: HPRT, + _reserved7: [u8; 0xbc], + host_channel0: HOST_CHANNEL, + _reserved8: [u8; 0x08], + host_channel1: HOST_CHANNEL, + _reserved9: [u8; 0x08], + host_channel2: HOST_CHANNEL, + _reserved10: [u8; 0x08], + host_channel3: HOST_CHANNEL, + _reserved11: [u8; 0x08], + host_channel4: HOST_CHANNEL, + _reserved12: [u8; 0x08], + host_channel5: HOST_CHANNEL, + _reserved13: [u8; 0x08], + host_channel6: HOST_CHANNEL, + _reserved14: [u8; 0x08], + host_channel7: HOST_CHANNEL, + _reserved15: [u8; 0x08], + host_channel8: HOST_CHANNEL, + _reserved16: [u8; 0x08], + host_channel9: HOST_CHANNEL, + _reserved17: [u8; 0x08], + host_channel10: HOST_CHANNEL, + _reserved18: [u8; 0x08], + host_channel11: HOST_CHANNEL, +} +impl RegisterBlock { #[doc = "0x00 - OTG_HS host configuration register"] - pub hcfg: HCFG, + #[inline(always)] + pub const fn hcfg(&self) -> &HCFG { + &self.hcfg + } #[doc = "0x04 - OTG_HS Host frame interval register"] - pub hfir: HFIR, + #[inline(always)] + pub const fn hfir(&self) -> &HFIR { + &self.hfir + } #[doc = "0x08 - OTG_HS host frame number/frame time remaining register"] - pub hfnum: HFNUM, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn hfnum(&self) -> &HFNUM { + &self.hfnum + } #[doc = "0x10 - Host periodic transmit FIFO/queue status register"] - pub hptxsts: HPTXSTS, + #[inline(always)] + pub const fn hptxsts(&self) -> &HPTXSTS { + &self.hptxsts + } #[doc = "0x14 - OTG_HS Host all channels interrupt register"] - pub haint: HAINT, + #[inline(always)] + pub const fn haint(&self) -> &HAINT { + &self.haint + } #[doc = "0x18 - OTG_HS host all channels interrupt mask register"] - pub haintmsk: HAINTMSK, - _reserved6: [u8; 0x24], + #[inline(always)] + pub const fn haintmsk(&self) -> &HAINTMSK { + &self.haintmsk + } #[doc = "0x40 - OTG_HS host port control and status register"] - pub hprt: HPRT, - _reserved7: [u8; 0xbc], + #[inline(always)] + pub const fn hprt(&self) -> &HPRT { + &self.hprt + } #[doc = "0x100..0x118 - Host channel 0"] - pub host_channel0: HOST_CHANNEL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn host_channel0(&self) -> &HOST_CHANNEL { + &self.host_channel0 + } #[doc = "0x120..0x138 - Host channel 1"] - pub host_channel1: HOST_CHANNEL, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn host_channel1(&self) -> &HOST_CHANNEL { + &self.host_channel1 + } #[doc = "0x140..0x158 - Host channel 2"] - pub host_channel2: HOST_CHANNEL, - _reserved10: [u8; 0x08], + #[inline(always)] + pub const fn host_channel2(&self) -> &HOST_CHANNEL { + &self.host_channel2 + } #[doc = "0x160..0x178 - Host channel 3"] - pub host_channel3: HOST_CHANNEL, - _reserved11: [u8; 0x08], + #[inline(always)] + pub const fn host_channel3(&self) -> &HOST_CHANNEL { + &self.host_channel3 + } #[doc = "0x180..0x198 - Host channel 4"] - pub host_channel4: HOST_CHANNEL, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn host_channel4(&self) -> &HOST_CHANNEL { + &self.host_channel4 + } #[doc = "0x1a0..0x1b8 - Host channel 5"] - pub host_channel5: HOST_CHANNEL, - _reserved13: [u8; 0x08], + #[inline(always)] + pub const fn host_channel5(&self) -> &HOST_CHANNEL { + &self.host_channel5 + } #[doc = "0x1c0..0x1d8 - Host channel 6"] - pub host_channel6: HOST_CHANNEL, - _reserved14: [u8; 0x08], + #[inline(always)] + pub const fn host_channel6(&self) -> &HOST_CHANNEL { + &self.host_channel6 + } #[doc = "0x1e0..0x1f8 - Host channel 7"] - pub host_channel7: HOST_CHANNEL, - _reserved15: [u8; 0x08], + #[inline(always)] + pub const fn host_channel7(&self) -> &HOST_CHANNEL { + &self.host_channel7 + } #[doc = "0x200..0x218 - Host channel 8"] - pub host_channel8: HOST_CHANNEL, - _reserved16: [u8; 0x08], + #[inline(always)] + pub const fn host_channel8(&self) -> &HOST_CHANNEL { + &self.host_channel8 + } #[doc = "0x220..0x238 - Host channel 9"] - pub host_channel9: HOST_CHANNEL, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn host_channel9(&self) -> &HOST_CHANNEL { + &self.host_channel9 + } #[doc = "0x240..0x258 - Host channel 10"] - pub host_channel10: HOST_CHANNEL, - _reserved18: [u8; 0x08], + #[inline(always)] + pub const fn host_channel10(&self) -> &HOST_CHANNEL { + &self.host_channel10 + } #[doc = "0x260..0x278 - Host channel 11"] - pub host_channel11: HOST_CHANNEL, + #[inline(always)] + pub const fn host_channel11(&self) -> &HOST_CHANNEL { + &self.host_channel11 + } } #[doc = "HCFG (rw) register accessor: OTG_HS host configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcfg`] module"] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/haint.rs b/crates/bcm2837-lpa/src/usb_otg_host/haint.rs index fd11584..1dc94d5 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/haint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/haint.rs @@ -18,7 +18,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS Host all channels interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/haintmsk.rs b/crates/bcm2837-lpa/src/usb_otg_host/haintmsk.rs index f820459..2a95774 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/haintmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/haintmsk.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `HAINTM` reader - Channel interrupt mask"] pub type HAINTM_R = crate::FieldReader; #[doc = "Field `HAINTM` writer - Channel interrupt mask"] -pub type HAINTM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type HAINTM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Channel interrupt mask"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Channel interrupt mask"] #[inline(always)] #[must_use] - pub fn haintm(&mut self) -> HAINTM_W { - HAINTM_W::new(self) + pub fn haintm(&mut self) -> HAINTM_W { + HAINTM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/hcfg.rs b/crates/bcm2837-lpa/src/usb_otg_host/hcfg.rs index af6795d..6451fdd 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/hcfg.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/hcfg.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `FSLSPCS` reader - FS/LS PHY clock select"] pub type FSLSPCS_R = crate::FieldReader; #[doc = "Field `FSLSPCS` writer - FS/LS PHY clock select"] -pub type FSLSPCS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type FSLSPCS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FSLSS` reader - FS- and LS-only support"] pub type FSLSS_R = crate::BitReader; impl R { @@ -30,15 +30,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:1 - FS/LS PHY clock select"] #[inline(always)] #[must_use] - pub fn fslspcs(&mut self) -> FSLSPCS_W { - FSLSPCS_W::new(self) + pub fn fslspcs(&mut self) -> FSLSPCS_W { + FSLSPCS_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/hfir.rs b/crates/bcm2837-lpa/src/usb_otg_host/hfir.rs index d373916..04d2520 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/hfir.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/hfir.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `FRIVL` reader - Frame interval"] pub type FRIVL_R = crate::FieldReader; #[doc = "Field `FRIVL` writer - Frame interval"] -pub type FRIVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type FRIVL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] #[must_use] - pub fn frivl(&mut self) -> FRIVL_W { - FRIVL_W::new(self) + pub fn frivl(&mut self) -> FRIVL_W { + FRIVL_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/hfnum.rs b/crates/bcm2837-lpa/src/usb_otg_host/hfnum.rs index 5bb48e9..b44cca5 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/hfnum.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/hfnum.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "OTG_HS host frame number/frame time remaining register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel.rs index 54d36d3..1ac62f9 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel.rs @@ -2,18 +2,44 @@ #[repr(C)] #[derive(Debug)] pub struct HOST_CHANNEL { + hcchar: HCCHAR, + hcsplt: HCSPLT, + hcint: HCINT, + hcintmsk: HCINTMSK, + hctsiz: HCTSIZ, + hcdma: HCDMA, +} +impl HOST_CHANNEL { #[doc = "0x00 - Characteristics register"] - pub hcchar: HCCHAR, + #[inline(always)] + pub const fn hcchar(&self) -> &HCCHAR { + &self.hcchar + } #[doc = "0x04 - Split control register"] - pub hcsplt: HCSPLT, + #[inline(always)] + pub const fn hcsplt(&self) -> &HCSPLT { + &self.hcsplt + } #[doc = "0x08 - Interrupt register"] - pub hcint: HCINT, + #[inline(always)] + pub const fn hcint(&self) -> &HCINT { + &self.hcint + } #[doc = "0x0c - Interrupt mask"] - pub hcintmsk: HCINTMSK, + #[inline(always)] + pub const fn hcintmsk(&self) -> &HCINTMSK { + &self.hcintmsk + } #[doc = "0x10 - Transfer size"] - pub hctsiz: HCTSIZ, + #[inline(always)] + pub const fn hctsiz(&self) -> &HCTSIZ { + &self.hctsiz + } #[doc = "0x14 - DMA address"] - pub hcdma: HCDMA, + #[inline(always)] + pub const fn hcdma(&self) -> &HCDMA { + &self.hcdma + } } #[doc = "HCCHAR (rw) register accessor: Characteristics register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcchar`] module"] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcchar.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcchar.rs index 4bc5c53..1dcb5e3 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcchar.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcchar.rs @@ -5,43 +5,43 @@ pub type W = crate::W; #[doc = "Field `MPSIZ` reader - Maximum packet size"] pub type MPSIZ_R = crate::FieldReader; #[doc = "Field `MPSIZ` writer - Maximum packet size"] -pub type MPSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 11, O, u16>; +pub type MPSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `EPNUM` reader - Endpoint number"] pub type EPNUM_R = crate::FieldReader; #[doc = "Field `EPNUM` writer - Endpoint number"] -pub type EPNUM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type EPNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `EPDIR` reader - Endpoint direction"] pub type EPDIR_R = crate::BitReader; #[doc = "Field `EPDIR` writer - Endpoint direction"] -pub type EPDIR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EPDIR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LSDEV` reader - Low-speed device"] pub type LSDEV_R = crate::BitReader; #[doc = "Field `LSDEV` writer - Low-speed device"] -pub type LSDEV_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type LSDEV_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPTYP` reader - Endpoint type"] pub type EPTYP_R = crate::FieldReader; #[doc = "Field `EPTYP` writer - Endpoint type"] -pub type EPTYP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type EPTYP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `MC` reader - Multi Count (MC) / Error Count (EC)"] pub type MC_R = crate::FieldReader; #[doc = "Field `MC` writer - Multi Count (MC) / Error Count (EC)"] -pub type MC_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type MC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DAD` reader - Device address"] pub type DAD_R = crate::FieldReader; #[doc = "Field `DAD` writer - Device address"] -pub type DAD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type DAD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `ODDFRM` reader - Odd frame"] pub type ODDFRM_R = crate::BitReader; #[doc = "Field `ODDFRM` writer - Odd frame"] -pub type ODDFRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ODDFRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDIS` reader - Channel disable"] pub type CHDIS_R = crate::BitReader; #[doc = "Field `CHDIS` writer - Channel disable"] -pub type CHDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHENA` reader - Channel enable"] pub type CHENA_R = crate::BitReader; #[doc = "Field `CHENA` writer - Channel enable"] -pub type CHENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] @@ -112,69 +112,69 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] #[must_use] - pub fn mpsiz(&mut self) -> MPSIZ_W { - MPSIZ_W::new(self) + pub fn mpsiz(&mut self) -> MPSIZ_W { + MPSIZ_W::new(self, 0) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] #[must_use] - pub fn epnum(&mut self) -> EPNUM_W { - EPNUM_W::new(self) + pub fn epnum(&mut self) -> EPNUM_W { + EPNUM_W::new(self, 11) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] #[must_use] - pub fn epdir(&mut self) -> EPDIR_W { - EPDIR_W::new(self) + pub fn epdir(&mut self) -> EPDIR_W { + EPDIR_W::new(self, 15) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] #[must_use] - pub fn lsdev(&mut self) -> LSDEV_W { - LSDEV_W::new(self) + pub fn lsdev(&mut self) -> LSDEV_W { + LSDEV_W::new(self, 17) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] #[must_use] - pub fn eptyp(&mut self) -> EPTYP_W { - EPTYP_W::new(self) + pub fn eptyp(&mut self) -> EPTYP_W { + EPTYP_W::new(self, 18) } #[doc = "Bits 20:21 - Multi Count (MC) / Error Count (EC)"] #[inline(always)] #[must_use] - pub fn mc(&mut self) -> MC_W { - MC_W::new(self) + pub fn mc(&mut self) -> MC_W { + MC_W::new(self, 20) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] #[must_use] - pub fn dad(&mut self) -> DAD_W { - DAD_W::new(self) + pub fn dad(&mut self) -> DAD_W { + DAD_W::new(self, 22) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] #[must_use] - pub fn oddfrm(&mut self) -> ODDFRM_W { - ODDFRM_W::new(self) + pub fn oddfrm(&mut self) -> ODDFRM_W { + ODDFRM_W::new(self, 29) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] #[must_use] - pub fn chdis(&mut self) -> CHDIS_W { - CHDIS_W::new(self) + pub fn chdis(&mut self) -> CHDIS_W { + CHDIS_W::new(self, 30) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] #[must_use] - pub fn chena(&mut self) -> CHENA_W { - CHENA_W::new(self) + pub fn chena(&mut self) -> CHENA_W { + CHENA_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcdma.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcdma.rs index 49ce1a2..173d1c7 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcdma.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcdma.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `DMAADDR` reader - DMA address"] pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAADDR` writer - DMA address"] -pub type DMAADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:31 - DMA address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcint.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcint.rs index 0fd949e..fc9d5e1 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcint.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcint.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRC` reader - Transfer completed"] pub type XFRC_R = crate::BitReader; #[doc = "Field `XFRC` writer - Transfer completed"] -pub type XFRC_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHH` reader - Channel halted"] pub type CHH_R = crate::BitReader; #[doc = "Field `CHH` writer - Channel halted"] -pub type CHH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBERR` reader - AHB error"] pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBERR` writer - AHB error"] -pub type AHBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALL` reader - STALL response received interrupt"] pub type STALL_R = crate::BitReader; #[doc = "Field `STALL` writer - STALL response received interrupt"] -pub type STALL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK response received interrupt"] pub type NAK_R = crate::BitReader; #[doc = "Field `NAK` writer - NAK response received interrupt"] -pub type NAK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub type ACK_R = crate::BitReader; #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] -pub type ACK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - Response received interrupt"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - Response received interrupt"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXERR` reader - Transaction error"] pub type TXERR_R = crate::BitReader; #[doc = "Field `TXERR` writer - Transaction error"] -pub type TXERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BBERR` reader - Babble error"] pub type BBERR_R = crate::BitReader; #[doc = "Field `BBERR` writer - Babble error"] -pub type BBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRMOR` reader - Frame overrun"] pub type FRMOR_R = crate::BitReader; #[doc = "Field `FRMOR` writer - Frame overrun"] -pub type FRMOR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FRMOR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTERR` reader - Data toggle error"] pub type DTERR_R = crate::BitReader; #[doc = "Field `DTERR` writer - Data toggle error"] -pub type DTERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTERR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed"] #[inline(always)] #[must_use] - pub fn xfrc(&mut self) -> XFRC_W { - XFRC_W::new(self) + pub fn xfrc(&mut self) -> XFRC_W { + XFRC_W::new(self, 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] #[must_use] - pub fn chh(&mut self) -> CHH_W { - CHH_W::new(self) + pub fn chh(&mut self) -> CHH_W { + CHH_W::new(self, 1) } #[doc = "Bit 2 - AHB error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 3) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self) + pub fn nak(&mut self) -> NAK_W { + NAK_W::new(self, 4) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W { - ACK_W::new(self) + pub fn ack(&mut self) -> ACK_W { + ACK_W::new(self, 5) } #[doc = "Bit 6 - Response received interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction error"] #[inline(always)] #[must_use] - pub fn txerr(&mut self) -> TXERR_W { - TXERR_W::new(self) + pub fn txerr(&mut self) -> TXERR_W { + TXERR_W::new(self, 7) } #[doc = "Bit 8 - Babble error"] #[inline(always)] #[must_use] - pub fn bberr(&mut self) -> BBERR_W { - BBERR_W::new(self) + pub fn bberr(&mut self) -> BBERR_W { + BBERR_W::new(self, 8) } #[doc = "Bit 9 - Frame overrun"] #[inline(always)] #[must_use] - pub fn frmor(&mut self) -> FRMOR_W { - FRMOR_W::new(self) + pub fn frmor(&mut self) -> FRMOR_W { + FRMOR_W::new(self, 9) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] #[must_use] - pub fn dterr(&mut self) -> DTERR_W { - DTERR_W::new(self) + pub fn dterr(&mut self) -> DTERR_W { + DTERR_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcintmsk.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcintmsk.rs index 03aa41c..56e5d7a 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcintmsk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcintmsk.rs @@ -5,47 +5,47 @@ pub type W = crate::W; #[doc = "Field `XFRCM` reader - Transfer completed mask"] pub type XFRCM_R = crate::BitReader; #[doc = "Field `XFRCM` writer - Transfer completed mask"] -pub type XFRCM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type XFRCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHHM` reader - Channel halted mask"] pub type CHHM_R = crate::BitReader; #[doc = "Field `CHHM` writer - Channel halted mask"] -pub type CHHM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type CHHM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBERR` reader - AHB error"] pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBERR` writer - AHB error"] -pub type AHBERR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALLM` reader - STALL response received interrupt mask"] pub type STALLM_R = crate::BitReader; #[doc = "Field `STALLM` writer - STALL response received interrupt mask"] -pub type STALLM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STALLM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKM` reader - NAK response received interrupt mask"] pub type NAKM_R = crate::BitReader; #[doc = "Field `NAKM` writer - NAK response received interrupt mask"] -pub type NAKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NAKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACKM` reader - ACK response received/transmitted interrupt mask"] pub type ACKM_R = crate::BitReader; #[doc = "Field `ACKM` writer - ACK response received/transmitted interrupt mask"] -pub type ACKM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ACKM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - response received interrupt mask"] pub type NYET_R = crate::BitReader; #[doc = "Field `NYET` writer - response received interrupt mask"] -pub type NYET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXERRM` reader - Transaction error mask"] pub type TXERRM_R = crate::BitReader; #[doc = "Field `TXERRM` writer - Transaction error mask"] -pub type TXERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type TXERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BBERRM` reader - Babble error mask"] pub type BBERRM_R = crate::BitReader; #[doc = "Field `BBERRM` writer - Babble error mask"] -pub type BBERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type BBERRM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRMORM` reader - Frame overrun mask"] pub type FRMORM_R = crate::BitReader; #[doc = "Field `FRMORM` writer - Frame overrun mask"] -pub type FRMORM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type FRMORM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTERRM` reader - Data toggle error mask"] pub type DTERRM_R = crate::BitReader; #[doc = "Field `DTERRM` writer - Data toggle error mask"] -pub type DTERRM_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DTERRM_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer completed mask"] #[inline(always)] @@ -122,75 +122,75 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Transfer completed mask"] #[inline(always)] #[must_use] - pub fn xfrcm(&mut self) -> XFRCM_W { - XFRCM_W::new(self) + pub fn xfrcm(&mut self) -> XFRCM_W { + XFRCM_W::new(self, 0) } #[doc = "Bit 1 - Channel halted mask"] #[inline(always)] #[must_use] - pub fn chhm(&mut self) -> CHHM_W { - CHHM_W::new(self) + pub fn chhm(&mut self) -> CHHM_W { + CHHM_W::new(self, 1) } #[doc = "Bit 2 - AHB error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL response received interrupt mask"] #[inline(always)] #[must_use] - pub fn stallm(&mut self) -> STALLM_W { - STALLM_W::new(self) + pub fn stallm(&mut self) -> STALLM_W { + STALLM_W::new(self, 3) } #[doc = "Bit 4 - NAK response received interrupt mask"] #[inline(always)] #[must_use] - pub fn nakm(&mut self) -> NAKM_W { - NAKM_W::new(self) + pub fn nakm(&mut self) -> NAKM_W { + NAKM_W::new(self, 4) } #[doc = "Bit 5 - ACK response received/transmitted interrupt mask"] #[inline(always)] #[must_use] - pub fn ackm(&mut self) -> ACKM_W { - ACKM_W::new(self) + pub fn ackm(&mut self) -> ACKM_W { + ACKM_W::new(self, 5) } #[doc = "Bit 6 - response received interrupt mask"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self) + pub fn nyet(&mut self) -> NYET_W { + NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction error mask"] #[inline(always)] #[must_use] - pub fn txerrm(&mut self) -> TXERRM_W { - TXERRM_W::new(self) + pub fn txerrm(&mut self) -> TXERRM_W { + TXERRM_W::new(self, 7) } #[doc = "Bit 8 - Babble error mask"] #[inline(always)] #[must_use] - pub fn bberrm(&mut self) -> BBERRM_W { - BBERRM_W::new(self) + pub fn bberrm(&mut self) -> BBERRM_W { + BBERRM_W::new(self, 8) } #[doc = "Bit 9 - Frame overrun mask"] #[inline(always)] #[must_use] - pub fn frmorm(&mut self) -> FRMORM_W { - FRMORM_W::new(self) + pub fn frmorm(&mut self) -> FRMORM_W { + FRMORM_W::new(self, 9) } #[doc = "Bit 10 - Data toggle error mask"] #[inline(always)] #[must_use] - pub fn dterrm(&mut self) -> DTERRM_W { - DTERRM_W::new(self) + pub fn dterrm(&mut self) -> DTERRM_W { + DTERRM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcsplt.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcsplt.rs index dfc4fa0..881e2ba 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcsplt.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hcsplt.rs @@ -5,23 +5,23 @@ pub type W = crate::W; #[doc = "Field `PRTADDR` reader - Port address"] pub type PRTADDR_R = crate::FieldReader; #[doc = "Field `PRTADDR` writer - Port address"] -pub type PRTADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type PRTADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `HUBADDR` reader - Hub address"] pub type HUBADDR_R = crate::FieldReader; #[doc = "Field `HUBADDR` writer - Hub address"] -pub type HUBADDR_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 7, O>; +pub type HUBADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `XACTPOS` reader - XACTPOS"] pub type XACTPOS_R = crate::FieldReader; #[doc = "Field `XACTPOS` writer - XACTPOS"] -pub type XACTPOS_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type XACTPOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `COMPLSPLT` reader - Do complete split"] pub type COMPLSPLT_R = crate::BitReader; #[doc = "Field `COMPLSPLT` writer - Do complete split"] -pub type COMPLSPLT_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type COMPLSPLT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPLITEN` reader - Split enable"] pub type SPLITEN_R = crate::BitReader; #[doc = "Field `SPLITEN` writer - Split enable"] -pub type SPLITEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type SPLITEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:6 - Port address"] #[inline(always)] @@ -62,39 +62,39 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:6 - Port address"] #[inline(always)] #[must_use] - pub fn prtaddr(&mut self) -> PRTADDR_W { - PRTADDR_W::new(self) + pub fn prtaddr(&mut self) -> PRTADDR_W { + PRTADDR_W::new(self, 0) } #[doc = "Bits 7:13 - Hub address"] #[inline(always)] #[must_use] - pub fn hubaddr(&mut self) -> HUBADDR_W { - HUBADDR_W::new(self) + pub fn hubaddr(&mut self) -> HUBADDR_W { + HUBADDR_W::new(self, 7) } #[doc = "Bits 14:15 - XACTPOS"] #[inline(always)] #[must_use] - pub fn xactpos(&mut self) -> XACTPOS_W { - XACTPOS_W::new(self) + pub fn xactpos(&mut self) -> XACTPOS_W { + XACTPOS_W::new(self, 14) } #[doc = "Bit 16 - Do complete split"] #[inline(always)] #[must_use] - pub fn complsplt(&mut self) -> COMPLSPLT_W { - COMPLSPLT_W::new(self) + pub fn complsplt(&mut self) -> COMPLSPLT_W { + COMPLSPLT_W::new(self, 16) } #[doc = "Bit 31 - Split enable"] #[inline(always)] #[must_use] - pub fn spliten(&mut self) -> SPLITEN_W { - SPLITEN_W::new(self) + pub fn spliten(&mut self) -> SPLITEN_W { + SPLITEN_W::new(self, 31) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hctsiz.rs b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hctsiz.rs index ebfe51b..57a9475 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hctsiz.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/host_channel/hctsiz.rs @@ -5,15 +5,15 @@ pub type W = crate::W; #[doc = "Field `XFRSIZ` reader - Transfer size"] pub type XFRSIZ_R = crate::FieldReader; #[doc = "Field `XFRSIZ` writer - Transfer size"] -pub type XFRSIZ_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 19, O, u32>; +pub type XFRSIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PKTCNT` reader - Packet count"] pub type PKTCNT_R = crate::FieldReader; #[doc = "Field `PKTCNT` writer - Packet count"] -pub type PKTCNT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>; +pub type PKTCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DPID` reader - Data PID"] pub type DPID_R = crate::FieldReader; #[doc = "Field `DPID` writer - Data PID"] -pub type DPID_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>; +pub type DPID_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:18 - Transfer size"] #[inline(always)] @@ -42,27 +42,27 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:18 - Transfer size"] #[inline(always)] #[must_use] - pub fn xfrsiz(&mut self) -> XFRSIZ_W { - XFRSIZ_W::new(self) + pub fn xfrsiz(&mut self) -> XFRSIZ_W { + XFRSIZ_W::new(self, 0) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] #[must_use] - pub fn pktcnt(&mut self) -> PKTCNT_W { - PKTCNT_W::new(self) + pub fn pktcnt(&mut self) -> PKTCNT_W { + PKTCNT_W::new(self, 19) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] #[must_use] - pub fn dpid(&mut self) -> DPID_W { - DPID_W::new(self) + pub fn dpid(&mut self) -> DPID_W { + DPID_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/hprt.rs b/crates/bcm2837-lpa/src/usb_otg_host/hprt.rs index ca27b6f..ccff5b5 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/hprt.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/hprt.rs @@ -7,43 +7,43 @@ pub type PCSTS_R = crate::BitReader; #[doc = "Field `PCDET` reader - Port connect detected"] pub type PCDET_R = crate::BitReader; #[doc = "Field `PCDET` writer - Port connect detected"] -pub type PCDET_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PCDET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENA` reader - Port enable"] pub type PENA_R = crate::BitReader; #[doc = "Field `PENA` writer - Port enable"] -pub type PENA_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PENA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENCHNG` reader - Port enable/disable change"] pub type PENCHNG_R = crate::BitReader; #[doc = "Field `PENCHNG` writer - Port enable/disable change"] -pub type PENCHNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PENCHNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POCA` reader - Port overcurrent active"] pub type POCA_R = crate::BitReader; #[doc = "Field `POCCHNG` reader - Port overcurrent change"] pub type POCCHNG_R = crate::BitReader; #[doc = "Field `POCCHNG` writer - Port overcurrent change"] -pub type POCCHNG_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type POCCHNG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRES` reader - Port resume"] pub type PRES_R = crate::BitReader; #[doc = "Field `PRES` writer - Port resume"] -pub type PRES_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PRES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSUSP` reader - Port suspend"] pub type PSUSP_R = crate::BitReader; #[doc = "Field `PSUSP` writer - Port suspend"] -pub type PSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRST` reader - Port reset"] pub type PRST_R = crate::BitReader; #[doc = "Field `PRST` writer - Port reset"] -pub type PRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PLSTS` reader - Port line status"] pub type PLSTS_R = crate::FieldReader; #[doc = "Field `PPWR` reader - Port power"] pub type PPWR_R = crate::BitReader; #[doc = "Field `PPWR` writer - Port power"] -pub type PPWR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PPWR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTCTL` reader - Port test control"] pub type PTCTL_R = crate::FieldReader; #[doc = "Field `PTCTL` writer - Port test control"] -pub type PTCTL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>; +pub type PTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PSPD` reader - Port speed"] pub type PSPD_R = crate::FieldReader; impl R { @@ -134,63 +134,63 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 1 - Port connect detected"] #[inline(always)] #[must_use] - pub fn pcdet(&mut self) -> PCDET_W { - PCDET_W::new(self) + pub fn pcdet(&mut self) -> PCDET_W { + PCDET_W::new(self, 1) } #[doc = "Bit 2 - Port enable"] #[inline(always)] #[must_use] - pub fn pena(&mut self) -> PENA_W { - PENA_W::new(self) + pub fn pena(&mut self) -> PENA_W { + PENA_W::new(self, 2) } #[doc = "Bit 3 - Port enable/disable change"] #[inline(always)] #[must_use] - pub fn penchng(&mut self) -> PENCHNG_W { - PENCHNG_W::new(self) + pub fn penchng(&mut self) -> PENCHNG_W { + PENCHNG_W::new(self, 3) } #[doc = "Bit 5 - Port overcurrent change"] #[inline(always)] #[must_use] - pub fn pocchng(&mut self) -> POCCHNG_W { - POCCHNG_W::new(self) + pub fn pocchng(&mut self) -> POCCHNG_W { + POCCHNG_W::new(self, 5) } #[doc = "Bit 6 - Port resume"] #[inline(always)] #[must_use] - pub fn pres(&mut self) -> PRES_W { - PRES_W::new(self) + pub fn pres(&mut self) -> PRES_W { + PRES_W::new(self, 6) } #[doc = "Bit 7 - Port suspend"] #[inline(always)] #[must_use] - pub fn psusp(&mut self) -> PSUSP_W { - PSUSP_W::new(self) + pub fn psusp(&mut self) -> PSUSP_W { + PSUSP_W::new(self, 7) } #[doc = "Bit 8 - Port reset"] #[inline(always)] #[must_use] - pub fn prst(&mut self) -> PRST_W { - PRST_W::new(self) + pub fn prst(&mut self) -> PRST_W { + PRST_W::new(self, 8) } #[doc = "Bit 12 - Port power"] #[inline(always)] #[must_use] - pub fn ppwr(&mut self) -> PPWR_W { - PPWR_W::new(self) + pub fn ppwr(&mut self) -> PPWR_W { + PPWR_W::new(self, 12) } #[doc = "Bits 13:16 - Port test control"] #[inline(always)] #[must_use] - pub fn ptctl(&mut self) -> PTCTL_W { - PTCTL_W::new(self) + pub fn ptctl(&mut self) -> PTCTL_W { + PTCTL_W::new(self, 13) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_host/hptxsts.rs b/crates/bcm2837-lpa/src/usb_otg_host/hptxsts.rs index ffb1b12..41663c6 100644 --- a/crates/bcm2837-lpa/src/usb_otg_host/hptxsts.rs +++ b/crates/bcm2837-lpa/src/usb_otg_host/hptxsts.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `PTXFSAVL` reader - Periodic transmit data FIFO space available"] pub type PTXFSAVL_R = crate::FieldReader; #[doc = "Field `PTXFSAVL` writer - Periodic transmit data FIFO space available"] -pub type PTXFSAVL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 16, O, u16>; +pub type PTXFSAVL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTXQSAV` reader - Periodic transmit request queue space available"] pub type PTXQSAV_R = crate::FieldReader; #[doc = "Field `PTXQTOP` reader - Top of the periodic transmit request queue"] @@ -38,15 +38,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bits 0:15 - Periodic transmit data FIFO space available"] #[inline(always)] #[must_use] - pub fn ptxfsavl(&mut self) -> PTXFSAVL_W { - PTXFSAVL_W::new(self) + pub fn ptxfsavl(&mut self) -> PTXFSAVL_W { + PTXFSAVL_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/usb_otg_pwrclk.rs b/crates/bcm2837-lpa/src/usb_otg_pwrclk.rs index 242f3b2..17de0ae 100644 --- a/crates/bcm2837-lpa/src/usb_otg_pwrclk.rs +++ b/crates/bcm2837-lpa/src/usb_otg_pwrclk.rs @@ -2,8 +2,14 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { + pcgcctl: PCGCCTL, +} +impl RegisterBlock { #[doc = "0x00 - power and clock gating control"] - pub pcgcctl: PCGCCTL, + #[inline(always)] + pub const fn pcgcctl(&self) -> &PCGCCTL { + &self.pcgcctl + } } #[doc = "PCGCCTL (rw) register accessor: power and clock gating control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] module"] diff --git a/crates/bcm2837-lpa/src/usb_otg_pwrclk/pcgcctl.rs b/crates/bcm2837-lpa/src/usb_otg_pwrclk/pcgcctl.rs index 97a2598..7a3322c 100644 --- a/crates/bcm2837-lpa/src/usb_otg_pwrclk/pcgcctl.rs +++ b/crates/bcm2837-lpa/src/usb_otg_pwrclk/pcgcctl.rs @@ -5,63 +5,63 @@ pub type W = crate::W; #[doc = "Field `STPPCLK` reader - Stop PHY clock"] pub type STPPCLK_R = crate::BitReader; #[doc = "Field `STPPCLK` writer - Stop PHY clock"] -pub type STPPCLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type STPPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GATEHCLK` reader - Gate HCLK"] pub type GATEHCLK_R = crate::BitReader; #[doc = "Field `GATEHCLK` writer - Gate HCLK"] -pub type GATEHCLK_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type GATEHCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRCLMP` reader - Power clamp"] pub type PWRCLMP_R = crate::BitReader; #[doc = "Field `PWRCLMP` writer - Power clamp"] -pub type PWRCLMP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PWRCLMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTPDWNMODULE` reader - Power down modules"] pub type RSTPDWNMODULE_R = crate::BitReader; #[doc = "Field `RSTPDWNMODULE` writer - Power down modules"] -pub type RSTPDWNMODULE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RSTPDWNMODULE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PHYSUSP` reader - PHY Suspended"] pub type PHYSUSP_R = crate::BitReader; #[doc = "Field `PHYSUSP` writer - PHY Suspended"] -pub type PHYSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE_L1GATING` reader - Enable sleep clock gating"] pub type ENABLE_L1GATING_R = crate::BitReader; #[doc = "Field `ENABLE_L1GATING` writer - Enable sleep clock gating"] -pub type ENABLE_L1GATING_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENABLE_L1GATING_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PHYSLEEP` reader - PHY is in sleep mode"] pub type PHYSLEEP_R = crate::BitReader; #[doc = "Field `PHYSLEEP` writer - PHY is in sleep mode"] -pub type PHYSLEEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type PHYSLEEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEEPSLEEP` reader - PHY is in deep sleep"] pub type DEEPSLEEP_R = crate::BitReader; #[doc = "Field `DEEPSLEEP` writer - PHY is in deep sleep"] -pub type DEEPSLEEP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type DEEPSLEEP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETAFTERSUSP` reader - Reset after suspend"] pub type RESETAFTERSUSP_R = crate::BitReader; #[doc = "Field `RESETAFTERSUSP` writer - Reset after suspend"] -pub type RESETAFTERSUSP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RESETAFTERSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTOREMODE` reader - Restore mode"] pub type RESTOREMODE_R = crate::BitReader; #[doc = "Field `RESTOREMODE` writer - Restore mode"] -pub type RESTOREMODE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type RESTOREMODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENEXTNDEDHIBER` reader - Enable extended hibernation"] pub type ENEXTNDEDHIBER_R = crate::BitReader; #[doc = "Field `ENEXTNDEDHIBER` writer - Enable extended hibernation"] -pub type ENEXTNDEDHIBER_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ENEXTNDEDHIBER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTNDEDHIBERNATIONCLAMP` reader - Extended hibernation clamp"] pub type EXTNDEDHIBERNATIONCLAMP_R = crate::BitReader; #[doc = "Field `EXTNDEDHIBERNATIONCLAMP` writer - Extended hibernation clamp"] -pub type EXTNDEDHIBERNATIONCLAMP_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EXTNDEDHIBERNATIONCLAMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTNDEDHIBERNATIONSWITCH` reader - Extended hibernation switch"] pub type EXTNDEDHIBERNATIONSWITCH_R = crate::BitReader; #[doc = "Field `EXTNDEDHIBERNATIONSWITCH` writer - Extended hibernation switch"] -pub type EXTNDEDHIBERNATIONSWITCH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type EXTNDEDHIBERNATIONSWITCH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESSREGRESTORED` reader - Essential register values restored"] pub type ESSREGRESTORED_R = crate::BitReader; #[doc = "Field `ESSREGRESTORED` writer - Essential register values restored"] -pub type ESSREGRESTORED_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type ESSREGRESTORED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTORE_VALUE` reader - Restore value"] pub type RESTORE_VALUE_R = crate::FieldReader; #[doc = "Field `RESTORE_VALUE` writer - Restore value"] -pub type RESTORE_VALUE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 18, O, u32>; +pub type RESTORE_VALUE_W<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; impl R { #[doc = "Bit 0 - Stop PHY clock"] #[inline(always)] @@ -186,99 +186,99 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Stop PHY clock"] #[inline(always)] #[must_use] - pub fn stppclk(&mut self) -> STPPCLK_W { - STPPCLK_W::new(self) + pub fn stppclk(&mut self) -> STPPCLK_W { + STPPCLK_W::new(self, 0) } #[doc = "Bit 1 - Gate HCLK"] #[inline(always)] #[must_use] - pub fn gatehclk(&mut self) -> GATEHCLK_W { - GATEHCLK_W::new(self) + pub fn gatehclk(&mut self) -> GATEHCLK_W { + GATEHCLK_W::new(self, 1) } #[doc = "Bit 2 - Power clamp"] #[inline(always)] #[must_use] - pub fn pwrclmp(&mut self) -> PWRCLMP_W { - PWRCLMP_W::new(self) + pub fn pwrclmp(&mut self) -> PWRCLMP_W { + PWRCLMP_W::new(self, 2) } #[doc = "Bit 3 - Power down modules"] #[inline(always)] #[must_use] - pub fn rstpdwnmodule(&mut self) -> RSTPDWNMODULE_W { - RSTPDWNMODULE_W::new(self) + pub fn rstpdwnmodule(&mut self) -> RSTPDWNMODULE_W { + RSTPDWNMODULE_W::new(self, 3) } #[doc = "Bit 4 - PHY Suspended"] #[inline(always)] #[must_use] - pub fn physusp(&mut self) -> PHYSUSP_W { - PHYSUSP_W::new(self) + pub fn physusp(&mut self) -> PHYSUSP_W { + PHYSUSP_W::new(self, 4) } #[doc = "Bit 5 - Enable sleep clock gating"] #[inline(always)] #[must_use] - pub fn enable_l1gating(&mut self) -> ENABLE_L1GATING_W { - ENABLE_L1GATING_W::new(self) + pub fn enable_l1gating(&mut self) -> ENABLE_L1GATING_W { + ENABLE_L1GATING_W::new(self, 5) } #[doc = "Bit 6 - PHY is in sleep mode"] #[inline(always)] #[must_use] - pub fn physleep(&mut self) -> PHYSLEEP_W { - PHYSLEEP_W::new(self) + pub fn physleep(&mut self) -> PHYSLEEP_W { + PHYSLEEP_W::new(self, 6) } #[doc = "Bit 7 - PHY is in deep sleep"] #[inline(always)] #[must_use] - pub fn deepsleep(&mut self) -> DEEPSLEEP_W { - DEEPSLEEP_W::new(self) + pub fn deepsleep(&mut self) -> DEEPSLEEP_W { + DEEPSLEEP_W::new(self, 7) } #[doc = "Bit 8 - Reset after suspend"] #[inline(always)] #[must_use] - pub fn resetaftersusp(&mut self) -> RESETAFTERSUSP_W { - RESETAFTERSUSP_W::new(self) + pub fn resetaftersusp(&mut self) -> RESETAFTERSUSP_W { + RESETAFTERSUSP_W::new(self, 8) } #[doc = "Bit 9 - Restore mode"] #[inline(always)] #[must_use] - pub fn restoremode(&mut self) -> RESTOREMODE_W { - RESTOREMODE_W::new(self) + pub fn restoremode(&mut self) -> RESTOREMODE_W { + RESTOREMODE_W::new(self, 9) } #[doc = "Bit 10 - Enable extended hibernation"] #[inline(always)] #[must_use] - pub fn enextndedhiber(&mut self) -> ENEXTNDEDHIBER_W { - ENEXTNDEDHIBER_W::new(self) + pub fn enextndedhiber(&mut self) -> ENEXTNDEDHIBER_W { + ENEXTNDEDHIBER_W::new(self, 10) } #[doc = "Bit 11 - Extended hibernation clamp"] #[inline(always)] #[must_use] - pub fn extndedhibernationclamp(&mut self) -> EXTNDEDHIBERNATIONCLAMP_W { - EXTNDEDHIBERNATIONCLAMP_W::new(self) + pub fn extndedhibernationclamp(&mut self) -> EXTNDEDHIBERNATIONCLAMP_W { + EXTNDEDHIBERNATIONCLAMP_W::new(self, 11) } #[doc = "Bit 12 - Extended hibernation switch"] #[inline(always)] #[must_use] - pub fn extndedhibernationswitch(&mut self) -> EXTNDEDHIBERNATIONSWITCH_W { - EXTNDEDHIBERNATIONSWITCH_W::new(self) + pub fn extndedhibernationswitch(&mut self) -> EXTNDEDHIBERNATIONSWITCH_W { + EXTNDEDHIBERNATIONSWITCH_W::new(self, 12) } #[doc = "Bit 13 - Essential register values restored"] #[inline(always)] #[must_use] - pub fn essregrestored(&mut self) -> ESSREGRESTORED_W { - ESSREGRESTORED_W::new(self) + pub fn essregrestored(&mut self) -> ESSREGRESTORED_W { + ESSREGRESTORED_W::new(self, 13) } #[doc = "Bits 14:31 - Restore value"] #[inline(always)] #[must_use] - pub fn restore_value(&mut self) -> RESTORE_VALUE_W { - RESTORE_VALUE_W::new(self) + pub fn restore_value(&mut self) -> RESTORE_VALUE_W { + RESTORE_VALUE_W::new(self, 14) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/vcmailbox.rs b/crates/bcm2837-lpa/src/vcmailbox.rs index f3d9184..7faef45 100644 --- a/crates/bcm2837-lpa/src/vcmailbox.rs +++ b/crates/bcm2837-lpa/src/vcmailbox.rs @@ -2,28 +2,70 @@ #[repr(C)] #[derive(Debug)] pub struct RegisterBlock { - #[doc = "0x00 - Read messages from the VideoCore"] - pub read: READ, + read: READ, _reserved1: [u8; 0x0c], + peek0: PEEK0, + sender0: SENDER0, + status0: STATUS0, + config0: CONFIG0, + write: WRITE, + _reserved6: [u8; 0x0c], + peek1: PEEK1, + sender1: SENDER1, + status1: STATUS1, + config1: CONFIG1, +} +impl RegisterBlock { + #[doc = "0x00 - Read messages from the VideoCore"] + #[inline(always)] + pub const fn read(&self) -> &READ { + &self.read + } #[doc = "0x10 - "] - pub peek0: PEEK0, + #[inline(always)] + pub const fn peek0(&self) -> &PEEK0 { + &self.peek0 + } #[doc = "0x14 - "] - pub sender0: SENDER0, + #[inline(always)] + pub const fn sender0(&self) -> &SENDER0 { + &self.sender0 + } #[doc = "0x18 - "] - pub status0: STATUS0, + #[inline(always)] + pub const fn status0(&self) -> &STATUS0 { + &self.status0 + } #[doc = "0x1c - "] - pub config0: CONFIG0, + #[inline(always)] + pub const fn config0(&self) -> &CONFIG0 { + &self.config0 + } #[doc = "0x20 - Write messages to the VideoCore"] - pub write: WRITE, - _reserved6: [u8; 0x0c], + #[inline(always)] + pub const fn write(&self) -> &WRITE { + &self.write + } #[doc = "0x30 - "] - pub peek1: PEEK1, + #[inline(always)] + pub const fn peek1(&self) -> &PEEK1 { + &self.peek1 + } #[doc = "0x34 - "] - pub sender1: SENDER1, + #[inline(always)] + pub const fn sender1(&self) -> &SENDER1 { + &self.sender1 + } #[doc = "0x38 - "] - pub status1: STATUS1, + #[inline(always)] + pub const fn status1(&self) -> &STATUS1 { + &self.status1 + } #[doc = "0x3c - "] - pub config1: CONFIG1, + #[inline(always)] + pub const fn config1(&self) -> &CONFIG1 { + &self.config1 + } } #[doc = "READ (r) register accessor: Read messages from the VideoCore\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`read::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@read`] module"] diff --git a/crates/bcm2837-lpa/src/vcmailbox/config0.rs b/crates/bcm2837-lpa/src/vcmailbox/config0.rs index b90c56d..eedd705 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/config0.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/config0.rs @@ -5,7 +5,7 @@ pub type W = crate::W; #[doc = "Field `IRQEN` reader - Enable the interrupt when data is available"] pub type IRQEN_R = crate::BitReader; #[doc = "Field `IRQEN` writer - Enable the interrupt when data is available"] -pub type IRQEN_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>; +pub type IRQEN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable the interrupt when data is available"] #[inline(always)] @@ -22,15 +22,15 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { #[doc = "Bit 0 - Enable the interrupt when data is available"] #[inline(always)] #[must_use] - pub fn irqen(&mut self) -> IRQEN_W { - IRQEN_W::new(self) + pub fn irqen(&mut self) -> IRQEN_W { + IRQEN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/crates/bcm2837-lpa/src/vcmailbox/config1.rs b/crates/bcm2837-lpa/src/vcmailbox/config1.rs index 8a50eee..349f301 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/config1.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/config1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/vcmailbox/peek0.rs b/crates/bcm2837-lpa/src/vcmailbox/peek0.rs index 9119a22..84b4901 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/peek0.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/peek0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/vcmailbox/peek1.rs b/crates/bcm2837-lpa/src/vcmailbox/peek1.rs index 221331c..cd5f491 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/peek1.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/peek1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/vcmailbox/read.rs b/crates/bcm2837-lpa/src/vcmailbox/read.rs index 7328372..42a55f5 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/read.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/read.rs @@ -7,7 +7,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "Read messages from the VideoCore\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`read::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/vcmailbox/sender0.rs b/crates/bcm2837-lpa/src/vcmailbox/sender0.rs index 4b8ec27..8e2da52 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/sender0.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/sender0.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/vcmailbox/sender1.rs b/crates/bcm2837-lpa/src/vcmailbox/sender1.rs index f787ecb..f76a754 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/sender1.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/sender1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W { diff --git a/crates/bcm2837-lpa/src/vcmailbox/status0.rs b/crates/bcm2837-lpa/src/vcmailbox/status0.rs index 92a12f6..080d718 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/status0.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/status0.rs @@ -26,7 +26,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } #[doc = "\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/crates/bcm2837-lpa/src/vcmailbox/status1.rs b/crates/bcm2837-lpa/src/vcmailbox/status1.rs index 64ad85f..4403a52 100644 --- a/crates/bcm2837-lpa/src/vcmailbox/status1.rs +++ b/crates/bcm2837-lpa/src/vcmailbox/status1.rs @@ -9,7 +9,7 @@ impl core::fmt::Debug for R { } impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } impl W {