diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..dd39a86a --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +*.o +*.so* +driver/include diff --git a/driver/src/common/xaie_helper.c b/driver/src/common/xaie_helper.c index ec08c910..16f7e353 100644 --- a/driver/src/common/xaie_helper.c +++ b/driver/src/common/xaie_helper.c @@ -1506,7 +1506,7 @@ AieRC XAie_BlockWrite32(XAie_DevInst *DevInst, u64 RegOff, const u32 *Data, u32 return XAIE_ERR; } - Buf = memcpy((void *)Buf, (void *)Data, sizeof(u32) * Size); + Buf = memcpy((void *)Buf, (const void *)Data, sizeof(u32) * Size); TxnInst->CmdBuf[TxnInst->NumCmds].Opcode = XAIE_IO_BLOCKWRITE; TxnInst->CmdBuf[TxnInst->NumCmds].RegOff = RegOff; TxnInst->CmdBuf[TxnInst->NumCmds].DataPtr = (u64)(uintptr_t)Buf; diff --git a/driver/src/common/xaie_helper.h b/driver/src/common/xaie_helper.h index 6ef8aa12..674a2f38 100644 --- a/driver/src/common/xaie_helper.h +++ b/driver/src/common/xaie_helper.h @@ -87,14 +87,8 @@ /* Generate value with a set bit at given Index */ #define BIT(Index) (1 << (Index)) -/* - * __attribute is not supported for windows. remove it conditionally. - */ -#ifdef _MSC_VER -#define XAIE_PACK_ATTRIBUTE -#else -#define XAIE_PACK_ATTRIBUTE __attribute__((packed, aligned(4))) -#endif +/* Suppress warning of unused parameter */ +#define UNUSED(_x) (_x = _x) /* Data structure to capture the dma status */ typedef struct { diff --git a/driver/src/common/xaie_txn.h b/driver/src/common/xaie_txn.h index 694a867c..ae3f51c6 100644 --- a/driver/src/common/xaie_txn.h +++ b/driver/src/common/xaie_txn.h @@ -39,7 +39,8 @@ typedef enum { XAIE_IO_CUSTOM_OP_TCT = XAIE_IO_CUSTOM_OP_BEGIN, XAIE_IO_CUSTOM_OP_DDR_PATCH, XAIE_IO_CUSTOM_OP_NEXT, - XAIE_IO_CUSTOM_OP_MAX = UCHAR_MAX, + /* add new op here */ + XAIE_IO_CUSTOM_OP_MAX } XAie_TxnOpcode; struct XAie_TxnCmd { diff --git a/driver/src/core/xaie_core_aie.c b/driver/src/core/xaie_core_aie.c index dfb77766..98889f40 100644 --- a/driver/src/core/xaie_core_aie.c +++ b/driver/src/core/xaie_core_aie.c @@ -21,8 +21,6 @@ * ******************************************************************************/ /***************************** Include Files *********************************/ -#include - #include "xaie_core_aie.h" #include "xaie_events_aie.h" #include "xaie_feature_config.h" diff --git a/driver/src/core/xaie_elfloader.c b/driver/src/core/xaie_elfloader.c index 9a930a0d..ea00fcdb 100644 --- a/driver/src/core/xaie_elfloader.c +++ b/driver/src/core/xaie_elfloader.c @@ -242,7 +242,7 @@ static AieRC _XAie_LoadProgMemSection(XAie_DevInst *DevInst, XAie_LocType Loc, * memory out of Progsec will not result in a segmentation * fault. */ - return XAie_BlockWrite32(DevInst, Addr, (u32 *)SectionPtr, + return XAie_BlockWrite32(DevInst, Addr, (const u32 *)SectionPtr, (Phdr->p_memsz + 4U - 1U) / 4U); } @@ -594,7 +594,7 @@ AieRC XAie_LoadElfPartial(XAie_DevInst *DevInst, XAie_LocType Loc, return XAIE_INVALID_ARGS; } - Fd = fopen(ElfPtr, "r"); + Fd = fopen(ElfPtr, "rb"); if(Fd == XAIE_NULL) { XAIE_ERROR("Unable to open elf file, %d: %s\n", errno, strerror(errno)); diff --git a/driver/src/device/xaie_device_aieml.c b/driver/src/device/xaie_device_aieml.c index 6fc8b87f..fd229052 100644 --- a/driver/src/device/xaie_device_aieml.c +++ b/driver/src/device/xaie_device_aieml.c @@ -50,16 +50,13 @@ ******************************************************************************/ u8 _XAieMl_GetTTypefromLoc(XAie_DevInst *DevInst, XAie_LocType Loc) { - u8 ColType; - if(Loc.Col >= DevInst->NumCols) { XAIE_ERROR("Invalid column: %d\n", Loc.Col); return XAIEGBL_TILE_TYPE_MAX; } if(Loc.Row == 0U) { - ColType = (DevInst->StartCol + Loc.Col) % 4U; - if((ColType == 0U) || (ColType == 1U)) { + if((DevInst->StartCol + Loc.Col) == 0U) { return XAIEGBL_TILE_TYPE_SHIMPL; } diff --git a/driver/src/global/xaiegbl.c b/driver/src/global/xaiegbl.c index 06ce0224..fb0c3d30 100644 --- a/driver/src/global/xaiegbl.c +++ b/driver/src/global/xaiegbl.c @@ -184,13 +184,14 @@ AieRC XAie_CfgInitialize(XAie_DevInst *InstPtr, XAie_Config *ConfigPtr) InstPtr->MemTileNumRows = ConfigPtr->MemTileNumRows; InstPtr->AieTileRowStart = ConfigPtr->AieTileRowStart; InstPtr->AieTileNumRows = ConfigPtr->AieTileNumRows; - InstPtr->EccStatus = XAIE_ENABLE; + //InstPtr->EccStatus = XAIE_ENABLE; + InstPtr->EccStatus = XAIE_DISABLE; // IPU InstPtr->TxnList.Next = NULL; memcpy(&InstPtr->PartProp, &ConfigPtr->PartProp, sizeof(ConfigPtr->PartProp)); - RC = XAie_IOInit(InstPtr); + RC = XAie_IOInit(InstPtr, ConfigPtr->Backend); if(RC != XAIE_OK) { return RC; } @@ -1025,7 +1026,7 @@ AieRC XAie_PerfUtilization(XAie_DevInst *DevInst, XAie_PerfInst *PerfInst) PartRange.Num = DevInst->NumCols; XAIE_DBG("Start Col: %d\tnum: %d\n", PartRange.Start, PartRange.Num); PerfInst->Range = &PartRange; - } else if (PerfInst->Range->Num <= 0U || + } else if (PerfInst->Range->Num == 0U || PerfInst->Range->Num > DevInst->NumCols) { XAIE_ERROR("Invalid range!\n"); return XAIE_INVALID_ARGS; diff --git a/driver/src/global/xaiegbl.h b/driver/src/global/xaiegbl.h index 09a734b0..5a66a428 100644 --- a/driver/src/global/xaiegbl.h +++ b/driver/src/global/xaiegbl.h @@ -98,6 +98,7 @@ typedef enum { XAIE_IO_BACKEND_DEBUG, /* IO debug backend */ XAIE_IO_BACKEND_LINUX, /* Linux kernel backend */ XAIE_IO_BACKEND_SOCKET, /* Socket backend */ + XAIE_IO_BACKEND_AMDAIR, /* Use with amdair driver */ XAIE_IO_BACKEND_MAX } XAie_BackendType; @@ -187,6 +188,7 @@ typedef struct { u8 AieTileRowStart; u8 AieTileNumRows; XAie_PartitionProp PartProp; + XAie_BackendType Backend; } XAie_Config; /* @@ -782,7 +784,7 @@ static inline void XAie_SetupConfigPartProp(XAie_Config *ConfigPtr, u32 Nid, * more memory from the user application for resource management. * *******************************************************************************/ -#define XAie_InstDeclare(Inst, ConfigPtr) XAie_DevInst Inst = { 0 } +#define XAie_InstDeclare(Inst, ConfigPtr) XAie_DevInst Inst = {} /*****************************************************************************/ /** diff --git a/driver/src/global/xaiegbl_defs.h b/driver/src/global/xaiegbl_defs.h index 7b602964..4a6f4f29 100644 --- a/driver/src/global/xaiegbl_defs.h +++ b/driver/src/global/xaiegbl_defs.h @@ -66,6 +66,15 @@ typedef uint64_t u64; #define __FORCE_INLINE__ __attribute__((always_inline)) +/* + * __attribute is not supported for windows. remove it conditionally. + */ +#ifdef _MSC_VER +#define XAIE_PACK_ATTRIBUTE +#else +#define XAIE_PACK_ATTRIBUTE __attribute__((packed, aligned(4))) +#endif + /************************** Variable Definitions *****************************/ /************************** Function Prototypes *****************************/ #endif /* end of protection macro */ diff --git a/driver/src/io_backend/ext/xaie_amdair.c b/driver/src/io_backend/ext/xaie_amdair.c new file mode 100644 index 00000000..3b3e7b81 --- /dev/null +++ b/driver/src/io_backend/ext/xaie_amdair.c @@ -0,0 +1,612 @@ +/****************************************************************************** +* Copyright (C) 2023 Xilinx, Inc. All rights reserved. +* SPDX-License-Identifier: MIT +******************************************************************************/ + +/***************************** Include Files *********************************/ +#ifndef _XOPEN_SOURCE +#define _XOPEN_SOURCE 500 +#endif // _XOPEN_SOURCE + +#ifdef __linux__ +#include +#endif +#include +#include +#include +#include +#include +#include +#include + +#include "xaie_helper.h" +#include "xaie_io.h" +#include "xaie_io_common.h" +#include "xaie_io_privilege.h" +#include "xaie_npi.h" + +/****************************** Type Definitions *****************************/ +typedef struct { + u64 BaseAddr; + u64 NpiBaseAddr; + char *AmdAirAddress; + char *AmdAirValue; +} XAie_AmdAirIO; + +/************************** Function Definitions *****************************/ +/*****************************************************************************/ +/** +* +* This is the memory IO function to free the global IO instance +* +* @param IOInst: IO Instance pointer. +* +* @return None. +* +* @note The global IO instance is a singleton and freed when +* the reference count reaches a zero. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_Finish(void *IOInst) +{ + XAie_AmdAirIO *DevInst = (XAie_AmdAirIO *)IOInst; + free(DevInst->AmdAirAddress); + free(DevInst->AmdAirValue); + free(DevInst); + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to initialize the global IO instance +* +* @param DevInst: Device instance pointer. +* +* @return XAIE_OK on success. Error code on failure. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_Init(XAie_DevInst *DevInst) +{ + XAie_AmdAirIO *IOInst; + + IOInst = (XAie_AmdAirIO *)malloc(sizeof(*IOInst)); + if(IOInst == NULL) { + XAIE_ERROR("Memory allocation failed\n"); + return XAIE_ERR; + } + + // recover sysfs path + if (!DevInst->IOInst) { + XAIE_ERROR("sysfs path not present!\n"); + return XAIE_ERR; + } + + IOInst->BaseAddr = DevInst->BaseAddr; + IOInst->NpiBaseAddr = XAIE_NPI_BASEADDR; + + IOInst->AmdAirAddress = malloc(strlen((const char *)DevInst->IOInst) + strlen("/address") + 1); + sprintf(IOInst->AmdAirAddress, "%s/address", (const char *)DevInst->IOInst); + + IOInst->AmdAirValue = malloc(strlen((const char *)DevInst->IOInst) + strlen("/value") + 1); + sprintf(IOInst->AmdAirValue, "%s/value", (const char *)DevInst->IOInst); + + DevInst->IOInst = IOInst; + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to write 32bit data to the specified address. +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to read from. +* @param Value: 32-bit data to be written. +* +* @return None. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_Write32(void *IOInst, u64 RegOff, u32 Value) +{ + char buf[20]; + XAie_AmdAirIO *AmdAirIOInst = (XAie_AmdAirIO *)IOInst; + + XAIE_DBG("W: 0x%lx, 0x%x\n", RegOff, Value); + + int address = open(AmdAirIOInst->AmdAirAddress, O_WRONLY); + if (address == -1) { + XAIE_ERROR("Error opening %s\n", AmdAirIOInst->AmdAirAddress); + return XAIE_ERR; + } + sprintf(buf, "0x%lx", RegOff); + write(address, buf, strlen(buf) + 1); + close(address); + + int value = open(AmdAirIOInst->AmdAirValue, O_WRONLY); + if (value == -1) { + XAIE_ERROR("Error opening %s\n", AmdAirIOInst->AmdAirValue); + return XAIE_ERR; + } + sprintf(buf, "0x%x", Value); + write(value, buf, strlen(buf) + 1); + close(value); + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to read 32bit data from the specified address. +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to read from. +* @param Data: Pointer to store the 32 bit value +* +* @return XAIE_OK on success. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_Read32(void *IOInst, u64 RegOff, u32 *Data) +{ + char buf[20]; + XAie_AmdAirIO *AmdAirIOInst = (XAie_AmdAirIO *)IOInst; + + int address = open(AmdAirIOInst->AmdAirAddress, O_WRONLY); + if (address == -1) { + XAIE_ERROR("Error opening %s\n", AmdAirIOInst->AmdAirAddress); + return XAIE_ERR; + } + sprintf(buf, "0x%lx", RegOff); + write(address, buf, strlen(buf) + 1); + close(address); + + int value = open(AmdAirIOInst->AmdAirValue, O_RDONLY); + if (value == -1) { + XAIE_ERROR("Error opening %s\n", AmdAirIOInst->AmdAirValue); + return XAIE_ERR; + } + read(value, buf, strlen(buf) + 1); + close(value); + *Data = strtoul(buf, 0, 0); + + XAIE_DBG("R: 0x%lx = 0x%x\n", RegOff, *Data); + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* Write a value to a register by first clearing some bits from the register. +* The bits are cleared by reading the current value and applying the mask. +* Then the value is updated and written back to the register. +* +* @param IOInst: IO instance pointer +* @param RegOff: Offset of the register to update. +* @param Mask: Mask to be applied to Data. +* @param Value: 32-bit data to be written. +* +* @return None. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_MaskWrite32(void *IOInst, u64 RegOff, u32 Mask, + u32 Value) +{ + u32 RegVal; + + AieRC rc = XAie_AmdAirIO_Read32(IOInst, RegOff, &RegVal); + if (rc != XAIE_OK) { + XAIE_ERROR("Failed to perform Read32 during MaskWrite32 operation\n"); + return rc; + } + + RegVal &= ~Mask; + return XAie_AmdAirIO_Write32(IOInst, RegOff, (RegVal | Value)); +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to mask poll an address for a value. +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to read from. +* @param Mask: Mask to be applied to Data. +* @param Value: 32-bit value to poll for +* @param TimeOutUs: Timeout in micro seconds. +* +* @return XAIE_ERR. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_MaskPoll(void *IOInst, u64 RegOff, u32 Mask, u32 Value, + u32 TimeOutUs) +{ + u32 RegVal; + u32 MinTimeOutUs = 200; + AieRC Ret = XAIE_ERR; + + XAIE_DBG("MP: 0x%lx, 0x%x, 0x%x, %u\n", RegOff, Mask, Value, TimeOutUs); + + do { + XAie_AmdAirIO_Read32(IOInst, RegOff, &RegVal); + if((RegVal & Mask) == Value) { + Ret = XAIE_OK; + break; + } + + if (TimeOutUs) { + usleep(MinTimeOutUs); + TimeOutUs -= (TimeOutUs > MinTimeOutUs ? MinTimeOutUs : TimeOutUs); + } + } while (TimeOutUs); + + return Ret; +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to write a block of data to aie. +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to read from. +* @param Data: Pointer to the data buffer. +* @param Size: Number of 32-bit words. +* +* @return None. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_BlockWrite32(void *IOInst, u64 RegOff, + const u32 *Data, u32 Size) +{ + for(u32 i = 0U; i < Size; i ++) { + XAie_AmdAirIO_Write32(IOInst, RegOff + i * 4U, *Data); + Data++; + } + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to initialize a chunk of aie address space with +* a specified value. +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to read from. +* @param Data: Data to initialize a chunk of aie address space.. +* @param Size: Number of 32-bit words. +* +* @return None. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_BlockSet32(void *IOInst, u64 RegOff, u32 Data, + u32 Size) +{ + for(u32 i = 0U; i < Size; i++) + XAie_AmdAirIO_Write32(IOInst, RegOff+ i * 4U, Data); + + return XAIE_OK; +} + +static AieRC XAie_AmdAirIO_CmdWrite(void *IOInst, u8 Col, u8 Row, u8 Command, + u32 CmdWd0, u32 CmdWd1, const char *CmdStr) +{ + XAIE_DBG("%s not implemented\n", __func__); + + /* no-op */ + (void)IOInst; + (void)Col; + (void)Row; + (void)Command; + (void)CmdWd0; + (void)CmdWd1; + (void)CmdStr; + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the function to write to AI engine NPI registers +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to write. +* @param RegVal: Register value to write +* +* @return None. +* +* @note None. +* +*******************************************************************************/ +static void _XAie_AmdAirIO_NpiWrite32(void *IOInst, u32 RegOff, + u32 RegVal) +{ + UNUSED(IOInst); + UNUSED(RegOff); + UNUSED(RegVal); + + XAIE_DBG("NPIMW not implemented\n"); +} + +/*****************************************************************************/ +/** +* +* This is the memory IO function to mask poll a NPI address for a value. +* +* @param IOInst: IO instance pointer +* @param RegOff: Register offset to read from. +* @param Mask: Mask to be applied to Data. +* @param Value: 32-bit value to poll for +* @param TimeOutUs: Timeout in micro seconds. +* +* @return XAIE_OK. +* +* @note None. +* +*******************************************************************************/ +static AieRC _XAie_AmdAirIO_NpiMaskPoll(void *IOInst, u64 RegOff, u32 Mask, + u32 Value, u32 TimeOutUs) +{ + UNUSED(IOInst); + UNUSED(RegOff); + UNUSED(Mask); + UNUSED(Value); + UNUSED(TimeOutUs); + + XAIE_DBG("NPIMP: 0x%lx, 0x%x, 0x%x, 0x%d\n", AmdAirIOInst->NpiBaseAddr + RegOff, + Mask, Value, TimeOutUs); + + return XAIE_OK; +} + + +/*****************************************************************************/ +/** +* +* This is the function to run backend operations +* +* @param IOInst: IO instance pointer +* @param DevInst: AI engine partition device instance +* @param Op: Backend operation code +* @param Arg: Backend operation argument +* +* @return XAIE_OK for success and error code for failure. +* +* @note None. +* +*******************************************************************************/ +static AieRC XAie_AmdAirIO_RunOp(void *IOInst, XAie_DevInst *DevInst, + XAie_BackendOpCode Op, void *Arg) +{ + AieRC RC = XAIE_OK; + (void)IOInst; + + XAIE_DBG("%s %u\n", __func__, Op); + switch(Op) { + case XAIE_BACKEND_OP_NPIWR32: + { + XAie_BackendNpiWrReq *Req = Arg; + + _XAie_AmdAirIO_NpiWrite32(IOInst, Req->NpiRegOff, + Req->Val); + break; + } + case XAIE_BACKEND_OP_NPIMASKPOLL32: + { + XAie_BackendNpiMaskPollReq *Req = Arg; + + return _XAie_AmdAirIO_NpiMaskPoll(IOInst, Req->NpiRegOff, + Req->Mask, Req->Val, Req->TimeOutUs); + } + case XAIE_BACKEND_OP_ASSERT_SHIMRST: + { + u8 RstEnable = (u8)((uintptr_t)Arg & 0xFF); + + _XAie_NpiSetShimReset(DevInst, RstEnable); + break; + } + case XAIE_BACKEND_OP_SET_PROTREG: + { + RC = _XAie_NpiSetProtectedRegEnable(DevInst, Arg); + break; + } + case XAIE_BACKEND_OP_CONFIG_SHIMDMABD: + { + XAie_ShimDmaBdArgs *BdArgs = (XAie_ShimDmaBdArgs *)Arg; + for(u8 i = 0; i < BdArgs->NumBdWords; i++) { + XAie_AmdAirIO_Write32(IOInst, + BdArgs->Addr + i * 4, + BdArgs->BdWords[i]); + } + break; + } + case XAIE_BACKEND_OP_REQUEST_TILES: + return _XAie_PrivilegeRequestTiles(DevInst, + (XAie_BackendTilesArray *)Arg); + case XAIE_BACKEND_OP_PARTITION_INITIALIZE: + return _XAie_PrivilegeInitPart(DevInst, + (XAie_PartInitOpts *)Arg); + case XAIE_BACKEND_OP_PARTITION_TEARDOWN: + return _XAie_PrivilegeTeardownPart(DevInst); + default: + XAIE_ERROR("Backend doesn't support Op %u.\n", Op); + RC = XAIE_FEATURE_NOT_SUPPORTED; + break; + } + + return RC; +} + +/*****************************************************************************/ +/** +* +* This is the memory function to allocate a memory +* +* @param DevInst: Device Instance +* @param Size: Size of the memory +* @param Cache: Buffer to be cacheable or not +* +* @return Pointer to the allocated memory instance. +* +* @note Internal only. +* +*******************************************************************************/ +static XAie_MemInst* XAie_AmdAirMemAllocate(XAie_DevInst *DevInst, u64 Size, + XAie_MemCacheProp Cache) +{ + XAie_MemInst *MemInst; + + XAIE_DBG("%s\n", __func__); + MemInst = (XAie_MemInst *)malloc(sizeof(*MemInst)); + if(MemInst == NULL) { + XAIE_ERROR("memory allocation failed\n"); + return NULL; + } + + MemInst->VAddr = (void *)malloc(Size); + if(MemInst->VAddr == NULL) { + XAIE_ERROR("malloc failed\n"); + free(MemInst); + return NULL; + } + MemInst->DevAddr = (u64)MemInst->VAddr; + MemInst->Size = Size; + MemInst->DevInst = DevInst; + + (void)Cache; + XAIE_DBG("Cache attribute is ignored\n"); + + return MemInst; +} + +/*****************************************************************************/ +/** +* +* This is the memory function to free the memory +* +* @param MemInst: Memory instance pointer. +* +* @return XAIE_OK on success, Error code on failure. +* +* @note Internal only. +* +*******************************************************************************/ +static AieRC XAie_AmdAirMemFree(XAie_MemInst *MemInst) +{ + XAIE_DBG("%s\n", __func__); + free(MemInst->VAddr); + free(MemInst); + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the memory function to sync the memory for CPU +* +* @param MemInst: Memory instance pointer. +* +* @return XAIE_OK on success, Error code on failure. +* +* @note Internal only. +* +*******************************************************************************/ +static AieRC XAie_AmdAirMemSyncForCPU(XAie_MemInst *MemInst) +{ + (void)MemInst; + XAIE_DBG("Sync for CPU is no-op in debug mode\n"); + + return XAIE_OK; +} + +/*****************************************************************************/ +/** +* +* This is the memory function to sync the memory for CPU +* +* @param MemInst: Memory instance pointer. +* +* @return XAIE_OK on success, Error code on failure. +* +* @note Internal only. +* +*******************************************************************************/ +static AieRC XAie_AmdAirMemSyncForDev(XAie_MemInst *MemInst) +{ + (void)MemInst; + XAIE_DBG("Sync for Dev is no-op in debug mode\n"); + + return XAIE_OK; +} + +static AieRC XAie_AmdAirMemAttach(XAie_MemInst *MemInst, u64 MemHandle) +{ + (void)MemInst; + (void)MemHandle; + XAIE_DBG("Mem attach is no-op in debug mode\n"); + + return XAIE_OK; +} + +static AieRC XAie_AmdAirMemDetach(XAie_MemInst *MemInst) +{ + (void)MemInst; + XAIE_DBG("Mem detach is no-op in debug mode\n"); + + return XAIE_OK; +} + +static u64 XAie_AmdAirGetTid(void) +{ +#ifdef __linux__ + return (u64)pthread_self(); +#else + return 0; +#endif +} + +const XAie_Backend AmdairBackend = +{ + .Type = XAIE_IO_BACKEND_AMDAIR, + .Ops.Init = XAie_AmdAirIO_Init, + .Ops.Finish = XAie_AmdAirIO_Finish, + .Ops.Write32 = XAie_AmdAirIO_Write32, + .Ops.Read32 = XAie_AmdAirIO_Read32, + .Ops.MaskWrite32 = XAie_AmdAirIO_MaskWrite32, + .Ops.MaskPoll = XAie_AmdAirIO_MaskPoll, + .Ops.BlockWrite32 = XAie_AmdAirIO_BlockWrite32, + .Ops.BlockSet32 = XAie_AmdAirIO_BlockSet32, + .Ops.CmdWrite = XAie_AmdAirIO_CmdWrite, + .Ops.RunOp = XAie_AmdAirIO_RunOp, + .Ops.MemAllocate = XAie_AmdAirMemAllocate, + .Ops.MemFree = XAie_AmdAirMemFree, + .Ops.MemSyncForCPU = XAie_AmdAirMemSyncForCPU, + .Ops.MemSyncForDev = XAie_AmdAirMemSyncForDev, + .Ops.MemAttach = XAie_AmdAirMemAttach, + .Ops.MemDetach = XAie_AmdAirMemDetach, + .Ops.GetTid = XAie_AmdAirGetTid, + .Ops.SubmitTxn = NULL, +}; + +/** @} */ diff --git a/driver/src/io_backend/ext/xaie_cdo.c b/driver/src/io_backend/ext/xaie_cdo.c index 01c1ea67..f2b16c06 100644 --- a/driver/src/io_backend/ext/xaie_cdo.c +++ b/driver/src/io_backend/ext/xaie_cdo.c @@ -26,19 +26,18 @@ #include #include #include - -#ifdef __AIECDO__ /* AIE simulator */ - -#include "cdo_rts.h" - -#endif - #include "xaie_helper.h" #include "xaie_io.h" #include "xaie_io_common.h" #include "xaie_io_privilege.h" #include "xaie_npi.h" +extern void cdo_Write32(u64, u32); +extern void cdo_MaskWrite32(u64 , u32, u32); +extern void cdo_MaskPoll(u64 , u32, u32, u32); +extern void cdo_BlockWrite32(u64, const u32*, u32); +extern void cdo_BlockSet32(u64, u32, u32); + /************************** Constant Definitions *****************************/ /****************************** Type Definitions *****************************/ typedef struct { diff --git a/driver/src/io_backend/ext/xaie_debug.c b/driver/src/io_backend/ext/xaie_debug.c index 5d8bb92e..4aba9d7f 100644 --- a/driver/src/io_backend/ext/xaie_debug.c +++ b/driver/src/io_backend/ext/xaie_debug.c @@ -107,7 +107,7 @@ static AieRC XAie_DebugIO_Write32(void *IOInst, u64 RegOff, u32 Value) { XAie_DebugIO *DebugIOInst = (XAie_DebugIO *)IOInst; - printf("W: %p, 0x%x\n", (void *) DebugIOInst->BaseAddr + RegOff, Value); + printf("W: %p, 0x%x\n", (uint8_t *) DebugIOInst->BaseAddr + RegOff, Value); return XAIE_OK; } @@ -131,7 +131,7 @@ static AieRC XAie_DebugIO_Read32(void *IOInst, u64 RegOff, u32 *Data) XAie_DebugIO *DebugIOInst = (XAie_DebugIO *)IOInst; *Data = 0U; - printf("R: %p, 0x%x\n", (void *) DebugIOInst->BaseAddr + RegOff, 0); + printf("R: %p, 0x%x\n", (uint8_t *) DebugIOInst->BaseAddr + RegOff, 0); return XAIE_OK; } @@ -157,7 +157,7 @@ static AieRC XAie_DebugIO_MaskWrite32(void *IOInst, u64 RegOff, u32 Mask, { XAie_DebugIO *DebugIOInst = (XAie_DebugIO *)IOInst; - printf("MW: %p, 0x%x, 0x%x\n", (void *) DebugIOInst->BaseAddr + RegOff, + printf("MW: %p, 0x%x, 0x%x\n", (uint8_t *) DebugIOInst->BaseAddr + RegOff, Mask, Value); return XAIE_OK; @@ -184,7 +184,7 @@ static AieRC XAie_DebugIO_MaskPoll(void *IOInst, u64 RegOff, u32 Mask, u32 Value { XAie_DebugIO *DebugIOInst = (XAie_DebugIO *)IOInst; - printf("MP: %p, 0x%x, 0x%x, 0x%d\n", (void *) DebugIOInst->BaseAddr + + printf("MP: %p, 0x%x, 0x%x, 0x%d\n", (uint8_t *) DebugIOInst->BaseAddr + RegOff, Mask, Value, TimeOutUs); return XAIE_ERR; @@ -302,7 +302,7 @@ static AieRC _XAie_DebugIO_NpiMaskPoll(void *IOInst, u64 RegOff, u32 Mask, { XAie_DebugIO *DebugIOInst = (XAie_DebugIO *)IOInst; - printf("MP: %p, 0x%x, 0x%x, 0x%d\n", (void *) DebugIOInst->NpiBaseAddr + + printf("MP: %p, 0x%x, 0x%x, 0x%d\n", (uint8_t *) DebugIOInst->NpiBaseAddr + RegOff, Mask, Value, TimeOutUs); return XAIE_OK; diff --git a/driver/src/io_backend/ext/xaie_linux.c b/driver/src/io_backend/ext/xaie_linux.c index 714fdee8..cfba28a6 100644 --- a/driver/src/io_backend/ext/xaie_linux.c +++ b/driver/src/io_backend/ext/xaie_linux.c @@ -53,9 +53,6 @@ #ifdef __AIELINUX__ /***************************** Global Variable *******************************/ -static struct aie_perfinst_args *Perfinst = NULL; -static XAie_PerfInst *UserInst = NULL; -static void *IOInstLinux = NULL; /****************************** Type Definitions *****************************/ diff --git a/driver/src/io_backend/ext/xaie_sim.c b/driver/src/io_backend/ext/xaie_sim.c index 4d96278e..335f5250 100644 --- a/driver/src/io_backend/ext/xaie_sim.c +++ b/driver/src/io_backend/ext/xaie_sim.c @@ -22,12 +22,18 @@ * ******************************************************************************/ /***************************** Include Files *********************************/ -#include #include #include #include #include -#include + +#ifdef __AIESIM__ +#ifdef _WIN32 +#include +#else +#include +#endif +#endif #ifdef __AIESIM__ /* AIE simulator */ @@ -435,7 +441,11 @@ static AieRC XAie_SimIO_RunOp(void *IOInst, XAie_DevInst *DevInst, static u64 XAie_SimIOGetTid(void) { - return (u64)pthread_self(); +#ifdef _WIN32 + return GetCurrentThreadId(); +#else + return (u64)pthread_self(); +#endif } #else diff --git a/driver/src/io_backend/xaie_io.c b/driver/src/io_backend/xaie_io.c index a05c7f68..f38e04f8 100644 --- a/driver/src/io_backend/xaie_io.c +++ b/driver/src/io_backend/xaie_io.c @@ -43,6 +43,8 @@ #define XAIE_DEFAULT_BACKEND XAIE_IO_BACKEND_BAREMETAL #elif defined (__AIESOCKET__) #define XAIE_DEFAULT_BACKEND XAIE_IO_BACKEND_SOCKET +#elif defined (__AIEAMDAIR__) + #define XAIE_DEFAULT_BACKEND XAIE_IO_BACKEND_AMDAIR #else #define __AIEDEBUG__ #define XAIE_DEFAULT_BACKEND XAIE_IO_BACKEND_DEBUG @@ -78,6 +80,11 @@ #else #define SOCKETBACKEND NULL #endif +#if defined (__AIEAMDAIR__) + #define AMDAIRBACKEND &AmdairBackend +#else + #define AMDAIRBACKEND NULL +#endif #if defined (__AIEDEBUG__) #define DEBUGBACKEND &DebugBackend #else @@ -92,6 +99,7 @@ extern const XAie_Backend BaremetalBackend; extern const XAie_Backend DebugBackend; extern const XAie_Backend LinuxBackend; extern const XAie_Backend SocketBackend; +extern const XAie_Backend AmdairBackend; static const XAie_Backend *IOBackend[XAIE_IO_BACKEND_MAX] = { @@ -102,6 +110,7 @@ static const XAie_Backend *IOBackend[XAIE_IO_BACKEND_MAX] = DEBUGBACKEND, LINUXBACKEND, SOCKETBACKEND, + AMDAIRBACKEND, }; /************************** Function Definitions *****************************/ @@ -118,10 +127,17 @@ static const XAie_Backend *IOBackend[XAIE_IO_BACKEND_MAX] = * @note Internal Only. * ******************************************************************************/ -AieRC XAie_IOInit(XAie_DevInst *DevInst) +AieRC XAie_IOInit(XAie_DevInst *DevInst, XAie_BackendType backend) { AieRC RC; - const XAie_Backend *Backend = IOBackend[XAIE_DEFAULT_BACKEND]; + const XAie_Backend *Backend; + + if (backend >= XAIE_IO_BACKEND_MAX) { + XAIE_DBG("Invalid backend %d; using default\n", backend); + backend = XAIE_DEFAULT_BACKEND; + } + + Backend = IOBackend[backend]; RC = Backend->Ops.Init(DevInst); if(RC != XAIE_OK) { diff --git a/driver/src/io_backend/xaie_io.h b/driver/src/io_backend/xaie_io.h index 18c329f1..4a28b45c 100644 --- a/driver/src/io_backend/xaie_io.h +++ b/driver/src/io_backend/xaie_io.h @@ -160,7 +160,7 @@ struct XAie_Backend { }; /************************** Function Prototypes *****************************/ -AieRC XAie_IOInit(XAie_DevInst *DevInst); +AieRC XAie_IOInit(XAie_DevInst *DevInst, XAie_BackendType backend); #endif /* End of protection macro */ diff --git a/driver/src/pm/xaie_reset_aieml.c b/driver/src/pm/xaie_reset_aieml.c index cd0b3323..c425e24f 100644 --- a/driver/src/pm/xaie_reset_aieml.c +++ b/driver/src/pm/xaie_reset_aieml.c @@ -45,7 +45,7 @@ * * Disable protect registers * ******************************************************************************/ -AieRC _XAieMl_RstShims(XAie_DevInst *DevInst, u32 StartCol, u32 NumCols) +AieRC _XAieMl_RstShims(XAie_DevInst *DevInst, u8 StartCol, u8 NumCols) { XAie_NpiProtRegReq ProtRegReq; diff --git a/driver/src/pm/xaie_reset_aieml.h b/driver/src/pm/xaie_reset_aieml.h index 28704508..0170e39c 100644 --- a/driver/src/pm/xaie_reset_aieml.h +++ b/driver/src/pm/xaie_reset_aieml.h @@ -21,7 +21,7 @@ #include "xaiegbl.h" /************************** Function Prototypes *****************************/ -AieRC _XAieMl_RstShims(XAie_DevInst *DevInst, u32 StartCol, u32 NumCols); +AieRC _XAieMl_RstShims(XAie_DevInst *DevInst, u8 StartCol, u8 NumCols); #endif /* XAIE_RESET_AIEML_H */ /** @} */ diff --git a/driver/src/rsc/xaie_rsc.h b/driver/src/rsc/xaie_rsc.h new file mode 100644 index 00000000..e69de29b diff --git a/driver/src/util/xaie_util_events.c b/driver/src/util/xaie_util_events.c index fd35ec25..ed54c211 100644 --- a/driver/src/util/xaie_util_events.c +++ b/driver/src/util/xaie_util_events.c @@ -33,641 +33,641 @@ static const char* XAie_EventStrings[] = { /* All core module events of aie tile */ - [XAIE_EVENT_NONE_CORE] "NONE_CORE", - [XAIE_EVENT_TRUE_CORE] "TRUE_CORE", - [XAIE_EVENT_GROUP_0_CORE] "GROUP_0_CORE", - [XAIE_EVENT_TIMER_SYNC_CORE] "TIMER_SYNC_CORE", - [XAIE_EVENT_TIMER_VALUE_REACHED_CORE] "TIMER_VALUE_REACHED_CORE", - [XAIE_EVENT_PERF_CNT_0_CORE] "PERF_CNT_0_CORE", - [XAIE_EVENT_PERF_CNT_1_CORE] "PERF_CNT_1_CORE", - [XAIE_EVENT_PERF_CNT_2_CORE] "PERF_CNT_2_CORE", - [XAIE_EVENT_PERF_CNT_3_CORE] "PERF_CNT_3_CORE", - [XAIE_EVENT_COMBO_EVENT_0_CORE] "COMBO_EVENT_0_CORE", - [XAIE_EVENT_COMBO_EVENT_1_CORE] "COMBO_EVENT_1_CORE", - [XAIE_EVENT_COMBO_EVENT_2_CORE] "COMBO_EVENT_2_CORE", - [XAIE_EVENT_COMBO_EVENT_3_CORE] "COMBO_EVENT_3_CORE", - [XAIE_EVENT_GROUP_PC_EVENT_CORE] "GROUP_PC_EVENT_CORE", - [XAIE_EVENT_PC_0_CORE] "PC_0_CORE", - [XAIE_EVENT_PC_1_CORE] "PC_1_CORE", - [XAIE_EVENT_PC_2_CORE] "PC_2_CORE", - [XAIE_EVENT_PC_3_CORE] "PC_3_CORE", - [XAIE_EVENT_PC_RANGE_0_1_CORE] "PC_RANGE_0_1_CORE", - [XAIE_EVENT_PC_RANGE_2_3_CORE] "PC_RANGE_2_3_CORE", - [XAIE_EVENT_GROUP_CORE_STALL_CORE] "GROUP_CORE_STALL_CORE", - [XAIE_EVENT_MEMORY_STALL_CORE] "MEMORY_STALL_CORE", - [XAIE_EVENT_STREAM_STALL_CORE] "STREAM_STALL_CORE", - [XAIE_EVENT_CASCADE_STALL_CORE] "CASCADE_STALL_CORE", - [XAIE_EVENT_LOCK_STALL_CORE] "LOCK_STALL_CORE", - [XAIE_EVENT_DEBUG_HALTED_CORE] "DEBUG_HALTED_CORE", - [XAIE_EVENT_ACTIVE_CORE] "ACTIVE_CORE", - [XAIE_EVENT_DISABLED_CORE] "DISABLED_CORE", - [XAIE_EVENT_ECC_ERROR_STALL_CORE] "ECC_ERROR_STALL_CORE", - [XAIE_EVENT_ECC_SCRUBBING_STALL_CORE] "ECC_SCRUBBING_STALL_CORE", - [XAIE_EVENT_GROUP_CORE_PROGRAM_FLOW_CORE] "GROUP_CORE_PROGRAM_FLOW_CORE", - [XAIE_EVENT_INSTR_EVENT_0_CORE] "INSTR_EVENT_0_CORE", - [XAIE_EVENT_INSTR_EVENT_1_CORE] "INSTR_EVENT_1_CORE", - [XAIE_EVENT_INSTR_CALL_CORE] "INSTR_CALL_CORE", - [XAIE_EVENT_INSTR_RETURN_CORE] "INSTR_RETURN_CORE", - [XAIE_EVENT_INSTR_VECTOR_CORE] "INSTR_VECTOR_CORE", - [XAIE_EVENT_INSTR_LOAD_CORE] "INSTR_LOAD_CORE", - [XAIE_EVENT_INSTR_STORE_CORE] "INSTR_STORE_CORE", - [XAIE_EVENT_INSTR_STREAM_GET_CORE] "INSTR_STREAM_GET_CORE", - [XAIE_EVENT_INSTR_STREAM_PUT_CORE] "INSTR_STREAM_PUT_CORE", - [XAIE_EVENT_INSTR_CASCADE_GET_CORE] "INSTR_CASCADE_GET_CORE", - [XAIE_EVENT_INSTR_CASCADE_PUT_CORE] "INSTR_CASCADE_PUT_CORE", - [XAIE_EVENT_INSTR_LOCK_ACQUIRE_REQ_CORE] "INSTR_LOCK_ACQUIRE_REQ_CORE", - [XAIE_EVENT_INSTR_LOCK_RELEASE_REQ_CORE] "INSTR_LOCK_RELEASE_REQ_CORE", - [XAIE_EVENT_GROUP_ERRORS_0_CORE] "GROUP_ERRORS_0_CORE", - [XAIE_EVENT_GROUP_ERRORS_1_CORE] "GROUP_ERRORS_1_CORE", - [XAIE_EVENT_SRS_SATURATE_CORE] "SRS_SATURATE_CORE", - [XAIE_EVENT_UPS_SATURATE_CORE] "UPS_SATURATE_CORE", - [XAIE_EVENT_FP_OVERFLOW_CORE] "FP_OVERFLOW_CORE", - [XAIE_EVENT_FP_UNDERFLOW_CORE] "FP_UNDERFLOW_CORE", - [XAIE_EVENT_FP_INVALID_CORE] "FP_INVALID_CORE", - [XAIE_EVENT_FP_DIV_BY_ZERO_CORE] "FP_DIV_BY_ZERO_CORE", - [XAIE_EVENT_TLAST_IN_WSS_WORDS_0_2_CORE] "TLAST_IN_WSS_WORDS_0_2_CORE", - [XAIE_EVENT_PM_REG_ACCESS_FAILURE_CORE] "PM_REG_ACCESS_FAILURE_CORE", - [XAIE_EVENT_STREAM_PKT_PARITY_ERROR_CORE] "STREAM_PKT_PARITY_ERROR_CORE", - [XAIE_EVENT_CONTROL_PKT_ERROR_CORE] "CONTROL_PKT_ERROR_CORE", - [XAIE_EVENT_AXI_MM_SLAVE_ERROR_CORE] "AXI_MM_SLAVE_ERROR_CORE", - [XAIE_EVENT_INSTR_DECOMPRSN_ERROR_CORE] "INSTR_DECOMPRSN_ERROR_CORE", - [XAIE_EVENT_DM_ADDRESS_OUT_OF_RANGE_CORE] "DM_ADDRESS_OUT_OF_RANGE_CORE", - [XAIE_EVENT_PM_ECC_ERROR_SCRUB_CORRECTED_CORE] "PM_ECC_ERROR_SCRUB_CORRECTED_CORE", - [XAIE_EVENT_PM_ECC_ERROR_SCRUB_2BIT_CORE] "PM_ECC_ERROR_SCRUB_2BIT_CORE", - [XAIE_EVENT_PM_ECC_ERROR_1BIT_CORE] "PM_ECC_ERROR_1BIT_CORE", - [XAIE_EVENT_PM_ECC_ERROR_2BIT_CORE] "PM_ECC_ERROR_2BIT_CORE", - [XAIE_EVENT_PM_ADDRESS_OUT_OF_RANGE_CORE] "PM_ADDRESS_OUT_OF_RANGE_CORE", - [XAIE_EVENT_DM_ACCESS_TO_UNAVAILABLE_CORE] "DM_ACCESS_TO_UNAVAILABLE_CORE", - [XAIE_EVENT_LOCK_ACCESS_TO_UNAVAILABLE_CORE] "LOCK_ACCESS_TO_UNAVAILABLE_CORE", - [XAIE_EVENT_INSTR_EVENT_2] "INSTR_EVENT_2", - [XAIE_EVENT_INSTR_EVENT_3] "INSTR_EVENT_3", - [XAIE_EVENT_GROUP_STREAM_SWITCH_CORE] "GROUP_STREAM_SWITCH_CORE", - [XAIE_EVENT_PORT_IDLE_0_CORE] "PORT_IDLE_0_CORE", - [XAIE_EVENT_PORT_RUNNING_0_CORE] "PORT_RUNNING_0_CORE", - [XAIE_EVENT_PORT_STALLED_0_CORE] "PORT_STALLED_0_CORE", - [XAIE_EVENT_PORT_TLAST_0_CORE] "PORT_TLAST_0_CORE", - [XAIE_EVENT_PORT_IDLE_1_CORE] "PORT_IDLE_1_CORE", - [XAIE_EVENT_PORT_RUNNING_1_CORE] "PORT_RUNNING_1_CORE", - [XAIE_EVENT_PORT_STALLED_1_CORE] "PORT_STALLED_1_CORE", - [XAIE_EVENT_PORT_TLAST_1_CORE] "PORT_TLAST_1_CORE", - [XAIE_EVENT_PORT_IDLE_2_CORE] "PORT_IDLE_2_CORE", - [XAIE_EVENT_PORT_RUNNING_2_CORE] "PORT_RUNNING_2_CORE", - [XAIE_EVENT_PORT_STALLED_2_CORE] "PORT_STALLED_2_CORE", - [XAIE_EVENT_PORT_TLAST_2_CORE] "PORT_TLAST_2_CORE", - [XAIE_EVENT_PORT_IDLE_3_CORE] "PORT_IDLE_3_CORE", - [XAIE_EVENT_PORT_RUNNING_3_CORE] "PORT_RUNNING_3_CORE", - [XAIE_EVENT_PORT_STALLED_3_CORE] "PORT_STALLED_3_CORE", - [XAIE_EVENT_PORT_TLAST_3_CORE] "PORT_TLAST_3_CORE", - [XAIE_EVENT_PORT_IDLE_4_CORE] "PORT_IDLE_4_CORE", - [XAIE_EVENT_PORT_RUNNING_4_CORE] "PORT_RUNNING_4_CORE", - [XAIE_EVENT_PORT_STALLED_4_CORE] "PORT_STALLED_4_CORE", - [XAIE_EVENT_PORT_TLAST_4_CORE] "PORT_TLAST_4_CORE", - [XAIE_EVENT_PORT_IDLE_5_CORE] "PORT_IDLE_5_CORE", - [XAIE_EVENT_PORT_RUNNING_5_CORE] "PORT_RUNNING_5_CORE", - [XAIE_EVENT_PORT_STALLED_5_CORE] "PORT_STALLED_5_CORE", - [XAIE_EVENT_PORT_TLAST_5_CORE] "PORT_TLAST_5_CORE", - [XAIE_EVENT_PORT_IDLE_6_CORE] "PORT_IDLE_6_CORE", - [XAIE_EVENT_PORT_RUNNING_6_CORE] "PORT_RUNNING_6_CORE", - [XAIE_EVENT_PORT_STALLED_6_CORE] "PORT_STALLED_6_CORE", - [XAIE_EVENT_PORT_TLAST_6_CORE] "PORT_TLAST_6_CORE", - [XAIE_EVENT_PORT_IDLE_7_CORE] "PORT_IDLE_7_CORE", - [XAIE_EVENT_PORT_RUNNING_7_CORE] "PORT_RUNNING_7_CORE", - [XAIE_EVENT_PORT_STALLED_7_CORE] "PORT_STALLED_7_CORE", - [XAIE_EVENT_PORT_TLAST_7_CORE] "PORT_TLAST_7_CORE", - [XAIE_EVENT_GROUP_BROADCAST_CORE] "GROUP_BROADCAST_CORE", - [XAIE_EVENT_BROADCAST_0_CORE] "BROADCAST_0_CORE", - [XAIE_EVENT_BROADCAST_1_CORE] "BROADCAST_1_CORE", - [XAIE_EVENT_BROADCAST_2_CORE] "BROADCAST_2_CORE", - [XAIE_EVENT_BROADCAST_3_CORE] "BROADCAST_3_CORE", - [XAIE_EVENT_BROADCAST_4_CORE] "BROADCAST_4_CORE", - [XAIE_EVENT_BROADCAST_5_CORE] "BROADCAST_5_CORE", - [XAIE_EVENT_BROADCAST_6_CORE] "BROADCAST_6_CORE", - [XAIE_EVENT_BROADCAST_7_CORE] "BROADCAST_7_CORE", - [XAIE_EVENT_BROADCAST_8_CORE] "BROADCAST_8_CORE", - [XAIE_EVENT_BROADCAST_9_CORE] "BROADCAST_9_CORE", - [XAIE_EVENT_BROADCAST_10_CORE] "BROADCAST_10_CORE", - [XAIE_EVENT_BROADCAST_11_CORE] "BROADCAST_11_CORE", - [XAIE_EVENT_BROADCAST_12_CORE] "BROADCAST_12_CORE", - [XAIE_EVENT_BROADCAST_13_CORE] "BROADCAST_13_CORE", - [XAIE_EVENT_BROADCAST_14_CORE] "BROADCAST_14_CORE", - [XAIE_EVENT_BROADCAST_15_CORE] "BROADCAST_15_CORE", - [XAIE_EVENT_GROUP_USER_EVENT_CORE] "GROUP_USER_EVENT_CORE", - [XAIE_EVENT_USER_EVENT_0_CORE] "USER_EVENT_0_CORE", - [XAIE_EVENT_USER_EVENT_1_CORE] "USER_EVENT_1_CORE", - [XAIE_EVENT_USER_EVENT_2_CORE] "USER_EVENT_2_CORE", - [XAIE_EVENT_USER_EVENT_3_CORE] "USER_EVENT_3_CORE", - [XAIE_EVENT_EDGE_DETECTION_EVENT_0_CORE] "EDGE_DETECTION_EVENT_0_CORE", - [XAIE_EVENT_EDGE_DETECTION_EVENT_1_CORE] "EDGE_DETECTION_EVENT_1_CORE", - [XAIE_EVENT_FP_HUGE_CORE] "FP_HUGE_CORE", - [XAIE_EVENT_INT_FP_0_CORE] "INT_FP_0_CORE", - [XAIE_EVENT_FP_INF_CORE] "FP_INF_CORE", - [XAIE_EVENT_INSTR_WARNING_CORE] "INSTR_WARNING_CORE", - [XAIE_EVENT_INSTR_ERROR_CORE] "INSTR_ERROR_CORE", - [XAIE_EVENT_DECOMPRESSION_UNDERFLOW_CORE] "DECOMPRESSION_UNDERFLOW_CORE", - [XAIE_EVENT_STREAM_SWITCH_PORT_PARITY_ERROR_CORE] "STREAM_SWITCH_PORT_PARITY_ERROR_CORE", - [XAIE_EVENT_PROCESSOR_BUS_ERROR_CORE] "PROCESSOR_BUS_ERROR_CORE", + [XAIE_EVENT_NONE_CORE] = "NONE_CORE", + [XAIE_EVENT_TRUE_CORE] = "TRUE_CORE", + [XAIE_EVENT_GROUP_0_CORE] = "GROUP_0_CORE", + [XAIE_EVENT_TIMER_SYNC_CORE] = "TIMER_SYNC_CORE", + [XAIE_EVENT_TIMER_VALUE_REACHED_CORE] = "TIMER_VALUE_REACHED_CORE", + [XAIE_EVENT_PERF_CNT_0_CORE] = "PERF_CNT_0_CORE", + [XAIE_EVENT_PERF_CNT_1_CORE] = "PERF_CNT_1_CORE", + [XAIE_EVENT_PERF_CNT_2_CORE] = "PERF_CNT_2_CORE", + [XAIE_EVENT_PERF_CNT_3_CORE] = "PERF_CNT_3_CORE", + [XAIE_EVENT_COMBO_EVENT_0_CORE] = "COMBO_EVENT_0_CORE", + [XAIE_EVENT_COMBO_EVENT_1_CORE] = "COMBO_EVENT_1_CORE", + [XAIE_EVENT_COMBO_EVENT_2_CORE] = "COMBO_EVENT_2_CORE", + [XAIE_EVENT_COMBO_EVENT_3_CORE] = "COMBO_EVENT_3_CORE", + [XAIE_EVENT_GROUP_PC_EVENT_CORE] = "GROUP_PC_EVENT_CORE", + [XAIE_EVENT_PC_0_CORE] = "PC_0_CORE", + [XAIE_EVENT_PC_1_CORE] = "PC_1_CORE", + [XAIE_EVENT_PC_2_CORE] = "PC_2_CORE", + [XAIE_EVENT_PC_3_CORE] = "PC_3_CORE", + [XAIE_EVENT_PC_RANGE_0_1_CORE] = "PC_RANGE_0_1_CORE", + [XAIE_EVENT_PC_RANGE_2_3_CORE] = "PC_RANGE_2_3_CORE", + [XAIE_EVENT_GROUP_CORE_STALL_CORE] = "GROUP_CORE_STALL_CORE", + [XAIE_EVENT_MEMORY_STALL_CORE] = "MEMORY_STALL_CORE", + [XAIE_EVENT_STREAM_STALL_CORE] = "STREAM_STALL_CORE", + [XAIE_EVENT_CASCADE_STALL_CORE] = "CASCADE_STALL_CORE", + [XAIE_EVENT_LOCK_STALL_CORE] = "LOCK_STALL_CORE", + [XAIE_EVENT_DEBUG_HALTED_CORE] = "DEBUG_HALTED_CORE", + [XAIE_EVENT_ACTIVE_CORE] = "ACTIVE_CORE", + [XAIE_EVENT_DISABLED_CORE] = "DISABLED_CORE", + [XAIE_EVENT_ECC_ERROR_STALL_CORE] = "ECC_ERROR_STALL_CORE", + [XAIE_EVENT_ECC_SCRUBBING_STALL_CORE] = "ECC_SCRUBBING_STALL_CORE", + [XAIE_EVENT_GROUP_CORE_PROGRAM_FLOW_CORE] = "GROUP_CORE_PROGRAM_FLOW_CORE", + [XAIE_EVENT_INSTR_EVENT_0_CORE] = "INSTR_EVENT_0_CORE", + [XAIE_EVENT_INSTR_EVENT_1_CORE] = "INSTR_EVENT_1_CORE", + [XAIE_EVENT_INSTR_CALL_CORE] = "INSTR_CALL_CORE", + [XAIE_EVENT_INSTR_RETURN_CORE] = "INSTR_RETURN_CORE", + [XAIE_EVENT_INSTR_VECTOR_CORE] = "INSTR_VECTOR_CORE", + [XAIE_EVENT_INSTR_LOAD_CORE] = "INSTR_LOAD_CORE", + [XAIE_EVENT_INSTR_STORE_CORE] = "INSTR_STORE_CORE", + [XAIE_EVENT_INSTR_STREAM_GET_CORE] = "INSTR_STREAM_GET_CORE", + [XAIE_EVENT_INSTR_STREAM_PUT_CORE] = "INSTR_STREAM_PUT_CORE", + [XAIE_EVENT_INSTR_CASCADE_GET_CORE] = "INSTR_CASCADE_GET_CORE", + [XAIE_EVENT_INSTR_CASCADE_PUT_CORE] = "INSTR_CASCADE_PUT_CORE", + [XAIE_EVENT_INSTR_LOCK_ACQUIRE_REQ_CORE] = "INSTR_LOCK_ACQUIRE_REQ_CORE", + [XAIE_EVENT_INSTR_LOCK_RELEASE_REQ_CORE] = "INSTR_LOCK_RELEASE_REQ_CORE", + [XAIE_EVENT_GROUP_ERRORS_0_CORE] = "GROUP_ERRORS_0_CORE", + [XAIE_EVENT_GROUP_ERRORS_1_CORE] = "GROUP_ERRORS_1_CORE", + [XAIE_EVENT_SRS_SATURATE_CORE] = "SRS_SATURATE_CORE", + [XAIE_EVENT_UPS_SATURATE_CORE] = "UPS_SATURATE_CORE", + [XAIE_EVENT_FP_OVERFLOW_CORE] = "FP_OVERFLOW_CORE", + [XAIE_EVENT_FP_UNDERFLOW_CORE] = "FP_UNDERFLOW_CORE", + [XAIE_EVENT_FP_INVALID_CORE] = "FP_INVALID_CORE", + [XAIE_EVENT_FP_DIV_BY_ZERO_CORE] = "FP_DIV_BY_ZERO_CORE", + [XAIE_EVENT_TLAST_IN_WSS_WORDS_0_2_CORE] = "TLAST_IN_WSS_WORDS_0_2_CORE", + [XAIE_EVENT_PM_REG_ACCESS_FAILURE_CORE] = "PM_REG_ACCESS_FAILURE_CORE", + [XAIE_EVENT_STREAM_PKT_PARITY_ERROR_CORE] = "STREAM_PKT_PARITY_ERROR_CORE", + [XAIE_EVENT_CONTROL_PKT_ERROR_CORE] = "CONTROL_PKT_ERROR_CORE", + [XAIE_EVENT_AXI_MM_SLAVE_ERROR_CORE] = "AXI_MM_SLAVE_ERROR_CORE", + [XAIE_EVENT_INSTR_DECOMPRSN_ERROR_CORE] = "INSTR_DECOMPRSN_ERROR_CORE", + [XAIE_EVENT_DM_ADDRESS_OUT_OF_RANGE_CORE] = "DM_ADDRESS_OUT_OF_RANGE_CORE", + [XAIE_EVENT_PM_ECC_ERROR_SCRUB_CORRECTED_CORE] = "PM_ECC_ERROR_SCRUB_CORRECTED_CORE", + [XAIE_EVENT_PM_ECC_ERROR_SCRUB_2BIT_CORE] = "PM_ECC_ERROR_SCRUB_2BIT_CORE", + [XAIE_EVENT_PM_ECC_ERROR_1BIT_CORE] = "PM_ECC_ERROR_1BIT_CORE", + [XAIE_EVENT_PM_ECC_ERROR_2BIT_CORE] = "PM_ECC_ERROR_2BIT_CORE", + [XAIE_EVENT_PM_ADDRESS_OUT_OF_RANGE_CORE] = "PM_ADDRESS_OUT_OF_RANGE_CORE", + [XAIE_EVENT_DM_ACCESS_TO_UNAVAILABLE_CORE] = "DM_ACCESS_TO_UNAVAILABLE_CORE", + [XAIE_EVENT_LOCK_ACCESS_TO_UNAVAILABLE_CORE] = "LOCK_ACCESS_TO_UNAVAILABLE_CORE", + [XAIE_EVENT_INSTR_EVENT_2] = "INSTR_EVENT_2", + [XAIE_EVENT_INSTR_EVENT_3] = "INSTR_EVENT_3", + [XAIE_EVENT_GROUP_STREAM_SWITCH_CORE] = "GROUP_STREAM_SWITCH_CORE", + [XAIE_EVENT_PORT_IDLE_0_CORE] = "PORT_IDLE_0_CORE", + [XAIE_EVENT_PORT_RUNNING_0_CORE] = "PORT_RUNNING_0_CORE", + [XAIE_EVENT_PORT_STALLED_0_CORE] = "PORT_STALLED_0_CORE", + [XAIE_EVENT_PORT_TLAST_0_CORE] = "PORT_TLAST_0_CORE", + [XAIE_EVENT_PORT_IDLE_1_CORE] = "PORT_IDLE_1_CORE", + [XAIE_EVENT_PORT_RUNNING_1_CORE] = "PORT_RUNNING_1_CORE", + [XAIE_EVENT_PORT_STALLED_1_CORE] = "PORT_STALLED_1_CORE", + [XAIE_EVENT_PORT_TLAST_1_CORE] = "PORT_TLAST_1_CORE", + [XAIE_EVENT_PORT_IDLE_2_CORE] = "PORT_IDLE_2_CORE", + [XAIE_EVENT_PORT_RUNNING_2_CORE] = "PORT_RUNNING_2_CORE", + [XAIE_EVENT_PORT_STALLED_2_CORE] = "PORT_STALLED_2_CORE", + [XAIE_EVENT_PORT_TLAST_2_CORE] = "PORT_TLAST_2_CORE", + [XAIE_EVENT_PORT_IDLE_3_CORE] = "PORT_IDLE_3_CORE", + [XAIE_EVENT_PORT_RUNNING_3_CORE] = "PORT_RUNNING_3_CORE", + [XAIE_EVENT_PORT_STALLED_3_CORE] = "PORT_STALLED_3_CORE", + [XAIE_EVENT_PORT_TLAST_3_CORE] = "PORT_TLAST_3_CORE", + [XAIE_EVENT_PORT_IDLE_4_CORE] = "PORT_IDLE_4_CORE", + [XAIE_EVENT_PORT_RUNNING_4_CORE] = "PORT_RUNNING_4_CORE", + [XAIE_EVENT_PORT_STALLED_4_CORE] = "PORT_STALLED_4_CORE", + [XAIE_EVENT_PORT_TLAST_4_CORE] = "PORT_TLAST_4_CORE", + [XAIE_EVENT_PORT_IDLE_5_CORE] = "PORT_IDLE_5_CORE", + [XAIE_EVENT_PORT_RUNNING_5_CORE] = "PORT_RUNNING_5_CORE", + [XAIE_EVENT_PORT_STALLED_5_CORE] = "PORT_STALLED_5_CORE", + [XAIE_EVENT_PORT_TLAST_5_CORE] = "PORT_TLAST_5_CORE", + [XAIE_EVENT_PORT_IDLE_6_CORE] = "PORT_IDLE_6_CORE", + [XAIE_EVENT_PORT_RUNNING_6_CORE] = "PORT_RUNNING_6_CORE", + [XAIE_EVENT_PORT_STALLED_6_CORE] = "PORT_STALLED_6_CORE", + [XAIE_EVENT_PORT_TLAST_6_CORE] = "PORT_TLAST_6_CORE", + [XAIE_EVENT_PORT_IDLE_7_CORE] = "PORT_IDLE_7_CORE", + [XAIE_EVENT_PORT_RUNNING_7_CORE] = "PORT_RUNNING_7_CORE", + [XAIE_EVENT_PORT_STALLED_7_CORE] = "PORT_STALLED_7_CORE", + [XAIE_EVENT_PORT_TLAST_7_CORE] = "PORT_TLAST_7_CORE", + [XAIE_EVENT_GROUP_BROADCAST_CORE] = "GROUP_BROADCAST_CORE", + [XAIE_EVENT_BROADCAST_0_CORE] = "BROADCAST_0_CORE", + [XAIE_EVENT_BROADCAST_1_CORE] = "BROADCAST_1_CORE", + [XAIE_EVENT_BROADCAST_2_CORE] = "BROADCAST_2_CORE", + [XAIE_EVENT_BROADCAST_3_CORE] = "BROADCAST_3_CORE", + [XAIE_EVENT_BROADCAST_4_CORE] = "BROADCAST_4_CORE", + [XAIE_EVENT_BROADCAST_5_CORE] = "BROADCAST_5_CORE", + [XAIE_EVENT_BROADCAST_6_CORE] = "BROADCAST_6_CORE", + [XAIE_EVENT_BROADCAST_7_CORE] = "BROADCAST_7_CORE", + [XAIE_EVENT_BROADCAST_8_CORE] = "BROADCAST_8_CORE", + [XAIE_EVENT_BROADCAST_9_CORE] = "BROADCAST_9_CORE", + [XAIE_EVENT_BROADCAST_10_CORE] = "BROADCAST_10_CORE", + [XAIE_EVENT_BROADCAST_11_CORE] = "BROADCAST_11_CORE", + [XAIE_EVENT_BROADCAST_12_CORE] = "BROADCAST_12_CORE", + [XAIE_EVENT_BROADCAST_13_CORE] = "BROADCAST_13_CORE", + [XAIE_EVENT_BROADCAST_14_CORE] = "BROADCAST_14_CORE", + [XAIE_EVENT_BROADCAST_15_CORE] = "BROADCAST_15_CORE", + [XAIE_EVENT_GROUP_USER_EVENT_CORE] = "GROUP_USER_EVENT_CORE", + [XAIE_EVENT_USER_EVENT_0_CORE] = "USER_EVENT_0_CORE", + [XAIE_EVENT_USER_EVENT_1_CORE] = "USER_EVENT_1_CORE", + [XAIE_EVENT_USER_EVENT_2_CORE] = "USER_EVENT_2_CORE", + [XAIE_EVENT_USER_EVENT_3_CORE] = "USER_EVENT_3_CORE", + [XAIE_EVENT_EDGE_DETECTION_EVENT_0_CORE] = "EDGE_DETECTION_EVENT_0_CORE", + [XAIE_EVENT_EDGE_DETECTION_EVENT_1_CORE] = "EDGE_DETECTION_EVENT_1_CORE", + [XAIE_EVENT_FP_HUGE_CORE] = "FP_HUGE_CORE", + [XAIE_EVENT_INT_FP_0_CORE] = "INT_FP_0_CORE", + [XAIE_EVENT_FP_INF_CORE] = "FP_INF_CORE", + [XAIE_EVENT_INSTR_WARNING_CORE] = "INSTR_WARNING_CORE", + [XAIE_EVENT_INSTR_ERROR_CORE] = "INSTR_ERROR_CORE", + [XAIE_EVENT_DECOMPRESSION_UNDERFLOW_CORE] = "DECOMPRESSION_UNDERFLOW_CORE", + [XAIE_EVENT_STREAM_SWITCH_PORT_PARITY_ERROR_CORE] = "STREAM_SWITCH_PORT_PARITY_ERROR_CORE", + [XAIE_EVENT_PROCESSOR_BUS_ERROR_CORE] = "PROCESSOR_BUS_ERROR_CORE", /* All memory module events of aie tile */ - [XAIE_EVENT_NONE_MEM] "NONE_MEM", - [XAIE_EVENT_TRUE_MEM] "TRUE_MEM", - [XAIE_EVENT_GROUP_0_MEM] "GROUP_0_MEM", - [XAIE_EVENT_TIMER_SYNC_MEM] "TIMER_SYNC_MEM", - [XAIE_EVENT_TIMER_VALUE_REACHED_MEM] "TIMER_VALUE_REACHED_MEM", - [XAIE_EVENT_PERF_CNT_0_MEM] "PERF_CNT_0_MEM", - [XAIE_EVENT_PERF_CNT_1_MEM] "PERF_CNT_1_MEM", - [XAIE_EVENT_COMBO_EVENT_0_MEM] "COMBO_EVENT_0_MEM", - [XAIE_EVENT_COMBO_EVENT_1_MEM] "COMBO_EVENT_1_MEM", - [XAIE_EVENT_COMBO_EVENT_2_MEM] "COMBO_EVENT_2_MEM", - [XAIE_EVENT_COMBO_EVENT_3_MEM] "COMBO_EVENT_3_MEM", - [XAIE_EVENT_GROUP_WATCHPOINT_MEM] "GROUP_WATCHPOINT_MEM", - [XAIE_EVENT_WATCHPOINT_0_MEM] "WATCHPOINT_0_MEM", - [XAIE_EVENT_WATCHPOINT_1_MEM] "WATCHPOINT_1_MEM", - [XAIE_EVENT_GROUP_DMA_ACTIVITY_MEM] "GROUP_DMA_ACTIVITY_MEM", - [XAIE_EVENT_DMA_S2MM_0_START_BD_MEM] "DMA_S2MM_0_START_BD_MEM", - [XAIE_EVENT_DMA_S2MM_1_START_BD_MEM] "DMA_S2MM_1_START_BD_MEM", - [XAIE_EVENT_DMA_MM2S_0_START_BD_MEM] "DMA_MM2S_0_START_BD_MEM", - [XAIE_EVENT_DMA_MM2S_1_START_BD_MEM] "DMA_MM2S_1_START_BD_MEM", - [XAIE_EVENT_DMA_S2MM_0_FINISHED_BD_MEM] "DMA_S2MM_0_FINISHED_BD_MEM", - [XAIE_EVENT_DMA_S2MM_1_FINISHED_BD_MEM] "DMA_S2MM_1_FINISHED_BD_MEM", - [XAIE_EVENT_DMA_MM2S_0_FINISHED_BD_MEM] "DMA_MM2S_0_FINISHED_BD_MEM", - [XAIE_EVENT_DMA_MM2S_1_FINISHED_BD_MEM] "DMA_MM2S_1_FINISHED_BD_MEM", - [XAIE_EVENT_DMA_S2MM_0_GO_TO_IDLE_MEM] "DMA_S2MM_0_GO_TO_IDLE_MEM", - [XAIE_EVENT_DMA_S2MM_1_GO_TO_IDLE_MEM] "DMA_S2MM_1_GO_TO_IDLE_MEM", - [XAIE_EVENT_DMA_MM2S_0_GO_TO_IDLE_MEM] "DMA_MM2S_0_GO_TO_IDLE_MEM", - [XAIE_EVENT_DMA_MM2S_1_GO_TO_IDLE_MEM] "DMA_MM2S_1_GO_TO_IDLE_MEM", - [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_ACQUIRE_MEM] "DMA_S2MM_0_STALLED_LOCK_ACQUIRE_MEM", - [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_ACQUIRE_MEM] "DMA_S2MM_1_STALLED_LOCK_ACQUIRE_MEM", - [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_ACQUIRE_MEM] "DMA_MM2S_0_STALLED_LOCK_ACQUIRE_MEM", - [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_ACQUIRE_MEM] "DMA_MM2S_1_STALLED_LOCK_ACQUIRE_MEM", - [XAIE_EVENT_DMA_S2MM_0_MEMORY_CONFLICT_MEM] "DMA_S2MM_0_MEMORY_CONFLICT_MEM", - [XAIE_EVENT_DMA_S2MM_1_MEMORY_CONFLICT_MEM] "DMA_S2MM_1_MEMORY_CONFLICT_MEM", - [XAIE_EVENT_DMA_MM2S_0_MEMORY_CONFLICT_MEM] "DMA_MM2S_0_MEMORY_CONFLICT_MEM", - [XAIE_EVENT_DMA_MM2S_1_MEMORY_CONFLICT_MEM] "DMA_MM2S_1_MEMORY_CONFLICT_MEM", - [XAIE_EVENT_GROUP_LOCK_MEM] "GROUP_LOCK_MEM", - [XAIE_EVENT_LOCK_0_ACQ_MEM] "LOCK_0_ACQ_MEM", - [XAIE_EVENT_LOCK_0_REL_MEM] "LOCK_0_REL_MEM", - [XAIE_EVENT_LOCK_1_ACQ_MEM] "LOCK_1_ACQ_MEM", - [XAIE_EVENT_LOCK_1_REL_MEM] "LOCK_1_REL_MEM", - [XAIE_EVENT_LOCK_2_ACQ_MEM] "LOCK_2_ACQ_MEM", - [XAIE_EVENT_LOCK_2_REL_MEM] "LOCK_2_REL_MEM", - [XAIE_EVENT_LOCK_3_ACQ_MEM] "LOCK_3_ACQ_MEM", - [XAIE_EVENT_LOCK_3_REL_MEM] "LOCK_3_REL_MEM", - [XAIE_EVENT_LOCK_4_ACQ_MEM] "LOCK_4_ACQ_MEM", - [XAIE_EVENT_LOCK_4_REL_MEM] "LOCK_4_REL_MEM", - [XAIE_EVENT_LOCK_5_ACQ_MEM] "LOCK_5_ACQ_MEM", - [XAIE_EVENT_LOCK_5_REL_MEM] "LOCK_5_REL_MEM", - [XAIE_EVENT_LOCK_6_ACQ_MEM] "LOCK_6_ACQ_MEM", - [XAIE_EVENT_LOCK_6_REL_MEM] "LOCK_6_REL_MEM", - [XAIE_EVENT_LOCK_7_ACQ_MEM] "LOCK_7_ACQ_MEM", - [XAIE_EVENT_LOCK_7_REL_MEM] "LOCK_7_REL_MEM", - [XAIE_EVENT_LOCK_8_ACQ_MEM] "LOCK_8_ACQ_MEM", - [XAIE_EVENT_LOCK_8_REL_MEM] "LOCK_8_REL_MEM", - [XAIE_EVENT_LOCK_9_ACQ_MEM] "LOCK_9_ACQ_MEM", - [XAIE_EVENT_LOCK_9_REL_MEM] "LOCK_9_REL_MEM", - [XAIE_EVENT_LOCK_10_ACQ_MEM] "LOCK_10_ACQ_MEM", - [XAIE_EVENT_LOCK_10_REL_MEM] "LOCK_10_REL_MEM", - [XAIE_EVENT_LOCK_11_ACQ_MEM] "LOCK_11_ACQ_MEM", - [XAIE_EVENT_LOCK_11_REL_MEM] "LOCK_11_REL_MEM", - [XAIE_EVENT_LOCK_12_ACQ_MEM] "LOCK_12_ACQ_MEM", - [XAIE_EVENT_LOCK_12_REL_MEM] "LOCK_12_REL_MEM", - [XAIE_EVENT_LOCK_13_ACQ_MEM] "LOCK_13_ACQ_MEM", - [XAIE_EVENT_LOCK_13_REL_MEM] "LOCK_13_REL_MEM", - [XAIE_EVENT_LOCK_14_ACQ_MEM] "LOCK_14_ACQ_MEM", - [XAIE_EVENT_LOCK_14_REL_MEM] "LOCK_14_REL_MEM", - [XAIE_EVENT_LOCK_15_ACQ_MEM] "LOCK_15_ACQ_MEM", - [XAIE_EVENT_LOCK_15_REL_MEM] "LOCK_15_REL_MEM", - [XAIE_EVENT_GROUP_MEMORY_CONFLICT_MEM] "GROUP_MEMORY_CONFLICT_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_0_MEM] "CONFLICT_DM_BANK_0_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_1_MEM] "CONFLICT_DM_BANK_1_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_2_MEM] "CONFLICT_DM_BANK_2_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_3_MEM] "CONFLICT_DM_BANK_3_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_4_MEM] "CONFLICT_DM_BANK_4_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_5_MEM] "CONFLICT_DM_BANK_5_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_6_MEM] "CONFLICT_DM_BANK_6_MEM", - [XAIE_EVENT_CONFLICT_DM_BANK_7_MEM] "CONFLICT_DM_BANK_7_MEM", - [XAIE_EVENT_GROUP_ERRORS_MEM] "GROUP_ERRORS_MEM", - [XAIE_EVENT_DM_ECC_ERROR_SCRUB_CORRECTED_MEM] "DM_ECC_ERROR_SCRUB_CORRECTED_MEM", - [XAIE_EVENT_DM_ECC_ERROR_SCRUB_2BIT_MEM] "DM_ECC_ERROR_SCRUB_2BIT_MEM", - [XAIE_EVENT_DM_ECC_ERROR_1BIT_MEM] "DM_ECC_ERROR_1BIT_MEM", - [XAIE_EVENT_DM_ECC_ERROR_2BIT_MEM] "DM_ECC_ERROR_2BIT_MEM", - [XAIE_EVENT_DM_PARITY_ERROR_BANK_2_MEM] "DM_PARITY_ERROR_BANK_2_MEM", - [XAIE_EVENT_DM_PARITY_ERROR_BANK_3_MEM] "DM_PARITY_ERROR_BANK_3_MEM", - [XAIE_EVENT_DM_PARITY_ERROR_BANK_4_MEM] "DM_PARITY_ERROR_BANK_4_MEM", - [XAIE_EVENT_DM_PARITY_ERROR_BANK_5_MEM] "DM_PARITY_ERROR_BANK_5_MEM", - [XAIE_EVENT_DM_PARITY_ERROR_BANK_6_MEM] "DM_PARITY_ERROR_BANK_6_MEM", - [XAIE_EVENT_DM_PARITY_ERROR_BANK_7_MEM] "DM_PARITY_ERROR_BANK_7_MEM", - [XAIE_EVENT_DMA_S2MM_0_ERROR_MEM] "DMA_S2MM_0_ERROR_MEM", - [XAIE_EVENT_DMA_S2MM_1_ERROR_MEM] "DMA_S2MM_1_ERROR_MEM", - [XAIE_EVENT_DMA_MM2S_0_ERROR_MEM] "DMA_MM2S_0_ERROR_MEM", - [XAIE_EVENT_DMA_MM2S_1_ERROR_MEM] "DMA_MM2S_1_ERROR_MEM", - [XAIE_EVENT_GROUP_BROADCAST_MEM] "GROUP_BROADCAST_MEM", - [XAIE_EVENT_BROADCAST_0_MEM] "BROADCAST_0_MEM", - [XAIE_EVENT_BROADCAST_1_MEM] "BROADCAST_1_MEM", - [XAIE_EVENT_BROADCAST_2_MEM] "BROADCAST_2_MEM", - [XAIE_EVENT_BROADCAST_3_MEM] "BROADCAST_3_MEM", - [XAIE_EVENT_BROADCAST_4_MEM] "BROADCAST_4_MEM", - [XAIE_EVENT_BROADCAST_5_MEM] "BROADCAST_5_MEM", - [XAIE_EVENT_BROADCAST_6_MEM] "BROADCAST_6_MEM", - [XAIE_EVENT_BROADCAST_7_MEM] "BROADCAST_7_MEM", - [XAIE_EVENT_BROADCAST_8_MEM] "BROADCAST_8_MEM", - [XAIE_EVENT_BROADCAST_9_MEM] "BROADCAST_9_MEM", - [XAIE_EVENT_BROADCAST_10_MEM] "BROADCAST_10_MEM", - [XAIE_EVENT_BROADCAST_11_MEM] "BROADCAST_11_MEM", - [XAIE_EVENT_BROADCAST_12_MEM] "BROADCAST_12_MEM", - [XAIE_EVENT_BROADCAST_13_MEM] "BROADCAST_13_MEM", - [XAIE_EVENT_BROADCAST_14_MEM] "BROADCAST_14_MEM", - [XAIE_EVENT_BROADCAST_15_MEM] "BROADCAST_15_MEM", - [XAIE_EVENT_GROUP_USER_EVENT_MEM] "GROUP_USER_EVENT_MEM", - [XAIE_EVENT_USER_EVENT_0_MEM] "USER_EVENT_0_MEM", - [XAIE_EVENT_USER_EVENT_1_MEM] "USER_EVENT_1_MEM", - [XAIE_EVENT_USER_EVENT_2_MEM] "USER_EVENT_2_MEM", - [XAIE_EVENT_USER_EVENT_3_MEM] "USER_EVENT_3_MEM", - [XAIE_EVENT_EDGE_DETECTION_EVENT_0_MEM] "EDGE_DETECTION_EVENT_0_MEM", - [XAIE_EVENT_EDGE_DETECTION_EVENT_1_MEM] "EDGE_DETECTION_EVENT_1_MEM", - [XAIE_EVENT_DMA_S2MM_0_START_TASK_MEM] "DMA_S2MM_0_START_TASK_MEM", - [XAIE_EVENT_DMA_S2MM_1_START_TASK_MEM] "DMA_S2MM_1_START_TASK_MEM", - [XAIE_EVENT_DMA_MM2S_0_START_TASK_MEM] "DMA_MM2S_0_START_TASK_MEM", - [XAIE_EVENT_DMA_MM2S_1_START_TASK_MEM] "DMA_MM2S_1_START_TASK_MEM", - [XAIE_EVENT_DMA_S2MM_0_FINISHED_TASK_MEM] "DMA_S2MM_0_FINISHED_TASK_MEM", - [XAIE_EVENT_DMA_S2MM_1_FINISHED_TASK_MEM] "DMA_S2MM_1_FINISHED_TASK_MEM", - [XAIE_EVENT_DMA_MM2S_0_FINISHED_TASK_MEM] "DMA_MM2S_0_FINISHED_TASK_MEM", - [XAIE_EVENT_DMA_MM2S_1_FINISHED_TASK_MEM] "DMA_MM2S_1_FINISHED_TASK_MEM", - [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_MEM] "DMA_S2MM_0_STALLED_LOCK_MEM", - [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_MEM] "DMA_S2MM_1_STALLED_LOCK_MEM", - [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_MEM] "DMA_MM2S_0_STALLED_LOCK_MEM", - [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_MEM] "DMA_MM2S_1_STALLED_LOCK_MEM", - [XAIE_EVENT_DMA_S2MM_0_STREAM_STARVATION_MEM] "DMA_S2MM_0_STREAM_STARVATION_MEM", - [XAIE_EVENT_DMA_S2MM_1_STREAM_STARVATION_MEM] "DMA_S2MM_1_STREAM_STARVATION_MEM", - [XAIE_EVENT_DMA_MM2S_0_STREAM_BACKPRESSURE_MEM] "DMA_MM2S_0_STREAM_BACKPRESSURE_MEM", - [XAIE_EVENT_DMA_MM2S_1_STREAM_BACKPRESSURE_MEM] "DMA_MM2S_1_STREAM_BACKPRESSURE_MEM", - [XAIE_EVENT_DMA_S2MM_0_MEMORY_BACKPRESSURE_MEM] "DMA_S2MM_0_MEMORY_BACKPRESSURE_MEM", - [XAIE_EVENT_DMA_S2MM_1_MEMORY_BACKPRESSURE_MEM] "DMA_S2MM_1_MEMORY_BACKPRESSURE_MEM", - [XAIE_EVENT_DMA_MM2S_0_MEMORY_STARVATION_MEM] "DMA_MM2S_0_MEMORY_STARVATION_MEM", - [XAIE_EVENT_DMA_MM2S_1_MEMORY_STARVATION_MEM] "DMA_MM2S_1_MEMORY_STARVATION_MEM", - [XAIE_EVENT_LOCK_SEL0_ACQ_EQ_MEM] "LOCK_SEL0_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL0_ACQ_GE_MEM] "LOCK_SEL0_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL0_EQUAL_TO_VALUE_MEM] "LOCK_SEL0_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL1_ACQ_EQ_MEM] "LOCK_SEL1_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL1_ACQ_GE_MEM] "LOCK_SEL1_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL1_EQUAL_TO_VALUE_MEM] "LOCK_SEL1_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL2_ACQ_EQ_MEM] "LOCK_SEL2_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL2_ACQ_GE_MEM] "LOCK_SEL2_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL2_EQUAL_TO_VALUE_MEM] "LOCK_SEL2_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL3_ACQ_EQ_MEM] "LOCK_SEL3_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL3_ACQ_GE_MEM] "LOCK_SEL3_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL3_EQUAL_TO_VALUE_MEM] "LOCK_SEL3_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL4_ACQ_EQ_MEM] "LOCK_SEL4_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL4_ACQ_GE_MEM] "LOCK_SEL4_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL4_EQUAL_TO_VALUE_MEM] "LOCK_SEL4_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL5_ACQ_EQ_MEM] "LOCK_SEL5_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL5_ACQ_GE_MEM] "LOCK_SEL5_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL5_EQUAL_TO_VALUE_MEM] "LOCK_SEL5_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL6_ACQ_EQ_MEM] "LOCK_SEL6_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL6_ACQ_GE_MEM] "LOCK_SEL6_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL6_EQUAL_TO_VALUE_MEM] "LOCK_SEL6_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_SEL7_ACQ_EQ_MEM] "LOCK_SEL7_ACQ_EQ_MEM", - [XAIE_EVENT_LOCK_SEL7_ACQ_GE_MEM] "LOCK_SEL7_ACQ_GE_MEM", - [XAIE_EVENT_LOCK_SEL7_EQUAL_TO_VALUE_MEM] "LOCK_SEL7_EQUAL_TO_VALUE_MEM", - [XAIE_EVENT_LOCK_ERROR_MEM] "LOCK_ERROR_MEM", - [XAIE_EVENT_DMA_TASK_TOKEN_STALL_MEM] "DMA_TASK_TOKEN_STALL_MEM", + [XAIE_EVENT_NONE_MEM] = "NONE_MEM", + [XAIE_EVENT_TRUE_MEM] = "TRUE_MEM", + [XAIE_EVENT_GROUP_0_MEM] = "GROUP_0_MEM", + [XAIE_EVENT_TIMER_SYNC_MEM] = "TIMER_SYNC_MEM", + [XAIE_EVENT_TIMER_VALUE_REACHED_MEM] = "TIMER_VALUE_REACHED_MEM", + [XAIE_EVENT_PERF_CNT_0_MEM] = "PERF_CNT_0_MEM", + [XAIE_EVENT_PERF_CNT_1_MEM] = "PERF_CNT_1_MEM", + [XAIE_EVENT_COMBO_EVENT_0_MEM] = "COMBO_EVENT_0_MEM", + [XAIE_EVENT_COMBO_EVENT_1_MEM] = "COMBO_EVENT_1_MEM", + [XAIE_EVENT_COMBO_EVENT_2_MEM] = "COMBO_EVENT_2_MEM", + [XAIE_EVENT_COMBO_EVENT_3_MEM] = "COMBO_EVENT_3_MEM", + [XAIE_EVENT_GROUP_WATCHPOINT_MEM] = "GROUP_WATCHPOINT_MEM", + [XAIE_EVENT_WATCHPOINT_0_MEM] = "WATCHPOINT_0_MEM", + [XAIE_EVENT_WATCHPOINT_1_MEM] = "WATCHPOINT_1_MEM", + [XAIE_EVENT_GROUP_DMA_ACTIVITY_MEM] = "GROUP_DMA_ACTIVITY_MEM", + [XAIE_EVENT_DMA_S2MM_0_START_BD_MEM] = "DMA_S2MM_0_START_BD_MEM", + [XAIE_EVENT_DMA_S2MM_1_START_BD_MEM] = "DMA_S2MM_1_START_BD_MEM", + [XAIE_EVENT_DMA_MM2S_0_START_BD_MEM] = "DMA_MM2S_0_START_BD_MEM", + [XAIE_EVENT_DMA_MM2S_1_START_BD_MEM] = "DMA_MM2S_1_START_BD_MEM", + [XAIE_EVENT_DMA_S2MM_0_FINISHED_BD_MEM] = "DMA_S2MM_0_FINISHED_BD_MEM", + [XAIE_EVENT_DMA_S2MM_1_FINISHED_BD_MEM] = "DMA_S2MM_1_FINISHED_BD_MEM", + [XAIE_EVENT_DMA_MM2S_0_FINISHED_BD_MEM] = "DMA_MM2S_0_FINISHED_BD_MEM", + [XAIE_EVENT_DMA_MM2S_1_FINISHED_BD_MEM] = "DMA_MM2S_1_FINISHED_BD_MEM", + [XAIE_EVENT_DMA_S2MM_0_GO_TO_IDLE_MEM] = "DMA_S2MM_0_GO_TO_IDLE_MEM", + [XAIE_EVENT_DMA_S2MM_1_GO_TO_IDLE_MEM] = "DMA_S2MM_1_GO_TO_IDLE_MEM", + [XAIE_EVENT_DMA_MM2S_0_GO_TO_IDLE_MEM] = "DMA_MM2S_0_GO_TO_IDLE_MEM", + [XAIE_EVENT_DMA_MM2S_1_GO_TO_IDLE_MEM] = "DMA_MM2S_1_GO_TO_IDLE_MEM", + [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_ACQUIRE_MEM] = "DMA_S2MM_0_STALLED_LOCK_ACQUIRE_MEM", + [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_ACQUIRE_MEM] = "DMA_S2MM_1_STALLED_LOCK_ACQUIRE_MEM", + [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_ACQUIRE_MEM] = "DMA_MM2S_0_STALLED_LOCK_ACQUIRE_MEM", + [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_ACQUIRE_MEM] = "DMA_MM2S_1_STALLED_LOCK_ACQUIRE_MEM", + [XAIE_EVENT_DMA_S2MM_0_MEMORY_CONFLICT_MEM] = "DMA_S2MM_0_MEMORY_CONFLICT_MEM", + [XAIE_EVENT_DMA_S2MM_1_MEMORY_CONFLICT_MEM] = "DMA_S2MM_1_MEMORY_CONFLICT_MEM", + [XAIE_EVENT_DMA_MM2S_0_MEMORY_CONFLICT_MEM] = "DMA_MM2S_0_MEMORY_CONFLICT_MEM", + [XAIE_EVENT_DMA_MM2S_1_MEMORY_CONFLICT_MEM] = "DMA_MM2S_1_MEMORY_CONFLICT_MEM", + [XAIE_EVENT_GROUP_LOCK_MEM] = "GROUP_LOCK_MEM", + [XAIE_EVENT_LOCK_0_ACQ_MEM] = "LOCK_0_ACQ_MEM", + [XAIE_EVENT_LOCK_0_REL_MEM] = "LOCK_0_REL_MEM", + [XAIE_EVENT_LOCK_1_ACQ_MEM] = "LOCK_1_ACQ_MEM", + [XAIE_EVENT_LOCK_1_REL_MEM] = "LOCK_1_REL_MEM", + [XAIE_EVENT_LOCK_2_ACQ_MEM] = "LOCK_2_ACQ_MEM", + [XAIE_EVENT_LOCK_2_REL_MEM] = "LOCK_2_REL_MEM", + [XAIE_EVENT_LOCK_3_ACQ_MEM] = "LOCK_3_ACQ_MEM", + [XAIE_EVENT_LOCK_3_REL_MEM] = "LOCK_3_REL_MEM", + [XAIE_EVENT_LOCK_4_ACQ_MEM] = "LOCK_4_ACQ_MEM", + [XAIE_EVENT_LOCK_4_REL_MEM] = "LOCK_4_REL_MEM", + [XAIE_EVENT_LOCK_5_ACQ_MEM] = "LOCK_5_ACQ_MEM", + [XAIE_EVENT_LOCK_5_REL_MEM] = "LOCK_5_REL_MEM", + [XAIE_EVENT_LOCK_6_ACQ_MEM] = "LOCK_6_ACQ_MEM", + [XAIE_EVENT_LOCK_6_REL_MEM] = "LOCK_6_REL_MEM", + [XAIE_EVENT_LOCK_7_ACQ_MEM] = "LOCK_7_ACQ_MEM", + [XAIE_EVENT_LOCK_7_REL_MEM] = "LOCK_7_REL_MEM", + [XAIE_EVENT_LOCK_8_ACQ_MEM] = "LOCK_8_ACQ_MEM", + [XAIE_EVENT_LOCK_8_REL_MEM] = "LOCK_8_REL_MEM", + [XAIE_EVENT_LOCK_9_ACQ_MEM] = "LOCK_9_ACQ_MEM", + [XAIE_EVENT_LOCK_9_REL_MEM] = "LOCK_9_REL_MEM", + [XAIE_EVENT_LOCK_10_ACQ_MEM] = "LOCK_10_ACQ_MEM", + [XAIE_EVENT_LOCK_10_REL_MEM] = "LOCK_10_REL_MEM", + [XAIE_EVENT_LOCK_11_ACQ_MEM] = "LOCK_11_ACQ_MEM", + [XAIE_EVENT_LOCK_11_REL_MEM] = "LOCK_11_REL_MEM", + [XAIE_EVENT_LOCK_12_ACQ_MEM] = "LOCK_12_ACQ_MEM", + [XAIE_EVENT_LOCK_12_REL_MEM] = "LOCK_12_REL_MEM", + [XAIE_EVENT_LOCK_13_ACQ_MEM] = "LOCK_13_ACQ_MEM", + [XAIE_EVENT_LOCK_13_REL_MEM] = "LOCK_13_REL_MEM", + [XAIE_EVENT_LOCK_14_ACQ_MEM] = "LOCK_14_ACQ_MEM", + [XAIE_EVENT_LOCK_14_REL_MEM] = "LOCK_14_REL_MEM", + [XAIE_EVENT_LOCK_15_ACQ_MEM] = "LOCK_15_ACQ_MEM", + [XAIE_EVENT_LOCK_15_REL_MEM] = "LOCK_15_REL_MEM", + [XAIE_EVENT_GROUP_MEMORY_CONFLICT_MEM] = "GROUP_MEMORY_CONFLICT_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_0_MEM] = "CONFLICT_DM_BANK_0_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_1_MEM] = "CONFLICT_DM_BANK_1_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_2_MEM] = "CONFLICT_DM_BANK_2_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_3_MEM] = "CONFLICT_DM_BANK_3_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_4_MEM] = "CONFLICT_DM_BANK_4_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_5_MEM] = "CONFLICT_DM_BANK_5_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_6_MEM] = "CONFLICT_DM_BANK_6_MEM", + [XAIE_EVENT_CONFLICT_DM_BANK_7_MEM] = "CONFLICT_DM_BANK_7_MEM", + [XAIE_EVENT_GROUP_ERRORS_MEM] = "GROUP_ERRORS_MEM", + [XAIE_EVENT_DM_ECC_ERROR_SCRUB_CORRECTED_MEM] = "DM_ECC_ERROR_SCRUB_CORRECTED_MEM", + [XAIE_EVENT_DM_ECC_ERROR_SCRUB_2BIT_MEM] = "DM_ECC_ERROR_SCRUB_2BIT_MEM", + [XAIE_EVENT_DM_ECC_ERROR_1BIT_MEM] = "DM_ECC_ERROR_1BIT_MEM", + [XAIE_EVENT_DM_ECC_ERROR_2BIT_MEM] = "DM_ECC_ERROR_2BIT_MEM", + [XAIE_EVENT_DM_PARITY_ERROR_BANK_2_MEM] = "DM_PARITY_ERROR_BANK_2_MEM", + [XAIE_EVENT_DM_PARITY_ERROR_BANK_3_MEM] = "DM_PARITY_ERROR_BANK_3_MEM", + [XAIE_EVENT_DM_PARITY_ERROR_BANK_4_MEM] = "DM_PARITY_ERROR_BANK_4_MEM", + [XAIE_EVENT_DM_PARITY_ERROR_BANK_5_MEM] = "DM_PARITY_ERROR_BANK_5_MEM", + [XAIE_EVENT_DM_PARITY_ERROR_BANK_6_MEM] = "DM_PARITY_ERROR_BANK_6_MEM", + [XAIE_EVENT_DM_PARITY_ERROR_BANK_7_MEM] = "DM_PARITY_ERROR_BANK_7_MEM", + [XAIE_EVENT_DMA_S2MM_0_ERROR_MEM] = "DMA_S2MM_0_ERROR_MEM", + [XAIE_EVENT_DMA_S2MM_1_ERROR_MEM] = "DMA_S2MM_1_ERROR_MEM", + [XAIE_EVENT_DMA_MM2S_0_ERROR_MEM] = "DMA_MM2S_0_ERROR_MEM", + [XAIE_EVENT_DMA_MM2S_1_ERROR_MEM] = "DMA_MM2S_1_ERROR_MEM", + [XAIE_EVENT_GROUP_BROADCAST_MEM] = "GROUP_BROADCAST_MEM", + [XAIE_EVENT_BROADCAST_0_MEM] = "BROADCAST_0_MEM", + [XAIE_EVENT_BROADCAST_1_MEM] = "BROADCAST_1_MEM", + [XAIE_EVENT_BROADCAST_2_MEM] = "BROADCAST_2_MEM", + [XAIE_EVENT_BROADCAST_3_MEM] = "BROADCAST_3_MEM", + [XAIE_EVENT_BROADCAST_4_MEM] = "BROADCAST_4_MEM", + [XAIE_EVENT_BROADCAST_5_MEM] = "BROADCAST_5_MEM", + [XAIE_EVENT_BROADCAST_6_MEM] = "BROADCAST_6_MEM", + [XAIE_EVENT_BROADCAST_7_MEM] = "BROADCAST_7_MEM", + [XAIE_EVENT_BROADCAST_8_MEM] = "BROADCAST_8_MEM", + [XAIE_EVENT_BROADCAST_9_MEM] = "BROADCAST_9_MEM", + [XAIE_EVENT_BROADCAST_10_MEM] = "BROADCAST_10_MEM", + [XAIE_EVENT_BROADCAST_11_MEM] = "BROADCAST_11_MEM", + [XAIE_EVENT_BROADCAST_12_MEM] = "BROADCAST_12_MEM", + [XAIE_EVENT_BROADCAST_13_MEM] = "BROADCAST_13_MEM", + [XAIE_EVENT_BROADCAST_14_MEM] = "BROADCAST_14_MEM", + [XAIE_EVENT_BROADCAST_15_MEM] = "BROADCAST_15_MEM", + [XAIE_EVENT_GROUP_USER_EVENT_MEM] = "GROUP_USER_EVENT_MEM", + [XAIE_EVENT_USER_EVENT_0_MEM] = "USER_EVENT_0_MEM", + [XAIE_EVENT_USER_EVENT_1_MEM] = "USER_EVENT_1_MEM", + [XAIE_EVENT_USER_EVENT_2_MEM] = "USER_EVENT_2_MEM", + [XAIE_EVENT_USER_EVENT_3_MEM] = "USER_EVENT_3_MEM", + [XAIE_EVENT_EDGE_DETECTION_EVENT_0_MEM] = "EDGE_DETECTION_EVENT_0_MEM", + [XAIE_EVENT_EDGE_DETECTION_EVENT_1_MEM] = "EDGE_DETECTION_EVENT_1_MEM", + [XAIE_EVENT_DMA_S2MM_0_START_TASK_MEM] = "DMA_S2MM_0_START_TASK_MEM", + [XAIE_EVENT_DMA_S2MM_1_START_TASK_MEM] = "DMA_S2MM_1_START_TASK_MEM", + [XAIE_EVENT_DMA_MM2S_0_START_TASK_MEM] = "DMA_MM2S_0_START_TASK_MEM", + [XAIE_EVENT_DMA_MM2S_1_START_TASK_MEM] = "DMA_MM2S_1_START_TASK_MEM", + [XAIE_EVENT_DMA_S2MM_0_FINISHED_TASK_MEM] = "DMA_S2MM_0_FINISHED_TASK_MEM", + [XAIE_EVENT_DMA_S2MM_1_FINISHED_TASK_MEM] = "DMA_S2MM_1_FINISHED_TASK_MEM", + [XAIE_EVENT_DMA_MM2S_0_FINISHED_TASK_MEM] = "DMA_MM2S_0_FINISHED_TASK_MEM", + [XAIE_EVENT_DMA_MM2S_1_FINISHED_TASK_MEM] = "DMA_MM2S_1_FINISHED_TASK_MEM", + [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_MEM] = "DMA_S2MM_0_STALLED_LOCK_MEM", + [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_MEM] = "DMA_S2MM_1_STALLED_LOCK_MEM", + [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_MEM] = "DMA_MM2S_0_STALLED_LOCK_MEM", + [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_MEM] = "DMA_MM2S_1_STALLED_LOCK_MEM", + [XAIE_EVENT_DMA_S2MM_0_STREAM_STARVATION_MEM] = "DMA_S2MM_0_STREAM_STARVATION_MEM", + [XAIE_EVENT_DMA_S2MM_1_STREAM_STARVATION_MEM] = "DMA_S2MM_1_STREAM_STARVATION_MEM", + [XAIE_EVENT_DMA_MM2S_0_STREAM_BACKPRESSURE_MEM] = "DMA_MM2S_0_STREAM_BACKPRESSURE_MEM", + [XAIE_EVENT_DMA_MM2S_1_STREAM_BACKPRESSURE_MEM] = "DMA_MM2S_1_STREAM_BACKPRESSURE_MEM", + [XAIE_EVENT_DMA_S2MM_0_MEMORY_BACKPRESSURE_MEM] = "DMA_S2MM_0_MEMORY_BACKPRESSURE_MEM", + [XAIE_EVENT_DMA_S2MM_1_MEMORY_BACKPRESSURE_MEM] = "DMA_S2MM_1_MEMORY_BACKPRESSURE_MEM", + [XAIE_EVENT_DMA_MM2S_0_MEMORY_STARVATION_MEM] = "DMA_MM2S_0_MEMORY_STARVATION_MEM", + [XAIE_EVENT_DMA_MM2S_1_MEMORY_STARVATION_MEM] = "DMA_MM2S_1_MEMORY_STARVATION_MEM", + [XAIE_EVENT_LOCK_SEL0_ACQ_EQ_MEM] = "LOCK_SEL0_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL0_ACQ_GE_MEM] = "LOCK_SEL0_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL0_EQUAL_TO_VALUE_MEM] = "LOCK_SEL0_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL1_ACQ_EQ_MEM] = "LOCK_SEL1_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL1_ACQ_GE_MEM] = "LOCK_SEL1_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL1_EQUAL_TO_VALUE_MEM] = "LOCK_SEL1_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL2_ACQ_EQ_MEM] = "LOCK_SEL2_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL2_ACQ_GE_MEM] = "LOCK_SEL2_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL2_EQUAL_TO_VALUE_MEM] = "LOCK_SEL2_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL3_ACQ_EQ_MEM] = "LOCK_SEL3_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL3_ACQ_GE_MEM] = "LOCK_SEL3_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL3_EQUAL_TO_VALUE_MEM] = "LOCK_SEL3_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL4_ACQ_EQ_MEM] = "LOCK_SEL4_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL4_ACQ_GE_MEM] = "LOCK_SEL4_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL4_EQUAL_TO_VALUE_MEM] = "LOCK_SEL4_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL5_ACQ_EQ_MEM] = "LOCK_SEL5_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL5_ACQ_GE_MEM] = "LOCK_SEL5_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL5_EQUAL_TO_VALUE_MEM] = "LOCK_SEL5_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL6_ACQ_EQ_MEM] = "LOCK_SEL6_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL6_ACQ_GE_MEM] = "LOCK_SEL6_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL6_EQUAL_TO_VALUE_MEM] = "LOCK_SEL6_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_SEL7_ACQ_EQ_MEM] = "LOCK_SEL7_ACQ_EQ_MEM", + [XAIE_EVENT_LOCK_SEL7_ACQ_GE_MEM] = "LOCK_SEL7_ACQ_GE_MEM", + [XAIE_EVENT_LOCK_SEL7_EQUAL_TO_VALUE_MEM] = "LOCK_SEL7_EQUAL_TO_VALUE_MEM", + [XAIE_EVENT_LOCK_ERROR_MEM] = "LOCK_ERROR_MEM", + [XAIE_EVENT_DMA_TASK_TOKEN_STALL_MEM] = "DMA_TASK_TOKEN_STALL_MEM", /* All PL/Noc module events */ - [XAIE_EVENT_NONE_PL] "NONE_PL", - [XAIE_EVENT_TRUE_PL] "TRUE_PL", - [XAIE_EVENT_GROUP_0_PL] "GROUP_0_PL", - [XAIE_EVENT_TIMER_SYNC_PL] "TIMER_SYNC_PL", - [XAIE_EVENT_TIMER_VALUE_REACHED_PL] "TIMER_VALUE_REACHED_PL", - [XAIE_EVENT_PERF_CNT_0_PL] "PERF_CNT_0_PL", - [XAIE_EVENT_PERF_CNT_1_PL] "PERF_CNT_1_PL", - [XAIE_EVENT_COMBO_EVENT_0_PL] "COMBO_EVENT_0_PL", - [XAIE_EVENT_COMBO_EVENT_1_PL] "COMBO_EVENT_1_PL", - [XAIE_EVENT_COMBO_EVENT_2_PL] "COMBO_EVENT_2_PL", - [XAIE_EVENT_COMBO_EVENT_3_PL] "COMBO_EVENT_3_PL", - [XAIE_EVENT_GROUP_DMA_ACTIVITY_PL] "GROUP_DMA_ACTIVITY_PL", - [XAIE_EVENT_DMA_S2MM_0_START_BD_PL] "DMA_S2MM_0_START_BD_PL", - [XAIE_EVENT_DMA_S2MM_1_START_BD_PL] "DMA_S2MM_1_START_BD_PL", - [XAIE_EVENT_DMA_MM2S_0_START_BD_PL] "DMA_MM2S_0_START_BD_PL", - [XAIE_EVENT_DMA_MM2S_1_START_BD_PL] "DMA_MM2S_1_START_BD_PL", - [XAIE_EVENT_DMA_S2MM_0_FINISHED_BD_PL] "DMA_S2MM_0_FINISHED_BD_PL", - [XAIE_EVENT_DMA_S2MM_1_FINISHED_BD_PL] "DMA_S2MM_1_FINISHED_BD_PL", - [XAIE_EVENT_DMA_MM2S_0_FINISHED_BD_PL] "DMA_MM2S_0_FINISHED_BD_PL", - [XAIE_EVENT_DMA_MM2S_1_FINISHED_BD_PL] "DMA_MM2S_1_FINISHED_BD_PL", - [XAIE_EVENT_DMA_S2MM_0_GO_TO_IDLE_PL] "DMA_S2MM_0_GO_TO_IDLE_PL", - [XAIE_EVENT_DMA_S2MM_1_GO_TO_IDLE_PL] "DMA_S2MM_1_GO_TO_IDLE_PL", - [XAIE_EVENT_DMA_MM2S_0_GO_TO_IDLE_PL] "DMA_MM2S_0_GO_TO_IDLE_PL", - [XAIE_EVENT_DMA_MM2S_1_GO_TO_IDLE_PL] "DMA_MM2S_1_GO_TO_IDLE_PL", - [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_ACQUIRE_PL] "DMA_S2MM_0_STALLED_LOCK_ACQUIRE_PL", - [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_ACQUIRE_PL] "DMA_S2MM_1_STALLED_LOCK_ACQUIRE_PL", - [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_ACQUIRE_PL] "DMA_MM2S_0_STALLED_LOCK_ACQUIRE_PL", - [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_ACQUIRE_PL] "DMA_MM2S_1_STALLED_LOCK_ACQUIRE_PL", - [XAIE_EVENT_GROUP_LOCK_PL] "GROUP_LOCK_PL", - [XAIE_EVENT_LOCK_0_ACQUIRED_PL] "LOCK_0_ACQUIRED_PL", - [XAIE_EVENT_LOCK_0_RELEASED_PL] "LOCK_0_RELEASED_PL", - [XAIE_EVENT_LOCK_1_ACQUIRED_PL] "LOCK_1_ACQUIRED_PL", - [XAIE_EVENT_LOCK_1_RELEASED_PL] "LOCK_1_RELEASED_PL", - [XAIE_EVENT_LOCK_2_ACQUIRED_PL] "LOCK_2_ACQUIRED_PL", - [XAIE_EVENT_LOCK_2_RELEASED_PL] "LOCK_2_RELEASED_PL", - [XAIE_EVENT_LOCK_3_ACQUIRED_PL] "LOCK_3_ACQUIRED_PL", - [XAIE_EVENT_LOCK_3_RELEASED_PL] "LOCK_3_RELEASED_PL", - [XAIE_EVENT_LOCK_4_ACQUIRED_PL] "LOCK_4_ACQUIRED_PL", - [XAIE_EVENT_LOCK_4_RELEASED_PL] "LOCK_4_RELEASED_PL", - [XAIE_EVENT_LOCK_5_ACQUIRED_PL] "LOCK_5_ACQUIRED_PL", - [XAIE_EVENT_LOCK_5_RELEASED_PL] "LOCK_5_RELEASED_PL", - [XAIE_EVENT_LOCK_6_ACQUIRED_PL] "LOCK_6_ACQUIRED_PL", - [XAIE_EVENT_LOCK_6_RELEASED_PL] "LOCK_6_RELEASED_PL", - [XAIE_EVENT_LOCK_7_ACQUIRED_PL] "LOCK_7_ACQUIRED_PL", - [XAIE_EVENT_LOCK_7_RELEASED_PL] "LOCK_7_RELEASED_PL", - [XAIE_EVENT_LOCK_8_ACQUIRED_PL] "LOCK_8_ACQUIRED_PL", - [XAIE_EVENT_LOCK_8_RELEASED_PL] "LOCK_8_RELEASED_PL", - [XAIE_EVENT_LOCK_9_ACQUIRED_PL] "LOCK_9_ACQUIRED_PL", - [XAIE_EVENT_LOCK_9_RELEASED_PL] "LOCK_9_RELEASED_PL", - [XAIE_EVENT_LOCK_10_ACQUIRED_PL] "LOCK_10_ACQUIRED_PL", - [XAIE_EVENT_LOCK_10_RELEASED_PL] "LOCK_10_RELEASED_PL", - [XAIE_EVENT_LOCK_11_ACQUIRED_PL] "LOCK_11_ACQUIRED_PL", - [XAIE_EVENT_LOCK_11_RELEASED_PL] "LOCK_11_RELEASED_PL", - [XAIE_EVENT_LOCK_12_ACQUIRED_PL] "LOCK_12_ACQUIRED_PL", - [XAIE_EVENT_LOCK_12_RELEASED_PL] "LOCK_12_RELEASED_PL", - [XAIE_EVENT_LOCK_13_ACQUIRED_PL] "LOCK_13_ACQUIRED_PL", - [XAIE_EVENT_LOCK_13_RELEASED_PL] "LOCK_13_RELEASED_PL", - [XAIE_EVENT_LOCK_14_ACQUIRED_PL] "LOCK_14_ACQUIRED_PL", - [XAIE_EVENT_LOCK_14_RELEASED_PL] "LOCK_14_RELEASED_PL", - [XAIE_EVENT_LOCK_15_ACQUIRED_PL] "LOCK_15_ACQUIRED_PL", - [XAIE_EVENT_LOCK_15_RELEASED_PL] "LOCK_15_RELEASED_PL", - [XAIE_EVENT_GROUP_ERRORS_PL] "GROUP_ERRORS_PL", - [XAIE_EVENT_AXI_MM_SLAVE_TILE_ERROR_PL] "AXI_MM_SLAVE_TILE_ERROR_PL", - [XAIE_EVENT_CONTROL_PKT_ERROR_PL] "CONTROL_PKT_ERROR_PL", - [XAIE_EVENT_AXI_MM_DECODE_NSU_ERROR_PL] "AXI_MM_DECODE_NSU_ERROR_PL", - [XAIE_EVENT_AXI_MM_SLAVE_NSU_ERROR_PL] "AXI_MM_SLAVE_NSU_ERROR_PL", - [XAIE_EVENT_AXI_MM_UNSUPPORTED_TRAFFIC_PL] "AXI_MM_UNSUPPORTED_TRAFFIC_PL", - [XAIE_EVENT_AXI_MM_UNSECURE_ACCESS_IN_SECURE_MODE_PL] "AXI_MM_UNSECURE_ACCESS_IN_SECURE_MODE_PL", - [XAIE_EVENT_AXI_MM_BYTE_STROBE_ERROR_PL] "AXI_MM_BYTE_STROBE_ERROR_PL", - [XAIE_EVENT_DMA_S2MM_0_ERROR_PL] "DMA_S2MM_0_ERROR_PL", - [XAIE_EVENT_DMA_S2MM_1_ERROR_PL] "DMA_S2MM_1_ERROR_PL", - [XAIE_EVENT_DMA_MM2S_0_ERROR_PL] "DMA_MM2S_0_ERROR_PL", - [XAIE_EVENT_DMA_MM2S_1_ERROR_PL] "DMA_MM2S_1_ERROR_PL", - [XAIE_EVENT_GROUP_STREAM_SWITCH_PL] "GROUP_STREAM_SWITCH_PL", - [XAIE_EVENT_PORT_IDLE_0_PL] "PORT_IDLE_0_PL", - [XAIE_EVENT_PORT_RUNNING_0_PL] "PORT_RUNNING_0_PL", - [XAIE_EVENT_PORT_STALLED_0_PL] "PORT_STALLED_0_PL", - [XAIE_EVENT_PORT_TLAST_0_PL] "PORT_TLAST_0_PL", - [XAIE_EVENT_PORT_IDLE_1_PL] "PORT_IDLE_1_PL", - [XAIE_EVENT_PORT_RUNNING_1_PL] "PORT_RUNNING_1_PL", - [XAIE_EVENT_PORT_STALLED_1_PL] "PORT_STALLED_1_PL", - [XAIE_EVENT_PORT_TLAST_1_PL] "PORT_TLAST_1_PL", - [XAIE_EVENT_PORT_IDLE_2_PL] "PORT_IDLE_2_PL", - [XAIE_EVENT_PORT_RUNNING_2_PL] "PORT_RUNNING_2_PL", - [XAIE_EVENT_PORT_STALLED_2_PL] "PORT_STALLED_2_PL", - [XAIE_EVENT_PORT_TLAST_2_PL] "PORT_TLAST_2_PL", - [XAIE_EVENT_PORT_IDLE_3_PL] "PORT_IDLE_3_PL", - [XAIE_EVENT_PORT_RUNNING_3_PL] "PORT_RUNNING_3_PL", - [XAIE_EVENT_PORT_STALLED_3_PL] "PORT_STALLED_3_PL", - [XAIE_EVENT_PORT_TLAST_3_PL] "PORT_TLAST_3_PL", - [XAIE_EVENT_PORT_IDLE_4_PL] "PORT_IDLE_4_PL", - [XAIE_EVENT_PORT_RUNNING_4_PL] "PORT_RUNNING_4_PL", - [XAIE_EVENT_PORT_STALLED_4_PL] "PORT_STALLED_4_PL", - [XAIE_EVENT_PORT_TLAST_4_PL] "PORT_TLAST_4_PL", - [XAIE_EVENT_PORT_IDLE_5_PL] "PORT_IDLE_5_PL", - [XAIE_EVENT_PORT_RUNNING_5_PL] "PORT_RUNNING_5_PL", - [XAIE_EVENT_PORT_STALLED_5_PL] "PORT_STALLED_5_PL", - [XAIE_EVENT_PORT_TLAST_5_PL] "PORT_TLAST_5_PL", - [XAIE_EVENT_PORT_IDLE_6_PL] "PORT_IDLE_6_PL", - [XAIE_EVENT_PORT_RUNNING_6_PL] "PORT_RUNNING_6_PL", - [XAIE_EVENT_PORT_STALLED_6_PL] "PORT_STALLED_6_PL", - [XAIE_EVENT_PORT_TLAST_6_PL] "PORT_TLAST_6_PL", - [XAIE_EVENT_PORT_IDLE_7_PL] "PORT_IDLE_7_PL", - [XAIE_EVENT_PORT_RUNNING_7_PL] "PORT_RUNNING_7_PL", - [XAIE_EVENT_PORT_STALLED_7_PL] "PORT_STALLED_7_PL", - [XAIE_EVENT_PORT_TLAST_7_PL] "PORT_TLAST_7_PL", - [XAIE_EVENT_GROUP_BROADCAST_A_PL] "GROUP_BROADCAST_A_PL", - [XAIE_EVENT_BROADCAST_A_0_PL] "BROADCAST_A_0_PL", - [XAIE_EVENT_BROADCAST_A_1_PL] "BROADCAST_A_1_PL", - [XAIE_EVENT_BROADCAST_A_2_PL] "BROADCAST_A_2_PL", - [XAIE_EVENT_BROADCAST_A_3_PL] "BROADCAST_A_3_PL", - [XAIE_EVENT_BROADCAST_A_4_PL] "BROADCAST_A_4_PL", - [XAIE_EVENT_BROADCAST_A_5_PL] "BROADCAST_A_5_PL", - [XAIE_EVENT_BROADCAST_A_6_PL] "BROADCAST_A_6_PL", - [XAIE_EVENT_BROADCAST_A_7_PL] "BROADCAST_A_7_PL", - [XAIE_EVENT_BROADCAST_A_8_PL] "BROADCAST_A_8_PL", - [XAIE_EVENT_BROADCAST_A_9_PL] "BROADCAST_A_9_PL", - [XAIE_EVENT_BROADCAST_A_10_PL] "BROADCAST_A_10_PL", - [XAIE_EVENT_BROADCAST_A_11_PL] "BROADCAST_A_11_PL", - [XAIE_EVENT_BROADCAST_A_12_PL] "BROADCAST_A_12_PL", - [XAIE_EVENT_BROADCAST_A_13_PL] "BROADCAST_A_13_PL", - [XAIE_EVENT_BROADCAST_A_14_PL] "BROADCAST_A_14_PL", - [XAIE_EVENT_BROADCAST_A_15_PL] "BROADCAST_A_15_PL", - [XAIE_EVENT_GROUP_USER_EVENT_PL] "GROUP_USER_EVENT_PL", - [XAIE_EVENT_USER_EVENT_0_PL] "USER_EVENT_0_PL", - [XAIE_EVENT_USER_EVENT_1_PL] "USER_EVENT_1_PL", - [XAIE_EVENT_USER_EVENT_2_PL] "USER_EVENT_2_PL", - [XAIE_EVENT_USER_EVENT_3_PL] "USER_EVENT_3_PL", - [XAIE_EVENT_EDGE_DETECTION_EVENT_0_PL] "EDGE_DETECTION_EVENT_0_PL", - [XAIE_EVENT_EDGE_DETECTION_EVENT_1_PL] "EDGE_DETECTION_EVENT_1_PL", - [XAIE_EVENT_DMA_S2MM_0_START_TASK_PL] "DMA_S2MM_0_START_TASK_PL", - [XAIE_EVENT_DMA_S2MM_1_START_TASK_PL] "DMA_S2MM_1_START_TASK_PL", - [XAIE_EVENT_DMA_MM2S_0_START_TASK_PL] "DMA_MM2S_0_START_TASK_PL", - [XAIE_EVENT_DMA_MM2S_1_START_TASK_PL] "DMA_MM2S_1_START_TASK_PL", - [XAIE_EVENT_DMA_S2MM_0_FINISHED_TASK_PL] "DMA_S2MM_0_FINISHED_TASK_PL", - [XAIE_EVENT_DMA_S2MM_1_FINISHED_TASK_PL] "DMA_S2MM_1_FINISHED_TASK_PL", - [XAIE_EVENT_DMA_MM2S_0_FINISHED_TASK_PL] "DMA_MM2S_0_FINISHED_TASK_PL", - [XAIE_EVENT_DMA_MM2S_1_FINISHED_TASK_PL] "DMA_MM2S_1_FINISHED_TASK_PL", - [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_PL] "DMA_S2MM_0_STALLED_LOCK_PL", - [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_PL] "DMA_S2MM_1_STALLED_LOCK_PL", - [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_PL] "DMA_MM2S_0_STALLED_LOCK_PL", - [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_PL] "DMA_MM2S_1_STALLED_LOCK_PL", - [XAIE_EVENT_DMA_S2MM_0_STREAM_STARVATION_PL] "DMA_S2MM_0_STREAM_STARVATION_PL", - [XAIE_EVENT_DMA_S2MM_1_STREAM_STARVATION_PL] "DMA_S2MM_1_STREAM_STARVATION_PL", - [XAIE_EVENT_DMA_MM2S_0_STREAM_BACKPRESSURE_PL] "DMA_MM2S_0_STREAM_BACKPRESSURE_PL", - [XAIE_EVENT_DMA_MM2S_1_STREAM_BACKPRESSURE_PL] "DMA_MM2S_1_STREAM_BACKPRESSURE_PL", - [XAIE_EVENT_DMA_S2MM_0_MEMORY_BACKPRESSURE_PL] "DMA_S2MM_0_MEMORY_BACKPRESSURE_PL", - [XAIE_EVENT_DMA_S2MM_1_MEMORY_BACKPRESSURE_PL] "DMA_S2MM_1_MEMORY_BACKPRESSURE_PL", - [XAIE_EVENT_DMA_MM2S_0_MEMORY_STARVATION_PL] "DMA_MM2S_0_MEMORY_STARVATION_PL", - [XAIE_EVENT_DMA_MM2S_1_MEMORY_STARVATION_PL] "DMA_MM2S_1_MEMORY_STARVATION_PL", - [XAIE_EVENT_LOCK_0_ACQ_EQ_PL] "LOCK_0_ACQ_EQ_PL", - [XAIE_EVENT_LOCK_0_ACQ_GE_PL] "LOCK_0_ACQ_GE_PL", - [XAIE_EVENT_LOCK_0_EQUAL_TO_VALUE_PL] "LOCK_0_EQUAL_TO_VALUE_PL", - [XAIE_EVENT_LOCK_1_ACQ_EQ_PL] "LOCK_1_ACQ_EQ_PL", - [XAIE_EVENT_LOCK_1_ACQ_GE_PL] "LOCK_1_ACQ_GE_PL", - [XAIE_EVENT_LOCK_1_EQUAL_TO_VALUE_PL] "LOCK_1_EQUAL_TO_VALUE_PL", - [XAIE_EVENT_LOCK_2_ACQ_EQ_PL] "LOCK_2_ACQ_EQ_PL", - [XAIE_EVENT_LOCK_2_ACQ_GE_PL] "LOCK_2_ACQ_GE_PL", - [XAIE_EVENT_LOCK_2_EQUAL_TO_VALUE_PL] "LOCK_2_EQUAL_TO_VALUE_PL", - [XAIE_EVENT_LOCK_3_ACQ_EQ_PL] "LOCK_3_ACQ_EQ_PL", - [XAIE_EVENT_LOCK_3_ACQ_GE_PL] "LOCK_3_ACQ_GE_PL", - [XAIE_EVENT_LOCK_3_EQUAL_TO_VALUE_PL] "LOCK_3_EQUAL_TO_VALUE_PL", - [XAIE_EVENT_LOCK_4_ACQ_EQ_PL] "LOCK_4_ACQ_EQ_PL", - [XAIE_EVENT_LOCK_4_ACQ_GE_PL] "LOCK_4_ACQ_GE_PL", - [XAIE_EVENT_LOCK_4_EQUAL_TO_VALUE_PL] "LOCK_4_EQUAL_TO_VALUE_PL", - [XAIE_EVENT_LOCK_5_ACQ_EQ_PL] "LOCK_5_ACQ_EQ_PL", - [XAIE_EVENT_LOCK_5_ACQ_GE_PL] "LOCK_5_ACQ_GE_PL", - [XAIE_EVENT_LOCK_5_EQUAL_TO_VALUE_PL] "LOCK_5_EQUAL_TO_VALUE_PL", - [XAIE_EVENT_STREAM_SWITCH_PARITY_ERROR_PL] "STREAM_SWITCH_PARITY_ERROR_PL", - [XAIE_EVENT_DMA_S2MM_ERROR_PL] "DMA_S2MM_ERROR_PL", - [XAIE_EVENT_DMA_MM2S_ERROR_PL] "DMA_MM2S_ERROR_PL", - [XAIE_EVENT_LOCK_ERROR_PL] "LOCK_ERROR_PL", - [XAIE_EVENT_DMA_TASK_TOKEN_STALL_PL] "DMA_TASK_TOKEN_STALL_PL", + [XAIE_EVENT_NONE_PL] = "NONE_PL", + [XAIE_EVENT_TRUE_PL] = "TRUE_PL", + [XAIE_EVENT_GROUP_0_PL] = "GROUP_0_PL", + [XAIE_EVENT_TIMER_SYNC_PL] = "TIMER_SYNC_PL", + [XAIE_EVENT_TIMER_VALUE_REACHED_PL] = "TIMER_VALUE_REACHED_PL", + [XAIE_EVENT_PERF_CNT_0_PL] = "PERF_CNT_0_PL", + [XAIE_EVENT_PERF_CNT_1_PL] = "PERF_CNT_1_PL", + [XAIE_EVENT_COMBO_EVENT_0_PL] = "COMBO_EVENT_0_PL", + [XAIE_EVENT_COMBO_EVENT_1_PL] = "COMBO_EVENT_1_PL", + [XAIE_EVENT_COMBO_EVENT_2_PL] = "COMBO_EVENT_2_PL", + [XAIE_EVENT_COMBO_EVENT_3_PL] = "COMBO_EVENT_3_PL", + [XAIE_EVENT_GROUP_DMA_ACTIVITY_PL] = "GROUP_DMA_ACTIVITY_PL", + [XAIE_EVENT_DMA_S2MM_0_START_BD_PL] = "DMA_S2MM_0_START_BD_PL", + [XAIE_EVENT_DMA_S2MM_1_START_BD_PL] = "DMA_S2MM_1_START_BD_PL", + [XAIE_EVENT_DMA_MM2S_0_START_BD_PL] = "DMA_MM2S_0_START_BD_PL", + [XAIE_EVENT_DMA_MM2S_1_START_BD_PL] = "DMA_MM2S_1_START_BD_PL", + [XAIE_EVENT_DMA_S2MM_0_FINISHED_BD_PL] = "DMA_S2MM_0_FINISHED_BD_PL", + [XAIE_EVENT_DMA_S2MM_1_FINISHED_BD_PL] = "DMA_S2MM_1_FINISHED_BD_PL", + [XAIE_EVENT_DMA_MM2S_0_FINISHED_BD_PL] = "DMA_MM2S_0_FINISHED_BD_PL", + [XAIE_EVENT_DMA_MM2S_1_FINISHED_BD_PL] = "DMA_MM2S_1_FINISHED_BD_PL", + [XAIE_EVENT_DMA_S2MM_0_GO_TO_IDLE_PL] = "DMA_S2MM_0_GO_TO_IDLE_PL", + [XAIE_EVENT_DMA_S2MM_1_GO_TO_IDLE_PL] = "DMA_S2MM_1_GO_TO_IDLE_PL", + [XAIE_EVENT_DMA_MM2S_0_GO_TO_IDLE_PL] = "DMA_MM2S_0_GO_TO_IDLE_PL", + [XAIE_EVENT_DMA_MM2S_1_GO_TO_IDLE_PL] = "DMA_MM2S_1_GO_TO_IDLE_PL", + [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_ACQUIRE_PL] = "DMA_S2MM_0_STALLED_LOCK_ACQUIRE_PL", + [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_ACQUIRE_PL] = "DMA_S2MM_1_STALLED_LOCK_ACQUIRE_PL", + [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_ACQUIRE_PL] = "DMA_MM2S_0_STALLED_LOCK_ACQUIRE_PL", + [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_ACQUIRE_PL] = "DMA_MM2S_1_STALLED_LOCK_ACQUIRE_PL", + [XAIE_EVENT_GROUP_LOCK_PL] = "GROUP_LOCK_PL", + [XAIE_EVENT_LOCK_0_ACQUIRED_PL] = "LOCK_0_ACQUIRED_PL", + [XAIE_EVENT_LOCK_0_RELEASED_PL] = "LOCK_0_RELEASED_PL", + [XAIE_EVENT_LOCK_1_ACQUIRED_PL] = "LOCK_1_ACQUIRED_PL", + [XAIE_EVENT_LOCK_1_RELEASED_PL] = "LOCK_1_RELEASED_PL", + [XAIE_EVENT_LOCK_2_ACQUIRED_PL] = "LOCK_2_ACQUIRED_PL", + [XAIE_EVENT_LOCK_2_RELEASED_PL] = "LOCK_2_RELEASED_PL", + [XAIE_EVENT_LOCK_3_ACQUIRED_PL] = "LOCK_3_ACQUIRED_PL", + [XAIE_EVENT_LOCK_3_RELEASED_PL] = "LOCK_3_RELEASED_PL", + [XAIE_EVENT_LOCK_4_ACQUIRED_PL] = "LOCK_4_ACQUIRED_PL", + [XAIE_EVENT_LOCK_4_RELEASED_PL] = "LOCK_4_RELEASED_PL", + [XAIE_EVENT_LOCK_5_ACQUIRED_PL] = "LOCK_5_ACQUIRED_PL", + [XAIE_EVENT_LOCK_5_RELEASED_PL] = "LOCK_5_RELEASED_PL", + [XAIE_EVENT_LOCK_6_ACQUIRED_PL] = "LOCK_6_ACQUIRED_PL", + [XAIE_EVENT_LOCK_6_RELEASED_PL] = "LOCK_6_RELEASED_PL", + [XAIE_EVENT_LOCK_7_ACQUIRED_PL] = "LOCK_7_ACQUIRED_PL", + [XAIE_EVENT_LOCK_7_RELEASED_PL] = "LOCK_7_RELEASED_PL", + [XAIE_EVENT_LOCK_8_ACQUIRED_PL] = "LOCK_8_ACQUIRED_PL", + [XAIE_EVENT_LOCK_8_RELEASED_PL] = "LOCK_8_RELEASED_PL", + [XAIE_EVENT_LOCK_9_ACQUIRED_PL] = "LOCK_9_ACQUIRED_PL", + [XAIE_EVENT_LOCK_9_RELEASED_PL] = "LOCK_9_RELEASED_PL", + [XAIE_EVENT_LOCK_10_ACQUIRED_PL] = "LOCK_10_ACQUIRED_PL", + [XAIE_EVENT_LOCK_10_RELEASED_PL] = "LOCK_10_RELEASED_PL", + [XAIE_EVENT_LOCK_11_ACQUIRED_PL] = "LOCK_11_ACQUIRED_PL", + [XAIE_EVENT_LOCK_11_RELEASED_PL] = "LOCK_11_RELEASED_PL", + [XAIE_EVENT_LOCK_12_ACQUIRED_PL] = "LOCK_12_ACQUIRED_PL", + [XAIE_EVENT_LOCK_12_RELEASED_PL] = "LOCK_12_RELEASED_PL", + [XAIE_EVENT_LOCK_13_ACQUIRED_PL] = "LOCK_13_ACQUIRED_PL", + [XAIE_EVENT_LOCK_13_RELEASED_PL] = "LOCK_13_RELEASED_PL", + [XAIE_EVENT_LOCK_14_ACQUIRED_PL] = "LOCK_14_ACQUIRED_PL", + [XAIE_EVENT_LOCK_14_RELEASED_PL] = "LOCK_14_RELEASED_PL", + [XAIE_EVENT_LOCK_15_ACQUIRED_PL] = "LOCK_15_ACQUIRED_PL", + [XAIE_EVENT_LOCK_15_RELEASED_PL] = "LOCK_15_RELEASED_PL", + [XAIE_EVENT_GROUP_ERRORS_PL] = "GROUP_ERRORS_PL", + [XAIE_EVENT_AXI_MM_SLAVE_TILE_ERROR_PL] = "AXI_MM_SLAVE_TILE_ERROR_PL", + [XAIE_EVENT_CONTROL_PKT_ERROR_PL] = "CONTROL_PKT_ERROR_PL", + [XAIE_EVENT_AXI_MM_DECODE_NSU_ERROR_PL] = "AXI_MM_DECODE_NSU_ERROR_PL", + [XAIE_EVENT_AXI_MM_SLAVE_NSU_ERROR_PL] = "AXI_MM_SLAVE_NSU_ERROR_PL", + [XAIE_EVENT_AXI_MM_UNSUPPORTED_TRAFFIC_PL] = "AXI_MM_UNSUPPORTED_TRAFFIC_PL", + [XAIE_EVENT_AXI_MM_UNSECURE_ACCESS_IN_SECURE_MODE_PL] = "AXI_MM_UNSECURE_ACCESS_IN_SECURE_MODE_PL", + [XAIE_EVENT_AXI_MM_BYTE_STROBE_ERROR_PL] = "AXI_MM_BYTE_STROBE_ERROR_PL", + [XAIE_EVENT_DMA_S2MM_0_ERROR_PL] = "DMA_S2MM_0_ERROR_PL", + [XAIE_EVENT_DMA_S2MM_1_ERROR_PL] = "DMA_S2MM_1_ERROR_PL", + [XAIE_EVENT_DMA_MM2S_0_ERROR_PL] = "DMA_MM2S_0_ERROR_PL", + [XAIE_EVENT_DMA_MM2S_1_ERROR_PL] = "DMA_MM2S_1_ERROR_PL", + [XAIE_EVENT_GROUP_STREAM_SWITCH_PL] = "GROUP_STREAM_SWITCH_PL", + [XAIE_EVENT_PORT_IDLE_0_PL] = "PORT_IDLE_0_PL", + [XAIE_EVENT_PORT_RUNNING_0_PL] = "PORT_RUNNING_0_PL", + [XAIE_EVENT_PORT_STALLED_0_PL] = "PORT_STALLED_0_PL", + [XAIE_EVENT_PORT_TLAST_0_PL] = "PORT_TLAST_0_PL", + [XAIE_EVENT_PORT_IDLE_1_PL] = "PORT_IDLE_1_PL", + [XAIE_EVENT_PORT_RUNNING_1_PL] = "PORT_RUNNING_1_PL", + [XAIE_EVENT_PORT_STALLED_1_PL] = "PORT_STALLED_1_PL", + [XAIE_EVENT_PORT_TLAST_1_PL] = "PORT_TLAST_1_PL", + [XAIE_EVENT_PORT_IDLE_2_PL] = "PORT_IDLE_2_PL", + [XAIE_EVENT_PORT_RUNNING_2_PL] = "PORT_RUNNING_2_PL", + [XAIE_EVENT_PORT_STALLED_2_PL] = "PORT_STALLED_2_PL", + [XAIE_EVENT_PORT_TLAST_2_PL] = "PORT_TLAST_2_PL", + [XAIE_EVENT_PORT_IDLE_3_PL] = "PORT_IDLE_3_PL", + [XAIE_EVENT_PORT_RUNNING_3_PL] = "PORT_RUNNING_3_PL", + [XAIE_EVENT_PORT_STALLED_3_PL] = "PORT_STALLED_3_PL", + [XAIE_EVENT_PORT_TLAST_3_PL] = "PORT_TLAST_3_PL", + [XAIE_EVENT_PORT_IDLE_4_PL] = "PORT_IDLE_4_PL", + [XAIE_EVENT_PORT_RUNNING_4_PL] = "PORT_RUNNING_4_PL", + [XAIE_EVENT_PORT_STALLED_4_PL] = "PORT_STALLED_4_PL", + [XAIE_EVENT_PORT_TLAST_4_PL] = "PORT_TLAST_4_PL", + [XAIE_EVENT_PORT_IDLE_5_PL] = "PORT_IDLE_5_PL", + [XAIE_EVENT_PORT_RUNNING_5_PL] = "PORT_RUNNING_5_PL", + [XAIE_EVENT_PORT_STALLED_5_PL] = "PORT_STALLED_5_PL", + [XAIE_EVENT_PORT_TLAST_5_PL] = "PORT_TLAST_5_PL", + [XAIE_EVENT_PORT_IDLE_6_PL] = "PORT_IDLE_6_PL", + [XAIE_EVENT_PORT_RUNNING_6_PL] = "PORT_RUNNING_6_PL", + [XAIE_EVENT_PORT_STALLED_6_PL] = "PORT_STALLED_6_PL", + [XAIE_EVENT_PORT_TLAST_6_PL] = "PORT_TLAST_6_PL", + [XAIE_EVENT_PORT_IDLE_7_PL] = "PORT_IDLE_7_PL", + [XAIE_EVENT_PORT_RUNNING_7_PL] = "PORT_RUNNING_7_PL", + [XAIE_EVENT_PORT_STALLED_7_PL] = "PORT_STALLED_7_PL", + [XAIE_EVENT_PORT_TLAST_7_PL] = "PORT_TLAST_7_PL", + [XAIE_EVENT_GROUP_BROADCAST_A_PL] = "GROUP_BROADCAST_A_PL", + [XAIE_EVENT_BROADCAST_A_0_PL] = "BROADCAST_A_0_PL", + [XAIE_EVENT_BROADCAST_A_1_PL] = "BROADCAST_A_1_PL", + [XAIE_EVENT_BROADCAST_A_2_PL] = "BROADCAST_A_2_PL", + [XAIE_EVENT_BROADCAST_A_3_PL] = "BROADCAST_A_3_PL", + [XAIE_EVENT_BROADCAST_A_4_PL] = "BROADCAST_A_4_PL", + [XAIE_EVENT_BROADCAST_A_5_PL] = "BROADCAST_A_5_PL", + [XAIE_EVENT_BROADCAST_A_6_PL] = "BROADCAST_A_6_PL", + [XAIE_EVENT_BROADCAST_A_7_PL] = "BROADCAST_A_7_PL", + [XAIE_EVENT_BROADCAST_A_8_PL] = "BROADCAST_A_8_PL", + [XAIE_EVENT_BROADCAST_A_9_PL] = "BROADCAST_A_9_PL", + [XAIE_EVENT_BROADCAST_A_10_PL] = "BROADCAST_A_10_PL", + [XAIE_EVENT_BROADCAST_A_11_PL] = "BROADCAST_A_11_PL", + [XAIE_EVENT_BROADCAST_A_12_PL] = "BROADCAST_A_12_PL", + [XAIE_EVENT_BROADCAST_A_13_PL] = "BROADCAST_A_13_PL", + [XAIE_EVENT_BROADCAST_A_14_PL] = "BROADCAST_A_14_PL", + [XAIE_EVENT_BROADCAST_A_15_PL] = "BROADCAST_A_15_PL", + [XAIE_EVENT_GROUP_USER_EVENT_PL] = "GROUP_USER_EVENT_PL", + [XAIE_EVENT_USER_EVENT_0_PL] = "USER_EVENT_0_PL", + [XAIE_EVENT_USER_EVENT_1_PL] = "USER_EVENT_1_PL", + [XAIE_EVENT_USER_EVENT_2_PL] = "USER_EVENT_2_PL", + [XAIE_EVENT_USER_EVENT_3_PL] = "USER_EVENT_3_PL", + [XAIE_EVENT_EDGE_DETECTION_EVENT_0_PL] = "EDGE_DETECTION_EVENT_0_PL", + [XAIE_EVENT_EDGE_DETECTION_EVENT_1_PL] = "EDGE_DETECTION_EVENT_1_PL", + [XAIE_EVENT_DMA_S2MM_0_START_TASK_PL] = "DMA_S2MM_0_START_TASK_PL", + [XAIE_EVENT_DMA_S2MM_1_START_TASK_PL] = "DMA_S2MM_1_START_TASK_PL", + [XAIE_EVENT_DMA_MM2S_0_START_TASK_PL] = "DMA_MM2S_0_START_TASK_PL", + [XAIE_EVENT_DMA_MM2S_1_START_TASK_PL] = "DMA_MM2S_1_START_TASK_PL", + [XAIE_EVENT_DMA_S2MM_0_FINISHED_TASK_PL] = "DMA_S2MM_0_FINISHED_TASK_PL", + [XAIE_EVENT_DMA_S2MM_1_FINISHED_TASK_PL] = "DMA_S2MM_1_FINISHED_TASK_PL", + [XAIE_EVENT_DMA_MM2S_0_FINISHED_TASK_PL] = "DMA_MM2S_0_FINISHED_TASK_PL", + [XAIE_EVENT_DMA_MM2S_1_FINISHED_TASK_PL] = "DMA_MM2S_1_FINISHED_TASK_PL", + [XAIE_EVENT_DMA_S2MM_0_STALLED_LOCK_PL] = "DMA_S2MM_0_STALLED_LOCK_PL", + [XAIE_EVENT_DMA_S2MM_1_STALLED_LOCK_PL] = "DMA_S2MM_1_STALLED_LOCK_PL", + [XAIE_EVENT_DMA_MM2S_0_STALLED_LOCK_PL] = "DMA_MM2S_0_STALLED_LOCK_PL", + [XAIE_EVENT_DMA_MM2S_1_STALLED_LOCK_PL] = "DMA_MM2S_1_STALLED_LOCK_PL", + [XAIE_EVENT_DMA_S2MM_0_STREAM_STARVATION_PL] = "DMA_S2MM_0_STREAM_STARVATION_PL", + [XAIE_EVENT_DMA_S2MM_1_STREAM_STARVATION_PL] = "DMA_S2MM_1_STREAM_STARVATION_PL", + [XAIE_EVENT_DMA_MM2S_0_STREAM_BACKPRESSURE_PL] = "DMA_MM2S_0_STREAM_BACKPRESSURE_PL", + [XAIE_EVENT_DMA_MM2S_1_STREAM_BACKPRESSURE_PL] = "DMA_MM2S_1_STREAM_BACKPRESSURE_PL", + [XAIE_EVENT_DMA_S2MM_0_MEMORY_BACKPRESSURE_PL] = "DMA_S2MM_0_MEMORY_BACKPRESSURE_PL", + [XAIE_EVENT_DMA_S2MM_1_MEMORY_BACKPRESSURE_PL] = "DMA_S2MM_1_MEMORY_BACKPRESSURE_PL", + [XAIE_EVENT_DMA_MM2S_0_MEMORY_STARVATION_PL] = "DMA_MM2S_0_MEMORY_STARVATION_PL", + [XAIE_EVENT_DMA_MM2S_1_MEMORY_STARVATION_PL] = "DMA_MM2S_1_MEMORY_STARVATION_PL", + [XAIE_EVENT_LOCK_0_ACQ_EQ_PL] = "LOCK_0_ACQ_EQ_PL", + [XAIE_EVENT_LOCK_0_ACQ_GE_PL] = "LOCK_0_ACQ_GE_PL", + [XAIE_EVENT_LOCK_0_EQUAL_TO_VALUE_PL] = "LOCK_0_EQUAL_TO_VALUE_PL", + [XAIE_EVENT_LOCK_1_ACQ_EQ_PL] = "LOCK_1_ACQ_EQ_PL", + [XAIE_EVENT_LOCK_1_ACQ_GE_PL] = "LOCK_1_ACQ_GE_PL", + [XAIE_EVENT_LOCK_1_EQUAL_TO_VALUE_PL] = "LOCK_1_EQUAL_TO_VALUE_PL", + [XAIE_EVENT_LOCK_2_ACQ_EQ_PL] = "LOCK_2_ACQ_EQ_PL", + [XAIE_EVENT_LOCK_2_ACQ_GE_PL] = "LOCK_2_ACQ_GE_PL", + [XAIE_EVENT_LOCK_2_EQUAL_TO_VALUE_PL] = "LOCK_2_EQUAL_TO_VALUE_PL", + [XAIE_EVENT_LOCK_3_ACQ_EQ_PL] = "LOCK_3_ACQ_EQ_PL", + [XAIE_EVENT_LOCK_3_ACQ_GE_PL] = "LOCK_3_ACQ_GE_PL", + [XAIE_EVENT_LOCK_3_EQUAL_TO_VALUE_PL] = "LOCK_3_EQUAL_TO_VALUE_PL", + [XAIE_EVENT_LOCK_4_ACQ_EQ_PL] = "LOCK_4_ACQ_EQ_PL", + [XAIE_EVENT_LOCK_4_ACQ_GE_PL] = "LOCK_4_ACQ_GE_PL", + [XAIE_EVENT_LOCK_4_EQUAL_TO_VALUE_PL] = "LOCK_4_EQUAL_TO_VALUE_PL", + [XAIE_EVENT_LOCK_5_ACQ_EQ_PL] = "LOCK_5_ACQ_EQ_PL", + [XAIE_EVENT_LOCK_5_ACQ_GE_PL] = "LOCK_5_ACQ_GE_PL", + [XAIE_EVENT_LOCK_5_EQUAL_TO_VALUE_PL] = "LOCK_5_EQUAL_TO_VALUE_PL", + [XAIE_EVENT_STREAM_SWITCH_PARITY_ERROR_PL] = "STREAM_SWITCH_PARITY_ERROR_PL", + [XAIE_EVENT_DMA_S2MM_ERROR_PL] = "DMA_S2MM_ERROR_PL", + [XAIE_EVENT_DMA_MM2S_ERROR_PL] = "DMA_MM2S_ERROR_PL", + [XAIE_EVENT_LOCK_ERROR_PL] = "LOCK_ERROR_PL", + [XAIE_EVENT_DMA_TASK_TOKEN_STALL_PL] = "DMA_TASK_TOKEN_STALL_PL", /* All Mem Tile events */ - [XAIE_EVENT_NONE_MEM_TILE] "NONE_MEM_TILE", - [XAIE_EVENT_TRUE_MEM_TILE] "TRUE_MEM_TILE", - [XAIE_EVENT_GROUP_0_MEM_TILE] "GROUP_0_MEM_TILE", - [XAIE_EVENT_TIMER_SYNC_MEM_TILE] "TIMER_SYNC_MEM_TILE", - [XAIE_EVENT_TIMER_VALUE_REACHED_MEM_TILE] "TIMER_VALUE_REACHED_MEM_TILE", - [XAIE_EVENT_PERF_CNT0_EVENT_MEM_TILE] "PERF_CNT0_EVENT_MEM_TILE", - [XAIE_EVENT_PERF_CNT1_EVENT_MEM_TILE] "PERF_CNT1_EVENT_MEM_TILE", - [XAIE_EVENT_PERF_CNT2_EVENT_MEM_TILE] "PERF_CNT2_EVENT_MEM_TILE", - [XAIE_EVENT_PERF_CNT3_EVENT_MEM_TILE] "PERF_CNT3_EVENT_MEM_TILE", - [XAIE_EVENT_COMBO_EVENT_0_MEM_TILE] "COMBO_EVENT_0_MEM_TILE", - [XAIE_EVENT_COMBO_EVENT_1_MEM_TILE] "COMBO_EVENT_1_MEM_TILE", - [XAIE_EVENT_COMBO_EVENT_2_MEM_TILE] "COMBO_EVENT_2_MEM_TILE", - [XAIE_EVENT_COMBO_EVENT_3_MEM_TILE] "COMBO_EVENT_3_MEM_TILE", - [XAIE_EVENT_EDGE_DETECTION_EVENT_0_MEM_TILE] "EDGE_DETECTION_EVENT_0_MEM_TILE", - [XAIE_EVENT_EDGE_DETECTION_EVENT_1_MEM_TILE] "EDGE_DETECTION_EVENT_1_MEM_TILE", - [XAIE_EVENT_GROUP_WATCHPOINT_MEM_TILE] "GROUP_WATCHPOINT_MEM_TILE", - [XAIE_EVENT_WATCHPOINT_0_MEM_TILE] "WATCHPOINT_0_MEM_TILE", - [XAIE_EVENT_WATCHPOINT_1_MEM_TILE] "WATCHPOINT_1_MEM_TILE", - [XAIE_EVENT_WATCHPOINT_2_MEM_TILE] "WATCHPOINT_2_MEM_TILE", - [XAIE_EVENT_WATCHPOINT_3_MEM_TILE] "WATCHPOINT_3_MEM_TILE", - [XAIE_EVENT_GROUP_DMA_ACTIVITY_MEM_TILE] "GROUP_DMA_ACTIVITY_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL0_START_TASK_MEM_TILE] "DMA_S2MM_SEL0_START_TASK_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL1_START_TASK_MEM_TILE] "DMA_S2MM_SEL1_START_TASK_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL0_START_TASK_MEM_TILE] "DMA_MM2S_SEL0_START_TASK_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL1_START_TASK_MEM_TILE] "DMA_MM2S_SEL1_START_TASK_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL0_FINISHED_BD_MEM_TILE] "DMA_S2MM_SEL0_FINISHED_BD_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL1_FINISHED_BD_MEM_TILE] "DMA_S2MM_SEL1_FINISHED_BD_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL0_FINISHED_BD_MEM_TILE] "DMA_MM2S_SEL0_FINISHED_BD_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL1_FINISHED_BD_MEM_TILE] "DMA_MM2S_SEL1_FINISHED_BD_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL0_FINISHED_TASK_MEM_TILE] "DMA_S2MM_SEL0_FINISHED_TASK_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL1_FINISHED_TASK_MEM_TILE] "DMA_S2MM_SEL1_FINISHED_TASK_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL0_FINISHED_TASK_MEM_TILE] "DMA_MM2S_SEL0_FINISHED_TASK_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL1_FINISHED_TASK_MEM_TILE] "DMA_MM2S_SEL1_FINISHED_TASK_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE] "DMA_S2MM_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE] "DMA_S2MM_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE] "DMA_MM2S_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE] "DMA_MM2S_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL0_STREAM_STARVATION_MEM_TILE] "DMA_S2MM_SEL0_STREAM_STARVATION_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL1_STREAM_STARVATION_MEM_TILE] "DMA_S2MM_SEL1_STREAM_STARVATION_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL0_STREAM_BACKPRESSURE_MEM_TILE] "DMA_MM2S_SEL0_STREAM_BACKPRESSURE_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL1_STREAM_BACKPRESSURE_MEM_TILE] "DMA_MM2S_SEL1_STREAM_BACKPRESSURE_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL0_MEMORY_BACKPRESSURE_MEM_TILE] "DMA_S2MM_SEL0_MEMORY_BACKPRESSURE_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_SEL1_MEMORY_BACKPRESSURE_MEM_TILE] "DMA_S2MM_SEL1_MEMORY_BACKPRESSURE_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL0_MEMORY_STARVATION_MEM_TILE] "DMA_MM2S_SEL0_MEMORY_STARVATION_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_SEL1_MEMORY_STARVATION_MEM_TILE] "DMA_MM2S_SEL1_MEMORY_STARVATION_MEM_TILE", - [XAIE_EVENT_GROUP_LOCK_MEM_TILE] "GROUP_LOCK_MEM_TILE", - [XAIE_EVENT_LOCK_SEL0_ACQ_EQ_MEM_TILE] "LOCK_SEL0_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL0_ACQ_GE_MEM_TILE] "LOCK_SEL0_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL0_REL_MEM_TILE] "LOCK_SEL0_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL0_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL0_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL1_ACQ_EQ_MEM_TILE] "LOCK_SEL1_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL1_ACQ_GE_MEM_TILE] "LOCK_SEL1_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL1_REL_MEM_TILE] "LOCK_SEL1_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL1_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL1_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL2_ACQ_EQ_MEM_TILE] "LOCK_SEL2_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL2_ACQ_GE_MEM_TILE] "LOCK_SEL2_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL2_REL_MEM_TILE] "LOCK_SEL2_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL2_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL2_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL3_ACQ_EQ_MEM_TILE] "LOCK_SEL3_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL3_ACQ_GE_MEM_TILE] "LOCK_SEL3_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL3_REL_MEM_TILE] "LOCK_SEL3_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL3_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL3_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL4_ACQ_EQ_MEM_TILE] "LOCK_SEL4_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL4_ACQ_GE_MEM_TILE] "LOCK_SEL4_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL4_REL_MEM_TILE] "LOCK_SEL4_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL4_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL4_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL5_ACQ_EQ_MEM_TILE] "LOCK_SEL5_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL5_ACQ_GE_MEM_TILE] "LOCK_SEL5_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL5_REL_MEM_TILE] "LOCK_SEL5_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL5_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL5_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL6_ACQ_EQ_MEM_TILE] "LOCK_SEL6_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL6_ACQ_GE_MEM_TILE] "LOCK_SEL6_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL6_REL_MEM_TILE] "LOCK_SEL6_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL6_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL6_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL7_ACQ_EQ_MEM_TILE] "LOCK_SEL7_ACQ_EQ_MEM_TILE", - [XAIE_EVENT_LOCK_SEL7_ACQ_GE_MEM_TILE] "LOCK_SEL7_ACQ_GE_MEM_TILE", - [XAIE_EVENT_LOCK_SEL7_REL_MEM_TILE] "LOCK_SEL7_REL_MEM_TILE", - [XAIE_EVENT_LOCK_SEL7_EQUAL_TO_VALUE_MEM_TILE] "LOCK_SEL7_EQUAL_TO_VALUE_MEM_TILE", - [XAIE_EVENT_GROUP_STREAM_SWITCH_MEM_TILE] "GROUP_STREAM_SWITCH_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_0_MEM_TILE] "PORT_IDLE_0_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_0_MEM_TILE] "PORT_RUNNING_0_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_0_MEM_TILE] "PORT_STALLED_0_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_0_MEM_TILE] "PORT_TLAST_0_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_1_MEM_TILE] "PORT_IDLE_1_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_1_MEM_TILE] "PORT_RUNNING_1_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_1_MEM_TILE] "PORT_STALLED_1_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_1_MEM_TILE] "PORT_TLAST_1_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_2_MEM_TILE] "PORT_IDLE_2_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_2_MEM_TILE] "PORT_RUNNING_2_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_2_MEM_TILE] "PORT_STALLED_2_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_2_MEM_TILE] "PORT_TLAST_2_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_3_MEM_TILE] "PORT_IDLE_3_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_3_MEM_TILE] "PORT_RUNNING_3_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_3_MEM_TILE] "PORT_STALLED_3_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_3_MEM_TILE] "PORT_TLAST_3_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_4_MEM_TILE] "PORT_IDLE_4_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_4_MEM_TILE] "PORT_RUNNING_4_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_4_MEM_TILE] "PORT_STALLED_4_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_4_MEM_TILE] "PORT_TLAST_4_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_5_MEM_TILE] "PORT_IDLE_5_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_5_MEM_TILE] "PORT_RUNNING_5_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_5_MEM_TILE] "PORT_STALLED_5_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_5_MEM_TILE] "PORT_TLAST_5_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_6_MEM_TILE] "PORT_IDLE_6_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_6_MEM_TILE] "PORT_RUNNING_6_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_6_MEM_TILE] "PORT_STALLED_6_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_6_MEM_TILE] "PORT_TLAST_6_MEM_TILE", - [XAIE_EVENT_PORT_IDLE_7_MEM_TILE] "PORT_IDLE_7_MEM_TILE", - [XAIE_EVENT_PORT_RUNNING_7_MEM_TILE] "PORT_RUNNING_7_MEM_TILE", - [XAIE_EVENT_PORT_STALLED_7_MEM_TILE] "PORT_STALLED_7_MEM_TILE", - [XAIE_EVENT_PORT_TLAST_7_MEM_TILE] "PORT_TLAST_7_MEM_TILE", - [XAIE_EVENT_GROUP_MEMORY_CONFLICT_MEM_TILE] "GROUP_MEMORY_CONFLICT_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_0_MEM_TILE] "CONFLICT_DM_BANK_0_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_1_MEM_TILE] "CONFLICT_DM_BANK_1_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_2_MEM_TILE] "CONFLICT_DM_BANK_2_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_3_MEM_TILE] "CONFLICT_DM_BANK_3_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_4_MEM_TILE] "CONFLICT_DM_BANK_4_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_5_MEM_TILE] "CONFLICT_DM_BANK_5_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_6_MEM_TILE] "CONFLICT_DM_BANK_6_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_7_MEM_TILE] "CONFLICT_DM_BANK_7_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_8_MEM_TILE] "CONFLICT_DM_BANK_8_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_9_MEM_TILE] "CONFLICT_DM_BANK_9_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_10_MEM_TILE] "CONFLICT_DM_BANK_10_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_11_MEM_TILE] "CONFLICT_DM_BANK_11_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_12_MEM_TILE] "CONFLICT_DM_BANK_12_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_13_MEM_TILE] "CONFLICT_DM_BANK_13_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_14_MEM_TILE] "CONFLICT_DM_BANK_14_MEM_TILE", - [XAIE_EVENT_CONFLICT_DM_BANK_15_MEM_TILE] "CONFLICT_DM_BANK_15_MEM_TILE", - [XAIE_EVENT_GROUP_ERRORS_MEM_TILE] "GROUP_ERRORS_MEM_TILE", - [XAIE_EVENT_DM_ECC_ERROR_SCRUB_CORRECTED_MEM_TILE] "DM_ECC_ERROR_SCRUB_CORRECTED_MEM_TILE", - [XAIE_EVENT_DM_ECC_ERROR_SCRUB_2BIT_MEM_TILE] "DM_ECC_ERROR_SCRUB_2BIT_MEM_TILE", - [XAIE_EVENT_DM_ECC_ERROR_1BIT_MEM_TILE] "DM_ECC_ERROR_1BIT_MEM_TILE", - [XAIE_EVENT_DM_ECC_ERROR_2BIT_MEM_TILE] "DM_ECC_ERROR_2BIT_MEM_TILE", - [XAIE_EVENT_DMA_S2MM_ERROR_MEM_TILE] "DMA_S2MM_ERROR_MEM_TILE", - [XAIE_EVENT_DMA_MM2S_ERROR_MEM_TILE] "DMA_MM2S_ERROR_MEM_TILE", - [XAIE_EVENT_STREAM_SWITCH_PARITY_ERROR_MEM_TILE] "STREAM_SWITCH_PARITY_ERROR_MEM_TILE", - [XAIE_EVENT_STREAM_PKT_ERROR_MEM_TILE] "STREAM_PKT_ERROR_MEM_TILE", - [XAIE_EVENT_CONTROL_PKT_ERROR_MEM_TILE] "CONTROL_PKT_ERROR_MEM_TILE", - [XAIE_EVENT_AXI_MM_SLAVE_ERROR_MEM_TILE] "AXI_MM_SLAVE_ERROR_MEM_TILE", - [XAIE_EVENT_LOCK_ERROR_MEM_TILE] "LOCK_ERROR_MEM_TILE", - [XAIE_EVENT_DMA_TASK_TOKEN_STALL_MEM_TILE] "DMA_TASK_TOKEN_STALL_MEM_TILE", - [XAIE_EVENT_GROUP_BROADCAST_MEM_TILE] "GROUP_BROADCAST_MEM_TILE", - [XAIE_EVENT_BROADCAST_0_MEM_TILE] "BROADCAST_0_MEM_TILE", - [XAIE_EVENT_BROADCAST_1_MEM_TILE] "BROADCAST_1_MEM_TILE", - [XAIE_EVENT_BROADCAST_2_MEM_TILE] "BROADCAST_2_MEM_TILE", - [XAIE_EVENT_BROADCAST_3_MEM_TILE] "BROADCAST_3_MEM_TILE", - [XAIE_EVENT_BROADCAST_4_MEM_TILE] "BROADCAST_4_MEM_TILE", - [XAIE_EVENT_BROADCAST_5_MEM_TILE] "BROADCAST_5_MEM_TILE", - [XAIE_EVENT_BROADCAST_6_MEM_TILE] "BROADCAST_6_MEM_TILE", - [XAIE_EVENT_BROADCAST_7_MEM_TILE] "BROADCAST_7_MEM_TILE", - [XAIE_EVENT_BROADCAST_8_MEM_TILE] "BROADCAST_8_MEM_TILE", - [XAIE_EVENT_BROADCAST_9_MEM_TILE] "BROADCAST_9_MEM_TILE", - [XAIE_EVENT_BROADCAST_10_MEM_TILE] "BROADCAST_10_MEM_TILE", - [XAIE_EVENT_BROADCAST_11_MEM_TILE] "BROADCAST_11_MEM_TILE", - [XAIE_EVENT_BROADCAST_12_MEM_TILE] "BROADCAST_12_MEM_TILE", - [XAIE_EVENT_BROADCAST_13_MEM_TILE] "BROADCAST_13_MEM_TILE", - [XAIE_EVENT_BROADCAST_14_MEM_TILE] "BROADCAST_14_MEM_TILE", - [XAIE_EVENT_BROADCAST_15_MEM_TILE] "BROADCAST_15_MEM_TILE", - [XAIE_EVENT_GROUP_USER_EVENT_MEM_TILE] "GROUP_USER_EVENT_MEM_TILE", - [XAIE_EVENT_USER_EVENT_0_MEM_TILE] "USER_EVENT_0_MEM_TILE", - [XAIE_EVENT_USER_EVENT_1_MEM_TILE] "USER_EVENT_1_MEM_TILE", + [XAIE_EVENT_NONE_MEM_TILE] = "NONE_MEM_TILE", + [XAIE_EVENT_TRUE_MEM_TILE] = "TRUE_MEM_TILE", + [XAIE_EVENT_GROUP_0_MEM_TILE] = "GROUP_0_MEM_TILE", + [XAIE_EVENT_TIMER_SYNC_MEM_TILE] = "TIMER_SYNC_MEM_TILE", + [XAIE_EVENT_TIMER_VALUE_REACHED_MEM_TILE] = "TIMER_VALUE_REACHED_MEM_TILE", + [XAIE_EVENT_PERF_CNT0_EVENT_MEM_TILE] = "PERF_CNT0_EVENT_MEM_TILE", + [XAIE_EVENT_PERF_CNT1_EVENT_MEM_TILE] = "PERF_CNT1_EVENT_MEM_TILE", + [XAIE_EVENT_PERF_CNT2_EVENT_MEM_TILE] = "PERF_CNT2_EVENT_MEM_TILE", + [XAIE_EVENT_PERF_CNT3_EVENT_MEM_TILE] = "PERF_CNT3_EVENT_MEM_TILE", + [XAIE_EVENT_COMBO_EVENT_0_MEM_TILE] = "COMBO_EVENT_0_MEM_TILE", + [XAIE_EVENT_COMBO_EVENT_1_MEM_TILE] = "COMBO_EVENT_1_MEM_TILE", + [XAIE_EVENT_COMBO_EVENT_2_MEM_TILE] = "COMBO_EVENT_2_MEM_TILE", + [XAIE_EVENT_COMBO_EVENT_3_MEM_TILE] = "COMBO_EVENT_3_MEM_TILE", + [XAIE_EVENT_EDGE_DETECTION_EVENT_0_MEM_TILE] = "EDGE_DETECTION_EVENT_0_MEM_TILE", + [XAIE_EVENT_EDGE_DETECTION_EVENT_1_MEM_TILE] = "EDGE_DETECTION_EVENT_1_MEM_TILE", + [XAIE_EVENT_GROUP_WATCHPOINT_MEM_TILE] = "GROUP_WATCHPOINT_MEM_TILE", + [XAIE_EVENT_WATCHPOINT_0_MEM_TILE] = "WATCHPOINT_0_MEM_TILE", + [XAIE_EVENT_WATCHPOINT_1_MEM_TILE] = "WATCHPOINT_1_MEM_TILE", + [XAIE_EVENT_WATCHPOINT_2_MEM_TILE] = "WATCHPOINT_2_MEM_TILE", + [XAIE_EVENT_WATCHPOINT_3_MEM_TILE] = "WATCHPOINT_3_MEM_TILE", + [XAIE_EVENT_GROUP_DMA_ACTIVITY_MEM_TILE] = "GROUP_DMA_ACTIVITY_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL0_START_TASK_MEM_TILE] = "DMA_S2MM_SEL0_START_TASK_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL1_START_TASK_MEM_TILE] = "DMA_S2MM_SEL1_START_TASK_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL0_START_TASK_MEM_TILE] = "DMA_MM2S_SEL0_START_TASK_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL1_START_TASK_MEM_TILE] = "DMA_MM2S_SEL1_START_TASK_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL0_FINISHED_BD_MEM_TILE] = "DMA_S2MM_SEL0_FINISHED_BD_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL1_FINISHED_BD_MEM_TILE] = "DMA_S2MM_SEL1_FINISHED_BD_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL0_FINISHED_BD_MEM_TILE] = "DMA_MM2S_SEL0_FINISHED_BD_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL1_FINISHED_BD_MEM_TILE] = "DMA_MM2S_SEL1_FINISHED_BD_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL0_FINISHED_TASK_MEM_TILE] = "DMA_S2MM_SEL0_FINISHED_TASK_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL1_FINISHED_TASK_MEM_TILE] = "DMA_S2MM_SEL1_FINISHED_TASK_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL0_FINISHED_TASK_MEM_TILE] = "DMA_MM2S_SEL0_FINISHED_TASK_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL1_FINISHED_TASK_MEM_TILE] = "DMA_MM2S_SEL1_FINISHED_TASK_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE] = "DMA_S2MM_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE] = "DMA_S2MM_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE] = "DMA_MM2S_SEL0_STALLED_LOCK_ACQUIRE_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE] = "DMA_MM2S_SEL1_STALLED_LOCK_ACQUIRE_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL0_STREAM_STARVATION_MEM_TILE] = "DMA_S2MM_SEL0_STREAM_STARVATION_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL1_STREAM_STARVATION_MEM_TILE] = "DMA_S2MM_SEL1_STREAM_STARVATION_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL0_STREAM_BACKPRESSURE_MEM_TILE] = "DMA_MM2S_SEL0_STREAM_BACKPRESSURE_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL1_STREAM_BACKPRESSURE_MEM_TILE] = "DMA_MM2S_SEL1_STREAM_BACKPRESSURE_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL0_MEMORY_BACKPRESSURE_MEM_TILE] = "DMA_S2MM_SEL0_MEMORY_BACKPRESSURE_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_SEL1_MEMORY_BACKPRESSURE_MEM_TILE] = "DMA_S2MM_SEL1_MEMORY_BACKPRESSURE_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL0_MEMORY_STARVATION_MEM_TILE] = "DMA_MM2S_SEL0_MEMORY_STARVATION_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_SEL1_MEMORY_STARVATION_MEM_TILE] = "DMA_MM2S_SEL1_MEMORY_STARVATION_MEM_TILE", + [XAIE_EVENT_GROUP_LOCK_MEM_TILE] = "GROUP_LOCK_MEM_TILE", + [XAIE_EVENT_LOCK_SEL0_ACQ_EQ_MEM_TILE] = "LOCK_SEL0_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL0_ACQ_GE_MEM_TILE] = "LOCK_SEL0_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL0_REL_MEM_TILE] = "LOCK_SEL0_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL0_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL0_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL1_ACQ_EQ_MEM_TILE] = "LOCK_SEL1_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL1_ACQ_GE_MEM_TILE] = "LOCK_SEL1_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL1_REL_MEM_TILE] = "LOCK_SEL1_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL1_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL1_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL2_ACQ_EQ_MEM_TILE] = "LOCK_SEL2_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL2_ACQ_GE_MEM_TILE] = "LOCK_SEL2_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL2_REL_MEM_TILE] = "LOCK_SEL2_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL2_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL2_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL3_ACQ_EQ_MEM_TILE] = "LOCK_SEL3_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL3_ACQ_GE_MEM_TILE] = "LOCK_SEL3_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL3_REL_MEM_TILE] = "LOCK_SEL3_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL3_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL3_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL4_ACQ_EQ_MEM_TILE] = "LOCK_SEL4_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL4_ACQ_GE_MEM_TILE] = "LOCK_SEL4_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL4_REL_MEM_TILE] = "LOCK_SEL4_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL4_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL4_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL5_ACQ_EQ_MEM_TILE] = "LOCK_SEL5_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL5_ACQ_GE_MEM_TILE] = "LOCK_SEL5_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL5_REL_MEM_TILE] = "LOCK_SEL5_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL5_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL5_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL6_ACQ_EQ_MEM_TILE] = "LOCK_SEL6_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL6_ACQ_GE_MEM_TILE] = "LOCK_SEL6_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL6_REL_MEM_TILE] = "LOCK_SEL6_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL6_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL6_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL7_ACQ_EQ_MEM_TILE] = "LOCK_SEL7_ACQ_EQ_MEM_TILE", + [XAIE_EVENT_LOCK_SEL7_ACQ_GE_MEM_TILE] = "LOCK_SEL7_ACQ_GE_MEM_TILE", + [XAIE_EVENT_LOCK_SEL7_REL_MEM_TILE] = "LOCK_SEL7_REL_MEM_TILE", + [XAIE_EVENT_LOCK_SEL7_EQUAL_TO_VALUE_MEM_TILE] = "LOCK_SEL7_EQUAL_TO_VALUE_MEM_TILE", + [XAIE_EVENT_GROUP_STREAM_SWITCH_MEM_TILE] = "GROUP_STREAM_SWITCH_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_0_MEM_TILE] = "PORT_IDLE_0_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_0_MEM_TILE] = "PORT_RUNNING_0_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_0_MEM_TILE] = "PORT_STALLED_0_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_0_MEM_TILE] = "PORT_TLAST_0_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_1_MEM_TILE] = "PORT_IDLE_1_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_1_MEM_TILE] = "PORT_RUNNING_1_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_1_MEM_TILE] = "PORT_STALLED_1_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_1_MEM_TILE] = "PORT_TLAST_1_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_2_MEM_TILE] = "PORT_IDLE_2_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_2_MEM_TILE] = "PORT_RUNNING_2_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_2_MEM_TILE] = "PORT_STALLED_2_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_2_MEM_TILE] = "PORT_TLAST_2_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_3_MEM_TILE] = "PORT_IDLE_3_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_3_MEM_TILE] = "PORT_RUNNING_3_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_3_MEM_TILE] = "PORT_STALLED_3_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_3_MEM_TILE] = "PORT_TLAST_3_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_4_MEM_TILE] = "PORT_IDLE_4_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_4_MEM_TILE] = "PORT_RUNNING_4_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_4_MEM_TILE] = "PORT_STALLED_4_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_4_MEM_TILE] = "PORT_TLAST_4_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_5_MEM_TILE] = "PORT_IDLE_5_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_5_MEM_TILE] = "PORT_RUNNING_5_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_5_MEM_TILE] = "PORT_STALLED_5_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_5_MEM_TILE] = "PORT_TLAST_5_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_6_MEM_TILE] = "PORT_IDLE_6_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_6_MEM_TILE] = "PORT_RUNNING_6_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_6_MEM_TILE] = "PORT_STALLED_6_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_6_MEM_TILE] = "PORT_TLAST_6_MEM_TILE", + [XAIE_EVENT_PORT_IDLE_7_MEM_TILE] = "PORT_IDLE_7_MEM_TILE", + [XAIE_EVENT_PORT_RUNNING_7_MEM_TILE] = "PORT_RUNNING_7_MEM_TILE", + [XAIE_EVENT_PORT_STALLED_7_MEM_TILE] = "PORT_STALLED_7_MEM_TILE", + [XAIE_EVENT_PORT_TLAST_7_MEM_TILE] = "PORT_TLAST_7_MEM_TILE", + [XAIE_EVENT_GROUP_MEMORY_CONFLICT_MEM_TILE] = "GROUP_MEMORY_CONFLICT_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_0_MEM_TILE] = "CONFLICT_DM_BANK_0_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_1_MEM_TILE] = "CONFLICT_DM_BANK_1_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_2_MEM_TILE] = "CONFLICT_DM_BANK_2_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_3_MEM_TILE] = "CONFLICT_DM_BANK_3_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_4_MEM_TILE] = "CONFLICT_DM_BANK_4_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_5_MEM_TILE] = "CONFLICT_DM_BANK_5_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_6_MEM_TILE] = "CONFLICT_DM_BANK_6_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_7_MEM_TILE] = "CONFLICT_DM_BANK_7_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_8_MEM_TILE] = "CONFLICT_DM_BANK_8_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_9_MEM_TILE] = "CONFLICT_DM_BANK_9_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_10_MEM_TILE] = "CONFLICT_DM_BANK_10_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_11_MEM_TILE] = "CONFLICT_DM_BANK_11_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_12_MEM_TILE] = "CONFLICT_DM_BANK_12_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_13_MEM_TILE] = "CONFLICT_DM_BANK_13_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_14_MEM_TILE] = "CONFLICT_DM_BANK_14_MEM_TILE", + [XAIE_EVENT_CONFLICT_DM_BANK_15_MEM_TILE] = "CONFLICT_DM_BANK_15_MEM_TILE", + [XAIE_EVENT_GROUP_ERRORS_MEM_TILE] = "GROUP_ERRORS_MEM_TILE", + [XAIE_EVENT_DM_ECC_ERROR_SCRUB_CORRECTED_MEM_TILE] = "DM_ECC_ERROR_SCRUB_CORRECTED_MEM_TILE", + [XAIE_EVENT_DM_ECC_ERROR_SCRUB_2BIT_MEM_TILE] = "DM_ECC_ERROR_SCRUB_2BIT_MEM_TILE", + [XAIE_EVENT_DM_ECC_ERROR_1BIT_MEM_TILE] = "DM_ECC_ERROR_1BIT_MEM_TILE", + [XAIE_EVENT_DM_ECC_ERROR_2BIT_MEM_TILE] = "DM_ECC_ERROR_2BIT_MEM_TILE", + [XAIE_EVENT_DMA_S2MM_ERROR_MEM_TILE] = "DMA_S2MM_ERROR_MEM_TILE", + [XAIE_EVENT_DMA_MM2S_ERROR_MEM_TILE] = "DMA_MM2S_ERROR_MEM_TILE", + [XAIE_EVENT_STREAM_SWITCH_PARITY_ERROR_MEM_TILE] = "STREAM_SWITCH_PARITY_ERROR_MEM_TILE", + [XAIE_EVENT_STREAM_PKT_ERROR_MEM_TILE] = "STREAM_PKT_ERROR_MEM_TILE", + [XAIE_EVENT_CONTROL_PKT_ERROR_MEM_TILE] = "CONTROL_PKT_ERROR_MEM_TILE", + [XAIE_EVENT_AXI_MM_SLAVE_ERROR_MEM_TILE] = "AXI_MM_SLAVE_ERROR_MEM_TILE", + [XAIE_EVENT_LOCK_ERROR_MEM_TILE] = "LOCK_ERROR_MEM_TILE", + [XAIE_EVENT_DMA_TASK_TOKEN_STALL_MEM_TILE] = "DMA_TASK_TOKEN_STALL_MEM_TILE", + [XAIE_EVENT_GROUP_BROADCAST_MEM_TILE] = "GROUP_BROADCAST_MEM_TILE", + [XAIE_EVENT_BROADCAST_0_MEM_TILE] = "BROADCAST_0_MEM_TILE", + [XAIE_EVENT_BROADCAST_1_MEM_TILE] = "BROADCAST_1_MEM_TILE", + [XAIE_EVENT_BROADCAST_2_MEM_TILE] = "BROADCAST_2_MEM_TILE", + [XAIE_EVENT_BROADCAST_3_MEM_TILE] = "BROADCAST_3_MEM_TILE", + [XAIE_EVENT_BROADCAST_4_MEM_TILE] = "BROADCAST_4_MEM_TILE", + [XAIE_EVENT_BROADCAST_5_MEM_TILE] = "BROADCAST_5_MEM_TILE", + [XAIE_EVENT_BROADCAST_6_MEM_TILE] = "BROADCAST_6_MEM_TILE", + [XAIE_EVENT_BROADCAST_7_MEM_TILE] = "BROADCAST_7_MEM_TILE", + [XAIE_EVENT_BROADCAST_8_MEM_TILE] = "BROADCAST_8_MEM_TILE", + [XAIE_EVENT_BROADCAST_9_MEM_TILE] = "BROADCAST_9_MEM_TILE", + [XAIE_EVENT_BROADCAST_10_MEM_TILE] = "BROADCAST_10_MEM_TILE", + [XAIE_EVENT_BROADCAST_11_MEM_TILE] = "BROADCAST_11_MEM_TILE", + [XAIE_EVENT_BROADCAST_12_MEM_TILE] = "BROADCAST_12_MEM_TILE", + [XAIE_EVENT_BROADCAST_13_MEM_TILE] = "BROADCAST_13_MEM_TILE", + [XAIE_EVENT_BROADCAST_14_MEM_TILE] = "BROADCAST_14_MEM_TILE", + [XAIE_EVENT_BROADCAST_15_MEM_TILE] = "BROADCAST_15_MEM_TILE", + [XAIE_EVENT_GROUP_USER_EVENT_MEM_TILE] = "GROUP_USER_EVENT_MEM_TILE", + [XAIE_EVENT_USER_EVENT_0_MEM_TILE] = "USER_EVENT_0_MEM_TILE", + [XAIE_EVENT_USER_EVENT_1_MEM_TILE] = "USER_EVENT_1_MEM_TILE", }; /**************************** Function Definitions *******************************/ diff --git a/driver/src/util/xaie_util_status.c b/driver/src/util/xaie_util_status.c index 836557f6..adf89773 100644 --- a/driver/src/util/xaie_util_status.c +++ b/driver/src/util/xaie_util_status.c @@ -34,64 +34,64 @@ /**************************** Variable Definitions *******************************/ static const char* XAie_CoreStatus_Strings[] = { - [XAIE_CORE_STATUS_ENABLE_BIT] "Enable", - [XAIE_CORE_STATUS_RESET_BIT] "Reset", - [XAIE_CORE_STATUS_MEM_STALL_S_BIT] "Memory_Stall_S", - [XAIE_CORE_STATUS_MEM_STALL_W_BIT] "Memory_Stall_W", - [XAIE_CORE_STATUS_MEM_STALL_N_BIT] "Memory_Stall_N", - [XAIE_CORE_STATUS_MEM_STALL_E_BIT] "Memory_Stall_E", - [XAIE_CORE_STATUS_LOCK_STALL_S_BIT] "Lock_Stall_S", - [XAIE_CORE_STATUS_LOCK_STALL_W_BIT] "Lock_Stall_W", - [XAIE_CORE_STATUS_LOCK_STALL_N_BIT] "Lock_Stall_N", - [XAIE_CORE_STATUS_LOCK_STALL_E_BIT] "Lock_Stall_E", - [XAIE_CORE_STATUS_STREAM_STALL_SS0_BIT] "Stream_Stall_SSO", - [XAIE_CORE_STATUS_STREAM_STALL_MS0_BIT] "Stream_Stall_MSO", - [XAIE_CORE_STATUS_CASCADE_STALL_SCD_BIT] "Cascade_Stall_SCD", - [XAIE_CORE_STATUS_CASCADE_STALL_MCD_BIT] "Cascade_Stall_MCD", - [XAIE_CORE_STATUS_DEBUG_HALT_BIT] "Debug_Halt", - [XAIE_CORE_STATUS_ECC_ERROR_STALL_BIT] "ECC_Error_Stall", - [XAIE_CORE_STATUS_ECC_SCRUBBING_STALL_BIT] "ECC_Scrubbing_Stall", - [XAIE_CORE_STATUS_ERROR_HALT_BIT] "Error_Halt", - [XAIE_CORE_STATUS_DONE_BIT] "Core_Done", - [XAIE_CORE_STATUS_PROCESSOR_BUS_STALL_BIT] "Core_Proc_Bus_Stall", + [XAIE_CORE_STATUS_ENABLE_BIT] = "Enable", + [XAIE_CORE_STATUS_RESET_BIT] = "Reset", + [XAIE_CORE_STATUS_MEM_STALL_S_BIT] = "Memory_Stall_S", + [XAIE_CORE_STATUS_MEM_STALL_W_BIT] = "Memory_Stall_W", + [XAIE_CORE_STATUS_MEM_STALL_N_BIT] = "Memory_Stall_N", + [XAIE_CORE_STATUS_MEM_STALL_E_BIT] = "Memory_Stall_E", + [XAIE_CORE_STATUS_LOCK_STALL_S_BIT] = "Lock_Stall_S", + [XAIE_CORE_STATUS_LOCK_STALL_W_BIT] = "Lock_Stall_W", + [XAIE_CORE_STATUS_LOCK_STALL_N_BIT] = "Lock_Stall_N", + [XAIE_CORE_STATUS_LOCK_STALL_E_BIT] = "Lock_Stall_E", + [XAIE_CORE_STATUS_STREAM_STALL_SS0_BIT] = "Stream_Stall_SSO", + [XAIE_CORE_STATUS_STREAM_STALL_MS0_BIT] = "Stream_Stall_MSO", + [XAIE_CORE_STATUS_CASCADE_STALL_SCD_BIT] = "Cascade_Stall_SCD", + [XAIE_CORE_STATUS_CASCADE_STALL_MCD_BIT] = "Cascade_Stall_MCD", + [XAIE_CORE_STATUS_DEBUG_HALT_BIT] = "Debug_Halt", + [XAIE_CORE_STATUS_ECC_ERROR_STALL_BIT] = "ECC_Error_Stall", + [XAIE_CORE_STATUS_ECC_SCRUBBING_STALL_BIT] = "ECC_Scrubbing_Stall", + [XAIE_CORE_STATUS_ERROR_HALT_BIT] = "Error_Halt", + [XAIE_CORE_STATUS_DONE_BIT] = "Core_Done", + [XAIE_CORE_STATUS_PROCESSOR_BUS_STALL_BIT] = "Core_Proc_Bus_Stall", }; static const char* XAie_DmaS2MMStatus_Strings[] = { - [XAIE_DMA_STATUS_S2MM_STATUS] "Status", - [XAIE_DMA_STATUS_S2MM_STALLED_LOCK_ACK] "Stalled_Lock_Acq", - [XAIE_DMA_STATUS_S2MM_STALLED_LOCK_REL] "Stalled_Lock_Rel", - [XAIE_DMA_STATUS_S2MM_STALLED_STREAM_STARVATION] "Stalled_Stream_Starvation", - [XAIE_DMA_STATUS_S2MM_STALLED_TCT_OR_COUNT_FIFO_FULL] "Stalled_TCT_Or_Count_FIFO_Full", - [XAIE_DMA_STATUS_S2MM_ERROR_LOCK_ACCESS_TO_UNAVAIL] "Error_Lock_Access_Unavail", - [XAIE_DMA_STATUS_S2MM_ERROR_DM_ACCESS_TO_UNAVAIL] "Error_DM_Access_Unavail", - [XAIE_DMA_STATUS_S2MM_ERROR_BD_UNAVAIL] "Error_BD_Unavail", - [XAIE_DMA_STATUS_S2MM_ERROR_BD_INVALID] "Error_BD_Invalid", - [XAIE_DMA_STATUS_S2MM_ERROR_FOT_LENGTH] "Error_FoT_Length", - [XAIE_DMA_STATUS_S2MM_ERROR_FOT_BDS_PER_TASK] "Error_Fot_BDs", - [XAIE_DMA_STATUS_S2MM_AXI_MM_DECODE_ERROR] "AXI-MM_decode_error", - [XAIE_DMA_STATUS_S2MM_AXI_MM_SLAVE_ERROR] "AXI-MM_slave_error", - [XAIE_DMA_STATUS_S2MM_TASK_QUEUE_OVERFLOW] "Task_Queue_Overflow", - [XAIE_DMA_STATUS_S2MM_CHANNEL_RUNNING] "Channel_Running", - [XAIE_DMA_STATUS_S2MM_TASK_QUEUE_SIZE] "Task_Queue_Size", - [XAIE_DMA_STATUS_S2MM_CURRENT_BD] "Cur_BD", + [XAIE_DMA_STATUS_S2MM_STATUS] = "Status", + [XAIE_DMA_STATUS_S2MM_STALLED_LOCK_ACK] = "Stalled_Lock_Acq", + [XAIE_DMA_STATUS_S2MM_STALLED_LOCK_REL] = "Stalled_Lock_Rel", + [XAIE_DMA_STATUS_S2MM_STALLED_STREAM_STARVATION] = "Stalled_Stream_Starvation", + [XAIE_DMA_STATUS_S2MM_STALLED_TCT_OR_COUNT_FIFO_FULL] = "Stalled_TCT_Or_Count_FIFO_Full", + [XAIE_DMA_STATUS_S2MM_ERROR_LOCK_ACCESS_TO_UNAVAIL] = "Error_Lock_Access_Unavail", + [XAIE_DMA_STATUS_S2MM_ERROR_DM_ACCESS_TO_UNAVAIL] = "Error_DM_Access_Unavail", + [XAIE_DMA_STATUS_S2MM_ERROR_BD_UNAVAIL] = "Error_BD_Unavail", + [XAIE_DMA_STATUS_S2MM_ERROR_BD_INVALID] = "Error_BD_Invalid", + [XAIE_DMA_STATUS_S2MM_ERROR_FOT_LENGTH] = "Error_FoT_Length", + [XAIE_DMA_STATUS_S2MM_ERROR_FOT_BDS_PER_TASK] = "Error_Fot_BDs", + [XAIE_DMA_STATUS_S2MM_AXI_MM_DECODE_ERROR] = "AXI-MM_decode_error", + [XAIE_DMA_STATUS_S2MM_AXI_MM_SLAVE_ERROR] = "AXI-MM_slave_error", + [XAIE_DMA_STATUS_S2MM_TASK_QUEUE_OVERFLOW] = "Task_Queue_Overflow", + [XAIE_DMA_STATUS_S2MM_CHANNEL_RUNNING] = "Channel_Running", + [XAIE_DMA_STATUS_S2MM_TASK_QUEUE_SIZE] = "Task_Queue_Size", + [XAIE_DMA_STATUS_S2MM_CURRENT_BD] = "Cur_BD", }; static const char* XAie_DmaMM2SStatus_Strings[] = { - [XAIE_DMA_STATUS_MM2S_STATUS] "Status", - [XAIE_DMA_STATUS_MM2S_STALLED_LOCK_ACK] "Stalled_Lock_Acq", - [XAIE_DMA_STATUS_MM2S_STALLED_LOCK_REL] "Stalled_Lock_Rel", - [XAIE_DMA_STATUS_MM2S_STALLED_STREAM_BACKPRESSURE] "Stalled_Stream_Back_Pressure", - [XAIE_DMA_STATUS_MM2S_STALLED_TCT] "Stalled_TCT", - [XAIE_DMA_STATUS_MM2S_ERROR_LOCK_ACCESS_TO_UNAVAIL] "Error_Lock_Access_Unavail", - [XAIE_DMA_STATUS_MM2S_ERROR_DM_ACCESS_TO_UNAVAIL] "Error_DM_Access_Unavail", - [XAIE_DMA_STATUS_MM2S_ERROR_BD_UNAVAIL] "Error_BD_Unavail", - [XAIE_DMA_STATUS_MM2S_ERROR_BD_INVALID] "Error_BD_Invalid", - [XAIE_DMA_STATUS_MM2S_AXI_MM_DECODE_ERROR] "AXI-MM_decode_error", - [XAIE_DMA_STATUS_MM2S_AXI_MM_SLAVE_ERROR] "AXI-MM_slave_error", - [XAIE_DMA_STATUS_MM2S_TASK_QUEUE_OVERFLOW] "Task_Queue_Overflow", - [XAIE_DMA_STATUS_MM2S_CHANNEL_RUNNING] "Channel_Running", - [XAIE_DMA_STATUS_MM2S_TASK_QUEUE_SIZE] "Task_Queue_Size", - [XAIE_DMA_STATUS_MM2S_CURRENT_BD] "Cur_BD", + [XAIE_DMA_STATUS_MM2S_STATUS] = "Status", + [XAIE_DMA_STATUS_MM2S_STALLED_LOCK_ACK] = "Stalled_Lock_Acq", + [XAIE_DMA_STATUS_MM2S_STALLED_LOCK_REL] = "Stalled_Lock_Rel", + [XAIE_DMA_STATUS_MM2S_STALLED_STREAM_BACKPRESSURE] = "Stalled_Stream_Back_Pressure", + [XAIE_DMA_STATUS_MM2S_STALLED_TCT] = "Stalled_TCT", + [XAIE_DMA_STATUS_MM2S_ERROR_LOCK_ACCESS_TO_UNAVAIL] = "Error_Lock_Access_Unavail", + [XAIE_DMA_STATUS_MM2S_ERROR_DM_ACCESS_TO_UNAVAIL] = "Error_DM_Access_Unavail", + [XAIE_DMA_STATUS_MM2S_ERROR_BD_UNAVAIL] = "Error_BD_Unavail", + [XAIE_DMA_STATUS_MM2S_ERROR_BD_INVALID] = "Error_BD_Invalid", + [XAIE_DMA_STATUS_MM2S_AXI_MM_DECODE_ERROR] = "AXI-MM_decode_error", + [XAIE_DMA_STATUS_MM2S_AXI_MM_SLAVE_ERROR] = "AXI-MM_slave_error", + [XAIE_DMA_STATUS_MM2S_TASK_QUEUE_OVERFLOW] = "Task_Queue_Overflow", + [XAIE_DMA_STATUS_MM2S_CHANNEL_RUNNING] = "Channel_Running", + [XAIE_DMA_STATUS_MM2S_TASK_QUEUE_SIZE] = "Task_Queue_Size", + [XAIE_DMA_STATUS_MM2S_CURRENT_BD] = "Cur_BD", };