Verilog Syntax error in jpegdec.

[MasLiang]

Hi,

I'm learning the HLS flow and tried on the case "jpegdec".

When I run the "run_hls.tcl", it can work successfully. However, when I tried to read the verilog code, I found a line confuse me:

in kernel_parser_decoder_udiv_13ns_8ns_13_17_seq_1.v line 67-68, the code is :

if (in0_WIDTH==1) assign comb_tmp = dividend_tmp_mux[0];
else              assign comb_tmp = {remd_tmp_mux[in0_WIDTH-2:0], dividend_tmp_mux[in0_WIDTH-1]};

These two lines are not in any blocks. Is that true? I think this two lines should be in a generate.