DNNAccelerator.md

DNN Accelerator Papers

Taxonomy

• Dataflow

• Multi-DNN

• Bit serial architecture

 

Dataflow

Todo

 

Multi-DNN

Title	Key Words
Heterogeneous Dataflow Accelerators for Multi-DNN Workloads [HPCA’21]

 

Bit serial architecture

Title	Key Words
Stripes: Bit-serial deep neural network computing [MICRO’16]
Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Network [ISCA’18]	Per layer bit width
Term Quantization: Furthering Quantization at Run Time [SC’20]	Leverage the sparsity in bit-serial architecture
Training for Multi-resolution Inference Using Reusable Quantization Terms [ASPLOS’21]	Adaptive bit width based on the SC’20 paper