-
Notifications
You must be signed in to change notification settings - Fork 15
/
orinagx.c
2829 lines (2503 loc) · 75 KB
/
orinagx.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*MIT License
*
*Copyright (c) 2024 Rubberazer
*
*Permission is hereby granted, free of charge, to any person obtaining a copy
*of this software and associated documentation files (the "Software"), to deal
*in the Software without restriction, including without limitation the rights
*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
*copies of the Software, and to permit persons to whom the Software is
*furnished to do so, subject to the following conditions:
*
*The above copyright notice and this permission notice shall be included in all
*copies or substantial portions of the Software.
*
*THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
*AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
*LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
*OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
*SOFTWARE.
*/
/* jetgpio version 2.0 */
/* Orin AGX extension */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <errno.h>
#include <unistd.h>
#include <math.h>
#include <sys/fcntl.h>
#include <sys/mman.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#include <sys/file.h>
#include <sys/types.h>
#include <sys/poll.h>
#include <linux/i2c-dev.h>
#include <linux/i2c.h>
#include <linux/spi/spidev.h>
#include <linux/types.h>
#include <linux/gpio.h>
#include <pthread.h>
#include <linux/version.h>
#include "Jetclocks/jetclocks.h"
#include "jetgpio.h"
#define BILLION 1000000000L
static int fd_GPIO;
static volatile GPIO_CNF_Init pin_CNF;
static volatile GPIO_CNF_Init pin_DEB;
static volatile GPIO_CNF_Init pin_IN;
static volatile GPIO_CNF_Init pin_OUT;
static volatile GPIO_CNF_Init pin_OUT_VLE;
static volatile GPIO_CNF_Init pin_INT_CLR;
static volatile GPIO_CNF_Init pin_MUX;
static volatile GPIO_CNF_Init pin_CFG;
PISRFunc ISRFunc_CFG[41];
static volatile uint32_t *PWM1;
static volatile uint32_t *PWM5;
static volatile uint32_t *PWM8;
static volatile uint32_t PWM1_Init;
static volatile uint32_t PWM5_Init;
static volatile uint32_t PWM8_Init;
static i2cInfo_t i2cInfo[8];
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,14,1)
static int i2c_speed[8];
#endif
static SPIInfo_t SpiInfo[1];
static volatile GPIO_CNFO *pin3;
static volatile GPIO_CNFO *pin5;
static volatile GPIO_CNFO *pin7;
static volatile GPIO_CNFO *pin8;
static volatile GPIO_CNFO *pin10;
static volatile GPIO_CNFO *pin11;
static volatile GPIO_CNFO *pin12;
static volatile GPIO_CNFO *pin13;
static volatile GPIO_CNFO *pin15;
static volatile GPIO_CNFO *pin16;
static volatile GPIO_CNFO *pin18;
static volatile GPIO_CNFO *pin19;
static volatile GPIO_CNFO *pin21;
static volatile GPIO_CNFO *pin22;
static volatile GPIO_CNFO *pin23;
static volatile GPIO_CNFO *pin24;
static volatile GPIO_CNFO *pin26;
static volatile GPIO_CNFO *pin27;
static volatile GPIO_CNFO *pin28;
static volatile GPIO_CNFO *pin29;
static volatile GPIO_CNFO *pin31;
static volatile GPIO_CNFO *pin32;
static volatile GPIO_CNFO *pin33;
static volatile GPIO_CNFO *pin35;
static volatile GPIO_CNFO *pin36;
static volatile GPIO_CNFO *pin37;
static volatile GPIO_CNFO *pin38;
static volatile GPIO_CNFO *pin40;
static volatile uint32_t *pinmux3;
static volatile uint32_t *pinmux5;
static volatile uint32_t *pinmux7;
static volatile uint32_t *pinmux8;
static volatile uint32_t *pinmux10;
static volatile uint32_t *pinmux11;
static volatile uint32_t *pinmux12;
static volatile uint32_t *pinmux13;
static volatile uint32_t *pinmux15;
static volatile uint32_t *pinmux16;
static volatile uint32_t *pinmux18;
static volatile uint32_t *pinmux19;
static volatile uint32_t *pinmux21;
static volatile uint32_t *pinmux22;
static volatile uint32_t *pinmux23;
static volatile uint32_t *pinmux24;
static volatile uint32_t *pinmux26;
static volatile uint32_t *pinmux27;
static volatile uint32_t *pinmux28;
static volatile uint32_t *pinmux29;
static volatile uint32_t *pinmux31;
static volatile uint32_t *pinmux32;
static volatile uint32_t *pinmux33;
static volatile uint32_t *pinmux35;
static volatile uint32_t *pinmux36;
static volatile uint32_t *pinmux37;
static volatile uint32_t *pinmux38;
static volatile uint32_t *pinmux40;
static volatile uint32_t *pincfg3;
static volatile uint32_t *pincfg5;
static volatile uint32_t *pincfg7;
static volatile uint32_t *pincfg8;
static volatile uint32_t *pincfg10;
static volatile uint32_t *pincfg11;
static volatile uint32_t *pincfg12;
static volatile uint32_t *pincfg13;
static volatile uint32_t *pincfg15;
static volatile uint32_t *pincfg16;
static volatile uint32_t *pincfg18;
static volatile uint32_t *pincfg19;
static volatile uint32_t *pincfg21;
static volatile uint32_t *pincfg22;
static volatile uint32_t *pincfg23;
static volatile uint32_t *pincfg24;
static volatile uint32_t *pincfg26;
static volatile uint32_t *pincfg27;
static volatile uint32_t *pincfg28;
static volatile uint32_t *pincfg29;
static volatile uint32_t *pincfg31;
static volatile uint32_t *pincfg32;
static volatile uint32_t *pincfg33;
static volatile uint32_t *pincfg35;
static volatile uint32_t *pincfg36;
static volatile uint32_t *pincfg37;
static volatile uint32_t *pincfg38;
static volatile uint32_t *pincfg40;
static void *baseCNF_AON;
static void *baseCNF_NAON;
static void *basePINMUX_AON;
static void *basePINMUX_AONHV;
static void *basePINMUX_G7;
static void *basePINMUX_G3;
static void *basePINMUX_EDP;
static void *basePINMUX_G4;
static void *basePINMUX_G2;
static void *basePWM1;
static void *basePWM5;
static void *basePWM8;
static unsigned clk_rate_PWM1 = 408000000;
static unsigned clk_rate_PWM5 = 408000000;
static unsigned clk_rate_PWM8 = 408000000;
static volatile unsigned global_int;
static pthread_t callThd[28];
static pthread_attr_t attr;
static int pth_err;
static void *status_thread;
static int thread_n = 0;
static unsigned long long pin_tracker = 0;
int gpioInitialise(void)
{
int status = 1;
// Getting the page size
int pagesize = sysconf(_SC_PAGESIZE);
// read physical memory (needs root)
fd_GPIO = open("/dev/mem", O_RDWR | O_SYNC);
if (fd_GPIO < 0) {
perror("/dev/mem");
fprintf(stderr, "Please run this program as root (for example with sudo)\n");
return -1;
}
// Mapping GPIO_CNF_AON
baseCNF_AON = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_CNF_AON);
if (baseCNF_AON == MAP_FAILED) {
return -2;
}
// Mapping GPIO_CNF_NAON
baseCNF_NAON = mmap(0, 5 * pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_CNF_NAON);
if (baseCNF_NAON == MAP_FAILED) {
return -3;
}
// Mapping PINMUX_AON
basePINMUX_AON = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_AON);
if (basePINMUX_AON == MAP_FAILED) {
return -4;
}
// Mapping PINMUX_AONHV
basePINMUX_AONHV = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_AONHV);
if (basePINMUX_AONHV == MAP_FAILED) {
return -5;
}
// Mapping PINMUX_G7
basePINMUX_G7 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_G7);
if (basePINMUX_G7 == MAP_FAILED) {
return -6;
}
// Mapping PINMUX_G3
basePINMUX_G3 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_G3);
if (basePINMUX_G3 == MAP_FAILED) {
return -7;
}
// Mapping PINMUX_EDP
basePINMUX_EDP = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_EDP);
if (basePINMUX_EDP == MAP_FAILED) {
return -8;
}
// Mapping PINMUX_G4
basePINMUX_G4 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_G4);
if (basePINMUX_G4 == MAP_FAILED) {
return -9;
}
// Mapping PINMUX_G2
basePINMUX_G2 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, Pinmux_G2);
if (basePINMUX_G2 == MAP_FAILED) {
return -10;
}
// Mapping PWM1
basePWM1 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_PWM1);
if (basePWM1 == MAP_FAILED) {
return -11;
}
// Mapping PWM5
basePWM5 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_PWM5);
if (basePWM5 == MAP_FAILED) {
return -12;
}
// Mapping PWM8
basePWM8 = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_PWM8);
if (basePWM8 == MAP_FAILED) {
return -13;
}
// Pointer to CNFO_3
pin3 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFO_3);
pin_CNF.pin3 = pin3->CNF[0];
pin_DEB.pin3 = pin3->DEB[0];
pin_IN.pin3 = pin3->IN[0];
pin_OUT.pin3 = pin3->OUT[0];
pin_OUT_VLE.pin3 = pin3->OUT_VLE[0];
// Pointer to PINMUX3
pinmux3 = (uint32_t volatile *)((char *)basePINMUX_AON + PINMUXO_3);
pin_MUX.pin3 = *pinmux3;
// Pointer to PINCFG3
pincfg3 = (uint32_t volatile *)((char *)basePINMUX_AON + CFGO_3);
pin_CFG.pin3 = *pincfg3;
// Pointer to CNF5
pin5 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFO_5);
pin_CNF.pin5 = pin5->CNF[0];
pin_DEB.pin5 = pin5->DEB[0];
pin_IN.pin5 = pin5->IN[0];
pin_OUT.pin5 = pin5->OUT[0];
pin_OUT_VLE.pin5 = pin5->OUT_VLE[0];
// Pointer to PINMUX5
pinmux5 = (uint32_t volatile *)((char *)basePINMUX_AON + PINMUXO_5);
pin_MUX.pin5 = *pinmux5;
// Pointer to PINCFG5
pincfg5 = (uint32_t volatile *)((char *)basePINMUX_AON + CFGO_5);
pin_CFG.pin5 = *pincfg5;
// Pointer to CNF7
pin7 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFOX_7);
pin_CNF.pin7 = pin7->CNF[0];
pin_DEB.pin7 = pin7->DEB[0];
pin_IN.pin7 = pin7->IN[0];
pin_OUT.pin7 = pin7->OUT[0];
pin_OUT_VLE.pin7 = pin7->OUT_VLE[0];
// Pointer to PINMUX7
pinmux7 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXOX_7);
pin_MUX.pin7 = *pinmux7;
// Pointer to PINCFG7
pincfg7 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGOX_7);
pin_CFG.pin7 = *pincfg7;
// Pointer to CNF8
pin8 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_8);
pin_CNF.pin8 = pin8->CNF[0];
pin_DEB.pin8 = pin8->DEB[0];
pin_IN.pin8 = pin8->IN[0];
pin_OUT.pin8 = pin8->OUT[0];
pin_OUT_VLE.pin8 = pin8->OUT_VLE[0];
// Pointer to PINMUX8
pinmux8 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXO_8);
pin_MUX.pin8 = *pinmux8;
// Pointer to PINCFG8
pincfg8 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGO_8);
pin_CFG.pin8 = *pincfg8;
// Pointer to CNF10
pin10 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_10);
pin_CNF.pin10 = pin10->CNF[0];
pin_DEB.pin10 = pin10->DEB[0];
pin_IN.pin10 = pin10->IN[0];
pin_OUT.pin10 = pin10->OUT[0];
pin_OUT_VLE.pin10 = pin10->OUT_VLE[0];
// Pointer to PINMUX10
pinmux10 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXO_10);
pin_MUX.pin10 = *pinmux10;
// Pointer to PINCFG10
pincfg10 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGO_10);
pin_CFG.pin10 = *pincfg10;
// Pointer to CNF11
pin11 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_11);
pin_CNF.pin11 = pin11->CNF[0];
pin_DEB.pin11 = pin11->DEB[0];
pin_IN.pin11 = pin11->IN[0];
pin_OUT.pin11 = pin11->OUT[0];
pin_OUT_VLE.pin11 = pin11->OUT_VLE[0];
// Pointer to PINMUX11
pinmux11 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXO_11);
pin_MUX.pin11 = *pinmux11;
// Pointer to PINCFG11
pincfg11 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGO_11);
pin_CFG.pin11 = *pincfg11;
// Pointer to CNF12
pin12 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_12);
pin_CNF.pin12 = pin12->CNF[0];
pin_DEB.pin12 = pin12->DEB[0];
pin_IN.pin12 = pin12->IN[0];
pin_OUT.pin12 = pin12->OUT[0];
pin_OUT_VLE.pin12 = pin12->OUT_VLE[0];
// Pointer to PINMUX12
pinmux12 = (uint32_t volatile *)((char *)basePINMUX_G4 + PINMUXO_12);
pin_MUX.pin12 = *pinmux12;
// Pointer to PINCFG12
pincfg12 = (uint32_t volatile *)((char *)basePINMUX_G4 + CFGO_12);
pin_CFG.pin12 = *pincfg12;
// Pointer to CNF13
pin13 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFOX_13);
pin_CNF.pin13 = pin13->CNF[0];
pin_DEB.pin13 = pin13->DEB[0];
pin_IN.pin13 = pin13->IN[0];
pin_OUT.pin13 = pin13->OUT[0];
pin_OUT_VLE.pin13 = pin13->OUT_VLE[0];
// Pointer to PINMUX13
pinmux13 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXOX_13);
pin_MUX.pin13 = *pinmux13;
// Pointer to PINCFG13
pincfg13 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGOX_13);
pin_CFG.pin13 = *pincfg13;
// Pointer to CNF15
pin15 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_15);
pin_CNF.pin15 = pin15->CNF[0];
pin_DEB.pin15 = pin15->DEB[0];
pin_IN.pin15 = pin15->IN[0];
pin_OUT.pin15 = pin15->OUT[0];
pin_OUT_VLE.pin15 = pin15->OUT_VLE[0];
// Pointer to PINMUX15
pinmux15 = (uint32_t volatile *)((char *)basePINMUX_EDP + PINMUXO_15);
pin_MUX.pin15 = *pinmux15;
// Pointer to PINCFG15
pincfg15 = (uint32_t volatile *)((char *)basePINMUX_EDP + CFGO_15);
pin_CFG.pin15 = *pincfg15;
// Pointer to CNF16
pin16 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFOX_16);
pin_CNF.pin16 = pin16->CNF[0];
pin_DEB.pin16 = pin16->DEB[0];
pin_IN.pin16 = pin16->IN[0];
pin_OUT.pin16 = pin16->OUT[0];
pin_OUT_VLE.pin16 = pin16->OUT_VLE[0];
// Pointer to PINMUX16
pinmux16 = (uint32_t volatile *)((char *)basePINMUX_AONHV + PINMUXOX_16);
pin_MUX.pin16 = *pinmux16;
// Pointer to PINCFG16
pincfg16 = (uint32_t volatile *)((char *)basePINMUX_AONHV + CFGOX_16);
pin_CFG.pin16 = *pincfg16;
// Pointer to CNF18
pin18 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFOX_18);
pin_CNF.pin18 = pin18->CNF[0];
pin_DEB.pin18 = pin18->DEB[0];
pin_IN.pin18 = pin18->IN[0];
pin_OUT.pin18 = pin18->OUT[0];
pin_OUT_VLE.pin18 = pin18->OUT_VLE[0];
// Pointer to PINMUX18
pinmux18 = (uint32_t volatile *)((char *)basePINMUX_G4 + PINMUXOX_18);
pin_MUX.pin18 = *pinmux18;
// Pointer to PINCFG18
pincfg18 = (uint32_t volatile *)((char *)basePINMUX_G4 + CFGOX_18);
pin_CFG.pin18 = *pincfg18;
// Pointer to CNF19
pin19 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_19);
pin_CNF.pin19 = pin19->CNF[0];
pin_DEB.pin19 = pin19->DEB[0];
pin_IN.pin19 = pin19->IN[0];
pin_OUT.pin19 = pin19->OUT[0];
pin_OUT_VLE.pin19 = pin19->OUT_VLE[0];
// Pointer to PINMUX19
pinmux19 = (uint32_t volatile *)((char *)basePINMUX_G2 + PINMUXO_19);
pin_MUX.pin19 = *pinmux19;
// Pointer to PINCFG19
pincfg19 = (uint32_t volatile *)((char *)basePINMUX_G2 + CFGO_19);
pin_CFG.pin19 = *pincfg19;
// Pointer to CNF21
pin21 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_21);
pin_CNF.pin21 = pin21->CNF[0];
pin_DEB.pin21 = pin21->DEB[0];
pin_IN.pin21 = pin21->IN[0];
pin_OUT.pin21 = pin21->OUT[0];
pin_OUT_VLE.pin21 = pin21->OUT_VLE[0];
// Pointer to PINMUX21
pinmux21 = (uint32_t volatile *)((char *)basePINMUX_G2 + PINMUXO_21);
pin_MUX.pin21 = *pinmux21;
// Pointer to PINCFG21
pincfg21 = (uint32_t volatile *)((char *)basePINMUX_G2 + CFGO_21);
pin_CFG.pin21 = *pincfg21;
// Pointer to CNF22
pin22 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFOX_22);
pin_CNF.pin22 = pin22->CNF[0];
pin_DEB.pin22 = pin22->DEB[0];
pin_IN.pin22 = pin22->IN[0];
pin_OUT.pin22 = pin22->OUT[0];
pin_OUT_VLE.pin22 = pin22->OUT_VLE[0];
// Pointer to PINMUX22
pinmux22 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXOX_22);
pin_MUX.pin22 = *pinmux22;
// Pointer to PINCFG22
pincfg22 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGOX_22);
pin_CFG.pin22 = *pincfg22;
// Pointer to CNF23
pin23 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_23);
pin_CNF.pin23 = pin23->CNF[0];
pin_DEB.pin23 = pin23->DEB[0];
pin_IN.pin23 = pin23->IN[0];
pin_OUT.pin23 = pin23->OUT[0];
pin_OUT_VLE.pin23 = pin23->OUT_VLE[0];
// Pointer to PINMUX23
pinmux23 = (uint32_t volatile *)((char *)basePINMUX_G2 + PINMUXO_23);
pin_MUX.pin23 = *pinmux23;
// Pointer to PINCFG23
pincfg23 = (uint32_t volatile *)((char *)basePINMUX_G2 + CFGO_23);
pin_CFG.pin23 = *pincfg23;
// Pointer to CNF24
pin24 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_24);
pin_CNF.pin24 = pin24->CNF[0];
pin_DEB.pin24 = pin24->DEB[0];
pin_IN.pin24 = pin24->IN[0];
pin_OUT.pin24 = pin24->OUT[0];
pin_OUT_VLE.pin24 = pin24->OUT_VLE[0];
// Pointer to PINMUX24
pinmux24 = (uint32_t volatile *)((char *)basePINMUX_G2 + PINMUXO_24);
pin_MUX.pin24 = *pinmux24;
// Pointer to PINCFG24
pincfg24 = (uint32_t volatile *)((char *)basePINMUX_G2 + CFGO_24);
pin_CFG.pin24 = *pincfg24;
// Pointer to CNF26
pin26 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_26);
pin_CNF.pin26 = pin26->CNF[0];
pin_DEB.pin26 = pin26->DEB[0];
pin_IN.pin26 = pin26->IN[0];
pin_OUT.pin26 = pin26->OUT[0];
pin_OUT_VLE.pin26 = pin26->OUT_VLE[0];
// Pointer to PINMUX26
pinmux26 = (uint32_t volatile *)((char *)basePINMUX_G2 + PINMUXO_26);
pin_MUX.pin26 = *pinmux26;
// Pointer to PINCFG26
pincfg26 = (uint32_t volatile *)((char *)basePINMUX_G2 + CFGO_26);
pin_CFG.pin26 = *pincfg26;
// Pointer to CNF27
pin27 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFO_27);
pin_CNF.pin27 = pin27->CNF[0];
pin_DEB.pin27 = pin27->DEB[0];
pin_IN.pin27 = pin27->IN[0];
pin_OUT.pin27 = pin27->OUT[0];
pin_OUT_VLE.pin27 = pin27->OUT_VLE[0];
// Pointer to PINMUX27
pinmux27 = (uint32_t volatile *)((char *)basePINMUX_AON + PINMUXO_27);
pin_MUX.pin27 = *pinmux27;
// Pointer to PINCFG27
pincfg27 = (uint32_t volatile *)((char *)basePINMUX_AON + CFGO_27);
pin_CFG.pin27 = *pincfg27;
// Pointer to CNF28
pin28 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFO_28);
pin_CNF.pin28 = pin28->CNF[0];
pin_DEB.pin28 = pin28->DEB[0];
pin_IN.pin28 = pin28->IN[0];
pin_OUT.pin28 = pin28->OUT[0];
pin_OUT_VLE.pin28 = pin28->OUT_VLE[0];
// Pointer to PINMUX28
pinmux28 = (uint32_t volatile *)((char *)basePINMUX_AON + PINMUXO_28);
pin_MUX.pin28 = *pinmux28;
// Pointer to PINCFG28
pincfg28 = (uint32_t volatile *)((char *)basePINMUX_AON + CFGO_28);
pin_CFG.pin28 = *pincfg28;
// Pointer to CNF29
pin29 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFOX_29);
pin_CNF.pin29 = pin29->CNF[0];
pin_DEB.pin29 = pin29->DEB[0];
pin_IN.pin29 = pin29->IN[0];
pin_OUT.pin29 = pin29->OUT[0];
pin_OUT_VLE.pin29 = pin29->OUT_VLE[0];
// Pointer to PINMUX29
pinmux29 = (uint32_t volatile *)((char *)basePINMUX_AONHV + PINMUXOX_29);
pin_MUX.pin29 = *pinmux29;
// Pointer to PINCFG29
pincfg29 = (uint32_t volatile *)((char *)basePINMUX_AONHV + CFGOX_29);
pin_CFG.pin29 = *pincfg29;
// Pointer to CNF31
pin31 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFOX_31);
pin_CNF.pin31 = pin31->CNF[0];
pin_DEB.pin31 = pin31->DEB[0];
pin_IN.pin31 = pin31->IN[0];
pin_OUT.pin31 = pin31->OUT[0];
pin_OUT_VLE.pin31 = pin31->OUT_VLE[0];
// Pointer to PINMUX31
pinmux31 = (uint32_t volatile *)((char *)basePINMUX_AONHV + PINMUXOX_31);
pin_MUX.pin31 = *pinmux31;
// Pointer to PINCFG31
pincfg31 = (uint32_t volatile *)((char *)basePINMUX_AONHV + CFGOX_31);
pin_CFG.pin31 = *pincfg31;
// Pointer to CNF32
pin32 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFOX_32);
pin_CNF.pin32 = pin32->CNF[0];
pin_DEB.pin32 = pin32->DEB[0];
pin_IN.pin32 = pin32->IN[0];
pin_OUT.pin32 = pin32->OUT[0];
pin_OUT_VLE.pin32 = pin32->OUT_VLE[0];
// Pointer to PINMUX32
pinmux32 = (uint32_t volatile *)((char *)basePINMUX_AONHV + PINMUXOX_32);
pin_MUX.pin32 = *pinmux32;
// Pointer to PINCFG32
pincfg32 = (uint32_t volatile *)((char *)basePINMUX_AONHV + CFGOX_32);
pin_CFG.pin32 = *pincfg32;
// Pointer to CNF33
pin33 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFOX_33);
pin_CNF.pin33 = pin33->CNF[0];
pin_DEB.pin33 = pin33->DEB[0];
pin_IN.pin33 = pin33->IN[0];
pin_OUT.pin33 = pin33->OUT[0];
pin_OUT_VLE.pin33 = pin33->OUT_VLE[0];
// Pointer to PINMUX33
pinmux33 = (uint32_t volatile *)((char *)basePINMUX_AONHV + PINMUXOX_33);
pin_MUX.pin33 = *pinmux33;
// Pointer to PINCFG33
pincfg33 = (uint32_t volatile *)((char *)basePINMUX_AONHV + CFGOX_33);
pin_CFG.pin33 = *pincfg33;
// Pointer to CNF35
pin35 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_35);
pin_CNF.pin35 = pin35->CNF[0];
pin_DEB.pin35 = pin35->DEB[0];
pin_IN.pin35 = pin35->IN[0];
pin_OUT.pin35 = pin35->OUT[0];
pin_OUT_VLE.pin35 = pin35->OUT_VLE[0];
// Pointer to PINMUX35
pinmux35 = (uint32_t volatile *)((char *)basePINMUX_G4 + PINMUXO_35);
pin_MUX.pin35 = *pinmux35;
// Pointer to PINCFG35
pincfg35 = (uint32_t volatile *)((char *)basePINMUX_G4 + CFGO_35);
pin_CFG.pin35 = *pincfg35;
// Pointer to CNF36
pin36 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_36);
pin_CNF.pin36 = pin36->CNF[0];
pin_DEB.pin36 = pin36->DEB[0];
pin_IN.pin36 = pin36->IN[0];
pin_OUT.pin36 = pin36->OUT[0];
pin_OUT_VLE.pin36 = pin36->OUT_VLE[0];
// Pointer to PINMUX36
pinmux36 = (uint32_t volatile *)((char *)basePINMUX_G3 + PINMUXO_36);
pin_MUX.pin36 = *pinmux36;
// Pointer to PINCFG36
pincfg36 = (uint32_t volatile *)((char *)basePINMUX_G3 + CFGO_36);
pin_CFG.pin36 = *pincfg36;
// Pointer to CNF37
pin37 = (GPIO_CNFO volatile *)((char *)baseCNF_AON + CNFOX_37);
pin_CNF.pin37 = pin37->CNF[0];
pin_DEB.pin37 = pin37->DEB[0];
pin_IN.pin37 = pin37->IN[0];
pin_OUT.pin37 = pin37->OUT[0];
pin_OUT_VLE.pin37 = pin37->OUT_VLE[0];
// Pointer to PINMUX37
pinmux37 = (uint32_t volatile *)((char *)basePINMUX_AONHV + PINMUXOX_37);
pin_MUX.pin37 = *pinmux37;
// Pointer to PINCFG37
pincfg37 = (uint32_t volatile *)((char *)basePINMUX_AONHV + CFGOX_37);
pin_CFG.pin37 = *pincfg37;
// Pointer to CNF38
pin38 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_38);
pin_CNF.pin38 = pin38->CNF[0];
pin_DEB.pin38 = pin38->DEB[0];
pin_IN.pin38 = pin38->IN[0];
pin_OUT.pin38 = pin38->OUT[0];
pin_OUT_VLE.pin38 = pin38->OUT_VLE[0];
// Pointer to PINMUX38
pinmux38 = (uint32_t volatile *)((char *)basePINMUX_G4 + PINMUXO_38);
pin_MUX.pin38 = *pinmux38;
// Pointer to PINCFG38
pincfg38 = (uint32_t volatile *)((char *)basePINMUX_G4 + CFGO_38);
pin_CFG.pin38 = *pincfg38;
// Pointer to CNF40
pin40 = (GPIO_CNFO volatile *)((char *)baseCNF_NAON + CNFO_40);
pin_CNF.pin40 = pin40->CNF[0];
pin_DEB.pin40 = pin40->DEB[0];
pin_IN.pin40 = pin40->IN[0];
pin_OUT.pin40 = pin40->OUT[0];
pin_OUT_VLE.pin40 = pin40->OUT_VLE[0];
// Pointer to PINMUX40
pinmux40 = (uint32_t volatile *)((char *)basePINMUX_G4 + PINMUXO_40);
pin_MUX.pin40 = *pinmux40;
// Pointer to PINCFG40
pincfg40 = (uint32_t volatile *)((char *)basePINMUX_G4 + CFGO_40);
pin_CFG.pin40 = *pincfg40;
// Pointer to PWM1
PWM1 = (uint32_t volatile *)((char *)basePWM1);
PWM1_Init = *PWM1;
// Pointer to PWM5
PWM5 = (uint32_t volatile *)((char *)basePWM5);
PWM5_Init = *PWM5;
// Pointer to PWM8
PWM8 = (uint32_t volatile *)((char *)basePWM8);
PWM8_Init = *PWM8;
// Initialize i2c
i2cInfo[1].state = I2C_CLOSED;
i2cInfo[7].state = I2C_CLOSED;
// Initialize spi
SpiInfo[0].state = SPI_CLOSED;
// Global interrupt variable
global_int = 1;
// Allocating memory for the struct
for (int j = 0; j < 41; j++) {
ISRFunc_CFG[j] = calloc (1, sizeof(ISRFunc));
}
return status;
}
void gpioTerminate(void) {
// Stopping threads
global_int = 0;
// Cancelling threads to avoid blocking on read()
for(int i = 0;i < thread_n; i++) {
pthread_cancel(callThd[i]);
//printf("Thread number: %d cancelled\n",i);
}
//Joining threads
for(int j = 0;j < thread_n; j++) {
pthread_join(callThd[j], &status_thread);
//printf("Thread number: %d joined\n",j);
}
// Free allocated memory
for (int k = 0; k < 41; k++) {
free(ISRFunc_CFG[k]);
}
int pagesize = sysconf(_SC_PAGESIZE);
// Restoring registers to their previous state
if ((pin_tracker >> 28) & 1) {
*PWM1 = PWM1_Init;
struct jetclk clock;
memset(&clock, 0, sizeof(clock));
int dev = open("/dev/jetclocks", O_WRONLY);
if(dev < 0) {
printf("Opening /dev/jetclocks not possible\n");
}
clock.clk_set_rate = clk_rate_PWM1;
strncpy(clock.clk, "pwm1", sizeof(clock.clk));
ioctl(dev, CLK_SET_RATE, &clock);
close(dev);
}
if ((pin_tracker >> 29) & 1) {
*PWM5 = PWM5_Init;
struct jetclk clock;
memset(&clock, 0, sizeof(clock));
int dev = open("/dev/jetclocks", O_WRONLY);
if(dev < 0) {
printf("Opening /dev/jetclocks not possible\n");
}
clock.clk_set_rate = clk_rate_PWM5;
strncpy(clock.clk, "pwm5", sizeof(clock.clk));
ioctl(dev, CLK_SET_RATE, &clock);
close(dev);
}
if ((pin_tracker >> 30) & 1) {
*PWM8 = PWM8_Init;
struct jetclk clock;
memset(&clock, 0, sizeof(clock));
int dev = open("/dev/jetclocks", O_WRONLY);
if(dev < 0) {
printf("Opening /dev/jetclocks not possible\n");
}
clock.clk_set_rate = clk_rate_PWM8;
strncpy(clock.clk, "pwm8", sizeof(clock.clk));
ioctl(dev, CLK_SET_RATE, &clock);
close(dev);
}
if (pin_tracker & 1) {
pin3->CNF[0] = pin_CNF.pin3;
pin3->DEB[0] = pin_DEB.pin3;
pin3->IN[0] = pin_IN.pin3;
pin3->OUT[0] = pin_OUT.pin3;
pin3->OUT_VLE[0] = pin_OUT_VLE.pin3;
*pinmux3 = pin_MUX.pin3;
*pincfg3 = pin_CFG.pin3;
}
if ((pin_tracker >> 1) & 1) {
pin5->CNF[0] = pin_CNF.pin5;
pin5->DEB[0] = pin_DEB.pin5;
pin5->IN[0] = pin_IN.pin5;
pin5->OUT[0] = pin_OUT.pin5;
pin5->OUT_VLE[0] = pin_OUT_VLE.pin5;
*pinmux5 = pin_MUX.pin5;
*pincfg5 = pin_CFG.pin5;
}
if (((pin_tracker >> 2) & 1) || ((pin_tracker >> 32) & 1)) {
pin7->CNF[0] = pin_CNF.pin7;
pin7->DEB[0] = pin_DEB.pin7;
pin7->IN[0] = pin_IN.pin7;
pin7->OUT[0] = pin_OUT.pin7;
pin7->OUT_VLE[0] = pin_OUT_VLE.pin7;
*pinmux7 = pin_MUX.pin7;
*pincfg7 = pin_CFG.pin7;
}
if ((pin_tracker >> 3) & 1) {
pin8->CNF[0] = pin_CNF.pin8;
pin8->DEB[0] = pin_DEB.pin8;
pin8->IN[0] = pin_IN.pin8;
pin8->OUT[0] = pin_OUT.pin8;
pin8->OUT_VLE[0] = pin_OUT_VLE.pin8;
*pinmux8 = pin_MUX.pin8;
*pincfg8 = pin_CFG.pin8;
}
if ((pin_tracker >> 4) & 1) {
pin10->CNF[0] = pin_CNF.pin10;
pin10->DEB[0] = pin_DEB.pin10;
pin10->IN[0] = pin_IN.pin10;
pin10->OUT[0] = pin_OUT.pin10;
pin10->OUT_VLE[0] = pin_OUT_VLE.pin10;
*pinmux10 = pin_MUX.pin10;
*pincfg10 = pin_CFG.pin10;
}
if ((pin_tracker >> 5) & 1) {
pin11->CNF[0] = pin_CNF.pin11;
pin11->DEB[0] = pin_DEB.pin11;
pin11->IN[0] = pin_IN.pin11;
pin11->OUT[0] = pin_OUT.pin11;
pin11->OUT_VLE[0] = pin_OUT_VLE.pin11;
*pinmux11 = pin_MUX.pin11;
*pincfg11 = pin_CFG.pin11;
}
if ((pin_tracker >> 6) & 1) {
pin12->CNF[0] = pin_CNF.pin12;
pin12->DEB[0] = pin_DEB.pin12;
pin12->IN[0] = pin_IN.pin12;
pin12->OUT[0] = pin_OUT.pin12;
pin12->OUT_VLE[0] = pin_OUT_VLE.pin12;
*pinmux12 = pin_MUX.pin12;
*pincfg12 = pin_CFG.pin12;
}
if (((pin_tracker >> 7) & 1) || ((pin_tracker >> 30) & 1)) {
pin13->CNF[0] = pin_CNF.pin13;
pin13->DEB[0] = pin_DEB.pin13;
pin13->IN[0] = pin_IN.pin13;
pin13->OUT[0] = pin_OUT.pin13;
pin13->OUT_VLE[0] = pin_OUT_VLE.pin13;
*pinmux13 = pin_MUX.pin13;
*pincfg13 = pin_CFG.pin13;
}
if (((pin_tracker >> 8) & 1) || ((pin_tracker >> 28) & 1)) {
pin15->CNF[0] = pin_CNF.pin15;
pin15->DEB[0] = pin_DEB.pin15;
pin15->IN[0] = pin_IN.pin15;
pin15->OUT[0] = pin_OUT.pin15;
pin15->OUT_VLE[0] = pin_OUT_VLE.pin15;
*pinmux15 = pin_MUX.pin15;
*pincfg15 = pin_CFG.pin15;
}
if ((pin_tracker >> 9) & 1) {
pin16->CNF[0] = pin_CNF.pin16;
pin16->DEB[0] = pin_DEB.pin16;
pin16->IN[0] = pin_IN.pin16;
pin16->OUT[0] = pin_OUT.pin16;
pin16->OUT_VLE[0] = pin_OUT_VLE.pin16;
*pinmux16 = pin_MUX.pin16;
*pincfg16 = pin_CFG.pin16;
}
if (((pin_tracker >> 10) & 1) || ((pin_tracker >> 29) & 1)) {
pin18->CNF[0] = pin_CNF.pin18;
pin18->DEB[0] = pin_DEB.pin18;
pin18->IN[0] = pin_IN.pin18;
pin18->OUT[0] = pin_OUT.pin18;
pin18->OUT_VLE[0] = pin_OUT_VLE.pin18;
*pinmux18 = pin_MUX.pin18;
*pincfg18 = pin_CFG.pin18;
}
if (((pin_tracker >> 11) & 1) || ((pin_tracker >> 31) & 1)) {
pin19->CNF[0] = pin_CNF.pin19;
pin19->DEB[0] = pin_DEB.pin19;
pin19->IN[0] = pin_IN.pin19;
pin19->OUT[0] = pin_OUT.pin19;
pin19->OUT_VLE[0] = pin_OUT_VLE.pin19;
*pinmux19 = pin_MUX.pin19;
*pincfg19 = pin_CFG.pin19;
}
if (((pin_tracker >> 12) & 1) || ((pin_tracker >> 31) & 1)) {
pin21->CNF[0] = pin_CNF.pin21;
pin21->DEB[0] = pin_DEB.pin21;
pin21->IN[0] = pin_IN.pin21;
pin21->OUT[0] = pin_OUT.pin21;
pin21->OUT_VLE[0] = pin_OUT_VLE.pin21;
*pinmux21 = pin_MUX.pin21;
*pincfg21 = pin_CFG.pin21;
}
if ((pin_tracker >> 13) & 1) {
pin22->CNF[0] = pin_CNF.pin22;
pin22->DEB[0] = pin_DEB.pin22;
pin22->IN[0] = pin_IN.pin22;
pin22->OUT[0] = pin_OUT.pin22;
pin22->OUT_VLE[0] = pin_OUT_VLE.pin22;
*pinmux22 = pin_MUX.pin22;
*pincfg22 = pin_CFG.pin22;
}
if (((pin_tracker >> 14) & 1) || ((pin_tracker >> 31) & 1)) {
pin23->CNF[0] = pin_CNF.pin23;
pin23->DEB[0] = pin_DEB.pin23;
pin23->IN[0] = pin_IN.pin23;
pin23->OUT[0] = pin_OUT.pin23;
pin23->OUT_VLE[0] = pin_OUT_VLE.pin23;
*pinmux23 = pin_MUX.pin23;
*pincfg23 = pin_CFG.pin23;
}
if (((pin_tracker >> 15) & 1) || ((pin_tracker >> 31) & 1)) {
pin24->CNF[0] = pin_CNF.pin24;
pin24->DEB[0] = pin_DEB.pin24;
pin24->IN[0] = pin_IN.pin24;
pin24->OUT[0] = pin_OUT.pin24;
pin24->OUT_VLE[0] = pin_OUT_VLE.pin24;
*pinmux24 = pin_MUX.pin24;
*pincfg24 = pin_CFG.pin24;
}
if ((pin_tracker >> 16) & 1) {
pin26->CNF[0] = pin_CNF.pin26;
pin26->DEB[0] = pin_DEB.pin26;
pin26->IN[0] = pin_IN.pin26;
pin26->OUT[0] = pin_OUT.pin26;
pin26->OUT_VLE[0] = pin_OUT_VLE.pin26;
*pinmux26 = pin_MUX.pin26;
*pincfg26 = pin_CFG.pin26;
}
if ((pin_tracker >> 17) & 1) {
pin27->CNF[0] = pin_CNF.pin27;
pin27->DEB[0] = pin_DEB.pin27;
pin27->IN[0] = pin_IN.pin27;