From 4ec3a977b21da0025609fad0564edaa98436e077 Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com>
Date: Mon, 19 Feb 2024 11:42:44 +0530
Subject: [PATCH] SWDEV-445460: Changelog for warp sync builtins in HIP 6.2.

Change-Id: I79de9ce945a4d9413a8fbb8bbe162883ffd3b63c
---
 CHANGELOG.md | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 940517b2d..c8df9c906 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -2,6 +2,14 @@
 
 Full documentation for HIP is available at [docs.amd.com](https://docs.amd.com/)
 
+## HIP 6.2 (For ROCm 6.2)
+
+### Added
+- Introduced the `_sync()` version of crosslane builtins such as `shfl_sync()`, `__all_sync()`
+  and `__any_sync()`. These take a 64-bit integer as an explicit mask argument.
+  - In HIP 6.2, these are hidden behind the preprocessor macro
+    `HIP_ENABLE_WARP_SYNC_BUILTINS`, and will be enabled unconditionally in HIP 6.3.
+
 ## HIP 6.1 (For ROCm 6.1)
 ### Optimizations