From e52f9610c2fee9c18aa099c12e239d89ca07f047 Mon Sep 17 00:00:00 2001
From: Mariusz Glebocki <mglebocki@antmicro.com>
Date: Thu, 4 Nov 2021 09:40:54 +0100
Subject: [PATCH] Put space between `wait` and `(`

---
 verilog/formatting/formatter_test.cc       | 12 ++++++------
 verilog/formatting/token_annotator.cc      |  1 -
 verilog/formatting/token_annotator_test.cc | 10 ++++++----
 3 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/verilog/formatting/formatter_test.cc b/verilog/formatting/formatter_test.cc
index 4ba2dd24a..59cff5917 100644
--- a/verilog/formatting/formatter_test.cc
+++ b/verilog/formatting/formatter_test.cc
@@ -5916,23 +5916,23 @@ static constexpr FormatterTestCase kFormatterTestCases[] = {
     {// wait statements (null)
      "task t; wait  (a==b);wait(c<d); endtask",
      "task t;\n"
-     "  wait(a == b);\n"
-     "  wait(c < d);\n"
+     "  wait (a == b);\n"
+     "  wait (c < d);\n"
      "endtask\n"},
     {// wait statements, single action statement
      "task t; wait  (a==b) p();wait(c<d) q(); endtask",
      "task t;\n"
-     "  wait(a == b) p();\n"
-     "  wait(c < d) q();\n"
+     "  wait (a == b) p();\n"
+     "  wait (c < d) q();\n"
      "endtask\n"},
     {// wait statements, block action statement
      "task t; wait  (a==b) begin p(); end "
      "wait(c<d) begin q(); end endtask",
      "task t;\n"
-     "  wait(a == b) begin\n"
+     "  wait (a == b) begin\n"
      "    p();\n"
      "  end\n"
-     "  wait(c < d) begin\n"
+     "  wait (c < d) begin\n"
      "    q();\n"
      "  end\n"
      "endtask\n"},
diff --git a/verilog/formatting/token_annotator.cc b/verilog/formatting/token_annotator.cc
index c276cfcb0..cc824fa30 100644
--- a/verilog/formatting/token_annotator.cc
+++ b/verilog/formatting/token_annotator.cc
@@ -86,7 +86,6 @@ static bool IsKeywordCallable(verilog_tokentype e) {
     case TK_sort:
     case TK_sum:
     case TK_unique:  // array method
-    case TK_wait:    // wait statement
     case TK_xor:     // array method
       // TODO(fangism): Verilog-AMS functions, like sin, cos, ...
       return true;
diff --git a/verilog/formatting/token_annotator_test.cc b/verilog/formatting/token_annotator_test.cc
index b13579205..5fd6c90f7 100644
--- a/verilog/formatting/token_annotator_test.cc
+++ b/verilog/formatting/token_annotator_test.cc
@@ -1388,6 +1388,12 @@ TEST(TokenAnnotatorTest, AnnotateFormattingInfoTest) {
            {verilog_tokentype::TK_end, "end"},
        }},
 
+      // wait ()
+      {DefaultStyle,
+       1,
+       {{0, SpacingOptions::Undecided}, {1, SpacingOptions::Undecided}},
+       {{verilog_tokentype::TK_wait, "wait"}, {'(', "("}}},
+
       // various built-in function calls
       {DefaultStyle,
        1,
@@ -1491,10 +1497,6 @@ TEST(TokenAnnotatorTest, AnnotateFormattingInfoTest) {
        1,
        {{0, SpacingOptions::Undecided}, {0, SpacingOptions::Undecided}},
        {{verilog_tokentype::TK_unique, "unique"}, {'(', "("}}},
-      {DefaultStyle,
-       1,
-       {{0, SpacingOptions::Undecided}, {0, SpacingOptions::Undecided}},
-       {{verilog_tokentype::TK_wait, "wait"}, {'(', "("}}},
       {DefaultStyle,
        1,
        {{0, SpacingOptions::Undecided}, {0, SpacingOptions::Undecided}},